Escolar Documentos
Profissional Documentos
Cultura Documentos
A
Description
Thanks to its junction temperature Tj up to
G 150 °C, the device offers high thermal
K
performance operation up to 40 A. Its D²PAK
package allows modern SMD designs as well as
A compact back to back configuration.
Its trade-off noise immunity (dV/dt = 500 V/μs)
versus its gate triggering current (IGT = 15 mA)
A
K
and its turn-on current rise (dI/dt = 100 A/μs)
G allow to design robust and compact control circuit
for voltage regulator in motorbikes and industrial
D²PAK
drives, overvoltage crowbar protection, motor
control circuits in power tools and kitchen
appliances, inrush current limiting circuits.
Features
Table 1: Device summary
High junction temperature: Tj = 150 °C
High noise immunity dV/dt = 500 V/µs up to Order code Package VDRM/VRRM IGT
150 °C TN4015H-6G D²PAK 600 V 15 mA
Gate triggering current IGT = 15 mA
Off-state voltage 600 V VDRM/VRRM
High turn on current rise dI/dt = 100 A/µs
ECOPACK®2 compliant component
Applications
Motorbike voltage regulator circuits
Inrush current limiting circuit
Motor control circuits and starters
Solid state relays
1 Characteristics
Table 2: Absolute maximum ratings (limiting values), Tj = 25 °C unless otherwise specified
Symbol Parameter Value Unit
RMS on-state current
IT(RMS) Tc = 119 °C 40 A
(180 ° conduction angle)
Tc = 120 °C 25
Average on-state current
IT(AV) Tc = 125 °C 22 A
(180 ° conduction angle)
Tc = 128 °C 20
tp = 8.3 ms 394
ITSM Non repetitive surge peak on-state current A
tp = 10 ms 360
I2 t I2t value for fusing tp = 10 ms 648 A2s
Critical rate of rise of on-state current
dl/dt f = 60 Hz 100 A/µs
IG = 2 x IGT, tr ≤ 100 ns
VDRM/VRRM Repetitive peak off-state voltage Tj = 150 °C 600 V
VDSM/VRSM Non repetitive surge peak off-state voltage tp = 10 ms VDRM/VRRM + 100 V
IGM Peak gate current tp = 20 µs Tj = 150 °C 4 A
PG(AV) Average gate power dissipation Tj = 150 °C 1 W
VRGM Maximum peak reverse gate voltage 5 V
Tstg Storage junction temperature range -40 to +150 °C
Tj Maximum operating junction temperature -40 to +150 °C
Notes:
(1)S = Copper surface under tab
20
20
10 360° 10
α
0 0
0 5 10 15 20 25 30 35 0 25 50 75 100 125 150
IT(AV)(A) TC(°C)
Figure 3: Average and D.C. on state current versus Figure 4: Relative variation of thermal impedance
ambient temperature versus pulse duration
IT(AV) (A) K = [Zth /Rth ]
3.0 1.0E+00
Z
th(j-c)
2.5 D.C
Z
th(j-a)
2.0 1.0E-01
α = 180 °
1.5
1.0 1.0E-02
0.5
0.0 1.0E-03
0 25 50 75 100 125 150 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1.0E+03
Ta (°C) tp (s)
Figure 5: Relative variation of gate trigger current Figure 6: Relative variation of holding and latching
and gate voltage versus junction temperature current versus junction temperature
(typical values) (typical values)
IGT , VGT [Tj ] / IGT , VGT [Tj = 25 °C] IH , IL [Tj ] / IH , IL [Tj = 25 °C]
2.5 2.5
2.3
I
GT
2.0 2.0 IH
1.8
1.5 1.5
1.3
VGT
1.0 1.0 IL
0.8
0.5 0.5
0.3
0.0 0.0
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
Tj(°C) Tj(°C)
8 300
7 250
6
200
5
Repetitive
4 150 Tc = 119 °C
3 100
2
50
1
0 0
1 10 100 1000
90 95 100 105 110 115 120 125 130 135 140 145 150
Number of cycles
Tj (°C)
Figure 9: Non repetitive surge peak on-state Figure 10: On-state characteristics
current for a sinusoidal pulse with width tp < 10 ms (maximum values)
ITSM (A) ITM (A)
10000 1000
Tj initial = 25 °C
dI/dt limitation: 100 A/µs
ITSM
1000 100
100 10
Tj = 150 °C Tj = 25 °C Tj max :
VTO = 0.85 V
Rd = 10 mΩ
10 1
0.01 0.10 1.00 10.00 0.0 1.0 2.0 3.0 4.0
tp (ms) VT M (V)
Figure 11: Relative variation of leakage current Figure 12: Thermal resistance junction to ambient
versus junction temperature versus copper surface under tab
IDRM , IRRM [Tj; VDRM , VRRM ] / IDRM , IRRM [150 °C; 600 V] Rth(j-a) (°C/W)
1.0E+00 80
50
1.0E-02
40
1.0E-03 30
20
1.0E-04 Epoxy printed board FR4, eCU= 35 µm
10
SCu(cm²)
1.0E-05 0
25 50 75 100 125 150 0 5 10 15 20 25 30 35 40
Tj (°C)
2 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK ®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Epoxy meets UL94, V0
Lead-free, halogen-free package
Notes:
(1)Dimensions in inches are given for reference only
3 Ordering information
Figure 15: Ordering information scheme
TN 40 15 H - 6 G - TR
Series
TN = SCR
Current
40 = 40 A
Gate sensitivity
15 = 15 m A
High temperature
H = 150 °C
Voltage
6 = 600 V
Package
G = D ² PA K
Packing mode
Blank = tube
TR = Tape and reel
4 Revision history
Table 8: Document revision history
Date Revision Changes
01-Aug-2016 1 Initial release.
22-May-2017 2 Updated Figure 13: "D²PAK package outline".
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST
products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the
design of Purchasers’ products.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.