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Introduction
The Series STR-W6750 devices are hybrid integrated cir-
cuits (HICs) with a built-in power MOSFET and a control
IC designed for quasi-resonant type switch-mode power
supplies (SMPS). In normal operation, the HIC provides
high efficiency and low EMI noise with bottom-skip quasi-
resonant operation during light output loads. Low power
consumption is also achieved by blocking (intermittent)
oscillation during an auto-burst mode and reduced even
further in a manually triggered (clamping an output voltage)
standby mode.
The HIC is supplied in a seven-pin fully-molded TO-220-
Figure 1. STR-W6700 series packages are fully molded TO-220
style package with pin 2 deleted, which is suitable for down-
package types. Pin 2 is deleted for greater isolation.
sizingand standardizing of an SMPS by reducing external
componentcount and simplifying circuit design.
Features and benefits include the following:
▪ Blocking (or intermittent) oscillation operation by
Table 1. Product Line-up
reducing output voltage in the standby mode.
MOSFET RDS(on) VAC
▪ In addition to the standard quasi-resonant operation, a Type # VDSS (Max) Input
POUT*
bottom-skip function is available for increased efficiency (V) (Ω) (V)
(W)
from light to medium load. STR-W6735 500 0.57 120 160
▪ Soft-start operation at start-up.
Wide 58
▪ Reduced switching noise (compared to conventional STR-W6753 1.70
230 120
PWM hard-switching solution) with a step-drive
function. Wide 100
STR-W6754 650 0.96
▪ Built-in avalanche-energy-guaranteed power MOSFET 230 160
(to simplify surge-absorption circuit; no VDSS derating Wide 140
is required). STR-W6756 0.73
230 240
▪ Overcurrent protection (OCP), overvoltage protection Wide 50
(OVP), overload protection (OLP), and maximum STR-W6765 800 1.80
230 110
ON-time control circuits are incorporated. OVP and OLP
go into a latched mode. *The listed output power represents thermal ratings, and the peak
output power, POUT , is obtained by 120% to 140% of the thermal
▪ Able to save SMPS design time with present designs and rating value. In case of low output voltage and narrow on-duty
evaluation processes. cycle, the POUT (W) becomes lower than the above.
Contents
Introduction 1
Pin functional descriptions 2
Operation description 6
Transformer parameters 10 All performance characteristics given are typical values for
General considerations 11 circuit or system baseline design only and are at the nominal
Design considerations 13 operating voltage and an ambient temperature of 25°C, un-
Package Dimensions, TO-220 14 less otherwise stated.
Worldwide Contacts 17
28103.30
SANKEN ELECTRIC CO., LTD.
http://www.sanken-ele.co.jp/en/
Pin functional descriptions starts its operation by the start-up circuit, and supply current is
increased. Once the VCC pin voltage drops down to lower than
the Operation-Stop voltage 9.7 V, the UVLO circuit operates to
VCC Supply (pin 4)
stop the control circuit, and the IC returns to its initial state.
Start-up circuit The start-up circuit detects the VCC pin volt-
age, and makes the control IC start and stop operation. The power Bias/drive winding After the control circuit starts its operation,
supply of the control IC (VCC pin input) employs a circuit as the power supply is operated by rectifying and smoothing the
shown in figure 2. At start-up, C3 is charged through a start-up voltage of the bias winding. Figure 4 shows the start-up voltage
resistor R2. The R2 value needs to be set for more than the hold waveform of the VCC pin. The bias winding voltage does not
current of the latch circuit (140 μA max.) and to operate at the immediately increase up to the set voltage after the control circuit
minimum AC input. starts its operation. That is why the VCC pin voltage starts drop-
ping. The Operation-Stop voltage is set as low as 10.6 V (max),
If the value of R2 is too high, the C3 charge current will be
the bias winding voltage reaches a stabilized voltage before it
reduced. Consequently, it will take longer to reach the Operation-
drops to the Operation-Stop voltage, and the control circuit conti-
Start voltage. The VCC pin voltage falls immediately after
ues its operation. The bias winding voltage, in normal power sup-
the control circuit starts its operation. The voltage drop can be
ply operation, is set for the voltage across C3 to be higher than
reduced by increasing C3 capacitance. However, too large a
C3 capacitance will cause an improperly long time to reach the the Operation-Stop voltage, VCC(OFF) , 10.6 V (max.) and lower
Operation-Start voltage after the initial power turn on. than the OVP-operation voltage, VCC(OVP) , 25.5 V (min.).
100 μ A
( MAX) VCC
9. 7 V 15V 18. 2 V
( TYP) ( TYP)
Operation Start
VCC
R2
P 18.2 V
(TYP) Bias Winding Voltage
1
D D2 10.6V
(MAX)
VCC
4 Start-up
STR-W6700 D failure
C3
S/GND time
3
AC on
Figure 2. External start-up circuit. Figure 4. VCC pin voltage after start-up, capacitor C3 installed
IO
D2 R7
VCC
4
Bias
STR-W6700 D
C3
S/GND
3
Figure 12. OLP deactivation circuit alternative configurations Figure 13. Constant-voltage control at fixed oscillation frequency (quasi-
resonant signal not available)
IDS
D D
1 P
1 4 Control
V CC
D
STA RT 18V
BUR ST 11 V BURST FB LOGIC DRIVE
㧗 6
㧙 VFB
3
OSC FB SW 1 S/GND
㧗
㧙 Reg.V1 Filter
RB1
VOCPM
㧙
ROCP
C5
㧙
VOCPM
㧗
OCP 㧗 RB2
3 S/GND 7
OCP/BD
OCP 7 V4
OCP/BD
R4
ROCP
V5
Figure 14. REG circuit functional block diagram Figure 15. OCP functional block diagram
VDS
Detection
IDS level
V OC PB D(TH2 )
OCP/BD V OC PB D(TH1 )
V OCP
V OC PB D(BS2) Hysteresis
V OC PB D(BS1)
V OC PB D(LIM)
MOSFET Gate
(Power ICޓinternal)
State signal
(Power IC internal)
Secondary
Output Voltage
Feedback Stand-by
V FB(S)
detection level
Start Voltage
at stand-by
Start VCC(S)
V CC(ON)
VCC Voltage
Stop V CC(OFF)
Voltage
Power MOSFET
Waveform
Barrier
Barrier
( [2×PO×fOSC / H] 1/2 (3) P2
+VIN× ×fOSC×D×C14/2 ) 2 P1 LoB S3
where: S3 S1
Barrier
Core
Maximum On-time
(B)
Figure 21. Maximum on-time Figure 22. Example of recommended transformers: (A) CRT TV
transformer, (B) low output-voltage transformer.
Input
Smoothing P
Capacitor
Start-up P
Resistor Snubber Circuit
Bias
CR D
Voltage
Resonant D VCC
Capacitor STR-W6700
S/GND
Feedback Circuit
OCP SS/
/BD OLP FB 200 V
Bottom-Detection
Fast
Recovery
Delay Circuit
Diode
Bottom-Detection
Current- OCP Delay Circuit
Sense Sense
Resistor Filter
10 to 22 kΩ 16 V
Loop for OCP Matching to Input Voltage
Output Smoothing
Capacitors Output
Ground
External Signal
for Standby
Figure 25. High frequency, high current loops
Manual Standby
Sanken Error Amplifier by VO drop
Type SExxx
VCC SS/
OLP
STR-W6700
FB D
OCP Bias
S/Gnd /BD
4 ±0.2
0.5
7.9 ±0.2
16.9 ±0.3
Ø3.2 ±0.2
Branding
XXXXXXXX
XXXXXXXX
2.6 ±0.1
2.8
XX XX
Terminal dimension at case surface
0.74±0.15
5.0 ±0.5
(2
×R
1)
+0.2
10.4 ±0.5
0.65 –0.1
(5.4)
1 2 3 4 5 6 7
0.5 0.5
View A View B