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A. To simulate and analyze the circuit of a single phase full bridge converter connected to
a 230V(rms), 50 Hz ac supply using the simulation package LTspice with R-L-E load
a. For E=10V, R=1.5, L=80mH observe and document the following waveforms
and values for three values of triggering angles. ( < 900)
(i) Instantaneous output voltage
(ii) Instantaneous input current
(iii) Instantaneous load current
(iv) Average converter output voltage and current in each case
(v) RMS source current in each case
(vi) The source current THD and the input power factor in each case
b. Observe the effect of Load inductance on the load current by varying its value in
the range of 80 mH to 8 mH by retaining other conditions in the circuit same as in
c. Determine the average converter output voltage and load current when the
converter operates in the inverting mode with E = - 100V and  = 120o.
B. To simulate and analyse the effect of source inductance on the source current and voltage
at Point of Common Coupling (PCC)
a. Add 0.5mH source inductance in series with the source and a converter cable
inductance of 0.2mH at the converter input.
b. Observe and document the source current and find the value of commutation
c. Observe and document the voltage waveform at PCC and comment on the shape
and the voltage THD.
The circuit arrangements of a single-phase converter is as shown in the Fig.1 with a
highly inductive load so that the load current is continuous and ripple free. All the thyristors in
the circuit are protected with RC snubbers of a similar type as provided for device T2 for clarity
reasons T1,T3,T4 snubbers are not shown in the figure. During the positive half cycle, thyristors
T1 and T2 are forward biased and when these two thyristors are triggered simultaneously at wt
= α, the load is connected to the input supply through T1 and T2. Due to the inductive load, the
thyristors T1 and T2 will continue to conduct even beyond wt = π even though the input voltage
is already negative.
During the negative half cycle the thyristors T3 and T4 are forward biased and triggering
of these thyristors will apply a reverse bias voltage across the thyristors T1 and T2. Thyristors
T1 and T2 are turned off due to the line commutation or the natural commutation and the load
current will be transferred from T1 and T2 to T3 and T4. The regions of converter operation are
shown in the fig.2.


Fig. 2
large triggering angles makes average load current to fall. Large ‘E’ values in RLE
loads will also make average load current to fall. I both the cases the operation may
become discontinues. So choose the appropriate combination of triggering and E to
obtain the three modes of operations.

The waveforms for input voltage, output voltage, input current and output current are
shown in fig (3).

During the period from α to π, the input voltage and input current are positive and the
power flow from the supply to the load. The duration from π to the π+α input voltage is negative
and the input current remains positive and these results in the reversal of the power flow. These
kinds of converters are extensively used in the industry up to a rating of 15kW. Depending on
the value of α, the average output voltage could be positive or negative and hence it provides 2
– quadrant operation.

The average output voltage can be found from the expression

 
1 2Vm
Vdc 
  V m sin( t )d (t ) 

cos( )

Thus Vdc can be varied from 2Vm/ π to -2Vm/ π by varying the firing angle from 0 to π. The
maximum average output voltage is Vdm= Vm/ π and the normalized output voltage is
The rms value of the output voltage is given by the expression
 1    V
Vrms    (Vm sin(t )) 2 d (t )  m
   2
The output voltage contains harmonics and therefore the conventional definitions of power
factor etc. defined for the pure sinusoidal waveforms cannot be applied.
The input displacement factor is defined as the cosine of the angle between the fundamental of
the input current and the corresponding line to the neutral input voltage.

The input power factor is defined as

Input p.f = Total mean input power / Total rms apparent power
Vrms I1 cos1
Vrms  I rms
I1 cos1
The input power factor can be written as =
I rms



X1 X3 R
1 LS1 20 LS2 21
2 4


0 5
Loads E
X4 X2

Figure 4
Figure 4 shows a practical arrangement with Ls1 and Ls2, where Ls1 is the internal inductance of
the ac source and Ls2 is the inductance associated with the converter. The junction of Ls1 and Ls2
is the called as the point of common coupling where other loads may be connected as shown in
figure 4.
Now, when the ac side inductance is considered, for a given triggering angle, the current
commutation from one se to thyristors to another takes a finite commutation interval. During the
commutation interval, all four devices in the bridge conducts resulting zero converter output
voltage. Thus due to the presence of Ls an additional voltage drop is introduced in the output
In addition to the reduction in output voltage, a thyristor converter also results in line voltage noise
consisting of line notching and waveform distortion. The line notching at the PCC is of concern.
The notch depths and the notch areas are influenced by factor ρ =Ls1/(Ls1+Ls2). Therefore higher
value of Ls2 will result in smaller notches at the PCC.
A.a. E= 10 V, R=1.5, L=80mH
 V0(avg)(V) I0(avg)(A) Is(rms)(A) THD(%) I1(rms)(A) Input PF

b. what is the effect of Load inductance on the load current ripple and source current THD?

What is the value of L at which the load current is just continuous, with the conditions in the circuit
as in aim (a)? What is the corresponding source current THD?

c. In the inverter mode with E= - 100 V, R=1.5, L=80mH,  = 120O

Average Converter output voltage V0(avg) = …………………V

Average converter output current I0(avg)(A) = ……………..A
AC input power = ………………W
DC output power = ………………W
Losses are = ……………..W
The direction of power flow = ………………………………………………………

B. a. Commutation angle observed = …………...o
THD of Voltage at PCC = ………………..%
What is the change in the source current wave shape with source inductance?

Is the voltage at PCC sinusoidal when source inductance is added? What is the change in the wave
shape and what is the lowest order harmonic present in the PCC voltage.

Circuit file for simulation of single phase bridge converter

.PARAM rs= 1000

.param cs=0.2u
Vs 1 0 sin (0 325.26 50Hz)
Vx 1 2 0
V 5 6 10
R 3 4 1.5
L 4 5 80m
Vg1 7 3 pulse (0 10 1m 0 0 100u 20m)
Vg2 10 0 pulse (0 10 1m 0 0 100u 20m)
Vg3 8 3 pulse (0 10 11m 0 0 100u 20m)
Vg4 9 2 pulse (0 10 11m 0 0 100u 20m)
X1 2 3 7 3 SCR
X2 6 0 10 0 SCR
X3 0 3 8 3 SCR
X4 6 2 9 2 SCR
r100 2 100 {rs}
c100 100 3 {cs}
r200 6 200 {rs}
c200 200 0 {cs}
r300 0 300 {rs}
c300 300 3 {cs}
r400 6 400 {rs}
c400 400 2 {cs}
.SUBCKT SCR 1 2 3 2
S1 1 5 6 2 SMOD
Rg 3 4 50
Vx 4 2 DC 0
Vy 5 7 DC 0
Dt 7 2 DMOD
Rt 6 2 1
Cf 6 2 10u
F1 2 6 POLY(2) Vx Vy 0 50 11
.MODEL SMOD VSWITCH(Ron=0.0125 Roff=10E+5 Von=0.5 Voff=0)
.MODEL DMOD D(IS=2.2E-15 BV=1800 TT=0 CJO=0)
.TRAN 100U 360M 300M 10u
.FOUR 50Hz I(Vx)


.PARAM rs= 1000

.param cs=0.2u
Vs 1 0 sin (0 325.26 50Hz)
Vx 21 2 0
LS1 1 20 0.18m
LS2 20 21 0.02m
V 5 6 10
R 3 4 1.5
L 4 5 80m
Vg1 7 3 pulse (0 10 1m 0 0 100u 20m)
Vg2 10 0 pulse (0 10 1m 0 0 100u 20m)
Vg3 8 3 pulse (0 10 11m 0 0 100u 20m)
Vg4 9 2 pulse (0 10 11m 0 0 100u 20m)
X1 2 3 7 3 SCR
X2 6 0 10 0 SCR
X3 0 3 8 3 SCR
X4 6 2 9 2 SCR
r100 2 100 {rs}
c100 100 3 {cs}
r200 6 200 {rs}
c200 200 0 {cs}
r300 0 300 {rs}
c300 300 3 {cs}
r400 6 400 {rs}
c400 400 2 {cs}
.SUBCKT SCR 1 2 3 2
S1 1 5 6 2 SMOD
Rg 3 4 50
Vx 4 2 DC 0
Vy 5 7 DC 0
Dt 7 2 DMOD
Rt 6 2 1
Cf 6 2 10u
F1 2 6 POLY(2) Vx Vy 0 50 11
.MODEL SMOD VSWITCH(Ron=0.0125 Roff=10E+5 Von=0.5 Voff=0)
.MODEL DMOD D(IS=2.2E-15 BV=1800 TT=0 CJO=0)
.TRAN 100U 360M 300M 10u
.FOUR 50Hz I(Vx)

- The conditions in Objective A.a. can be achieved by varying the values of triggering
angles i.e. continuous load current, just continuous and discontinuous load currents.
Carefully vary the value of triggering angle and obtain these three conditions. Every
time when triggering angle is changed run the simulation and observe the load current
and its status.
- Save the instantaneous waveforms of the required quantities with its names
- Use the SPICE built-in tools for RMS, AVERAGE, fundamental magnitudes and phase
and THD calculations
- Power calculations can be performed with traces. On the input side power obtain the
traces of source voltage and source current and use multiplication tool to obtain the
instantaneous power and subsequently perform an average calculation on it will result
in average ac side power delivered.
- For calculating dc side power obtain the traces of load voltage and load current and
follow the same procedure to obtain the average dc power received.

1. The triggering angle at which the load current is continuous is ………………o just
continuous is …………………o and discontinuous is ……………o, with E= 10V, L=80mH
and R=1.5Ω.
2. The average power delivered to ac mains in the inverter mode with =120o, E = - 100 V is
………………..W, the losses account for …………….W.
3. The average power delivered to ac mains in the inverter mode with =120o, E = - 100 V is
………………..W, the losses accounts for …………….W.
4. With a source inductances of 0.5 mH and 0.2 mH, the commutation angle is ……………… o
and the THDVPCC = ……………%

Components Maximum Obtained

Marks Marks
Viva 20
Conduction 10
Graph and Results 15
Inference 15
Total 60

A brief introduction to the thyristor modeling and the use of sub-circuits is given below:
The sub-circuit permits the user to define a block of circuitry and then use the block in several
places in the circuit under simulation. The syntax for the sub-circuit is
.SUBCIRCUIT subcktname [<two or more nodes>]
The spice symbol used for representing the sub-circuit is X the general statement call is of the
X<name> [two or more nodes] subcktname
The usage of sub-circuit in Pspice may be considered similar to the usage of “Subroutines” in
FORTRAN or usage of “function calls” in C. The sub-circuits in Pspice can be nested but must
not be circular or recursive.
A sub-circuit must end with a ENDS statement.
.ENDS subcktname
The Thyristor model:
If our analysis does not concern with any particular thyristor type and if our intention is
to study the general behavior of the circuit then we can use a simple and approximate model of
a thyristor.
The thyristor is a latching device and it can be modeled by a voltage-controlled switch
and a polynomial current source as shown in the fig.2.

gate Anode
3 1 A
Vg 0v Vr
0v C1

D1 cathode
2 K

Rr Cr

We take the essential thyristor action to be

1) It should turn on with a small positive gate to cathode voltage if the anode to cathode
voltage is positive.
2) It should remain in the on state as long as anode current is positive.
3) It should turn off if anode current changes to negative direction.
In the statement for current controlled current source F we have used a polynomial source.
The general syntax from a polynomial source controlled by ‘n’ controlling variables is
POLY(n)<controlling nodes +ve and –ve> < co-efficient values>
If we take an example of a polynomial source controlled by two variables A and B, then
Y takes the form Y=P0+P1A+P2B+P3A2+P4AB+P5B2+…….
Therefore in our example if we have written
F1 2 6 POLY(2) VX VY 0 50 11
It means that a CCCS is connected between the nodes 2 (+ve) and 6(-ve) an it behaves like a
polynomial with two controlling variables (POLY(2)) current through VX and VY. The
polynomial function is
All the other statements are simple and for the elements used in the subcircuit. The voltage-
controlled switch and the diode are modeled using the MODEL statement.

A voltage-controlled switch and a polynomial current source can model the switching action
of the thyristor. The following steps can explain the turn on process:
1. For a +ve gate voltage Vg between nodes 3 and 2, the gate current is Ig = I (VX) =
2. The gate current Ig activates the CCCS F1 and produces a current of value Fg=P1
Ig=P1I(VX), such that F1=Fg+Fa.
3. The current source Fg produces a rapidly rising voltage VR across the resistance RT.
4. As the voltage VR increases above zero, the resistance Rs of the voltage controlled
switch S1 decreases from ROFF towards RON.
5. As the switch resistance Rs decreases the anode current Ia = I(VY) increases, provided
that the anode to cathode voltage is +ve. This increasing anode current Ia produces a
current Fa=P2Ia=P2I(VY). This cause an increased value of voltage VR.
6. This then produces a regenerative condition with the switch rapidly being driven into
low resistance (the ON state). The switch remains on if the gate voltage Vg is removed.
7. The anode current Ia continues to flow as long as it is +ve and the switch remain in the
ON state.
During turn-off the gate current is OFF and Ig=0. That is Ig=0 and Fg=0, F1=Fg+Fg=Fg. The
following steps can explain the turn – off operation:
1. As the anode current Ia goes –ve, the current F1 reverses provided that gate voltage Vg
is no longer present.
2. With a –ve F1, the capacitor CT discharges through the current source F1 and the
resistance RT.
3. With the fall of voltage VR to a low level, the resistance Rs of the switch S1 from a low
(RON) value to a high (ROFF) value.
4. This is again a regenerative condition with the switch resistance being driven rapidly to
an ROFF value as the voltage VR becomes zero.
The diode DT prevents reverse current flow through the thyristor resulting from the firing of
another thyristor in the circuit.
For detailed information on the modeling and sub circuit parameters refer the book “SPICE
The above experiment requires additional reading of Pspice manuals. The program
description given above should be substituted by the actual program and detailed description
by the students. The waveforms obtained should be submitted as printouts and the program
listing along with Fourier analysis results should also be submitted.
PSPICE is a general-purpose circuit program is extensively used to simulate Electrical
and Electronic circuits. Spice is a short form of “Simulation Program with Integrated Circuit
Emphasis” Spice is extensively used for initial design validation and analysis.
The circuit has to be described in terms of Element names, Element values, nodes, variable
parameters, description etc.
Taking an example of the circuit given fig.4, we want to find the voltage across the capacitor
C1 .

1 R1 2 R3
100 100

R2 C1

100 10u

0 0
Fig.4 fig. A

VDC 1 0 DC 10
R1 1 2 100
R2 2 3 100
C1 3 0 10u ic=5
R3 2 0 100k
.TRAN 10u 100m uic
The first line of the program is reserved for comments and is not processed during execution.
The DC voltage source is named VDC and is connected between the nodes 1 and 0 with
positive terminal at node 1 and negative terminal at node 0. Additionally we specify that it is a
dc source with a value of 10V.
The elements R1, R2, C1, R3 are mentioned with their respective nodes and values. These
passive elements can be connected in any order. For the capacitor additional information
regarding its initial charge is provided as “ic=5” which indicates that the capacitor is initially
charged to a potential of 5V before analysis begins.
PSPICE command “.PROBE” loads a program PROBE.EXE which imitates the CRO
probe. This program enables the current and voltage waveforms to be graphically presented on
the computer screen.
The command “.TRAN” indicates that transient analysis is to be done with the total
times span of 100ms with a sampling period of 10s. Depending on the circuit parameters, spice
may override our sampling period specification.
Various devices are modeled and they are available in a library file “EVAL.LIB”
Additional information on spice can be obtained from various textbooks.