CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 1 OF 16

EXPERIMENT 1 : DIODE CLIPPING CIRCUITS

Aim : To study and test the application of diode in clipper circuits

a. Simple positive and negative shunt clipper

b. Simple positive and negative series clipper
c. Biased positive and negative shunt clipper
d. Combination shunt clipper

Components & Equipments required: Bread Board, Resistor 0.5W ( 1no), Diode ( 2 no – 1N 4002 /eqt),

Regulated dual DC power supply (1no- 0 to 30V dc), Signal generator ( 1no – 10 Hz to 1MHz), Two channel CRO with
X-Y feature, Multimeter, Probes , Wires (As required)

Theory: Clipping circuits are used to select and transmit a part of the given waveform. The other parts of the
waveform are clipped or removed by the diode clipper circuit. These circuits are also known as voltage or current
limiters, amplitude selectors or slicers.
The piecewise linear model of diode characteristic exhibits a discontinuity in slope at the cut off voltage Vk. and this
point of slope discontinuity is called a break point. For silicon diode the break point occurs at VK ~ 0.7V. This concept
can be used to explain the transfer characteristics of a clipper circuit, which is a plot of output voltage against the input
voltage.

Design: The limiting resistor R in the circuit can be designed in the following manner. From the diode forward and
reverse characteristics, the resistance in either direction can be determined, respectively, as R f and Rr. It can be
shown that limiting resistor R = RfRr . The ratio Rr/Rf can be called the figure of merit of the diode. From V-I
characteristics of diode, we have Rf= 20 Ω and Rr = 1 MΩ. From these values, limiting resistor required is R = 3.3 KΩ
(std), ½ watt and we can use 1KΩ to 5K Ω.

Procedure:

1. Study the circuit, expected waveform and transfer characteristic.

2. Place the components on bread board or connection board and connect them as per given circuit diagram.
Use wires for connection as required.
3. Switch on the signal generator and set voltage to 10V P-P and frequency to 1kHz ,
4. Set DC voltage to 2 V in case of biased circuits
5. Connect the input and output of the circuit to the two channels of the CRO. Observe the input and output ( in
DC mode only) waveforms.
6. Measure the voltage amplitude, clipping voltage using CRO. Keep CRO setting in XY mode and observe the
transfer characteristic.
7. Note down the waveforms on work sheet. (If required use additional sheet)
8. Repeat this for all clipping circuits.

Result:

Clipper circuits have been tested and out put wave forms match with the expected waveforms.

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 2 OF 16
Vin
Work Sheet:-
Vo

t
Vo

t Vin

Component Values:-

Vin

t Vo

Vo

Component Values:-

t Vin

Vin

t
Vo

Component Values:-
Vo

t Vin

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 3 OF 16
Vin

t
Vo

Vo

t Vin
Component Values:-

Biased Clipping circuits Vin

Vo

Vo

Component Values:-
t Vin

Vin

Vo

Vo
Component Values:-

t
Vin

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

 CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 4 OF 16

Vin

t Vo

Vo

Component Values:-
t Vin

Vin

t
Vo

Vo

t
Vin
Component Values:-

Vin

Vo

Component Values:-
Vo

Name & USN of student :-

Staff sign with date:- t

Vin
Marks:-

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 5 OF 16

EXPERIMENT 2 : DIODE CLAMPING CIRCUITS

Aim: To study and test the application of diode in clamper circuits.

1. Positive clamper
2. Negative clamper
3. Biased positive clampers
4. Biased negative clampers

Components & Equipments required: Bread Board, Resistor 0.5W ( 1no), Diode ( 2 no – 1N 4002 /eqt),

Capacitor ( 1no –non electrolytic) ,Regulated DC power supply (1no- 0 to 30V dc), Signal generator ( 1no – 10 Hz to
1MHz), Two channel CRO with X-Y feature, Multimeter, Probes , Wires (As required)

Theory : Clamper is a circuit that "clamps" a signal to a different DC level without changing the shape of the applied
signal Clamping circuit introduces a DC level into an ac signal. The different types of clampers are positive, negative
and biased clampers. A clamping network must have a capacitor, a diode and a load resistor. The magnitude R and
C must be chosen such that the time constant RC is large enough to ensure that the voltage across the capacitor does
not discharge significantly during the interval when the diode is non- conducting. By connecting suitable DC voltage in
series with the diode, clamping level can be varied.

Design: Assume C, and for clamping to occur select R such that RC >> T, (Assume RC = 100 T) where T is the
period of the input signal.

If C = 1uF, then from above equation R= 100K.

Procedure:

1. Study the circuit, expected waveform and transfer characteristic.

2. Place the components on bread board /connection board and connect them as given in circuit diagram
fig 1a. Use the wires for connection as required.
3. Switch on the signal generator and set voltage to 10V P-P and frequency to 1kHz
4. Set DC voltage to 0 V DC (Positive clamping).
5. Connect the input and output of the circuit to the two channels of the CRO. Observe the input and output
waveforms( in DC mode only) and ensures that it matches with expected wave form.
6. Vary the DC voltage and observe the level of clamping.
7. Set VDC to 2V and note down input & output waveform and draw it on work sheet (Positive Biased
Clamping) .If required use additional graph sheet.
8. Reverse the polarity of the Vdc and repeat the steps 6& 7.(fig 1b)
9. Repeat the procedure for fig 2a & 2b and note down the waveforms.

Result:

Positive and Negative clamping circuits and biased clamping circuits are tested and output waveforms observed.

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 6 OF 16

Vin
Work sheet

Vo

When Vdc = 0V
t

Vo

When Vdc = 2V
Fig 1a:- Positive Clamper Circuit t

Component Values:-

Vin

Vo

When Vdc = 0V
t

Fig 1b:- Positive Clamper Circuit Vo

When Vdc = 2V

Component Values

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 7 OF 16

Vin

Vo

When Vdc = 0V
t

Vo
Fig 2a:- Negative Clamper Circuit
When Vdc = 2V
Component Values
t

Vin

Vo

t
When Vdc = 0V

Vo
Fig 2b:- Negative Clamper Circuit

Component Values:-
t
When Vdc = 2V
Name & USN no. of student:-

Staff sign with date:-

Marks :-

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 8 OF 16

EXPERIMENT 3 : SINGLE STAGE CE AMPLIFIERS

Aim :- To design an RC coupled single stage BJT amplifier and to determine

i)Frequency response, ii)Input impedance, iii)Output impedance

Components & Equipments required:- Bread board, resistors ( 4nos as per design), capacitors (3nos as per
design), NPN Transistor (1no SL 100 or eqt) Regulated DC supply ( 0-30V dc,1no.), Signal generator(10Hz to 1
MHz), Decade Resistor Box( 0 to 1Meg ohm), CRO, multimeter, wires, probes.

Theory :- :- In RC coupled amplifier the input capacitor is used to couple the input signal to the base of first transistor.
Since the coupling from one stage to next stage can be achieved by a coupling capacitor followed by a connection to a
shunt resistor such amplifiers are called resistance capacitance (RC) coupled amplifiers. When an ac signal is applied
to the input of the first stage it is amplified with a phase reversal by the transistor. The frequency response is a graph
of the gain (in decibels) versus the frequency (in logarithmic scale). This characteristic can be subdivided into low,
medium and high frequency regions. In the low frequency range, the gain drops due to increasing reactance of
coupling capacitor, source capacitance and emitter capacitor. As the frequency increases, the capacitive reactance
reduces and the gain increases. After this if the frequency is increased further, i.e. in the high frequency range, the
gain drops due to the increased flow of the a.c signal through CE. To fix the boundaries of frequency where the gain is
relatively high and constant, 0.707Amid is chosen to be the voltage gain at the cut-off levels. The corresponding
frequencies f1 and f2 are generally called the corner, cut-off, band, break or half power frequencies. The multiplier
0.707 is chosen because at this level the output power is half the mid-band power output. This is illustrated in the
model graph.

Procedure:-

10. Draw and study the circuit,

11. Place the components on bread board and connect them as per given fig a. Note: Measure the DC
values of VCE, VBE and ensure that they are close to the designed values, before connecting the
function generator, coupling capacitors and bypass capacitors.

3. To find gain – frequency response:

1. Connect the signal generator and apply a sine wave of peak-to-peak amplitude 50mV, 1kHz . Connect
input and output (Vo) of the circuit to the two channels of CRO. And observe the waveforms. The input
and output waveforms should be undistorted. Note down the peak to peak amplitude of Vin and Vout.
Calculate Voltage gain for maximum undistorted output , Avm = Vo/Vi
2. Vary the FREQUENCY of the input sine wave (keeping the amplitude constant) stepwise – from 100HZ
to 1MHZ..
3. Note down the output peak to peak amplitude Vo for every frequency of the input.
4. Calculate the gain = output to input ratio (Vo / Vin ) for every value of the input frequency.
5. Calculate the gain in dB for each of the above readings: Gain in dB = 20 log (Vo / Vin)
6. Tabulate the readings as per frequency –response Table
7. Plot the Gain in db versus frequency plot on the sem log graph.
8. Draw a horizontal line 3 db below the Avmid and note down the lower & upper cutoff frequency

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 9 OF 16

Model Frequency response Curve :-

Gain

in dB
Avmid
3dB

Frequency
f1 Bandwidth f2

X axis is in log scale; Y axis is in normal scale

f1 – Lower cut-off frequency

f2 – Higher cut-off frequency

f2-f1 – Band width of the amplifier

4. To find input impedance
3dB - 20log10(0.707)
1. Connect as given in fig b with DRB resistance zero. Adjust the input Vin to 50 mV. (Let the
frequency of the input be around 5kHZ )
2. Note down the peak to peak amplitude of the corresponding output Vo . Let Vo=Va
3. Increase the resistance included in DRB and observe the magnitude of the output Vo
simultaneously on the Oscilloscope.
4. When the magnitude of the output Vo is reduced to half of its original value, stop varying the
resistance further and remove the potentiometer from the circuit. Vo=Va/2
5. Measure the value of the DRB and this measured value will be the input impedance ( Ri) of the
circuit.
.5. To find output impedance:

1. Adjust the input sinusoidal peak to peak in such a way that the output sine wave is not clipped.
2. Note down this value of the input Vin. (Let the frequency of the input be around 2kHZ)
3. Note down the peak to peak amplitude of the corresponding output Vo . Let Vo=Va
4. Connect a DRB ( with maximum resistance included)at the output as shown in fig c.
5. Decrease the DRB / potentiometer and observe the magnitude of the output Vo simultaneously on the
Oscilloscope.
6. When the magnitude of the output Vo is reduced to half of its original value, stop varying the
potentiometer further and remove the potentiometer from the circuit. Vo=Va/2
7. Measure the value of the DRB/ potentiometer and this measured value will be the output impedance
( Ro) of the circuit.

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 10 OF 16

Result:- The single stage CE amplifier was designed and its performance verified. The output waveform is in 180°
phase shifted with input signal.

The readings obtained are given below:-

Voltage Gain =

Bandwidth =

Gain-Bandwidth product =

Input Resistance =

Output Resistance =

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 11 OF 16

Work Sheet

Circuit diagram:-

Design:-

Bias circuit design:

Given: VCC = 10V ,VCE = 5V, IC = 2mA  = 100

(assumed)

Assume VBE = 0.7V for silicon diodes

VE = 10% of Vcc = 1V

Assume IE ~ IC

RE = VE /IE = 1V/ 2mA = 500Ω

( Use 180 Ω +330Ω in series)

Rc = (Vcc- VCE -VE) / IC =( 10-5-1 ) / 2mA = 2 k ohm.( Use 2.2kΩ)

V R2 =V B = VE + VBE = 1+0.7 = 1.7V

βR E ≥ 10 R 2 ,

R 2< (βR E)/10 < 5kΩ ( Use 4.7k)

VR1 = Vcc – V2 = 10-1.7= 8.3V

As I1≈I2 , I2 = 1.7V/4.7K =0.36mA

R1 = V1/ I1= 22.9kΩ ( use 22 kΩ)

Use capacitor CE as 22 uF , CC1 and CC2 as 1 uF

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 12 OF 16

Observation:-

I. Biasing values VCE= VBE = VRC= So Ic = VRC / Rc =

II. Set Vin = Undistorted Max Vout ( from the CRO) =

Avm = Vout/Vin =

From the graph, f1 = f2 =

Bandwidth (BW) = f2 - f1 = Gain bandwidth(GBW) = Avm * BW =

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 13 OF 16

III Frequency Response:- Table 1 – Frequency response measurement

Vin = ------- Volts ( Peak to Peak)

Input freq Vo (p-p) Av=(Vo/Vin Avdb=20log(Av ) Input freq Vo (p-p) Av=(Vo/Vin) Avdb=20log(Av)

10 Hz 7 kHz

20 Hz 8 kHz

30Hz 9 kHz

40Hz 10 kHz

60 Hz 20kHz

70Hz 30kHz

80Hz 40kHz

90Hz 50kHz

100 Hz 60kHz

200Hz 70kHz

300Hz 80kHz

400 Hz 90kHz

500Hz 100kHz

600Hz 200kHz

700Hz 300kHz

800Hz 400kHz

900Hz 500kHz

1 kHz 600kHz

2 kHz 700kHz

3 kHz 800kHz

4 kHz 900kHz

5 kHz 1MHz

6 kHz 2MHz

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 14 OF 16

Measurement of Input impedance:-

DRB or POT

Single stage RC coupled

Vo
Vin amplifier circuit.

Fig b

Vo when resistance of DRB is zero , Va =

Va/2 =

Resistance of DRB when Vo is equal to Va/2 =

Measurement of Output impedance:-

Single stage RC coupled

DRB Vo
Vin amplifier circuit.

Fig c

Vo when resistance of DRB is max , Vb =

Vb/2 =

Resistance of DRB when Vo is equal to Vb/2 =

Name & USN of student:-

Staff sign with date:-

Marks:-

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 15 OF 16

EXPERIMENT 4 : RELAY DRIVER CIRCUIT

Aim :- To design & verification of transistor to drive the given relay

Components & Equipments required : Breadboard, Resistors ( 3nos as per design), NPN transistor ( SL 100 /eqt) ,
1N 4002/eqt diode, an LED(optional), Regulated DC supply, Signal generator ,Multimeter, Probes, wires

Theory :-

Basically relay is an electrically operated switch and are used to switch

high loads or loads that needs ac current as per low power control signal.
Relay driver circuit is used to drive a relay coil from a low power signal
(output from a controller) usually from an IC like 555 or a TTL/CMOS or
processors. The relay will be actuated when the input of the circuit goes
high. The protection diode D is used to protect the transistor from the
reverse current generated from the coil of the relay during the switch off
time. The values for Rb has to be designed to drive transistor in
switching mode.

First we calculate the load current:

IL = Vcc / RL

Then we calculate the transistor hFE. It must be at least 5 times the load current IL divided by the maximum output
current from the Input to the base of the transistor

Procedure:-

1. Measure the resistance of relay and design the RB value accordingly.

2. Rig up circuit on bread board using wires as per given circuit. Connect an ohmmeter across the Normally
open (NO) contact of the relay which is not connected to LED circuit. It will show very high resistance
close to infinity.
3. Switch on Vcc and measure the voltage VCE, voltage across Relay coil. And ensure that relay is not
energized and observe that LED1 is ON and LED2 is OFF
4. Set Vin supply to 5V and switch on, and observe the relay energizes and ohm meter connected across
NO contact shows zero resistance and LED2 becomes ON and LED1 goes off
5. The relay on & off operation can be checked by switching on & Off of Vin supply
6. Find Ic and Ib current when relay is ON
Note:- If only one set of relay contacts are available, relay operation can be checked either by using ohm meter
or LED circuit. DO NOT measure resistance across contacts where LED circuit is connected

Result:- It is verified that Relay can be switched on & off by the control circuit operation.

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,

 CYCLE-1 EXPERIMENTS (1 TO 4) PAGE 16 OF 16

Work sheet:-

Circuit diagram:-

Design:-

Relay resistance RL≈ 250 Ω

Load current or Transistor collector current

Icmax = Vcc /RL =12V/250 Ω =48mA

Take Base current as 20% higher than IB sat

IB= 1.2*Ic / hFE min = 1.2*48mA /70 = 823uA

RB= Vin -VBE / IB = (5-0.7)/823uA = 5.2K Take as RB 4.7 k

Verification of relay operation:-

When Vin is off, VCE = Vrcoil= Resistance across NO contact (where LED is not connected) =

Ic =Vrc/Rcoil= (LED ON/OFF):- LED1 -------------------LED2 --------------------

When Vin is off, VCE = Vrcoil= Resistance across NO contact (where LED is not connected) =
Ic =Vrc/Rcoil= (LED ON/OFF):- LED1 -------------------LED2 --------------------

Name & USN of student:-

Staff sign with date:-

Marks:-

Staff :- KRS , 3rd Sem Telecommunication Department, Session :- Aug10-Dec10,