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Customer Applications Support and

Reliability Test Center

PBGA Customer Presentation

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Presentation

! PBGA Introduction and Package Description


! PC Board Design for PBGA
! PBGA Assembly
! PBGA Solder Joint Voids
! Rework
! Reliability

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Introduction and Package Description

Typical Plastic Ball Grid Array


(357 Pin, 1.27 mm Pitch, 19x19 Array Shown)

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
WB PBGA Construction (Cont.)

Typical Perimeter PBGA with Thermal Balls


(272 Pin, 4 Perimeter Row, 20x20
Array,1.27 mm Pitch, 27 mm Body Shown)

Thermal Balls
Perimeter Balls

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Introduction and Package Description

Advantages of BGA over QFP


! Assembly yield
! Significantly better than QFP devices (<5 ppmj vs. 50-100 ppmj)
" Why?
# No bent leads or coplanarity problems
# Self aligning on solder pads
# Solder balls are always solderable (unlike plated leads)
# Easy solder paste printing
# Large pitch: 1.5 mm (59.06 mils), 1.27 mm (50 mil),
# Large ball diameter sizes: PBGA 30 mils (0.762 mm)

! Ordinary SMT board assembly process


! Almost no inspection if process is well characterized
! Compatible with most existing SMT assembly equipment
! Large advantage in board real estate savings.
! Many electrical and thermal advantages.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Introduction and Package Description

Key Points: Assembly yield

200

150 .5mm pitch PQFP

.65mm pitch PQFP


PPM
100
J 85 85 IBM data
80
60 COMPAQ
50 data
20 30
15 < 5 CBGA (IBM)
< 0.5 PBGA (COMPAQ )

1991 1992

! Source: IBM and COMPAQ; “Workshop on Ball Grid Arrays & Advanced
Packaging”; 30 August 1993, Sunnyvale, CA.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Introduction and Package Description

! Many Advantages of PBGA Over Leaded Devices.


– Reduction in board space required for a given pin count.

b b b
160 Pin 304 Pin
240 Pin
28 mm Body 40 mm Body
32 mm Body
0.65 mm Pitch 0.50 mm Pitch
0.50 mm Pitch

169 Pin 225 Pin 357 Pin


22 mm Body 27 mm Body 25 mm Body
1.5 mm Pitch 1.50 mm Pitch 1.27 mm Pitch

Area Reduction 2.0X 1.7X 3.0X Body+Leads

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PBGA Introduction and Package Description

Power Paths and Switching Noise


Lower Inductance in Power Supply paths
Means Lower Switching Noise

Vdd plane
Vss plane
capacitor

Path ~12 mm: many parallel


Path ~3.5 mm: paths through reference
Low Inductance planes: Low Inductance

40 mm perimeter leaded package

Path ~ 20mm less coupled to signal currents resulting in higher inductance

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Introduction and Package Description

Key Points: BGA Solder Balls


! PBGA: 62/36/2 Sn/Pb/Ag (“low temp”)
! CBGA: 10/90 Sn/Pb (“high temp”)
! “Low temp” balls reflow and collapse
! Collapse is controlled by pad geometries on
package & PWB, and surface tension of the
solder
! “High temp” balls do not reflow
! Solder paste printed on PWB wets to ball with no
collapse of ball
! Provides taller solder joint
BBB
a) CBGA Ceramic Substrate
Ceramic b) B T
B T
Resin Substrate
PBGA Organic Package
Ceramic
Resin Package

90/10 Pb/Sn ball


35-mil diameter Eutectic Sn/Pb

62Sn/36Pb/2Ag

PWB Printed Wiring Board PWB

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PBGA Introduction and Package Description

256 PBGA Construction


Silicon Die
-7 mm Square Au Bond Wires Silica-Filled
Ag-Filled Die Attach Epoxy Overmold
Thermal and/or
Ground Vias
BT/Glass PCB with
LPI Soldermask
1.20 mm
0.56 mm BT PCB

Stand-Off (Varies
with Pad Size and 1.27 mm Routing Vias
Solder Paste Vol.) Pitch
Solder Pads (SMD Pads
62Sn/36Pb/2Ag on PBGA-Either on PCB)
Solder Ball
Motherboard
(Typically FR4/Glass)

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Overall Summary

! BGA: Ideal interconnect technology


! Using solder balls as leads
" Provides perfect self alignment.
" Allows large tolerance in placement accuracy.
" Not subject to handling damage.
" Lead coplanarity issues eliminated
" Allows high number of I/O connections with large pitch.
# Large savings in board real-estate
" Electrical and thermal advantages.
! Manufacturing processes simplified.
! Manufacturing equipment demands less stringent.
! Manufacturing yields dramatically improved.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Presentation

! PBGA Introduction and Package Description


! PC Board Design for PBGA
! Solder Pads
! Trace Routing

! PBGA Assembly
! PBGA Solder Joint Voids
! Rework
! Reliability

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PC Board Design for PBGA

! Package Ball Pitch PCB Pad Size Stencil Opening


1.5 mm (59.06 mils) 0.635 mm (25 mils) Same
1.27 mm (50 mils) 0.584 mm (23 mils) as
1.0 mm (39.37 mils) 0.5 to 0.4 mm (20 to 16 mils) Pad
0.8 mm (31.496 mils) 0.28 mm (11 mils) Size

! PC board pad pitch must be designed in hard metric.


! Small errors repeated

! Solder mask
! May be used to define contact pads

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PC Board Design for PBGA

SMD = Soldermask Defined NSMD = Non-Soldermask Defined


Advantages Advantages
1. No point of stress concentration or
1. Strongest mechanical strength
solder mask CTE mismatch at PC board
2. More copper, better heat spreading to board
2. More space to route traces between
3. More heat resistant—multiple rework
pads
3. Built in x-ray tab

Disadvantages Disadvantages
1. Potential Stress point
2. Foreign matter entrapment on pad 1. Reduced pad to board adhesion
3. Generally poor dimensional tolerance on actual strength
solderable opening 2. May be weak link in other mechanical
testing, i.e. board bending, mechanical shock
and vibration
3. Non symmetrical joint fails at the package
interface first

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PC Board Design for PBGA

Solder Joint Shapes

SMD pads SMD pads on NSMD pads on


on package package. package and
and board NSMD pads on board
board
! Best long term reliability in a severe temp cycling environment, should
be: Non Solder Mask Defined pads.
! Packages presently have solder mask defined pads
" Strongest mechanical strength
" Not necessarily best in severe temp cycle application

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PC Board Design for PBGA

Recommended PCB Solder Pad for PBGA


1.0 mm
Non Soldermask Defined (NSMD) Pad
Finished Dimensions After Etching
0.25 mm (10 mil) finished plated through hole
0.5 mm (20 mil) Annular Pad
0.3+ mm (12+ mil) wide line between pads with fillet
via where the trace attaches to the pad.
Photoimageable Solder Mask

0.5 mm (20 mil) copper


solder pad
0.076± .025 mm ( 3±1 mil) Clearance between copper pad
and soldermask

solder pad solder mask


via

Cross Section PCB


laminate Note: Finished Dimensions After Processing Bare Board

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PC Board Design for PBGA

Optional PCB Solder Pad for PBGA


1.0 mm
Soldermask Defined (SMD) Pad
Via Features
0.25mm (10 mil) finished plated through hole
0.5 mm (20 mil) Annular Pad
via 0.3+ mm (12+ mil) line width between pads

0.5 mm (20 mil) soldermask opening

solder pad
Copper pad
0.635-0.8 mm (25-31 mil)
Photoimageable Solder Mask

solder pad soldermask over


copper pad
via
PCB laminate

Cross Section Note: Finished Dimensions After Processing Bare Board

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PC Board Design for PBGA

Recommended PCB Solder Pad for PBGA


1.27 mm
Non Soldermask Defined (NSMD) Pad
Finished Dimensions After Etching
0.3 mm (12 mil) finished plated through hole
0.635 mm (25 mil) Annular Pad
0.3+ mm (12+ mil) wide line between pads with fillet
via where the trace attaches to the pad.
Photoimageable Solder Mask

0.584 mm (23 mil) copper


solder pad
0.076± .025 mm ( 3±1 mil) Clearance between copper pad
and soldermask

solder pad solder mask


via

Cross Section PCB


laminate Note: Finished Dimensions After Processing Bare Board

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PC Board Design for PBGA

Optional PCB Solder Pad for PBGA


1.27 mm
Soldermask Defined (SMD) Pad
Via Features
0.3mm (12 mil) finished plated through hole
0.635 mm (25 mil) Annular Pad
via 0.3+ mm (12+ mil) line width between pads

0.584 mm (23 mil) soldermask opening

solder pad
Copper pad
0.7-0.85 mm (28-33 mil)
Photoimageable Solder Mask

solder pad soldermask over


copper pad
via
PCB laminate

Cross Section Note: Finished Dimensions After Processing Bare Board

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PC Board Design for PBGA

Soldermask Clearance
Soldermask Overlap

SMD Pad NSMD Pad


Comparison of Motherboard SMD and NSMD Hot Air Solder
Leveled (HASL) Solder Pads of Equal Solderable Surface
Diameter. Note Excellent Soldermask to Artwork Registration.
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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PC Board Design for PBGA

Standard SMD Pads on PBGA

SMD Pads on Board NSMD Pads on Board


SMD = Soldermask Defined
NSMD = Non-Soldermask Defined

SMD Pad NSMD Pad

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PC Board Design for PBGA

256 BGA 2 Layer Trace Routing

Solder Joining Pad


Plated Thru Hole via

0.152 mm line (6 mil),

Top Surface Footprint


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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PC Board Design for PBGA

256 BGA 2 Layer Trace Routing

Signal via
Power or Ground via
0.152 mm line (6 mil)

Subsurface Vias

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Presentation

! PBGA Introduction and Package Description


! PC Board Design for PBGA
! PBGA Assembly
! Pre-assembly Handling
! Placement and Reflow
! Secondary Reflow
! Cleaning and Inspection

! PBGA Solder Joint Voids


! Rework
! Reliability

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Assembly
Pre-assembly Handling
PBGA Moisture Sensitivity
! Many PBGAs are moisture sensitive, just as Plastic QFP
packages
! Follow Moisture Sensitivity guidelines printed on the
package labels
JEDEC MOISTURE LEVEL TABLE Time allowed out of Drypack
before a rebake is required
Level Condition Time
1 30°C/85% RH Unlimited
2 30°C/60% RH 1 year
2a 30°C/60% RH 4 weeks
3 30°C/60% RH 168 hours
4 30°C/60% RH 72 hours
5 30°C/60% RH 48 hours
5a 30°C/60% RH 24 hours
6 30°C/60% RH Time on Label
J-STD-020C
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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Assembly

Delaminated PBGA vs. PQFP

PBGA

Wire Bond

PQFP

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Assembly

Avoiding Package Delamination


! Follow instructions on shipping container
! Establish strict process control and procedures to insure
safe operation conditions.
! Use dry nitrogen cabinets to store devices after opening
packages
! Rework boards within time allowed in room environment

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PC Board Design for PBGA

Solder Paste
!Stencil thickness can be anything from 5 to 10 mils thick.
!Openings, same as pad sizes
!Large round holes print easily
!Print accuracy
"± 5 mils print registration, with no paste touching other exposed
metalization.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Assembly

Placement
! Most newer vision systems can use solder balls
for alignment.
!Most vendors of older equipment are working on
retrofits.

! No vision required with mechanical centering


device.
!Place in vibratory nest, or on precisor stand,
then pick from that “known” pick up point.
MC6818C01
! Loose requirement for accuracy: Half the ATX8DE
9531
diameter of the solder ball, compared to ±4 mils
for 20 mil pitch.
! BGAs (both PBGA and CBGA) perfectly self
center in reflow.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Assembly

Reflow
! Recommended profile: 210-215° C peak, 75 seconds above 183° C. (any
standard surface mount reflow profile)
! Follow guidelines recommended by Solder paste vendor
! Flux requirements must be met for best solderability
! Temperature profile should be carefully characterized to insure uniform
temperature across the board and package.
! Solder ball voiding may be affected by ramp rates and dwell time below and
above liquidus.
! Nitrogen not required, but will make the process even more robust, and can
make big difference in the case of marginal solderability of PC board pads.
! Full convection forced air furnaces work best, but IR, convection/IR or vapor
phase can be used.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Assembly

Thermocouple Selection and


Attachment

! Use new, fine gage, calibrated, welded thermocouple beads.


! 36 gage wire preferable.

! Hand twisted thermocouple wires can cause inaccurate readings.


! Temperature will be taken at first good contact twist or shared with
several contact points.
! For PBGA, thread thermocouple between balls so actual
thermocouple weld is in center of package (between board and
package).
! Use Kapton tape to hold wire in place.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Assembly

Thermocouple Attachment - Alternate Method:


Especially For CBGA

! Before soldering parts on profile board


! Drill hole in PC board (just large enough for thermocouple
wire) through a solder pad in the center of the CBGA site.

! Assemble all components and reflow by normal method.


! Using same drill bit, drill into ball, about 20 mils deep.
! Use small amount of thermally conductive epoxy to fix
thermocouple weld into center of solder ball, (the exact point of
critical temperature).

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Assembly

Thermocouple attachment inside solder ball

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Assembly

Secondary Reflow
! A Wave Solder operation is often required after Surface Mount devices have been
soldered on the board.
! Reflow of BGA solder joints in this secondary operation must be avoided.
! The result can be open BGA solder joints
" PBGAs are low thermal mass packages (get hot fast)
" The large number of plated through holes transmit heat
rapidly
" When heated from bottom only, PBGAs may warp
# Bow up on outside edge due to expansionTend to
flatten in surface mount reflow with uniform heat (Mold temp
180° C)
# Coplanarity may be so great, solder joints separate

PBGA Through-Hole
Vias

Plated through holes SMT


blocked

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Assembly

Avoiding Secondary Reflow


! Optimize wave solder operation to minimize heat to BGA
! Design Wave solder pallet to block solder from BGA area
! Block heat transfer through BGA vias by filling or tenting with
solder mask on bottom of board
! Not desirable from test standpoint
" Eliminates direct test contact
! Use Perimeter Array packages and have no via closer than 200
mils from solder ball pads.
! Apply Kapton tape to BGA area
! Undesirable hand operation
! Redesign board for Surface Mount devices only
! Eliminates wave solder operation
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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Assembly

Cleaning
! The industry is moving to no clean flux, but due to large pitch and high
standoff, any conventional cleaning process can be used.
! Insure spray nozzles direct flow at an angle to clean under the part.

Inspection
! External solder joints can be visually inspected. If uniform reflow
temperature is maintained, and outer joints look good, the internal joints
will be good.
! Internal solder joints can be inspected by X-ray.
! The entire assembly process should be carefully characterized;
then, due to the very high yielding nature of the product, solder
joint inspection can be eliminated.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Assembly

Key Points for Special Effort in


Characterization to avoid rework
! Bare board quality
! Solderable pads
! Mask not encroaching on pads areas
! Solder paste printing
! Can’t make good joints if there is missing solder paste.
! Use auto inspection if available
" Six pads, four corners and two across middle.
! Solder reflow process
! Carefully profile with loaded board.
" Insure minimum delta of temperature between middle and corners of
BGA.
! Insure test programs do not subject BGA to being falsely blamed for
electrical faults.

TM Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product
or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Presentation

! PBGA Introduction and Package Description


! PC Board Design for PBGA
! PBGA Assembly
! PBGA Solder Joint Voids
! Rework
! Reliability

TM Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product
or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Solder Joint Voids

! Voids are Common in PBGA Joints Near Package Interface.


! Caused by entrapped flux in solder paste at PC board side of joint,
volatilizing and rising due to buoyancy

Flux Residue
on Void Wall

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PBGA Solder Joint Voids

! Cross-Sectioning tedious and not accurate in determining


void size and frequency.
! Voids can be resolved with good real-time x-ray.
! Initial process study performed to determine effect of flux type
on voiding.
! Boards built with two types of solder paste as well as paste flux
(i.e., flux only with no solder powder).
! X-ray images of 20 joints from each board type analyzed using
image analysis software.
! Void statistical distributions obtained for each board type.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Solder Joint Voids

X-ray Images of Voids (May Need to Be >100KV Real-Time x-ray and


Have Image Enhancing Capabilities).

Solder Paste Type A Solder Paste Type B


Worst-Case Voids Seen in Two Sets of PBGAs Built with Different
Solder Pastes.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Solder Joint Voids

Initial Void Study on Flux Type - Results


! Only One Detectable Void in Boards Built With Paste Flux.
! Large Difference Seen in the Two Solder Paste Types.
! Paste Type A Known to Have Less Volatiles Than B and
30
Therefore Exhibited Less Voids: 70
60
25

50 Sample Size = 20 Joints


20 Sample Size = 20 Joints Total Number of Voids = 317
Total Number of Voids = 158 Mean Voids per Joint = 15.9

Void Count
Void Count

Mean Voids per Joint = 7.90 40 Minimum Void Diameter = 0.68 mils
15 Minimum Void Diameter = 0.71 mils Maximum Void Diameter = 8.54 mils
Maximum Void Diameter = 6.39 mils Mean Void Diameter = 1.70 mils
Mean Void Diameter = 1.92 mils
30
Standard Deviation = 1.41 mils
Standard Deviation = 1.14 mils
10
20

5 10

0 0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 10 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9 9.5 10
Void Diameter (mils) Void Diameter (mils)

Solder Paste Type A Solder Paste Type B

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PBGA Solder Joint Voids
Second Void Study - Reflow Profile Experiments
! Three-cell matrix to study low voids (flux only) vs. paste with
two reflow profiles; used same solder volume for all cases
! Paste: standard profile: slow ramp to 160°C @ 60°C/min,
dwell @ 150-175°C, spike to 215° (65 seconds in liquidus)
! Paste: modified profile: quick ramp to peak 215°C @
75°C/minute (60 seconds in liquidus)
! Flux profile same as paste standard profile
! X-ray imaging for void size and count, cross-section for
standoff height determination
! Twenty solder joints/cell analyzed for voids size and count

! Temperature cycling reliability data collected

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PBGA Solder Joint Voids

Second Void Study - Reflow Profile Experiments


! Very few voids seen in joints made with flux only.
! No Significant Difference Seen in Void Density for the Two Reflow
Profiles.

80
60 Paste
40 Attach
Void Count 20
0 Flux Attach
0 to 1

3 to 4

6 to 7

Void Diameter Range (mils)


Note: Data based on analysis of void count and diameter of 20 solder joints per cell
Average of 10 voids per individual solder joint.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Solder Joint Voids

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Solder Joint Voids
! Dye penetrant analysis revealed that a few voids DO NOT appear to
have an effect on attachment reliability.
! Same Fracture Lengths at Both Voided and Void-Free Joint Interfaces.
! Fractures Observed to Grow Through Bulk Solder Between Voids and Pad
Usually Bisecting Void Well away from Its Maximum Diameter:

Line Added
Along Fracture
Fractures Propagate Front for
Clarity

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PBGA Solder Joint Voids

Second Void Study - Reflow Profile Experiments


! Board level reliability study showed an increase in solder joint life of
about 15% on connections with voids.
! Adjusting the ramp rate of the reflow profile did not significantly affect the
void content or solder joint life.
! Other studies have shown that changes in the reflow time and in peak
reflow temperature have a more significant affect on the generation of
voids. If the voiding is increased or diminished is dependent on the
solder paste used (type, manufacturer, formulation, etc.)

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PBGA Solder Joint Voids

Control and Minimization of Solder Joint Voids

! Work with paste vendors to select a paste,


and follow their temperature profile
recommendations (at least to start).
! Solder paste flux with low volatilesThere
will always be some voids just as with
QFP leads.
! Longer dwell time below liquidus is known
to minimize voids in some solder pastes.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Solder Joint Voids

! Conclusions
! “Standard” and “Modified” reflow profiles resulted in similar
void density for the given solder paste (~10 voids/joint on
average)
! Solder paste samples had percent voided area from 0.47% to
23.7%, with a mean of 7.1%. Flux (only) sample had a mean
voided area of 0.15%
! Solder joint voiding up to 24% of pad area causes no
degradation on solder joint reliability
! Reliability improvement in voided parts (by 16% over parts
without voids) partially explained by greater standoff height
! Voids, while not altering crack propagation path, slowed crack
propagation by forcing re-initiation of crack

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Presentation

! PBGA Introduction and Package Description


! PC Board Design for PBGA
! PBGA Assembly
! PBGA Solder Joint Voids
! Rework
! Reliability

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Rework
Key Points for Special Effort in
Characterization to avoid rework
! Bare board quality
! Solderable pads
! Mask not encroaching on pads areas

! Solder paste printing


! Can’t make good joints if there is missing solder paste.
! Use auto inspection if available
" Six pads, four corners and two across middle.

! Solder reflow process


! Carefully profile with loaded board.
" Insure minimum delta of temperature between middle and corners of BGA.

! Insure test programs do not subject BGA to being falsely blamed


for electrical faults.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Rework

! Due to lack of solder joint visibility BGA’s are often falsely


blamed for board electrical problems.
! In study done by Compaq Computers (Suzanne Fauser, et al) 1
75% of all BGA’s removed from production boards during the
the period of study had been incorrectly removed due to
inability of test technicians to identify the real cause.
" Easy to blame
" Hidden solder joints
" Big, high pin count device.

! Special care must be taken to develop good test programs


that pinpoint trouble accurately1 S. Fauser et al, Compaq Computer Corp.,
“High Pin Count PBGA Assembly: Solder Defect Failure Modes and Root Cause Analysis” Originally
published in the Proceedings of Surface Mount International

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PBGA Rework

PBGA Component Removal

! The PBGA is a low mass package and in most cases it can be


removed and replaced with topside heat only.
! If the board is thick with internal ground planes
" Use additional localized bottom side heat
" Preheat entire board to at least 80° C (or higher, as permitted by
components involved).
# Use heated stage of rework station or oven if necessary.
# Elevating the temperature of the entire board will reduce cycle time and prevent or
reduce board warpage.

! Apply localized heat to BGA package


" When solder is molten, lift package off with vacuum cup.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Rework

Removing Excess Solder from PBGA Pads


! Avoid an additional heat cycle by removing excessive solder
from the site immediately after package lift off, while board is
hot.
! Skill and experience of rework operator should be the key
factor in determining the removal technique.
! A hand held, Solder Vacuum Tool, can do an excellent job,
quickly.
! Solder wicking braid requires heat and pressure and usually
requires more time.
! Both methods should be performed by qualified operators, only.
Damage the board or pads is the greatest concern.

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PBGA Rework

Solder Application
! No additional solder needed. Apply flux only. (For High Reliability
assemblies, see below *.)
! Flux should be compatible with production cleaning strategy and applied
uniformly but sparingly
* For assemblies requiring high reliability, use a mini-stencil for solder paste
application, resulting in more solder volume and a taller component
standoff. Use of solder paste or flux only must be made on an assembly
by assembly use basis.

Place new component on site


!The rework station should have good look-up and look-down capability.
!Video or optical vision

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PBGA Rework

Reflow
! Preheating of entire board may be advisable, especially with large
multilayer boards, to prevent board warpage
! Characterize temperatures to provide uniform heat and ramp rates
similar to reflow furnace
! Non uniform heat and fast ramp rates can cause PBGA to warp or
cause non uniform collapse of solder balls.

Cleaning
! If cleaning is required use standard production cleaning method.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Rework

Rework Summary
! The rework process goal is joint structure and quality at
least as good as the initial assembly.
! Robust initial assembly process reduces the need for
reworking Ball Grid Array packages.
! Removing and replacing a PBGA is easier than for a QFP,
but individual solder joints cannot be repaired.
! BGA package rework can be accomplished with off-the-shelf
equipment.
! The entire rework process must be carefully characterized.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Presentation

! PBGA Introduction and Package Description


! PC Board Design for PBGA
! PBGA Assembly
! PBGA Solder Joint Voids
! Rework
! Reliability

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Reliability

PBGA Construction Influence


on Attachment Reliability
• For PBGA, Silicon Die Mismatched to Other Package Materials.
• Causes Solder Joint Strain from Differential Package/PCB Expansion During
Thermal Excursions.
• Also Causes Joints Under Die Edge to Fail First.
Silicon Die (2.3 ppm/°C)
Epoxy Overmold
BT/Glass PCB (15 ppm/°C)
(15 ppm/°C)

FR4/Glass PCB
(15-21 ppm/°C) Copper Planes, Solder Pads, Traces
and Die Flag (17 ppm/°C)

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Reliability

PBGA Construction Influence


on Attachment Reliability (Cont.)
• Effect of Silicon Mismatch on Composite Package CTE Can Be
Evaluated Using Moiré Interferometry:
Die Area Has Moiré
Fringes of Greater Pitch
Indicating Lower CTE
Outline of 10mm
Square Die Away From Die, Fringes
Become More Uniform
and Parallel as the Die’s
Influence Diminishes

Bottomside of 225 PBGA Substrate (Solder Balls Removed)


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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Reliability

Accelerated Thermal Cycling Conditions


• Accelerated Thermal Cycling (ATC) Performed on Mounted Daisy-Chain
Packages to Obtain Failure Distributions.
– Two Conditions Used Are 0 to 100°C (-48 cpd) & -40 to 125°C (24 cpd).
– Testing Continues Until >50% Packages Exhibit at Least One Joint Fail.
140 160
140
120
120
100 100 Chamber Air
Chamber Air 80 Board
Temperature (°C)

80 Board 60 125°C
100°C
60 40 -40°C
0°C
20
40
0
20 -20
-40
0
-60
-20 -80
0 5 10 15 20 25 0 10 20 30 40 50 60
Time (minutes)
Time (minutes)

Typical Profile for 0 to 100°C Testing Typical Profile for -40 to 125°C Testing

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Reliability

Motorola Board-Level Thermal


Cycling Test Board Configuration
• Four Layer FR4/Glass Test Board Typically Used.
• Simulated Half-Ounce Power and Ground Planes Included.
• 4.50” x 7.25” x 0.062” Thick Board.
• HASL Solderable Surfaces.
– Some Work Performed with ENTEK Plus™ OSP and Ni/Au.
• Copper Thieving
– Signals Going to Au-Plated Edge Fingers for Monitoring.
– Sometimes Unmonitored Devices on a Breakaway for Interim
Analysis.
• Continuous In-Situ Monitoring.

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Reliability

Typical BGA Test Board Configuration


18 Au-Plated Silkscreen of Package Outline Cu Retention
Edge Fingers Pattern
For Monitoring

Devices
for Interim
Score Line for Break- Analysis
Continuously Monitored Devices away Removal

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Reliability

256 PBGA Daisy-Chain Dwg Schematic


Showing Motherboard Routing That Uses One Net Per Package
(Top View - From Die Side)

Outer 1 2 3 4 5 6 7 8 9 10 12 14 16 18 20

A
Common B
C
D
E
F
G
H
J
K
L 27 mm
M Body
N
P
R
T
U
V
W
Y
1.27 mm Pitch
PBGA Traces
Test Board Traces
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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Reliability

Statistics of BGA Failure in ATC Testing


• After ATC Failures Recorded Data Fit to Two Parameter Weibull or
Log Normal Distributions.
• Weibull:  β
−  t 
η
– Fraction Failed = F (t ) = 1− R (t ) = 1− e  
– η Is the Characteristic Life or Cycles to 63.2% Failure (N63.2%).
– η Sometimes Referred to as α.
– β Is the Shape Parameter of Weibull Slope.
• Log Normal:
F (t ) = 1− R( t) = 12 + 12 • erf [ 1

(ln(t) − ln(µ))]
– µ Is the Characteristic Life or Cycles to 50% Failure (N50%) Which Is
Also the Mean of the Failure Data if 100% Failure Was Obtained.
– σ Is the Shape Parameter of Log Normal Slope. Can Be Calculated
from the Log of the Failure Data if 100% Failure Was Obtained.
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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Reliability

Statistics of BGA Failure in ATC Testing


• After ATC Failures Recorded Data Fit to Two Parameter Weibull or
Log Normal Distributions.
• Weibull:  β
−  t 
η
– Fraction Failed = F (t ) = 1− R (t ) = 1− e  
– η Is the Characteristic Life or Cycles to 63.2% Failure (N63.2%).
– η Sometimes Referred to as α.
– β Is the Shape Parameter of Weibull Slope.
• Log Normal:
F (t ) = 1− R( t) = 12 + 12 • erf [ 1

(ln(t) − ln(µ))]
– µ Is the Characteristic Life or Cycles to 50% Failure (N50%) Which Is
Also the Mean of the Failure Data if 100% Failure Was Obtained.
– σ Is the Shape Parameter of Log Normal Slope. Can Be Calculated
from the Log of the Failure Data if 100% Failure Was Obtained.
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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Reliability
0 to 100°C ATC 2P Weibull Probability Plot Comparing
Different 225 Pin 0.36 mm Substrate PBGA Row Groups
PBGA Row Group
o Inner Row
² Die Perimeter
η (Ν63.2%)
Middle
Note That, As Expected, ³ Outer
PBGA Joints Under or Near
Die Perimeter Fail First

%
Packages 225 PBGA Row
Failed Group Breakdown

Row Group η β N50%


100 1000 R2
1000 ppm ppm ppm
Inner 11468 10.3 11065 4673 5849 0.916
Die Perimeter 7958 13.0 7737 3926 4685 0.965
Middle 11686 10.3 11278 4785 5982 0.922 10 mm Die Outline
Outer 13957 8.1 13344 4508 5980 1.000
100 ppm

Thermal Cycles

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PBGA Reliability

0 to 100°C ATC 2P Weibull Probability Plot of Combined 225


PBGA Row Group Data (i.e., First Joint to Fail on Any Package)

Note Downward
Curvature in Data
Indicating Potential
% Better Fit to a 3P
Packages Weibull Distribution
Failed

Row Group η β N50% 100 1000 R 2


ppm ppm
All Row Data 6851 11.2 6630 3001 3689 0.954
Combined

Thermal Cycles

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Reliability
0 to 100°C Board-Level Testing Results for Both SMD
and NSMD 361 PBGA Packages Versus 144 TQFP
SMD Pkgs NSMD Pkgs

}
}
Pkg Pad Type/Test Brd
Pad Type/Diameter (mm)
SMD/NSMD/0.55
NSMD Improve-
SMD/NSMD/0.60
ment in Range NSMD/ SMD/0.52
of from 3.0 to 5.5X NSMD/ SMD/0.58
SMD/ SMD/0.52
SMD/ SMD/0.58
NSMD/NSMD/0.55
NSMD/NSMD/0.60
144 TQFP

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PBGA Reliability

-40 to 125°C 2P Weibull Probability Plot Comparing Reliability of


361 PBGA with 0.48 mm Diameter NSMD Pads Mounted to
NSMD Test Board Pads of Various Diameters
(144 TQFP Shown for Comparison)
Test Board Pad Type/
Diameter (mm)
NSMD/0.41
NSMD/0.46
NSMD/0.55
NSMD/0.60
144 TQFP

%
Packages
Failed

Thermal Cycles

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Conclusions from PBGA Package and
Board Solder Pad Configuration Study

• PBGA Attachment Reliability is Heavily Dependent Upon


Pad Size and Configuration.
– Always Determine the Diameter of BGA Pads to Determine Which
Motherboard Pad Diameter to Use.
– Due to Higher Mismatch and Stress at PBGA Package Side, May Want
to Make Motherboard Pad Size < PBGA Pad Size.
• Cycles to Failure Is Much More Dependent on Package
Pad Configuration Than on Stand-Off.
• Both Board and Component-Level Testing Results
Indicate That NSMD PBGA Pads Offer a Lower Stress
Configuration and Longer Life.
• Can Be More Difficult to Design with NSMD Pads
– Clearance Around Pad Has to Be Greater Than Overlap Associated with
SMD Pads, But Solderable Surface Can Be Smaller for the Same
Reliability.
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PBGA Reliability
Summary of Leaded Package -40
to 125°C Board-Level ATC Data

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
PBGA Reliability
1.27 mm Pitch Plastic Ball Grid Array Versus
Leaded Package Comparison in -40 to 125°C
PBGA Pkgs Leaded Pkgs

}
} Note: All PBGA
packages shown
are SMD and have a
0.56 mm thick BT
substrate except
361 which is 0.36
mm.

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PBGA Joint Failure Analysis
Using Cross-Sectioning

Fracture Propagating
Through Eutectic Solder
Near the Solder Pad

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PBGA Reliability
Failure Analysis Using Dye Penetrant
• Dye Penetrant Analysis to Observe and Quantify Fractures Faster than
X-Sectioning.
• Yields More Information about Fracture Propagation Lengths and
Location.
• Procedure:
» Clean Assembly after Removal from Cycling for Improved Penetration.
» Flush with Dye Penetrant (Red Layout Dye Used with Excellent Results).
» Place in Vacuum (Optional).
» Bake Assembly at 100°C for -10 Minutes or Until Dye is Dry.
» Mechanically Remove Device to Reveal Dyed Fracture Surfaces.
• Worst-Case Fracture Lengths Observed Are Indication of Time Until
Expected Failure.
• Distribution of Fracture Lengths Around Device Indication of Joints
Stress/Strain Distribution.

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PBGA Reliability
PBGA Dye Penetrant Analysis (Cont.)
• Examples of 361 Pin PBGA Fracture Progression in 2 Cycle Conditions:
Secondary Crack Primary Crack
• 0 to 100°C,30 Minute Cycle:

Cycles: 1415 2328 7473


• -40 to 125°C, 60 Minute Cycle:

Cycles: 765 1057 1885

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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.
Summary and Conclusions
• BGA Is Possibly the Ideal Packaging Technology.
• PBGA, CBGA and CCGA Shown to Provide a Reliable Package and
Interconnect Through Field Experience and Lifetime Prediction in a Wide
Variety of Applications.
– Computers (PC Cards, Laptops, Desktops, Workstations and Mainframes).
– Communications (Pagers, Two Way Radios, Cellular Phones, Large Outdoor and Office-
Based Switching Systems).
– Other (Camcorders, Satellites, Automotive, Set-Top Boxes).
• Suitability to Other Applications (Military, Automotive-Under-the-Hood).
• When Possible, the Use of Thicker Substrates, Perimeter or “Enhanced”
PBGA May Make Solder Joint Lifetimes Independent of Silicon Mismatch
and Increase Solder Joint Reliability.
• For PBGA, Pad Configuration (Type and Diameter) Can Greatly Affect
Reliability.
• NSMD Pads Appear to Offer Reliability Advantages Over Traditional SMD
Pads and Motorola Has Implemented Them on Select Wire-Bonded and
Flip-Chip PBGA Designs.
• Voiding Present in PBGA Solder Joints Assembled with Solder Paste
Appears to Result in Slightly Increased Reliability.
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or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2005.

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