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Before using this product, please read this manual and the related manuals introduced in this manual, and pay
full attention to safety to handle the product correctly.
Please store this manual in a safe place and make it accessible when required. Always forward a copy of the
manual to the end user.
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REVISIONS
*The manual number is given on the bottom left of the back cover.
Jul., 2009 SH (NA)-080809ENG-C Revision because of function support by the Universal model QCPU having a
serial number "11043" or later
Partial corrections
Section 2.1, 2.5.6, 2.5.18, 2.5.20, 7.6.9, 7.12.7, 7.12.11, 12.1.3, 12.1.4, APPENDIX 1.2, 1.3, 1.4.2,
3, 5.1
Additions
Section 2.5.16, 7.16, 7.18.10
Modification
Section 2.5.21 2.5.22, Section 2.5.22 2.5.21, Section 9.13 7.6.10,
Section 9.14 7.6.1, Section 9.15 7.16, Section 9.15.1 7.16.1, Section 9.15.2 7.16.2,
Section 9.15.3 7.16.3, Section 9.1 7.18.9, Section 9.2 7.18.11, Section 9.3 7.18.12,
Section 9.4 7.18.13, Section 9.5 7.18.14, Section 9.6 7.18.15, Section 9.7 7.18.16,
Section 9.8 7.18.17, Section 9.9 7.18.18, Section 9.10 7.18.19, Section 9.11 9.1,
Section 9.11.1 9.1.1, Section 9.11.2 9.1.2, Section 9.12 9.2, Section 9.12.1 9.2.1,
Chapter 10 11, Chapter 11 10
This manual confers no industrial property rights or any rights of any other kind, nor does it confer any patent licenses.
Mitsubishi Electric Corporation cannot be held responsible for any problems involving industrial property rights which may
occur as a result of using the contents noted in this manual.
© 2008 MITSUBISHI ELECTRIC CORPORATION
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INTRODUCTION
This manual explains the common instructions required for programming of the QCPU.
• The common instructions refer to all instructions except those dedicated to special function
modules (such as AJ71QC24 and AJ71PT32-S3) and to AD57 models, as well as PID control instructions, SFC
instructions and ST instructions.
Before using this product, please read this manual and the relevant manuals carefully and develop familiarity with
the functions and performance of the Q series programmable controller to handle the product correctly.
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CONTENTS
SAFETY PRECAUTIONS ..................................................................................................................A - 1
REVISIONS .......................................................................................................................................A - 2
INTRODUCTION ...............................................................................................................................A - 3
CONTENTS .......................................................................................................................................A - 4
MANUALS........................................................................................................................................A - 14
1. GENERAL DESCRIPTION 1 - 1 to 1 - 8
1.1 Related Programming Manuals 1-2
1.2 Abbreviations and Generic Names 1-5
2. INSTRUCTION TABLES 2 - 1 to 2 - 62
2.1 Types of Instructions 2-2
2.2 How to Read Instruction Tables 2-4
2.3 Sequence Instructions 2-6
2.3.1 Contact instructions ...................................................................................................... 2 - 6
2.3.2 Association instructions ................................................................................................ 2 - 7
2.3.3 Output instructions........................................................................................................ 2 - 8
2.3.4 Shift instructions ........................................................................................................... 2 - 8
2.3.5 Master control instructions............................................................................................ 2 - 9
2.3.6 Termination instructions ............................................................................................... 2 - 9
2.3.7 Other instructions ......................................................................................................... 2 - 9
2.4 Basic instructions 2 - 10
2.4.1 Comparison operation instructions ............................................................................. 2 - 10
2.4.2 Arithmetic operation instructions ................................................................................ 2 - 16
2.4.3 Data conversion instructions ...................................................................................... 2 - 22
2.4.4 Data transfer instructions............................................................................................ 2 - 24
2.4.5 Program branch instructions....................................................................................... 2 - 27
2.4.6 Program execution control instructions ...................................................................... 2 - 27
2.4.7 I/O refresh instructions ............................................................................................... 2 - 27
2.4.8 Other convenient instructions ..................................................................................... 2 - 28
2.5 Application Instructions 2 - 29
2.5.1 Logical operation instructions ..................................................................................... 2 - 29
2.5.2 Rotation instructions ................................................................................................... 2 - 32
2.5.3 Shift instructions ......................................................................................................... 2 - 33
2.5.4 Bit processing instructions.......................................................................................... 2 - 34
2.5.5 Data processing instructions ...................................................................................... 2 - 35
2.5.6 Structure creation instructions .................................................................................... 2 - 38
2.5.7 Data table operation instructions ................................................................................ 2 - 40
2.5.8 Buffer memory access instructions............................................................................. 2 - 41
2.5.9 Display instructions..................................................................................................... 2 - 41
2.5.10 Debugging and failure diagnosis instructions ............................................................. 2 - 42
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2.5.11 Character string processing instructions .................................................................... 2 - 43
2.5.12 Special function instructions ....................................................................................... 2 - 46
2.5.13 Data control instructions ............................................................................................. 2 - 49
2.5.14 Switching instructions ................................................................................................. 2 - 51
2.5.15 Clock instructions ....................................................................................................... 2 - 52
2.5.16 Expansion clock instruction ........................................................................................ 2 - 55
2.5.17 Program control instructions....................................................................................... 2 - 56
2.5.18 Other instructions ....................................................................................................... 2 - 57
2.5.19 Instructions for Data Link............................................................................................ 2 - 59
2.5.20 Multiple CPU dedicated instruction............................................................................. 2 - 60
2.5.21 Multiple CPU high-speed transmission dedicated instruction..................................... 2 - 60
2.5.22 Redundant system instructions (For Redundant CPU) .............................................. 2 - 61
3. CONFIGURATION OF INSTRUCTIONS 3 - 1 to 3 - 48
3.1 Configuration of Instructions 3-2
3.2 Designating Data 3-3
3.2.1 Using bit data................................................................................................................ 3 - 3
3.2.2 Using word (16 bits) data.............................................................................................. 3 - 4
3.2.3 Using double word data (32 bits).................................................................................. 3 - 6
3.2.4 Using real number data ................................................................................................ 3 - 8
3.2.5 Using character string data......................................................................................... 3 - 11
3.3 Indexing 3 - 12
3.4 Indirect Specification 3 - 23
3.5 Reducing Instruction Processing Time 3 - 25
3.5.1 Subset Processing...................................................................................................... 3 - 25
3.5.2 Operation processing with standard device registers (Z)
(only Universal model QCPU) ............................................................................ 3 - 26
3.6 Cautions on Programming (Operation Errors) 3 - 27
3.7 Conditions for Execution of Instructions 3 - 33
3.8 Counting Step Number 3 - 34
3.9 Operation when the OUT, SET/RST, or PLS/PLF Instructions Use the Same Device 3 - 39
3.10 Precautions for Use of File Registers 3 - 44
5. SEQUENCE INSTRUCTIONS 5 - 1 to 5 - 60
5.1 Contact Instructions 5-2
5.1.1 Operation start, series connection, parallel connection (LD,LDI,AND,ANI,OR,ORI).... 5 - 2
5.1.2 Pulse operation start, pulse series connection, pulse parallel connection
(LDP,LDF,ANDP,ANDF,ORP,ORF) ..................................................................... 5 - 5
5.1.3 Pulse NOT operation start, pulse NOT series connection, pulse NOT parallel connection
(LDPI,LDFI,ANDPI,ANDFI,ORPI,ORFI) ............................................................... 5 - 7
5.2 Association Instructions 5 - 10
5.2.1 Ladder block series connection and parallel connection (ANB,ORB) ........................ 5 - 10
5.2.2 Operation results push,read,pop (MPS,MRD,MPP) ................................................... 5 - 12
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5.2.3 Operation results inversion (INV) ............................................................................... 5 - 15
5.2.4 Operation result conversions (MEP,MEF) .................................................................. 5 - 17
5.2.5 Pulse conversions of edge relay operation results (EGP,EGF).................................. 5 - 18
5.3 Output Instructions 5 - 20
5.3.1 Out instruction (excluding timers, counters, and annunciators) (OUT)....................... 5 - 20
5.3.2 Timers (OUT T,OUTH T) ............................................................................................ 5 - 22
5.3.3 Counter (OUT C) ........................................................................................................ 5 - 26
5.3.4 Annunciator output (OUT F) ....................................................................................... 5 - 28
5.3.5 Setting devices (except for annunciators) (SET) ........................................................ 5 - 30
5.3.6 Resetting devices (except for annunciators) (RST).................................................... 5 - 32
5.3.7 Setting and resetting the annunciators (SET F,RST F) .............................................. 5 - 35
5.3.8 Leading edge and trailing edge outputs (PLS,PLF).................................................... 5 - 37
5.3.9 Bit device output reverse (FF) .................................................................................... 5 - 40
5.3.10 Pulse conversions of direct outputs (DELTA(P)) ........................................................ 5 - 42
5.4 Shift Instructions 5 - 44
5.4.1 Bit device shifts (SFT(P))............................................................................................ 5 - 44
5.5 Master Control Instructions 5 - 47
5.5.1 Setting and resetting the master control (MC,MCR)................................................... 5 - 47
5.6 Termination Instructions 5 - 51
5.6.1 End main routine program (FEND)............................................................................. 5 - 51
5.6.2 End sequence program (END) ................................................................................... 5 - 53
5.7 Other instructions 5 - 55
5.7.1 Sequence program stop (STOP) ................................................................................ 5 - 55
5.7.2 No operations (NOP,NOPLF,PAGE n) ....................................................................... 5 - 57
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6.2.10 Addition and subtraction of floating decimal point data (Double precision)
(ED+(P),ED-(P)) ................................................................................................. 6 - 50
6.2.11 Multiplication and division of floating decimal point data (Single precision)
(E*(P),E/(P)) ....................................................................................................... 6 - 54
6.2.12 Multiplication and division of floating decimal point data (Double precision)
(ED*(P),ED/(P)) .................................................................................................. 6 - 56
6.2.13 Block addition and subtraction (BK+(P),BK-(P))......................................................... 6 - 59
6.2.14 BIN 32-bit data block addition and subtraction operations (DBK+(P),DBK-(P)) ........ 6 - 62
6.2.15 Linking character strings ($+(P)) ................................................................................ 6 - 65
6.2.16 Incrementing and decrementing 16-bit BIN data (INC(P),DEC(P)) ............................ 6 - 69
6.2.17 Incrementing and decrementing 32-bit BIN data (DINC(P),DDEC(P)) ....................... 6 - 71
6.3 Data conversion instructions 6 - 73
6.3.1 Conversion from BIN data to 4-digit and 8-digit BCD (BCD(P),DBCD(P)) ................. 6 - 73
6.3.2 Conversion from BCD 4-digit and 8-digit data to BIN data (BIN(P),DBIN(P)) ............ 6 - 75
6.3.3 Conversion from BIN 16 and 32-bit data to floating decimal point (Single precision)
(FLT(P),DFLT(P)) ............................................................................................... 6 - 78
6.3.4 Conversion from BIN 16 and 32-bit data to floating decimal point (Double precision)
(FLTD(P),DFLTD(P)).......................................................................................... 6 - 81
6.3.5 Conversion from floating decimal point data to BIN16- and
32-bit data (Single precision) (INT(P),DINT(P)) ................................................. 6 - 83
6.3.6 Conversion from floating decimal point data to BIN16- and
32-bit data (Double precision) (INTD(P),DINTD(P)) ........................................... 6 - 86
6.3.7 Conversion from BIN 16-bit to BIN 32-bit data (DBL(P)) ............................................ 6 - 88
6.3.8 Conversion from BIN 32-bit to BIN 16-bit data (WORD(P))........................................ 6 - 89
6.3.9 Conversion from BIN 16 and 32-bit data to Gray code (GRY(P),DGRY(P)) .............. 6 - 90
6.3.10 Conversion of Gray code to BIN 16 and 32-bit data (GBIN(P),DGBIN(P))................. 6 - 92
6.3.11 Complement of 2 of BIN 16- and 32-bit data (sign reversal) (NEG(P),DNEG(P)) ...... 6 - 94
6.3.12 Floating-point sign invertion (Single precision) (ENEG(P)) ........................................ 6 - 96
6.3.13 Floating-point sign invertion (Double precision) (EDNEG(P)) .................................... 6 - 97
6.3.14 Conversion from block BIN 16-bit data to BCD 4-digit data (BKBCD(P))................... 6 - 98
6.3.15 Conversion from block BCD 4-digit data to block BIN 16-bit data (BKBIN(P)) ......... 6 - 100
6.3.16 Single precision to Double precision conversion (ECON(P)) ................................... 6 - 102
6.3.17 Double precision to Single precision conversion (EDCON(P))................................. 6 - 104
6.4 Data Transfer Instructions 6 - 106
6.4.1 16-bit and 32-bit data transfers (MOV(P),DMOV(P))................................................ 6 - 106
6.4.2 Floating-point data transfer (Single precision) (EMOV(P)) ....................................... 6 - 108
6.4.3 Floating-point data transfer (Double precision) (EDMOV(P)) ................................... 6 - 110
6.4.4 Character string transfers ($MOV(P))....................................................................... 6 - 112
6.4.5 16-bit and 32-bit negation transfers (CML(P),DCML(P)) .......................................... 6 - 114
6.4.6 Block 16-bit data transfers (BMOV(P)) ..................................................................... 6 - 117
6.4.7 Identical 16-bit data block transfers (FMOV(P)) ....................................................... 6 - 120
6.4.8 Identical 32-bit data block transfers (DFMOV(P))..................................................... 6 - 122
6.4.9 16-bit and 32-bit data exchanges (XCH(P),DXCH(P)) ............................................. 6 - 124
6.4.10 Block 16-bit data exchanges (BXCH(P)) .................................................................. 6 - 126
6.4.11 Upper and lower byte exchanges (SWAP(P)) .......................................................... 6 - 128
6.5 Program Branch Instructions 6 - 129
6.5.1 Pointer branch instructions (CJ,SCJ,JMP) ............................................................... 6 - 129
6.5.2 Jump to END (GOEND)............................................................................................ 6 - 132
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6.6 Program Execution Control Instructions 6 - 133
6.6.1 Interrupt disable/enable instructions, interrupt program mask (DI,EI,IMASK) .......... 6 - 133
6.6.2 Recovery from interrupt programs (IRET) ................................................................ 6 - 139
6.7 I/O Refresh Instructions 6 - 141
6.7.1 I/O refresh (RFS(P)) ................................................................................................. 6 - 141
6.8 Other Convenient Instructions 6 - 143
6.8.1 Counter 1-phase input up or down (UDCNT1) ......................................................... 6 - 143
6.8.2 Counter 2-phase input up or down (UDCNT2) ......................................................... 6 - 146
6.8.3 Teaching timer (TTMR) ............................................................................................ 6 - 149
6.8.4 Special function timer (STMR).................................................................................. 6 - 151
6.8.5 Rotary table shortest direction control (ROTC) ........................................................ 6 - 154
6.8.6 Ramp signal (RAMP)................................................................................................ 6 - 157
6.8.7 Pulse density measurement (SPD) .......................................................................... 6 - 160
6.8.8 Fixed cycle pulse output (PLSY) .............................................................................. 6 - 162
6.8.9 Pulse width modulation (PWM) ................................................................................ 6 - 164
6.8.10 Matrix input (MTR).................................................................................................... 6 - 166
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7.5.5 7-segment decode (SEG(P)) ...................................................................................... 7 - 75
7.5.6 4-bit dissociation of 16-bit data (DIS(P))..................................................................... 7 - 77
7.5.7 4-bit linking of 16-bit data (UNI(P)) ............................................................................. 7 - 79
7.5.8 Dissociation or linking of random data (NDIS(P),NUNI(P)) ........................................ 7 - 81
7.5.9 Data dissociation and linking in byte units (WTOB(P),BTOW(P)) .............................. 7 - 85
7.5.10 Maximum value search for 16- and 32-bit data (MAX(P),DMAX(P)) .......................... 7 - 89
7.5.11 Minimum value search for 16- and 32-bit data (MIN(P),DMIN(P)) ............................. 7 - 92
7.5.12 BIN 16 and 32 bits data sort operations (SORT,DSORT) .......................................... 7 - 95
7.5.13 Calculation of totals for 16-bit data (WSUM(P)) ......................................................... 7 - 99
7.5.14 Calculation of totals for 32-bit data (DWSUM(P))..................................................... 7 - 101
7.5.15 Calculation of averages for 16-bit or 32-bit data (MEAN(P),DMEAN(P)) ................. 7 - 103
7.6 Structure creation instructions 7 - 105
7.6.1 FOR to NEXT instruction loop (FOR,NEXT)............................................................. 7 - 105
7.6.2 Forced end of FOR to NEXT instruction loop (BREAK(P))....................................... 7 - 108
7.6.3 Subroutine program calls (CALL(P)) ........................................................................ 7 - 110
7.6.4 Return from subroutine programs (RET) .................................................................. 7 - 115
7.6.5 Subroutine program output OFF calls (FCALL(P)) ................................................... 7 - 116
7.6.6 Subroutine calls between program files (ECALL(P)) ................................................ 7 - 120
7.6.7 Subroutine output OFF calls between program files (EFCALL(P))........................... 7 - 125
7.6.8 Subroutine program call (XCALL)............................................................................. 7 - 129
7.6.9 Refresh instruction (COM)........................................................................................ 7 - 134
7.6.10 Select Refresh Instruction (COM)............................................................................. 7 - 137
7.6.11 Select Refresh Instruction (CCOM) .......................................................................... 7 - 141
7.6.12 Index modification of entire ladder (IX,IXEND)......................................................... 7 - 144
7.6.13 Designation of modification values in index modification of entire ladders
(IXDEV,IXSET)................................................................................................. 7 - 148
7.7 Data Table Operation Instructions 7 - 151
7.7.1 Writing data to the data table (FIFW(P))................................................................... 7 - 151
7.7.2 Reading oldest data from tables (FIFR(P))............................................................... 7 - 153
7.7.3 Reading newest data from data tables (FPOP(P)) ................................................... 7 - 155
7.7.4 Deleting and inserting data from and in data tables (FDEL(P),FINS(P)).................. 7 - 157
7.8 Buffer memory access instruction 7 - 160
7.8.1 Reading 1-/2-word data from the intelligent function module
(FROM(P),DFRO(P))........................................................................................ 7 - 160
7.8.2 Writing 1-/2-word data to intelligent function module (TO(P),DTO(P)) ..................... 7 - 163
7.9 Display instructions 7 - 166
7.9.1 Print ASCII code instruction (PR) ............................................................................. 7 - 166
7.9.2 Print comment instruction (PRC) .............................................................................. 7 - 169
7.9.3 Error display and annunciator reset instruction (LEDR) ........................................... 7 - 172
7.10 Debugging and failure diagnosis instructions 7 - 175
7.10.1 Special format failure checks (CHKST,CHK) ........................................................... 7 - 175
7.10.2 Changing check format of CHK instruction (CHKCIR,CHKEND) ............................. 7 - 179
7.11 Character string processing instructions 7 - 183
7.11.1 Conversion from BIN 16-bit or 32-bit to decimal ASCII (BINDA(P),DBINDA(P))...... 7 - 183
7.11.2 Conversion from BIN 16-bit or 32-bit data to hexadecimal ASCII
(BINHA(P),DBINHA(P)).................................................................................... 7 - 186
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7.11.3 Conversion from BCD 4-digit and 8-digit to decimal ASCII data
(BCDDA(P),DBCDDA(P))................................................................................. 7 - 189
7.11.4 Conversion from decimal ASCII to BIN 16-bit and 32-bit data
(DABIN(P),DDABIN(P)).................................................................................... 7 - 192
7.11.5 Conversion from hexadecimal ASCII to BIN 16-bit and 32-bit data
(HABIN(P),DHABIN(P)).................................................................................... 7 - 195
7.11.6 Conversion from decimal ASCII to BCD 4-digit or 8-digit data
(DABCD(P),DDABCD(P))................................................................................. 7 - 198
7.11.7 Reading device comment data (COMRD(P)) ........................................................... 7 - 201
7.11.8 Character string length detection (LEN(P)) .............................................................. 7 - 204
7.11.9 Conversion from BIN 16-bit or 32-bit to character string (STR(P),DSTR(P)) ........... 7 - 206
7.11.10 Conversion from character string to BIN 16-bit or 32-bit data (VAL(P),DVAL(P)) .... 7 - 212
7.11.11 Conversion from floating decimal point to character string data (ESTR(P))............. 7 - 217
7.11.12 Conversion from character string to floating decimal point data (EVAL(P)) ............. 7 - 224
7.11.13 Conversion from hexadecimal BIN to ASCII (ASC(P)) ............................................. 7 - 228
7.11.14 Conversion from ASCII to hexadecimal BIN (HEX(P)) ............................................. 7 - 230
7.11.15 Extracting character string data from the right or left (RIGHT(P),LEFT(P)).............. 7 - 232
7.11.16 Random selection from and replacement in character strings (MIDR(P),MIDW(P))
........................................................................................................................ 7 - 235
7.11.17 Character string search (INSTR(P)) ......................................................................... 7 - 239
7.11.18 Insertion of character string (STRINS(P))................................................................. 7 - 241
7.11.19 Deletion of character string (STRDEL(P)) ................................................................ 7 - 243
7.11.20 Floating decimal point to BCD (EMOD(P)) ............................................................... 7 - 245
7.11.21 From BCD format data to floating decimal point (EREXP(P)) .................................. 7 - 248
7.12 Special function instructions 7 - 250
7.12.1 SIN operation on floating-point data (Single precision) (SIN(P)) .............................. 7 - 250
7.12.2 SIN operation on floating-point data (Double precision) (SIND(P)) .......................... 7 - 252
7.12.3 COS operation on floating-point data (Single precision) (COS(P)) .......................... 7 - 254
7.12.4 COS operation on floating-point data (Double precision) (COSD(P)) ...................... 7 - 256
7.12.5 TAN operation on floating-point data (Single precision) (TAN(P))............................ 7 - 258
7.12.6 TAN operation on floating-point data (Double precision) (TAND(P))........................ 7 - 260
7.12.7 SIN-1 operation on floating point data (Single precision) (ASIN(P)) ......................... 7 - 262
7.12.8 SIN-1 operation on floating-point data (Double precision) (ASIND(P)) ..................... 7 - 265
7.12.9 COS -1 operation on floating-point data (Single precision) (ACOS(P)) .................... 7 - 267
7.12.10 COS -1 operation on floating-point data (Double precision) (ACOSD(P)) ................ 7 - 269
7.12.11 TAN -1 operation on floating-point data (Single precision) (ATAN(P))...................... 7 - 271
7.12.12 TAN -1 operation on floating-point data (Double precision) (ATAND(P)).................. 7 - 273
7.12.13 Conversion from floating-point angle to radian (Single precision) (RAD(P)) ............ 7 - 275
7.12.14 Conversion from floating-point angle to radian (Double precision) (RADD(P)) ........ 7 - 277
7.12.15 Conversion from floating-point radian to angle (Single precision) (DEG(P)) ............ 7 - 279
7.12.16 Conversion from floating-point radian to angle (Double precision) (DEGD(P)) ........ 7 - 281
7.12.17 Exponentiation operation on floating-point data (Single precision) (POW(P)).......... 7 - 283
7.12.18 Exponentiation operation on floating-point data (Single precision) (POWD(P)) ....... 7 - 285
7.12.19 Square root operation for floating-point data (Single precision) (SQR(P)) ............... 7 - 287
7.12.20 Square root operation for floating-point data (Double precision) (SQRD(P)) ........... 7 - 289
7.12.21 Exponent operation on floating-point data (Single precision) (EXP(P)).................... 7 - 291
7.12.22 Exponent operation on floating-point data (Double precision) (EXPD(P))................ 7 - 294
7.12.23 Natural logarithm operation on floating-point data (Single precision) (LOG(P)) ....... 7 - 296
7.12.24 Natural logarithm operation on floating-point data (Double precision) (LOGD(P)) ... 7 - 298
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7.12.25 Common logarithm operation on floating-point data (Single precision)
(LOG10(P))....................................................................................................... 7 - 300
7.12.26 Common logarithm operation on floating-point data (Double precision)
(LOG10D(P)) .................................................................................................... 7 - 302
7.12.27 Random number generation and series updates (RND(P),SRND(P)) ..................... 7 - 304
7.12.28 BCD 4-digit and 8-digit square roots (BSQR(P),BDSQR(P)) ................................... 7 - 306
7.12.29 BCD type SIN operation (BSIN(P))........................................................................... 7 - 309
7.12.30 BCD type COS operations (BCOS(P)) ..................................................................... 7 - 311
7.12.31 BCD type TAN operation (BTAN(P)) ........................................................................ 7 - 313
7.12.32 BCD type SIN -1 operations (BASIN(P)) ................................................................... 7 - 315
7.12.33 BCD type COS -1 operation (BACOS(P)) ................................................................. 7 - 317
7.12.34 BCD type TAN -1 operations (BATAN(P)) ................................................................ 7 - 319
7.13 Data Control Instructions 7 - 321
7.13.1 Upper and lower limit controls for BIN 16-bit and BIN 32-bit data
(LIMIT(P),DLIMIT(P)) ....................................................................................... 7 - 321
7.13.2 BIN 16-bit and 32-bit dead band controls (BAND(P),DBAND(P)) ............................ 7 - 324
7.13.3 Zone control for BIN 16-bit and BIN 32-bit data (ZONE(P),DZONE(P))................... 7 - 327
7.13.4 Scaling (Point-by-point coordinate data) (SCL(P),DSCL(P)).................................... 7 - 330
7.13.5 Scaling (Point-by-point coordinate data) (SCL2(P),DSCL2(P))................................ 7 - 334
7.14 File register switching instructions 7 - 337
7.14.1 Switching file register numbers (RSET(P))............................................................... 7 - 337
7.14.2 Setting files for file register use (QDRSET(P)) ......................................................... 7 - 339
7.14.3 File setting for comments (QCDSET(P)) .................................................................. 7 - 342
7.15 Clock instructions 7 - 344
7.15.1 Reading clock data (DATERD(P)) ............................................................................ 7 - 344
7.15.2 Writing clock data (DATEWR(P)) ............................................................................. 7 - 346
7.15.3 Clock data addition operation (DATE+(P)) ............................................................... 7 - 348
7.15.4 Clock data subtraction operation (DATE-(P)) ........................................................... 7 - 350
7.15.5 Time data conversion (from Hour/Minute/Second to Second) (SECOND(P)) .......... 7 - 352
7.15.6 Time data conversion (from Second to Hour/Minute/Second ) (HOUR(P)).............. 7 - 354
7.15.7 Date comparison (DT=,DT<>,DT>,DT<=,DT<,DT>=) .............................................. 7 - 356
7.15.8 Clock comparison (TM=,TM<>,TM>,TM<=,TM<,TM>=).......................................... 7 - 361
7.16 Expansion Clock Instructions 7 - 366
7.16.1 Reading expansion clock data (S(P).DATERD) ....................................................... 7 - 366
7.16.2 Expansion clock data addition operation (S(P).DATE+)........................................... 7 - 369
7.16.3 Expansion clock data subtraction operation (S(P).DATE-)....................................... 7 - 372
7.17 Program control instructions 7 - 375
7.17.1 Program standby instruction (PSTOP(P)) ................................................................ 7 - 377
7.17.2 Program output OFF standby instruction (POFF(P))................................................ 7 - 378
7.17.3 Program scan execution registration instruction (PSCAN(P)) .................................. 7 - 380
7.17.4 Program low speed execution registration instruction (PLOW(P)) ........................... 7 - 382
7.17.5 Program execution status check instruction (PCHK)................................................ 7 - 384
7.18 Other instructions 7 - 386
7.18.1 Resetting watchdog timer (WDT(P))......................................................................... 7 - 386
7.18.2 Timing pulse generation (DUTY) .............................................................................. 7 - 388
7.18.3 Time check instruction (TIMCHK)............................................................................. 7 - 390
7.18.4 Direct 1-byte read from file register (ZRRDB(P))...................................................... 7 - 391
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7.18.5 File register direct 1-byte write (ZRWRB(P)) ............................................................ 7 - 393
7.18.6 Indirect address read operations (ADRSET(P)) ....................................................... 7 - 395
7.18.7 Numerical key input from keyboard (KEY) ............................................................... 7 - 396
7.18.8 Batch save or recovery of index register (ZPUSH(P),ZPOP(P)) .............................. 7 - 400
7.18.9 Reading Module Information (UNIRD(P))................................................................. 7 - 402
7.18.10 Reading module model name(TYPERD(P))............................................................. 7 - 406
7.18.11 Trace Set/Reset (TRACE,TRACER) ........................................................................ 7 - 411
7.18.12 Writing Data to Designated File (SP.FWRITE)......................................................... 7 - 413
7.18.13 Reading Data from Designated File (SP.FREAD) .................................................... 7 - 424
7.18.14 Writing Data to Standard ROM (SP.DEVST)............................................................ 7 - 436
7.18.15 Read Data from Standard ROM (S(P).DEVLD)........................................................ 7 - 438
7.18.16 Load Program from Memory Card (PLOADP).......................................................... 7 - 440
7.18.17 Unload Program from Program Memory (PUNLOADP) ........................................... 7 - 443
7.18.18 Load + Unload (PSWAPP) ....................................................................................... 7 - 445
7.18.19 High-speed Block Transfer of File Register (RBMOV(P)) ........................................ 7 - 448
A-12
12.1.4 Error code list (2000 to 2999) ................................................................................... 12 - 16
12.1.5 Error code list (3000 to 3999) ................................................................................... 12 - 34
12.1.6 Error code list (4000 to 4999) ................................................................................... 12 - 51
12.1.7 Error code list (5000 to 5999) ................................................................................... 12 - 66
12.1.8 Error code list (6000 to 6999) ................................................................................... 12 - 68
12.1.9 Error code list (7000 to 10000) ................................................................................. 12 - 78
12.2 Canceling of Errors 12 - 83
A-13
MANUALS
To understand the main specifications, functions, and usage of the CPU module, refer to the basic manuals.
Read other manuals as well when using a different type of CPU module and its functions.
Order each manual as needed, referring to the following list.
The numbers in the "CPU module" and the respective modules are as follows.
Nunber CPU module
1) Basic model QCPU
2) High Perfomance model QCPU
3) Process CPU
4) Redundant CPU
5) Universal model QCPU
A-14
Related Manuals
Manual name
Description
< Manual number (model code) >
CC-Link IE Controller Network Reference Manual Specifications, procedures and settings before system operation, parameter
< SH-080668ENG (13JV16) > setting, programming, and troubleshooting of the CC-Link IE controller network module
Q Corresponding MELSECNET/H Network System Reference Explains the specifications for a MELSECNET/H network system for PLC to PLC
Manual (PLC to PLC network) network. It explains the procedures and settings up to operation, setting the parame-
< SH-080049 (13JF92) > ters, programming and troubleshooting.
Q Corresponding MELSECNET/H Network System Refer- Explains the specifications for a MELSECNET/H network system for remote I/O
ence Manual (Remote I/O network) network. It explains the procedures and settings up to operation, setting the
< SH-080124 (13JF96) > parameters, programming and troubleshooting.
Type MELSECNET, MELSECNET/B Data Link System
Describes the general concept, specifications, and part names and settings for
Reference Manual
MELSECNET (II) and MELSECNET/B.
< IB-66530 (13JF70) >
Describes various functions of the Ethernet module: e-mail function, PLC CPU
Q Corresponding Ethernet Interface Module
status monitoring, communication via MELSECNET/H or MELSECNET/10 net-
User's Manual (Application)
work system, communication using data link instructions, file transfer (using FTP)
< SH-080010 (13JF70) >
and other functions.
A-15
MEMO
A-16
1
1
GENERAL
DESCRIPTION
1-1
This manual explains the common instructions required for programming of the QCPU.
The common instructions refer to all instructions except those dedicated to special function
modules (such as AJ71QC24 and AJ71PT32-S3) and to AD57 models, as well as PID control
instructions, SFC instructions and ST instructions.
Qn(H)/QnPH/
QnPRHCPU
User's Manual Explains the functions,
(Function Explanation, programming methods,
devices and others that
Program
are necessary to create
Fundamentals) programs with the CPU.
This manual
Describes the instructions Describes the instructions Describes SFC. Describes MELSAP-L. Describes the ST language.
other than those described to perform PID control.
in the manuals on the right.
1-2
(2) Basic model QCPU
1
Qn(H)/QnPH/
2
QnPRHCPU Explains the functions,
User's Manual programming methods,
(Function Explanation, devices and others that
are necessary to create
Program
programs with the CPU.
Fundamentals)
3
This manual
4
QCPU QCPU(Q Mode)/ QCPU(Q Mode)/ QCPU(Q Mode) QCPU(Q Mode)
Programming QnACPU
Programming
QnACPU Programming Programming 4
Manual (Common Programming Manual Manual
Instructions) Manual (PID Manual (SFC) (MELSAP-L) (Structured Text)
Control
6
Instructions)
Describes the instructions Describes the instructions Describes SFC. Describes MELSAP-L. Describes the ST language.
other than those described to perform PID control.
in the manuals on the right.
7
(3) Process CPU and Redundant CPU
8
Qn(H)/QnPH/
QnPRHCPU Explains the functions,
User's Manual programming methods,
(Function Explanation, devices and others that
This manual
Describes the instructions Describes the instructions Describes SFC. Describes MELSAP-L. Describes the ST language.
other than those described to perform process control.
in the manuals on the right.
1-3
(4) Universal model QCPU
QnUCPU
User's Manual Explains the functions,
(Function Explanation, programming methods,
devices and others that
Program
are necessary to create
Fundamentals) programs with the CPU.
This manual
Describes the instructions Describes the instructions Describes SFC. Describes MELSAP-L. Describes the ST language.
other than those described to perform PID control.
in the manuals on the right.
1-4
1.2 Abbreviations and Generic Names
1
This manual uses the generic names and abbreviations shown below to refer to Q series CPU
modules, unless otherwise specified.
* indicates a part of the model or version.
2
Generic term/Abbreviation Description of Generic Name/Abbreviation
■ Series
3
Q series Abbreviation for Mitsubishi MELSEC-Q series programmable controller
1-5
(Continued)
Generic term for Q33B, Q35B, Q38B and Q312B main base units on which CPU module
Q3 B (except Q00JCPU), Q series power supply module, Q series I/O module, and intelligent
function module can be mounted.
Generic term for Q32SB, Q33SB and Q35SB slim type main base units on which Basic
Q3 SB model QCPU (except Q00JCPU), High Performance model QCPU, slim type power supply
module, Q series I/O module, and intelligent function module can be mounted.
Other name for Q38RB redundant power supply main base unit on which CPU module
Q3 RB (except Q00JCPU), redundant power supply module, Q series I/O module, and intelligent
function module can be mounted.
Generic term for the Q38DB and Q312DB type Multiple CPU high speed main base unit on
Q3 DB which CPU module (except the Q00JCPU), Q series power supply module, Q series I/O
module, and intelligent function module can be mounted.
Generic term for Q52B and Q55B extension base unit on which the Q Series I/O and
Q5 B intelligent function module can be mounted.
Generic term for Q63B, Q65B, Q68B and Q612B extension base unit on which Q Series
Q6 B power supply module, I/O module, intelligent function module can be mounted.
Other name for Q68RB redundant power supply extension base unit on whichredundant
Q6 RB power supply module, Q series I/O module, and intelligent function module can be mounted.
Other name for Q65WRB extension base unit for redundant system on which redundant
Q6 WRB power supply module, Q series I/O module, and intelligent function module can be mounted.
Generic term for QA1S65B and QA1S68B extension base units on which AnS Series power
QA1S6 B supply module, I/O module, special function module can be mounted.
Generic term for QA65B and QA68B extension base units on which the A series power
QA6 B supply module, A series I/O modules and special function modules can be mounted.
Generic term for A52B, A55B, and A58B extension base units on which A series I/O module
A5 B and special function module can be mounted without power supply.
Generic term for A62B, A65B, and A68B extension base units on which A series I/O module
A6 B and special function module can be mounted.
QA6ADP+A5 B/A6 B Abbreviation for A large type extension base unit on which QA6ADP is mounted.
■ Network
1-6
(Continued)
1-7
MEMO
1-8
2 INSTRUCTION
TABLES 2
2-1
2.1 Types of Instructions
The major types of CPU module instructions consist of sequence instructions, basic instructions,
application instructions, data link instructions, QCPU instructions and redundant system
instructions. These types of instructions are listed in Table 2.1 below.
BCD BIN conversion Conversion from BCD to BIN and from BIN to BCD
instruction
Basic
Data transfer instruction Transmits designated data 6
instruction
Program branch instruction Program jumps
Program run control instruction Enables or inhibits interrupt programs
I/O refresh Executes partial refresh
Instructions for: Counter increment/decrement, teaching timer, special function timer,
Other convenient instruction
rotary table shortest direction control, etc.
Logical operation instruction Logical operations such as logical sum, logical product, etc.
Rotation instruction Rotation of designated data
Shift instruction Shift of designated data
Bit processing instruction Bit set and reset, bit test, batch reset of bit devices
Data processing instruction 16-bit data searches, data processing such as decoding and encoding
Structure creation instruction Repeated operation, subroutine program calls, indexing in ladder units
Table operation instruction Data table read/write
Buffer memory access
Data read/write from/to an intelligent function module
instruction
Display instruction Print ASCII code, LED character display, etc.
Debugging and failure
Check, status latch, sampling trace, program trace
diagnosis instruction
Conversion between BIN/BCD and ASCII;conversion between BIN and character
Character string processing
string; conversion between floating decimal point data and character strings,
instruction
Application character string processing, etc.
7
instruction Trigonometric functions, conversion between angles and radians, exponential
Special function instruction
operations, automatic logarithms, square roots
Data control instruction Upper and lower limit controls, dead band controls, zone controls
Switching instruction File register block No. switches, designation of file registers and comment files
Reading/writing of the values of year, month, day, hour, minute, second, and day of
the week; addition/subtraction of the values of hour, minute, and second; conversion
Clock instruction of the values of hour, minute, and second into second; comparison between the
values of year, month, and day; and comparison between the values of hour, minute,
and second
Reading of the values of year, month, day, hour, minute, second, millisecond, and
Expansion clock instruction day of the week; addition/subtraction of the values of hour, minute, second, and
millisecond
Peripheral device instruction I/O to peripheral devices
Program control instruction Instructions to switch program execution conditions
Instructions that do not fit in the above categories, such as watchdog timer reset
Other instruction
instructions and timing clock instructions
2-2
Table 2.1 Types of Instructions (Continued)
Reference
Types of Instruction Meaning
Chapter
Link refresh instruction Designated network refresh
Instruction
Routing information read/write 8
for Data Link
instruction
Reads, writes, and registers routing information
2
Multiple
CPU Multiple CPU dedicated
Writing to host CPU shared memory, Reading from other CPU shared memory 9
dedicated
instruction
instruction
3
Multiple CPU
high-speed
transmission
Multiple CPU device write/read
instruction
Writes/reads devices to/from another CPU. 10 4
dedicated
instruction
Redundant
system Instruction for Redundant CPU System switching 11
4
instruction
2-3
2.2 How to Read Instruction Tables
The instruction tables found from Section 2.3 to 2.5 have been made according to the following
format:
+ + S D
BIN (D)+(S) (D) 3 6-16
16-bit
addition +P +P S D
and
subtraction + + S1 S2 D
operations
(S1)+(S2) (D) 4 6-20
+P +P S1 S2 D
1) 2) 3) 4) 5) 6) 7) 8)
Description
1) ..........Classifies instructions according to their application.
2) ..........Indicates the instruction symbol added to the instruction in a program.
Instruction code is built around the 16-bit instruction. The following notations are used to
mark 32-bit instructions, instructions executed only at the leading edge of OFF to ON,
real number instructions, and character string instructions:
• 32-bit instruction ..... The letter "D" is added to the first line of the instruction.
Example + D+
2-4
3) ..........Shows symbol diagram on the ladder.
+ S D + S1 S2 D
D+1
Indicates 32 bits.
D 6
Upper 16 bits Lower 16 bits
8) ..........Indicates the page numbers where the individual instructions are explained.
2-5
2.3 Sequence Instructions
Subset
Execution
Category Symbol Processing Details
Condition
*1: The number of steps may vary depending on the device being used.
2-6
*2: The number of steps may vary depending on the device and type of CPU module being used.
Number of Steps
Device
QCPU
Subset
Execution
Category Symbol Processing Details
Condition
6
• AND between logical blocks
ANB
ANB (Series connection between logical blocks)
*1: The number of steps may vary depending on the device and type of CPU module being used.
2-7
2.3.3 Output instructions
Subset
Execution
Category Symbol Processing Details
Condition
5-20
5-22
OUT • Device output *1 -
5-26
5-28
*2 5-30
SET SET D • Sets device *1 -
5-35
*2 5-32
RST RST D • Resets device *1 -
5-35
Output
• Generates 1 cycle program pulse at leading
PLS PLS D
edge of input signal.
2 - 5-37
• Generates 1 cycle program pulse at trailing
PLF PLF D
edge of input signal.
DELTA DELTA D
• Pulse conversion of direct output 2 - 5-42
DELTAP DELTAP D
*1: The number of steps may vary depending on the device being used. See description pages of individual
instructions for number of steps.
*2: The execution condition applies only when an annunciator (F) is in use.
Subset
Execution
Category Symbol Processing Details
Condition
SFT SFT D
Shift • 1-bit shift of device 2 - 5-44
SFTP SFTP D
2-8
2.3.5 Master control instructions
Subset
Execution
Category Symbol Processing Details
Condition
3
4
2.3.6 Termination instructions
Subset
Execution
Category Symbol Processing Details
Condition
8
FEND FEND • Termination of main program 5-51
Termination 1 -
END END • Termination of sequence program 5-53
Subset
Execution
Category Symbol Processing Details
Condition
2-9
2.4 Basic instructions
Subset
Execution
Category Symbol Processing Details
Condition
LD= S1 S2
• Conductive status when (S1) (S2)
AND= S1 S2
• Non-conductive status when 3
(S1) (S2)
OR=
S1 S2
LD<> S1 S2
• Conductive status when (S1) (S2)
AND<> S1 S2
• Non-conductive status when 3
(S1) (S2)
OR<>
S1 S2
LD> S1 S2
• Conductive status when (S1) (S2)
AND> S1 S2
• Non-conductive status when 3
(S1) (S2)
OR>
BIN 16-bit S1 S2
data 6-2
comparisons LD<= S1 S2
• Conductive status when (S1) (S2)
AND<= S1 S2
• Non-conductive status when 3
(S1) (S2)
OR<=
S1 S2
LD< S1 S2
• Conductive status when (S1) (S2)
AND< S1 S2
• Non-conductive status when 3
(S1) (S2)
OR<
S1 S2
LD>= S1 S2
• Conductive status when (S1) (S2)
AND>= S1 S2
• Non-conductive status when 3
(S1) (S2)
OR>=
S1 S2
2-10
Table 2.10 Comparison Operation Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
2
LDD= D S1 S2
• Conductive status when
3
ANDD= D S1 S2 (S1+1, S1) (S2+1, S2)
*1
• Non-Conductive status when
ORD= (S1+1, S1) (S2+1, S2) 4
D S1 S2
LDD<> D S1 S2
ANDD<> D S1 S2
• Conductive status when
(S1+1, S1) (S2+1, S2)
4
*1
• Non-Conductive status when
ORD<> (S1+1, S1) (S2+1, S2)
D S1 S2 6
LDD> D S1 S2
• Conductive status when
ANDD> D S1 S2 (S1+1, S1) (S2+1, S2)
• Non-Conductive status when
*1 7
ORD> (S1+1, S1) (S2+1, S2)
BIN 32-bit D S1 S2
data
comparisons LDD<= D S1 S2
6-4
8
• Conductive status when
ANDD<= D S1 S2 (S1+1, S1) (S2+1, S2)
*1
• Non-Conductive status when
ORD<= (S1+1, S1) (S2+1, S2)
D S1 S2
LDD>= D S1 S2
• Conductive status when
ANDD>= D S1 S2 (S1+1, S1) (S2+1, S2)
*1
• Non-Conductive status when
ORD>= (S1+1, S1) (S2+1, S2)
D S1 S2
*1: The number of steps may vary depending on the device and type of CPU module being used.
Number of
Component Device
Steps
• Word device: Internal device (except for file register ZR)
High Performance model QCPU • Bit device: Devices whose device Nos. are multiples of 16, whose digit
5 Note 1)
Process CPU designation is K8, and which use no Indexing.
• Constant: No limitations
Redundant CPU
Devices other than above 3 Note 2)
Basic model QCPU
All devices that can be used 3 Note 2)
Universal model QCPU
Note 1) When using a High Performance model QCPU, Process CPU or Redundant CPU,
the number of steps increases but the processing speed becomes faster.
Note 2) The number of steps may increase due to the conditions described in Section 3.8.
2-11
Table 2.10 Comparison Operation Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
LDE= E S1 S2
• Conductive status when
ANDE= E S1 S2 (S1+1, S1) (S2+1, S2)
3 -
• Non-Conductive status when
LDE<> E S1 S2
• Conductive status when
ANDE<> E S1 S2 (S1+1, S1) (S2+1, S2)
3 -
• Non-Conductive status when
LDE> E S1 S2
• Conductive status when
ANDE> E S1 S2 (S1+1, S1) (S2+1, S2)
3 -
Floating • Non-Conductive status when
decimal ORE> (S1+1, S1) (S2+1, S2)
point data
E S1 S2
6-6
comparisons
LDE<= E S1 S2
(Single • Conductive status when
precision) ANDE<= E S1 S2 (S1+1, S1) (S2+1, S2)
3 -
• Non-Conductive status when
LDE< E S1 S2
• Conductive status when
ANDE< E S1 S2 (S1+1, S1) (S2+1, S2)
3 -
• Non-Conductive status when
LDE>= E S1 S2
• Conductive status when
ANDE>= E S1 S2 (S1+1, S1) (S2+1, S2)
3 -
• Non-Conductive status when
2-12
Table 2.10 Comparison Operation Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
2
2-13
Table 2.10 Comparison Operation Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
*2: The conditions under which character string comparisons can be made are as shown below:
• Match: All characters in the strings must match
• Larger string: If character strings are different, determines the string with the largest number of
character codes. If the lengths of the character strings are different, determines the
longest character string.
• Smaller string: If the character strings are different, determines the string with the smallest number of
character codes.
If the lengths of the character strings are different, determines the shortest character
string.
2-14
Table 2.10 Comparison Operation Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
2
BKCMP= BKCMP S1 S2 D n 3
BKCMP<> BKCMP S1 S2 D n
BKCMP> BKCMP S1 S2 D n 4
BKCMP<= BKCMP S1 S2 D n
BKCMP< BKCMP S1 S2 D n
• This instruction compares BIN 16-bit
data stored in n-point devices starting
4
BIN 16-bit from the device specified by S1 with
BKCMP>= BKCMP S1 S2 D n
Block BIN 16-bit data stored in n-point
5 - 6-15
data
comparisons
BKCMP=P BKCMP P S1 S2 D n
devices starting from the device
specified by S2, and then stores the
6
result into the nth device specified by
BKCMP<>P BKCMP P S1 S2 D n (D) and up.
BKCMP>P BKCMP P S1 S2 D n 7
BKCMP<=P BKCMP P S1 S2 D n
BKCMP<P BKCMP P S1 S2 D n 8
BKCMP>=P BKCMP P S1 S2 D n
DBKCMP= DBKCMP S1 S2 D n
DBKCMP> DBKCMP S1 S2 D n
DBKCMP<= DBKCMP S1 S2 D n
• This instruction compares BIN 32-bit
DBKCMP< DBKCMP S1 S2 D n data stored in n-point devices starting
BIN from the device specified by S1 with
DBKCMP>= DBKCMP S1 S2 D n
32-bit block BIN 32-bit data stored in n-point
5 - 6-18
data devices starting from the device
DBKCMP=P DBKCMP P S1 S2 D n
comparisons specified by a constant and S2, and
DBKCMP<>P then stores the result into the nth
DBKCMP P S1 S2 D n
device specified by (D) and up.
DBKCMP>P DBKCMP P S1 S2 D n
DBKCMP<=P DBKCMP P S1 S2 D n
DBKCMP<P DBKCMP P S1 S2 D n
DBKCMP>=P DBKCMP P S1 S2 D n
2-15
2.4.2 Arithmetic operation instructions
Subset
Execution
Category Symbol Processing Details
Condition
+ + S D
• (D)+(S) (D) 3 6-22
+P +P S D
+ + S1 S2 D
BIN 16-bit • (S1)+(S2) (D) 4 6-24
+P +P S1 S2 D
addition and
subtraction
- S D
operations
• (D) (S) (D) 3 6-22
-P P S D
- S1 S2 D
• (S1) (S2) (D) 4 6-24
-P P S1 S2 D
D+ D+ S D
• (D+1, D)+(S+1, S) (D+1, D) *1 6-26
D+P D+P S D
D+ D+ S1 S2 D
BIN 32-bit • (S1+1, S1)+(S2+1, S2) (D+1, D) *2 6-28
D+P D+P S1 S2 D
addition and
subtraction
D- D S D
operations *1 6-26
• (D+1, D) (S+1, S) (D+1, D)
D-P D P S D
D- D S1 S2 D
• (S1+1, S1) (S2+1, S2) (D+1, D) *2 6-28
D-P D P S1 S2 D
* * S1 S2 D
• (S1) (S2) (D+1,D) *3
BIN 16-bit
*P S1 S2 D
multiplication
6-30
and division
/ / S1 S2 D
operations • (S1) / (S2)
*4
Quotient(D), Remainder (D+1)
/P /P S1 S2 D
D* S1 S2 D
• (S1+1,S1) (S2+1,S2) (D+3,D+2,D+1,D) *4
BIN 32-bit
D*P S1 S2 D
multiplication
6-32
and division • (S1+1, S1) / (S2+1, S2)
D/ D/ S1 S2 D
operations *4
Quotient (D+1, D), Remainder (D+3,
D/P D/P S1 S2 D D+2)
2-16
*1: The number of steps may vary depending on the device and type of CPU module being used.
Number of
Component Device
Steps
• Word device: Internal device (except for file register ZR)
High Performance model QCPU • Bit device: Devices whose device Nos. are multiples of 16, whose digit
5 Note 1)
designation is K8, and which use no indexing.
Process CPU
Redundant CPU
• Constant: No limitations 2
Devices other than above Note 2)
3
Basic model QCPU
Universal model QCPU
All devices that can be used 3 Note 2) 3
Note 1) When using a High Performance model QCPU, Process CPU or Redundant CPU,
the number of steps increases but the processing speed becomes faster.
Note 2) The number of steps may increase due to the conditions described in Section 3.8. 4
*2: The number of steps may vary depending on the device and type of CPU module being used.
Number of
4
Component Device
Steps
• Word device: Internal device (except for file register ZR)
High Performance model QCPU • Bit device: Devices whose device Nos. are multiples of 16, whose digit
6 Note 1)
6
Process CPU designation is K8, and which use no indexing.
• Constant: No limitations
Redundant CPU
Devices other than above 4 Note 2)
7
Basic model QCPU 4 Note 2)
All devices that can be used
Universal model QCPU 3 Note 2)
Note 1) When using a High Performance model QCPU, Process CPU or Redundant CPU,
8
the number of steps increases but the processing speed becomes faster.
Note 2) The number of steps may increase due to the conditions described in Section 3.8.
*3: The number of steps may vary depending on the device and type of CPU module being used.
Note 1) The number of steps may increase due to the conditions described in Section 3.8.
*4: The number of basic steps is three for the Universal model QCPU only.
2-17
Table 2.11 Arithmetic Operation Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
B+ B+ S D
• (D)+(S) (D) 3 6-34
B+P B+P S D
B+ B+ S1 S2 D
BCD 4-digit 4 - 6-36
• (S1)+(S2) (D)
addition B+P B+P S1 S2 D
and
subtraction B- B S D
operations • (D) (S) (D) 3 6-34
B-P B P S D
B- B S1 S2 D
• (S1) (S2) (D) 4 - 6-36
B-P B P S1 S2 D
DB+ DB+ S D
• (D+1, D)+(S+1, S) (D+1, D) 3 - 6-38
DB+P DB+P S D
DB+ DB+ S1 S2 D
BCD 8-digit 4 - 6-40
• (S1+1, S1)+(S2+1, S2) (D+1, D)
addition DB+P DB+P S1 S2 D
and
subtraction DB- DB S D
operations • (D+1, D) (S+1, S) (D+1, D) 3 - 6-38
DB-P DB P S D
DB- DB S1 S2 D
• (S1+1, S1) (S2+1, S2) (D+1, D) 4 - 6-40
DB-P DB P S1 S2 D
B* B S1 S2 D
BCD 4-digit 4
• (S1) (S2) (D+1,D)
multiplication B*P B P S1 S2 D
and 6-42
division B/ B/ S1 S2 D • (S1) / (S2)
operations 4
Quotient(D), Remainder (D+1)
B/P B/P S1 S2 D
DB* DB S1 S2 D
BCD 8-digit • (S1+1,S1) (S2+1,S2)
4 -
multiplication DB*P (D+3,D+2,D+1,D)
DB P S1 S2 D
and 6-44
division DB/ DB/ S1 S2 D • (S1+1, S1) / (S2+1, S2)
operations Quotient (D+1, D), 4
DB/P DB/P S1 S2 D Remainder (D+3, D+2)
2-18
Table 2.11 Arithmetic Operation Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
2
E+ E+ S D 3
• (D+1, D)+(S+1, S) (D+1, D) 3 6-46
E+P *6
E+P S D
Floating
decimal
point data
E+ E+ S1 S2 D
4
4
• (S1+1, S1)+(S2+1, S2) (D+1, D) 6-48
*5 *6
addition E+P E+P S1 S2 D
and
subtraction E- E S D 4
operations • (D+1, D) (S+1, S) (D+1, D) 3 6-46
E-P *6
(Single E P S D
precision)
E- E S1 S2 D
4
6
• (S1+1, S1) (S2+1, S2) (D+1, D) 6-48
*5 *6
E-P E P S1 S2 D
*5: The number of basic steps is three for the Universal model QCPU only.
*6: The subset is effective only with Universal model QCPU.
2-19
Table 2.11 Arithmetic Operation Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
INC INC D
• (D)+1 (D) 2 6-69
INCP INCP D
DINC DINC D
• (D+1, D)+1 (D+1, D) *7 6-71
DINCP DINCP D
BIN data
increment
DEC DEC D
• (D) 1 (D) 2 6-69
DECP DECP D
DDEC DDEC D
• (D+1, D) 1 (D+1, D) *7 6-71
DDECP DDECP D
2-20
*7: The number of steps may vary depending on the device and type of CPU module being used.
Number of
Component Device
Steps
• Word device: Internal device (except for file register ZR)
High Performance model QCPU • Bit device: Devices whose device Nos. are multiples of 16, whose digit
3 Note 1)
designation is K8, and which use no indexing.
Process CPU
Redundant CPU
• Constant: No limitations 2
Devices other than above Note 2)
2
Basic model QCPU
Universal model QCPU
All devices that can be used 2 Note 2) 3
Note 1) When using a High Performance model QCPU, Process CPU or Redundant CPU,
the number of steps increases but the processing speed becomes faster.
Note 2) The number of steps may increase due to the conditions described in Section 3.8. 4
2-21
2.4.3 Data conversion instructions
Subset
Execution
Category Symbol Processing Details
Condition
BIN 6-83
DINT DINT S D Conversion to BIN
conversions (S+1, S) (D+1, D) 3
(Single Real number (-2147483648 to *1 *2
DINTP DINTP S D
precision) 2147483647)
*1: The number of basic steps is two for the Universal model QCPU only.
*2: The subset is effective only with Universal model QCPU.
2-22
Table 2.12 Data Conversion Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
2
BIN
DBL DBL S D Conversion 3
(S) (D+1, D) 3 - 6-88
16-bit DBLP DBLP S D BIN (-32768 to 32767)
EDNEG EDNEG D
(D+3, D+2, D+1, D) (D+3, D+2, D+1, D)
3 - 6-97
EDNEGP Real number data
EDNEGP D
Floating-point ECON
ECON S D
Single precision Conversion to double precision
(S+1, S) (D+3, D+2, D+1, D) 3 - 6-102
ECONP ECONP S D 32-bit floating-point real number
Double precision
Floating-point EDCON
EDCON S D
Double precision Conversion to single precision
(S+3, S+2, S+1, S) (D+1, D) 3 - 6-104
EDCONP EDCONP S D 64-bit floating-point real number
Single precision
2-23
2.4.4 Data transfer instructions
Subset
Execution
Category Symbol Processing Details
Condition
MOV MOV S D *4
16-bit data
(S) ( D)
transfer
MOVP MOVP S D *1
6-106
DMOV DMOV S D
32-bit data
(S+1,S) (D+1,D) *2
transfer
DMOVP DMOVP S D
Floating
EMOV EMOV S D
decimal
point data (S+1, S) (D+1, D) *2 6-108
transfer Real number data *3
EMOVP EMOVP S D
(Single
precision)
Floating
decimal EDMOV EDMOV S D
point data (S+3, S+2, S+1, S) (D+3, D+2, D+1, D)
2 6-110
transfer Real number data *3
(Double EDMOVP EDMOVP S D
precision)
XCH XCH D1 D2
16-bit data
(D1) (D2) 3
exchange
XCHP XCHP D1 D2
6-122
DXCH DXCH D1 D2
32-bit data
(D1+1,D1) (D2+1,D2) 3
exchange
DXCHP DXCHP D1 D2
2-24
Table 2.13 Data Transfer Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
2
Block data
BXCH BXCH S D n (S) (D) 3
4 - 6-126
exchange n
BXCHP BXCHP S D n
Component Device
Number of 6
Steps
• Word device: Internal device (except for file register ZR)
• Bit device: Devices whose device Nos. are multiples of 16, whose digit
designation is K4, and which use no indexing.
2 7
QCPU
• Constant: No limitations
Devices other than above 3 Note 1)
8
Note 1) The number of steps may increase due to the conditions described in Section 3.8.
*2: The number of steps may vary depending on the device and type of CPU module being used.
Number of
Note 1) The number of steps may increase due to the conditions described in Section 3.8.
2-25
*3: The subset is effective only with QCPU.
*4: The number of steps may vary depending on the device and type of CPU module being used.
Number of
Component Device
Steps
• Word device: Internal device (except for file register ZR)
• Bit device: Devices whose device Nos. are multiples of 16, whose digit
2
QCPU designation is K4, and which use no indexing.
• Constant: No limitations
Devices other than above 3 Note 1)
Note 1) The number of steps may increase due to the conditions described in Section 3.8.
2-26
2.4.5 Program branch instructions
Table 2.14 Program Branch Instructions
Subset
Execution
Category Symbol Processing Details
Condition
3
• Jumps to Pn when input conditions are
CJ CJ Pn 2
met.
• Jumps to Pn from the scan after the
4
SCJ SCJ Pn 2 6-129
meeting of input condition.
Jump
JMP • Jumps unconditionally to Pn. 2
JMP Pn
4
• Jumps to END instruction when input
GOEND GOEND 1 - 6-132
condition is met.
6
2.4.6 Program execution control instructions
Table 2.15 Program Execution Control Instructions
7
Subset
Execution
Category Symbol Processing Details
Condition
Subset
Execution
Category Symbol Processing Details
Condition
RFS RFS S n
I/O • Refreshes the relevant I/O area during
3 - 6-141
Refresh scan.
RFSP RFSP S n
2-27
2.4.8 Other convenient instructions
Subset
Execution
Category Symbol Processing Details
Condition
(S)+0
(S)+1 Up Down Up
UDCNT1 UDCNT1 S D n Present Cn value 0 1 2 3 4 5 6 7 6 5 4 3 2 1 0 -1 -2 -3 -2 -1 0
4 - 6-143
Cn contact
Up/Down
counter (S)+0
(S)+1
UDCNT2 UDCNT2 S D n Present Cn value 0 1 2 3 4 5 4 3 2 1 0 -1
4 - 6-146
Cn contact
Pulse n1
width PWM PWM n1 n2 D n2 4 - 6-164
modulation
(D)
2-28
2.5 Application Instructions
1
2.5.1 Logical operation instructions
Table 2.18 Logical Operation Instructions 2
Subset
Execution
Category Symbol Processing Details
Condition
4
WAND WAND S D
WANDP WANDP S D
(D) (S) (D) 3 7-3
2
WAND WAND S1 S2 D
4
WANDP WANDP S1 S2 D
(S1) (S2) (D)
*1
7-6
6
DAND DAND S D
Logical
product
DANDP DANDP S D
(D+1,D) (S+1,S) (D+1,D) *2 7-3
7
DAND DAND S1 S2 D
DANDP DANDP S1 S2 D
(S1+1,S1) (S2+1,S2) (D+1,D) *3 7-6
8
BKAND BKAND S1 S2 D n (S1) (S2) (D)
5 - 7-9
BKANDP n
BKANDP S1 S2 D n
WOR WOR S1 S2 D
4
(S1) (S2) (D) 7-14
*1
WORP WORP S1 S2 D
DOR DOR S D
Logical
(D+1,D) (S+1,S) (D+1,D) *2 7-11
sum
DORP DORP S D
DOR DOR S1 S2 D
(S1+1,S1) (S2+1,S2) (D+1,D) *3 7-14
DORP DORP S1 S2 D
WXOR WXOR S D
(D) (S) (D) 3 7-19
WXORP WXORP S D
WXOR WXOR S1 S2 D
Exclusive 4
(S1) (S2) (D) 7-22
OR *1
WXORP WXORP S1 S2 D
DXOR DXOR S D
(D+1,D) (S+1,S) (D+1,D) *2 7-19
DXORP DXORP S D
2-29
Table 2.18 Logical Operation Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
DXOR DXOR S1 S2 D
(S1+1,S1) (S2+1,S2) (D+1,D) *3 7-22
DXORP DXORP S1 S2 D
Exclusive
OR
BKXOR BKXOR S1 S2 D n (S1) (S2) (D)
5 - 7-25
BKXORP n
BKXORP S1 S2 D n
WXNR WXNR S D
(D) (S) (D) 3 7-27
WXNRP WXNRP S D
WXNR WXNR S1 S2 D
4
(S1) (S2) (D) 7-30
*1
WXNRP WXNRP S1 S2 D
NON
DXNR DXNR S D
exclusive
(D+1,D) (S+1,S) (D+1,D) *2 7-27
logical
DXNRP DXNRP S D
sum
DXNR DXNR S1 S2 D
(S1+1,S1) (S2+1,S2) (D+1,D) *3 7-30
DXNRP DXNRP S1 S2 D
2-30
*1: The number of basic steps is three for the Universal model QCPU only.
*2: The number of steps may vary depending on the device and type of CPU module being used.
Component Device
Number of 1
Steps
• Word device: Internal device (except for file register ZR)
High Performance model QCPU • Bit device: Devices whose device Nos. are multiples of 16, whose digit
designation is K8, and which use no indexing.
5 Note 1) 2
Process CPU
Redundant CPU • Constant: No limitations
Devices other than above 3 Note 2)
Basic model QCPU
4
All devices that can be used 3 Note 2)
Universal model QCPU
Note 1) When using a High Performance model QCPU, Process CPU or Redundant CPU,
the number of steps increases but the processing speed becomes faster.
4
Note 2) The number of steps may increase due to the conditions described in Section 3.8.
*3: The number of steps may vary depending on the device and type of CPU module being used.
2
Number of
Component Device
Steps
• Word device: Internal device (except for file register ZR)
6
High Performance model QCPU • Bit device: Devices whose device Nos. are multiples of 16, whose digit
6 Note 1)
Process CPU designation is K8, and which use no indexing.
Redundant CPU • Constant: No limitations 7
Devices other than above Note 2)
4
Basic model QCPU 4 Note 2)
Universal model QCPU
All devices that can be used
3 Note 2)
8
Note 1) When using a High Performance model QCPU, Process CPU or Redundant CPU,
the number of steps increases but the processing speed becomes faster.
Note 2) The number of steps may increase due to the conditions described in Section 3.8.
2-31
2.5.2 Rotation instructions
Subset
Execution
Category Symbol Processing Details
Condition
2-32
2.5.3 Shift instructions
Table 2.20 Shift Instructions 1
Subset
Execution
Category Symbol Processing Details
Condition
4
SFR SFR D n b15 bn b0
Carry flag 3 4
SFRP SFRP D n b15 b0 SM700
n-bit shift
0 to 0
of 16-bit 7-46
data SFL SFL D n b15 bn b0 2
3
Carry flag
SFLP SFLP D n SM700 b15 b0
0 to 0
n
6
BSFR BSFR D n
(D)
Carry flag 3 -
Carry flag
(D)
3 - 8
BSFLP BSFLP D n SM700
0
SFTBR SFTBR D n1 n2 n1
n2
n
DSFR DSFR D n
(D)
3
1-word DSFRP DSFRP D n
shift of 0
7-54
n-words n
DSFL DSFL D n
data
(D)
3
DSFLP DSFLP D n
0
n1
SFTWR SFTWR D n1 n2 n2
(D) 4 -
n-words SFTWRP SFTWRP D n1 n2
shift of 0 0
7-56
n-words n1
SFTWL SFTWL D n1 n2
data n2
(D)
4 -
SFTWLP SFTWLP D n1 n2
0 0
2-33
2.5.4 Bit processing instructions
Table 2.21 Bit Processing Instructions
Subset
Execution
Category Symbol Processing Details
Condition
TEST (S1)
TEST S1 S2 D b15 to b0 (D)
4 -
TESTP TESTP S1 S2 D Bit designated by (S2)
Bit tests 7-61
DTEST DTEST S1 S2 D (S1)
b31 to b0 (D)
4 -
DTESTP DTESTP S1 S2 D
Bit designated by (S2)
2-34
2.5.5 Data processing instructions
1
Table 2.22 Data Processing Instructions
Subset
Execution
Category Symbol Processing Details
Condition
4
(S2)
SER SER S1 S2 D n (S1)
n 4
5 -
(D): Match No.
SERP SERP S1 S2 D n (D + 1): Number of matches
Data
searches 32 bits
7-66 2
DSER DSER S1 S2 D n (S2)
(S1)
n
5 -
DSERP DSERP S1 S2 D n
(D): Match No.
(D + 1): Number of matches
6
SUM SUM S D (S)
7
b15 b0
3
SUMP SUMP S D (D): Number of 1s
Bit checks 7-69
DSUM DSUM S D (S + 1) (S)
3 8
DSUMP DSUMP S D (D): Number of 1s
2-35
Table 2.22 Data Processing Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
2-36
Table 2.22 Data Processing Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
2
SORT S1 n S2 D1 D2
• Sorts data of n points from device
4
· S2: Number of comparisons to be
SORT made during a single run designated by (S1) in 16-bit units.
· D1: Device to be turned ON at the
completion of sort (n x (n-1)/2 scans required)
· D2: For system use 4
Sort 6 - 7-95
DSORT S1 n S2 D1 D2
· S2: Number of comparisons to be • Sorts data of 2n points from device
DSORT made during a single run
· D1: Device to be turned ON at the
designated by (S1) in 32-bit units.
(n x (n-1)/2 scans required)
2
completion of sort
· D2: For system use
2-37
2.5.6 Structure creation instructions
Subset
Execution
Category Symbol Processing Details
Condition
FOR FOR n 2 -
• Executes n times between the FOR
7-105
NEXT and NEXT . 1 -
NEXT
Number of
repeats
BREAK BREAK D Pn
• Forcibly ends the execution of the FOR
3 - 7-108
BREAKP to NEXT cycle and jumps pointer Pn.
BREAKP D Pn
CALL Pn
CALL
• Executes subroutine program Pn when *1
CALL Pn S1 Sn
input condition is met. (S1 to Sn are 2
7-110
arguments sent to subroutine program. + *3
CALLP Pn
n 5) n
CALLP
CALLP Pn S1 Sn
FCALL Pn
FCALL • Performs non-execution processing of *1
ECALL Pn
ECALLP
n 5)
ECALLP Pn S1 Sn
: File name
2-38
Table 2.23 Structure Creation Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
2
EFCALL Pn 4
EFCALL • Performs non-execution processing of *2
EFCALL Pn S1toSn
subroutine program Pn if input 3
:File name
conditions have not been met. (S1 to + - 7-125 4
EFCALLP Pn Sn are arguments sent to subroutine n
EFCALLP program. N 5)
Subroutine
program
EFCALLP Pn S1toSn
2
:File name
calls
• Executes subroutine program Pn when
input condition is met.
• Performs non-execution processing of
*1 6
2
XCALL XCALL Pn S1 Sn subroutine program Pn if input - 7-129
+
conditions have not been met. (S1 to
Sn are arguments sent to subroutine
n
7
program. N 5)
• Performs auto refresh of intelligent
COM COM
function modules, link refresh, auto
1 - 7-134 8
refresh of CPU shared memory, and
communications with peripherals.
Select
• Performs auto refresh of intelligent
refresh CCOM CCOM 1 - 7-141
function modules, auto refresh of CPU
shared memory, and communications
IX IX S 2 -
• Perform indexing for individual devices
Device indexing ladder 7-144
used in device indexing ladder.
IXEND
IXEND 1 -
Fixed
indexing
IXDEV IXDEV 1 -
• Stores indexing value used for indexing
IXSET S D performed between the IX and IXEND 7-148
IXSET to the device designated by D or later. 3 -
Designates indexing value.
2-39
2.5.7 Data table operation instructions
Subset
Execution
Category Symbol Processing Details
Condition
4 -
FDELP FDELP S D n
Designated by n
7-157
FINS FINS S D n (S) (D) Pointer Pointer + 1
4 -
FINSP FINSP S D n
Designated by n
2-40
2.5.8 Buffer memory access instructions
1
Table 2.25 Buffer Memory Access Instructions
Subset
Execution
Category Symbol Processing Details
Condition
4
8
2.5.9 Display instructions
Subset
Execution
Category Symbol Processing Details
Condition
2-41
2.5.10 Debugging and failure diagnosis instructions
Subset
Execution
Category Symbol Processing Details
Condition
2-42
2.5.11 Character string processing instructions
1
Table 2.28 Character String Processing Instructions
Subset
Execution
Category Symbol Processing Details
Condition
4
• Converts 1-word BIN value designated
BINDA BINDA S D
by (S) to a 5-digit, decimal ASCII value,
3 -
4
and stores it at the word device
BIN BINDAP BINDAP S D
designated by (D).
2-43
Table 2.28 Character String Processing Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
Floating
ESTR ESTR S1 S2 D • Converts the 32-bit floating decimal point
decimal point
data designated by (S) to a character
4 - 7-217
string, and stores it in devices
Character designated by (D).
ESTRP ESTRP S1 S2 D
string
Character
EVAL EVAL S D • Converts the character string designated
string
by (S) to a 32-bit floating decimal point
3 - 7-224
data, and stores it in devices designated
Floating by (D).
EVALP EVALP S D
decimal point
2-44
Table 2.28 Character String Processing Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
2
Hexadecimal
ASC ASC S D n
• Converts the 1-word BIN value at the
device numbers designated by (S) to
4
BIN
hexadecimal ASCII, and stores n 4 - 7-228
ASCP ASCP S D n characters of them at the device numbers
ASCII designated by (D) and after. 4
ASCII • Converts n hexadecimal ASCII
HEX HEX S D n characters of the device numbers
designated by (S) and after to BIN 4 - 7-230
Hexadecimal
HEXP HEXP S D n
values, and stores them at the device 2
BIN numbers designated by (D).
MIDR MIDR S1 D S2
• Stores the designated number of
characters in the character string
8
designated by (S1) from the position
MIDRP MIDRP S1 D S2 designated by (S2) at the device
designated by (D). 4 - 7-235
Character
2-45
2.5.12 Special function instructions
Subset
Execution
Category Symbol Processing Details
Condition
SIN SIN S D
Sin (S+1,S) (D+1,D) 3 - 7-250
SINP SINP S D
COS COS S D
Cos(S+1,S) (D+1,D) 3 - 7-254
COSP COSP S D
TAN TAN S D
Trigonometric 3 - 7-258
Tan(S+1,S) (D+1,D)
functions TANP TANP S D
(Floating-
point single- ASIN ASIN S D
precision) Sin -1 (S+1,S) (D+1,D) 3 - 7-262
ASINP ASINP S D
ACOS ACOS S D
Cos-1(S+1,S) (D+1,D) 3 - 7-267
ACOSP ACOSP S D
ATAN ATAN S D
Tan-1(S+1,S) (D+1,D) 3 - 7-271
ATANP ATANP S D
SIND SIND S D
Sin(S+3, S+2, S+1, S) 3 - 7-252
(D+3, D+2, D+1, D)
SINDP SINDP S D
COSD COSD S D
Cos(S+3, S+2, S+1, S) 3 - 7-256
(D+3, D+2, D+1, D)
COSDP COSDP S D
TAND TAND S D
Trigonometric Tan(S+3, S+2, S+1, S) 3 - 7-260
functions (D+3, D+2, D+1, D)
TANDP TANDP S D
(Floating-
point double- ASIND ASIND S D -1
Sin (S+3, S+2, S+1, S) 3 - 7-265
precision) (D+3, D+2, D+1, D)
ASINDP ASINDP S D
ACOSD ACOSD S D -1
Cos (S+3, S+2, S+1, S) 3 - 7-269
(D+3, D+2, D+1, D)
ACOSDP ACOSDP S D
ATAND ATAND S D -1
Tan (S+3, S+2, S+1, S) 3 - 7-273
(D+3, D+2, D+1, D)
ATANDP ATANDP S D
2-46
Table 2.29 Special Function Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
2
RADD RADD S D
(S+3, S+2, S+1, S) (D+3, D+2, D+1, D)
4
Angles 3 - 7-277
RADDP RADDP S D Conversion from angle to radian
DEGD DEGD S D
(S+3, S+2, S+1, S) (D+3, D+2, D+1, D)
6
3 - 7-281
DEGDP DEGDP S D Conversion from radian to angle
SQR SQR S D 7
(S+1,S) (D+1,D) 3 - 7-287
SQRP SQRP S D
Square root
SQRD SQRD S D 8
(S+3, S+2, S+1, S) (D+3, D+2, D+1, D) 3 - 7-289
SQRDP SQRDP S D
EXP EXP S D
e(S+1,S) (D+1,D) 3 - 7-291
LOG LOG S D
Loge (S+1,S) (D+1,D) 3 - 7-296
LOGP LOGP S D
Natural
logarithms
LOGD LOGD S D
Loge(S+3, S+2, S+1, S) (D+3, D+2, D+1, D) 3 - 7-298
LOGDP LOGDP S D
POW POW S1 S2 D
(S2+1,S2)
• (S1+1,S1) (D+1,D) 4 - 7-300
POWP POWP S1 S2 D
Expone
ntiation
POWD POWD S1 S2 D
(S2+3,S2+2,S2+1,S2)
• (S1+3,S1+2,S1+1,S1) (D+3,D+2,D+1,D) 4 - 7-302
POWDP POWDP S1 S2 D
LOG10 LOG10P
LOG10 S D
• log10(S+1,S) (D+1,D) 3 - 7-300
LOG10P LOG10P S D
Common
logarithm
LOG10D LOG10D S D
• log10(S+3,S+2S+1,S) (D+3,D+2,D+1,D) 3 - 7-302
LOG10DP LOG10DP S D
2-47
Table 2.29 Special Function Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
BSQR BSQR S D
(S) (D)+0 Integer part
3 -
+1 Decimal fraction part
BSQRP BSQRP S D
Square root 7-306
BDSQR BDSQR S D (S+1, S) (D)+0 Integer part
+1 Decimal fraction part
3 -
BDSQRP BDSQRP S D
2-48
2.5.13 Data control instructions
1
Table 2.30 Data Control Instructions
Subset
Execution
Category Symbol Processing Details
Condition
4
LIMIT LIMIT S1 S2 S3 D
• When (S3) (S1)
......... Stores value of (S1) at (D)
4
• When (S1) (S3) (S2)
5 -
......... Stores value of (S3) at (D)
LIMITP LIMITP S1 S2 S3 D • When (S2) (S3) 2
Upper and ......... Stores value of (S2) at (D)
lower
7-321
limit
controls DLIMIT DLIMIT S1 S2 S3 D
• When ((S3)+1, (S3)) ((S1)+1, S1) 6
.. Stores value of ((S1)+1, (S1)) at ((D)+1, (D))
• When ((S1)+1, (S1)) ((S3)+1, (S3))
(S2+1, S2) 5 -
.. Stores value of ((S3)+1, (S3)) at ((D)+1, (D)) 7
DLIMITP DLIMITP S1 S2 S3 D • When ((S2), (S2)+1) ((S3), (S3)+1)
.. Stores value of ((S2)+1, (S2)) at ((D)+1, (D))
Dead
• When ((S1)+1, (S1)) ((S3)+1, (S3))
2-49
Table 2.30 Special Function Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
2-50
2.5.14 Switching instructions
1
Table 2.31 Switching Instructions
Subset
Execution
Category Symbol Processing Details
Condition
4
Block
number
RSET RSET S
• Converts extension file register block
2 - 7-337
4
number to number designated by (S).
switching RSETP RSETP S
2-51
2.5.15 Clock instructions
Subset
Execution
Category Symbol Processing Details
Condition
2-52
Table 2.32 Character String Processing Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
2
LDDT= DT S1 S2 n 4
S1 Year S2 Year
ANDDT= DT S1 S2 n Companson
S1 +1 Month S2 +1 Month 4 -
4
operation resuit
S1 +2 Day S2 +2 Day
ORDT=
DT S1 S2 n
LDDT<> DT S1 S2 n 2
S1 Year S2 Year
ANDDT<> DT S1 S2 n Companson
S1 +1 Month S2 +1 Month operation resuit
4 -
S1 +2 Day S2 +2 Day
6
ORDT<>
DT S1 S2 n
LDDT< DT S1 S2 n
7
S1 Year S2 Year
ANDDT< DT S1 S2 n Companson
S1 +1 Month S2 +1 Month operation resuit
4 -
ORDT<
S1 +2 Day S2 +2 Day
8
Date DT S1 S2 n
7-356
comparison
LDDT<= DT S1 S2 n
S1 Year S2 Year
ANDDT<= DT S1 S2 n
LDDT> DT S1 S2 n
S1 Year S2 Year
ANDDT> DT S1 S2 n Companson
S1 +1 Month S2 +1 Month operation resuit
4 -
S1 +2 Day S2 +2 Day
ORDT>
DT S1 S2 n
LDDT>= DT S1 S2 n
S1 Year S2 Year
ANDDT>= DT S1 S2 n Companson
S1 +1 Month S2 +1 Month operation resuit 4 -
S1 +2 Day S2 +2 Day
ORDT>=
DT S1 S2 n
2-53
Table 2.32 Character String Processing Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
LDTM= TM S1 S2 n
S1 Hour S2 Hour
ANDTM= TM S1 S2 n Companson
S1 +1 Minute S2 +1 Minute operation resuit 4 -
S1 +2 Second S2 +2 Second
ORTM=
TM S1 S2 n
LDTM<> TM S1 S2 n
S1 Hour S2 Hour
ANDTM<> TM S1 S2 n Companson
S1 +1 Minute S2 +1 Minute operation resuit 4 -
S1 +2 Second S2 +2 Second
ORTM<>
TM S1 S2 n
LDTM< TM S1 S2 n
S1 Hour S2 Hour
ANDTM< TM S1 S2 n Companson
S1 +1 Minute S2 +1 Minute operation resuit 4 -
S1 +2 Second S2 +2 Second
ORTM<
Clock TM S1 S2 n
7-361
comparison
LDTM<= TM S1 S2 n
S1 Hour S2 Hour
ANDTM<= TM S1 S2 n Companson
S1 +1 Minute S2 +1 Minute operation resuit 4 -
S1 +2 Second S2 +2 Second
ORTM<=
TM S1 S2 n
LDTM> TM S1 S2 n
S1 Hour S2 Hour
ANDTM> TM S1 S2 n Companson
S1 +1 Minute S2 +1 Minute operation resuit 4 -
S1 +2 Second S2 +2 Second
ORTM>
TM S1 S2 n
LDTM>= TM S1 S2 n
S1 Hour S2 Hour
ANDTM>= TM S1 S2 n Companson
S1 +1 Minute S2 +1 Minute operation resuit 4 -
S1 +2 Second S2 +2 Second
ORTM>=
TM S1 S2 n
2-54
2.5.16 Expansion clock instruction
1
Table 2.33 Expansion clock instruction
Subset
Execution
Category Symbol Processing Details
Condition
4
Reading
S.DAT-
S.DATERD D
(Clock elements) (D) +0
+1
Year
Month 4
ERD +2 Day
data of the +3 Hour
+4 6 -
expan- Minute
sion clock SP.DAT-
SP.DATERD D
+5 Sec.
+6 Day of the week 2
ERD +7 1/1000 sec.
2-55
2.5.17 Program control instructions
Subset
Execution
Category Symbol Processing Details
Condition
*1
PSTOP PSTOP File name
• Places designated program in standby 2
- 7-377
status. +
PSTOPP PSTOPP File name n
*1
POFF POFF File name • Turns OUT instruction coil of designated
2
program OFF, and places program in - 7-378
+
POFFP POFFP File name standby status.
n
*1
PSCAN PSCAN File name
• Registers designated program as scan 2
- 7-380
Program execution type. +
PSCANP PSCANP File name
control n
instructions *1
PLOW PLOW File name
• Registers designated program as 2
- 7-382
low-speed execution type. +
PLOWP PLOWP File name
n
*1: n ([number of file name characters] / 2) indicates a step. (Decimal fractions are rounded up.)
2-56
2.5.18 Other instructions
1
Table 2.35 Other Instructions
Subset
Execution
Category Symbol Processing Details
Condition
4
WDT
WDT WDT
• Resets watchdog timer during sequence
1 - 7-386
4
reset program.
WDTP WDTP
Timing (D) 2
DUTY DUTY n1 n2 D n1 scans n2 scans 4 - 7-388
clock
SM420 to SM424, SM430 to SM434
• Turns ON device specified by (D) if 6
Time check TIMCHK TIMCHK S1 S2 D measured ON time of input condition is 4 - 7-390
longer than preset time continuously.
Batch write
EROMWR EROMWR S D1 n D2
operation to • Writes a batch of data to E2PROM file
5 - 7-400
2PROM register.
E file
EROMWRP EROMWRP S D1 n D2
register
2-57
Table 2.35 Other Instructions (Continued)
Subset
Execution
Category Symbol Processing Details
Condition
S.DEVLD S.DEVLD n1 D n2
Reading data from • Reads data from the device data storage file
8 -
standard ROM in the standard ROM.
SP.DEVLD SP.DEVLD n1 D n2
• Transfers the program stored in a
Loading program memory card or standard memory (other
PLOADP PLOADP S D 3 -
from memory than drive 0) to drive 0 and places the
program in standby status.
Unloading
• Deletes the standby program stored in
program from PUNLOADP PUNLOADP S D 3 -
standard memory (drive 0).
program memory
• Deletes standby program stored in
standard memory (drive 0) designated by
Load
(S1). Then, transfers the program stored
+ PSWAPP PSWAPP S1 S2 D 4 -
in a memory card or standard memory
Unload
(other than drive 0) designated by (S2) to
drive 0 and places it in standby status.
2-58
2.5.19 Instructions for Data Link
1
Table 2.36 Instructions for Data Link
Subset
Execution
Category Symbol Processing Details
Condition
4
S.ZCOM
Q link
S.ZCOM Jn
4
SP.ZCOM SP.ZCOM Jn
instruction:
Refreshes the designated network. 5 - 8-2
Network
S.ZCOM
refresh
S.ZCOM Un
2
SP.ZCOM SP.ZCOM Un
S.RTREAD S.RTREAD n D
6
Reading SP.RTREAD SP.RTREAD n D
routing Reads data set at routing parameters. 7 - 8-6
information Z.RTREAD Z.RTREAD n D
ZP.RTREAD
7
ZP.RTREAD n D
S.RTWRITE S.RTWRITE n S
ZP.RTWRITE ZP.RTWRITE n S
2-59
2.5.20 Multiple CPU dedicated instruction
Subset
Execution
Category Symbol Processing Details
Condition
Subset
Execution
Category Symbol Processing Details
Condition
2-60
2.5.22 Redundant system instructions (For Redundant CPU)
1
Table 2.39 Redundant System Instructions (For Redundant CPU)
Subset
Execution
Category Symbol Processing Details
Condition
4
Switches between the control system and
System
SP.CONTSW
standby system at the END processing of the
8 - 11-2
4
switching SP.CONTSW S D scan executed with the SP.CONTSW
instruction.
2-61
MEMO
2-62
3 CONFIGURATION
OF INSTRUCTIONS
3
3-1
3.1 Configuration of Instructions
Most CPU module instructions consist of an instruction part and a device part.
Each part is used for the following purpose:
• Instruction part ...... indicates the function of the instruction.
• Device part ............ indicates the data that is to be used with the instruction.
The device part is classified into source data, destination data, and number of devices.
(1) Source (S)
(a) Source is the data used for operations.
(b) The following source types are available, depending on the designated device:
• Constant ............................................... Designates a numeric value to be used in the
operation.
This is set when the program is created, and
cannot be changed during the execution of
the program.
Constants should be indexed when used as
variable data.
• Bit devices and word devices ............... Designates the device that stores the data to
be used in the operation.
Data must be stored in the designated
device until the operation is executed.
By changing the data stored in a designated
device during program execution, the data to
be used in the instruction can be changed.
(2) Destination (D)
(a) The destination stores the data after the operation has been conducted. However,
some instructions require storing the data to be used in an operation at the destination
prior to the operation execution.
Example An addition instruction involving BIN 16-bit data
+ S D + S1 S2 D
(b) A device for the data storage must always be set to the destination.
BMOV S D n
(b) The number of devices or number of transfers can be set between 0 and 32767.
However, if the number is 0, the instruction will be a no-operation instruction.
3-2
3.2 Designating Data
The following six types of data can be used with CPU module instructions.
4
Double-precision .... Section 3.2.4 (2)
floating point data
Character string data .... Section 3.2.5
4
3.2.1 Using bit data
6
Bit data is data used in one-bit units, such as for contacts or coils.
"Bit devices" and "Bit designated word devices" can be used as bit data.
Designation of 1 point 8
of bit device M0
M0
SET Y10
Designation of 1 point
(b) Word device bit designation is done by designating " Word device . Bit No. ".
(Designation of bit numbers is done in hexadecimal.)
For example, bit 5 (b5) of D0 is designated as D0.5, and bit 10 (b10) of D0 is designated
as D0.A. However, there can be no bit designation for timers (T), retentive timers (ST),
counters (C) or index register (Z). (Example Z0.0 is not available).
Bit designated for word device
X0 (Bit 5 (b5) of D0 is turned ON if X0 is ON.)
SET D0.5
3-3
3.2.2 Using word (16 bits) data
Word data is 16-bit numeric data used by basic instructions and application instructions.
The following two types of word data can be used with CPU module:
• Decimal constants................. K-32768 to K32767
• Hexadecimal constants ......... H0000 to HFFFF
Word devices and bit devices designated by digit can be used as word data.
For direct access input (DX) and direct access output (DY), word data cannot be designated by
digit. (For details of direct access input and direct access output, refer to the QnUCPU User's
Manual (Function Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU User's
Manual (Function Explanation, Program Fundamentals).
XF to XC XB to X8 X7 to X4 X3 to X0
K1 designation
range
(4 points)
K2 designation range
(8 points)
K3 designation range
(12 points)
K4 designation range
(16 points)
(b) In cases where digit designation has been made at the source (S), the numeric values
shown in Table 3.1 are those which can be dealt with as source data.
Table 3.1 List of Numeric Values that Can Be Dealt with as Digit Designation
Number of Digits Designated With 16-Bit Instruction
K1 (4 points) 0 to 15
K2 (8 points) 0 to 255
K3 (12 points) 0 to 4095
K4 (16 points) -32768 to 32767
3-4
(c) When destination (D) data is a word device
The word device for the destination becomes 0 following the bit designated by digit
designation at the source.
Ladder Example Processing
With 16-Bit Instruction K1X0 X3 X2 X1 X0
X010
MOV K1X0 D0 Filled with 0s
(d) In cases where digit designation is made at the destination (D), the number of points
4
designated are used as the destination.
Bit devices below the number of points designated as digits do not change.
4
Ladder Example Processing
When source (S) data is a numerical value 1 2 3 4
H1234 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 6
X010
MOV H1234 K2M0
K2M0
M15 M8 M7 M0
0 0 1 1 0 1 0 0
7
Destination (D)
Not changed 3 4
M0
MOV K100 D0
3-5
3.2.3 Using double word data (32 bits)
Double word data is 32-bit numerical data used by basic instructions and application instructions.
The two types of double word data that can be dealt with by CPU module are as follows:
• Decimal constants................. K-2147483648 to K2147483647
• Hexadecimal constants ......... H00000000 to HFFFFFFFF
Word devices and bit devices designated by digit designation can be used as double word data.
For direct access input (DX) and direct access output (DY), designation of double word data is
not possible by digit designation.
(1) When Using Bit Devices
(a) Digit designation can be used to enable a bit device to deal with double word data.
Digit designation of bit devices is done by designating
" Number of digits Head number of bit device ". For link direct devices, designation
is done by
"J Network No. \ Number of digits Head number of bit device ". When X100
to X11F are designated for Network No.2, it is done by J2\K8X100. Digit designation of
bit devices can be done in 4-point (4-bit) units, and designation can be made for K1 to
K8. For example, if X0 is designated for digit designation, the following points would be
designated:
• K1X0 ...... The 4 points X0 to X3 are • K5X0...... The 20 points X0 to X13 are
designated. designated.
• K2X0 ...... The 8 points X0 to X7 are • K6X0...... The 24 points X0 to X17 are
designated. designated.
• K3X0 ...... The 12 points X0 to XB are • K7X0...... The 28 points X0 to X1B are
designated. designated.
• K4X0 ...... The 16 points X0 to XF are • K8X0...... The 32 points X0 to X1F are
designated. designated.
K1
designation
range
(4 points)
K2 designation
range
(8 points)
K3 designation range
(12 points)
K4 designation range
(16 points)
K5 designation range
(20 points)
K6 designation range
(24 points)
K7 designation range
(28 points)
K8 designation range
(32 points)
3-6
(c) When destination (D) data is a word device
The word device for the destination becomes 0 following the bit designated by digit
designation at the source.
Ladder Example Processing
With 32 bit Instructions
K1X0 X3 X2 X1 X0
Filled with 0s
X10
DMOV K1X0 D0
b15 b4 b3 b2 b1 b0
D0 0 0 0 0 0 0 0 0 0 0 0 0 X3 X2 X1 X0
3
D1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Source (S) data b31 b16
Filled with 0s 4
Fig 3.5 Ladder Example and Processing Conducted
(d) In cases where digit designation is made at the destination (D), the number of points 4
designated are used as the destination. Bit devices below the number of points
designated as digits do not change.
Ladder Example Processing
6
When source (S) data is a numerical value H78123456
0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0
3 4 5 6
7
0 1 1 1 1 0 0 0 0 0 0 1 0 0 1 0
X10
DMOV H78123456 K5M0 K5M0
7 8 1 2
8
M15 M8 M7 M0
Destination (D) 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0
M31 M20 M19 M16
0 0 1 0
Not changed
3-7
(2) Using word devices
A word device designates devices used by the lower 16 bits of data. A 32-bit instruction
uses (designation device number) and (designation device number + 1).
M0
DMOV K100 D0
Designation of 2 points of
word devices D0 and D1 (32 bits)
32-bit data transfer instruction
Real number data is floating decimal point data used with basic instructions and application
instructions.
Only word devices are capable of storing real number data.
M0
EMOV R100 D0
Remark
In sequence programs, floating decimal point data are designated by E .
3-8
• Variable part The 23 bits from b0 to b22, represents the XXXXXX... at
binary 1.XXXXXX....
(2) Double-precision floating-point data
Instructions which deal with double-precision floating-point datadesignate devices which are
used for the lower 16 bits of data.
Double-precision floating-point data are stored in the 64 bits which make up (designated
device number) to (designated device number + 3).
M0
EDMOV R100 D0
3
b52 to b62 7FFH 7FEH 7FDH 400H 3FFH 3FEH 3FDH 3FCH 02H 01H 00H
3-9
1. The CPU module floating decimal point data can be monitored using the
monitoring function of a peripheral device.
2. When floating-point data is used to express 0, all data in the following range are
turned to 0.
(a) Single-precision floating-point data: b0 to b31
(b) Double-precision floating-point data: b0 to b63
3. The setting range of floating decimal point data is as follows. *1
(a) Single-precision floating-point data
2128 < Device data 2-126, 0, 2-126 Device data < 2128
(b) Double-precision floating-point data
21024 < Device data 2-1022,0,2-1022 Device data < 21024
4. Do not specify 0 in floating-point data (when only the most significant bit of
the floating-point real number is 1). (An operation error will occur if
floating-point operation is performed with 0.) The CPU module that performs
the internal operation of floating-point operation with double precision does not
result in operation error since it performs floating-point operation after
converting 0 into 0 in the CPU module when 0 is specified. The CPU
module that performs the internal operation of floating-point operation with
single precision results in operation error since it gives priority to the processing
speed and uses 0 in floating-point operation without conversion when 0 is
specified.
(a) The following CPU modules will not result in operation error when 0 is
specified.
• High Performance model QCPU where internal operation is set to
double precision *2
(The internal operation of floating-point operation defaults to double
precision.)
(b) The following CPU modules will result in operation error when -0 is
specified.
• Basic model QCPU *3
• High Performance model QCPU where internal operation is set to single
precision *2
• Process CPU
• Redundant CPU
• Universal model QCPU
*1: For operations when a real number is out of range and operations when an invalid value is input, refer to the
QnUCPU User's Manual (Function Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU
User's Manual (Function Explanation, Program Fundamentals).
*2: Switch between single precision and double precision of the internal operation of floating-point operation in
the PLC system of the PLC parameter dialog box. For the single precision and double precision of floating-
point operation, refer to the QnUCPU User's Manual (Function Explanation, Program Fundamentals) or
Qn(H)/QnPH/QnPRHCPU User's Manual (Function Explanation, Program Fundamentals).
*3: The Basic model QCPU can perform floating-point operation if its first five digits of serial No. are "04122 or
later".
3-10
3.2.5 Using character string data
Character string data is character data used by basic instructions and application instructions.
The target ranges from the designated character to the NULL code (00H) that indicates the end
of the character string.
D0 NULL
Uses (number of characters/2) words (rounds up decimal fractions) and stores the character
string and NULL code.
For example, if "ABCDE" is transferred to devices starting from D0, the character string
(ABCDE) and the NULL code are stored from D0 to D2. (The NULL code is stored into the
upper 8 bits of the last one word.)
M0
$MOV "ABCDE" D0
D0 42H 41H
D1 44H 43H
D2 NULL 45H
3-11
3.3 Indexing
(1) Overview of indexing
(a) Indexing is an indirect setting made by using an index register.
When an Indexing is used in a sequence program, the device to be used will become
the device number specified directly plus the contents of the index register.
For example, if D2Z2 has been specified, the specified device is calculated as
follows: D(2+3) = D5 and the content of Z2 is 3 become the specified device.
(b) Indexing with 16-bit index registers and indexing with 32-bit index registers are possible
only for Universal model QCPU.
X0
Stores the data of D10Z0=
MOV D10Z0 D0 D{10+(-1)} = D9 at D0.
Indexing
*1: SFC transfer devices and SFC block devices are devices for SFC use.
Refer to the manual below for how to use these devices.
• QCPU (Q mode)/QnACPU Programming Manual (SFC)
3-12
2) Devices with limits for use with index registers
Device Meaning Application Example
3
Remark
For timer and counter present values, there are no limits on index register
numbers used. 4
Value set for timer
X0 K100
T0 2
Present value of timer
SM400
BCD T0Z4 K4Y30
Value set for counter
6
X1 K10
C100
8
(c) A case where Indexing has been performed, and the actual process device, would be
as follows:
(When Z0 20 and Z1 5)
3.3 Indexing
Ladder Example Actual Process Device
X0
X1
MOV K20 Z0
MOV K2X64 K1M33
Description
MOV K 5 Z1 K2X50Z0 K2X(50 + 14) = K2X64
X0
MOV K20 Z0 X1
MOV D20 K3Y12A
Description
MOV K 5 Z1
D0Z0 D (0 + 20) = D20
K3Y12FZ1 K3Y(12F - 5) = K3Y12A
X1
MOV D0Z0 K3Y12FZ1 Hexadecimal number
3-13
• Specifing the 32-bit indexing using “ZZ” specification.
The 32-bit indexing with “ZZ” specification is available only for the following CPU
modules that the version of GX Developer is 8.68W or later.
• The first five digits of the serial No. for QnU(D)(H)CPU is “10042” or higher.
• QnUDE(H)CPU
(a) Example of specifing the range of index registers for use of 32-bit indexing.
1) Each index register can be set between -2147483648 and 2147483647.
An example of indexing is shown below.
X0
DMOV K40000 Z0 Stores 40000 at Z0.
X0
MOV ZR10Z0 D0 Stores the data of ZR10Z0=
ZR{10+40000}=ZR40010 at D0.
Indexing
2) Specification method
For indexing with a 32-bit index register, specify the head number of an index
register to be used on the Device tab of the Q parameter setting screen on GX
Developer.
When the head number of the index register used is changed on the Device tab of
the Q parameter setting screen, do not change the parameters only or do not write
only the parameters into the programmable controller. Be sure to write the param-
eter into the programmable controller with the program.
When the parameter is forced to be written into the programmable controller, an
error of CAN'T EXE. PRG. occurs. (Error code: 2500)
3-14
3) Device that indexing can be used
Indexing can be used only for the device shown below.
1
Device Meaning
ZR Serial number access format file register
D Extended data register (D)
2
W Extended link register (W)
3.3 Indexing
Ladder Example Actual Process Device
X0
X1
DMOV K100000 Z0
MOV ZR101000 D10
MOV K-20 Z2
Description
X1 ZR1000Z0 ZR(1000+100000)=ZR101000
MOV ZR1000Z0 D30Z2 D30Z2 D(30-20)=D10
3-15
(b) Example of specifing 32-bit indexing with “ZZ” specification.
1) One index register can specify 32-bit indexing by using “ZZ” specification such
as “ZR0ZZ4”.
The 32-bit indexing with “ZZ” specification is as follows.
M0
DMOVP K100000 Z4 Stores 100000 at Z4 and Z5.
2) Specification method
To perform 32-bit indexing by using “ZZ” specification, select “Use of ZZ” in
“Indexing Setting for ZR Device” in PC parameter for GX Developer.
Fig. 3.10 Setting window for indexing setting parameter for ZR device
3-16
5) The 32-bit indexing used “ZZ” specification and the acutual processing device
are as follows.
1
(Z0 (32-bit) 100000.Z2 (16-bit) 20)
Ladder Example Actual Process Device
2
X1
X0 MOV ZR101000 D10
DMOV K100000 Z0
END 3
MOV K-20 Z2
X1 Description
MOV ZR1000ZZ0 D30Z2 ZR1000ZZ0 ZR(1000+100000)=ZR101000 4
D30Z2 D(30-20)=D10
3.3 Indexing
Single ZZn cannot be used as a device like “DMOV K100000 ZZ0”. When setting
values of index registers to specify 32-bit indexing with “ZZ” specification, set the
value of Zn (Z0~Z19).
Single ZZAn cannot be input to each function in GX Develoiper.
3-17
(4) Index modification using extended data register (D) and extended link register (W)
(Universal model QCPU(except Q00UJCPU))
Like index modification using data register (D) and link register (W) of internal user device, a
device can be specified by index modification within the range of the extended data register
(D) and extended link register (W).
Index modification in internal
user device Image of D device
User Program
Z0=0
D100 Internal user
device
MOV K1234
D1100
Z0=1000
D22000
Z1=2000
Index modification in
extended data register
1) Index modification where the device number crosses over the boundary
between the internal user device and the extended data register (D) or
extended link register (W)
The specification of index modification where the device number crosses over
the boundary between the internal user device and the extended data register
(D) or extended link register (W) cannot be made.
If doing so, an error occurs when the device range check is enabled at index
modification (error code: 4101).
Index modification in internal
user device Image of D device
User Program
Z0=0
D100 Internal user
device
MOV K1234
3-18
2) Index modification where the device number crosses over the boundary
among the file register (ZR), extended data register (D), and extended link
register (W)
1
Index modification where the device number crosses over the boundary
among the file register (ZR), extended data register (D), and extended link
register (W) will not cause an error.
2
However, an error occurs if the index modification result of file register (ZR),
extended data register (D), and extended link register exceeds the file register
range (error code: 4101).
3
Index modification where the device
number crosses over the boundary
among the file register (ZR), extended
4
data register (D) will not cause an error.
File register files
User Program
File 2
ZR100 register
Z0=0 (8k)
MOV K1234
Z0=10000
D14196
Extended data
register (D)
6
(8k)
D20000 D12288~
Z1=0
MOV K1234 Z20000Z1 7
Extended link
Z1=4000 register (W)
W2DC0
(8k)
3.3 Indexing
the file register range.
Z1=10000
3-19
(5) Other index modifications
(a) Bit data
Device numbers can be index modified when performing digit designation. However,
Indexing is not possible by digit designation.
BIN K4X0Z2 D0
Setting is possible since this indicates
Indexing for device number.
If Z2=3, then (X0+3)=X3
BIN K4Z3X0 D0
(b) Both I/O numbers and buffer memory number can be performed indexing with
intelligent function module devices*1.
MOV U10Z1\G0Z2 D0
(c) Both network numbers and device numbers can be performed indexing with link direct
devices*1.
MOV J1Z1\K4X0Z2 D0
(d) When indexing is used for multiple CPU shared devices*2, indexing for the head I/O
numbers of CPU modules and indexing for the CPU shared memory address are
automatically executed.
MOV U3E0Z1\G0Z2 D0
3-20
(e) Index modification using extended data register (D) and extended link register (W) by
32 bits (Universal model QCPU(except Q00UJCPU))
Like index modification using file register (ZR), index modification using extended data
register (D) and extended link register (W) by 32 bits can be performed by the following
1
two methods.
• Specifing the index registers’ range used for indexing with 32-bit. 2
• Specifing the 32-bit indexing using “ZZ” specification.
3
The 32-bit indexing with “ZZ” specification is available only for the following CPU
modules that the version of GX Developer is 8.68W or later.
• The first five digits of the serial No. for QnU(D)(H)CPU is “10042” or higher. 4
(except Q00UJCPU)
• QnUDE(H)CPU
2
(6) Cautions
(a) Performing indexing between the FOR and NEXT instructions 6
Pulses can be output between the FOR and NEXT instructions by use of the edge relay
(V). However, pulse output using the PLS/PLF/pulse ( P) instruction is not allowed.
7
[When edge relay is used] [When edge relay is not used]
(M0Z1 provides normal pulse output.) (M0Z1 does not provide normal pulse output.)
SM400
MOV K0 Z1
SM400
MOV K0 Z1
8
FOR K10 FOR K10
X0Z1 V0Z1 X0Z1
M0Z1 PLS M0Z1
SM400 SM400
3.3 Indexing
INC Z1 INC Z1
NEXT NEXT
Remark
The ON/OFF data of X0Z1 is stored by the edge relay V0Z1.
For example, the ON/OFF data of X0 is stored by V0, and that of X1 by V1.
3-21
(b) Performing indexing with the CALL instruction
Pulses can be output with the CALL instruction by use of the edge relay (V). However,
pulse output using the PLS/PLF/pulse ( P) instruction is not allowed.
CALL P0 CALL P0
SM400 SM400
MOV K1 Z1 MOV K1 Z1
CALL P0 CALL P0
FEND FEND
X0Z1 V0Z1 X0Z1
P0 M0Z1 P0 PLS M0Z1
RET RET
(d) Changing indexing with 16-bit index register for indexing with 32-bit index register
For changing indexing with 16-bit index register for indexing with 32-bit index register,
check if the program has enough spaces for indexing.
For indexing with 32-bit index registers, the specified index register (Zn) and the next
index register of the specified register (Zn+1) are used. Be sure not to overlap index
registers to be used.
3-22
3.4 Indirect Specification
1
(1) Indirect Specification
(a) Indirect specification is a method that specifies address of the device to be used in a
sequence program using two word devices (two points of word device). Use indirect 2
specification as index modification when the index register is insufficient.
ADRSET D100 D0 Stores the address of
Table 3.3 shows that the CPU module devices can be specified indirectly. 8
Table 3.3 List of Indirect Specification Available Devices
Availability of
Device Type Indirect Example of Indirect Specification
*1: For the device names, refer to the QnUCPU User’s Manual
(Function Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU User’s Manuall
(Function Explanation, Program Fundamentals)
*2: Indicates when index modification by an index register is performed.
*3: Indirect specification is possible, but the address can not be written with the ADRSET instruction.
3-23
(3) Precautions
(a) The address for indirect specification uses two words.Therefore, to substitute indirect
specification for index modification, the addition/subtraction of 32-bit data is required.
The following is the ladder used for the address addition/subtraction of the device
stored in D1 and D0 for indirect specification.
[To add "1" to the address of the device for indirect specification]
DINCP D0
32-bit instruction
[To subtract "1" from the address of the device for indirect specification]
DDECP D0
32-bit instruction
(b) Indirect specification of extended data register (D) and extended link register (W)
Indirect specification with indirect address can be performed in the extended data
register (D) and extended link register (W).
Note that when indirect specification is performed to the extended data register (D) and
data register (D) in internal device or to the extended link register (W) and link register
(W) in internal device, the areas of the internal user device and extended data register
(D) or extended link register (W) are not treated as a sequence.
Internal user device
Setting an address D0
ADRSET D12000 D100 Data register
"D12000 h to D100 and D101
D12000
Setting the address that D12287
is an addition of 1000 to
D+ K1000 D100 D102
the address of D12000 to
D102 and D103
File register
D12288
Extended data
register(D)
D13000
Since the areas of the data register and
extended data register are not sequence,
D63487
D13000 is inaccessible.
Extended link
register (W)
3-24
3.5 Reducing Instruction Processing Time
1
3.5.1 Subset Processing
2
Subset processing is used to place limits on bit devices used by basic instructions and
application instructions in order to increase processing speed.
However, the instruction symbol does not change. 3
To shorten scans, run instructions under the conditions indicated below.
(1) Conditions which each device must meet for subset processing 4
(a) When using word data
Device Condition
• Designates a bit device number in a factor of 16.
2
Bit device • Only K4 can be designated for digit designation.
• Does not perform indexing.
• Internal user device. 6
• File register (R, ZR *1)
Word device
• Multiple CPU shared device *1, *2
• Index register (Z) / Standard device register (Z) *1
Constants • No limitations
7
3-25
(2) Instructions for which subset processing can be used
Types of Instructions Instruction Symbols
LD,LDI,AND,ANI,OR,ORI,LDP,LDF,ANDP,ANDF,ORP,ORF,LDPI,ANDPI,ANDFI,
Contact instructions
ORPI,ORFI
Output instructions OUT,SET,RST
• +, ,*,/,INC,DEC,D+,D ,D*,D/,DINC,DDEC
Arithmetic operation
• B+,B ,B*,B/, E+,E ,E*,E/
Data conversion instructions • BCD, BIN, DBCD, DBIN, FLT, DFLT, INT, DINT
• MOV, DMOV, CML, DCML, XCH, DXCH
Data transfer instruction
• FMOV, BMOV, EMOV
Program branch instruction • CJ, SCJ, JMP
Logic operations • WAND, DAND, WOR, DOR, WXOR, DXOR, WXNR, DXNR
Rotation instruction • RCL, DRCL, RCR, DRCR, ROL, DROL, ROR, DROR
Shift instruction • SFL, DSFL, SFR, DSFR
Data processing instructions • SUM, SEG
Structure creation instructions • FOR, CALL
Operation processing time is reduced with the instructions that the subset processing is possible.
For the number of steps, refer to Section 3.8.
For the operation time for each instruction, refer to Appendix 1.
Because standard device registers are the same devices as index registers, do
not use device numbers of the standard device registers for the index registers.
3-26
3.6 Cautions on Programming (Operation Errors)
1
Operation errors are returned in the following cases when executing basic instructions and
application instructions with CPU module:
• An error listed on the explanatory page for the individual instruction occurred. 2
• When an intelligent function module device is used, no intelligent function module is installed
at the specified I/O number position.
• When an intelligent function module device is used, the specified buffer memory address does not exist. 3
• The relevant network does not exist when using a link device.
• When a link device is used, no network module is installed at the specified I/O number position.
• When a multiple CPU shared device is used, a CPU module is not installed at the head I/O 4
number position of the specified CPU module.
• When a multiple CPU shared device is used, the specified shared memory address does not exist.
• The setting of the device number crosses over the boundary between the internal user device 2
and the extended data register (D) or extended link register (W).
(Universal model QCPU only)
6
When file register is set but a memory card is not installed or when file register is
not set, writing/reading to/from file register is as follows:
(1) For the High Performance model QCPU, Process CPU, and Redundant CPU 7
An error does not occur even when writing/reading to/from file register is
performed. However, “0H” is stored when reading from file register is
performed. 8
(2) For the Universal model QCPU
The OPERATION ERROR (error code:4101) occurs when writing/reading to/
from file register is performed.
For example, in a case where the data register has been allocated 12k points,
there will be no error even if it exceeds D12287.
3-27
2) Universal model QCPU
The device range is checked. When the device number is outside the device
range, an operation error occurs.
For example, when12 k points are assigned to a data register, an error occurs
if the device number of the data register exceeds D12287.
BMOV D0 D12287 K2
MOV K2 Z1
BMOV D0 D12285Z1 K2
3-28
2) Universal model QCPU
The device range is checked.
When the device number is outside the device range, an operation error 1
occurs.
For example, when12 k points are assigned to a data register, an error occurs
if the device number of the data register exceeds D12287.
2
BMOV D0 D12287 K2
BMOV D0 D12285Z1 K2 6
When D12287 is specified with the BMOV instruction,
the target devices are D12287 and D12288.
BMOV D0 D12287Z1 K2
However, an operation error occurs because D12288
does not exist.
7
An operation error occurs since head device number
is D12289 that exceeds the device range.
8
With changing the settings of the PLC parameter on GX Developer, the device
range is not checked.*2
*2: For changing the settings of the PLC parameter on GX Developer, refer to the following manual.
3-29
When performing the following access in Universal model QCPU, an error (error code:
4101) occurs.
1) Access crossing the boundary of devices caused by indexing
(range of A area)
The allocation order of individual devices is shown below:
SM
SD
X
Y
M
L
B
F
SB
V
Area A
S
Contact and coil of T
Contact and coil of ST
Contact and coil of C
Present value of T
Present value of ST
Present value of C
D
W
SW
Empty area
File register Boundary B
(32K points)
*2: For changing the settings of the PLC parameter on GX Developer, refer to the QnUCPU User's Manual
(Function Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU User's Manual (Function
Explanation, Program Fundamentals).
When indexing is executed only with Universal model QCPU, devices between
internal user devices (SW) and file registers (R) cannot be skipped. (Error code:
4101).
3-30
Remark
For the how to change the internal user device allocation, referto User’s Manual
1
(Functions Explanation, Program Fundamentals) for the CPU module used.
2
(d) Device range checks are conducted when indexing is performed by direct access
output (DY).
3
(e) Set the following items so that the specification does not cross over theboundary
between the internal user device and the extended data register (D) or extended link
register (W).
4
• Index modification
• Indirect specification
6
crosses over the boundary between the
internal user device and the extended data
register (D) is not possible. Image of D device
User Program
D199
D20299
3-31
(2) Device data check
Device data checks for the devices used by basic instructions and application instructions in
CPU module are as indicated below:
3-32
3.7 Conditions for Execution of Instructions
1
The following four types of execution conditions exist for the execution of CPU module sequence
instructions, basic instructions, and application instructions:
• Non-conditional execution...... Instructions executed without regard to the ON/OFF status of 2
the device
Example LD X0, OUT Y10
3
• Executed at ON...................... Instructions executed while input condition is ON
Example MOV instruction, FROM instruction
• Executed at leading edge ...... Instructions executed only at the leading edge of the input 4
condition (when it goes from OFF to ON) Example
PLS instruction, MOVP instruction.
• Executed at trailing edge ....... Instructions executed only at the trailing edge of the input 2
condition (when it goes from ON to OFF) Example
PLF instruction.
6
For coil or equivalent basic instructions or application instructions, where the same instruction
can be designated for either execution at ON or leading edge execution, a "P" is added after the
instruction name to specify the condition for execution.
7
• Instruction to be executed at ON Instruction name
• Instruction to be executed at leading edge Instruction name + P 8
Execution at ON and execution at leading edge for the MOV instruction are designated as
follows:
Execution during ON
MOVP K4X0 D0
3-33
3.8 Counting Step Number
The number of steps in CPU module sequence instructions, basic instructions, and application
instructions differs depending on whether indirect setting of the device used is possible or not.
+ D0 D10
(1) (2) Number of devices 2 Number of basic steps: 3
+ D0 D10 D20
(1) (2) (3) Number of devices 3 Number of basic steps: 4
3-34
(c) Devices with additional steps (Universal model QCPU(except Q00UJCPU))
1) Instructions applicable to subset processing
The following table shows steps depending on the devices. 1
Added Steps
Basic Number of
Instruction Symbols Devices with Additional Steps (Number of
Instruction Steps)
Steps
2
Serial number access format file register,
LD,LDI,AND,ANI,OR,ORI, Extended data register (D),
1(2) 1
LDP,LDF,ANDP,ANDF,ORP,ORF Extended link register (W) 3
Multiple CPU shared device
Serial number access format file register,
LDPI,LDFI
Extended data register (D),
Extended link register (W)
1(4) 3 4
Multiple CPU shared device
Serial number access format file register,
Extended data register (D),
2
ANDPI,ANDFI,ORPI,ORFI 1(5) 4
Extended link register (W)
Multiple CPU shared device
Serial number access format file register 6
Extended data register (D),
SET 1(2) 1
Extended link register (W)
Multiple CPU shared device 7
Timer/Counter 3(4)
Serial number access format file register
OUT Extended data register (D),
Extended link register (W)
1(2)
1
8
Multiple CPU shared device
Serial number access format file register
Extended data register (D),
RST (bit device) 1(2) 1
Extended link register (W)
3-35
Added Steps
Basic Number of
Instruction Symbols Devices with Additional Steps (Number of
Steps
Instruction Steps)
3-36
Added Steps
Basic Number of
Instruction Symbols Devices with Additional Steps (Number of
Steps
Instruction Steps) 1
Index register/Standard device register *2 -1
Serial number access format file register
INC,INCP,DEC,DECP,DINC,DINCP,
Extended data register (D), 2
DDEC,DDECP
Extended link register (W)
3 2
Multiple CPU shared device
Serial number access format file register
MOV,MOVP
Extended data register (D),
Extended link register (W)
1 2 3
Multiple CPU shared device
Serial number access format file register
Extended data register (D), 4
Extended link register (W)
DMOV,DMOVP,EMOV,EMOVP 1 2
Multiple CPU shared device
Decimal constant, hexadecimal
constant, real constant 2
Serial number access format file register
Extended data register (D),
BCD,BCDP,BIN,BINP,FLT,FLTP,CML,CMLP S1 :1, S2 :2 2
Extended link register (W)
Multiple CPU shared device
6
Serial number access format file register
Extended data register (D),
:1, S2 :2
7
S1
DBCD,DBCDP,DBIN,DBINP,INT,INTP,DINT, Extended link register (W)
2
DINTP,DFLT,DFLTP,DCML,DCMLP Multiple CPU shared device
Decimal constant, hexadecimal
S1 :1
constant, real constant
*1: If the same device is used for S1 and S2 , the number of basic steps increases by one.
8
*2: The number of steps decreases with a standard device register.
When multiple standard device registers are used in an instruction applicable
to subset processing, the number of steps decreases. The following table
shows the number of steps for each instruction.
S1 , or S2 and D -1(2)
+,-,+P,-P,D+,D-,D+P,D-P, S1 and S2
WAND,WOR,WXOR,WXNR,
(only when that device that the
DAND,DOR,DXOR,DXNR, ±0(3)
number of steps does not increase is 3
WANDP,WORP,WXORP,WXNRP,
DANDP,DORP,DXORP,DXNRP specified for D )
(3 devices)*1 S1 and S2
*1: If the same device is used for S1 and D , the number of basic steps increases by one.
3-37
Added Steps
Locations Where Standard Device Regis- Basic Number of
Instruction Symbols (Number of
ter Is Used Steps
Instruction Steps)
S1 , S2 , and D -2(1)
*, *P, /, /P 3
S1 , or S2 and D -1(2)
S1 , S2 , and D -2(1)
S1 , or S2 and D -1(2)
S1 and S2
specified for D )
S1 and S2
BCD,BCDP,BIN,BINP,DBCD,DBCDP,
DBIN,DBINP,FLT,FLTP,DFLT,DFLTP,
S1 and D -1(1) 2
INT,INTP,DINT,DINTP,CML,CMLP,
DCML,DCMLP
(d) In cases where the conditions described in (a) to (c) above overlap, the number of steps
becomes a culmination of the two.
Example MOV If U1\G10 ZR123 has been designated, a total of 2 steps are added.
U1\
MOV G10 ZR123
Increased by 2 steps
3-38
3.9 Operation when the OUT, SET/RST, or PLS/PLF
Instructions Use the Same Device 1
The following describes the operation for executing multiple instructions of the OUT, SET/RST, or 2
PLS/PLF that use the same device in one scan.
7
X1
M0
8
[Timing Chart]
X0 X0
M0 M0
3.9 Operation when the OUT, SET/RST, or PLS/PLF Instructions Use the Same Device
X1 X1
M0 M0
END END END
ON
X0 OFF
ON
X1 OFF
ON
M0 OFF
With the refresh type CPU module, when the output (Y) is specified by the OUT instruction,
the ON/OFF status of the last OUT instruction of the scan will be output.
3-39
(2) SET/RST instructions using the same device
(a) The SET instruction turns ON the specified device when the execution command is ON
and performs nothing when the execution command is OFF.
For this reason, when the SET instructions using the same device are executed two or
more times in one scan, the specified device will be ON if any one of the execution
commands is ON.
(b) The RST instruction turns OFF the specified device when the execution command is
ON and performs nothing when the execution command is OFF.
For this reason, when the RST instructions using the same device are executed two or
more times in one scan, the specified device will be OFF if any one of the execution
commands is ON.
(c) When the SET instruction and RST instruction using the same device are programmed
in one scan, the SET instruction turns ON the specified device when the SET execution
command is ON and the RST instruction turns OFF the specified device when the RST
execution command is ON.
When both the SET and RST execution commands are OFF, the ON/OFF status of the
specified device will not be changed.
[Ladder]
X0
SET M0
X1
RST M0
[Timing Chart]
X0 X0
SET M0 SET M0
X1 X1
RST M0 RST M0
END END END
ON
X0 OFF
ON
X1 OFF
ON
M0 OFF
When using a refresh type CPU module and specifying output (Y) in the SET/RST
instruction, the ON/OFF status of the device at the execution of the last instruction in the
scan is returned as the output (Y).
3-40
(3) PLS instructions using the same device
The PLS instruction turns ON the specified device when the execution command is turned
ON from OFF.
1
It turns OFF the device at any other time (OFF to OFF, ON to ON, or ON to OFF).
If two or more PLS instructions using the same device are executed in one scan, each
instruction turns ON the device when the corresponding execution command is turned ON 2
from OFF and turns OFF the device in other cases.
For this reason, if multiple PLS instructions using the same device are executed in a single
scan, a device that has been turned ON by the PLS instruction may not be turned ON during 3
one scan.
[Ladder]
4
X0
PLS M0
2
X1
PLS M0
6
[Timing Chart]
• The ON/OFF timing of the X0 and X1 is different. (The specified device does not turn ON 7
throughout the scan.)
X0 X0
X1
PLS M0
X1
PLS M0 8
PLS M0 PLS M0
END END END
ON
3.9 Operation when the OUT, SET/RST, or PLS/PLF Instructions Use the Same Device
X0 OFF
ON
X1 OFF
ON ON
M0 OFF
3-41
• The X0 and X1 turn ON from OFF at the same time.
X0 X0
PLS M0 PLS M0
X1 X1
PLS M0 PLS M0
END END END
ON
X0 OFF
ON
X1 OFF
ON
M0 OFF
When using a refresh type CPU module and specifying output (Y) in the PLS instructions,
the ON/OFF status of the device at the execution of the last PLS instruction in the scan is
returned as the output (Y).
(4) PLF instructions using the same device
The PLF instruction turns ON the specified device when the execution command is turned
OFF from ON.
It turns OFF the device at any other time (OFF to OFF, OFF to ON, or ON to ON).
If two or more PLF instructions using the same device are executed in one scan, each
instruction turns ON the device when the corresponding execution command is turned OFF
from ON and turns OFF the device in other cases.
For this reason, if multiple PLF instructions using the same device are executed in a single
scan, a device that has been turned ON by the PLF instruction may not be turn ON during
one scan.
[Ladder]
X0
PLF M0
X1
PLF M0
3-42
[Timing Chart]
• The ON/OFF timing of the X0 and X1 is different. (The specified device does not turn ON
throughout the scan.)
1
X0 X0
PLF M0
X1 X1
PLF M0
2
PLF M0 PLF M0
END END END
ON
3
X0 OFF
X1
ON
4
OFF
ON
M0 OFF 2
M0 turns OFF because X1 M0 turns OFF because X1 status is
status is other than ON OFF. other than ON OFF.
M0 turns ON because (M0 remains OFF.) 6
X0 goes OFF (ON OFF). M0 turns OFF because X0 status is
other than ON OFF
(M0 remains OFF.)
ON
3.9 Operation when the OUT, SET/RST, or PLS/PLF Instructions Use the Same Device
X0 OFF
ON
X1 OFF
ON
M0 OFF
3-43
3.10 Precautions for Use of File Registers
This section explains the precautions for use of the file registers in the QCPU.
Even when file registers to be used are not set in the PLC parameter, a program
that uses file registers can be created. For the CPU module other than the
Universal model QCPU, an error does not occur when that program is written to
the CPU module.
However, note that the correct data cannot be written/read to/from the file register.
For the Universal model QCPU, an error occurs if the program where file registers
are used is executed.
The following table indicates the memories that can use the file registers in each CPU
module.
High Performance model QCPU
Process CPU Basic Model QCPU
Memory
Redundant CPU (except Q00JCPU)
Universal model QCPU
Standard RAM
Memory card *1 *2 *3
3-44
Remark
For the file register setting method and file register area securing method, refer to
1
User’s Manual (Functions Explanation, Program Fundamentals) for the CPU
module used.
2
(4) Designation of file register number in excess of the registered number of points
(a) CPUs other than Universal model QCPU
3
An error will not occur if data are written or read to or from the file registers that have
numbers greater than the registered number of points. However, note that the read/write
of correct data to/from the file registers cannot be performed.
4
(b) Universal model QCPU
When data are written to or read from the file registers that are not registered, an error 2
occurs. (Error code: 4101)
R32767
RSET K2 R0
Specifying R0
for block 2 to Block 1
MOV D0 R0 R32767
R0
to Block 2
3-45
(b) Serial number access method
In the serial number access method, specify the file registers beyond 32k points with
consecutive device numbers. The file registers of multiple blocks can be used as
consecutive file registers. Use "ZR" as the device name.
to (Block 0)
ZR32767
MOV D0 ZR65536 ZR32768
to (Block 1)
ZR65535
ZR65536
to (Block 2)
(b) Restrictions
The restrictions when specifying file registers to refresh devices are as follows.
1) Refresh cannot be performed correctly if the use of file register which has the
same name as the program is specified by the PLC parameter.
When the file register which has the same name as the program is used,
refresh is performed to the data of the file register having the same name as
the program that is set at the last number in the [Program] tab page of PLC
parameter. To read/write the refresh data, specify the file register to the refresh
device after switching the file register to the corresponding one with the
QDRSET instruction.
2) Refresh cannot be performed correctly if the file name of file register or the
drive number is changed by the QDRSET instruction.
If the file name of file register or the drive number is changed by the QDRSET
instruction, link refresh is performed to the data of the setting file at the time of
the END instruction execution. To read/write the refresh data, specify the file
register of the setting file at the time of the END instruction execution.
If the drive number is changed by the QDRSET instruction when "ZR" is
specified for the device in the CPU modules other than the Universal model
QCPU, an error (LINK PARA ERROR (3101)) occurs. (Note that an error does
not occur when "R" is specified for the device.)
3-46
3) When a block number is switched by the RSET instruction, refresh is
performed to the data of the file register (R) in the switched block number.
When a block number is switched by the RSET instruction, refresh is 1
performed to the data of the file register (R) in the block number at the time of
the END instruction execution. To read/write the refresh data, specify the file
register of the block number at the time of the END instruction execution.
2
(7) Precautions when file registers in the flash memory are used
This section explains the precautions for use of the flash memory.
(b) File registers in the flash memory can be only read in a sequence program. 4
(Write to the flash memory cannot be performed in a sequence program.)
8
When using the flash memory for the file registers, write data in advance.
Using GX Developer, write data to the flash card.
3-47
MEMO
3-48
4 HOW TO READ
INSTRUCTIONS
4
4-1
The description of instructions that are contained in the following chapters are presented in the
following format.
1)
2)
3)
4)
5)
6)
7)
8)
4-2
9)
5) Indicates the data set for each instruction and the data type.
Data Type Meaning
Bit Bit data or head number in bit data
BIN 16 bits BIN 16-bit data or head number in word device
BIN 32 bits BIN 32-bit data or head number in double word device
BCD 4-digit 4-digit BCD data
BCD 8-digit 8-digit BCD data
Real number Floating decimal point data
character string Character string data
Device name Device name data
4-3
6) Devices which can be used by the instruction in question are indicated with circle. The types
of devices that can be used are as indicated below:
T, ST, C, *3 J \X
X, Y, M, L, P, I, J, U,
Applicable SM, F, D, W, SD, J \Y J \W DX, DY, N,
R, ZR U \G Z K, H , E, $
devices *1 B, SB, SW, FD, BL, TR,
J \B J \SW
FX, FY *2 @ BL \ S,V
J \SB
*1: For the description for the individual devices, refer to the QnUCPU User’s Manual
(Function Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU User’s Manuall
(Function Explanation, Program Fundamentals)
*2: FX and FY can be used only for bit data, and FD only for word data.
*3: When T, ST and C are used for other than the instructions below, only word data can be used.
(Bit data cannot be used.)
[Instructions that can be used with bit data]
LD, LDI, AND, ANI, OR, ORI, LDP, LDF, ANDP, ANDF, ORP, ORF,LDPI, LDFI, ANDPI, ANDFI, ORPI, ORFI,
OUT, RST
*4: Usable with the CC-Link IE controller network, MELSECNET/H, and MELSECNET/10.
*5: Devices which can be set are recorded in the "Constant" and the "Other" columns.
4-4
5
7
SEQUENCE
INSTRUCTIONS 7
7
Reference
Category Processing Details
Section
Section 5.1
Contact instruction Operation start, series connection, parallel connection
Ladder block connection, creation of pulses from operation
7
Association instruction Section 5.2
results, store/read operation results
Output instruction Bit device output, pulse output, output reversal Section 5.3
Shift instruction Bit device shift Section 5.4
Master control instruction Master control Section 5.5
Termination instruction Program termination Section 5.6
Program stop, instructions such as no operation which do not
Other instruction Section 5.7
fit in the above categories
5-1
LD,LDI,AND,ANI,OR,ORI
Basic High
performance Process Redundant Universal
X1/D0.1
LD
X1/D0.1
LDI
X2/D0.2
AND
X2/D0.2
ANI
OR
X3/D0.3
ORI
X3/D0.3
S ––
Function
LD, LDI
(1) LD is the A contact operation start instruction, and LDI is the B contact operation start
instruction. They read ON/OFF information from the designated device*1, and use that as an
operation result.
*1: When a bit designation is made for a word device, the device turns ON or OFF depending on the 1/0 status of
the designated bit.
5-2
LD,LDI,AND,ANI,OR,ORI
AND, ANI
(1) AND is the A contact series connection instruction, and ANI is the B contact series 1
connection instruction. They read the ON/OFF data of the designated bit device*2, perform
an AND operation on that data and the operation result to that point, and take this value as
the operation result. 2
*2: When a bit designation is made for a word device, the device turns ON or OFF depending on the 1/0 status of
the designated bit.
(2) There are no restrictions on the use of AND or ANI, but the following applies with a 3
peripheral device used in the ladder mode:
(a) Write ......... When AND and ANI are connected in series, a ladder with up to 24 stages
can be displayed. 4
(b) Read......... When AND and ANI are connected in series, a ladder with up to 24 stages
can be displayed. If the number exceeds 24 stages, up to 24 will be
displayed.
5
OR, ORI
(1) OR is the A contact single parallel connection instruction, and ORI is the B contact single 6
parallel connection instruction. They read ON/OFF information from the designated
device*3, and perform an OR operation with the operation results to that point, and use the
resulting value as the operation result. 7
*3: When a bit designation is made for a word device, the device turns ON or OFF depending on the 1/0 status of
the designated bit.
(2) There are no limits on the use of OR or ORI, but the following applies with a peripheral 8
device used in the ladder mode.
(a) Write ......... OR and ORI can be used to create connections of up to 23 ladders.
(b) Read......... OR and ORI can be used to create connections of up to 23 ladders.
The 24th or subsequent ladders cannot be displayed properly.
5-3
LD,LDI,AND,ANI,OR,ORI
Operation Error
(1) There are no operation errors with LD, LDI, AND, ANI, OR, or ORI instruction.
Program Example
(1) A program using the LD, AND, OR, and ORI instructions.
(2) A program linking contacts using the ANB and ORB instructions.
ANB
5-4
LDP,LDF,ANDP,ANDF,ORP,ORF
Basic High
performance Process Redundant Universal
2
3
Bit device number / Word device bit designation ( S )
4
X1/D0.1
LDP
X1/D0.1 5
LDF
ANDP
X2/D0.2
6
X2/D0.2
ANDF 7
ORP
8
X3/D0.3
ORF
5.1.2 Pulse operation start, pulse series connection, pulse parallel connection (LDP,LDF,ANDP,ANDF,ORP,ORF)
5.1 Contact Instructions
X3/D0.3
S ––
Function
LDP, LDF
(1) LDP is the leading edge pulse operation start instruction, and is ON only at the leading edge
of the designated bit device (when it goes from OFF to ON). If a word device has been
designated, it is ON only when the designated bit changes from 0 to 1.
In cases where there is only an LDP instruction, it acts identically to instructions for the
creation of a pulse that are executed during ON( P).
Ladder using an LDP instruction Ladder not using an LDP instruction
X0 X0
MOV K0 D0 MOVP K0 D0
X0 X0
M0 PLS M0
5-5
LDP,LDF,ANDP,ANDF,ORP,ORF
(2) LDF is the trailing edge pulse operation start instruction, and is ON only at the trailing edge
of the designated bit device (when it goes from ON to OFF).
If a word device has been designated, it is ON only when the designated bit changes from 1
to 0.
ANDP, ANDF
(1) ANDP is a leading edge pulse series connection instruction, and ANDF is a trailing edge
pulse series connection instruction. They perform an AND operation with the operation
result to that point, and take the resulting value as the operation result.
The ON/OFF data used by ANDP and ANDF are indicated in the table below:
Device Specified in ANDP or ANDF
Bit Designated for ANDP State ANDF State
Bit Device
Word Device
OFF to ON 0 to 1 ON
OFF 0 OFF
ON 1 OFF
ON to OFF 1 to 0 ON
ORP, ORF
(2) ORP is a leading edge pulse parallel connection instruction, and ORF is a trailing edge pulse
serial connection instruction. They perform an OR operation with the operation result to that
point, and take the resulting value as the operation result.
The ON/OFF data used by ORP and ORF are indicated in the table below:
Device Specified in ORP or ORF
Bit Designated for ORP State ORF State
Bit Device
Word Device
OFF to ON 0 to 1 ON
OFF 0 OFF
ON 1 OFF
ON to OFF 1 to 0 ON
Operation Error
(1) There are no operation errors with LDP, LDF, ANDP, ANDF, ORP, or ORF instruction.
Program Example
(1) The following program executes the MOV instruction at input X0, or at the leading edge of
b10 (bit 11) of data register D0.
*1: Word device bit designation is performed in hexadecimal. Bit b10 of D0 will be D0.A.
5-6
LDPI,LDFI,ANDPI,ANDFI,ORPI,ORFI
4
Bit device number / Word device bit designation ( S )
X1/D0.1
LDPI 5
X1/D0.1
LDFI
6
X2/D0.2
ANDPI
7
X2/D0.2
ANDFI
8
ORPI
X3/D0.3
5.1.3 Pulse NOT operation start, pulse NOT series connection, pulse NOT parallel connection (LDPI,LDFI,ANDPI,ANDFI,ORPI,ORFI)
5.1 Contact Instructions
ORFI
X3/D0.3
S ––
Function
LDPI, LDFI
(1) LDPI is the leading edge pulse NOT operation start instruction that is on only at the leading
edge of the specified bit device (when the bit device goes from on to off) or when the bit
device is on or off. If a word device has been specified, LDPI is on only when the specified
bit is 0, 1, or changes from 1 to 0.
5-7
LDPI,LDFI,ANDPI,ANDFI,ORPI,ORFI
(2) LDFI is the trailing edge pulse NOT operation start instruction that is on only at the trailing
edge of the specified bit device (when the bit device goes from off to on) or when the bit
device is on or off. If a word device has been specified, LDFI is on only when the specified
bit is 0, 1, or changes from 0 to 1.
Device Specified in LDPI or LDFI
Bit Designated for LDPI State LDFI State
Bit Device
Word Device
OFF to ON 0 to 1 OFF ON
OFF 0 ON ON
ON 1 ON ON
ON to OFF 1 to 0 ON OFF
ANDPI, ANDFI
(1) ANDPI is a leading edge pulse NOT series connection, and ANDFI is a trailing pulse NOT
series connection. ANDPI and ANDFI execute an AND operation with the previous operation
result, and take the resulting value as the operation result.
The on or off data used by ANDPI and ANDFI are indicated in the table below.
Device Specified in ANDPI or ANDFI
Bit Designated for LDPI State LDFI State
Bit Device
Word Device
OFF to ON 0 to 1 OFF ON
OFF 0 ON ON
ON 1 ON ON
ON to OFF 1 to 0 ON OFF
ORPI, ORFI
(1) ORPI is a leading edge pulse NOT parallel connection, and ORFI is a trailing pulse NOT
parallel connection. ORPI and ORFI execute an OR operation with the previous operation
result, and take the resulting value as the operation result.
The on or off data used by ORPI and ORFI are indicated in the table below.
Device Specified in ORPI or ORFI
Bit Designated for ORPI State ORFI State
Bit Device
Word Device
OFF to ON 0 to 1 OFF ON
OFF 0 ON ON
ON 1 ON ON
ON to OFF 1 to 0 ON OFF
Operation Error
(1) There are no operation errors with LDPI, LDFI, ANDPI, ANDFI, ORPI, or ORFI instruction.
5-8
LDPI,LDFI,ANDPI,ANDFI,ORPI,ORFI
Program Example
1
(1) The following program stores 0 into D0 when X0 is on, off, or turns from on to off, or M0 is
on, off, or turns from off to on.
[Ladder Mode] [List Mode] 2
Step Instruction Device
(2) The following program stores 0 into D0 when X0 is on and b10 (bit 11) of D0 is on, off, or 5
turns from on to off.
Ladder Mode] [List Mode]
Step Instruction Device 6
5.1.3 Pulse NOT operation start, pulse NOT series connection, pulse NOT parallel connection (LDPI,LDFI,ANDPI,ANDFI,ORPI,ORFI)
5.1 Contact Instructions
5-9
ANB,ORB
Basic High
performance Process Redundant Universal
ANB
ANB
Block A Block B
Block A
ORB
ORB
Block B
For parallel connection of 1 contact,
OR or ORI is used.
Function
ANB
(1) Performs an AND operation on block A and block B, and takes the resulting value as the
operation result.
(2) The symbol for ANB is not the contact symbol, but rather is the connection symbol.
(3) When programming in the list mode, up to 15 ANB instructions (16 blocks) can be written
consecutively.
ORB
(1) Conducts an OR operation on Block A and Block B, and takes the resulting value as the
operation result.
(2) ORB is used to perform parallel connections for ladder blocks with two or more contacts.
For ladder blocks with only one contact, use OR or ORI; there is no need for ORB in such
cases.
[Ladder Mode] [List Mode]
X0 X1
Y10 0 LD X0
0
1 AND X1
X2 X3 2 LD X2
3 AND X3
4 ORB
X4 5 OR X4
6 OUT Y10
(3) The ORB symbol is not the contact symbol, but rather is the connection symbol.
(4) When programming in the list mode, it is possible to use up to 15 ORB instructions
successively (16 blocks).
5-10
ANB,ORB
Operation Error
1
(1) There are no operation errors associated with ANB or ORB instruction.
2
Program Example
(1) A program using the ANB and ORB instructions.
3
5-11
MPS,MRD,MPP
Basic High
performance Process Redundant Universal
In the ladder display, MPS, MRD and MPP are not displayed.
Command Command
MPS
Command
MRD
Command
MPP
Function
MPS
(1) Stores the memory of the operation result (ON or OFF) immediately prior to the MPS
instruction.
(2) Up to 16 MPS instructions can be used successively.
If the MPP instruction is used during this process, the number of uses calculated for the
MPS instruction will be decremented by one.
MRD
(1) Reads the operation result stored for the MPS instruction, and uses that result to perform the
operation in the next step.
MPP
(1) Reads the operation result stored for the MPS instruction, and uses that result to perform the
operation in the next step.
(2) Clears the operation results stored by the MPS instruction.
(3) Subtracts 1 from the number of MPS instruction times of use.
5-12
MPS,MRD,MPP
1. The following shows ladders both using and not using the MPS, MRD, and 1
MPP instructions.
Ladder Using the MPS, MRD and MPP Instruction Ladder not Using MPS, MRD, and MPP Instructions
2
X0 X1 X2 X0 X1 X2
Y10 Y10
X3 X4
Y11
X0 X1 X3 X4
Y11
3
X5 X0 X1 X5
Y12 Y12
4
2. The MPS and MPP instructions must be used the same number of times.
Failure to observe this will not correctly display the ladder in the ladder mode of
the peripheral device.
5
6
Operation Error
(1) There are no errors associated with the MPS, MRD, or MPP instruction. 7
8
Program Example
(1) A program using the MPS, MRD, and MPP instructions.
[Ladder Mode] [List Mode]
1)
2)
3) 4) 2)
3)
5) 4)
6) 5)
7)
6)
8)
7)
9) 8)
10) 9)
10)
5-13
MPS,MRD,MPP
[List Mode]
5-14
INV
3
Command
INV
4
Setting Internal Devices J \
R, ZR U \G Zn Constants Other
Data Bit Word Bit Word
–– –– 5
Function 6
Inverts the operation result immediately prior to the INV instruction.
Operation Result Immediately Prior to the Operation Result Following the Execution of
7
INV Instruction the INV Instruction
OFF ON
ON OFF 8
Operation Error
Program Example
(1) A program which inverts the X0 ON/OFF data, and outputs from Y10.
[Ladder Mode] [List Mode]
[Timing Chart]
ON
OFF
X0
ON
Y10
OFF
5-15
INV
1. The INV instruction operates based on the results of calculation made until the
INV instruction is given. Accordingly, use it in the same position as that of the
AND instruction.
The INV instruction cannot be used at the LD and OR positions.
2. When a ladder block is used, the operation result is inverted within the range of
the ladder block. To operate a ladder using the INV instruction in combination
with the ANB instruction, pay attention to the range that will be inverted.
Range inverted
M0 M1 M2
0 Y10
M10 M20
ANB
10 END
5-16
MEP,MEF
Command
MEP 3
Command
MEF 4
Setting
Data
Internal Devices
Bit Word
R, ZR
Bit
J \
Word
U \G Zn Constants Other 5
–– ––
6
Function
MEP 7
(1) If operation results up to the MEP instruction are leading edge (from OFF to ON), goes ON
(continuity status).
If operation results up to the MEP instruction are anything other than leading edge, goes
OFF (non-continuity status). 8
(2) Use of the MEP instruction simplifies pulse conversion processing when multiple contacts are
connected in series.
MEF
(1) If operation results up to the MEF instruction are trailing edge (from ON to OFF), goes ON
Operation Error
(1) There are no operation errors associated with the MEP or MEF instruction.
Program Example
(1) A program which performs pulse conversion to the operation results of X0 and X1
[Ladder Mode] [List Mode]
Step Instruction Device
1. The MEP and MEF instructions will occasionally not function properly when
pulse conversion is conducted for a contact that has been indexed by a
subroutine program or by the FOR to NEXT instructions. If pulse conversion is
to be conducted for a contact that has been indexed by a subroutine program
or by the FOR to NEXT instructions, use the EGP/EGF instructions.
2. Because the MEP and MEF instructions operate with the operation results
immediately prior to the MEP and MEF instructions, the AND instruction should
be used at the same position. The MEP and MEF instructions cannot be used
at the LD or OR position.
5-17
EGP,EGF
Basic High
performance Process Redundant Universal
Command D
EGP
Command D
EGF
D ––
Function
EGP
(1) Operation results up to the EGP instruction are stored in memory by the edge relay (V).
(2) Goes ON (continuity status) at the leading edge (OFF to ON) of the operation result up to the
EGP instruction.
If the operation result up to the EGP instruction is other than a leading edge (i.e., from ON to
ON, ON to OFF, or OFF to OFF), it goes OFF (non-continuity status).
(3) The EGP instruction is used for subroutine programs, and for conducting pulse operations
for programs designated by indexing between the FOR and NEXT instructions.
(4) The EGP instruction can be used like an AND instruction.
EGF
(1) Operation results up to the EGF instruction are stored in memory by the edge relay (V).
(2) Goes ON at the trailing edge (from ON to OFF) of the operation result up to the EGF
instruction.
If the operation result up to the EGF instruction is other than a trailing edge (i.e., from OFF to
ON, ON to ON, or OFF to OFF), it goes OFF (non-continuity status).
(3) The EGF instruction is used for subroutine programs, and for conducting pulse operations
for programs designated by indexing between the FOR and NEXT instructions.
(4) The EGF instruction can be used like an AND instruction.
Operation Error
(1) There are no operation errors associated with the EGP or EGF instruction.
5-18
EGP,EGF
Program Example
1
(1) A program using the EGP instruction in the subroutine program using the EGD instruction
[Ladder Mode] [List Mode]
2
Step Instruction Device
7
[Operation]
END processing (1) (2) (1) (2) (1) (2) (1) (2) (1) (2) 8
ON ON
X0 OFF OFF
ON
X1 OFF
D1 1
1. Since the EGP and EGF instructions are executed according to the operation
results performed immediately before the EGP/EGF instructions, these
instructions must be used at the same position as the AND instruction.
(Refer to Section 5.1.1.)
The EGP and EGF instruction cannot be used at the position of the LD or OR
instruction.
2. EGP and EGF instructions cannot be used at the ladder block positions shown
below.
X0 X1 V0
SET M0
X2
5-19
OUT
Basic High
performance Process Redundant Universal
Word device
Command bit designation ( D )
D0.5
(Other
D than T, C, ––
or F)
Function
(1) Operation results up to the OUT instruction are output to the designated device.
(a) When Using Bit Devices
Operation Results Coil
OFF OFF
ON ON
(b) When Bit Designation has been Made for Word Device
Operation Results Bit Designated
OFF 0
ON 1
Operation Error
(1) There are no operation errors associated with the OUT instruction.
5-20
OUT
Program Example
1
(1) When using bit devices
[Ladder Mode] [List Mode]
2
Step Instruction Device
(2) When bit designation has been made for word device
5
[Ladder Mode] [List Mode]
Step Instruction Device
6
8
b15 b7 b6 b5 b0
D0
5-21
OUT T,OUTH T
Basic High
performance Process Redundant Universal
D (Only T) –– –– –– –– –– –– ––
(Other
Set value –– –– –– *2 ––
than T, C)
*1: The value setting for the timer cannot be designated indirectly.
Function
(1) When the operation results up to the OUT instruction are ON, the timer coil goes ON and the
timer counts up to the value that has been set; when the time up status (total numeric value
is equal to or greater than the setting value), the contact responds as follows:
A Contact Continuity
B Contact Non-continuity
5-22
OUT T,OUTH T
(2) The contact responds as follows when the operation result up to the OUT instruction is a
change from ON to OFF:
Present Value of Prior to Time Up After Time Up
1
Type of Timer Timer Coil
Timer A Contact B Contact A Contact B Contact
Low speed timer
High speed timer
OFF 0 Non-continuity Continuity Non-continuity Continuity 2
Low speed
retentive timer Maintains the
High speed
OFF
present value
Non-continuity Continuity Continuity Non-continuity
3
retentive timer
(3) To clear the present value of a retentive timer and turn the contact OFF after time up, use the
RST instruction. 4
(4) A negative number ( 32768 to 1) cannot be set as the setting value for the timer.*3
If the setting value is 0, the timer will time out when the time the OUT instruction is executed.
*3: When specifying a setting value for the timer using a word device (D, W, R, ZR, J \ or U \ ), whether
5
the value is in the setting range is not checked. Check the value in the user program so that a negative
number is not set.
(5) The following processing is conducted when the OUT instruction is executed: 6
• OUT T coil turned ON or OFF
• OUT T contact turned ON or OFF
• OUT T present value updated
7
In cases where a JMP instruction or the like is used to jump to an OUT T instruction while
the OUT T instruction is ON, no present value update or contact ON/OFF operation is
conducted.
8
Also, if the same OUT T instruction is conducted two or more times during the same scan,
the present value of the number of repetitions executed will be updated.
(6) Indexing for timer coils or contacts can be conducted only by Z0 or Z1.
Remark
1. Timer's time limit
Time limit of the timer is set in the PLC system of the PLC parameter dialog
box.
QCPU
Type of Timer
Setting Range Setting Unit
Low speed timer 1 ms to 1000 ms
1 ms
Low speed retentive timer (Default: 100 ms)
High speed timer 0.1 ms to 100.0 ms
0.1 ms
High speed retentive timer (Default: 10.0 ms)
Operation Error
(1) There are no operation errors associated with the OUT T instruction.
5-23
OUT T,OUTH T
Caution
(1) When creating a program in which the operation the timer contact triggers the operation of
other timer, create the program for the timer that operates later first.
In the following cases, all timers go ON at the same scan if the program is created in the
order the timers operate.
• If the set value is smaller than a scan time.
• If "1" is set
Example
• For timers T0 to T2, the program is created in the order the timer operates later.
T1 K1
T2 T2 timer starts measurement from the next scan after
turning ON of the contact of T1 timer.
T0 K1
T1 T1 timer starts measurement from the next scan after
turning ON of the contact of T0 timer.
X0 K1
T0 T0 timer starts measurement when X0 is turned ON.
• For timers T0 to T2, the program is created in the order of timer operation.
X0 K1
T0 T0 timer starts measurement when X0 is turned ON.
T0 K1
T1
5-24
OUT T,OUTH T
Program Example
1
(1) The following program turns Y10 and Y14 ON 10 seconds after X0 has gone ON.
[Ladder Mode] [List Mode]
*3
2
Step Instruction Device
*3: The setting value of the low-speed timer indicates its default time limit (100 ms). 5
(2) The following program uses the BCD data at X10 to X1F as the timer's set value.
[Ladder Mode] 6
Converts the BCD data at X10 to X1F to BIN
and stores the converted value at D10.
When X2 is turned ON, T2 starts measurement
7
using the data stored in D10 as the set value.
Y15 goes ON at the count-up of T2.
8
[List Mode]
*4: The setting value of the high-speed timer indicates its default time limit (10 ms).
5-25
OUT C
Basic High
performance Process Redundant Universal
D (Only C) –– –– –– –– –– –– ––
(Other
Set value –– –– –– *2 ––
than T, C)
*1: Counter value cannot be set by indirect designation.
Function
(1) When the operation results up to the OUT instruction change from OFF to ON, 1 is added to
the present value (count value) and the count up status (present value set value), and the
contacts respond as follows:
A Contact Continuity
B Contact Non-continuity
(2) No count is conducted with the operation results at ON. (There is no need to perform pulse
conversion on count input.)
(3) After the count up status is reached, there is no change in the count value or the contacts
until the RST instruction is executed.
(4) A negative number ( 32768 to 1) cannot be set as the setting value for the timer.
If the set value is 0, the processing is identical to that which takes place for 1.
(5) Indexing for the counter coil and contact can use only Z0 and Z1.
Counter setting value has no limitation for indexing.
Remark
1. For counter counting methods, refer to the User's Manual
(Functions Explanation, Program Fundamentals) for the CPU module used.
2. The number of basic steps of the OUT C instruction is 4.
5-26
OUT C
Operation Error
1
(1) There are no operation errors associated with the OUT C instruction.
2
Program Example
(1) The following program turns Y30 ON after X0 has gone ON 10 times, and resets the counter 3
when X1 goes ON.
[Ladder Mode] [List Mode]
(2) The following program sets the value for C10 at 10 when X0 goes ON, and at 20 when X1 7
goes ON.
[Ladder Mode]
[List Mode]
5-27
OUT F
Basic High
performance Process Redundant Universal
Annunciator number
Command
OUT F F35
D (Only F) ––
Function
(1) Operation results up to the OUT instruction are output to the designated annunciator.
(2) The following responses occur when an annunciator (F) is turned ON.
5-28
OUT F
Operation Error
1
(1) There are no operation errors associated with the OUT F instruction.
Remark
2
1. For details of annunciators, refer to the User's Manual (Functions Explanation,
Program Fundamentals) for the CPU module used. 3
2. The number of basic steps for the OUT module F instruction is 2.
3. The table below shows which CPU module features either the LED display
device on front of the CPU module or "USER" LED. 4
Type of LED CPU Module Type Name
High Performance model QCPU, Process CPU, Redundant
"USER" LED
CPU, Universal model QCPU
5
"ERR." LED Basic model QCPU
Program Example 7
(1) The following program turns F7 ON when X0 goes ON, and stores the value 7 from SD64 to
SD79.
[Ladder Mode] [List Mode]
8
Step Instruction Device
SD79 0 SD79 0
5-29
SET
Basic High
performance Process Redundant Universal
Command
SET SET D
D (Other than T, C) ––
Function
(1) When the execution command is turned ON, the status of the designated devices becomes
as shown below:
Device Device Status
Bit device Coils and contacts turned ON
When Bit Designation has been Made for Word Device Designation bit set at 1
(2) Devices turned ON by the instruction remain ON when the same command is turned OFF.
Devices turned ON by the SET instruction can be turned OFF by the RST instruction.
Command ON
X5
SET Y10 X5 OFF
ON
X7
RST Y10 X7 OFF
Command
ON
Y10 OFF
(3) When the execution command is OFF, the status of devices does not change.
5-30
SET
Operation Error
1
(1) There are no operation errors associated with the SET instruction.
2
Program Example
(1) The following program sets Y8B (ON) when X8 goes ON, and resets Y8B (OFF) when X9
3
goes ON.
[Ladder Mode] [List Mode]
4
Step Instruction Device
6
(2) The following program sets the value of D0 bit 5 (b5) to 1 when X8 goes ON, and set the bit
value to 0 when X9 goes ON. 7
[Ladder Mode] [List Mode]
Remark
1. The number of basic steps for the SET instruction is as follows:
• When internal device or file register (R0 to R32767) are in use : 1
• When direct access output (DY) or SFC program device (BL) are in use
:2
• When using serial number access format file register
(Only for Universal model QCPU) :2
(Other than Universal model QCPU) :3
• When some other device is in use :3
2. When using X as a device, use the device numbers that are not used for the
actual input. If the same number is used for the actual input device and input X,
the data of the actual input will be written over the input X specified in the SET
instruction.
5-31
RST
Basic High
performance Process Redundant Universal
Command
RST RST D
D ––
Function
(1) When the execution command is turned ON, the status of the designated devices becomes
as shown below:
Device Device Status
Bit device Turns coils and contacts OFF
Timers and counters Sets the present value to 0, and turns coils and contacts OFF
When Bit Designation has been Made for Word Device Sets value of designated bit to 0
Word devices other than timers and counters Sets contact to 0
(2) When the execution command is OFF, the status of devices does not change.
(3) The functions of the word devices designated by the RST instruction are identical to the
following ladder:
Command Command
X10 X10
RST D50 MOV K0 D50
5-32
RST
Operation Error
1
(1) There are no operation errors associated with the RST instruction.
Remark
2
The basic number of steps of the RST instruction is as follows.
a) For bit processing
3
• Internal device (bit to be specified by bit device or word device) :1
• Direct access output :2
• Timer, counter :4
4
• When using serial number access format file register
(Only for Universal model QCPU) :2
(Other than Universal model QCPU) :3
• Other than above :3
5
b) For word processing
• Internal device :2
• Index resister :2 6
• When using serial number access format file register
(Only for Universal model QCPU) :2
(Other than Universal model QCPU) :3 7
• Other than above :3
8
Program Example
(1) The following program sets the value of the data register to 0.
[List Mode]
5-33
RST
(2) The following program resets the 100 ms retentive timer and counter.
[Ladder Mode]
[List Mode]
Step Instruction Device
5-34
SET F,RST F
SET
Command
SET D
3
Command
RST RST D
4
SET D : Number of the annunciator to be set (F number) (bits)
D
Bit
(Only F)
Word Bit Word
––
6
7
Function
SET
8
(1) The annunciator designated by D is turned ON when the execution command is turned ON.
(2) The following responses occur when an annunciator (F) is turned ON.
• The "USER" LED goes ON.*1
• The annunciator numbers which are ON (F numbers) are stored in special registers
Remark
1. For details of annunciators,refer to the User's Manual (Functions Explanatio
Program Fundamentals) for the CPU module used.
2. The number of basic steps for the SET F and RST F instructions is 2.
5-35
SET F,RST F
(3) When the value of SD63 is "16", the annunciator numbers are deleted from SD64 to SD79
by the use of the RST instruction. If the annunciators whose numbers are not registered in
SD64 to SD79 are ON, these numbers will be registered.
If all annunciator numbers from SD64 to SD79 are turned OFF, the LED display device on
the front of the CPU module, or the "USER" LED, will be turned OFF.*2
*2: When using the Basic model QCPU, the "ERR." LED goes OFF.
SD63 16 16 16
SD64 233 SD64 233 SD64 233
SD65 90 SD65 90 SD65 700
SD66 700 SD66 700 SD66 28 F number in
SD67 is stored.
SD77 145
SD78 145 SD78 145 SD78 1027
SD79 1027 SD79 1027 SD79 30
Contents of SD63 and F30, which was ON,
those of SD64 to SD79 is stored in SD79.
are not changed.
Operation Error
(1) There are no operation errors associated with the SET F or RST F instruction.
Program Example
(1) The following program turns annunciator F11 ON when X1 goes ON, and stores the value 11
at the special register (SD64 to SD79). Further, the program resets annunciator F11 if X2
goes ON, and deletes the value 11 from the special registers (SD64 to SD79).
[Ladder Mode] [List Mode]
[Operation]
When X1 is ON When X2 is ON
Adds 1 Subtracts 1
SD63 0 SD63 1 SD63 0
SD64 0 SD64 11 SD64 0
SD65 0 SD65 0 SD65 0
SD66 0 SD66 0 SD66 0
SD67 0 SD67 0
5-36
PLS,PLF
3
Command
PLS PLS D
Command 4
PLF PLF D
D ––
6
Function 7
PLS
8
(1) Turns ON the designated device when the execution command is turned OFF ON, and
turns OFF the device in any other case the execution command is turned OFF ON (i.e., at
ON ON, ON OFF or OFF OFF of the execution command).
When there is one PLS instruction for the device designated by D during one scan, the
X5 OFF
X5
PLS M0 ON
M0 OFF
1 scan 1 scan
(2) If the RUN/STOP key switch is changed from RUN to STOP after the execution of the PLS
instruction, the PLS instruction will not be executed again even if the switch is set back to
RUN.
X0 Operating the Operating the
PLS M0 RUN/STOP RUN/STOP
key switch of key switch of
Operating the
Operating the CPU module CPU module
RUN/STOP
RUN/STOP key "STOP RUN". "STOP RUN".
key switch of
switch of CPU module CPU module
LD X0 "RUN STOP". "RUN STOP".
LD X0 LD X0
PLS
PLS M0 PLS M0
END 0 M0 END END 0
CPU operation CPU operation
ON stop time stop time
X0 OFF ON
M0 OFF
1 scan of PLS M0
5-37
PLS,PLF
(3) When designating a latch relay (L) for the execution command and turning the power supply
OFF to ON with the latch relay ON, the execution command turns OFF to ON at the first
scan, executing the PLS instruction and turning ON the designated device.
The device turned ON at the first scan after power-ON turns OFF at the next PLS instruction.
PLF
(1) Turns ON the designated device when the execution command is turned ON OFF, and
turns OFF the device in any other case the execution command is turned ON OFF (i.e., at
OFF OFF, OFF ON or ON ON of the execution command).
When there is one PLF instruction for the device designated by D during one scan, the
specified device turns ON one scan.
See Section 3.9 for the operation to be performed when the PLF instruction for the same device
is executed more than once during one scan.
ON
X5 OFF
X5
PLF M0 ON
M0 OFF
1 scan 1 scan
(2) If the RUN/STOP key switch is changed from RUN to STOP after the execution of the PLF
instruction, the PLF instruction will not be executed again even if the switch is set back to
RUN.
Note that the device designated by D may remain ON for more than one scan if
the PLS or PLF instruction is jumped by the CJ instruction or if the executed
subroutine program was not called by the CALL instruction.
Operation Error
(1) There are no operation errors associated with the PLS or PLF instruction.
Program Example
(1) The following program executes the PLS instruction when X9 goes ON.
[Ladder Mode] [List Mode]
[Timing Chart]
ON
X9 OFF
ON
M9 OFF
1 scan
5-38
PLS,PLF
(2) The following program executes the PLF instruction when X9 goes OFF.
[Ladder Mode] [List Mode] 1
Step Instruction Device
[Timing Chart] 3
ON
X9 OFF
ON 4
M9 OFF
1 scan
5
5-39
FF
Basic High
performance Process Redundant Universal
Command
FF FF D
D ––
Function
(1) Reverses the output status of the device designated by D when the execution command is
turned OFF ON.
Device Status
Device
Prior to FF Execution After FF Execution
OFF ON
Bit device
ON OFF
0 1
Bit designated for word device
1 0
Operation Error
(1) There are no operation errors associated with the FF instruction.
Program Example
(1) The following program reverses the output of Y10 when X9 goes ON.
[Ladder Mode] [List Mode]
[Timing Chart]
ON
X9 OFF
ON
Y10 OFF
5-40
FF
(2) The following program reverses b10 (bit 10) of D10 when X0 goes ON.
[Ladder Mode] [List Mode]
1
Step Instruction Device
[Timing Chart] 3
ON
X0 OFF
4
D10 of b10 0 1 0
5-41
DELTA(P)
Basic High
performance Process Redundant Universal
Command
DELTA DELTA D
Command
DELTAP DELTAP D
D ––
Function
(1) Conducts pulse output of direct access output (DY) designated by D .
If DELTA DY0 has been designated, the resulting operation will be identical to the ladder
shown below, which uses the SET/RST instructions.
[Ladder using the DELTA instruction] [Ladder using the SET/RST instructions]
X100 X100
DELTA DY0 SET DY0
RST DY0
[Operation]
END processing DELTA DY0 DELTA DY0
ON
X100 OFF
ON ON
DY0 OFF
(2) The DELTA (P) instruction is used by commands for leading edge execution for an intelligent
function module.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• A direct access output number designated by D has exceeded the CPU module output
range. (Error code: 4101)
5-42
DELTA(P)
Program Example
1
(1) The following program presets CH1 of the AD61 mounted at slot 0 of the main base unit,
when X20 goes ON.
[Ladder Mode] 2
Stores preset value (0) at addresses 1 and 2
of the AD61 buffer memory. 3
Outputs the preset command.
[List Mode]
5
Step Instruction Device
5-43
SFT(P)
Basic High
performance Process Redundant Universal
Command
SFT SFT D
Command
SFTP SFTP D
D (Other than T, C) ––
Function
(1) When bit device is used
(a) Shifts to a device designated by D the ON/OFF status of the device immediately prior
to the one designated by D , and turns the prior device OFF.
For example, if M11 has been designated by the SFT instruction, when the SFT
instruction is executed, it will shift the ON/OFF status of M10 to M11, and turn M10 OFF.
(b) Turn the first device to be shifted ON with the SET instruction.
(c) When the SFT and SFTP are to be used consecutively, the program starts from the
device with the larger number.
Shift range
Shift input
M0 M15 M14 M13 M12 M11 M10 M9 M8
SFTP M14 (1) 0 0 0 0 0 1 1 0 X02 ON
0
(2) 0 0 0 0 1 0 1 0 After the 1st shift input
SFTP M13 0
(3) 0 0 0 1 0 0 1 0 After the 2nd shift input
Head device to shift * At M8 to M15, "1" indicates ON and "0" indicates OFF.
5-44
SFT(P)
(a) Shifts to a bit in the device designated by D the 1/0 status of the bit immediately prior to 1
the one designated by D , and turns the prior bit to 0.
For example, if D0.5 (bit 5 [b5] of D0) has been designated by the SFT instruction, when
the SFT instruction is executed, it will shift the 1/0 status of b4 of D0 to b5, and turn b4 2
to 0.
b15 to b5 b4 to b0
Before the
execution of shift
0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 3
D0 0
After the
0 1 0 0 1 0 0 0 1 1 1 0 0 0 0 1
execution of shift
4
Operation Error 5
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0. 6
• The device specified by D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
7
5-45
SFT(P)
Program Example
(1) The following program shifts Y57 to Y5B when X8 goes ON.
[Ladder Mode]
5-46
MC,MCR
Command
4
MC n MC n D
D
D –– ––
8
Function
X6 X4 X6 X4
MCR n1 MCR n1
X0F XF
Y10 Y40
Remark
Inputting of contacts on the vertical bus is not necessary when programming in the
write mode of a peripheral device.
These will be automatically displayed when the "conversion" operation is
conducted after the creation of the ladder and then "read" mode is set.
5-47
MC,MCR
MC
(1) If the execution command of the MC instruction is ON when master control is started, the
result of the operation from the MC instruction to the MCR instruction will be exactly as the
instruction (ladder) shows.
If the execution command of the MC instruction is OFF, the result of the operation from the
MC instruction to the MCR instruction will be as shown below:
Device Device Status
High speed timer
Count value goes to 0, coils and contacts all go OFF.
Low speed timer
High speed retentive timer
Coils go OFF, but counter values and contacts all maintain
Low speed retentive timer
current status.
Counter
Devices in OUT instruction All turned OFF
SET, RST
SFT
Devices in the following instructions: Maintain current status
Basic,
Application
(2) Even when the MC instruction is OFF, instructions from the MC instruction to the MCR
instruction will be executed, so scan time will not be shortened.
When a ladder with master control contains instructions that do not require any
contact instruction (such as FOR to NEXT, EI, DI instructions), the CPU module
executes these instructions regardless of the ON/OFF status of the MC instruction
execution command.
(3) By changing the device designated by D , the MC instruction can use the same nesting (N)
number as often as desired.
(4) Coils from devices designated by D are turned ON when the MC instruction is ON.
Further, using these same devices with the OUT instruction or other instructions will cause
them to become double coils, so devices designated by D should not be used within other
instructions.
MCR
(1) This is the instruction for recovery from the master control, and indicates the end of the
master control range of operation.
(2) Do not place contact instructions before the MCR instruction.
(3) Use the MC instruction and MCR instruction of the same nesting number as a set.
However, when the MCR instructions are nested in one place, all master controls can be
terminated with the lowest nesting (N) number.
(Refer to the "Precautions for nesting" in the program example.)
Operation Error
(1) There are no operation errors associated with the MC or MCR instruction.
5-48
MC,MCR
Program Example
1
The master control instruction can be used in nesting. The different master control regions are
distinguished by nesting (N). Nesting can be performed from N0 to N14.
2
The use of nesting enables the creation of ladders which successively limit the execution
condition of the program.
A ladder using nesting would appear as shown below: 3
6
N1 M16 N1 M16 Executed
when A and
B are ON.
C C
MC N2 M17 MC N2 M17
N2 M17 N2 M17 Executed 7
when A, B
and C are ON.
MCR N2 MCR N2
8
Executed
when A and
B are ON.
MCR N1 MCR N1
MCR N0 MCR N0
Not related
to the status
of A, B or C.
5-49
MC,MCR
B
MC N0 M16 MC N0 M16
N0 M16 N0 M16
MCR N1 MCR N1
MCR N0 MCR N0
(2) If the nesting architecture results in MCR instructions concentrated in one location, all
master controls can be terminated by use of just the lowest nesting number (N).
X1 X1
MC NO M15 MC NO M15
NO M15 NO M15
X2 X2
MC N1 M16 MC N1 M16
N1 M16 N1 M16
X3 X3
MC N2 M17 MC N2 M17
N2 M17 N2 M17
MCR N2 MCR N0
MCR N1
MCR N0
5-50
FEND
4
FEND FEND
5
Setting Internal Devices J \
R, ZR U \G Zn Constants Other
Data
––
Bit Word Bit Word
––
6
7
Function
(1) The FEND instruction is used in cases where the CJ instruction or other instructions are
used to cause a branch in the sequence program operations, and in cases where the main 8
routine program is to be split from a subroutine program or an interrupt program.
(2) Execution of the FEND instruction will cause the CPU module to terminate the program it
was executing.
Operation 0 CALL P
Main routine
performed program Jump caused Main routine
when the CJ by the CJ instruction program
instruction is CJ P
not executed Operation FEND
Main routine
program performed P Subroutine
when the CJ program
FEND instruction is
executed I
P Main routine Interrupt program
program
END
FEND
END
(a) When the CJ instruction is used (b) When there are subroutine and
interrupt programs
5-51
FEND
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The FEND instruction is executed after the execution of the CALL, FCALL, ECALL, or
EFCALL instruction, and before the execution of the RET instruction.
(Error code: 4211)
• The FEND instruction is executed after the execution of the FOR instruction, and before
the execution of the NEXT instruction. (Error code: 4200)
• The FEND instruction is executed during an interrupt program, and before the execution
of the IRET instruction. (Error code: 4221)
• The FEND instruction is executed between the CHKCIR and CHKEND instructions.
(Error code: 4230)
• The FEND instruction is executed between the IX and IXEND instructions.
(Error code: 4231)
Program Example
(1) The following program uses the CJ instruction.
[Ladder Mode]
[List Mode]
5-52
END
END
5
END
6
Setting Internal Devices J \
R, ZR U \G Zn Constants Other
Data Bit Word Bit Word
–– ––
7
Function 8
(1) Indicates termination of programs, including main routine program, subroutine program, and
interrupt programs.
Execution of the END instruction will cause the CPU module to terminate the program that
was being executed.
Sequence program
END
(2) The END instruction cannot be used during the execution of the main sequence program.
If it is necessary to perform END processing during the execution of a program, use the
FEND instruction.
(3) When programming in the ladder mode of a peripheral device, it is not necessary to input the
END instruction.
5-53
END
(4) The use of the END and FEND instructions is broken down as follows for main routine
programs, subroutine programs, and interrupt programs:
Interrupt program
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The END instruction was executed before the execution of the RET instruction and after
the execution of the CALL, FCALL, ECALL, or EFCALL instruction.
(Error code: 4211)
• The END instruction was executed before the execution of the NEXT instruction and after
the execution of the FOR instruction.
(Error code: 4200)
• The END instruction was executed during an interrupt program prior to the execution of
the IRET instruction.
(Error code: 4221)
• The END instruction was executed within the CHKCIR to CHKEND instruction loop.
(Error code: 4230)
• The END instruction was executed within the IX to IXEND instruction loop.
(Error code: 4231)
5-54
STOP
4
Command
STOP STOP
5
Setting Internal Devices J \
R, ZR U \G Zn Constants Other
Data
––
Bit Word Bit Word
––
6
7
Function
(1) Resets the output (Y) and stops the CPU module operation when the execution command is
turned ON.
8
(The same result will take place if the RUN/STOP (key) switch is turned to the STOP
setting.)
(2) Execution of the STOP instruction will cause the value of b4 to b7 of the special register
(3) In order to restart CPU module operations after the execution of the STOP instruction, return
the RUN/STOP key switch, which has been changed from RUN to STOP, back to the RUN
position.
5-55
STOP
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The STOP instruction was executed before the execution of the RET instruction and after
the execution of the CALL/FCALL/ECALL/EFCALL/XCALL instruction.
(Error code: 4211)
• The STOP instruction was executed before the execution of the NEXT instruction and
after the execution of the FOR instruction. (Error code: 4200)
• The STOP instruction was executed during an interrupt program prior to the execution of
the IRET instruction. (Error code: 4221)
• The STOP instruction was executed within the CHKCIR to CHKEND instruction loop.
(Error code: 4230)
• The STOP instruction was executed within the IX to IXEND instruction loop.
(Error code: 4231)
• The STOP instruction was executed during the fixed scan execution type program.
(For the Universal model QCPU only) (Error code: 4223)
Program Example
(1) The following program stops the CPU module when X8 goes ON.
[Ladder Mode]
Sequence program
[List Mode]
5-56
NOP,NOPLF,PAGE n
PAGE n PAGE n
5
7
Function
8
NOP
(1) This is a no operation instruction that has no impact on any operations up to that point.
(2) The NOP instruction is used in the following cases:
(b) To delete an instruction without having to change the number of steps. (Replace the
instruction with NOP.)
NOPLF
(1) This is a no operation instruction that has no impact on any operations up to that point.
(2) The NOPLF instruction is used when printing from a peripheral device to force a page
change at any desired location.
(a) When printing ladders
• A page break will be inserted between ladder blocks with the presence of the NOPLF
instruction.
• The ladder cannot be displayed correctly if an NOPLF instruction is inserted in the
midst of a ladder block.
Do not insert an NOPLF instruction in the midst of a ladder block.
(3) Refer to the Operating Manual for the peripheral device in use for details of printouts from
peripheral devices.
5-57
NOP,NOPLF,PAGE n
PAGE n
(1) This is a no operation instruction that has no impact on any operations up to that point.
(2) No processing is performed at peripheral devices with this instruction.
Operation Error
(1) There are no errors associated with the NOP, NOPLF, or PAGE instruction.
Program Example
NOP
(1) Contact closed.... Deletes the AND or ANI instruction.
[Ladder Mode] [List Mode]
Before change
Changing to NOP
After change
(2) Contact closed.... LD, LDI changed to NOP. (Note carefully that changing the LD and LDI
instructions to NOP completely changes the nature of the ladder.)
[Ladder Mode] [List Mode]
Before change
Step
Step Instruction
Instruction Device
Device
Changing to NOP
After change
5-58
NOP,NOPLF,PAGE n
Before change 1
Step Instruction Device
2
Changing to LD T3
Changing to NOP
After change 4
Step Instruction Device
5
NOPLF 7
[Ladder Mode] [List Mode]
5-59
NOP,NOPLF,PAGE n
X0
0 MOV K1 D30
MOV K2 D40
X1
6 Y40
8 END
• Printing an instruction list with the NOPLF instruction will result in the following:
0 LD X0
1 MOV K1 D30
3 MOV K2 D40
6 LD X1
7 OUT Y40
8 END
PAGE n
[Ladder Mode] [List Mode]
Step Instruction Device
NOP
5-60
6
7
BASIC
INSTRUCTIONS 7
Reference
7
Category Processing Details
Section
Comparison operation
instruction
Compares data to data. Section 6.1
7
Adds, subtracts, multiplies, divides, increments, or
Arithmetic operation instruction Section 6.2
decrements data with other data.
Data conversion instructions Converts data types. Section 6.3
Data transfer instruction Transmits designated data. Section 6.4
Program branch instruction Program jumps. Section 6.5
Program run control instruction Enables and disables program interrupts. Section 6.6
I/O refresh instruction Refreshes bit devices. Section 6.7
Up/down counters, teaching timers, special function timers,
Other convenient instructions Section 6.8
rotary table shortest direction controls, etc.
6-1
=,<>,>,<=,<,>=
Basic High
performance Process Redundant Universal
LD S1 S2
Command
AND S1 S2
Command Command
OR
S1 S2
S1 , S2 : Data for comparison or head number of the devices where the data for comparison is stored (BIN 16 bits)
S1 ––
S2 ––
Function
(1) Treats BIN 16-bit data from device designated by S1 and BIN 16-bit data from device
designated by S2 as an a normally-open contact, and performs comparison operation.
(2) The results of the comparison operations for the individual instructions are as follows:
Instruction Comparison Instruction Comparison
Condition Condition
Symbol in Operation Result Symbol in Operation Result
= S2 = S1 = S1 S2
<> S1 S2 <> S2 = S1
(3) When S1 and S2 are assigned by a hexadecimal constant and the numerical value (8 to F)
whose most significant bit (b15) is "1" is designated as a constant, the value is considered
as a negative BIN value in comparison operation.
6-2
=,<>,>,<=,<,>=
Operation Error
1
(1) There are no operation errors associated with the , , , , , or instruction.
2
Program Example
(1) The following program compares the data at X0 to XF with the data at D3, and turns Y33 ON 3
if the data is identical.
[Ladder Mode] [List Mode]
Step Instruction Device 4
4
(2) The following program compares BIN value K100 to the data at D3, and establishes
continuity if the data in D3 is something other than 100. 6
[Ladder Mode] [List Mode]
Step Instruction Device
7
8
(3) The following program compares the BIN value 100 with the data at D3, and establishes
continuity if the D3 data is less than 100.
[Ladder Mode] [List Mode]
(4) The following program compares the data in D0 and D3, and if the data in D0 is equal to or
less than the data in D3, establishes continuity.
[Ladder Mode] [List Mode]
Step Instruction Device
6-3
D=,D<>,D>,D<=,D<,D>=
Basic High
performance Process Redundant Universal
LD S1 S2
Command
AND S1 S2
Command Command
OR
S1 S2
S1 , S2 : Data for comparison or head number of the devices where the data for comparison is stored (BIN 32 bits)
S1 ––
S2 ––
Function
(1) Treats BIN 32-bit data from device designated by S1 and BIN 32-bit data from device
designated by S2 as an a normally-open contact, and performs comparison operation.
(2) The results of the comparison operations for the individual instructions are as follows:
Instruction Comparison Instruction Comparison
Condition Condition
Symbol in Operation Result Symbol in Operation Result
D= S2 = S1 D= S1 S2
D<> S1 S2 D<> S2 = S1
(3) When S1 and S2 are assigned by a hexadecimal constant and the numerical value (8 to F)
whose most significant bit (b31) is "1" is designated as a constant, the value is considered
as a negative BIN value in comparison operation.
(4) Data used for comparison should be designated by a 32-bit instruction (DMOV instruction,
etc.).
If designation is made with a 16-bit instruction (MOV instruction, etc.), comparisons of large
and small values cannot be performed correctly.
6-4
D=,D<>,D>,D<=,D<,D>=
Operation Error
1
(1) There are no operation errors associated with the D , D ,D ,D ,D or D
instruction.
2
Program Example
3
(1) The following program compares the data at X0 to X1F with the data at D3 and D4, and
turns Y33 ON, if the data at X0 to X1F and the data at D3 and D4 match.
[Ladder Mode] [List Mode] 4
Step Instruction Device
(2) The following program compares BIN value K38000 to the data at D3, and D4, and
6
establishes continuity if the data in D3 and D4 is something other than 38000.
[Ladder Mode] [List Mode]
7
Step Instruction Device
(3) The following program compares BIN value K 80000 to the data at D3 and D4, and
establishes continuity if the data in D3 and D4 is less than 80000.
(4) The following program compares the data in D0 and D1 with the data in D3 and D4, and
establishes continuity if the data in D0 and D1 is equal to or less than the data in D3 and D4.
[Ladder Mode] [List Mode]
Step Instruction Device
6-5
E=,E<>,E>,E<=,E<,E>=
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
LD S1 S2
Command
AND S1 S2
Command Command
OR
S1 S2
S1 , S2 : Data for comparison or head number of the devices where the data for comparison is stored
(real number)
S1 –– –– –– ––
S2 –– –– –– ––
(1) The 32-bit floating decimal point data from device designated by S1 and 32-bit floating decimal
point data from device designated by S2 as A normally-open contact, and performs comparison
operation.
(2) The results of the comparison operations for the individual instructions are as follows:
Instruction Comparison Instruction Comparison
Condition Condition
Symbol in Operation Result Symbol in Operation Result
E= S2 = S1 E= S1 S2
E<> S1 S2 E<> S2 = S1
Note that use of the E= instruction can on occasion result in situations where
errors cause the two values to not be equal.
Example X0
EMOV E1.23 D0
E* D0 E4.56 D2
E/ D2 E4.56 D2
E D0 D2 M0
6-6
E=,E<>,E>,E<=,E<,E>=
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is 0. *1 2
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant
CPU) (Error code: 4100)
*1: There are CPU modules that will not result in an operation error if 0 is specified. For details, refer to 3
Section 3.2.4.
• The value of the specified device is outside the following range. (For the Universal model
QCPU) 4
0, 2 -126 | value of specified device | < 2128 (Error code: 4140)
• The value of the specified device is 0, unnormalized number, nonnumeric, and ± .
(For the Universal model QCPU only) (Error code: 4140) 4
Program Example 6
(1) The following program compares 32-bit floating decimal point real number data at D0 and
D1 to 32-bit floating decimal point real number data at D3 and D4.
[Ladder Mode] [List Mode] 7
Step Instruction Device
(2) The following program compares the floating decimal point real number 1.23 to the 32-bit
floating decimal point real number data at D3 and D4.
(3) The following program compares 32-bit floating decimal point real number data at D0 and
D1 to 32-bit floating decimal point real number data at D3 and D4.
[Ladder Mode] [List Mode]
Step Instruction Device
(4) The following program compares the 32-bit floating decimal point data at D0 and D1 to the
floating decimal point real number 1.23.
[Ladder Mode] [List Mode]
Step Instruction Device
6-7
ED=,ED<>,ED>,ED<=,ED<,ED>=
High
Basic performance Process Redundant Universal
LD S1 S2
Command
AND S1 S2
Command Command
OR
S1 S2
S1 , S2 : Data for comparison or head number of the devices where the data for comparison is stored
(real number)
S1 –– –– –– ––
S2 –– –– –– ––
Function
(1) The 64-bit floating decimal point real number from device designated by S1 and 64-bit floating
decimal point real number from device designated by S2 as A normally-open contact, and
performs comparison operation.
(2) The results of the comparison operations for the individual instructions are as follows:
Instruction Comparison Instruction Comparison
Condition Condition
Symbol in Operation Result Symbol in Operation Result
ED= S2 = S1 ED= S1 S2
ED<> S1 S2 ED<> S2 = S1
6-8
ED=,ED<>,ED>,ED<=,ED<,ED>=
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is not in the following range: (Error code: 4140) 2
0,2 -1022 | value of specified device | < 21024
• The value of the designated device is 0. (Error code: 4140)
3
Program Example 4
(1) The following program compares 64-bit floating decimal point real number data at D0 to D3
with 64-bit floating decimal point real number data at D4 to D7.
4
[Ladder Mode] [List Mode]
7
(2) The following program compares the floating decimal point real number 1.23 with the 64-bit
floating decimal point real number data at D4 to D7.
[Ladder Mode] [List Mode] 8
Step Instruction Device
(4) The following program compares the 64-bit floating decimal point data at D0 to D3 with the
floating decimal point real number 1.23.
[Ladder Mode] [List Mode]
6-9
ED=,ED<>,ED>,ED<=,ED<,ED>=
Caution
(1) Since the number of digits of the real number that can be input by GX Developer is up to 15
digits, the comparison with the real number whose number of significant digits is 16 or more
cannot be made by the instruction shown in this section.
When judging match/mismatch with the real number whose significant digits is 16 or more by
the instruction in this section, compare it with the approximate values of the real number to
be compared and judge by the sizes.
Example When judging the match of E1.234567890123456+10 (Number of significant
digits is 16) and the double-precision floating-point data.
6-10
$=,$<>,$>,$<=,$<,$>=
Command
4
AND S1 S2
Command Command
4
OR
S1 S2
6
S1 , S2 : Data for comparison or head number of the devices where the data for comparison is stored
(character string)
7
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word $
S1 –– –– ––
8
S2 –– –– ––
Function
(3) The character string data of S1 and S2 for comparison refers to the data stored at the range
from the designated device number to the device number where "00H" code is stored.
(a) If all character strings match, the comparison result will be matched.
b15 b8 b7 b0 b15 b8 b7 b0
S1 42H (B) 41H (A) S2 42H (B) 41H (A)
S1 +1 44H (D) 43H (C) S2 +1 44H (D) 43H (C)
S1 +2 00H 45H (E) S2 +2 00H 45H (E)
"ABCDE" "ABCDE"
6-11
$=,$<>,$>,$<=,$<,$>=
(b) If the character strings are different, the character string with the larger character code
will be the larger.
b15 b8 b7 b0 b15 b8 b7 b0
S1 42H (B) 41H (A) S2 42H (B) 41H (A)
S1 +1 44H (D) 43H (C) S2 +1 44H (D) 43H (C)
S1 +2 00H 46H (F) S2 +2 00H 45H (E)
"ABCDF" "ABCDE"
(c) If the character strings are different, the first different sized character code will
determine whether the character string is larger or smaller.
b15 b8 b7 b0 b15 b8 b7 b0
S1 32H (2) 31H (1) S2 32H (2) 31H (1)
S1 +1 34H (4) 33H (3) S2 +1 33H (3) 34H (4)
S1 +2 00H 35H (5) S2 +2 00H 35H (5)
"12345" "12435"
(4) If the character strings designated by S1 and S2 are of different lengths, the data with the
longer character string will be larger.
b15 b8 b7 b0 b15 b8 b7 b0
S1 32H (2) 31H (1) S2 32H (2) 31H (1)
S1 +1 34H (4) 33H (3) S2 +1 34H (4) 33H (3)
S1 +2 36H (6) 35H (5) S2 +2 36H (6) 35H (5)
S1 +3 00H 37H (7) S2 +3 00H 00H
"1234567" "123456"
6-12
$=,$<>,$>,$<=,$<,$>=
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The code "00H" does not exist within the range of the relevant device, starting from the 2
device number designated by S1 and S2 . (Error code: 4101)
• The character string of S1 and S2 exceeds 16383 characters. (Error code: 4101) 3
The character string data comparison instruction checks the device range while 4
comparing the designated character string data. For this reason, if the "00H" code
does not exist in the relevant device range, the instruction outputs the comparison
result instead of returning an operation error when no match of characters is 4
detected.
Example $ D12287 D10 M0
S1 S2 6
Data of S1 Data of S2
D12287
W0
B
00 H
A
C
D10
D11
Z
00 H
A
C
7
If S1 and S2 data are as shown above, the second character of S1 does not
match with that of S2 , and the comparison result is expressed as S1 S2 (the 8
operation result is "non-conductive"). Though the "00H" code is not included
within the S1 device range, no operation error is returned, because the
no-match is detected at D12287, which is within the device range.
(2) The following program compares the character string "ABCDEF" with the character string
stored following D10.
[Ladder Mode] [List Mode]
Step Instruction Device
6-13
$=,$<>,$>,$<=,$<,$>=
(3) The following program compares the character string stored following D10 with the character
string stored following D100.
[Ladder Mode] [List Mode]
Step Instruction Device
(4) The following program compares the character string stored following D200 with the
character string "12345".
[Ladder Mode] [List Mode]
Step Instruction Device
6-14
BKCMP
,BKCMP
P
3
indicates an instruction symbol of / / / / / .
Command
BKCMP BKCMP S1 S2 D n
4
Command
BKCMP P BKCMP P S1 S2 D n
4
S1 : Data to be compared or head number of the devices where the data to be compared is stored (BIN 16 bits)
S2 : Head number of the devices where the comparison data is stored (BIN 16 bits)
6
D : Head number of the devices where the comparison operation result will be stored (bits)
n : Number of comparison data blocks (BIN 16 bits)
S1 –– –– ––
S2 –– –– –– –– 8
D –– –– ––
n ––
(a) If the comparison condition has been met, the device designated by D will be turned ON.
(b) If the comparison condition has not been met, the device designated by D will be
turned OFF.
Operation Results
S1 1234 (BIN) S2 5321 (BIN) D OFF (0)
S1 1 5678 (BIN) S2 1 3399 (BIN) D 1 ON (1)
S1 2 5000 (BIN) S2 2 5678 (BIN) D 2 OFF (0)
n n n
(3) The constant designated by S1 can be between 32768 and 32767 (BIN 16-bit data).
Operation Results
S2 32000 (BIN) D ON (1)
S2 1 4321 (BIN) D 1 OFF (0)
S2 2 32000 (BIN) D 2 ON (1)
S1 32000 (BIN) n n
S2 (n 2) 1234 (BIN) D (n 2) OFF (0)
S2 (n 1) 5678 (BIN) D (n 1) OFF (0)
6-15
BKCMP
,BKCMP
P
(4) The results of the comparison operations for the individual instructions are as follows:
Instruction Comparison Instruction Comparison
Condition Condition
Symbols Operation Result Symbols Operation Result
BKCMP= S2 = S1 BKCMP= S1 S2
BKCMP<> S1 S2 BKCMP<> S2 = S1
(5) If all comparison results stored n points from D are ON (1), SM704 (block comparison
signal) goes ON.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The range of the device n points from a device designated by S1 , S2 or D exceeds the
relevant device. (Error code: 4101)
• The device range for n points starting from the device designated by S1 overlaps with the
device range for n points starting from the device designated by D .
(Error code: 4101)
• The device range for n points starting from the device designated by S2 overlaps with the
device range for n points starting from the device designated by D .
(Error code: 4101)
Program Example
(1) The following program compares, when X20 is turned ON, the data stored at D100 to D103
with the data stored at R0 to R3 and stores the operation result into the area starting from
M10.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b0 b15 b0
D100 1000 (BIN) R0 1000 (BIN) M10 ON
D101 2000 (BIN) R1 2000 (BIN) M11 ON
D102 3000 (BIN) R2 5000 (BIN) M12 OFF
D103 4000 (BIN) R3 4000 (BIN) M13 ON
D0 4
6-16
BKCMP
,BKCMP
P
(2) The following program compares, when X1C is turned ON, the constant K1000 with the data
stored at D10 to D13, and stores the operation result at b4 to b7 in D0.
[Ladder Mode] [List Mode]
1
Step Instruction Device
[Operation] 3
b15 b0
D10 2000 (BIN)
4
b15 b0 D11 1000 (BIN)
1000 (BIN)
D12 1000 (BIN)
D13 2222 (BIN)
4
b15 b7 b4 b0
D0 before 0 10000 1000 100000
operation
6
b15 b7 b4 b0
D0 after 0 10000 10100 10000
operation
7
(3) The following program compares, when X20 is turned ON, the data at D10 to D12 with the
data at D30 to D32, and stores the operation result into the area starting from M100.
The following program transfers the character string "ALL ON" to D100 onward when all
8
devices from M100 onward have reached the 1 "ON" state.
[Ladder Mode] [List Mode]
b15 b8 b7 b0
D100 4CH (L) 41H (A) $MOV
D101 20H ( ) 4CH (L)
D102 4EH (N) 4FH (O)
6-17
BKCMP
,BKCMP
P
Ver.
High
Basic performance Process Redundant Universal
Command
DBKCMP P DBKCMP P S1 S2 D n
S1 : Data to be compared or head number of the devices where the data to be compared are stored (BIN 32 bits)
S2 : Head number of the devices where the comparison data are stored (BIN 32 bits)
D : Head number of the devices where the comparison operation result will be stored (bits)
n : Number of comparison data blocks (BIN 16 bits)
S1 –– –– ––
S2 –– –– –– ––
D –– –– ––
n ––
Function
(1) This instruction compares BIN 32-bit data stored in n-point devices starting from the device
specified by S1 with BIN 32-bit data stored in n-point devices starting from the device
specified by a constant and S2 and then stores the result into the nth device specified by D
and up.
(a) If the comparison condition has been met, the corresponding devices specified by D will
be turned on.
(b) If the comparison condition has not been met, the corresponding devices specified by D
will be turned off.
b31 b0 b31 b0 Operation result
S1 +1, S1 1090 (BIN) S2 +1, S2 1000 (BIN) D OFF (0)
S1 +3, S1 +2 2080 (BIN) S2 +3, S2 +2 2000 (BIN) D +1 OFF (0)
S1 +5, S1 +4 5060 (BIN) n S2 +5, S2 +4 5060 (BIN) n D +2 ON (1) n
6-18
BKCMP
,BKCMP
P
(3) The constant in the device specified by S1 can be between 2147483648 and 2147483647 1
(BIN 32-bit data).
b31 b0 Operation result
S2 +1, S2 32700 (BIN) D ON (1) 2
b31 b0 S2 +3, S2 +2 40000 (BIN) D +1 OFF (0)
S1 +1, S1 32800 (BIN) S2 +5, S2 +4 32800 (BIN) n D +2 ON (1) n
(4) specifies out of the device range of n-point devices starting from the device specified by
4
D
S1 and S2 .
(5) The following table shows the results of the comparison operations for each individual
instruction.
4
Instruction Comparison Instruction Comparison
Condition Condition
Symbols Operation Result Symbols Operation Result
DBKCMP= S2 = S1 DBKCMP= S1 S2
6
DBKCMP<> S1 S2 DBKCMP<> S2 = S1
DBKCMP<= S1 S2
ON (1)
DBKCMP<= S1 > S2
OFF (0) 7
DBKCMP< S1 < S2 DBKCMP< S1 S2
In a standby program, a special relay depending on the caller program turns on or off.
(7) If the value specified by n is 0, the instruction will be not processed.
6-19
BKCMP
,BKCMP
P
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
• A negative value is specified for n. (Error code: 4100)
• The range of the n-point devices starting from the device specified by S1 , S2 . or D
exceeds the specified device range. (Error code: 4101)
• The range of the n-point devices starting from the device specified by S1 overlaps with the
range of the n-point devices starting from the device specified by D .
(Error code: 4101)
• The range of the n-point devices starting from the device specified by S2 overlaps with the
range of the n-point devices starting from the device specified by D .
(Error code: 4101)
Program Example
(1) The following program compares the value data stored at R0 to R5 with the value data
stored at D20 to D25, and then stores the operation result into Y0 to Y2, when M0 is turned
on,
[Ladder Mode] [List Mode]
[Operation]
b31 b0 b31 b0
R1,R0 -2147483000 D21,D20 -2147483000 Y0 OFF (0)
R3,R2 0 D23,D22 1 Y1 ON (1)
R5,R4 2147483000 D25,D24 2147482999 Y2 ON (1)
(2) The following program compares the constant with the value data stored at D0 to D9, and
then stores the operation result into D10.5 to D10.9, when M0 is turned on,
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b31 b0
D1,D0 -70000 D10.5 ON (1)
b31 b0 D3,D2 50000 D10.6 OFF (0)
-60000 D5,D4 -32768 D10.7 OFF (0)
D7,D6 32767 D10.8 OFF (0)
D9,D8 0 D10.9 OFF (0)
6-20
BKCMP
,BKCMP
P
When certain bits are specified in a word device, bits other than the certain bits 1
that store the operation result do not change.
D10.F D10.0
Before execution 0 0 1 0 1 1 1 1 1 0 0 1 1 0 0 0 2
D10.F D10.0
After execution 0 0 1 0 1 1 0 0 0 0 1 1 1 0 0 0
3
No change No change
4
(3) The following program compares the value data stored at D0 to D5 with the value data
stored at D10 to D15, and then stores the operation result into M20 to M22, when M0 is
turned on. Also, the program transfers the character string "ALL ON" to D100 and up when
all devices from M20 to M22 have reached the on status. 4
[Ladder Mode] [List Mode]
[Operation]
8
b31 b0 b31 b0
D1,D0 -2147483000 D11,D10 -2147483000 M20 ON (1)
D3,D2 60000 D13,D12 60001 M21 ON (1)
D5,D4 -900000 D15,D14 -899999 M22 ON (1)
6-21
+(P),-(P)
Basic High
performance Process Redundant Universal
Command
+P, P P S D
S : Data for additing/subtracting or head number of the devices where the data for additing/subtracting is stored
(BIN 16 bits)
S1
D : Head number of the devices where the data to be added to/subtracted from is stored (BIN 16 bits)
S ––
D –– ––
Function
+
(1) Adds 16-bit BIN data designated by D to 16-bit BIN data designated by S and stores the
result of the addition at the device designated by D .
D S D
(2) Values for S and D can be designated between 32768 and 32767 (BIN, 16 bits).
(3) The judgment of whether data is positive or negative is made by the most significant bit
(b15).
• 0: Positive
• 1: Negative
(4) The following will happen when an underflow or overflow is generated in an operation result:
The carry flag in this case does not go ON.
K32767 +K2 K 32767 Since bit 15 value is "1",
(7FFFH) (0002H) (8001H) result of operation takes a negative value.
K 32768 +K 2 K32766 Since bit 15 value is "0",
(8000H) (FFFEH) (7FFEH) result of operation takes a positive value.
6-22
+(P),-(P)
(1) Subtracts 16-bit BIN data designated by D from 16-bit BIN data designated by S and 1
stores the result of the subtraction at the device designated by D .
D S D
2
b15 b0 b15 b0 b15 b0
5678 (BIN) 1234 (BIN) 4444 (BIN)
(2) Values for S and D can be designated between 32768 and 32767 (BIN, 16 bits). 3
(3) The judgment of whether data is positive or negative is made by the most significant bit
(b15).
• 0: Positive
4
• 1: Negative
(4) The following will happen when an underflow or overflow is generated in an operation result: 4
The carry flag in this case does not go ON.
K 32768 K2 K32766 Since bit 15 value is "0",
(8000H) (0002H) (7FFEH) result of operation takes a positive value. 6
K32767 K 2 K 32767 Since bit 15 value is "1",
(7FFFH) (FFFEH) (8001H) result of operation takes a negative value.
7
Operation Error
8
(1) There are no operation errors associated with the +(P) or -(P) instruction.
6-23
+(P),-(P)
Command
+P, P P S1 S2 D
S1 : Data to be added to/subtracted from or head number of the devices where the data to be added
to/subtracted from is stored (BIN 16 bits)
S2 : Data for additing/subtracting or head number of the devices where the data for additing/subtracting is stored
(BIN 16 bits)
D : Head number of the devices where the addition/subtraction operation result will be stored (BIN 16 bits)
S1 ––
S2 ––
D
S –– ––
Function
+
(1) Adds 16-bit BIN data designated by S1 to 16-bit BIN data designated by S2 and stores the
result of the addition at the device designated by D .
S1 S2 D
(2) Values for S1 , S2 D andcan be designated between D 32768 and 32767 (BIN, 16 bits).
(3) The judgment of whether data is positive or negative is made by the most significant bit
(b15).
• 0: Positive
• 1: Negative
(4) The following will happen when an underflow or overflow is generated in an operation result:
The carry flag in this case does not go ON.
K32767 +K2 K 32767 Since bit 15 value is "1",
(7FFFH) (0002H) (8001H) result of operation takes a negative value.
6-24
+(P),-(P)
(1) Subtracts 16-bit BIN data designated by S1 from 16-bit BIN data designated by S2 and 1
stores the result of the subtraction at the device designated by D .
S1 S2 D 2
b15 b0 b15 b0 b15 b0
5678 (BIN) 1234 (BIN) 4444 (BIN)
3
(2) Values for S1 , S2 D and can be designated between D 32768 and 32767 (BIN, 16 bits).
(3) The judgment of whether data is positive or negative is made by the most significant bit
(b15). 4
• 0: Positive
• 1: Negative
(4) The following will happen when an underflow or overflow is generated in an operation result:
4
The carry flag in this case does not go ON.
K 32768 K2
(8000H) (0002H)
K32766
(7FFEH)
Since bit 15 value is "0",
result of operation takes a positive value. 6
K32767 K 2 K 32767 Since bit 15 value is "1",
(7FFFH) (FFFEH) (8001H) result of operation takes a negative value.
7
Operation Error
(1) There are no operation errors associated with the +(P) or -(P) instruction. 8
Program Example
(2) The following program outputs the difference between the set value for timer T3 and its
present value in BCD to Y40 to Y53.
[Ladder Mode] [List Mode]
Step Instruction Device
6-25
D+(P),D-(P)
Basic High
performance Process Redundant Universal
When two data are set (( D +1, D )+( S +1, S ) ( D +1, D ), ( D +1, D )-( S +1, S ) ( D +1, D ))
Command
D+, D S D
Command
D+P, D P P S D
S : Data for additing/subtracting or head number of the devices where the data for additing/subtracting is stored
(BIN 32 bits)
D : Head number of the devices where the data to be added to/subtracted from is stored (BIN 32 bits)
S ––
D –– ––
Function
D+
(1) Adds 32-bit BIN data designated by D to 32-bit BIN data designated by S , and stores the
result of the addition at the device designated by D .
D +1 D S +1 S D +1 D
(2) The values for S and D can be designated at between 2147483648 and 2147483647
(BIN 32 bits).
(3) Judgment of whether the data is positive or negative is made on the basis of the most
significant bit (b31).
• 0: Positive
• 1: Negative
(4) The following will happen when an underflow or overflow is generated in an operation result:
The carry flag in this case does not go ON.
K2147483647 +K2 K 2147483647 Since bit 31 value is "1",
(7FFFFFFFH) (00000002H) (80000001H) result of operation takes a negative value.
6-26
D+(P),D-(P)
D-
(1) Subtracts 32-bit BIN data designated by D from 32-bit BIN data designated by S and 1
stores the result of the subtraction at the device designated by D .
D +1 D S +1 S D +1 D
2
b31 b16 b15 b0 b31 b16 b15 b0 b31 b16 b15 b0
567890 (BIN) 123456 (BIN) 444434 (BIN)
(2) The values for S and D can be designated at between 2147483648 and 2147483647 3
(BIN 32 bits).
(3) Judgment of whether the data is positive or negative is made on the basis of the most
significant bit (b31). 4
• 0: Positive
• 1: Negative
4
(4) The following will happen when an underflow or overflow is generated in an operation result:
The carry flag in this case does not go ON.
K 2147483648 K2 K2147483646 Since bit 31 value is "0", 6
(80000000H) (00000002H) (7FFFFFFEH) result of operation takes a positive value.
6-27
D+(P),D-(P)
When three data are set (( S1 +1, S1 )+( S2 +1, S2 ) ( D +1, D ), ( S1 +1, S1 )-( S2 +1, S2 ) ( D +1, D ))
Command
D+P, D P P S1 S2 D
S1 : Data to be added to/subtracted from or head number of the devices where the data to be added
to/subtracted from is stored (BIN 32 bits)
S2 : Data for additing/subtracting or head number of the devices where the data for additing/subtracting is stored
(BIN 32 bits)
D : Head number of the devices where the addition/subtraction operation result will be stored (BIN 32 bits)
S1 ––
S2
S1 ––
D –– ––
Function
D+
(1) Adds 32-bit BIN data designated by S1 to 32-bit BIN data designated by S2 , and stores the
result of the addition at the device designated by D .
S1 +1 S1 S2 +1 S2 D +1 D
(2) The values for S1 , S2 and D can be designated at between 2147483648 and 2147483647
(BIN 32 bits).
(3) Judgment of whether the data is positive or negative is made on the basis of the most
significant bit (b31).
• 0: Positive
• 1: Negative
(4) The following will happen when an underflow or overflow is generated in an operation result:
The carry flag in this case does not go ON.
K2147483647 +K2 K 2147483647 Since bit 31 value is "1",
(7FFFFFFFH) (00000002H) (80000001H) result of operation takes a negative value.
6-28
D+(P),D-(P)
D-
(1) Subtracts 32-bit BIN data designated by S1 from 32-bit BIN data designated by S2 and 1
stores the result of the subtraction at the device designated by D .
S1 +1 S1 S2 +1 S2 D +1 D
2
b31 b16 b15 b0 b31 b16 b15 b0 b31 b16 b15 b0
567890 (BIN) 123456 (BIN) 444434 (BIN)
(2) The values for S1 , S2 and D can be designated at between 2147483648 and 2147483647 3
(BIN 32 bits).
(3) Judgment of whether the data is positive or negative is made on the basis of the most
significant bit (b31). 4
• 0: Positive
• 1: Negative
4
(4) The following will happen when an underflow or overflow is generated in an operation result:
The carry flag in this case does not go ON.
K 2147483648 K2 K2147483646 Since bit 31 value is "0", 6
(80000000H) (00000002H) (7FFFFFFEH) result of operation takes a positive value.
Operation Error 8
(1) There are no operation errors associated with the D+(P) or D-(P) instruction.
(2) The following program subtracts the data from M0 to M23 from the data at D0 and D1 when
XB goes ON, and stores the result at D10 and D11.
[Ladder Mode] [List Mode]
Step Instruction Device
6-29
*(P),/(P)
Basic High
performance Process Redundant Universal
Command
*P, / P P S1 S2 D
S1 : Data to be multiplied/divided or head number of the devices where the data to be multiplied/divided is stored
(BIN 16 bits)
S2 : Data for multiplying/dividing or head number of the devices where the data for multiplying/dividing is stored
(BIN 16 bits)
D : Head number of the devices where the multiplication/division operation result will be stored (BIN 32 bits)
S1 ––
S2 ––
D –– ––
Function
*
(1) Multiplies BIN 16-bit data designated by S1 and BIN 16-bit data designated by S2 , and
stores the result in the device designated by D .
S1 S2 D D
(3) Values for S1 and S2 can be designated between 32768 and 32767 (BIN, 16 bits).
(4) Judgments whether S1 , S2 , and D are positive or negative are made on the basis of the
most significant bit (b15 for S1 , and S2 , for D and b31).
• 0: Positive
• 1: Negative
6-30
*(P),/(P)
(1) Divides BIN 16-bit data designated by S1 and BIN 16-bit data designated by S2 , and stores 1
the result in the device designated by D .
2
Quotient Remainder
S1 S2 D D 1
(3) Values for S1 and S2 can be designated between 32768 and 32767 (BIN 16 bits). 4
(4) Judgment whether values for S1 , S2 , D and D +1 are positive or negative is made on the
basis of the most significant bit (b15). (Sign is attached to both the quotient and remainder.)
• 0: Positive
6
• 1: Negative
7
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
8
• Attempt to divide S2 by 0. (Error code: 4100)
Program Example
(2) The following program multiplies BIN data at X8 to XF by BIN data at X10 to X1B, and
outputs the result of the multiplication to Y30 to Y3F.
[Ladder Mode] [List Mode]
Step Instruction Device
(3) The following program divides, when X3 is turned ON, the data at X8 to XF by 3.14 and
outputs the operation result at Y30 to Y3F.
[Ladder Mode] [List Mode]
Step Instruction Device
6-31
D*(P),D/(P)
Basic High
performance Process Redundant Universal
Command
D* P,D/P P S1 S2 D
S1 : Data to be multiplied/divided or head number of the devices where the data to be multiplied/divided is stored
(BIN 32 bits)
S2 : Data for multiplying/dividing or head number of the devices where the data for multiplying/dividing is stored
(BIN 32 bits)
D : Head number of the devices where the multiplication/division operation result will be stored (BIN 64 bits)
S1 ––
S2 ––
D –– ––
Function
D*
(1) Multiplies BIN 32-bit data designated by S1 and BIN 32-bit data designated by S2 , and
stores the result in the device designated by D .
S1 S1 S2 S2 D D D D
b31 b16 b15 b0 b31 b16 b15 b0 b63 b48 b47 b32 b31 b16 b15 b0
567890 (BIN) 123456 (BIN) 70109427840 (BIN)
(2) If D is a bit device, only the lower 32 bits of the multiplication result will be considered, and
the upper 32 bits cannot be designated.
6-32
D*(P),D/(P)
D/
(1) Divides BIN 32-bit data designated by S1 and BIN 32-bit data designated by S2 , and stores 1
the result in the device designated by D .
S1 S1 S2 S2 D D D D
2
b31 b16 b15 b0 b31 b16 b15 b0 b31 b16 b15 b0 b31 b16 b15 b0
567890 (BIN) 123456 (BIN) 4 (BIN) 74066 (BIN)
(2) With a word device, the division operation result is stored in 64 bits and both the quotient 3
and remainder are stored. With a bit device, only the quotient is stored as the operation
result in 32 bits.
(3) The values for S1 and S2 can be designated at between 2147483648 and 2147483647 4
(BIN 32 bits).
(4) Judgment whether values for S1 , S2 , and +2 are positive or negative is made on the
6
D D
basis of the most significant bit (b31).
(Sign is attached to both the quotient and remainder.)
• 0: Positive
7
• 1: Negative
Operation Error 8
(1) In any of the following cases, an operation error occurs, the error flag (SM0) is turned ON,
and the corresponding error code is stored into SD0.
• Attempt to divide S2 by 0. (Error code: 4100)
(2) The following program outputs the value resulting when the data at X8 to XF is multiplied by
3.14 to Y30 to Y3F when X3 is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
6-33
B+(P),B-(P)
Basic High
performance Process Redundant Universal
Command
B+P, B P P S D
S : Data for adding/subtracting or head number of the devices where the data for adding/subtracting is stored
(BCD 4 digits)
D : Head number of the devices where the data to be added to/subtracted from is stored (BCD 4 digits)
S ––
D –– ––
Function
B+
(1) Adds the BCD 4-digit data designated by D and the BCD 4-digit data designated by S , and
stores the result of the addition at the device designated by D .
D S D
5 6 7 8 1 2 3 4 6 9 1 2
6 4 3 2 3 5 8 3 0 0 1 5
B-
(1) Subtracts the BCD 4-digit data designated by S and the BCD 4-digit data designated by D ,
and stores the result of the subtraction at the device designated by D .
D S D
0 6 7 8 0 2 3 4 0 4 4 4
Digits exceeding the designated
number of digits are assumed to be 0.
6-34
B+(P), B-(P)
(3) The following will result if an underflow is generated by the subtraction operation:
The carry flag in this case does not go ON.
1
0 0 0 1 0 0 0 3 9 9 9 8
Operation Error 2
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0. 3
• The S or D BCD data is outside the 0 to 9999 range. (Error code: 4100)
4
Program Example
(1) The following program adds BCD data 5678 and 1234, stores it at D993, and at the same 4
time outputs it to from Y30 to Y3F.
[Ladder Mode]
6
Stores 5678 in BCD to D993.
7
Adds 1234 in BCD to the value at D993,
and stores the result to D993.
[List Mode]
Step Instruction Device
[List Mode]
Step Instruction Device
6-35
B+(P), B-(P)
Command
B+P,B-P P S1 S2 D
S1 : Data to be added to/subtracted from or head number of the devices where the data to be added
to/subtracted from is stored (BCD 4 digits)
S2 : Data for adding/subtracting or head number of the devices where the data for adding/subtracting is stored
(BCD 4 digits)
D : Head number of the devices where the addition/subtraction operation result will be stored (BCD 4 digits)
S1 ––
S2 ––
D –– ––
Function
B+
(1) Adds the BCD 4-digit data designated by S1 and the BCD 4-digit data designated by S2 , and
stores the result of the addition at the device designated by D .
S1 S2 D
5 6 7 8 1 2 3 4 6 9 1 2
B-
(1) Subtracts the BCD 4-digit data designated by S1 and the BCD 4-digit data designated by S2 ,
and stores the result of the subtraction at the device designated by D .
S1 S2 D
0 6 7 8 0 2 3 4 0 4 4 4
Digits exceeding the designated
number of digits are assumed to be 0.
6-36
B+(P), B-(P)
(3) The following will result if an underflow is generated by the subtraction operation:
The carry flag in this case does not go ON.
1
0 0 0 1 0 0 0 3 9 9 9 8
Operation Error 2
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0. 3
• The S1 , S2 D or BCD data is outside the 0 to 9999 range. (Error code: 4100)
4
Program Example
(1) The following program adds the D3 BCD data and the Z1 BCD data when X20 goes ON, and
4
outputs the result to Y8 to Y17.
[Ladder Mode] [List Mode]
6
Step Instruction Device
7
(2) The following program subtracts the BCD data at D20 from the BCD data at D10 when X20
goes ON, and stores the result at R10. 8
[Ladder Mode] [List Mode]
Step Instruction Device
6-37
DB+(P),DB-(P)
Basic High
performance Process Redundant Universal
When two data are set (( D +1, D )+( S +1, S ) ( D +1, D ), ( D +1, D )-( S +1, S ) ( D +1, D ))
Command
DB+P. DB-P P S D
S : Data for adding/subtracting or head number of the devices where the data for adding/subtracting is stored
(BCD 8 digits)
D : Head number of the devices where the data to be added to/subtracted from is stored (BCD 8 digits)
S ––
D –– ––
Function
DB+
(1) Adds the BCD 8-digit data designated by D and the BCD 8-digit data designated by S , and
stores the result of the addition at the device designated by D .
D D S S D D
DB-
(1) Subtracts the BCD 8-digit data designated by D and the BCD 8-digit data designated by S ,
and stores the result of the subtraction at the device designated by D .
D +1 D S +1 S D +1 D
(Upper 4 digits) (Lower 4 digits) (Upper 4 digits) (Lower 4 digits) (Upper 4 digits) (Lower 4 digits)
0 9 8 7 1 0 6 8 0 0 3 2 3 4 5 6 0 9 5 4 7 6 1 2
6-38
DB+(P),DB-(P)
[List Mode]
(2) The following program subtracts the BCD data 98765432 from 12345678, stores the result
at D100 and D101, and at the same time outputs it from Y30 to Y4F.
[Ladder Mode]
[List Mode]
Step Instruction Device
6-39
DB+(P),DB-(P)
When three data are set (( S1 +1, S1 )+( S2 +1, S2 ) ( D +1, D ), ( S1 +1, S1 )-( S2 +1, S2 ) ( D +1, D ))
Command
DB+P, DB-P P S1 S2 D
S1 : Data to be added to/subtracted from or head number of the devices where the data to be added
to/subtracted from is stored (BCD 8 digits)
S2 : Data for adding/subtracting or head number of the devices where the data for adding/subtracting is stored
(BCD 8 digits)
D : Head number of the devices where the addition/subtraction operation result is stored (BCD 8 digits)
S1 ––
S2 ––
D –– ––
Function
DB+
(1) Adds the BCD 8-digit data designated by S1 and the BCD 8-digit data designated by S2 , and
stores the result of the addition at the device designated by D .
S1 +1 S1 S2 +1 S2 D +1 D
(Upper 4 digits) (Lower 4 digits) (Upper 4 digits) (Lower 4 digits) (Upper 4 digits) (Lower 4 digits)
5 6 7 8 9 1 2 3 + 0 1 2 3 4 5 6 7 5 8 0 2 3 6 9 0
Digits exceeding the designated number
of digits are assumed to be 0.
6-40
DB+(P),DB-(P)
DB-
(1) Subtracts the BCD 8-digit data designated by S1 and the BCD 8-digit data designated by S2 , 1
and stores the result of the subtraction at the device designated by D .
S1 +1 S1 S2 +1 S2 D +1 D
2
(Upper 4 digits) (Lower 4 digits) (Upper 4 digits) (Lower 4 digits) (Upper 4 digits) (Lower 4 digits)
5 6 7 8 9 1 2 3 0 1 2 3 4 5 6 7 5 5 5 5 4 5 5 6
Digits exceeding the designated
number of digits are assumed to be 0.
3
(2) 0 to 99999999 (BCD 8 digits) can be assigned to S1 , S2 and D .
(3) The following will result if an underflow is generated by the subtraction operation:
4
The carry flag in this case does not go ON.
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 9 9 9 9 9 9 9 9 9
4
Operation Error
6
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The S1 , S2 D or BCD data is outside the 0 to 99999999 range. (Error code: 4100)
7
Program Example 8
(1) The following program adds the BCD data at D3 and D4 to the BCD data at Z1 and Z2 when
X20 goes ON, and stores the result at R10 and R11.
[Ladder Mode] [List Mode]
6-41
B*(P),B/(P)
Basic High
performance Process Redundant Universal
Command
B * P, B/P P S1 S2 D
S1 : Data to be multiplied/divided or head number of the devices where the data to be multiplied/divided is stored
(BCD 4 digits)
S2 : Data for multiplying/dividing or head number of the devices where the data for multiplying/dividing is stored
(BCD 4 digits)
D : Head number of the devices where the multiplication/division operation result will be stored (BCD 8 digits)
S1 ––
S2 ––
D –– ––
Function
B*
(1) Multiplies BCD data designated by S1 and BCD data designated by S2 , and stores the result
in the device designated by D .
D +1 D
S1 S2 (Upper 4 digits) (Lower 4 digits)
5 6 7 8 0 8 7 6 0 4 9 7 3 9 2 8
5 6 7 8 / 0 8 7 6 0 0 0 6 0 4 2 2
Digits exceeding the designated number of digits are
assumed to be 0.
(2) Uses 32 bits to store the result of the division as quotient and remainder
Quotient (BCD 4 digits) :Stored at the lower 16 bits.
Remainder (BCD 4 digits) :Stored at the upper 16 bits.
(3) If D has been designated as a bit device, the remainder of the operation will not be stored.
6-42
B*(P),B/(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The S1 or S2 BCD data is outside the 0 to 9999 range. (Error code: 4100)
2
• Attempt to divide S2 by 0. (Error code: 4100)
3
Program Example
(1) The following program multiplies, when X20 is turned ON, the BCD data at X0 to XF by the 4
BCD data at D8 and stores the operation result at D0 to D1.
[Ladder Mode] [List Mode]
Step Instruction Device 4
6
[Operation]
XF X0
D8 D1 (Upper 4 digits) D0 (Lower 4 digits)
7
9 7 5 3 8 6 4 2 8 4 2 8 5 4 2 6
Multiplicand Multiplier Multiplication result
(2) The following program divides 5678 by the BCD data 1234, stores the result at D502 and
8
D503, and at the same time outputs the quotient to Y30 to Y3F.
[Ladder Mode] [List Mode]
Step Instruction Device
5 6 7 8 / 1 2 3 4 0 0 0 4 0 7 4 2
Quotient Remainder
Y3F Y30
0 0 0 4
Quotient
6-43
DB*(P),DB/(P)
Basic High
performance Process Redundant Universal
Command
DB * P, DB/P P S1 S2 D
S1 : Data to be multiplied/divided or head number of the devices where the data to be multiplied/divided is stored
(BCD 8 digits)
S2 : Data for multiplying/dividing or head number of the devices where the data for multiplying/dividing is stored
(BCD 8 digits)
D : Head number of the devices where the multiplication/division operation result will be stored (BCD 16 digits)
S1 ––
S2 ––
D –– ––
Function
DB*
(1) Multiplies the BCD 8-digit data designated by S1 and the BCD 8-digit data designated by S2 ,
and stores the product at the device designated by D .
S1 +1 S1 S2 +1 S2
9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9
D +3 D +2 D +1 D
9 9 9 9 9 9 9 8 0 0 0 0 0 0 0 1
(2) If D has designated a bit device, the lower 8 digits (lower 32 bits) will be used for the
product, and the higher 8 digits (upper 32 bits) cannot be designated.
K1 ....Lower 1 digit (b0 to 3), K4 ....Lower 4 digits (b0 to 15), K8.....Lower 8 digits (b0 to 31)
(3) 0 to 99999999 (BCD 8 digits) can be assigned to S1 and S2 .
DB/
(1) Divides 8-digit BCD data designated by S1 and 8-digit BCD data designated by S2 , and
stores the result in the device designated by D .
S1 +1 S1 S2 +1 S2
5 6 7 8 9 1 2 3 / 0 1 2 3 4 5 6 7
Digits exceeding the designated number of digits
are assumed to be 0
D +1 D D +3 D +2
Quotient (Upper 4 digits) (Lower 4 digits) Remainder (Upper 4 digits) (Lower 4 digits)
0 0 0 0 0 0 4 5 0 1 2 3 3 6 0 8
6-44
DB*(P),DB/(P)
(2) 64 bits are used for the result of the division operation, and stored as quotient and
remainder.
1
Quotient (BCD 8 digits) :Stored at the lower 32 bits.
Remainder (BCD 8 digits) :Stored at the upper 32 bits.
(3) If D has been designated as a bit device, the remainder of the operation will not be stored. 2
Operation Error 3
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
4
• The S1 or S2 BCD data is outside the 0 to 99999999 range. (Error code: 4100)
[Operation]
6 8 3 4 7 1 2 5 0 0 5 7 3 6 8 2 0 0 3 9 2 0 9 5 1 5 3 6 4 2 5 0
Multiplicand Multiplier
Y4F Y30
0 0 3 9 2 0 9 5
(2) The following program divides the BCD data from X20 to X3F by the BCD data at D8 and D9
when X0B goes ON, and stores the result from D765 to D768.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D9 (Upper 4 digits) D8 (Lower 4 digits)
X3F X20
9 9 8 6 4 3 2 1 / 1 5 2 6 3 7 4 8
Dividend Divisor
D766 D765 D768 D767
(Upper 4 digits) (Lower 4 digits) (Upper 4 digits) (Lower 4 digits)
0 0 0 0 0 0 0 6 0 8 2 8 1 8 3 3
Quotient Remainder
6-45
E+(P),E-(P)
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
When two data are set (( D +1, D )+( S +1, S ) ( D +1, D ), ( D +1, D )-( S +1, S ) ( D +1, D ))
Command
E+P, E-P P S D
S : Data for adding/subtracting or head number of the devices where the data for adding/subtracting is stored
(real number)
D : Head number of the devices where the data to be added to/subtracted from is stored (real number)
S –– –– –– ––
D –– –– –– –– ––
Function
E+
(1) Adds the 32-bit floating decimal point type real number designated at D and the 32-bit
floating decimal point type real number designated at S , and stores the sum in the device
designated at D .
D +1 D S +1 S D +1 D
+
E-
(1) Subtracts a 32-bit floating decimal point type real number designated by D and a 32-bit
floating decimal point type real number designated by S , and stores the result at a device
designated by D .
D +1 D S +1 S D +1 D
6-46
E+(P),E-(P)
(2) Values which can be designated at S and D and which can be stored, are as follows:
*2: There are CPU modules that will not result in an operation error if 0 is specified.
Refer to Section 3.2.4 for details. 6
• The result of addition and subtraction exceeds the following range. (The overflow occurs.)
(For the Universal model QCPU only)
2128 | Result of addition and subtraction | (Error code: 4141) 7
• The value of the specified device is 0, unnormalized number, nonnumeric, and ± .
(For the Universal model QCPU only) (Error code: 4140)
8
Program Example
(1) The following program adds the 32-bit floating decimal point type real numbers at D3 and D4
6.2.9 Addition and subtraction of floating decimal point data (Single precision) (E+(P),E-(P))
6.2 Arithmetic Operation Instructions
and the 32-bit floating decimal point type real numbers at D10 and D11 when X20 goes ON,
and stores the result at D3 and D4.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D4 D3 D11 D10 D4 D3
5961.437 12003.200 17964.637
(2) The following program subtracts the 32-bit floating decimal point type real number at D10
and D11 from the 32-bit floating decimal point type real numbers at D20 and D21, and stores
the result of the subtraction at D20 and D21.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D21 D20 D11 D10 D21 D20
97365.203 76059.797 21305.406
6-47
E+(P),E-(P)
When three data are set (( S1 +1, S1 )+( S2 +1, S2 ) ( D +1, D ), ( S1 +1, S1 )-( S2 +1, S2 ) ( D +1, D ))
Command
E+P, E-P P S1 S2 D
S1 : Data to be added to/subtracted from or head number of the devices where the data to be added
to/subtracted from is stored (real number)
S2 : Data for adding/subtracting or head number of the devices where the data for adding/subtracting is stored
(real number)
D : Head number of the devices where the addition/subtraction operation result is stored (real number)
S1 –– –– –– ––
S2 –– –– –– ––
D –– –– –– –– ––
Function
E+
(1) Adds the 32-bit floating decimal point type real number designated at S1 and the 32-bit
floating decimal point type real number designated at S2 , and stores the sum in the device
designated at D .
S1 +1 S1 S2 +1 S2 D +1 D
+
(2) Values which can be designated at S1 , S2 and D and which can be stored, are as follows:
E-
(1) Subtracts a 32-bit floating decimal point type real number designated by S1 and a 32-bit
floating decimal point type real number designated by S2 , and stores the result at a device
designated by D .
S1 +1 S1 S2 +1 S2 D +1 D
(2) Values which can be designated at S1 and S2 and D which can be stored, are as follows:
6-48
E+(P),E-(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The contents of the designated device or the result of the addition are not "0", or not within 2
the following range:
0, 2-126 | Contents of designated device | < 2128
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant 3
CPU) (Error code: 4100)
• The value of the specified device is 0.*2
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant
4
CPU) (Error code: 4100)
*2: There are CPU modules that will not result in an operation error if 0 is specified.
4
Refer to Section 3.2.4 for details.
• The result of addition and subtraction exceeds the following range. (The overflow occurs.)
(For the Universal model QCPU only) 6
2128 | Result of addition and subtraction | (Error code: 4141)
• The value of the specified device is 0, unnormalized number, nonnumeric, and ± . 7
(For the Universal model QCPU only) (Error code: 4140)
Program Example 8
(1) The following program adds the 32-bit floating decimal point type real numbers at D3 and D4
and the 32-bit floating decimal point type real numbers at D10 and D11 when X20 goes ON,
and outputs the result to R0 and R1.
6.2.9 Addition and subtraction of floating decimal point data (Single precision) (E+(P),E-(P))
6.2 Arithmetic Operation Instructions
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D4 D3 D11 D10 R1 R0
5961.437 12003.200 17964.637
(2) The following programs subtracts the 32-bit floating decimal point type real numbers at D20
and D21 from the 32-bit floating decimal point type real numbers at D11 and D10, and stores
the result at D30 and D31.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D11 D10 D21 D20 D31 D30
97365.203 76059.797 21305.406
6-49
ED+(P),ED-(P)
High
Basic performance Process Redundant Universal
When two data are set (( D +3, D +2, D +1, D )+( S +3, S +2, S +1, S ) ( D +3, D +2, D +1, D ),
( D +3, D +2, D +1, D )-( S +3, S +2, S +1, S ) ( D +3, D +2, D +1, D ))
Command
ED+P, ED-P P S D
S : Data for adding/subtracting or head number of the devices where the data for adding/subtracting is stored
(real number)
D : Head number of the devices where the data to be added to/subtracted from is stored (real number)
S –– –– ––
D –– –– –– ––
Function
ED+
(1) Adds the 64-bit floating decimal point type real number designated at D and the 64-bit
floating decimal point type real number designated at S , and stores the sum in the device
designated at D .
D +3 D +2 D +1 D S +3 S +2 S +1 S D +3 D +2 D +1 D
(2) Values which can be designated at S and D and which can be stored, are as follows:
6-50
ED+(P),ED-(P)
ED-
(1) Subtracts a 64-bit floating decimal point type real number designated by D and a 64-bit 1
floating decimal point type real number designated by S , and stores the result at a device
designated by .
D
2
D +3 D +2 D +1 D S +3 S +2 S +1 S D +3 D +2 D +1 D
(2) Values which can be designated at and and which can be stored, are as follows:
4
S D
Operation Error 4
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0. 6
• The contents of the designated device or the result of the addition are not "0", or not within
the following range: (Error code: 4140)
0, 2-1022 | Contents of designated device | < 21024 7
• The value of the designated device is 0. (Error code: 4140)
• The result of addition/subtraction exceeds the following range (Operation results in an 8
overflow):
21024 | Result of operation | (Error code: 4141)
Program Example
6.2.10 Addition and subtraction of floating decimal point data (Double precision) (ED+(P),ED-(P))
6.2 Arithmetic Operation Instructions
(1) The following program adds the 64-bit floating decimal point type real numbers at D3 to D6
and the 64-bit floating decimal point type real numbers at D10 to D13 when X20 goes ON,
and stores the result at D3 to D6.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D6 D5 D4 D3 D13 D12 D11 D10 D6 D5 D4 D3
5961.437 12003.200 17964.637
(2) The following program subtracts the 64-bit floating decimal point type real number at D10 to
D13 from the 64-bit floating decimal point type real numbers at D20 to D23, and stores the
result of the subtraction at D20 to D23.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D23 D22 D21 D20 D13 D12 D11 D10 D23 D22 D21 D20
97365.203 76059.797 21305.406
6-51
ED+(P),ED-(P)
When three data are set(( S1 +3, S1 +2, S1 +1, S1 )+( S2 +3, S2 +2, S2 +1, S2 ) ( D +3, D +2, D +1, D ),
( S1 +3, S1 +2, S1 +1, S1 )-( S2 +3, S2 +2, S2 +1, S2 ) ( D +3, D +2, D +1, D ))
Command
ED+P, ED-P P S1 S2 D
S1 : Data to be added to/subtracted from or head number of the devices where the data to be added
to/subtracted from is stored (real number)
S2 : Data for adding/subtracting or head number of the devices where the data for adding/subtracting is stored
(real number)
D : Head number of the devices where the addition/subtraction operation result is stored (real number)
S1 –– –– ––
S2 –– –– ––
D –– –– –– ––
Function
ED+
(1) Adds the 64-bit floating decimal point type real number designated at S1 and the 64-bit
floating decimal point type real number designated at S2 , and stores the sum in the device
designated at D .
S1 +3 S1 +2 S1 +1 S1 S2 +3 S2 +2 S2 +1 S2 D +3 D +2 D +1 D
+
(2) Values which can be designated at S1 , S2 and D and which can be stored, are as follows:
ED-
(1) Subtracts a 64-bit floating decimal point type real number designated by S1 and a 64-bit
floating decimal point type real number designated by S2 , and stores the result at a device
designated by D .
S1 +3 S1 +2 S1 +1 S1 S2 +3 S2 +2 S2 +1 S2 D +3 D +2 D +1 D
(2) Values which can be designated at S1 and S2 and D which can be stored, are as follows:
6-52
ED+(P),ED-(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The contents of the designated device or the result of the addition are not "0", or not within 2
the following range: (Error code: 4140)
0, 2-1022 | Contents of designated device | < 21024
3
• The value of the specified device is 0. (Error code: 4140)
• The result of addition/subtraction exceeds the following range (Operation results in an
overflow): 4
21024 | Result of operation | (Error code: 4141)
Program Example 4
(1) The following program adds the 64-bit floating decimal point type real numbers at D3 to D6
and the 64-bit floating decimal point type real numbers at D10 to D13 when X20 goes ON, 6
and outputs the result at R0 to R3.
[Ladder Mode] [List Mode]
Step Instruction Device 7
8
[Operation]
D6 D5 D4 D3 D13 D12 D11 D10 R3 R2 R1 R0
5961.437 12003.200 17964.637
6.2.10 Addition and subtraction of floating decimal point data (Double precision) (ED+(P),ED-(P))
6.2 Arithmetic Operation Instructions
(2) The following programs subtracts the 64-bit floating decimal point type real numbers at D20
to D23 from the 64-bit floating decimal point type real numbers at D10 to D13, and stores the
result at D30 to D33.
[Ladder Mode] [List Mode]
SM 400 Step Instruction Device
10 20 30
SM 400
20 30
[Operation]
D13 D12 D11 D10 D23 D22 D21 D20 D33 D32 D31 D30
97365.203 76059.797 21305.406
6-53
E*(P),E/(P)
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
Command
E* P, E/P P S1 S2 D
S1 : Data to be multiplied/divided or head number of the devices where the data to be multiplied/divided is stored
(real number)
S2 : Data for multiplying/dividing or head number of the devices where the data for multiplying/dividing is stored
(real number)
D : Head number of the devices where the multiplication/division operation result will be stored (real number)
S1 –– –– –– *1 ––
S2 –– –– –– *1 ––
D –– –– –– *1 ––
Function
E*
(1) Multiplies the 32-bit floating decimal point real number designated by S1 by the 32-bit
floating decimal point real number designated by S2 and stores the operation result at the
device designated by D .
S1 +1 S1 S2 +1 S2 D +1 D
(2) Values which can be designated at S1 , S2 and D and which can be stored, are as follows:
6-54
E*(P),E/(P)
(2) Values which can be designated at S1 , S2 and D and which can be stored, are as follows:
Operation Error
2
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device or the result of multiplication is not within the following 3
range:
0, 2-126 | Contents of designated device | < 2128
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant 4
CPU) (Error code: 4100)
• The value of the designated device is 0.*2
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant
4
CPU) (Error code: 4100)
*2: There are CPU modules that will not result in an operation error if -0 is specified.
Refer to Section 3.2.4 for details.
6
• The result of multiplication and division exceeds the following range.
(The overflow occurs.)(For the Universal model QCPU only)
7
2128 | Result of addition and subtraction | (Error code: 4141)
• The value of the specified device is 0, unnormalized number, nonnumeric, and ± .
(For the Universal model QCPU only) (Error code: 4140) 8
Program Example
(1) The following program multiplies the 32-bit floating decimal point real numbers at D3 and D4
6.2.11 Multiplication and division of floating decimal point data (Single precision) (E*(P),E/(P))
6.2 Arithmetic Operation Instructions
and the 32-bit floating decimal point real numbers at D10 and D11, and stores the result at
R0 and R1.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D4 D3 D11 D10 R1 R0
36.7896 11.9278 438.8190
(2) The following program divides the 32-bit floating decimal point real numbers at D10 and D11
by the 32-bit floating decimal point real numbers at D20 and D21, and stores the result at
D30 and D31.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D11 D10 D21 D20 D31 D30
52171.39 9.73521 5359.041
6-55
ED*(P),ED/(P)
High
Basic performance Process Redundant Universal
Command
ED* P, ED/P P S1 S2 D
S1 : Data to be multiplied/divided or head number of the devices where the data to be multiplied/divided is stored
(real number)
S2 : Data for multiplying/dividing or head number of the devices where the data for multiplying/dividing is stored
(real number)
D : Head number of the devices where the multiplication/division operation result will be stored (real number)
S1 –– –– ––
S2 –– –– ––
D –– –– –– ––
Function
ED*
(1) Multiplies the 64-bit floating decimal point real number designated by S1 by the 64-bit
floating decimal point real number designated by S2 and stores the operation result at the
device designated by D .
S1 +3 S1 +2 S1 +1 S1 S2 +3 S2 +2 S2 +1 S2 D +3 D +2 D +1 D
(2) Values which can be designated at S1 , S2 and D and which can be stored, are as follows:
0, 2-1022 | Designated value (stored value) | < 21024
(3) When the operation results in -0 or an underflow, the result is processed as 0.
6-56
ED*(P),ED/(P)
ED/
(1) Divides the 64-bit floating decimal point real number designated by S1 by the 64-bit floating 1
decimal point real number designated by S2 and stores the operation result at the device
designated by D .
S1 +3 S1 +2 S1 +1 S1 S2 +3 S2 +2 S2 +1 S2 D +3 D +2 D +1 D 2
64-bit floating-point 64-bit floating-point 64-bit floating-point
real number real number real number 3
(2) Values which can be designated at S1 , S2 and D and which can be stored, are as follows:
4
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
6
• The value of the specified device or the result of multiplication is not within the following
range: (Error code: 4140)
0, 2-1022 | Contents of designated device | < 21024
7
• The value of the designated device is 0. (Error code: 4140)
6.2.12 Multiplication and division of floating decimal point data (Double precision) (ED*(P),ED/(P))
6.2 Arithmetic Operation Instructions
Program Example
(1) The following program multiplies the 64-bit floating decimal point real numbers at D3 to D6
and the 64-bit floating decimal point real numbers at D10 to D13, and stores the result at R0
to R3.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D6 D5 D4 D3 D13 D12 D11 D10 R3 R2 R1 R0
36.7896 11.9278 438.8190
6-57
ED*(P),ED/(P)
(2) The following program divides the 64-bit floating decimal point real numbers at D10 to D13
by the 64-bit floating decimal point real numbers at D20 to D23, and stores the result at D30
to D33.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D13 D12 D11 D10 D23 D22 D21 D20 D33 D32 D31 D30
52171.39 9.73521 5359.041
6-58
BK+(P),BK-(P)
3
indicates an instruction symbol of BK+, BK- .
Command
BK+, BK- S1 S2 D n
4
Command
BK+P, BK-P P S2 S2 D n
4
S1 : Head number of the devices where the data to be added to/subtracted from is stored (BIN 16 bits)
S2 : Data for additing/subtracting or head number of the devices where the data for additing/subtracting is stored 6
(BIN 16 bits)
D : Head number of the devices where the operation result will be stored (BIN 16 bits)
n : Number of addition/subtraction data blocks (BIN 16 bits)
7
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word $
S1 –– –– –– ––
8
S2 –– –– ––
D –– –– –– ––
n ––
(1) Adds n points of BIN data from the device designated by S1 and n-points of BIN data from
the device designated by S2 and stores the result from the device designated by D onward.
b15 b0 b15 b0 b15 b0
S1 1234 (BIN) S2 4000 (BIN) D 5234 (BIN)
S1 +1 4567 (BIN) S2 +1 1234 (BIN) D +1 5801 (BIN)
S1 +2 2000 (BIN) S2 +2 1234 (BIN) D +2 3234 (BIN)
n n n
S1 +(n 2) 1234 (BIN) S2 +(n 2) 5000 (BIN) D +(n 2) 3766 (BIN)
S1 +(n 1) 4000 (BIN) S2 +(n 1) 4321 (BIN) D +(n 1) 8321 (BIN)
(3) The constant designated by S2 can be between 32768 and 32767 (BIN 16-bit data).
b15 b0 b15 b0
S1 1234 (BIN) D 5555 (BIN)
S1 +1 4567 (BIN) D +1 8888 (BIN)
b15 b0
S1 +2 2000 (BIN) D +2 2321 (BIN)
S2 4321 (BIN)
n n
S1 +(n 2) 1234 (BIN) D +(n 2) 3087 (BIN)
S1 +(n 1) 4000 (BIN) D +(n 1) 8321 (BIN)
6-59
BK+(P),BK-(P)
(4) The following will happen when an underflow or overflow is generated in an operation result:
The carry flag in this case does not go ON.
K32767 +K2 K 32767
(7FFFH) (0002H) (8001H)
K 32767 +K 2 K32767
(8001H) (FFFEH) (7FFFH)
BK-
(1) Subtracts n points of BIN data from the device designated by S1 and n-points of BIN data
from the device designated by S2 and stores the result from the device designated by D
onward.
b15 b0 b15 b0 b15 b0
S1 8765 (BIN) S2 1234 (BIN) D 7531 (BIN)
S1 +1 8888 (BIN) S2 +1 5678 (BIN) D +1 3210 (BIN)
S1 +2 9325 (BIN) S2 +2 9876 (BIN) D +2 551 (BIN)
n n n
S1 +(n 2) 5000 (BIN) S2 +(n 2) 4321 (BIN) D +(n 2) 679 (BIN)
S1 +(n 1) 4352 (BIN) S2 +(n 1) 4000 (BIN) D +(n 1) 352 (BIN)
(3) The constant designated by S2 can be between 32768 and 32767 (BIN 16-bit data).
b15 b0 b15 b0
S1 8765 (BIN) D 115 (BIN)
S1 +1 8888 (BIN) D +1 8 (BIN)
b15 b0
S1 +2 9325 (BIN) 8880 (BIN) D +2 445 (BIN)
S2
n n
S1 +(n 2) 5000 (BIN) D +(n 2) 3880 (BIN)
S1 +(n 1) 4352 (BIN) D +(n 1) 4528 (BIN)
(4) The following will happen when an underflow or overflow is generated in an operation result:
The carry flag in this case does not go ON.
K 32768 K2 K32766
(8000H) (0002H) (7FFEH)
K32767 K 2 32767
(7FFFH) (FFFEH) (8001H)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The n-bit range from the S1 , S2 or D device exceeds the range of that device.
(Error code: 4101)
• The device ranges of S1 and D overlap. (Except when the same device is assigned to S1
• The device ranges of S2 and D overlap. (Except when the same device is assigned to S2
6-60
BK+(P),BK-(P)
Program Example
1
(1) The following program adds, when X20 is turned ON, the data stored at D100 to D103 to the
data stored at R0 to R3 and stores the operation result into the area starting from D200.
[Ladder Mode] [List Mode] 2
Step Instruction Device
[Operation] 4
b15 b0 b15 b0 b15 b0
D100 6789 (BIN) R0 1234 (BIN) D200 8023 (BIN)
D101 7821
D102 5432
(BIN)
(BIN)
R1
R2
2032
3252
(BIN)
(BIN)
D201 9853
D202 2180
(BIN)
(BIN)
4
D103 3520 (BIN) R3 1000 (BIN) D203 2520 (BIN)
D0 4
6
(2) The following program subtracts, when X1C is turned ON, the constant 8765 from the data
at D100 to D102 and stores the operation result into the area starting from R0.
[Ladder Mode] [List Mode] 7
Step Instruction Device
[Operation]
b15 b0 b15 b0
6-61
DBK+(P),DBK-(P)
Ver.
High
Basic performance Process Redundant Universal
Command
DBK+,DBK- S1 S2 D n
Command
DBKP+,DBK-P P S1 S2 D n
S1 : Head number of the devices where the data to be added and subtracted are stored (BIN 32 bits)
S2 : Addition and subtraction data or head number of the devices where the addition and subtraction data are
stored (BIN 32 bits)
D : Head number of the devices where the addition and subtraction operation result will be stored (BIN 32 bits)
S1 –– –– –– ––
S2 –– –– ––
D –– –– –– ––
n –– ––
Function
DBK+
(1) This instruction adds BIN 32-bit data stored in n-point devices starting from the device
specified by S1 to BIN 32-bit data stored in n-point devices starting from the device specified
by S2 or a constant. and then stores the operation result into the nth device specified by D
and up,
When a device is specified for S2
6-62
DBK+(P),DBK-(P)
S1 +1, S1
b31
-30000 (BIN)
b0
D +1, D
b31
20000 (BIN)
b0 1
S1 +3, S1 +2 40000 (BIN) b31 b0 D +3, D +2 90000 (BIN)
S1 +5, S1 +4 -50000 (BIN) n + S2 +1, S2 50000 (BIN) D +5, D +4 0 (BIN) n
2
S1 +n 1, S1 +n 2 60000 (BIN) D +n 1, D +n 2 110000 (BIN)
K2147483647
6
・ K 2147483647 +K 2
(80000001H) ( FFFFFFFEH) (7FFFFFFFH)
DBK- 7
(1) This instruction subtracts BIN 32-bit data stored in the n-point devices starting from the
device specified by S2 or a constant from BIN 32-bit data stored in n-point devices starting
8
from the device specified by S1 , and then stores the operation result into the nth device
specified by D and up,
When a device is specified for S2
6.2.14 BIN 32-bit data block addition and subtraction operations (DBK+(P),DBK-(P))
6.2 Arithmetic Operation Instructions
b31 b0 b31 b0 b31 b0
S1 +1, S1 -55555 (BIN) S2 +1, S2 44445 (BIN) D +1, D -1000000 (BIN)
S1 +3, S1 +2 33333 (BIN) S2 +3, S2 +2 3333 (BIN) D +3, D +2 30000 (BIN)
S1 +5, S1 +4 44444 (BIN) n S2 +5, S2 +4 -10000 (BIN) n D +5, D +4 54444 (BIN) n
b31 b0 b31 b0
S1 +1, S1 -99999 (BIN) D +1, D -109998 (BIN)
S1 +3, S1 +2 99999 (BIN) b31 b0 D +3, D +2 90000 (BIN)
S1 +5, S1 +4 -59999 (BIN) n S2 +1, S2 9999 (BIN) D +5, D +4 69998 (BIN) n
(3) The constant in the device specified by S2 can be between 2147483648 to 2147483647
(BIN 32-bit data).
(4) If the value specified by n is 0, the instruction will be not processed.
(5) D specifies out of the range of n-point devices starting from the device specified by S1 and
S2 .
However, S1 and S2 can specify the same device.
6-63
DBK+(P),DBK-(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
• A negative value is specified for n. (Error code: 4100)
• The range of the n-point devices starting from the device specified by S1 , S2 , or D
exceeds the specified device range. (Error code: 4101)
• The range of the n-point devices starting from the device specified by S1 overlaps with the
range of the n-point devices starting from the device specified by D . (Exclude the case
that S1 and D specify the same device. (Error code: 4101)
• The range of the n-point devices starting from the device specified by S2 overlaps with the
range of the n-point devices starting from the device specified by D . (Error code: 4101)
(1) The following program adds the value data stored at R0 to R5 to the constant, and then
stores the operation result into D30 to D35, when M0 is turned on.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b31 b0 b31 b0
R1,R0 600000 D31,D30 723456
R3,R2 -800000 + 123456 D33,D32 -676544
R5,R4 -123456 D35,D34 0
(2) The following program subtracts the value data stored at D50 to D59 from the value data
stored at D100 to D109, and then stores the operation result into R100 to R109, when M0 is
turned on.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b31 b0 b31 b0 b31 b0
D101,D100 12345 D51,D50 11111 R101,R100 1234
D103,D102 54321 D53,D52 -11111 R103,R102 65432
D105,D104 -12345 D55,D54 22222 R105,R104 -34567
D107,D106 -54321 D57,D56 -22222 R107,R106 -32099
D109,D108 99999 D58,D58 33333 R109,R108 66666
6-64
$+(P)
Command
$+ $+ S D 4
Command
$+P $+P S D
4
S : Data for linking or head number of the devices where the data for linking is stored (character string)
D : Head number of the devices where the data to be linked is stored (character string) 6
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word $
S –– –– ––
7
D –– –– –– ––
8
Function
(1) Links the character string data designated by S after the character string data designated
(2) When character strings are linked, the "00H", which indicates the end of character string
data designated at D , is ignored, and the character string designated at S is appended to
the last character of the D string.
6-65
$+(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The entire character string linked from the device number designated by D to the final
device number of the relevant device cannot be stored. (Error code: 4101)
• The storage device numbers for the character strings designated by S and D overlap.
(Error code: 4101)
• The character string of S and D exceeds 16383 characters. (Error code: 4101)
Program Example
(1) The following program links the character string stored from D10 to D12 to the character
string "ABCD" when X0 is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0 b15 b8 b7 b0
D10 62 H (b) 61H (a) D10 62 H (b) 61H (a)
D11 64 H (d) 63 H (c) + "ABCD" D11 64 H (d) 63 H (c)
D12 00H 65 H (e) D12 41H (A) 65 H (e)
D13 43H (C) 42H (B)
D14 00H 44H (D)
6-66
$+(P)
3
S1 : Data for linking or head number of the devices where the data for linking is stored (character string)
S2 : Data to be linked or head number of the devices where the data to be linked is stored (character string) 4
D : Head number of the devices where the linking result will be stored (character string)
S2 –– –– ––
D –– –– –– ––
6
7
Function
(1) Links the character string data designated by S2 after the character string data designated 8
by S1 and stores the result into the area starting with the device number designated by D .
b15 b8 b7 b0 b15 b8 b7 b0 b15 b8 b7 b0
S1 46H (F) 48H (H) S2 35H (5) 31H (1) D 46H (F) 48H (H)
S1 +1 2DH ( ) 41H (A) S2 +1 39H (9) 33H (3) D +1 2DH ( ) 41H (A)
(2) When character strings are linked, the "00H" which indicates the end of character string data
indicated by S1 , is ignored, and the character string indicated by S2 is appended to the last
character of the S1 string.
6-67
$+(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The entire character string linked from the device number designated by D to the final
device number of the relevant device cannot be stored. (Error code: 4101)
• The storage device numbers for the character strings designated by S1 and S2 overlap.
(Error code: 4101)
• The storage device numbers for the character strings designated by S2 and D overlap.
(Error code: 4101)
• The character string of S1 , S2 and D exceeds 16383 characters. (Error code: 4101)
Program Example
(1) The following program links the character string stored from D10 to D12 with the character
string "ABCD" when X0 is ON, and stores them in D100 onwards.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0 b15 b8 b7 b0
D10 62 H (b) 61H (a) D100 62 H (b) 61H (a)
D11 64 H (d) 63 H (c) + "ABCD" D101 64 H (d) 63 H (c)
D12 00H 65 H (e) D102 41H (A) 65 H (e)
D103 43H (C) 42H (B)
D104 00H 44H (D)
6-68
INC(P),DEC(P)
Basic High
performance Process Redundant Universal
2
3
indicates an instruction symbol of INC/DEC.
Command 4
INC, DEC D
INCP, DECP
Command
P D 4
D –– 7
8
Function
INC
D D
b15 b0 b15 b0
5678 (BIN) 5679 (BIN)
(2) When INC/INCP operation is executed for the device designated by D , whose content is
32767, the value 32768 is stored at the device designated by D .
DEC
b15 b0 b15 b0
5678 (BIN) 1 5677 (BIN)
(2) When DEC/DECP operation is executed for the device designated by D , whose content is
32768, the value 32767 is stored at the device designated by D .
Operation Error
(1) There are no operation errors associated with the INC(P)/DEC(P) instruction.
6-69
INC(P),DEC(P)
Program Example
(1) The following program outputs the present value at the counter C0 to C20 to the area Y30 to
Y3F in BCD, every time X8 is turned ON. (When present value is less than 9999)
[Ladder Mode]
[List Mode]
Step Instruction Device
[List Mode]
Step Instruction Device
6-70
DINC(P),DDEC(P)
Basic High
performance Process Redundant Universal
2
3
indicates an instruction symbol of DINC/DDEC.
Command 4
DINC, DDEC D
DINCP, DDECP
Command
P D 4
D ––
7
8
Function
DINC
D +1 D D +1 D
(2) When DINC/DINCP operation is executed for the device designated by D , whose content is
2147483647, the value 2147483648 is stored at the device designated by D .
DDEC
(2) When DDEC/DDECP operation is executed for the device designated by D , whose content
is 0, the value 1 is stored at the device designated by D .
Operation Error
(1) There are no operation errors associated with the DINC(P) or DDEC(P).
6-71
DINC(P),DDEC(P)
Program Example
(1) The following program adds 1 to the data at D0 and D1 when X0 is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
(2) The following program adds 1 to the data set at X10 to X27 when X0 goes ON, and stores
the result at D3 and D4.
[Ladder Mode] [List Mode]
Step Instruction Device
(3) The following program subtracts 1 from the data at D0 and D1 when X0 goes ON.
[Ladder Mode] [List Mode]
Step Instruction Device
(4) The following program subtracts 1 from the data set at X10 to X27 when X0 goes ON, and
stores the result at D3 and D4.
[Ladder Mode] [List Mode]
Step Instruction Device
6-72
BCD(P),DBCD(P)
Basic High
Process Redundant Universal
performance
3
4
indicates an instruction symbol of BCD/DBCD.
4
Command
BCD, DBCD S D
Command
BCDP, DBCDP P S D
6
S : BIN data or head number of the devices where the BIN data is stored (BIN 16/32 bits)
D : Head number of the devices where BCD data will be stored (BCD 4/8 digits) 7
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
S –– 8
D –– ––
6.3.1 Conversion from BIN data to 4-digit and 8-digit BCD (BCD(P),DBCD(P))
6.3 Data conversion instructions
Function
BCD
Converts BIN data (0 to 9999) at the device designated by S to BCD data, and stores it at the
device designated by D .
-32768 16384 8192 4096 2048 1024 512 256 128 64 32 16 8 4 2 1
S BIN 9999 0 0 1 0 0 1 1 1 0 0 0 0 1 1 1 1
Must always be "0". BCD conversion
8000 4000 2000 1000 800 400 200 100 80 40 20 10 8 4 2 1
D BCD 9999 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1
DBCD
Converts BIN data (0 to 99999999) at the device designated by S to BCD data, and stores it at
the device designated by D .
S +1 (Upper 16 bits) S (Lower 16 bits)
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
29
28
27
26
25
24
23
22
21
20
S BIN 99999999 0 0 0 0 0 1 0 1 1 1 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1
106
105
104
103
102
101
100
1
1
8
4
2
8
4
2
8
4
2
8
4
2
8
4
2
8
4
2
8
4
2
8
4
2
D BCD 99999999 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1
6-73
BCD(P), DBCD(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The data of S is other than 0 to 9999 at BCD instruction. (Error code: 4100)
Program Example
(1) The following program outputs the present value of C4 from Y20 to Y2F to the BCD display
device.
Programmable Controller Output Module
COM
Y2D
Y2C
Y2E
Y2B
Y2A
Y2F
Y29
Y28
Y27
Y26
Y25
Y24
Y23
Y22
Y21
Y20
8000
4000
2000
1000
1
800
400
200
100
80
40
20
10
2
8
4
Output
power supply 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0
(2) The following program outputs 32-bit data from D0 to D1 to Y40 to Y67.
Programmable Controller Output Module
Y67 to Y64 Y63 to Y60 Y5F to Y5C Y5B to Y58 Y57 to Y54 Y53 to Y50 Y4F to Y4C Y4B to Y48 Y47 to Y44 Y43 to Y40
Output
power supply
6-74
BIN(P),DBIN(P)
6.3.2 Conversion from BCD 4-digit and 8-digit data to BIN data
(BIN(P),DBIN(P))
1
BIN(P),DBIN(P)
2
Basic High
performance Process Redundant Universal
3
indicates an instruction symbol of BIN/DBIN.
BIN, DBIN
Command
S D
4
Command
BINP, DBINP P S D
4
S : BCD data or head number of the devices where the BCD data is stored (BCD 4/8 digits)
D : Head number of the devices where BIN data will be stored (BIN 16/32 bits) 6
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
S ––
7
D –– ––
8
Function
BIN
6.3.2 Conversion from BCD 4-digit and 8-digit data to BIN data (BIN(P),DBIN(P))
6.3 Data conversion instructions
Converts BCD data (0 to 9999) at device designated by S to BIN data, and stores at the device
designated by D .
8000 4000 2000 1000 800 400 200 100 80 40 20 10 8 4 2 1
S BCD 9999 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1
DBIN
Converts BCD data (0 to 99999999) at device designated by S to BIN data, and stores at the
device designated by D .
S +1 S
107
106
105
104
103
102
101
100
1
1
8
4
2
8
4
2
8
4
2
8
4
2
8
4
2
8
4
2
8
4
2
8
4
2
S BCD 99999999 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1
D BIN 99999999 0 0 0 0 0 1 0 1 1 1 1 1 0 1 0 1 1 1 1 0 0 0 0 0 1 1 1 1 1 1 1 1
6-75
BIN(P),DBIN(P)
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• When values other than 0 to 9 are designated to any digits of S
When the QCPU is used, the error above can be suppressed by turning ON SM722.
However, the instruction is not executed regardless of whether SM722 is turned ON or OFF
if the designated value is out of the available range.
For the BINP/DBINP instruction, the next operation will not be performed until the command
(execution condition) is turned from OFF to ON regardless of the presence/absence of an
error.
Program Example
(1) The following program converts the BCD data at X10 to X1B to BIN when X8 is ON, and stores it
at D8.
Can be used
COM
COM
COM
in other purposes.
1
80
40
2
400
20
4
800
200
10
100
Input
power supply
0
0
0
0
0
1
1
1
0
0
COM
X1D
X1C
X1E
X1B
X1A
X1F
X19
X18
X17
X16
X15
X14
X13
X12
X11
X10
6-76
BIN(P),DBIN(P)
(2) The following program converts the BCD data at X10 to X37 to BIN when X8 is ON, and stores it
at D0 and D1.
(Addition of the BIN data converted from BCD at X20 to X37 and the BIN data converted
1
from BCD at X10 to X1F)
BCD digital switch
2
Input power supply
X37 to X34 X33 to X30 X2F to X2C X2B to X28 X27 to X24 X23 to X20 X1F to X1C X1B to X18 X17 to X14 X13 to X10 3
Programmable Controller Output Module
If the data set at X10 to X37 is a BCD value which exceeds 2147483647, the value at D0
and D1 will be a negative value, because it exceeds the range of numerical values that can 8
be handled by a 32-bit device.
6.3.2 Conversion from BCD 4-digit and 8-digit data to BIN data (BIN(P),DBIN(P))
6.3 Data conversion instructions
6-77
FLT(P),DFLT(P)
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
Command
FLT, DFLT S D
Command
FLTP, DFLTP P S D
S : Integer data to be converted to 32-bit floating decimal point data or head number of the devices where the
integer data is stored (BIN 16/32 bits)
D : Head number of the devices where the converted 32-bit floating decimal point data will be stored
(real number)
S ––
D –– –– *1 ––
Function
FLT
(1) Converts 16-bit BIN data designated by S to 32-bit floating decimal point type real number,
and stores at device number designated by D .
S D +1 D
BIN 16 bits
32-bit floating-point
real number
(1) Converts 32-bit BIN data designated by S to 32-bit floating decimal point type real number,
and stores at device number designated by D .
S +1 S D +1 D
Upper 16 bits Lower 16 bits
6-78
FLT(P),DFLT(P)
(3) Due to the fact that 32-bit floating decimal point type real numbers are processed by simple
32-bit processing, the number of significant digits is 24 bits if the display is binary and
approximately 7 digits if the display is decimal. 1
For this reason, if the integer exceeds the range of 16777216 to 16777215 (24-bit BIN
value), errors can be generated in the conversion value.
As for the conversion result, the 25th bit from the upper bit of the integer is always filled with 2
1 and 26th bit and later bits are truncated.
Integer After conversion
b31 b24 b23 b16 b15 b8 b7 b0 3
222030030 0 0 0 0 1 1 0 1 0 0 1 1 1 0 1 1 1 1 1 0 1 0 0 0 1 1 0 0 1 1 1 0 Result of operation
is 222030032.
Truncation
Always filled with 1 4
b31 b24 b23 b16 b15 b8 b7 b0
372588919 0 0 0 1 0 1 1 0 0 0 1 1 0 1 0 1 0 1 0 0 0 0 0 1 0 1 1 1 0 1 1 1 Result of operation
is 372588928.
Truncation 4
Always filled with 1
Operation Error 6
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0. 7
• The result exceeds the following range (The overflow occurs.)
(For the Universal model QCPU only)
2128 | Operation result | (Error code: 4141)
8
6.3.3 Conversion from BIN 16 and 32-bit data to floating decimal point (Single precision)
6.3 Data conversion instructions
(FLT(P),DFLT(P))
6-79
FLT(P),DFLT(P)
Program Example
(1) The following program converts the BIN 16-bit data at D20 to a 32-bit floating decimal point
type real number and stores the result at D0 and D1.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Integer
D20 conversion D1 D0
15923 15923
BIN value 32-bit floating-point
real number
(2) The following program converts the BIN 32-bit data at D20 and D21 to a 32-bit floating
decimal point type real number, and stores the result at D0 and D1.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Integer
D21 D20 D1 D0
conversion
16543521 16543521
BIN value 32-bit floating-point
Integer real number
D21 D20
conversion An error is generated in operation results since
173963112
the number of significant digits is "7".
BIN value D1 D0
173963120
32-bit floating-point
real number
6-80
FLTD(P),DFLTD(P)
High
2
Basic performance Process Redundant Universal
3
indicates an instruction symbol of FLTD/DFLTD.
Command 4
FLTD, DFLTD S D
FLTDP, DFLTDP
Command
P S D 4
S : Integer data to be converted to 64-bit floating decimal point data or head number of the devices where the 6
integer data is stored (BIN 16/32 bits)
D : Head number of the devices where the converted 64-bit floating decimal point data will be stored
(real number)
7
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
S –– –– ––
8
D –– –– –– ––
Function
6.3.4 Conversion from BIN 16 and 32-bit data to floating decimal point (Double precision)
6.3 Data conversion instructions
(FLTD(P),DFLTD(P))
FLTD
(1) Converts 16-bit BIN data designated by S to 64-bit floating decimal point type real number,
and stores at device number designated by D .
S D +3 D +2 D +1 D
BIN 16 bits
64-bit floating-point
real number
(1) Converts 32-bit BIN data designated by S to 64-bit floating decimal point type real number,
and stores at device number designated by D .
S +1 S D +3 D +2 D +1 D
Upper 16 bits Lower 16 bits
6-81
FLTD(P),DFLTD(P)
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The result exceeds the following range (Operation results in an overflow):
21024 | Operation result | (Error code: 4141)
Program Example
(1) The following program converts the BIN 16-bit data at D20 to a 64-bit floating decimal point
type real number and stores the result at D0 to D3.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D20 Conversion to real number D3 D2 D1 D0
15923 15923
BIN value 64-bit floating-point
real number
(2) The following program converts the BIN 32-bit data at D20 and D21 to a 64-bit floating
decimal point type real number, and stores the result at D0 to D3.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D21 D20 Conversion to real number D3 D2 D1 D0
16543521 16543521
BIN value 64-bit floating-point
real number
6-82
INT(P),DINT(P)
Ver.
High
2
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
3
indicates an instruction symbol of INT/DINT.
Command
4
INT, DINT S D
INTP, DINTP
Command
P S D
4
S : 32-bit floating decimal point data to be converted to BIN value or head number of the devices where the
6
floating decimal point data is stored (real number)
D : Head number of the devices where the converted BIN value will be stored (BIN 16/32 bits)
S –– –– *1 ––
D –– ––
8
*1:Available only in multiple Universal model QCPU
6.3.5 Conversion from floating decimal point data to BIN16- and 32-bit data (Single precision)
6.3 Data conversion instructions
Function
(INT(P),DINT(P))
INT
(1) Converts the 32-bit floating decimal point real number designated at S into BIN 16-bit data
and stores it at the device number designated at D .
S +1 S D
BIN16-bit
32-bit floating-point
real number
(2) The range of 32-bit floating decimal point type real numbers that can be designated at S +1
or S is from 32768 to 32767.
(2) The range of 32-bit floating decimal point type real numbers that can be designated at S +1
or S is from 2147483648 to 2147483647.
6-83
INT(P),DINT(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The contents of the designated device or the result of the addition are not "0", or not within
the following range(For the Universal model QCPU only):
0, 2-126 | Contents of designated device | < 2128 (Error code: 4140)
• The value of the specified device is 0, unnormalized number, nonnumeric, and ± .
(For the Universal model QCPU only) (Error code: 4140)
• The 32-bit floating decimal point type data designated by S when the INT instruction was
used was outside the 31768 to 32767 range. (Error code: 4100)
• The 32-bit floating decimal point type data designated by S when the DINT instruction
was used was outside the 2147483648 to 2147483647 range. (Error code: 4100)
Program Example
(1) The following program converts the 32-bit floating decimal point type real number at D20
and D21 to BIN 16-bit data, and stores the result at D0.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
6-84
INT(P),DINT(P)
(2) The following program converts the 32-bit floating decimal point type real number at D20
and D21 to BIN 32-bit data and stores the result at D0 and D1.
[Ladder Mode] [List Mode]
1
Step Instruction Device
[Operation]
Integer
3
D21 D20 conversion D1 D0
-574968.321 -574968
32-bit floating-point
real number
BIN value 4
Integer
D21 D20 conversion
2147483649.22 An operation error occurs
since "setting data > 2147483647." 4
32-bit floating-point
real number
6.3.5 Conversion from floating decimal point data to BIN16- and 32-bit data (Single precision)
6.3 Data conversion instructions
(INT(P),DINT(P))
6-85
INTD(P),DINTD(P)
High
Basic performance Process Redundant Universal
Command
INTD, DINTD S D
Command
INTDP, DINTDP P S D
S : 64-bit floating decimal point data to be converted to BIN value or head number of the devices where the
floating decimal point data is stored (real number)
D : Head number of the devices where the converted BIN value will be stored (BIN 16/32 bits)
S –– –– –– ––
D –– –– –– ––
Function
INTD
(1) Converts the 64-bit floating decimal point real number designated at S into BIN 16-bit data
and stores it at the device number designated at D .
S +3 S +2 S +1 S D
BIN 16 bit
64-bit floating-point
real number
(2) The range of 64-bit floating decimal point type real numbers that can be designated at
S +3, S +2, S +1 or S is from 32768 to 32767.
6-86
INTD(P),DINTD(P)
(2) The range of 64-bit floating decimal point type real numbers that can be designated at
+3, +2, +1 or is from 2147483648 to 2147483647.
S S S S
1
(3) The integer value stored at D +1 and D is stored as BIN 32 bits.
(4) The converted data is the value rounded 64-bit floating-point real number to the first digit
after the decimal point. 2
Operation Error 3
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is not in the following range: (Error code: 4140)
4
0, 2-1022 | value of specified device | 21024
• The value of the designated device is 0. (Error code: 4140) 4
• The 64-bit floating decimal point type data designated by S when the INTD instruction
was used was outside the 31768 to 32767 range. (Error code: 4100)
6
• The 64-bit floating decimal point type data designated by S when the DINTD instruction
was used was outside the 2147483648 to 2147483647 range. (Error code: 4100)
7
Program Example
(1) The following program converts the 64-bit floating decimal point type real number at D20 to 8
D23 with BIN 16-bit data, and stores the result at D0.
[Ladder Mode] [List Mode]
Step Instruction Device
6.3.6 Conversion from floating decimal point data to BIN16- and 32-bit data (Double precision)
6.3 Data conversion instructions
(INTD(P),DINTD(P))
[Operation]
D23 D22 D21 D20 Conversion to integer D0
25915.6796 25916
64-bit floating-point real number BIN value
D23 D22 D21 D20 Conversion to integer
33562.3211 An operation erroe occurs because the specified data is larger than -32768.
64-bit floating-point real number
(2) The following program converts the 64-bit floating decimal point type real number at D20 to
D23 with BIN 32-bit data and stores the result at D0 and D1.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D23 D22 D21 D20 Conversion to integer D1 D0
574968.321 574968
64-bit floating-point real number BIN value
D23 D22 D21 D20 Conversion to integer
2147483649.22 An operation erroe occurs because the
64-bit floating-point real number specified data is larger than 2147483647.
6-87
DBL(P)
Basic High
performance Process Redundant Universal
Command
DBL DBL S D
Command
DBLP DBLP S D
S : BIN 16-bit data or head number of the devices where the BIN 16-bit data is stored (BIN 16 bits)
D : Head number of the devices where the converted BIN 32-bit data will be stored (BIN 32 bits)
S ––
D –– ––
Function
Converts BIN 16-bit data at device designated by S to BIN 32-bit data with sign, and stores the
result at a device designated by D .
S D +1 D
BIN 16-bit data Upper 16 bits Lower 16 bits
Operation Error
(1) There are no errors associated with the DBL(P) instruction.
Program Example
(1) The following program converts the BIN 16-bit data stored at D100 to BIN 32-bit data when
X20 is ON, and stores at R100 and R101.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D100 R101 R100
FB2EH FFFFFB2EH
( 1234) ( 1234)
6-88
WORD(P)
Command
3
WORD WORD S D
WORDP
Command
WORDP S D
4
S : BIN 32-bit data or head number of the devices where the BIN 32-bit data is stored (BIN 32 bits) 4
D : Head number of the devices where the converted BIN 16-bit data will be stored (BIN 16 bits)
Internal Devices
Setting
Data Bit Word
R, ZR
Bit
J \
Word
U \G Zn
Constants
K, H
Other 6
S ––
D –– ––
7
Function 8
Converts BIN 32-bit data at device designated by S to BIN 16-bit data with sign, and stores the
result at a device designated by D .
Devices can be designated in the range from -32768 to 32767.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The contents of the data designated by S +1 and S are outside the range of 32768 to
32767. (Error code: 4100)
Program Example
(1) The following program converts the BIN 32-bit data at R100 and R101 to BIN 16-bit data
when X20 is ON, and stores it at D100.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
R101 R100 D100
FFFF8253 H 8253H
(-32173) (-32173)
6-89
GRY(P),DGRY(P)
Basic High
performance Process Redundant Universal
Command
GRY, DGRY S D
Command
GRYP, DGRYP P S D
S : BIN data or head number of the devices where the BIN data is stored (BIN 16/32 bits)
D : Head number of the devices where the converted Gray code will be stored (BIN 16/32 bits)
S ––
D –– ––
Function
GRY
Converts BIN 16-bit data at the device designated by S to Gray code, and stores result at
device designated by D .
16 bits
b15 b0
S BIN 1234 0 0 0 0 0 1 0 0 1 1 0 1 0 0 1 0
b15 b0
D Gray code 1234 0 0 0 0 0 1 1 0 1 0 1 1 1 0 1 1
DGRY
Converts BIN 32-bit data at the device designated by S to Gray code, and stores result at
device designated by D .
S +1 (Upper 16 bits) S (Lower 16 bits)
D +1 D
6-90
GRY(P),DGRY(P)
Operation Error
1
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The data at S is a negative number. (Error code: 4100)
2
Program Example 3
(1) The following program converts the BIN data at D100 to Gray code when X10 is ON, and
stores result at D200.
4
[Ladder Mode] [List Mode]
Step Instruction Device
4
(2) The following program converts the BIN data at D10 and D11 to Gray code when X1C is ON, 6
and stores it at D100 and D101.
[Ladder Mode] [List Mode]
Step Instruction Device
7
6.3.9 Conversion from BIN 16 and 32-bit data to Gray code (GRY(P),DGRY(P))
6.3 Data conversion instructions
6-91
GBIN(P),DGBIN(P)
Basic High
performance Process Redundant Universal
Command
GBIN, DGBIN S D
Command
GBINP, DGBINP P S D
S : Gray code data or head number of the devices where the Gray code data is stored (BIN 16/32 bits)
D : Head number of the devices where the converted BIN data will be stored (BIN 16/32 bits)
S ––
D –– ––
Function
GBIN
Converts Gray code data at device designated by S to BIN 16-bit data and stores at device
designated by D .
16 bit
b15 b0
S Gray code 1234 0 0 0 0 0 1 1 0 1 0 1 1 1 0 1 1
b15 b0
D BIN 1234 0 0 0 0 0 1 0 0 1 1 0 1 0 0 1 0
DGBIN
Converts Gray code data at device designated by S to BIN 32-bit data and stores at device
designated by D .
S +1 (Upper 16 bits) S (Lower 16 bits)
D +1 D
6-92
GBIN(P),DGBIN(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• Data at S when the GBIN instruction was issued is outside the 0 to 32767 range.
2
(Error code: 4100)
• Data at S when the DGBIN instruction was issued is outside the 0 to 2147483647 range. 3
(Error code: 4100)
Program Example 4
(1) The following program converts the Gray code data at D100 when X10 is ON to BIN data,
and stores the result at D200. 4
[Ladder Mode] [List Mode]
Step Instruction Device
6
(2) The following program converts the Gray code data at D10 and D11 to BIN data when X1C
7
is ON, and stores the result at D0 and D1.
[Ladder Mode] [List Mode]
8
Step Instruction Device
6-93
NEG(P),DNEG(P)
Basic High
performance Process Redundant Universal
Command
NEG, DNEG D
Command
NEGP, DNEGP P D
D : Head number of the devices where the data for which complement of 2 is performed is stored
(BIN 16/32 bits)
D ––
Function
NEG
(1) Reverses the sign of the 16-bit device designated by D and stores at the device designated
by D .
16 bit
b15 b0
Before execution D 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 -21846
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Sign conversion
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
b15 b0
After execution D 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 21846
6-94
NEG(P),DNEG(P)
DNEG
(1) Reverses the sign of the 32-bit device designated by D and stores at the device designated 1
by D .
Before b31
32 bit
b0
2
execution D 1 1 1 1 1 1 1 0 1 0 0 1 0 0 -218460
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 3
Sign
conversion - 1 1 1 1 1 1 1 0 1 0 0 1 0 0
b31 b0
4
After
execution D 0 0 0 0 0 0 0 1 0 1 1 1 0 0 218460
Operation Error
6
(1) There are no operation errors associated with the NEG(P) or DNEG(P) instruction.
7
Program Example
(1) The following program calculates a total for the data at D10 through D20 when XA goes ON,
and seeks an absolute value if the result is negative.
8
[Ladder Mode]
6.3.11 Complement of 2 of BIN 16- and 32-bit data (sign reversal) (NEG(P),DNEG(P))
6.3 Data conversion instructions
Executes "D10 - D20".
[List Mode]
Step Instruction Device
6-95
ENEG(P)
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
Command
ENEG ENEG D
Command
ENEGP ENEGP D
D : Head number of the devices where the 32-bit floating decimal point data whose sign is to be reversed is
stored (real number)
D –– –– *1 ––
Function
(1) Reverses the sign of the 32-bit floating decimal point type real number data designated by
D , and stores at the device designated by D .
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The contents of the designated device or the result of the addition are not "0", or not within
the following range(For the Universal model QCPU only):
0, 2-126 | Contents of designated device | < 2128 (Error code: 4140)
• The value of the specified device is 0, unnormalized number, nonnumeric, and ± .
(For the Universal model QCPU only) (Error code: 4140)
Program Example
(1) The following program inverts the sign of the 32-bit floating decimal point type real number
data at D100 and D101 when X20 goes ON, and stores result at D100 and D101.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D101 D100 D101 D100
1.2345 1.2345
6-96
EDNEG(P)
High
2
Basic performance Process Redundant Universal
3
Command
EDNEG EDNEG D
4
Command
EDNEGP EDNEGP D
4
D : Head number of the devices where the 64-bit floating decimal point data whose sign is to be reversed is
stored (real number)
6
Setting Internal Devices J \
R, ZR U \G Zn Constants Other
Data Bit Word Bit Word
D –– ––
7
Function 8
(1) Reverses the sign of the 64-bit floating decimal point type real number data designated by
D , and stores at the device designated by D .
(2) Used when reversing positive and negative signs.
Program Example
(1) The following program inverts the sign of the 64-bit floating decimal point type real number
data at D100 to D103 when X20 goes ON, and stores result at D100 to D103.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D3 D2 D1 D0 D3 D2 D1 D0
1.2345
6-97
BKBCD(P)
6.3.14 Conversion from block BIN 16-bit data to BCD 4-digit data
(BKBCD(P))
BKBCD(P)
Basic High
performance Process Redundant Universal
Command
BKBCD BKBCD S D n
Command
BKBCDP BKBCDP S D n
S : Head number of the devices where BIN data is stored (BIN 16 bits)
D : Head number of the devices where the converted BCD data will be stored (BCD 4 digits)
n : Number of variable data blocks (BIN 16 bits)
S –– –– ––
D –– –– ––
n ––
Function
(1) Converts BIN data (0 to 9999) n points from device designated by S to BCD, and stores
result following the device designated by D .
Must always be "0".
8192
4096
2048
1024
512
256
128
64
32
16
8
4
2
1
BCD conversion
8000
4000
2000
1000
800
400
200
100
80
40
20
10
8
4
2
1
D BCD 1234 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0
D +1 BCD 5678 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0
D +2 BCD 1545 0 0 0 1 0 1 0 1 0 1 0 0 0 1 0 1
n
6-98
BKBCD(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The range of the device n points from a device designated by S , D or exceeds the
2
relevant device. (Error code: 4101)
• The data n points from the device designated by S is outside the 0 to 9999 range. 3
(Error code: 4100)
7
[Operation]
8
8192
4096
2048
1024
512
256
128
64
32
16
8
4
2
1
6.3.14 Conversion from block BIN 16-bit data to BCD 4-digit data (BKBCD(P))
6.3 Data conversion instructions
BCD D0 3
conversion
8000
4000
2000
1000
800
400
200
100
80
40
20
10
8
4
2
1
6-99
BKBIN(P)
6.3.15 Conversion from block BCD 4-digit data to block BIN 16-bit
data (BKBIN(P))
BKBIN(P)
Basic High
performance Process Redundant Universal
Command
BKBIN BKBIN S D n
Command
BKBINP BKBINP S D n
S : Head number of the devices where BCD data is stored (BCD 4 digits)
D : Head number of the devices where the converted BIN data will be stored (BIN 16 bits)
n : Number of variable data blocks (BIN 16 bits)
S –– –– ––
D –– –– ––
n ––
Function
(1) Converts BCD data (0 to 9999) n points from device designated by S to BIN, and stores
result following the device designated by D .
8000
4000
2000
1000
800
400
200
100
80
40
20
10
8
4
2
1
D BCD 1234 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0
D +1 BCD 5678 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0
D +2 BCD 1545 0 0 0 1 0 1 0 1 0 1 0 0 0 1 0 1
n
BIN conversion
8192
4096
2048
1024
512
256
128
64
32
16
8
4
2
1
6-100
BKBIN(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The n-bit range from the S , D , or device exceeds the range of that device.
2
(Error code: 4101)
7
[Operation]
8
8000
4000
2000
1000
800
400
200
100
80
40
20
10
8
4
2
1
6.3.15 Conversion from block BCD 4-digit data to block BIN 16-bit data (BKBIN(P))
6.3 Data conversion instructions
BIN conversion
(when D0=3)
8192
4096
2048
1024
512
256
128
64
32
16
8
4
2
1
6-101
ECON(P)
High
Basic performance Process Redundant Universal
Command
ECON ECON S D
Command
ECONP ECONP S D
S : Conversion source data, or head number of the device where conversion source data is stored
(Real number (single precision))
D : Head number of the device where the converted data is stored (Real number (double precision))
S –– –– ––
D –– –– –– ––
Function
Converts 32-bit floating-point real number specified for S into 64-bit floating-point real
number, and stores the conversion result to the device specified for D .
S +1 S D +3 D +2 D +1 D
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is not in the following range: (Error code: 4140)
-126 128
0,2 | value of specified device | 2
• The value of the specified device is 0, unnormalized number, nonnumeric, and ± .
(Error code: 4140)
6-102
ECON(P)
Program Example
1
(1) The program which converts 32-bit floating-point real number of the devices, D10 to D11,
into 64-bit floating-point real number when X0 turns ON, and outputs the conversion result to
the devices, D0 to D3. 2
[Ladder Mode] [List Mode]
Step Instruction Device
3
6-103
EDCON(P)
High
Basic performance Process Redundant Universal
Command
EDCON EDCON S D
Command
EDCONP EDCONP S D
S : Conversion source data, or head number of the device where conversion source data is stored
(Real number (double precision))
D : Head number of the device where the converted data is stored (Real number (single precision))
S –– –– –– ––
D –– –– –– ––
Function
Converts 64-bit floating-point real number specified for S into 32-bit floating-point real
number, and stores the conversion result to the device specified for D .
S +3 S +2 S +1 S D +1 D
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is not in the following range: (Error code: 4140)
0,2-1022 | value of specified device | 21024
• The value of the designated device is 0. (Error code: 4140)
• The result exceeds the following range (Conversion results in an overflow):
2128 | Conversion result | (Error code: 4141)
6-104
EDCON(P)
Program Example
1
(1) The program which converts 64-bit floating-point real number of the devices, D10 to D13,
into 32-bit floating-point real number when X0 turns ON, and outputs the conversion result to
the devices, D0 to D1. 2
[Ladder Mode] [List Mode]
Step Instruction Device
3
6-105
MOV(P),DMOV(P)
Basic High
performance Process Redundant Universal
Command
MOV, DMOV S D
Command
MOVP, DMOVP P S D
S : Data to be transferred or the number of the device where the data to be transferred is stored (BIN 16/32 bits)
D : Number of the device where the data will be transferred (BIN 16/32 bits)
S ––
D –– ––
Function
MOV
(1) Transfers the 16-bit data from the device designated by S to the device designated by D .
b15 b0
Before transfer S 1 0 1 1 0 1 0 0 0 1 1 1 0 0 1 0
Transfer
b15 b0
After transfer D 1 0 1 1 0 1 0 0 0 1 1 1 0 0 1 0
DMOV
(1) Transfers 32-bit data at the device designated by S to the device designated by D .
S +1 S
b15 b0 b15 b0
Before transfer S 1 0 1 1 0 1 0 0 0 1 1 1 0 0 1 0
Transfer
D +1 D
b15 b0 b15 b0
After transfer D 1 0 1 1 0 1 0 0 0 1 1 1 0 0 1 0
Operation Error
(1) There are no operation errors associated with the MOV(P) or DMOV(P) instruction.
6-106
MOV(P),DMOV(P)
Program Example
1
(1) The following program stores input data from X0 to XB at D8.
[Ladder Mode] [List Mode]
2
Step Instruction Device
3
(2) The following program stores the constant K155 at D8 when X8 goes ON.
[Ladder Mode] [List Mode] 4
Step Instruction Device
4
009BH
b15 b8b7 b0
D8 0 0 0 0 0 0 0 0 1 0 0 1 1 0 1 1
6
(3) The following program stores the data from D0 and D1 at D7 and D8.
[Ladder Mode] [List Mode] 7
Step Instruction Device
(4) The following program stores the data from X0 to X1F at D0 and D1.
[Ladder Mode] [List Mode]
6-107
EMOV(P)
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
Command
EMOV EMOV S D
Command
EMOVP EMOVP S D
S : Data to be transferred or number of the device to which the data to be transferred is stored (real number)
D : The number of the device to which the transferred data will be stored (real number)
S –– –– *1 ––
D –– –– *1 –– ––
Function
Transfers 32-bit floating decimal point type real number data being stored at the device
designated by S to a device designated by D
S .
S +1 S D +1 D
Transfer
4.23542 4.23542
Operation Error
(1) There are no operation errors associated with the EMOV(P) instruction.
6-108
EMOV(P)
Program Example
1
(1) The following program stores the real numbers at D10 and D11 at D0 and D1.
[Ladder Mode] [List Mode]
2
Step Instruction Device
3
[Operation]
D11 D10 D1 D0 4
36.475 36.475
(2) The following program stores the real number 1.23 at D10 and D11 when X8 is ON. 4
[Ladder Mode] [List Mode]
Step Instruction Device
6
7
[Operation]
D11 D10
1.23 1.23
8
6-109
EDMOV(P)
High
Basic performance Process Redundant Universal
Command
EDMOV EDMOV S D
Command
EDMOVP EDMOVP S D
S : Data to be transferred or number of the device to which the data to be transferred is stored (real number)
D : The number of the device to which the transferred data will be stored (real number)
S –– –– ––
D –– –– –– ––
Function
Transfers 64-bit floating decimal point type real number data being stored at the device
designated by S to a device designated by D
S .
S +3 S +2 S +1 S Transfer D +3 D +2 D +1 D
4.23542 4.23542
Operation Error
(1) There are no operation errors associated with the EDMOV(P) instruction.
6-110
EDMOV(P)
Program Example
1
(1) The following program stores the 64-bit floating decimal point type real number at D10 to
D13 at D0 to D3.
[Ladder Mode] [List Mode] 2
Step Instruction Device
[Operation] 4
D13 D12 D11 D10 D3 D2 D1 D0
36.475 36.475
4
(2) The following program stores the real number 1.23 at D10 to D13 when X8 is ON.
[Ladder Mode] [List Mode] 6
Step Instruction Device
7
[Operation]
D13 D12 D11 D10
8
6-111
$MOV(P)
Basic High
performance Process Redundant Universal
Command
$MOV $MOV S D
Command
$MOVP $MOVP S D
S : Character string to be transferred (maximum string length: 32 characters) or head number of the devices
where the character string to be transferred is stored
(character string)
D : Head number of the devices where the transferred character string will be stored (character string)
S –– –– ––
D –– –– –– ––
Function
(1) Transfers the character string data designated by S to the devices from the device
designated by D and onward.
The character string data enclosed in " (double quotes) or devices from the number
specified by S to the device number storing "00H" are transferred all at once.
b15 b8 b7 b0 b15 b8 b7 b0
S 2nd character 1st character D 2nd character 1st character
S + 1 4th character 3rd character D + 1 4th character 3rd character
S + 2 6th character 5th character D + 2 6th character 5th character
(2) Processing will be performed without error even in cases where the range for the devices
storing the character data to be transferred ( S to S +n) overlaps with the range of the
devices which will store the character string data after it has been transferred ( D to D +n).
The following occurs when the character string data that had been stored from D10 to D13 is
transferred to D11 to D14:
b15 b8 b7 b0 b15 b8 b7 b0
D10 32 H (2) 31 H (1) D10 32 H (2) 31 H (1) Character string before
D11 34 H (4) 33 H (3) D11 32 H (2) 31 H (1) transfer is remained.
D12 36 H (6) 35 H (5) D12 34 H (4) 33 H (3)
D13 00 H D13 36 H (6) 35 H (5)
D14 D14 00 H
6-112
$MOV(P)
(3) If the "00H" code is being stored at lower bytes of S +n, "00H" will be stored at both the
higher bytes and the lower bytes of D +n. 1
b15 b8 b7 b0 b15 b8 b7 b0
S 42 H (B) 41 H (A) D 42 H (B) 41 H (A)
S +1
S +2
44 H (D) 43 H (C)
45 H (E) 00 H
D +1
D +2
44 H (D) 43 H (C)
00 H 00 H
2
Upper byte is not transferred. At the upper byte position,
"00H" is automatically stored.
3
Operation Error
4
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• There is no "00H" code stored between the device number designated by S and the 4
relevant device. (Error code: 4101)
• The entire character string linked from the device number designated by D to the final
device number of the relevant device cannot be stored. (Error code: 4101)
6
• The character string of S exceeds 16383 characters. (Error code: 4101)
7
Program Example
(1) The character string data stored in D10 to D12 is transferred to D20 to D22 when X0 goes 8
ON.
[Ladder Mode] [List Mode]
Step Instruction Device
(2) When X is turned ON, the character string "ABCD" is transferred to D20 and D21.
[Ladder Mode] [List Mode]
Step Instruction Device
6-113
CML(P),DCML(P)
Basic High
performance Process Redundant Universal
Command
CML, DCML S D
Command
CMLP, DCMLP P S D
S : Data to be reversed or the number of the device where data to be reversed is stored (BIN 16/32 bits)
D : Number of the device where the reversing result will be stored (BIN 16/32 bits)
S ––
D –– ––
Function
CML
(1) Inverts 16-bit data designated by S bit by bit, and transfers the result to the device
designated by D .
b15 b0
Before execution S 1 0 1 1 0 1 0 0 0 1 1 1 0 0 1 0
Inversion
b15 b0
After execution D 0 1 0 0 1 0 1 1 1 0 0 0 1 1 0 1
DCML
(1) Inverts 32-bit data designated by S bit by bit, and transfers the result to the device
designated by D .
S +1 S
b15 b0 b15 b0
Before execution S 1 0 1 1 0 1 0 0 0 1 1 1 0 0 1 0
D +1 Inversion D
b15 b0 b15 b0
After execution D 0 1 0 0 1 0 1 1 1 0 0 0 1 1 0 1
Operation Error
(1) There are no operation errors associated with the CML(P) or DCML(P) instruction.
6-114
CML(P),DCML(P)
Program Example
1
(1) The following program inverts the data from X0 to X7, and transfers result to D0.
[Ladder Mode] [List Mode]
2
Step Instruction Device
3
[Operation]
If "Number of bits of S < Number of bits of D " 4
X7 X0
These bits are all regarded as 0. 11010000
4
b15 b8 b7 b0
D0 1 1 1 1 1 1 1 1 0 0 1 0 1 1 1 1
6
(2) The following program inverts the data at M16 to M23, and transfers the result to Y40 to
Y47.
[Ladder Mode] [List Mode]
7
Step Instruction Device
[Operation]
If "Number of bits of S < Number of bits of D "
(3) The following program inverts the data at D0 when X3 is ON, and stores the result at D16.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0
D0 1101100110101111
b15 b8 b7 b0
D16 0 0 1 0 0 1 1 0 0 1 0 1 0 0 0 0
6-115
CML(P),DCML(P)
(4) The following program inverts the data at X0 to X1F, and transfers results to D0 and D1.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
If "Number of bits of S < Number of bits of D "
X1B X8 X7 X0
These bits are all regarded as 0. 0100 011100101100
D0, 1 1 1 1 1 1 0 1 1 100011010011
(5) The following program inverts the data at M16 to M35, and transfers it to Y40 to Y63.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
If "Number of bits of S < Number of bits of D "
(6) Inverts the data at D0 and D1 when X3 is ON, and stores the result at D16 and D17.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b31 b24 b8 b7 b0
D0,D1 0 0 0 0 0 1 0 0 0 11100101100
b31 b24 b8 b7 b0
D16,D17 1 1 1 1 1 0 1 1 1000 110 100 11
6-116
BMOV(P)
Command
3
BMOV BMOV S D n
BMOVP
Command
BMOVP S D n
4
S : Head number of the devices where the data to be transferred is stored (BIN 16 bits) 4
D : Head number of the devices of transfer destination (BIN 16 bits)
n : Number of transfers (when using an intelligent function module device (U \G ): 1 to 6144 (QnA only))
(BIN 16 bits)
6
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
S –– –– 7
D –– ––
n ––
8
Function
(1) Transfers in batch 16-bit data of n points from the device designated by to location n
(2) Transfers can be accomplished even in cases where there is an overlap between the source
and destination device.
In the case of transmission to the smaller device number, transmission is from S ; for
transmission to the larger device number, transmission is from S + (n 1).
However, as shown in the example below, when transferring data from R to ZR, or from ZR
to R, the range to be transferred (source) and the range of destination must not overlap.
Transfer from R to R, or from ZR to ZR can be performed without any problem.
• ZR transfer range ((specified head No. of ZR) to (specified head No. of ZR + the number
of transfers -1))
• R transfer range ((specified head No. of R + file register block No. 32768) to (specified
head No. of R + file register block No. 32768 + the number of transfers -1))
6-117
BMOV(P)
Example
Transfer ranges of ZR and R overlap when transferring 10000 blocks of data from ZR30000
(source) to R10 (block No.1 of the destination).
• ZR transfer range (30000) to (30000+10000-1) (30000) to (39999)
• R transfer range (10+(1 32768)) to (10+(1 32768)+10000-1)
(32778) to (42777)
Therefore, the range 32778 to 39999 overlaps and the data is not correctly transferred.
Source of transfer Destination of transfer
ZR0 R0
ZR30000 R32767
ZR39999 R10
(3) When S is a word device and D is a bit device, the object for the word device will be the
number of bits designated by the bit device digit designation.
If K1Y30 has been designated by D , the lower four bits of the word device designated by S
(4) If bit device has been designated for S and D , then S and D should always have the
same number of digits.
(5) When using a link direct device and an intelligent function module device for S and D , only
either of S or D can be used.
(6) Selection whether to check a device range
Whether to check a device range during execution of the BMOV instruction can be selected
with the device range check inhibit flag (SM237) (only when the conditions for subset
processing are established).
While SM237 is ON, whether S to S + (n) -1 and D to D + (n) - 1 are within the device
range or not are not checked.
For details of SM237, refer to Appendix 3 SPECIAL RELAY LIST.
SM237 can be used only for the Universal model QCPU whose first 5 digits of
serial number is 10012 or later.
6-118
BMOV(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The device range of n points from S or D exceeds the corresponding device range.
2
(Error code: 4101)
3
Program Example
(1) The following program outputs the lower 4 bits of data at D66 to D69 to Y30 to Y3F in 4-point
units.
4
[Ladder Mode] [List Mode]
Step Instruction Device 4
6
[Operation]
Before execution (source of transfer)
D66
b15 b4b3 b0
1110 1
After execution (destination of transfer)
1 1 0 1 Y33 to Y30
7
D67 00000 0 0 0 0 Y37 to Y34
D68 10011 0 0 1 1 Y3B to Y38
D69 0 110 1 1 1 0 1 Y3F to Y3C 8
Ignored
(2) The following program outputs the data at X20 to X2F to D100 to D103 in 4-point units.
[Operation]
X2F X2CX2B X28X27 X24X23 X20
Before execution 1 0 0 0 0 1 1 1 0 1 1 0 0 1 0 0
0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 D101
4 points
0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 D102
0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 D103
6-119
FMOV(P)
Basic High
performance Process Redundant Universal
Command
FMOV FMOV S D n
Command
FMOVP FMOVP S D n
S : Data to be transferred or the head number of the devices where the data to be transferred is stored
(BIN 16 bits)
D : Head number of the devices of transfer destination (BIN 16 bits)
n : Number of transfers (BIN 16 bits)
S ––
D –– ––
n ––
Function
(1) Transfers 16-bit data at the device designated by S to n points of devices starting from the
one designated by D .
b15 b0
b15 b0 Transfer D 3456 H
S 3456 H D +1 3456 H
D +2 3456 H
n
D +(n-2) 3456 H
D +(n-1) 3456 H
(2) In cases where S designates a word device and D a bit device, the number of bits
designated by digit designation for the bit device will be the object bits for the word device. S
If K1Y30 has been designated by D , the lower 4 bits of the word device designated by S
(3) If bit device has been designated for S and D , then S and D should always have the
same number of digits.
6-120
FMOV(P)
SM237 can be used only for the Universal model QCPU whose first 5 digits of
serial number is 10012 or later.
3
Operation Error 4
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
4
• The device range of n points from D or exceeds the corresponding device range.
(Error code: 4101)
6
Program Example
(1) The following program outputs the lower 4 bits of D0 when XA goes ON to Y10 to Y23 in
4-bit units. 7
[Ladder Mode] [List Mode]
Step Instruction Device
8
[Operation]
b15 b4 b3 b2 b1 b0
D0 1 1 0 1 1 0 1 1 1 0 0 1 1 0 1 1
[Operation]
X2F X2CX2B X28X27 X24X23 X20
Before execution 1 0 1 1 0 1 1 1 0 0 1 0 1 1 1 0
0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 D101
4 points
0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 D102
0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 0 D103
6-121
DFMOV(P)
Ver.
High
Basic performance Process Redundant Universal
Command
DFMOV DFMOV S D n
Command
DFMOVP DFMOVP S D n
S : Data to be transferred or head number of the devices where the data to be transferred are stored (BIN 32 bits)
S ––
D –– ––
n ––
Function
(1) This instruction transfers 32-bit data of the device specified by S to the n-point devices
starting from the device specified by D .
b31 b0
b31 b0 Transfer D +1, D 1234567H
S +1, S 1234567H D +3, D +2 1234567H
D +5, D +4 1234567H n
D +n 1, D +n 2 1234567H
(2) If S specifies data of a device with digit specification, the amount of data to be transferred
will be the amount of the data specified digit.
If K5Y0 is specified by S , the lower 20 bits (five digits) of the word device specified by S
will be the object.
Y1F Y14 Y13 Y0
S +1, S
0 D +3, D +2
・ ・
・ ・
Transfer b31 b20 b19 ・ b0 ・
0 D +(2n 1), D +(2n 2)
6-122
DFMOV(P)
(3) If D specifies data of a device with digit specification, the amount of data stored in the
device specified by D will be transferred. 1
If K5Y0 is specified by D , the lower 20 bits of the word device specified by S will be the
object.
If both S and D specify data of a device with digit specification, the amount of data 2
specified by D will be transferred regardless of the number of digits.
b31 b20 b19 b0
S +1, S 3
Amount of data specified digits by D
Transfer 4
D +n … D +1 D
Program Example
(1) The following program stores the value data stored at Y0 to Y13(20 bits) into D10 to
D17,when M0 is turned on,
[Ladder Mode] [List Mode]
[Operation]
Y1F Y14 Y13 Y0
1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D13,D12
Transfer
0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D15,D14
0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D17,D16
6-123
XCH(P),DXCH(P)
Basic High
performance Process Redundant Universal
Command
XCH, DXCH D1 D2
Command
XCHP, DXCHP P D1 D2
D1 , D2 : Head number of the devices where the data to be exchanged is stored (BIN 16/32 bits)
D2 ––
Function
XCH
b15 b8 b7 b0 b15 b8 b7 b0
Before execution 0 1 1 1 0 0 0 0 0 0 0 0 0 1 1 1 1111 00001111 0000
D1 D2
b15 b8 b7 b0 b15 b8 b7 b0
After execution 1111000011110000 0111000000000111
DXCH
D1 +1 D1 D2 +1 D2
6-124
XCH(P),DXCH(P)
Operation Error
1
(1) There are no errors associated with the XCH (P) and DXCH (P) instruction.
2
Program Example
(1) The following program exchanges the present value of T0 with the contents of D0 when X8
goes ON.
3
[Ladder Mode] [List Mode]
4
(2) The following program exchanges the contents of D0 with the data from M16 to M31 when
X10 goes ON.
[Ladder Mode] [List Mode] 6
Step Instruction Device
(3) The following program exchanges the contents of D0 and D1 with the data at M16 to M47
when X10 goes ON.
8
[Ladder Mode] [List Mode]
Step Instruction Device
6-125
BXCH(P)
Basic High
performance Process Redundant Universal
Command
BXCH BXCH D1 D2 n
Command
BXCHP BXCHP D1 D2 n
D1 , D2 : Head number of the devices where the data to be exchanged is stored (BIN 16 bits)
n : Number of exchanges (BIN 16 bits)
D1 –– –– ––
D2 –– –– ––
n ––
Function
(1) Exchanges 16-bit data of n points from device designated by D1 and 16-bit data of n points
from device designated by D2 .
b15 b8 b7 b0 b15 b8 b7 b0
D1 0000 111100001111 D2 00 11001100 110011
D1 +1 1111111100000000 D2 +1 110000 11110000 11
D1 +2 0000000011111111 D2 +2 1111111100000000
n n
D1 +(n 2) 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D2 +(n 2) 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
D1 +(n 1) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D2 +(n 1) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
b15 b8 b7 b0 b15 b8 b7 b0
D1 00 11001100110011 D2 0000 111100001111
D1 +1 110000 11110000 11 D2 +1 1111111100000000
D1 +2 1111111100000000 D2 +2 0000000011111111
n n
D1 +(n 2) 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 D2 +(n 2) 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
D1 +(n 1) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 D2 +(n 1) 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
6-126
BXCH(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The range of the device of n points from a device designated by D1 , D2 or exceeds the
2
relevant device. (Error code: 4101)
[Operation] 7
b15 b8 b7 b0 b15 b8 b7 b0
D200 0 0 1 1 1 1 0 0 1 1 1 1 1 1 1 1 R0 0 1 1 1 0 1 1 1 0 1 1 1 0 1 1 1
D201 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 R1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 8
D202 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 R2 1 1 0 0 0 0 0 0 1 1 0 0 0 0 0 0
b15 b8 b7 b0 b15 b8 b7 b0
6-127
SWAP(P)
Basic High
performance Process Redundant Universal
Command
SWAP SWAP D
Command
SWAPP SWAPP D
D : Head number of the devices where the data is stored (BIN 16 bits)
D ––
Function
(1) Exchanges the higher and lower 8 bits of the device designated by D .
b15 b12 b11 b8 b7 b4 b3 b0
D 0 10 1010 11010 10 10
Operation Error
(1) There are no operation errors associated with the SWAP(P) instruction.
Program Example
(1) The following program exchanges the higher 8 bits and lower 8 bits of R10 when X10 goes
ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b12 b11 b8 b7 b4 b3 b0
R10 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
6-128
CJ,SCJ,JMP
Command 4
CJ CJ P**
Command
SCJ SCJ P** 4
JMP JMP P**
Label
Command
6
P**
7
P** : Pointer number of jump destination (Device name)
Function
CJ
Executed at each scan
SCJ
(1) Executes the program specified by the pointer number within the same program file starting
with the scan immediately after OFF ON of the execution command.
(2) When the execution command is OFF or turned ON OFF, the program at the next step is
executed.
ON
SCJ
1 scan Executed at each scan
6-129
CJ,SCJ,JMP
JMP
(1) Unconditionally executes program of designated pointer number within the same program
file.
5. The device to which a jump has been made with the CJ, SCJ or JMP does not
change.
XB Jumps to label P19
10 CJ P19 when XB turns ON.
XC Y43 and Y49 remain
14 Y43 unchanged regardless
XB of whether XB and XC are
16 Y49 turned ON/OFF during the
P19 execution of CJ instruction.
X9
18 Y4C
7. The jump instructions can be used only for pointer numbers within the same
program file.
8. If a jump is made to a pointer number inside the skip range during a skip
operation, program execution will be taken up following the pointer number of
the jump destination.
6-130
CJ,SCJ,JMP
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The pointer number designated does not come prior to the END instruction. 2
(Error code: 4210)
• A pointer number which is not in use as a label in the same program has been
designated. (Error code: 4210) 3
• A common pointer has been designated. (Error code: 4210)
Program Example 4
(1) The following program jumps to P3 when X9 goes ON.
[Ladder Mode] [List Mode] 4
Step Instruction Device
7
(2) The following program jumps to P3 from the next scan after XC goes ON.
[Ladder Mode] [List Mode] 8
Step Instruction Device
[Program example2]
[Ladder Mode] [List Mode]
Step Instruction Device
0 LD M0
1 OUT Y0
2 AND SM400
3 SCJ P0
6-131
GOEND
Basic High
performance Process Redundant Universal
Command
GOEND GOEND
Function
(1) Jumps to the FEND or END instruction in the same program file.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The GOEND instruction has been executed after the execution of the CALL, ECALL
instruction, and prior to the execution of the RET instruction. (Error code: 4211)
• The GOEND instruction has been executed after the execution of the FOR instruction,
and prior to the execution of the NEXT instruction. (Error code: 4200)
• The GOEND instruction has been executed during an interrupt program but prior to the
execution of the IRET instruction. (Error code: 4221)
• The GOEND instruction was executed between the CHKCIR and CHKEND instruction
block. (Error code: 4230)
• The GOEND instruction was executed between the IX and IXEND instruction block.
(Error code: 4231)
Program Example
(1) The following program jumps to the END instruction if D0 holds a negative number.
[Ladder Mode] [List Mode]
Step Instruction Device
6-132
DI,EI,IMASK
Basic High
performance Process Redundant Universal
3
4
DI DI
Sequence program 6
IMASK IMASK S
EI EI 7
S : Interrupt mask data or head number of the devices where the interrupt mask data is stored (BIN 16 bits) 8
Setting Internal Devices J \
R, ZR U \G Zn Constants Other
Data Bit Word Bit Word
S –– ––
Sequence program
DI
Even if a cause of interrupt occurs during
Sequence program the execution of the sequence program
between the DI and EI instructions, execution
EI of the interrupt program is suspended until
FEND the processing of the sequence program
is completed.
In Interrupt programs
6-133
DI,EI,IMASK
IMASK
(1) Enables/disables the execution of the interrupt program marked by the designated interrupt
pointer by using the bit pattern of 8 points from the device designated by S .
• 1(ON)......Interrupt program execution enabled
• 0(OFF) .... Interrupt program execution disabled
(2) The interrupt pointer numbers corresponding to the individual bits are as shown below:
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
S I15 I14 I13 I12 I11 I10 I9 I8 I7 I6 I5 I4 I3 I2 I1 I0
S+1 I31 I30 I29 I28 I27 I26 I25 I24 I23 I22 I21 I20 I19 I18 I17 I16
S+2 I47 I46 I45 I44 I43 I42 I41 I40 I39 I38 I37 I36 I35 I34 I33 I32
S+3 I63 I62 I61 I60 I59 I58 I57 I56 I55 I54 I53 I52 I51 I50 I49 I48
S+4 I79 I78 I77 I76 I75 I74 I73 I72 I71 I70 I69 I68 I67 I66 I65 I64
S+5 I95 I94 I93 I92 I91 I90 I89 I88 I87 I86 I85 I84 I83 I82 I81 I80
S+6 I111 I110 I109 I108 I107 I106 I105 I104 I103 I102 I101 I100 I99 I98 I97 I96
S+7 I127 I126 I125 I124 I123 I122 I121 I120 I119 I118 I117 I116 I115 I114 I113 I112
(3) When the power is turned ON or when the CPU module has been reset, the execution of
interrupt programs I0 to I31,I48 to I127 is enabled, and the execution of interrupt programs
I32 to I47 is disabled.
(4) The statuses of devices S , S +1, S +2, and S +3 to S +7 are stored in SD715 to SD717
and SD781 to SD785 (storage area for the IMASK instruction mask pattern).
(5) Although the special registers are separated as SD715 to SD717 and SD781 to SD785,
device numbers should be designated as S to S +7 successively.
55 IRET
2. For the information on interrupt conditions, link direct devices, refer to the
QnUCPU User’s Manual(Function Explanation, Program Fundamentals) or
Qn(H)/QnPH/QnPRHCPU User’s Manuall(Function Explanation, Program
Fundamentals)
3. The DI state (interrupt disabled) is active during the execution of an interrupt
program. Do not insert the EI instructions in interrupt programs to attempt the
execution of multiple interrupts, with interrupt programs running inside interrupt
programs.
4. If there are the EI and DI instructions within a master control, these instructions
will be executed regardless of the execution/non-execution status of the MC
instruction.
6-134
DI,EI,IMASK
Operation Error
1
(1) There are no operation errors associated with the DI, EI or IMASK instruction.
2
Program Example
(1) The following program is designed to enable the execution of only the interrupt programs
having the interrupt pointer numbers I1 and I3 while X0 is ON.
3
[Ladder Mode] [List Mode]
Step Instruction Device 4
6-135
DI,EI,IMASK
DI DI
Sequence program
IMASK IMASK S
EI EI
S : Head number of the devices where the interrupt mask data is stored (BIN 16 bits)
S –– ––
Function
DI
(1) Disables the execution of an interrupt program until the EI instruction has been executed,
even if a start cause for the interrupt program occurs.
(2) A DI state is entered when power is turned ON or when the CPU module is reset.
EI
The EI instruction is used to clear the interrupt disable state resulting from the execution of
the DI instruction, and to create a state in which the interrupt program designated by the
interrupt pointer number enabled by the IMASK instruction and the fixed cycle execution
type program can be executed.
When the IMASK instruction is not executed, I32 to I47 are disabled.
Sequence program
6-136
DI,EI,IMASK
IMASK
(1) Enables/disables the execution of the interrupt program marked by the designated interrupt 1
pointer by using the bit pattern of 16 points from the device designated by S .
• 1(ON)...... Interrupt program execution enabled
• 0(OFF).... Interrupt program execution disabled 2
(2) The interrupt pointer numbers corresponding to the individual bits are as shown below:
3
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
S I15 I14 I13 I12 I11 I10 I9 I8 I7 I6 I5 I4 I3 I2 I1 I0
S +1 I31 I30 I29 I28 I27 I26 I25 I24 I23 I22 I21 I20 I19 I18 I17 I16
4
S +2 I47 I46 I45 I44 I43 I42 I41 I40 I39 I38 I37 I36 I35 I34 I33 I32
S +3 I63 I62 I61 I60 I59 I58 I57 I56 I55 I54 I53 I52 I51 I50 I49 I48
S +4 I79 I78 I77 I76 I75 I74 I73 I72 I71 I70 I69 I68 I67 I66 I65 I64
S +5 I95 I94 I93 I92 I91 I90 I89 I88 I87 I86 I85 I84 I83 I82 I81 I80
4
S +6 I111 I110 I109 I108 I107 I106 I105 I104 I103 I102 I101 I100 I99 I98 I97 I96
S +7 I127 I126 I125 I124 I123 I122 I121 I120 I119 I118 I117 I116 I115 I114 I113 I112
S +8 I143 I142 I141 I140 I139 I138 I137 I136 I135 I134 I133 I132 I131 I130 I129 I128 6
S +9 I159 I158 I157 I156 I155 I154 I153 I152 I151 I150 I149 I148 I147 I146 I145 I144
S +10 I175 I174 I173 I172 I171 I170 I169 I168 I167 I166 I165 I164 I163 I162 I161 I160
S +11 I191 I190 I189 I188 I187 I186 I185 I184 I183 I182 I181 I180 I179 I178 I177 I176
7
S +12 I207 I206 I205 I204 I203 I202 I201 I200 I199 I198 I197 I196 I195 I194 I193 I192
S +13
8
I223 I222 I221 I220 I219 I218 I217 I216 I215 I214 I213 I212 I211 I210 I209 I208
S +14 I239 I238 I237 I236 I235 I234 I233 I232 I231 I230 I229 I228 I227 I226 I225 I224
S +15 I255 I254 I253 I252 I251 I250 I249 I248 I247 I246 I245 I244 I243 I242 I241 I240
(3) When the power is turned ON or when the CPU module has been reset, the execution of
interrupt programs I0 to I31,I48 to I255 is enabled, and the execution of interrupt programs
55 IRET
• For the information on interrupt conditions, link direct devices, refer to the
QnUCPU User’s Manual(Function Explanation, Program Fundamentals) or
Qn(H)/QnPH/QnPRHCPU User’s Manuall(Function Explanation, Program
Fundamentals)
2. The DI state (interrupt disabled) is active during the execution of an interrupt
program. Do not insert the EI instructions in interrupt programs to attempt the
execution of multiple interrupts, with interrupt programs running inside interrupt
programs.
3. If there are the EI and DI instructions within a master control, these instructions
will be executed regardless of the execution/non-execution status of the MC
instruction.
6-137
DI,EI,IMASK
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by S exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
Program Example
(1) The following program creates an execution enabled state for the interrupt program marked
by the interrupt pointer number when X0 is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
6-138
IRET
3
I
**
IRET
4
IRET
Setting
Data
Internal Devices
Bit Word
R, ZR
Bit
J \
Word
U \G Zn Constants Other 4
–– ––
6
Function
(1) Indicates the completion of interrupt program processing. 7
(2) Returns to sequence program processing following the execution of the IRET instruction.
8
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
6-139
IRET
Program Example
(1) The following program adds 1 to D0 if M0 is ON when the number 3 interrupt is generated.
[Ladder Mode] [List Mode]
Step Instruction Device
6-140
RFS(P)
4
Command
RFS RFS S n
Command 4
RFSP RFSP S n
6
S : Head number of the devices to be refreshed (bits)
n : Number of refreshes (BIN 16 bits)
S –– ––
(Only X, Y)
n –– 8
Function
6-141
RFS(P)
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The range n points from the device designated by S exceeds the proximate I/O range.
(Error code: 4101)
Program Example
(1) The following program refreshes X100 to X11F and Y200 to Y23F when M0 goes ON.
[Ladder Mode] [List Mode]
Step Instruction Device
6-142
UDCNT1
Command 4
UDCNT1 UDCNT1 S D n
Setting
Data
Internal Devices
Bit Word
R, ZR
Bit
J \
Word
U \G Zn
Constants
K, H
Other 7
S (Only X)*1 –– –– –– ––
D –– *1(Only C) –– –– ––
8
n *2 *2 *2 ––
*1: Only the X device can be used for S . However, the X device can be used only in the range of number of I/O points
(the number of accessible points to actual I/O modules).
*2: Local devices and the file registers set for individual programs cannot be used.
6-143
UDCNT1
• The counter designated at D is a ring counter. If it is counting up when the present value
is 32767, the present value will become 32768. Further, if it is counting down when the
present value is 32768, the present value will become 32767. The count processing
performed on the present value is as shown below:
32768 32767 2 1 0 1 2 32766 32767
When counting up
(4) The UDCNT1 instruction triggers counting when the execution command is turned
OFF ON and suspends counting when the execution command is turned ON OFF.
When the execution command is turned OFF ON again, the counting resumes from the
suspended value.
(5) The RST instruction clears the present value of the counter designated at D and turns the
contact OFF.
1. With the UDCNT1 instruction, the argument device data is registered in the
work area of the CPU module and counting operation is processed as a system
interrupt. (The device data registered in the work area is cleared by turning the
execution command OFF, or turning the STOP/RUN switch STOP RUN.) For
this reason, the pulses that can be counted must have longer ON and OFF
times than the interrupt interval of the CPU module. The interrupt interval of
individual modules is shown below:
CPU Module Type Name Interrupt Interval
High Performance model QCPU, Process CPU,
1 ms
Universal model QCPU
2. The set value cannot be changed during counting directed by the UDCNT1
instruction (while the execution command is ON). To change the set value, turn
OFF the execution command.
3. Counters which have been designated by the UDCNT1 instruction cannot be
used by other instructions. If they are used by other instructions, they will not be
capable of returning an accurate count.
4. The UDCNT1 instruction can be used as many as 6 times within all the
programs being executed. The seventh and the subsequent UDCNT1
instructions are not processed.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by S exceeds the range of the corresponding device.
(Error code: 4101)
6-144
UDCNT1
Program Example
1
(1) This program uses C0 (Up/Down counter) to count the number of times X0 goes from OFF
to ON after X20 has gone ON.
[Ladder Mode] [List Mode] 2
Step Instruction Device
[Operation] 4
X20
X0
4
X1 Up Down Up
C0 present value 0 1 2 3 4 5 6 7 6 5 4 3 2 1 0- 1- 2- 3- 2- 1 0 1 1 6
C0 contact
6-145
UDCNT2
High
Basic performance Process Redundant Universal
Command
UDCNT2 UDCNT2 S D n
D : Number of the counter to be enabled to start counting with the UDCNT2 instruction (Device name)
n : Value to set (BIN 16 bits)
S (Only X)*1 –– –– –– ––
D –– *1(Only C) –– –– ––
n *2 *2 *2 ––
*1: Only the X device can be used for S . However, the X device can be used only in the range of number of I/O points
(the number of accessible points to actual I/O modules).
*2: Local devices and the file registers set for individual programs cannot be used.
Function
(1) The present value of the counter designated by D is updated depending on the status of the
input designated by S (A phase pulse) and the status of the input designated by S +1 (B
phase pulse).
(2) Direction of the count is determined in the following manner:
• When S is ON, if S +1 goes from OFF to ON, count up operation is performed (values
are added to the present value of the counter).
• When S is ON, if S +1 goes from ON to OFF, count down operation is performed (values
are subtracted from the present value of the counter).
• No count operation is performed if S is OFF.
(3) Count processing is conducted as described below:
• When the count is going up, the counter contact designated at D goes ON when the
present value becomes identical with the setting value designated by n. However, the
present value count will continue even when the contact of the counter designated at D
goes ON. (See Program Example (1))
• When the count is going down, the counter for the contact designated at D goes OFF
when the present value reaches the set value 1. (See Program Example (1))
6-146
UDCNT2
• The counter designated at D is a ring counter. If it is counting up when the present value
is 32767, the present value will become 32768. Further, if it is counting down when the
present value is 32768, the present value will become 32767. The count processing 1
performed on the present value is as shown below:
32768 32767 2 1 0 1 2 32766 32767
2
When counting up
(4) Count processing conducted according to the UDCNT2 instruction begins when the count 3
command goes from OFF to ON, and is suspended when it goes from ON to OFF.
When the execution command is turned OFF to ON again, the counting resumes from the
suspended value. 4
(5) The RST instruction clears the present value of the counter designated at D and turns the
contact OFF.
4
1. With the UDCNT2 instruction, the argument device data is registered in the
work area of the CPU module and counting operation is processed as a system 6
interrupt. (The device data registered in the work area is cleared by turning the
execution command OFF, or turning the STOP/RUN switch STOP RUN.) For
this reason, the pulses that can be counted must have longer ON and OFF 7
times than the interrupt interval of the CPU module. The interrupt interval of
individual modules is shown below:
CPU Module Type Name Interrupt Interval 8
High Performance model QCPU, Process CPU,
1 ms
Universal model QCPU
2. The set value cannot be changed during counting directed by the UDCNT2
instruction (while the execution command is ON). To change the set value, turn
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by S exceeds the range of the corresponding device.
(Error code: 4101)
6-147
UDCNT2
Program Example
(1) The following program performs a count operation as instructed by C0 (count up or down) on
the status of X0 and X1 after X20 has gone ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
X20
X0
X1
C0 contact
6-148
TTMR
3
Command
TTMR TTMR D n
4
D : D + 0: The device where measurement value is stored (BIN 16 bit)
n –– ––
7
Function
8
(1) Measures the time while the execution command is ON in units of seconds, and stores the
multiplied value of the measured time by the multiplier specified by n at the device
designated by D .
(2) Clears the device designated by +0 or +1 when the execution command is turned
OFF ON.
(3) The multipliers that can be designated by n are as shown below:
n Multiplier
0 1
1 10
2 100
(4) No processing is performed when the value specified by "n" is other than 0 to 2.
6-149
TTMR
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
Program Example
(1) The following program stores the amount of time that X0 is ON at D0.
[Ladder Mode] [List Mode]
Step Instruction Device
6-150
STMR
3
Command
STMR STMR S n D
4
S : Timer number (word)
n : Value to set (BIN 16 bits).
4
D : D + 0: Off delay timer output (bits)
S –– *1 –– –– ––
n ––
D –– –– –– –– 8
*1:Can be used only by timer (T) data
Function
(2) The timer coil designated by S turns ON at the leading edge and trailing edge of the
command for the STMR instruction, and starts measurement of the present value.
• The timer coil measures to the point where the value reaches the set value designated by
n, then enters a time up state and goes OFF.
• If the command for the STMR instruction goes OFF before the timer coil reaches the time
up state, it will remain ON. Timer measurement is continued at this time. When the STRM
instruction command goes ON once again, the present value will be cleared to 0 and
measurement will begin once again.
6-151
STMR
(3) The timer contact goes ON at the leading edge of the command for the STMR instruction,
and after the trailing edge is reached, the timer coil goes OFF at the trailing edge of the
STMR instruction command.
The timer contact is used by the CPU module system, and cannot be used by the user.
Command for
STMR instruction
S (Coil)
S (Contact)
(4) Measurement of the present value of the timer specified by the STMR instruction is
executed regardless of the command ON/OFF status of the STMR instruction.
If the STMR instruction is jumped with the JMP or similar instruction, it will not be possible to
get accurate measurement.
(5) Measurement unit for the timer designated by D is identical to the low speed timer.
(6) A value between 0 to 32767 can be set for n.
No operation if n is other than 0 to 32767.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
6-152
STMR
Program Example
1
(1) The following program turns Y0 and Y1 ON and OFF once each second (flicker) when X20
is ON.
(Uses 100 ms timer) 2
[Ladder Mode] [List Mode]
Step Instruction Device
3
4
[Timing Chart]
X20 6
M1, Y0
M2, Y1 7
M3
1 sec 1 sec 8
6-153
ROTC
High
Basic performance Process Redundant Universal
Command
ROTC ROTC S n1 n2 D
S : S +0 : Measures the number of table rotations (for system use) (BIN 16 bits)
S +1 : Call station number (BIN 16 bits)
S +2 : Call item number (BIN 16 bits)
n1 : Number of divisions of table (2 to 32767) (BIN 16 bits)
n2 : Number of low-speed sections (value from 0 to less than n1) (BIN 16 bits)
D : D +0 : A phase input signal (bits)
D +1 : B phase input signal (bits)
D +2 : 0 point detection input signal (bits)
D +3 : High speed forward rotation output signal (for system use) (bits)
D +4 : Low speed forward rotation output signal (for system use) (bits)
D +5 : Stop output signal (for system use) (bits)
D +6 : Low speed reverse rotation output signal (for system use) (bits)
D +7 : High speed reverse rotation output signal (for system use) (bits)
S –– –– ––
n1 ––
n2 ––
D –– –– ––
Function
(1) This control functions to enable shortest direction control of the rotary table to the position of
the station number designated by S +1 in order to remove or deposit an item whose number
has been designated by S +2 on a rotary table with equal divisions of the value designated
by n1.
(2) The item number and station number are controlled as items allocated by counterclockwise
rotation.
(3) The system uses S +0 as a counter to instruct it as to what item is at which number counting
from station number 0. Do not rewrite the sequence program data.
Accurate controls will not be possible in cases where users have rewritten the data.
(4) The value of n2 should be less than the number of table divisions specified by n1.
(5) D +0 and D +1 are A and B phase input signals that are used to detect whether the direction
of the rotary table rotation is forward or reverse.
The direction of rotation is judged by whether the B phase pulse is at its leading or trailing
edge when the A phase pulse is ON:
• When the B phase is at the leading edge: Forward rotation (clockwise rotation)
• When the B phase is at the trailing edge: Reverse rotation (counterclockwise rotation)
6-154
ROTC
(6) D +2 is the 0 point detection output signal that goes ON when item number 0 has arrived at
(8) If the command for the ROTC instruction is OFF, clears all D +3 to D +7 without performing
4
shortest direction control.
(9) The ROTC instruction can be used only one time in all programs where it is executed.
Attempts to use it more than one time will result in inaccurate operations.
4
(10) No processing is performed when the value of S +0 to S +2, or the value of n2 is greater
than n1. 6
Operation Error
7
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by S or D exceeds the range of the corresponding device. 8
(For the Universal model QCPU only.) (Error code: 4101)
6-155
ROTC
Program Example
(1) The following program deposits the item at section D2 on a 10-division rotary table at the
station at section D1, and the two sections ahead and behind this determine the rotation
direction and control speed of the motor when the table is being rotated at low speed.
[Ladder Mode] [List Mode]
Step Instruction Device
Station No. 0
0 point detection
X002
9 8
0 7
Part
X000
6
1 Detection
switch Forward
rotation 5
2 X001
4 Rotary table
3
Station No. 1
6-156
RAMP
3
Command
RAMP RAMP n1 n2 D1 n3 D2
4
n1 : Initial value (BIN 16 bits)
n2 : Final value (BIN 16 bits)
n2 ––
D1 –– –– 8
n3 ––
D2 –– –– ––
When the calculated one variation is indivisible, compensation is made to achieve the value
specified in n2 by the number of shifts specified in n3.
Hence, a linear ramp may not be made.
6-157
RAMP
(2) If the scan is performed for the number of moves specified by n3, the complete device
specified by D2 +0 is turned ON.
The ON/OFF status of the completion device and the contents of D1 +0 are determined by
the ON/OFF status of the device designated by D2 +1.
• When D2 +1 is OFF, +0 will go OFF at the next scan, and the RAMP instruction will begin a
new move operation from the value currently at D2 +0.
• When D2 +1 is ON, D2 +0 will remain ON, and the contents of D1 +0 will not change.
(3) When the command is turned OFF during the execution of this instruction, the contents of
D1 +0 will not change following this.
When the command goes ON again, the RAMP instruction will begin a new move from the
present value at +0.
(4) Do not change the specified values in n1 and n2 before the completion device specified in
D2 +0 turns ON.
Since the same expression is used every scan to calculate the value stored in D1 +1,
changing n1/n2 may cause a sudden variation.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by D1 or D2 exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
Caution
(1) When the digit specification of bit device is made to D1 , the digit specification of bit device
can only be used when the following condition is met.
• Specification of digits: K8
6-158
RAMP
Program Example
1
(1) The following program changes the contents of D0 from 10 to 100 in a total of 6 scans, and
saves the contents of D0 when the move has been completed.
[Ladder Mode] [List Mode] 2
Step Instruction Device
4
[Timing Chart]
4
ON
X0 OFF
D0 10 25 40 55 70 85 100
D1 0 1 2 3 4 5 6
6
1scan 1scan 1scan 1scan 1scan 1scan
ON
7
M0 OFF
ON
M1 OFF
6-159
SPD
High
Basic performance Process Redundant Universal
Command
SPD SPD S n D
D : Head number of the devices where the measurement result will be stored (BIN 16 bits)
S (Only X) –– –– ––
n *1 *1 ––
D –– *1 –– ––
*1: Local devices and the file registers set for individual programs cannot be used.
Function
(1) The number of turning OFF ON input of the device specified by S is counted for just the
amount of time specified by n, and the count results are stored in the device specified by D .
Start of measurement
n [ms] n [ms]
ON
Execution command OFF
ON
S OFF
(2) When measurement directed by the SPD instruction has been completed, measurement is
done again from 0.
Turn OFF the execution command to stop the measurement directed by the SPD instruction.
6-160
SPD
1. With the SPD instruction, the argument device data is registered in the work 1
area of the CPU module and counting operation is processed as a system
interrupt. (The device data registered in the work area is cleared by turning the
execution command OFF, or turning the STOP/RUN switch STOP RUN.) For 2
this reason, the pulses that can be counted must have longer ON and OFF
times than the interrupt interval of the CPU module. The interrupt interval of
individual modules is shown below: 3
CPU Module Type Name Interrupt Interval
High Performance model QCPU, Process CPU,
Universal model QCPU
1 ms
4
2. • When the High Performance model QCPU or Process CPU is used:
The instruction is not processed when n = 0.
3. The SPD instruction can be used as many as 6 times within all the programs
4
being executed. The seventh and the subsequent SPD instructions are not
processed.
4. While the measurement is in execution (while the command input is ON) by the 6
SPD instruction, the setting value cannot be changed. Turn OFF the command
input before changing the setting value.
7
Operation Error 8
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by S exceeds the range of the corresponding device.
Program Example
(1) The following program measures the pulses input to X0 for a period of 500 ms when X10
goes ON, and stores the result at D0.
[Ladder Mode] [List Mode]
6-161
PLSY
High
Basic performance Process Redundant Universal
Command
PLSY PLSY n1 n2 D
n1 : Frequency or the number of the device where frequency is stored (BIN 16 bits)
n2 : Outputs count or the number of the device where the outputs count is stored (BIN 16 bits)
n1 ––
n2 ––
D *1 –– ––
*1: Only output (Y) can be used.
Function
(1) Outputs a pulse at a frequency designated by n1 the number of times designated by n2, to
the output module with the output signal (Y) designated by D .
(2) Frequencies between 1 to 100 Hz can be designated by n1.
If n1 is other than 1 to 100 Hz, the PLSY instruction will not be executed.
(3) The number of outputs that can be designated by n2 is between 1 to 65535 (0000H to
FFFFH).
If n2 is set to "0", pulses are continuously output.
(4) Only an output number corresponding to the output module can be designated for pulse
output at D .
(5) Pulse output commences with the command leading edge of the PLSY instruction.
Pulse output is suspended when the PLSY instruction command goes OFF.
6-162
PLSY
1. With the PLSY instruction, the argument device data is registered in the work 1
area of the CPU module and counting operation is processed as a system
interrupt. (The device data registered in the work area is cleared by turning the
execution command OFF, or turning the STOP/RUN switch STOP RUN.) For 2
this reason, the pulses that can be output must have longer ON and OFF times
than the interrupt interval of the CPU module. The interrupt interval of individual
modules is shown below: 3
CPU Module Type Name Interrupt Interval
High Performance model QCPU, Process CPU,
Universal model QCPU
1 ms
4
2. Do not change the argument for the PLSY instruction during pulse output
directed by the PLSY instruction (while the execution command is ON). To
change the argument, turn OFF the execution command.
4
3. The PLSY instruction can be used only once in all programs executed by the
CPU module. The second and the subsequent PLSY instructions are not
processed. 6
7
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0. 8
• The device specified by D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
6-163
PWM
High
Basic performance Process Redundant Universal
Command
PWM PWM n1 n2 D
n1 : ON time or the number of the device where the ON time is stored (BIN 16 bits)
n2 : Frequency or the number of the device where the frequency is stored (BIN 16 bits)
n1 ––
n2 ––
D *1 –– ––
*1: Only output (Y) can be used.
Function
(1) Outputs the pulse of the cycle set by n2, for the amount of time ON designated by n1, to the
output module designated by D .
n1
n2
*2: The value specified by n1 should be less than the value specified by n2.
6-164
PWM
1. With the PWM instruction, the argument device data is registered in the work 1
area of the CPU module and counting operation is processed as a system
interrupt. (The device data registered in the work area is cleared by turning the
execution command OFF, or turning the STOP/RUN switch STOP RUN.) The 2
interrupt interval of individual modules is shown below:
CPU Module Type Name Interrupt Interval of n1, n2
High Performance model QCPU, Process CPU,
3
1 ms
Universal model QCPU
For this reason, the PWM instruction can be used only once within all the 4
programs being executed by the CPU module.
2. The instruction is not processed in the following cases:
• When both n1 and n2 are 0
• When n1 n2
4
• When the PWM instruction is executed twice or more.
3. Do not change the argument for the PWM instruction during pulse output
directed by the PWM instruction (while the execution command is ON). To
6
change the argument, turn OFF the execution command.
7
Operation Error
8
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
6-165
MTR
High
Basic performance Process Redundant Universal
Command
MTR MTR S D1 D2 n
D2 : Head number of the devices where matrix input data will be stored (bits)
n : Number of input rows (BIN 16 bit)
S (Only X) –– ––
D1 (Only Y) –– ––
D2 –– ––
n ––
Function
(1) It reads the input from 16 points n-rows starting from the input number designated by S ,
then stores fetched input data from the device designated by D2 onward.
(2) One row (16 points) can be fetched in 1 scan.
(3) Fetching from the first to the n th row is repeated.
(4) The first through the 16th points store the first row of data and the next 16 points store the
second row of data at the devices following the device designated by D2 .
For this reason, the space of 16 n points from the device designated by D2 are occupied
by the MTR instruction.
(5) D1 is the output needed to select the row which will be fetched, and the system automatically
6-166
MTR
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The device other than the input (X) was specified at S . (Error code: 4101)
2
• The device other than the output (Y) was specified at D1 . (Error code: 4101)
3
Program Example
(1) The following program fetches, when X0 is turned ON, the 16 points 3 matrix starting from 4
X10, and stores the matrix into the area starting from M0.
[Ladder Mode] [List Mode]
Step Instruction Device
4
6
[Operation]
3rd row 7
M33
M34
M35
M36
M37
M38
M39
M40
M41
M42
M43
M44
M45
M46
M47
8
X010 X011 X012 X013 X014 X015 X016 X017 X018 X019 X01A X01B X01C X01D X01E X01F
2nd row
M16
M17
M18
M19
M20
M21
M22
M23
M24
M25
M26
M27
M28
M29
M30
M31
M11
M12
M13
M14
M15
M0
M1
M2
M3
M4
M5
M6
M7
M8
M9
X010 X011 X012 X013 X014 X015 X016 X017 X018 X019 X01A X01B X01C X01D X01E X01F
Caution
(1) Note that the MTR instruction directly operates on actual input and output.
The output D1 that had been turned ON by the MTR instruction does not turn OFF when the
MTR command turns OFF.
Turn OFF the specified output D1 in the sequence program.
(2) The MTR instruction execution interval must be longer than the total of response time of
input and output modules.
If the set interval is shorter than the value indicated above, an input cannot be read correctly.
If the scan time in a sequence program is short, select the constant scan and set the scan
time longer than the total of response time.
6-167
MEMO
6-168
7
7
APPLICATION
INSTRUCTIONS 7
Reference
Category Processing Details
section 7
Logical operations such as logical sum, logical product,
Logical operation instructions Section 7.1
etc.
Rotation instruction Rotation of designated data Section 7.2 7
Shift instruction Shift of designated data Section 7.3
Bit processing instructions Sets and resets bit data; bit extraction Section 7.4
Data processing including data searching, sorting,
Data processing instructions Section 7.5
decoding and encoding
Repeated operation, subroutine program calls, index
Structure creation instructions Section 7.6
modification in ladder units
Data Table Operation
Data table read/write Section 7.7
Instructions
Buffer memory access Read/write from/to the buffer memory of intelligent function
Section 7.8
instruction modules
Character code outputs to external devices and displays
Display instructions Section 7.9
on indicators
Debugging and failure
Check, status latch, sampling trace, program trace Section 7.10
diagnosis instructions
Character string processing
Character string (ASCII code data) processing Section 7.11
instructions
BCD real number and floating point real number
Special function instructions Section 7.12
processing
Data control instructions Output value controls based on input data range checks Section 7.13
File register switching
Sets file registers; switches block numbers Section 7.14
instructions
Reading, writing, addition, subtraction, and conversion of
Clock instructions clock values; comparison between the clock values; and Section 7.15
comparison between the date values
Reading, addition, and subtraction of clock values up to
Expansion clock instruction Section 7.16
millisecond
Program control instructions Instructions to switch program execution conditions Section 7.17
Instructions that do not fit in the above categories, such as
Other instructions watchdog timer reset instructions and timing clock Section 7.18
instructions
7-1
7.1 Logical operation instructions
(1) The logical operation instructions perform logical sum, logical product or other logical
operations in 1-bit units.
Formula for Example
Category Processing Details
Operation A B Y
0 0 0
Logical product Becomes 1 only when both input A and 0 1 0
Y A·B
(AND) input B are 1; otherwise, is 0 1 0 0
1 1 1
0 0 0
Logical sum Becomes 0 only when both input A and 0 1 1
Y A+B
(OR) input B are 0; otherwise, is 1 1 0 1
1 1 1
0 0 0
Exclusive OR Becomes 0 if input A and input B are 0 1 1
(XOR) equal; otherwise, is 1 Y A·B+A·B 1 0 1
1 1 0
0 0 1
NON exclusive
Becomes 1 if input A and input B are 0 1 0
logical sum
equal; otherwise, is 0 Y (A + B)(A + B) 1 0 0
(XNR)
1 1 1
7-2
WAND(P),DAND(P)
Basic High
performance Process Redundant Universal
2
4
indicates an instruction symbol of WAND/DAND.
Command
WAND,DAND S D
6
Command
P S D
WANDP,DANDP
6
S : Data for a logical product operation or the head number of the devices where the data is stored (BIN 16/32 bits)
D : Head number of the devices where the logical product operation result will be stored (BIN 16/32 bits)
7
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
S –– 8
D –– ––
Function
b15 b8 b7 b0
D 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0
(2) When bit devices are designated, the bit devices after the points designated as digits are
regarded as "0" in the operation. (See Program Example (2))
7-3
WAND(P),DAND(P)
DAND
(1) Conducts a logical product operation on each bit of the 32-bit data for the device designated
by S1 and the 32-bit data for the device designated by S2 , and stores the results at the
device designated by D .
D +1 D
b31 b16 b15 b0
D 1 1 1 1 1 1 0 0 1 1 0 0 1 1
AND
S +1 S
b31 b16 b15 b0
S 0 1 0 1 1 0 0 1 0 1 0 0 0 1
D +1 D
b31 b16 b15 b0
D 0 1 0 1 1 0 0 0 0 1 0 0 0 1
(2) When bit devices are designated, the bit devices below the points designated as digits are
regarded as "0" in the operation. (See Program Example (2))
Operation Error
(1) There are no operation errors associated with the WAND(P) or DAND(P) instruction.
Program Example
(1) The following program masks the digit in the 10s place of the 4-digit BCD value at D10
(second digit from the end) to 0 when XA is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0
D10 BCD1234 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0
AND
b15 b8 b7 b0
HFF0F 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1
b15 b8 b7 b0
D10 BCD1204 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0
7-4
WAND(P),DAND(P)
(2) The following program performs a logical product operation on the data at D99 and D100,
and the 24-bit data between X30 and X47 when X8 is ON, and stores the results at D99 and
D100.
[Ladder Mode] [List Mode]
1
Step Instruction Device
[Operation] 3
b31 b30b29 b28 b27 b26 b25b24 b23 b22 b3 b2 b1 b0
D100, D99 1 1 1 1 1 1 1 1 1 1 1 1 1 1
AND
X47X46 X33X32X31X30 4
X47 X30 0 0 0 0 0 0 0 0 1 1 0 1 0 1
Regarded as 0s.
6
b31 b30 b29 b28 b27b26 b25b24 b23 b22 b3 b2 b1 b0
D100, D99 0 0 0 0 0 0 0 0 1 1 0 1 0 1
7-5
WAND(P),DAND(P)
Command
WANDP,DANDP P S1 S2 D
S1 , S2 : Data for a logical product operation or the head number of the devices where the data is stored (BIN 16/32 bits)
D : Head number of the devices where the logical product operation result will be stored (BIN 16/32 bits)
S1 ––
S2 ––
D –– ––
Function
WAND
(1) A logical product operation is conducted for each bit of the 16-bit data of the device
designated at S1 and the 16-bit data of the device designated at S2 , and the results are
stored in the device designated at D .
b15 b8 b7 b0
S1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1
AND
b15 b8 b7 b0
S2 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0
b15 b8 b7 b0
D 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0
(2) For bit devices, the bit devices after the points designated by digit specification are regarded as "0" in
the operation. (See Program Examples (1) and (2))
DAND
(1) Conducts a logical product operation on each bit of the 32-bit data for the device designated
by S1 and the 32-bit data for the device designated by S2 , and stores the results at the
device designated by D .
S1 + 1 S1
b31 b16 b15 b0
S1 1 1 1 1 1 1 0 0 1 1 0 0 1 1
AND
S2 + 1 S2
b31 b16 b15 b0
S2 0 1 0 1 1 0 0 1 0 1 0 0 0 1
D+1 D
b31 b16 b15 b0
D 0 1 0 1 1 0 0 0 0 1 0 0 0 1
(2) For bit devices, the bit devices after the points designated by digit specification are regarded
7-6
WAND(P),DAND(P)
Operation Error 1
(1) There are no operation errors associated with the WAND(P) or DAND(P) instruction.
2
Program Example
(1) The following program performs a logical product operation on the data from X10 to X1B and 3
the data at D33 when XA is ON, and stores the results at D40.
[Ladder Mode] [List Mode]
Step Instruction Device
4
6
[Operation]
6
X1B X18X17 X13 X10
X1B to X10 0 0 0 0 1 0 0 1 0 0 1 1 1 1 0 0
Regarded as 0s.
AND
7
b15 b8 b7 b0
D33 0 1 0 1 1 1 0 1 1 1 1 1 0 0 0 0
b15 b8 b7 b0
D40 0 0 0 0 1 0 0 1 0 0 1 1 0 0 0 0 8
(2) The following program performs a logical product operation on the data at D10 and at D20
when X1C is ON, and stores the results from M0 to M11.
[Ladder Mode] [List Mode]
[Operation]
b15 b8 b7 b0
D10 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0
AND
b15 b8 b7 b0
D20 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1
Not changed
7-7
WAND(P),DAND(P)
(3) The following program masks the digit in the hundred-thousands place of the 8-digit BCD
value at D10 and D11 (sixth digit from the end) to 0 when XA is ON, and outputs the results
to from Y10 to Y2B.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b31 b16b15 b0
D10, D11 (BCD12345678) 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0
AND
b31 b16b15 b0
H FF0FFFFF 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
Y2F Y2C Y2B Y28 Y27 Y24 Y23 Y20 Y1F Y1CY1B Y18 Y17 Y14 Y13 Y10
Y2B to Y10 1 1 1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0
Not changed
7-8
BKAND(P)
3
Command
BKAND BKAND S1 S2 D n
Command 4
BKANDP S1 S2 D n
BKANDP
6
S1 *1 : Head number of the devices where data on which a logical operation will be conducted is stored
(BIN 16 bits)
*1 : Data for a logical operation or head number of the devices where the data for the logical operation is
6
S2
S1 *1 –– –– –– ––
S2 *1 –– –– –– 8
D *1 –– –– –– ––
n ––
*1: The same device number can be specified for S1 and D or S2 and D .
b15 b8b7 b0
D 0011000000110000
D +1 1111000000000000
D +2 0000000011111111
n
D +(n 2) 0101010101010101
D +(n 1) 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0
7-9
BKAND(P)
(2) The constant designated by S2 can be between -32768 and 32767 (BIN 16-bit data).
b15 b8 b7 b0
S1 0011001100110011
S1 + 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1
S1 + 2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 b15 b8b7 b0
n BKAND S2 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1
S1 + (n 2) 0101010101010101
S1 + (n 1) 1111000011110000
b15 b8 b7 b0
D 0011001100000011
D +1 1111000000001111
D +2 0000000000001111
n
D + (n 2) 0101010100000101
D + (n 1) 1111000000000000
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The n-bit range from the S1 , S2 , or D device exceeds the range of that device.
(Error code: 4101)
• The device range for n points starting from the device designated by S1 overlaps with the
device range for n points starting from the device designated by D .
(except when the same device is specified for S1 and D ) (Error code: 4101)
• The device range for n points starting from the device designated by S2 overlaps with the
device range for n points starting from the device designated by D .
(except when the same device is specified for S2 and D ) (Error code: 4101)
Program Example
(1) The following program performs a logical product operation on the data stored at D100 to
D102 and the data stored at R0 to R2 when X20 is turned ON, and stores the operation
result into the area starting from D200.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0 b15 b8b7 b0
D100 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 R0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
BKAND
D101 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 R1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0
D102 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 R2 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1
b15 b8 b7 b0
D200 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 D0 3
D201 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0
D202 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
7-10
WOR(P),DOR(P)
Command 6
P S D
WORP, DORP
6
S : Data for a logical sum operation or head number of the devices where the data is stored (BIN 16/32 bits)
D : Head number of the devices where the logical sum operation result will be stored (BIN 16/32 bits)
Setting
Data
Internal Devices
R, ZR
J \
U \G Zn
Constants
K, H
Other 7
Bit Word Bit Word
S ––
D –– –– 8
Function
b15 b8 b7 b0
D 1 1 0 1 1 1 1 1 1 1 0 0 1 1 1 1
(2) For bit devices, the bit devices after the points designated by digit specification are regarded
as "0" in the operation.
7-11
WOR(P),DOR(P)
DOR
(1) Conducts a logical sum operation on each bit of the 32-bit data of the device designated by
D and the 32-bit data of the device designated by S , and stores the results at the device
designated by D .
D +1 D
b31 b16 b15 b0
D 1 1 1 1 0 0 0 0 0 0 0 0 1 1
OR
S +1 S
b31 b16 b15 b0
S 1 0 0 1 0 0 0 1 1 1 0 0 1 1
D +1 D
b31 b16 b15 b0
D 1 1 1 1 0 0 0 1 1 1 0 0 1 1
(2) For bit devices, the bit devices after the points designated by digit specification are regarded
as "0" in the operation.
Operation Error
(1) There are no operation errors associated with the WOR(P) or DOR(P) instructions.
Program Example
(1) The following program performs a logical sum operation on the data at D10 and D20 when
XA is turned ON, and stores the results at D10.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0
D10 1 1 0 0 1 1 0 0 1 1 1 1 0 0 0 0
OR
b15 b8 b7 b0
D20 0 0 0 0 1 0 1 1 1 0 0 1 0 0 0 1
b15 b8 b7 b0
D10 1 1 0 0 1 1 1 1 1 1 1 1 0 0 0 1
7-12
WOR(P),DOR(P)
(2) The following program performs a logical sum operation on the 32-bit data from X0 to X1F,
and on the hexadecimal value FF00FF00H when XB is turned ON, and stores the results at
D66 and D67. 1
[Ladder Mode] [List Mode]
Step Instruction Device
2
[Operation]
4
S +1 S
X1F X1C X10 XF X3 X0
X1F X0 1 0 1 0 0 0 0 0 0 0 1 0 1 0
6
OR
D +1 D
b31 b16 b15 b0
FF00FF00H 1 1 1 1 0 0 0 1 1 1 0 0 0 0 6
D +1 D
b31 b16 b15 b0 7
D67,D66 1 1 1 1 0 0 0 1 1 1 1 0 1 0
7-13
WOR(P),DOR(P)
Command
WOR, DOR S1 S2 D
Command
WORP, DORP P S1 S2 D
S1 , S2 : Data for a logical sum operation or head number of the devices where the data is stored (BIN 16/32 bits)
D : Head number of the devices where the logical sum operation result will be stored (BIN 16/32 bits)
S1 ––
S2 ––
D –– ––
Function
WOR
(1) Conducts a logical sum operation on each bit of the 16-bit data of the device designated by
S1 and the 16-bit data of the device designated by S2 , and stores the results at the device
designated by D .
b15 b8 b7 b0
S1 1 1 0 0 0 0 0 0 1 1 1 1 0 0 0 0
OR
b15 b8 b7 b0
S2 0 0 0 0 1 1 0 0 1 1 0 0 0 0 1 1
b15 b8 b7 b0
D 1 1 0 0 1 1 0 0 1 1 1 1 0 0 1 1
(2) For bit devices, the bit devices after the points designated by digit specification are regarded
as "0" in the operation. (See Program Example (1))
7-14
WOR(P),DOR(P)
DOR
(1) Conducts a logical sum operation on each bit of the 32-bit data of the device designated by
S1 and the 32-bit data of the device designated by S2 , and stores the results at the device 1
designated by D .
S1 + 1 S1
2
b31 b16 b15 b0
S1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
S2 + 1
OR
S2
3
b31 b16 b15 b0
S2 0 0 1 0 1 1 0 0 0 0 1 1 1 1
4
D +1 D
b31 b0
6
b16 b15
D 0 0 1 1 1 1 1 1 0 0 1 1 1 1
(2) When bit devices are designated, the bit devices below the points designated as digits are
regarded as "0" in the operation. (See Program Example (2)) 6
Operation Error 7
(1) There are no operation errors associated with the WOR(P) or DOR(P) instructions.
8
Program Example
(1) The following program performs a logical sum operation on the data from X10 to X1B, and
the data at D33, and stores the result at Y30 to Y3B when XA is ON.
[Operation]
X1B X18X17 X14X13 X10
X1B to X10 0 0 0 0 1 1 0 0 0 0 1 1 0 0 0 0
Regarded as 0s.
OR
b15 b8 B7 b0
D33 1 1 1 1 1 0 0 1 1 0 0 1 0 0 1 1
Not changed
7-15
WOR(P),DOR(P)
(2) The following program performs a logical sum operation on the 32-bit data at D0 and D1,
and the 24-bit data from X20 to X37, and stores the results at D23 and D24 when M8 is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
S +1 S
b31 b28 b27 b24 b23 b22b21 b3 b2 b1 b0
D1, D0 1 1 1 1 0 0 0 0 1 1 0 0 1 1 1
OR
X37X36X35 X23X22X21X20
X37 to X20 0 0 0 0 0 0 0 0 1 0 0 1 0 0 1
Regarded as 0s.
D +1 D
b31 b16 b15 b0
D24, D23 1 1 1 1 0 0 0 0 1 1 0 1 1 1 1
7-16
BKOR(P)
3
Command
BKOR BKOR S1 S2 D n
Command 4
BKORP S1 S2 D n
BKORP
6
S1 *1 : Head number of the devices where data on which a logical operation will be conducted is stored
(BIN 16 bits)
*1 : Data for a logical operation or head number of the devices where the data for the logical operation is stored
6
S2
(BIN 16 bits)
D *1 : Head number of the devices where the operation result will be stored (BIN 16 bits)
n : Number of operation data blocks (BIN 16 bits)
S1 *1 –– –– –– ––
S2 *1 –– –– –– 8
D *1 –– –– –– ––
n ––
*1: The same device number can be specified for S1 and D or S2 and D .
b15 b8 b7 b0 b15 b8 b7 b0
S1 0000111100001111 S2 0000111111000011
S1 + 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 S2 + 1 1 1 0 0 1 1 0 0 0 0 1 1 0 0 1 1
S1 + 2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 S2 + 2 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0
n n
OR
b15 b8 b7 b0
D 0000111111001111
D +1 1100110011111111
D +2 0000111111111111
n
D +(n 2) 0011111111110011
D +(n 1) 1111111100001111
7-17
BKOR(P)
(2) The constant designated by S2 can be between 32768 and 32767 (BIN 16-bit data).
b15 b8 b7 b0
S1 0011110011000011
S1 + 1 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0
S1 + 2 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 b15 b8 b7 b0
n OR S2 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0
S1 +(n 2) 0000111100001111
S1 +(n 1) 1100001111000011
b15 b8 b7 b0
D 0011111111110011
D +1 0000111111111010
D +2 1010111111111010
n
D +(n 2) 0000111111111111
D +(n 1) 1100111111110011
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The n-bit range from the S1 , S2 , or D device exceeds the range of that device.
(Error code: 4101)
• The device range for n points starting from the device designated by S1 overlaps with the
device range for n points starting from the device designated by D . (except when the same
device is specified for S1 and D ) (Error code: 4101)
• The device range for n points starting from the device designated by S2 overlaps with the
device range for n points starting from the device designated by D . (except when the same
device is specified for S2 and D ) (Error code: 4101)
Program Example
(1) The following program performs a logical sum operation on the data stored at D100 to D102
and the data stored at R0 to R2 when X20 is turned ON, and stores the operation result into
the area starting from D200.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0 b15 b8 b7 b0
D100 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1 0 R0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0
OR
D101 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 R1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0
D102 1 1 0 0 0 0 0 0 0 0 1 1 1 1 0 0 R2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
b15 b8 b7 b0
D200 0 0 1 1 1 0 1 0 1 0 1 0 1 0 1 0
D201 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1
D202 1 1 0 0 1 1 1 1 0 0 1 1 1 1 1 1 D0 3
7-18
WXOR(P),DXOR(P)
Basic High
performance Process Redundant Universal
2
4
indicates an instruction symbol of WXOR/DXOR.
Command
WXOR, DXOR S D
6
Command
P S D
WXORP, DXOR
6
S : Data for an exclusive OR operation or head number of the devices where the data is stored (BIN 16/32 bits)
D : Head number of the devices where the exclusive OR operation result will be stored (BIN 16/32 bits)
7
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
S –– 8
D –– ––
Function
b15 b8 b7 b0
D 1 0 1 1 0 0 0 1 0 1 0 1 1 0 1 0
(2) For bit devices, the bit devices after the points designated by digit specification are regarded as
"0" in the operation.
7-19
WXOR(P),DXOR(P)
DXOR
(1) Conducts an exclusive OR operation on each bit of the 32-bit data of the device designated
by D and the 32-bit data of the device designated by S , and stores the results at the device
designated by D .
D +1 D
b31 b16 b15 b0
D 0 1 0 1 0 1 0 1 0 1 0 1 0 1
XOR
S +1 S
D +1 D
(2) For bit devices, the bit devices after the points designated by digit specification are regarded as
"0" in the operation.
Operation Error
(1) There are no operation errors associated with the WXOR(P) or DXOR(P) instructions.
Program Example
(1) The following program performs an exclusive OR operation on the data at D10 and D20
when XA is ON, and stores the result at D10.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0
D10 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
XOR
b15 b8 b7 b0
D20 0 0 1 1 1 0 0 1 0 0 1 1 1 0 0 1
b15 b8 b7 b0
D10 0 1 1 0 1 1 0 0 0 1 1 0 1 1 0 0
7-20
WXOR(P),DXOR(P)
(2) The following program compares the bit pattern of the 32-bit data from X20 to X3F with the
bit pattern of the data at D9 and D10 when X6 is ON, and stores the number of differing bits
at D16. 1
[Ladder Mode] [List Mode]
Step Instruction Device
2
3
[Operation]
S +1 S 4
X3F X3C X3B X38 X37 X34 X33 X30 X2F X2CX2B X28 X27 X24 X23 X20
X3F to X20 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D +1
XOR
D
6
b31 b16 b15 b0
D10,D9 1 0 1 1 1 0 0 1 1 1 0 0 0 0 0 1 1 0 1 1 1 1 0 1 1 0 1 0 1 1 0 1
6
D +1 D
D16 17 8
Remark
See Section 7.5.2 for more information on the DSUMP instruction.
7-21
WXOR(P),DXOR(P)
Command
WXOR, DXOR S1 S2 D
Command
WXORP, DXORP P S1 S2 D
S1 , S2 : Data for an exclusive OR operation or head number of the devices where the data is stored
(BIN 16/32 bits)
D : Head number of the devices where the exclusive OR operation result will be stored (BIN 16/32 bits)
S1 ––
S2 ––
D –– ––
Function
WXOR
(1) Conducts an exclusive OR operation on each bit of the 16-bit data of the device designated
by S1 and the 16-bit data of the device designated by S2 , and stores the results at the device
designated by D .
b15 b8 b7 b0
S1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0
XOR
b15 b8 b7 b0
S2 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
b15 b8 b7 b0
D 0 1 0 1 1 0 1 0 1 0 1 0 0 1 0 1
(2) For bit devices, the bit devices after the points designated by digit specification are regarded
as "0" in the operation. (See Program Example (1))
7-22
WXOR(P),DXOR(P)
DXOR
(1) Conducts an exclusive OR operation on each bit of the 32-bit data of the device designated 1
by S1 and the 32-bit data of the device designated by S2 , and stores the results at the device
designated by D .
S1 + 1 S1
2
b31 b16 b15 b0
S1 1 1 1 1 0 0 0 0 0 0 1 1 1 1
XOR
3
S2 + 1 S2
b31 b16 b15 b0
S2 1 1 1 1 1 0 1 0 1 0 1 1 0 0
4
D +1 D
D
b31 b16 b15 b0 6
0 0 0 0 1 0 1 0 1 0 0 0 1 1
(2) For bit devices, the bit devices after the points designated by digit specification are regarded
as "0" in the operation. 6
Operation Error
7
(1) There are no operation errors associated with the WXOR(P) or DXOR(P) instructions.
8
Program Example
(1) The following program conducts an exclusive OR operation on the data from X10 to X1B
and the data at D33 when X10 is ON, and outputs the result to Y30 to Y3B.
[Operation]
X1B X18X17 X14X13 X10
X1B to X10 0 0 0 0 0 1 0 1 0 1 0 1 0 1 0 1
Regarded as 0s.
XOR
b15 b8 b7 b0
D33 1 1 1 1 0 0 1 1 0 0 1 1 1 0 0 1
7-23
WXOR(P),DXOR(P)
(2) The following program conducts an exclusive OR operation on the data at D20 and D21, and
the data at D30 and D31 when X10 is turned ON, and stores the results at D40 and D41.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
S1 + 1 S1
b31 b16 b15 b0
D21,D20 1 1 0 0 1 0 1 0 1 1 0 0 1 1
XOR
S2 + 1 S2
b31 b16 b15 b0
D31,D30 0 0 0 0 1 1 0 0 0 1 0 1 0 1
D +1 D
b31 b16 b15 b0
D41,D40 1 1 0 0 0 1 1 0 1 0 0 1 1 0
7-24
BKXOR(P)
3
Command
BKXOR BKXOR S1 S2 D n
Command 4
BKXORP S1 S2 D n
BKXORP
6
S1 *1 : Head number of the devices where data on which a logical operation will be conducted is stored (BIN 16 bits)
S2 *1 : Data for a logical operation or head number of the devices where the data for the logical operation is stored
(BIN 16 bits)
D *1 : Head number of the devices where the operation result will be stored (BIN 16 bits)
6
n : Number of operation data blocks (BIN 16 bits)
–– –– ––
8
S2 *1
D *1 –– –– –– ––
n ––
*1: The same device number can be specified for S1 and D or S2 and D .
b15 b8 b7 b0
D 0000111100111111
D +1 1111000011000000
D +2 1111000000001111
n
D +(n 2) 1111111111110000
D +(n 1) 0000000000001111
7-25
BKXOR(P)
(2) The constant designated by S2 can be between 32768 and 32767 (BIN 16-bit data).
b15 b8b7 b0
S1 1111111100000000
S1 + 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0
S1 + 2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 b15 b8b7 b0
n XOR S2 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
S1 +(n 2) 1111111100001111
S1 +(n 1) 0101010101010101
b15 b8b7 b0
D 0101010110101010
D +1 1010010101011010
D +2 1010101001010101
n
D +(n 2) 0101010110100101
D +(n 1) 1111111111111111
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The n-bit range from the S1 , S2 , or D device exceeds the range of that device.
(Error code: 4101)
• The device range for n points starting from the device designated by S1 overlaps with the
device range for n points starting from the device designated by D . (except when the
same device is specified for S1 and D ) (Error code: 4101)
• The device range for n points starting from the device designated by S2 overlaps with the
device range for n points starting from the device designated by D . (except when the
same device is specified for S2 and D ) (Error code: 4101)
Program Example
(1) The following program performs an exclusive OR operation on the data stored at D100 to
D102 and the data stored at R0 to R2 when X20 is turned ON, and stores the operation
result into the area starting from D200.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0 b15 b8 b7 b0
D100 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 R0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
XOR
D101 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 R1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
D102 0 1 0 1 1 1 1 1 1 1 1 1 0 1 0 1 R2 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0
b15 b8b7 b0
D200 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1
D201 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D0 3
D202 0 1 0 1 0 0 0 0 0 0 0 0 0 1 0 1
7-26
WXNR(P),DXNR(P)
Basic High
performance Process Redundant Universal
2
4
indicates an instruction symbol of WXNR/DXNR.
Command
WXNR, DXNR S D 6
Command
P S D
WXNRP, DXNRP
6
S : Data for an exclusive NOR operation or head number of the devices where the data is stored (BIN 16/32 bits)
D : Head number of the devices where the exclusive NOR operation result will be stored (BIN 16/32 bits) 7
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
S –– 8
D –– ––
Function
b15 b8 b7 b0
D 1 0 1 0 0 1 0 1 0 1 0 1 0 0 0 0
(2) For bit devices, the bit devices after the points designated by digit specification are regarded as
"0" in the operation.
7-27
WXNR(P),DXNR(P)
DXNR
(1) Conducts an exclusive NOR operation on the 32-bit data of the device designated by D and
the 32-bit data of the device designated by S , and stores the results at the device
designated by D .
D +1 D
b31 b16 b15 b0
D 1 1 0 0 0 0 0 0 0 0 0 0 1 1
XNR
S +1 S
b31 b16 b15 b0
S 1 1 1 1 0 0 0 0 1 1 1 1 0 0
D +1 D
b31 b16 b15 b0
D 1 1 0 0 1 1 1 1 0 0 0 0 0 0
(2) For bit devices, the bit devices after the points designated by digit specification are regarded as
"0" in the operation.
Operation Error
(1) There are no operation errors associated with the WXNR(P) or DXNR(P) instruction.
Program Example
(1) The following program compares the bit patterns of the 16-bit data located from X30 to X3F
with the bit patterns of the 16-bit data at D99 when XC is ON, and stores the number of
identical bit patterns at D7.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
X3F X3CX3B X38X37 X34X33 X30
X3F to X30 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
XNR
b15 b8 b7 b0
D99 1 1 0 0 1 0 0 1 1 0 1 0 1 0 1 1
b15 b8 b7 b0
D99 0 1 1 0 0 0 1 1 0 0 0 0 0 0 0 1
D7 5
7-28
WXNR(P),DXNR(P)
(2) The following program compares the bit patterns of the 32-bit data located from X20 to X3F
with the bit patterns of the data at D16 and D17 when X6 is ON, and stores the number of
identical bit patterns at D18. 1
[Ladder Mode] [List Mode]
Step Instruction Device
2
[Operation]
S +1 S
4
X3F X3C X3B X38 X37 X34 X33 X30 X2F X2C X2B X28 X27 X24 X23 X20
X3F to X20 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D +1
XOR
D
6
b31 b16 b15 b0
D17,D16 1 1 0 0 1 0 0 1 0 1 1 0 1 1 0 0 0 0 1 1 1 1 0 0 1 0 0 1 1 0 1 1
6
D +1 D
b31 b16b15 b0
D17,D16 0 1 1 0 0 0 1 1 1 1 0 0 0 1 1 0 1 0 0 1 0 1 1 0 0 0 1 1 0 0 0 1
7
D18 15
8
Remark
See 7.5.2 for more information on the SUMP/DSUMP instructions.
7-29
WXNR(P),DXNR(P)
Command
WXNR, DXNR S1 S2 D
Command
WXNRP, DXNRP P S1 S2 D
S1 , S2 : Data for an exclusive NOR operation or head number of the devices where the data is stored (BIN 16/32 bits)
D : Head number of the devices where the exclusive NOR operation result will be stored (BIN 16/32 bits)
S1 ––
S2 ––
D –– ––
Function
WXNR
(1) Conducts an exclusive NOR operation on the 16-bit data of the device designated by S1 and
the 16-bit data of the device designated by S2 , and stores the results at the device
designated by D .
b15 b8 b7 b0
S1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
XNR
b15 b8 b7 b0
S2 0 0 1 1 1 1 0 0 0 0 1 1 0 0 1 1
b15 b8 b7 b0
D 0 0 1 1 0 0 1 1 0 0 1 1 1 1 0 0
(2) For bit devices, the bit devices after the points designated by digit specification are regarded as
"0" in the operation.
7-30
WXNR(P),DXNR(P)
DXNR
(1) Conducts an exclusive NOR operation on the 32-bit data of the device designated by and
1
S1
the 32-bit data of the device designated by S2 , and stores the results at the device
designated by D .
S1 + 1 S1 2
b31 b16 b15 b0
S1 0 0 1 1 0 0 1 1 1 1 0 0 1 1
S2 + 1
XNR
S2
3
b31 b16 b15 b0
S2 0 1 0 1 0 1 0 1 0 1 0 1 0 1
4
D +1 D
b31 b16 b15 b0
D 1 0 0 1 1 0 0 1 0 1 1 0 0 1 6
(2) For bit devices, the bit devices after the points designated by digit specification are regarded
as "0" in the operation. 6
Operation Error
7
(1) There are no operation errors associated with the WXNR(P) or DXNR(P) instructions.
8
Program Example
(1) The following program performs an exclusive NOR operation on the 16-bit data from X30 to
X3F and the data at D99 when X0 is turned ON, and stores the results to D7.
[Operation]
X3F X3CX3B X38X37 X34X33 X30
X3F to X30 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
XNR
b15 b8 b7 b0
D99 1 1 0 0 1 0 0 1 1 1 1 1 1 1 0 0
b15 b8 b7 b0
D7 0 1 1 0 0 0 1 1 0 1 0 1 0 1 1 0
7-31
WXNR(P),DXNR(P)
(2) The following program performs an exclusive NOR operation on the 32-bit data at D20 and
D21 and the data at D10 and D11 when X10 is turned ON, and stores the result to D40 and
D41.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
S +1 S
b31 b16 b15 b0
D21,D20 0 1 0 1 1 0 1 0 1 0 0 1 0 1
XNR
S +1 S
b31 b16 b15 b0
D11,D10 0 1 1 0 0 1 0 1 1 0 1 1 0 0
D +1 D
b31 b16 b15 b0
D41,D40 1 1 0 0 0 0 0 0 1 1 0 1 1 0
7-32
BKXNR(P)
3
Command
BKXNR BKXNR S1 S2 D n
Command 4
BKXNRP S1 S2 D n
BKXNRP
6
S1 *1 : Head number of the devices where data on which a logical operation will be conducted is stored (BIN 16 bits)
S2 *1 : Data for a logical operation or head number of the devices where the data for the logical operation is stored (BIN 16 bits)
D
n
*1 : Head number of the devices where the operation result will be stored (BIN 16 bits)
: Number of operation data blocks (BIN 16 bits)
6
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data K, H
S1 *1
Bit
––
Word Bit Word
–– ––
7
––
S2 *1 –– ––
––
D *1 ––
––
–– –– 8
n ––
*1: The same device number can be specified for S1 and D or S2 and D .
S1 + (n 2) 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 S2 +(n 2) 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0
S1 + (n 1) 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 S2 +(n 1) 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
b15 b8b7 b0
D 1111000011111111
D +1 0000000011111111
D +2 1010101001010101
n
D +(n 2) 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0
D +(n 1) 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1
7-33
BKXNR(P)
(2) The constant designated by S2 can be between 32768 and 32767 (BIN 16-bit data).
b15 b8b7 b0
S1 0000111111111111
S1 + 1 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0
S1 + 2 1 1 0 0 1 1 0 0 0 0 1 1 0 0 1 1 b15 b8b7 b0
n XNR S2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0
S1 +(n 2) 1100110011001100
S1 +(n 1) 0000111111110000
b15 b8 b7 b0
D 0000000011110000
D +1 0000000011111111
D +2 1100001100111100
n
D +(n 2) 1100001111000011
D +(n 1) 0000000011111111
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The n-bit range from the S1 , S2 , or D device exceeds the range of that device.
(Error code: 4101)
• The device range for n points starting from the device designated by S1 overlaps with the
device range for n points starting from the device designated by D . (except when the same
device is specified for S1 and D ) (Error code: 4101)
• The device range for n points starting from the device designated by S2 overlaps with the
device range for n points starting from the device designated by D . (except when the same
device is specified for S2 and D ) (Error code: 4101)
Program Example
(1) The following program performs an exclusive NOR operation on the data stored at D100 to
D102 and the data stored at R0 to R2 when X20 is turned ON, and stores the operation
result into the area starting from D200.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0 b15 b8 b7 b0
D100 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 R0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
XNR
D101 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 R1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1
D102 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 R2 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
b15 b8 b7 b0
D200 1 0 1 0 1 0 1 0 0 1 0 1 0 1 0 1
D201 1 0 1 0 1 0 1 0 1 0 1 0 0 1 0 1 D0 3
D202 0 1 0 1 0 1 0 1 1 0 1 0 1 0 1 0
7-34
ROR(P),RCR(P)
4
indicates an instruction symbol of ROR/RCR.
Command
ROR, RCR D n 6
Command
P D n
RORP, RCRP
6
D : Head number of the devices to rotate (BIN 16 bits)
n : Number of rotations (0 to 15) (BIN 16 bits)
7
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
D –– ––
8
n ––
Function
Carry flag
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 (SM700)
D
Value of b(n-1)
Value of b(n-1)
7-35
ROR(P),RCR(P)
(2) When a bit device is designated for D , a rotation is performed within the device range
specified by digit specification.
The number of bits by which a rotation is carried out is the remainder of n/(specified number
of bits).
For example, when n 15 and (specified number of bits) 12 bits, the remainder of 15/12
1 is "3", and the data is rotated 3 bits.
(3) Specify any of 0 to 15 as n.
If the value specified as n is 16 or greater, the remainder of n / 16 is used for rotation.
For example, when n 18, the contents are rotated two bits to the right since the remainder
of 18 / 16 1 is "2".
RCR
(1) Rotates 16-bit data of the device designated by D , including the carry flag, n-bits to the
right.
The carry flag is ON or OFF depending on the status prior to the execution of the ROR
instruction.
Carry flag
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 (SM700)
D 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0
Carry flag
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 (SM700)
D 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
Carry flag
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 (SM700)
D
Value of b(n-1)
(2) When a bit device is designated for D , a rotation is performed within the device range
specified by digit specification.
The number of bits by which a rotation is executed is the remainder of n/(specified number of
bits).
For example, when n 15 and (specified number of bits) 12 bits, the remainder of 15/12
1 is "3", and the data is rotated 3 bits.
(3) Specify any of 0 to 15 as n.
If the value specified as n is 16 or greater, the remainder of n / 16 is used for rotation.
For example, when n 18, the contents are rotated two bits to the right since the remainder
of 18 / 16 1 is "2".
7-36
ROR(P),RCR(P)
Operation Error
1
(1) There are no operation errors associated with the ROR(P) or RCR(P) instructions.
2
Program Example
(1) The following program rotates the contents of D0, not including the carry flag, 3 bits to the
right when XC is turned ON.
3
[Ladder Mode] [List Mode]
Step Instruction Device 4
6
[Operation]
Carry flag
b15 b14 b13 b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 (SM700) 6
D0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0
Carry flag
b15 b14 b13b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
D0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1
(SM700)
1
7
Contents of b2 to b0 Contents of b15 to b4
before execution before execution Content of b3 Content of b2
before execution before execution 8
(2) The following program rotates the contents of D0, including the carry flag, 3 bits to the right
when XC is turned ON.
[Ladder Mode] [List Mode]
[Operation]
Carry flag
b15 b14 b13 b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 (SM700)
D0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 *
Carry flag
b15 b14 b13 b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 (SM700)
D0 1 1 * 0 0 0 0 0 0 0 0 0 0 0 0 1 1
7-37
ROL(P),RCL(P)
Basic High
performance Process Redundant Universal
Command
ROL, RCL D n
Command
P D n
ROLP, RCLP
D –– ––
n ––
Function
ROL
(1) Rotates the 16-bit data of the device designated at D , not including the carry flag, n-bits to
the left.
The carry flag turns ON or OFF depending on its status prior to the execution of ROL instruction.
Carry flag
(SM700) b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 D
Carry flag
(SM700) b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 D
Carry flag
(SM700) b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
D
Value of b(16-n)
Value of b(16-n)
7-38
ROL(P),RCL(P)
(2) When a bit device is designated for D , a rotation is performed within the device range
specified by digit specification.
1
The number of bits by which a rotation is executed is the remainder of n/(specified number of
bits).
For example, when n 15 and (specified number of bits) 12 bits, the remainder of 15/12
2
1 is "3", and the data is rotated 3 bits.
(3) Specify any of 0 to 15 as n.
If the value specified as n is 16 or greater, the remainder of n / 16 is used for rotation. 3
For example, when n 18, the data is rotated 2 bits to the left since the remainder of 18/16
1 is "2".
4
RCL
(1) Rotates the 16-bit data of the device designated by , including the carry flag, n-bits to the
6
D
left.
The carry flag turns ON or OFF depending on its status prior to the execution of RCL
instruction.
Carry flag 6
(SM700) b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 D
Carry flag
(SM700) b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Carry flag
(SM700) b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
D
Value of b(16-n)
(2) When a bit device is designated for D , a rotation is performed within the device range
specified by digit specification.
The number of bits by which a rotation is executed is the remainder of n/(specified number of
bits).
For example, when n 15 and (specified number of bits) 12 bits, the remainder of 15/12
1 is "3", and the data is rotated 3 bits.
(3) Specify any of 0 to 15 as n.
If the value specified as n is 16 or greater, the remainder of n / 16 is used for rotation.
For example, when n 18, the data is rotated 2 bits to the left since the remainder of 18/16
1 is "2".
7-39
ROL(P),RCL(P)
Operation Error
(1) There are no operation errors associated with the ROL(P) or RCL(P) instructions.
Program Example
(1) The following program rotates the contents of D0, not including the carry flag, 3 bits to the
left when XC is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Carry flag
(SM700) b15 b14 b13 b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
0 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 D0
Carry flag
(SM700) b15 b14 b13 b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 D0
(2) The following program rotates the contents of D0, including the carry flag, 3 bits to the left
when XC is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Carry flag
(SM700) b15 b14 b13 b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
* 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 D0
Carry flag
(SM700) b15 b14 b13 b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
1 1 0 0 0 0 0 0 0 0 0 0 0 0 * 1 1 D0
* ON/OFF status of the carry flag depends on its status before the execution of RCL.
7-40
DROR(P),DRCR(P)
D –– ––
7
n ––
8
Function
DROR
n-bit rotation
(2) When a bit device is designated for D , a rotation is performed within the device range
specified by digit specification.
The number of bits by which a rotation is executed is the remainder of n/(specified number of
bits).
For example, when n 31 and (specified number of bits) 24 bits, the remainder of 31/24
1 is "7", and the data is rotated 7 bits.
(3) Specify any of 0 to 31 as n.
If the value specified as n is 32 or greater, the remainder of n / 32 is used for rotation.
For example, when n 34, the contents are rotated two bits to the right since the remainder
of 34 / 32 1 is "2".
7-41
DROR(P),DRCR(P)
DRCR
(1) Rotates 32-bit data, including carry flag, at device designated by D n bits to the right.
The carry flag goes ON or OFF depending on its status prior to the execution of the DRCR
instruction.
D +1 D Carry flag
b31 b30 b29 b28 b27 b18 b17 b16 b15b14 b5 b4 b3 b2 b1 b0 (SM700)
n-bit rotation
(2) When a bit device is designated for D , a rotation is performed within the device range
specified by digit specification. The number of bits by which a rotation is executed is the
remainder of n /(specified number of bits).
For example, when n 31 and (specified number of bits) 24 bits, the remainder of 31/24
1 is "7", and the data is rotated 7 bits.
(3) Specify any of 0 to 31 as n. If the value specified as n is 32 or greater, the remainder of n /
32 is used for rotation. For example, when n 34, the contents are rotated two bits to the
right since the remainder of 34 / 32 1 is "2".
Operation Error
(1) There are no operation errors associated with the DROR(P) or DRCR(P) instruction.
Program Example
(1) The following program rotates the contents of D0 and D1, not including the carry flag, 4 bits
to the right when XC is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Carry flag
b31 b28 b27 b24 b23 b20 b19 b16 b15 b12 b11 b8 b7 b4 b3 b0 (SM700)
D0, D1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0
Carry flag
b31 b28 b27 b24b23 b20b19 b16 b15 b12 b11 b8 b7 b4 b3 b0 (SM700)
D0, D1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1
7-42
DROR(P),DRCR(P)
(2) The following program rotates the contents of D0 and D1, including the carry flag, 4 bits to
the right when XC is ON.
[Ladder Mode] [List Mode]
1
Step Instruction Device
[Operation] 3
Carry flag
b31 b28b27 b24b23 b20b19 b16b15 b12b11 b8b7 b4b3 b0 (SM700)
D0, D1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 * 4
Carry flag
b31 b28b27 b24b23 b20b19 b16b15 b12b11 b8b7 b4b3 b0 (SM700)
D0, D1 1 1 1 * 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1
6
Before execution
Contents of b2 to b0 Content of b3
before execution Content of carry flag before execution
SM700 before execution
6
* : ON/OFF status of the carry flag depends on its status before the execution of DRCR.
7-43
DROL(P),DRCL(P)
Basic High
performance Process Redundant Universal
Command
DROL, DRCL D n
Command
P D n
DROLP, DRCLP
D –– ––
n ––
Function
DROL
(1) The 32-bit data of the device designated at D , not including the carry flag, is rotated n-bits
to the left. The carry flag turns ON or OFF depending on its status prior to the execution of
the DROL instruction.
D +1 D
Carry flag
(SM700) b31 b30 b29 b28 b27 b18 b17 b16 b15b14 b5 b4 b3 b2 b1 b0
n-bit rotation
(2) When a bit device is designated for D , a rotation is performed within the device range
specified by digit specification. The number of bits by which a rotation is executed is the
remainder of n /(specified number of bits).
For example, when n 31 and (specified number of bits) 24 bits, the remainder of 31/24
1 is "7", and the data is rotated 7 bits.
(3) Specify any of 0 to 31 as n. If the value specified as n is 32 or greater, the remainder of n/32
is used for rotation. For example, when n 34, the data is rotated 2 bits to the left since the
remainder of 34/32 1 is "2".
DRCL
(1) Rotates 32-bit data of the device designated by D , including the carry flag, n-bits to the left.
The carry flag turns ON or OFF depending on its status prior to the execution of the DRCL
instruction.
D +1 D
Carry flag
(SM700) b31 b30 b29 b28b27 b18 b17 b16 b15b14 b5 b4 b3 b2 b1 b0
n-bit rotation
7-44
DROL(P),DRCL(P)
(2) When a bit device is designated for D , a rotation is performed within the device range
specified by digit specification. The number of bits by which a rotation is executed is the
remainder of n /(specified number of bits).
1
For example, when n 31 and (specified number of bits) 24 bits, the remainder of 31/24
1 is "7", and the data is rotated 7 bits.
2
(3) Specify any of 0 to 31 as n. If the value specified as n is 32 or greater, the remainder of n/32
is used for rotation. For example, when n 34, the data is rotated 2 bits to the left since the
remainder of 34/32 1 is "2".
3
Operation Error
4
(1) There are no operation errors associated with the DROL(P) or DRCL(P) instructions.
Program Example 6
(1) The following program rotates the contents of D0 and D1, not including the carry flag, 4 bits
to the left when XC is ON. 6
[Ladder Mode] [List Mode]
Step Instruction Device
7
8
[Operation]
Carry flag
(SM700) b31 b28b27 b24b23 b20 b19 b16 b15 b12 b11 b8 b7 b4 b3 b0
0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D0, D1
(2) The following program rotates the contents of D0 and D1, including the carry flag, 4 bits to
the left when XC is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Carry flag
(SM700) b31 b28b27 b24b23 b20 b19 b16 b15 b12 b11 b8 b7 b4 b3 b0
* 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 D0, D1
Carry flag
(SM700) b31 b28b27 b24b23 b20 b19 b16 b15 b12 b11 b8 b7 b4 b3 b0
1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 * 1 1 1 D0, D1
7-45
SFR(P),SFL(P)
Basic High
performance Process Redundant Universal
Command
SFR, SFL D n
Command
P D n
SFRP, SFLP
D : Head number of the devices where shift data is stored (BIN 16 bits)
n : Number of shifts (0 to 15) (BIN 16 bits)
D –– ––
n ––
Function
SFR
(1) Causes a shift to the right by n bits of the 16-bit data from the device designated at D .
The n bits from the upper bit are filled with 0s.
b15 b14 b13 b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
D 1 1 1 0 1 1 1 0 1 1 1 0 1 1 1 0
When n=6:
Carry flag
b15 b14 b13 b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 (SM700)
D 0 0 0 0 0 0 1 1 1 0 1 1 1 0 1 1 1
(2) When a bit device is designated for D , a right shift is executed within the device range
specified by digit specification.
Y1B Y18 Y17 Y14 Y13 Y10
1 0 1 0 1 0 1 0 1 0 1 0
When n = 4:
Carry flag
Y1B Y18 Y17 Y14 Y13 Y10 (SM700)
0 0 0 0 1 0 1 0 1 0 1 0 1
7-46
SFR(P),SFL(P)
The number of bits by which a shift is executed is the remainder of n/(specified number of
bits).
For example, when n 15 and (specified number of bits) 8 bits, the remainder of 15/8 1
1 is "7", and the data is shifted 7 bits.
(3) Specify any of 0 to 15 as n. If the value specified as n is 16 or greater, the remainder of n/16
is used for a shift to the right. 2
For example, when n 18, the data is shifted 2 bits to the right since the remainder of 18/16
1 is 2.
SFL
3
(1) Shifts 16-bit data at device designated by D n bits to the left.
Bits starting from the lowest bit to n bit are filled with 0s. 4
b15 b14 b13 b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
1 1 1 1 0 0 1 1 0 0 0 0 1 1 1 1 D
6
When n=8:
Carry flag
(SM700) b15 b14 b13 b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 D 6
Filled with 0s.
(2) When a bit device is designated for D , a left shift is executed within the device range specified 7
by digit specification.
X17 X14 X13 X10
0 0 1 1 0 0 1 1 8
Carry flag
(SM700) X17 X14 X13 X12 X10
1 1 0 0 1 1 0 0 0
The number of bits by which a shift is executed is the remainder of n/(specified number of
bits). For example, when n 15 and (specified number of bits) 8 bits, the remainder of
15/8 1 is "7", and the data is shifted 7 bits.
(3) Specify any of 0 to 15 as n. If the value specified as n is 16 or greater, the remainder of n/16
is used for a shift to the left.
For example, when n 18, the data is shifted 2 bits to the left since the remainder of 18/16
1 is "2".
Operation Error
(1) There are no operation errors associated with the SFR(P) or SFL(P) instructions.
7-47
SFR(P),SFL(P)
Program Example
(1) The following program shifts the data of D0 to the right by the number of bits designated by
D100 when X20 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b14 b13b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
D0 1 0 1 0 0 1 1 1 0 0 1 0 1 0 0 0
D100 3
Carry flag
b15 b14 b13b12 b11b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 (SM700)
D0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 0
(2) The following program shifts the contents of X10 to X17 3 bits to the left when X1C is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
X17 X14 X13 X10
0 0 1 1 0 0 1 1
Carry flag
(SM700) X17 X14 X13 X12 X10
1 1 0 0 1 1 0 0 0
7-48
BSFR(P),BSFL(P)
D –– ––
7
n ––
8
Function
BSFR
Carry flag
D +(n-1) D +(n-2) D +(n-3) D +2 D +1 D (SM700)
0 1 1 0 1 1 0
Filled with 0
(1) Shifts the data in n points from the device designated by D to the left by one bit.
D +(n-1) D +(n-2) D +(n-3) D +2 D +1 D
1 1 0 0 1 1
Carry flag
(SM700) D +(n-1) D +(n-2) D +(n-3) D +2 D +1 D
1 1 0 0 1 1 0
Filled with 0
7-49
BSFR(P),BSFL(P)
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The range of the device n points from a device designated by D , or exceeds the
relevant device. (Error code: 4101)
Program Example
(1) The following program shifts the data at M668 to M676 to the right when X8F is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Designation range for the
BSFRP instruction
M678M677M676M675M674M673M672M671M670M669M668M667
1 1 1 0 1 0 1 1 0 0 1 1
Carry flag
M678M677M676M675M674M673M672M671M670M669M668M667 (SM700)
1 1 0 1 0 1 0 1 1 0 0 1 1
(2) The following program shifts the data at Y60 to Y6F to the left when X4 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Y6FY6EY6DY6CY6BY6AY69Y68Y67Y66Y65Y64Y63Y62Y61Y60
1 0 0 1 1 0 0 0 0 1 0 1 0 1 1 1
Carry flag
(SM700) Y6FY6EY6DY6CY6BY6AY69Y68Y67Y66Y65Y64Y63Y62Y61Y60
1 0 0 1 1 0 0 0 0 1 0 1 0 1 1 1 0
Filled with 0
7-50
SFTBR(P),SFTBL(P)
3
indicates an instruction symbol of SFTBR/SFTBL.
Command 4
SFTBR,SFTBL D n1 n2
Command
SFTBRP,SFTBLP P D n1 n2 6
n1 –– ––
n2 –– –– 8
*1 : T, C, ST, and S devices are not available.
Function
(1) This instruction shifts the n1 bits data in the devices starting from the device specified by D
to the right by n2 bits.
n1=10, n2=4
n2
n1
D +9 D +8 D +7 D +6 D +5 D +4 D +3 D +2 D +1 D
0 1 1 1 1 0 0
Carry flag
D +9 D +8 D +7 D +6 D +5 D +4 D +3 D +2 D +1 D (SM700)
0 0 0 0 1 1 1 0 1 1
Filled with 0s
(2) n1 and n2 are specified under the condition that n1 is larger than n2. If the value of n2 is
equal to or larger than the value of n1, the remainder of n2 / n1 (n2 devided by n1) is used
for a shift.
(3) This instruction specifies n1 ranged from 1 to 64.
(4) Bits starting from the highest bit to n2th bit are filled with 0s. If the value of n2 is larger than
the value of n1, the remainder of n2 / n1 will be 0.
(5) If the value specified by n1 or n2 is 0, the instruction will be not processed.
7-51
SFTBR(P),SFTBL(P)
SFTBL(P)
(1) This instruction shifts the n1 bits data in the devices starting from the device specified by D
to the left by n2 bits.
n1=10, n2=4
n2
n1
D +8 D +7 D +6 D +5 D +4 D +3 D +2 D +1 D
1 1 0 1 1 1 1 0 1
Carry flag
(SM700) D +8 D +7 D +6 D +5 D +4 D +3 D +2 D +1 D
1 1 1 1 0 1 0 0 0 0
Filled with 0s
(2) n1 and n2 are specified under the condition that n1 is larger than n2. If the value of n2 is
equal to or larger than the value of n1, the remainder of n2 / n1 (n2 devided by n1) is used
for a shift.
However, if the remainder of n2 / n1 is 0, the instruction will be not processed.
(3) This instruction specifies n1 ranged from 1 to 64.
(4) Bits starting from the lowest bit to n2th bit are filled with 0s. If the value of n2 is larger than
the value of n1, the remainder of n2 / n1 will be 0.
(5) If the value specified by n1 or n2 is 0, the instruction will be not processed.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
• The value specified by n1 is other than 0 to 64. (Error code: 4100)
• The value data specified by n2 is negative. (Error code: 4100)
7-52
SFTBR(P),SFTBL(P)
Program Example
1
(1) The following program shifts the data of Y10 to Y17 (8 bits) specified by D to the right by 2
bits (n2), when M0 is turned on.
[Ladder Mode] [List Mode]
2
Step Instruction Device
[Operation]
4
Y17 Y16 Y15 Y14 Y13 Y12 Y11 Y10
1 0 1 1 1 0 0 1
6
Carry flag
Y17
0
Y16
0
Y15
1
Y14
0
Y13
1
Y12
1
Y11
1
Y10
0
(SM700)
0
6
(2) The following program shifts the data of Y21 to Y2C (12 bits) specified by to the left by 5
bits (n2), when M0 is turned on.
D
7
[Ladder Mode] [List Mode]
Step Instruction Device
8
[Operation]
Carry flag
(SM700)
0 Y2C Y2B Y2A Y29 Y28 Y27 Y26 Y25 Y24 Y23 Y22 Y21
1 0 1 1 0 0 1 0 0 0 0 0
7-53
DSFR(P),DSFL(P)
Basic High
performance Process Redundant Universal
Command
DSFR, DSFL D n
Command
P D n
DSFRP, DSFLP
D –– –– ––
n ––
Function
DSFR
(1) Shifts data n points from device designated by D 1-word to the right.
n
D +(n-1) D +(n-2) D +(n-3) D +2 D +1 D
555 212 325 100 50 40
Filled with 0.
(1) Shifts data n points from device designated by D 1-word to the left.
n
D +(n-1) D +(n-2) D +(n-3) D +2 D +1 D
555 120 325 100 50 40
D +(n-1) D +(n-2) D +3 D +2 D +1 D
125 325 100 50 40 0
Filled with 0.
7-54
DSFR(P),DSFL(P)
Operation Error
1
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The range of the device n points from a device designated by D , or exceeds the
2
relevant device. (Error code: 4101)
3
Program Example
(1) The following program shifts the contents of D683 to D689 to the right when XB is turned
ON.
4
[Ladder Mode] [List Mode]
Step Instruction Device 6
6
[Operation]
Designation range for the DSFRP instruction
D689 D688 D687 D686 D685 D684 D683 7
-100 503 600 -336 3802 -32765 5003
Filled with 0.
(2) The following program shifts the contents of D683 to D689 to the left when XB is turned ON.
[Operation]
Designation range for the DSFLP instruction
D689 D688 D687 D686 D685 D684 D683
-100 503 600 -336 3802 -32765 5003
Filled with 0.
7-55
SFTWR(P),SFTWL(P)
Ver.
High
Basic performance Process Redundant Universal
Command
P D n1 n2
SFTWRP,SFTWLP
D –– –– ––
n1 –– ––
n2 –– ––
Function
SFTWR(P)
(1) This instruction shifts n1 words data in the devices starting from the device specified by D to
the right by n2 words.
n1=9, n2=4
n2
n1
D +8 D +7 D +6 D +5 D +4 D +3 D +2 D +1 D
30FH 1EH 100H 0H 1FFH 10 H 1FH 7FFH 2A H
D +8 D +7 D +6 D +5 D +4 D +3 D +2 D +1 D
0H 0H 0H 0H 30FH 1EH 100H 0H 1FFH
Filled with 0H
(2) The n2 words data in the devices starting from the highest device are filled with 0s.
(3) If the value specified by n1 or n2 is 0, the instruction will be not processed.
(4) If the value of n2 is equal to or larger than the value of n1, the n1 words data in the devices
starting from the device specified by D will be filled with 0s.
7-56
SFTWR(P),SFTWL(P)
SFTWL(P)
(1) This instruction shifts the n1 words data in the devices starting from the device specified by 1
D to the left by n2 words.
n1=9, n2=4
n2
2
n1
D +8 D +7 D +6 D +5 D +4 D +3 D +2 D +1 D
1FFH 10H 0H 7FFH 3AH 1F H 30 H 0H FFH
3
D +8 D +7 D +6 D +5 D +4 D +3 D +2 D +1 D 4
3AH 1F H 30 H 0H FFH 0H 0H 0H 0H
Filled with 0H
6
(2) The n2 words in the devices starting from the lowest device are filled with 0s.
(3) If the value specified by n1 or n2 is 0, the instruction will be not processed.
(4) If the value of n2 is equal to or greater than the value of n1, the n1 words devices starting 6
from the device specified by D will be filled with 0s.
7
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
8
• n1 or n2 is negative value. (Error code: 4100)
[Operation]
7-57
SFTWR(P),SFTWL(P)
(2) The following program shifts the 12 words (n1) data in the devices starting from D21
specified by D to the left by 5 words (n2), when M0 is turned on.
[Ladder Mode] [List Mode]
[Operation]
D2C D2B D2A D29 D28 D27 D26 D25 D24 D23 D22 D21
FFH EH 5H 0H 2AH FFH 3AH 1H 0H 0H 10 H 7FFH
× × × × × D2C D2B D2A D29 D28 D27 D26 D25 D24 D23 D22 D21
FFH 3AH 1H 0H 0H 10 H 7FFH 0H 0H 0H 0H 0H Filled with 0H
7-58
BSET(P),BRST(P)
4
indicates an instruction symbol of BSET/BRST.
Command
BSET, BRST D n
6
Command
P D n
BSETP, BRSTP
6
D : Number of the device whose bits are set/reset (BIN 16 bits)
n : Number of the bit to be set/reset (0 to 15) (BIN 16 bits)
7
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
D –– ––
8
n ––
Function
BSETP D10 K6
b15 b6 b1b0
Before execution D10 1 1 0 0 1 0 1 1 0 0 1 1 1 0 1 1
b15 b6 b1b0
After execution D10 1 1 0 0 1 0 1 1 0 1 1 1 1 0 1 1
1 is set
BRST
0 is set.
7-59
BSET(P),BRST(P)
Operation Error
(1) There are no operation errors associated with the BSET(P) or BRST(P) instructions.
Program Example
(1) The following program resets the 8th bit of D8 (b8) to 0 when XB is OFF, and sets the 3rd bit
of D8 (b3) to 1 when XB is ON.
[Ladder Mode]
Resets b8 of D8.
Sets b3 of D8.
[List Mode]
Step Instruction Device
[Operation]
b15 b8 b3 b0
Before execution D8 0 0 1 1 0 1 0 1 1 1 1 1 0 0 0 1
When XB turns OFF. When XB turns ON.
b15 b8 b3 b0
After execution D8 0 0 1 1 0 1 0 0 1 1 1 1 1 0 0 1
Remark
Bit set or reset of word devices can also be conducted by bit designation of word
devices.
• For the bit specification for word devices, link direct devices, refer to the
QnUCPU User’fs Manual(Function Explanation, Program Fundamentals) or
Qn(H)/QnPH/QnPRHCPU User’s Manuall(Function Explanation, Program
Fundamentals)
The processing of program example (1) would be conducted as shown below if bit
designation of a word device had been used:
XB
RST D8.8 Resets b8 of D8.
Designation of b8 of D8
XB
SET D8.3 Sets b3 of D8.
Designation of b3 of D8
7-60
TEST(P),DTEST(P)
3
indicates an instruction symbol of TEST/DTEST.
Command
TEST, DTEST S1 S2 D
4
Command
TESTP, DTESTP P S1 S2 D
6
S1 : Number of the device where bit data to be extracted is stored (BIN 16 bits)
S2 : Location of the bit data to be extracted (0 to 15 (TEST)/0 to 31 (DTEST)) (BIN 16/32 bits) 6
D : Number of the bit device where the extracted data will be stored (bits)
S2 ––
D –– –– ––
8
Function
(1) Fetches bit data at the location designated by S2 within the word device designated by S1 ,
and writes it to the bit device designated by D .
(2) The bit device designated by D is OFF when the relevant bit is "0" and ON when it is "1".
(3) The position designated by S2 indicates the position of an individual bit in a 1-word data
block (0 to 15). When 16 or more is designated at S2 , the target is the bit data at the position
indicated by the remainder of n / 16. For example, when n 18, the target is the data at b2
since the remainder of 18 / 16 1 is "2".
S2 bit (When S2 =5)
b15 b5 b0
S1 D
DTEST
(1) Fetches bit data at the location designated by S2 within the 2-word device designated by S1 ,
or S1 +1, and writes it to the bit device designated by D .
(2) The bit device designated by D is OFF when the relevant bit is "0" and ON when it is "1".
7-61
TEST(P),DTEST(P)
(3) The position designated by S2 indicates the position of an individual bit in a 2-word data
block (0 to 31). When 32 or more is designated at S2 , the target is the bit data at the position
indicated by the remainder of n / 32. For example, when n 34, the target is the data at b2
since the remainder of 34 / 32 1 is "2".
S2 bit (When S2 =21)
D
S1 +1 S1
Operation Error
(1) There are no operation errors associated with the TEST(P) or DTEST(P) instructions.
Program Example
(1) The following program turns M0 ON or OFF based on the status of the 10th bit in the 1-word
data block (D0).
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b10 b0
D0 1 0 1 1 0 0 1 1 0 1 1 0 1 0 1 0
7-62
TEST(P),DTEST(P)
(2) The following program turns Y40 ON or OFF, depending on the status of the 19th bit of the
2-word data (W0 and W1).
[Ladder Mode] [List Mode]
1
Step Instruction Device
[Operation]
3
b31 b19 b16 b15 b0
10 1 10 0 10 10 1 100 00 10 1 10 1 1 10 1 1 10 110
7-63
BKRST(P)
Basic High
performance Process Redundant Universal
Command
BKRST BKRST D n
Command
BKRSTP D n
BKRSTP
D –– ––
n ––
Function
(1) Resets bit device n-points from the bit device designated by D .
Device Status
(2) If the designated device is OFF, the device status will not change.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The n-bit range from the D , or device exceeds the range of that device.
(Error code: 4101)
7-64
BKRST(P)
Program Example
1
(1) The following program turns OFF devices from M0 to M7 when X0 is turned ON.
[Ladder Mode] [List Mode]
2
Step Instruction Device
3
[Operation]
M9M8M7 M4 M3 M0 M9 M8M7 M4M3 M0 4
1 1100 11100 1100000000
Not changed
(2) The following program sets data from 2nd bit (b2) of D10 to 1st bit (b1) of D11 to 0 when X20
6
is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
6
7
[Operation]
b15 b8 b7 b2 b1 b0 b15 b8b7 b2 b1b0 8
D10 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 0 D10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0
7-65
SER(P),DSER(P)
Basic High
performance Process Redundant Universal
Command
SER, DSER S1 S2 D n
Command
SERP, DSERP P S1 S2 D n
S1 : Search data or head number of the devices where the search data is stored (BIN 16/32 bits)
S2 : Data to be searched or head number of the devices where the data to be searched is stored (BIN 16 bits)
D : Head number of the devices where the search result will be stored (BIN 16 bits)
n : Number of searches (BIN 16 bits)
S1 ––
S2 –– –– –– –– ––
D –– –– –– ––
n ––
Function
SER
(1) Searches n points from the 16-bit data of the device designated by S2 , regarding 16-bit data
of the device designated by S1 as a keyword. Then, the number of matches with the
keyword is stored at the device designated by D +1, and the first matched device number (in
the relative number from S2 ) is stored at the device designated by D .
Head number to be
Search data searched
S1 123 123
S2 10
S2 +1 500 Match data Search results
S2 +2 123 Search range D 3 Position of match
Relative value (n points) D +1 2 Number of matches
-123
S2 +(n-2) 20
S2 +(n-1) 123
123
(3) If no matches are found in the search, the devices designated at D and D +1 become "0".
7-66
SER(P),DSER(P)
DSER
(1) Searches n points from the device designated by S2 in 32-bit units (2 n points in 16-bit 1
units.) regarding 32-bit data of the device designated by S1 +1 and S1 as a keyword. Then,
the number of matches with the keyword is stored at the device designated by +1, and the
first matched device number (in the relative number from S2
D
Search data
Head number to be
searched
3
S1 +1. S1 5678901 5678901
S2 +1, S2 5678901 Match data
S2 +3, S2 +2 123456
Search range D
Search results
4
S2 +5, S2 -1 1 Position of match
(2 n points) D +1 2 Number of matches
Relative value
S2 +(n-3), S2 +(n-4) 5678901
S2 +(n-1), S2 +(n-2) 0 6
5678901
7
If the data to be searched using the SER/DSER instruction is sorted in the
ascending order, searches can be accelerated by the use of the binary search
8
method, which is activated by turning SM702 *1 ON. However, correct searche
results are not obtained if SM702 is turned ON when the data to be searched is
not sorted in the ascending order.
Search order
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The location n-points from the device S2 exceeds the designated device range.
(Error code: 4101)
• The device specified by D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
7-67
SER(P),DSER(P)
Program Example
(1) The following program searches D100 to D105 for the contents of D0 when X20 is ON, and
stores the search results at W0 and W1.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Search data Data to be searched
D0 123 D100 500
D101 123 Search results
D102 300 W0 2 Position of match
D103 123 W1 2 Number of matches
D104 32000
D105 122
(2) The following program searches D100 to D111 for the contents of D11 and D10 when X20 is
ON, and stores the search results at W0 and W1.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Search data Data to be searched
D11, D10 56789051 D101, D100 200000
D103, D102 56789051 Search results
D105, D104 56789051 W0 2 Position of match
D107, D106 -30000 W1 3 Number of matches
D109, D108 56789051
D111, D110 30000
7-68
SUM(P),DSUM(P)
S –– 7
D –– ––
8
Function
SUM
DSUM
From the 32-bit data in the device designated by S , stores the total number of bits where 1
is set, in the device designated by D .
S +1 S
b31 b16b15 b0
100 1110 0 10 10 0 1 110 00 100 0 0 111 10 1 10
7-69
SUM(P),DSUM(P)
Operation Error
(1) There are no operation errors associated with the SUM(P) or DSUM(P) instructions.
Program Example
(1) The following program stores the number of bits which are ON from X8 to X17 into D0 when
X10 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
X17 X8
0 0 10 10 1 100 00 0 1 11
D0 7
(2) The following program stores the number of bits which are ON in D100 and D101 into D0
when X10 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b31 b16 b15 b0
D100, D101 0 1 0 1 0 0 0 0 1 1 1 1 0 0 0 1 0 0 1 1 1 1 0 0 0 0 1 1 0 0 1 1
D0 15
7-70
DECO(P)
3
Command
DECO S D n
DECO
Command 4
DECOP S D n
DECOP
6
S : Data to be decoded or the number of the device where the data to be decoded is stored (BIN 16 bits)
D : Head number of the devices where the decoding result will be stored (Device name)
n : Valid bit length (1 to 8), 0: No processing (BIN 16 bits)
6
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
S ––
7
D –– –– ––
n ––
8
Function
(1) Turns ON the bit position of , which corresponds to the binary value designated by the
lower n bits at S .
n=3
S 1 1 0 (Binary value = 6)
7 6 5 4 3 2 1 0
D 0 1 0 0 0 0 0 0
ON
(3) No processing is conducted if n 0, and there are no changes in the bits 2n from the device
designated at D .
(4) Bit devices are treated as 1 bit, and word devices as 16 bits.
7-71
DECO(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of n is not in the 0 to 8 range. (Error code: 4100)
• The range 2n bits from D exceeds the range of the relevant device.
(Error code: 4101)
Program Example
(1) The following program decodes the 3 bits from X0 and stores the results at M10 when X20 is
ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
X2 X1 X0
0 1 1 0 When 6 is designated at X0 to X2
M17 M10
0 0 0 0 0 1 0 0 0 0 0 0 Decoding result
7-72
ENCO(P)
3
Command
ENCO S D n
ENCO
Command 4
ENCOP S D n
ENCOP
6
S : Head number of the device where the data to be encoded is stored (Device name)
D : Number of the device where the encoding result will be stored (BIN 16 bits)
n : Valid bit length (1 to 8), 0: No processing (BIN 16 bits)
–– –– ––
7
S
D –– ––
n ––
8
Function
(1) Stores the binary value corresponding to the bits which are "1" included in the 2n-bit data of
D 1 1 0 (Binary value = 6)
(3) If n 0, there will be no operation, and the contents of D will not change.
(4) Bit devices are treated as 1 bit, and word devices as 16 bits.
(5) If more than 1 bit is at 1, processing will be conducted at the upper bit location.
7-73
ENCO(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of n is not in the 0 to 8 range. (Error code: 4100)
• The range 2n bits from S exceeds the range of the relevant device.
(Error code: 4101)
Program Example
(1) The following program encodes the 3 bits from M10 when X20 is ON, and stores the results
at D8.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
M17 M10
0 0 0 0 0 0 0 0 1 0 0 0
Storage device D8
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 Encoding result
7-74
SEG(P)
3
Command
SEG S D
SEG
Command
S D
4
SEGP SEGP
S : Data to be decoded or head number of the devices where the data to be decoded is stored (BIN 16 bits)
6
D : Head number of the devices where the decoding result will be stored (BIN 16 bits)
Setting
Data
Internal Devices
R, ZR
J \
U \G Zn
Constants
K, H
Other 6
Bit Word Bit Word
S ––
D –– –– 7
Function 8
(1) Decodes the data from 0 to F designated by the lower 4 bits of S to 7-segment display data,
and stores at D .
8 points
D8
b15 b8b7 b0
Word device SEG K7 D8 0 00000000 0 100 111
Operation Error
(1) There are no operation errors associated with the SEG(P) instruction.
7-75
SEG(P)
0 0000 0 0 1 1 1 1 1 1
1 0001 0 0 0 0 0 1 1 0
2 0010 0 1 0 1 1 0 1 1
3 0011 0 1 0 0 1 1 1 1
4 0100 0 1 1 0 0 1 1 0
5 0101 0 1 1 0 1 1 0 1
B0
6 0110 0 1 1 1 1 1 0 1
B5 B1
7 0111 B6 0 0 1 0 0 1 1 1
8 1000 0 1 1 1 1 1 1 1
B4 B2
9 1001 0 1 1 0 1 1 1 1
B3
A 1010 0 1 1 1 0 1 1 1
B 1011 0 1 1 1 1 1 0 0
C 1100 0 0 1 1 1 0 0 1
D 1101 0 1 0 1 1 1 1 0
E 1110 0 1 1 1 1 0 0 1
F 1111 0 1 1 1 0 0 0 1
Program Example
(1) The following program converts the data from XC to XF to 7-segment display data and
outputs it to Y38 to Y3F when X0 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Timing Chart]
X0
*1
Y38 to Y3F
*1: The data Y38 to Y3F will not change until the next data is output.
7-76
DIS(P)
3
Command
DIS S D n
DIS
Command 4
S D n
DISP DISP
6
S : Head number of the devices where data to be dissociated is stored (BIN 16 bits)
D : Head number of the devices where the dissociated data will be stored (BIN 16 bits)
n : Number of dissociations (1 to 4), 0: No processing (BIN 16 bits)
6
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
S ––
7
D –– –– ––
n ––
8
Function
(1) Stores the lower n-digits (1 digit is 4 bits) of the 16-bit data designated by S at the lower 4
(2) The upper 12 bits n-points from the device designated by S become 0.
(3) The value of n can be designated at between 1 and 4.
(4) If n 0, there will be no processing, and the contents n-points from D will not change.
7-77
DIS(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The range n-points from D exceeds the relevant device. (Error code: 4101)
• The value of n is outside the 0 to 4 range. (Error code: 4100)
Program Example
(1) The following program dissociates the 16-bit data from D0 into 4-bit groups, and stores from
D10 to D13 when X0 is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b12 b11 b8 b7 b4 b3 b0 b15 b4 b3 b2 b1 b0
D0 1 1 0 0 1 0 0 1 0 1 0 1 0 0 0 1 D10 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
D11 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1
D12 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1
D13 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0
7-78
UNI(P)
3
Command
UNI S D n
UNI
Command 4
UNIP S D n
UNIP
6
S : Head number of the devices where data to be linked is stored (BIN 16 bits)
D : Head number of the devices where the linked data will be stored (BIN 16 bits)
n : Number of links (1 to 4), 0: No processing (BIN 16 bits)
Internal Devices
6
Setting J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
S –– –– –– ––
7
D –– ––
n ––
8
Function
(1) Links lower 4 bits of 16-bit data n-points from device designated by S to 16-bit device
(2) The bits of the upper (4 n) digits of the device designated by D become 0.
(3) The value of n can be designated at between 1 and 4.
(4) If n 0, there will be no processing, and the contents of device D will not change.
7-79
UNI(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The range n-points from S exceeds the relevant device. (Error code: 4101)
• The value of n is outside the 0 to 4 range. (Error code: 4100)
Program Example
(1) The following program links the lower 4 bits of D0 to D2 when X0 is ON, and stores them at
D10.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b4 b3 b2 b1 b0 b15 b8 b7 b0
D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 D10 0 0 0 0 1 0 0 1 0 1 0 1 0 0 0 1
D1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1
D2 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1
Linked data
7-80
NDIS(P),NUNI(P)
3
indicates an instruction symbol of NDIS/NUNI.
Command
NDIS, NUNI S1 D S2
4
Command
NDISP, NUNIP P S1 D S2
6
S1 : Head number of the devices where data to be dissociated/linked is stored (BIN 16 bits)
D : Head number of the devices where the dissociated/linked data will be stored (BIN 16 bits) 6
S2 : Head number of the devices where the units of dissociation/linking will be stored (BIN 16 bits)
D –– ––
S2 –– ––
8
Function
(1) Dissociates data stored in device numbers starting from that designated at S1 into the
number of individual bits designated at S2 , and stores this data in device numbers starting
from that designated at D .
Designation of the number of dissociated bits
S2 6
S2 +1 8
S2 6
S2 +3 4
S2 +4 8
S2 +5 10
S2 +6 3
S2 +7 0 Designation of the end of setting
b15b14b13 b6b5 b0 b5 b0
S1 Number of bits D
designated at S2
b7 b0
Number of bits D +1
designated at S2 +1
b15 b8b7 b4b3 b0 b5 b0
S1 +1 Number of bits D +2
designated at S2 +2
b3 b0
Number of bits D +3
designated at S2 +3
b7 b0
Number of bits D +4
designated at S2 +4
b12 b10b9 b0 b9 b0
S1 +2 Number of bits D +5
designated at S2 +5
b2 b0
Number of bits D +6
designated at S2 +6
7-81
NDIS(P),NUNI(P)
(2) The number of dissociated bits designated at S2 can be designated within a range of 1 to 16
bits.
(3) Bits from the device number designated at S2 to the device number where "0" is stored are
processed as dissociated bits.
(4) Do not overlap the device range for data to be dissociated( S1 to end range of S1 ) with the
device range which stores the dissociated data ( D to end range of D ). If overlapped, the
correct operation result may not be obtained.
(5) Do not specify the same device number for S1 , S2 , and D . If the same device is specified
for S1 , S2 , and D , the operation does not work correctly.
NUNI
(1) Links individual bits of data stored into the area starting from the device number designated
by S1 in the number of bits specified by S2 , and stores them following the device number
designated by D .
Designation of the number of linked bits
S2 6
S2 +1 8
S2 +2 6
S2 +3 4
S2 +4 8
S2 +5 10
S2 +6 3
S2 +7 0 Designation of the end of setting
b5 b0 b15b14b13 b6 b5 b0
S1 Number of bits D
designated at S2
b7 b0
Number of bits
S1 +1 designated at S2 +1
b5 b0 b15 b8 b7 b4 b3 b0
S1 +2 Number of bits D
designated at S2 +2
b4 b0
S1 +3 Number of bits
designated at S2 +3
b7 b0
S1 +4 Number of bits
designated at S2 +4
b9 b0 b12 b10 b0
S1 +5 Number of bits D
designated at S2 +5
b2 b0
S1 +6 Number of bits
designated at S2 +6
(2) The number of bits to be linked as designated by S2 can be within a range of from 1 to 16.
(3) Processing will be performed on the number of bits to be linked from the device number
designated by S2 to the device number storing "0".
(4) Do not overlap the device range for data to be linked( S1 to end range of S1 ) with the device
range which stores the linked data ( D to end range of D ). If overlapped, the correct
operation result may not be obtained.
(5) Do not overlap the device numbers to be designated at S1 , S2 and D . If overlapped, correct
operation is not possible.
7-82
NDIS(P),NUNI(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and 1
an error code is stored into SD0.
• The number of bits to be dissociated or linked as specified by S2 , or the device use range
specified by S1 or D exceeds the final device number of their respective devices. 2
(Error code: 4101)
• The number of bits for dissociation or linking specified by has not been set within the
3
S2
range of from 1 to 16 bits. (Error code: 4100)
Program Example 4
(1) The following program dissociates data of 4, 3, and 6 bits respectively from the lower bits of
D0, and stores them from D10 to D12.
6
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
7-83
NDIS(P),NUNI(P)
(2) The following program links the lower 4 bits of data from D10, the lower 3 bits of data from
D11, and the lower 6 bits of data from D12, and stores at D0.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b3 b0
D10 0 0 0 1 0 1 1 0 0 1 1 0 1 1 0 0
4 bits
b2 b0
D11 0 1 0 1 1 1 1 0 1 0 0 0 1 1 0 1
3 bits
b5 b0
D12 0 0 1 1 1 0 1 1 0 0 1 0 1 1 0 0
6 bits
7-84
WTOB(P),BTOW(P)
Basic High
performance Process Redundant Universal
2
3
indicates an instruction symbol of WTOB/BTOW.
Command 4
S D n
WTOB, BTOW
Command
WTOBP, BTOWP P S D n 6
S : Head number of the devices where data to be dissociated/linked in byte units is stored (BIN 16 bits) 6
D : Head number of the devices where the result of dissociated/linking in byte units will be stored (BIN 16 bits)
n : Number of byte data to be dissociated/linked (BIN 16 bits)
S –– –– ––
D –– –– –– 8
n ––
Function
For example, if n 5, data through the lower 8 bits of S to ( S +2) would be stored from ( D
to D +4).
b15 b8b7 b0 b15 b8 b7 b0
S 12H 39H D 00H 39H
S +1 56H 78H D +1 00H 12H
When n=5
S +2 FEH DCH D +2 00H 78H
bytes
D +3 00H 56H
Ignored when n=5 D +4 00H DCH
7-85
WTOB(P),BTOW(P)
(2) Setting the number of bytes with n automatically determines the range of the 16-bit data
designated by S and the range of the devices to store the byte data designated by D .
(3) No processing will be conducted when the number of bytes designated by n is "0".
(4) The "00H" code will automatically be stored at the upper 8 bits of the byte storage device
designated by D .
b15 b8 b7 b0 b15 b8 b7 b0
D12 32H 31H 00H 31H
D11
D13 34H 33H 00H 32H
D12
D14 36H 35H 00H 33H
D13
D14 00H 34H
00H 35H
D15
D16 00H 36H
Stores 00H.
n
(5) Even though the range of the device with the data to be devided ( S to S +( 2 -1)) is the
same as the range of the device with the devided data ( D to D +(n-1)), the instruction
operates correctly.
BTOW
(1) Links the lower 8 bits of the 16-bit data in n words stored in the area starting from the device
designated by S in 1-word units and stores it into the area starting from the device
designated by D . The upper 8 bits of n-word data stored in the area starting from the device
designated by S will be ignored. Further, if n is an odd number, 0 is stored at the upper 8
bits of the device where the nth byte data is stored.
b15 b8b7 b0 b15 b8 b7 b0
S Data of the 1st byte D Data of the 2nd byte Data of the 1st byte
S +1 Data of the 2nd byte D Data of the 4th byte Data of the 3rd byte
n bytes S +2 Data of the 3rd byte
n *1
S +3 Data of the 4th byte D +( -1) Data of the nth byte Data of the (n-1) byte
2
*1: Figures after the decimal point are rounded up.
S +(n-1) Data of the nth byte
For example, if n 5, the lower 8 bits of data from S to ( S +4) are linked and stored at D
to ( D +2).
b15 b8b7 b0 b15 b8 b7 b0
S 00H 12H D 34H 12H
S +1 00H 34H D +1 78H 56H
If n = 5 S +2 00H 56H D +2 00H FEH
S +3 00H 78H
+4 00H is set.
S 00H FEH
(2) Setting the number of bytes with n automatically determines the range of the byte data
designated by S and the range of the devices to store the linked data designated by D .
(3) No processing will be conducted when the number of bytes designated by n is "0".
7-86
WTOB(P),BTOW(P)
(4) The upper 8 bits of the byte storage device designated by S are ignored, and the lower 8
bits are used.
1
(5) Linking is correctly processed even when the device range ( S to S +(n-1)) where the data
n
to be linked is stored overlaps with the device range ( D to D +( 2 -1)) where the linked data
will be stored. 2
For example, the following will take place in a case where the lower 8 bits of D11 to D16 are
to be stored at D12 to D14:
b15 b8 b7 b0 b15 b8 b7 b0 3
D11 00H 31H D11 00H 31H
D12 00H 32H D12 32H 31H
D13
D14
00H
00H
33H
34H
D13
D14
34H
36H
33H
35H
4
D15 00H 35H D15 00H 35H
D16 00H 36H D16 00H 36H
6
Operation Error
6
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The range of the number of bytes designated by n following the device number
7
designated by S exceeds the relevant device range. (Error code: 4101)
• The range of the number of bytes designated by n following the device number
designated by D exceeds the relevant device range. (Error code: 4101) 8
Program Example
(1) The following program dissociates the data at D10 to D12 in byte units and stores it at D20
[Operation]
b15 b8 b7 b0 b15 b8 b7 b0
D10 FDH 58H D20 00H 58H
D11 57H E2H D21 00H FDH
D12 34H 44 H D22 00H E2H
00H 57H 6 bytes
D23
D24 00H 44H
D25 00H 34H
7-87
WTOB(P),BTOW(P)
(2) The following program links the lower 8 bits of data from D20 through D25 and stores the
result at D10 to D12 when X0 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0 b15 b8 b7 b0
D20 00H 78H D10 12H 78H
D21 31H 12H D11 55H 49H
D22 36H 49H D12 31H 67H
6 bytes 44H 55H
D23
D24 48H 67H
D25 49H 31H
7-88
MAX(P),DMAX(P)
Basic High
performance Process Redundant Universal
2
3
indicates an instruction symbol of MAX/DMAX.
Command 4
MAX, DMAX S D n
Command
MAXP ,DMAXP P S D n 6
S : Head number of the devices where a maximum value is searched (BIN 16/32 bits) 6
D : Head number of the devices where the maximum value search result will be stored (BIN 16/32 bits)
n : Number of data blocks to be searched (BIN 16 bits)
S –– –– ––
D –– –– –– 8
n ––
Function
7.5.10 Maximum value search for 16- and 32-bit data (MAX(P),DMAX(P))
7.5 Data processing instructions
MAX
(1) Searches in the n points of 16-bit BIN data, from the device designated by S , for the
maximum value and stores the searched maximum value at the device designated by D .
Starts the search from the device designated by S and stores the location, specified in the
number of points counted from S , of the device where the maximum value is found first at
D +1 and stores the number of the found minimum values at D +2.
S 1234 (BIN)
S +1 5678 (BIN)
D 5678 (BIN) Maximum value
S +2 5678 (BIN)
n D +1 2 Location
D +2 2 Quantity
S +(n-2) -5214 (BIN)
S +(n-1) 5555 (BIN)
7-89
MAX(P),DMAX(P)
DMAX
(1) Searches in the n points of 32-bit BIN data, from the device designated by S , for the
maximum value and stores the searched maximum value at the device designated by D
and D +1.
Starts the search from the device designated by S and stores the location, specified in the
number of points counted from S , of the device where the maximum value is found first at
D +2 and stores the number of the found minimum values at D +3.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The n-bit range from the S , or device exceeds the range of that device.
(Error code: 4101)
• The device specified by D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
Program Example
(1) The following program subtracts, when X1C is turned ON, the data stored at D100 to D103
from the data stored at R0 to R3, and searches in the results of subtraction for the maximum
value, then, stores it at D200 to D202.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b0 b15 b0 b15 b0
D100 4321 (BIN) R0 5000 (BIN) D150 -679 (BIN)
D101 5432 (BIN) R1 4000 (BIN) D151 1432 (BIN)
D102 4444 (BIN) R2 4000 (BIN) D152 444 (BIN)
D103 5000 (BIN) R3 6000 (BIN) D153 -1000 (BIN)
D200 1432 Maximum value
D201 2 Location
D0 4 D202 1 Quantity
7-90
MAX(P),DMAX(P)
(2) The following program searches for the maximum value from the32-bit data at D0 to D7, and
stores it at D100 to D103 when X20 is turned ON.
[Ladder Mode] [List Mode]
1
Step Instruction Device
2
[Operation] 3
D1, D0 3786213 (BIN) D101, D100 8744740
D3, D2
D5, D4
-3235 (BIN)
8744740 (BIN)
D102
D103
3
1
4
D7, D6 7141821 (BIN)
7.5.10 Maximum value search for 16- and 32-bit data (MAX(P),DMAX(P))
7.5 Data processing instructions
7-91
MIN(P),DMIN(P)
Basic High
performance Process Redundant Universal
Command
P S D n
MINP, DMINP
S : Head number of the devices where a minimum value is searched (BIN 16/32 bits)
D : Head number of the devices where the minimum value search result will be stored (BIN 16/32 bits)
n : Number of data blocks to be searched (BIN 16 bits)
S –– –– ––
D –– –– ––
n ––
Function
MIN
(1) Searches in the n points of 16-bit BIN data, from the device designated by S , for the
minimum value and stores searched minimum value at the device designated by D .
Starts the search from the device designated by S and stores the location, specified in the
number of points counted from S , of the device where the minimum value is found first at
D +1 and stores the number of the found minimum values at D +2.
S 5015 (BIN)
S +1 6192 (BIN)
D 5015 (BIN) Minimum value
S +2 5571 (BIN) n D +1 1 Location
D +2 2 Quantity
S +(n-2) 5015 (BIN)
S +(n-1) 5571 (BIN)
7-92
MIN(P),DMIN(P)
DMIN
(1) Searches in the n points of 32-bit BIN data, from the device designated by S , for the 1
minimum value and stores searched minimum value at the devices designated by D and
+1.
D
Starts the search from the device designated by S and stores the location, specified in the
2
number of points counted from S , of the device where the minimum value is found first at
D +2 and stores the number of the found minimum values at D +3. 3
S 22342001 (BIN)
D +1, D 22342001 (BIN) Minimum value
S +2 37282010 (BIN)
D +2 1 Location
S +4
S +6
22342001 (BIN)
59872019 (BIN) D +3 2 Quantity 4
6
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and 6
an error code is stored into SD0.
• The n-bit range from the device specified by exceeds the range of the corresponding
7
S
7.5.11 Minimum value search for 16- and 32-bit data (MIN(P),DMIN(P))
7.5 Data processing instructions
the data stored at R0 to R3, and searches in the results of addition for the minimum value,
then, stores it at D200 to D202.
[Ladder Mode] [List Mode]
[Operation]
b15 b0 b15 b0 b15 b0
D100 5542 (BIN) R0 5500 (BIN) D150 11042 (BIN)
D101 5857 (BIN) R1 4000 (BIN) D151 9857 (BIN)
+
D102 4590 (BIN) R2 4500 (BIN) D152 9090 (BIN)
D103 4450 (BIN) R3 6000 (BIN) D153 10450 (BIN)
D200 9090 Minimum value
D201 3 Location
D0 4 D202 1 Quantity
7-93
MIN(P),DMIN(P)
(2) The following program, when X20 is turned ON, searches for the minimum value from the
32-bit data contained from D0 to D7, and stores it from D100 to D103.
[Ladder Mode] [List Mode]
[Operation]
D1,D0 57020175 (BIN) D101,D100 69386
D3,D2 2070166 (BIN) D102 4
D5,D4 3596045 (BIN) D103 1
D7,D6 69386 (BIN)
7-94
SORT,DSORT
3
indicates an instruction symbol of SORT/DSORT.
Command
SORT, DSORT S1 n S2 D1 D2 4
n ––
S2 –– 8
D1 –– –– ––
D2 –– –– ––
(1) Sorts (rearranges data) BIN 16-bit data n points from S1 in ascending or descending order.
Sort order is designated by the ON/OFF status of SM703:
• When SM703 is OFF: Ascending order sort
• When SM703 is ON : Descending order sort
S -124
Data before sort When SM703 = OFF S +1 -10
Sort in the ascending order
S 35 S +2 35
S +1 -10 S +3 500
S +2 500
S +3 -124
S 500
S +1 35
Sort in the descending order
When SM703 = ON S +2 -10
S +3 -124
7-95
SORT,DSORT
(2) Several scans are required for sorts performed by the SORT instruction. The number of
scans executed until completion is the value obtained by dividing the maximum number of
times executed until the completion of the sort by the number of data blocks compared at
one execution designated by S2 . (Decimal fractions are rounded up.)When the value of S2
is increased, the number of scans until completion of the sort is reduced, but the amount of
time per scan is lengthened.
(3) The maximum number of executions until completion of the sort should be calculated
according to the following equation:
The maximum number of executions until completion (n) (n - 1) / 2 [times executed]
Example
When n 10, the number of executions is obtained as 10 (10 - 1) / 2 45 [times executed].
If S2 2, then the number of scans until the completion of sort is calculated as
45/2 22.5 23 [scans].
(4) The device designated by D1 (the completion device) is turned OFF by the execution of the
SORT instruction, and turned ON when the sort is completed. Because the device
designated by D1 is maintained in the ON state after the completion of the sort, the user
must turn it OFF if required.
(5) The 2 points from the device designated by D2 are used by the system during the execution
of the SORT instruction. These 2 points from the device designated by D2 should therefore
not be used by the user.
Changing these points may cause an error code to be returned (Error code: 4100).
(6) If the value of n is changed during the execution of the SORT instruction, the sort will be
conducted in accordance with the number of sort data blocks after the change.
(7) If the execution command is turned OFF during the execution of the SORT instruction, the
sort is suspended. The sort resumes from the beginning when the execution command is
turned ON again.
(8) To execute another sort operation immediately after the completion of the previous sort, turn
OFF the execution command once, then turn it ON.
DSORT
(1) Sorts (rearranges data) BIN 32-bit data n points from S1 in ascending or descending order.
Sort order is designated by the ON/OFF status of SM703:
• When SM703 is OFF : Ascending order sort
• When SM703 is ON : Descending order sort
S1 +1 , S1 -1000
Data before sort When SM703 = OFF S1 +3 , S1 +2 -124
Sort in the ascending order
S1 +1 , S1 35000 S1 +5 , S1 +4 500
S1 +3 , S1 +2 -1000 S1 +7 , S1 +6 35000
S1 +5 , S1 +4 500
S1 +7 , S1 +6 -124
S1 +1 , S1 35000
S1 +3 , S1 +2 500
When SM703 = ON Sort in the descending order
S1 +5 , S1 +4 -124
S1 +7 , S1 +6 -1000
7-96
SORT,DSORT
(2) Several scans are required for sorts performed by the DSORT instruction. The number of
scans executed until completion is the value obtained by dividing the maximum number of
times executed until the completion of the sort by the number of data blocks compared at 1
one execution designated by S2 . (Decimal fractions are rounded up.)When the value of S2
is increased, the number of scans until completion of the sort is reduced, but the amount of
time per scan is lengthened. 2
(3) The maximum number of executions until completion of the sort should be calculated
according to the following equation:
The maximum number of executions until completion (n) (n 1)/2 [times executed]
3
Example
4
When n 10, the number of executions is obtained as 10 (10 1)/2 45 [times executed].
If S2 2, then the number of scans until the completion of sort is calculated as
45/2 22.5 23 [scans]. 6
(4) The device designated by D1 (the completion device) is turned OFF by the execution of the
SORT instruction, and turned ON when the sort is completed. Because the device desig-
nated by D1 is maintained in the ON state after the completion of the sort, the user must turn 6
it OFF if required.
(5) The 2 points from the device designated by D2 are used by the system during the execution
7
of a DSORT instruction. These 2 points from the device designated by D2 should therefore
not be used by the user.
Changing these points may cause an error code to be returned (Error code: 4100).
8
(6) If the value of n is changed during the execution of the SORT instruction, the sort will be
conducted in accordance with the number of sort data blocks after the change.
(7) If the execution command is turned OFF during the execution of the SORT instruction, the
sort is suspended. The sort resumes from the beginning when the execution command is
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• For the SORT(P) instruction, the range for n points starting from the device at S1 exceeds
the corresponding device range. (Error code: 4101)
• For the DSORT(P) instruction, the range for 2 n points starting from the device at S1
exceeds the corresponding device range. (Error code: 4101)
• The device range of the (n/2 n) points starting from the device designated by S1
overlaps with the device range of the 2 points starting from the device designated by D2 .
(Error code: 4101)
7-97
SORT,DSORT
Program Example
(1) The following program sorts the BIN 16-bit data in 10 points from D0 in the ascending/
descending order when X10 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Data after sort
D0 -999
Data before sort D1 -1
X0 OFF
D0 100 D2 100
D1 -1 D3 12345
D2 12345
D3 -999
D0 12345
X0 ON D1 100
D2 -1
D3 -999
(2) The following program sorts the BIN 32-bit data in 20 points from D0 in ascending/
descending order when X10 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Data before sort
D1, D0 -99999
D3, D2 -1111
Data before sort
X0 OFF D5, D4 1
D1, D0 456789
D7, D6 5000
D3, D2 -1111
D9, D8 456789
D5, D4 5000
D7, D6 -1 D1, D0 456789
D9, D8 -99999 D3, D2 5000
X0 ON
D5, D4 1
D7, D6 -1111
D9, D8 -99999
7-98
WSUM(P)
3
Command
WSUM S D n
WSUM
Command
n
4
WSUMP WSUMP S D
S : Head number of the devices where data to be summed are stored (BIN 16 bits)
6
D : Head number of the devices where the sum will be stored (BIN 32 bits)
n : Number of data blocks (BIN 16 bits)
S –– –– –– ––
D –– ––
7
n ––
8
Function
(1) Adds all 16-bit BIN data for n blocks from the device designated at S , and stores it in the
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The n-bit range from the S , or device exceeds the range of that device.
(Error code: 4101)
7-99
WSUM(P)
Program Example
(1) The following program adds the 16-bit BIN data from D10 to D14, and stores it in D100 and
D101 when X1C is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
7-100
DWSUM(P)
3
Command
DWSUM S D n
DWSUM
Command 4
DWSUMP S D n
DWSUMP
6
S : Head number of the devices where data to be summed are stored (BIN 32 bits)
D : Head number of the devices where the sum will be stored (BIN 64 bits)
n : Number of data blocks (BIN 16 bits)
Internal Devices
6
Setting J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
7
S –– –– –– ––
D –– –– ––
n ––
8
Function
(1) Adds all 32-bit BIN data stored in n points of devices starting from the one designated by S ,
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The n-bit range from the S , or device exceeds the range of that device.
(Error code: 4101)
• The device specified by D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
7-101
DWSUM(P)
Program Example
(1) The following program adds the 32-bit BIN data at D100 to D107, and stores the result at
D10 and D13 when X20 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D101,D100 11245600 (BIN)
D103,D102 27543200 (BIN)
D13 to D10 23672600 (BIN)
D105,D104 558800 (BIN)
D107,D106 15675000 (BIN)
7-102
MEAN(P),DMEAN(P)
High
Ver. 2
Basic performance Process Redundant Universal
Command
4
MEAN,DMEAN S D n
Command
P S D n
6
MEANP,DMEANP
S : Head number of the devices where the data to be averaged are stored (BIN16/32 bits)
6
D : Head number of the devices where the average will be stored (BIN 16/32 bits)
n : Number of data or number of the devices where the number of data are stored(Setting range: 1 to 32767)
(BIN 16 bits)
S –– –– –– ––
D –– –– –– ––
8
n –– ––
S
S +1 Average value D
S +2 n
S +n−1
(2) If the value calculated is not integer, this instruction will drop the number of decimal places.
(3) If the value specified by n is 0, the instruction will be not processed.
DMEAN(P)
(1) This instruction calculates the mean of 32-bit BIN data stored in n-point devices starting from
the device specified by S , and then stores the result into the device specified by D .
S +1, S D +1, D
Average value
S +3, S +2
n
S +2n−1, S +2n−2
(2) If the value calculated is not integer, this instruction will drop the number of decimal places.
(3) If the value specified by n is 0, the instruction will be not processed.
7-103
MEAN(P),DMEAN(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
• The value specified by n is other than 0 to 32767. (Error code: 4100)
• The range of the n-point devices starting from the device specified by S exceeds the
range of the devices specified by D . (Error code: 4101)
Program Example
(1) The following program stores the average value of 16-bit data stored from D0 to D2 into
D10,when M0 is turned on.
[Ladder Mode] [List Mode]
[Operation]
D0 105 (BIN)
D1 555 (BIN) D10 550 (BIN)
D2 990 (BIN)
(2) The following program stores the average value of 32-bit data stored from D0 to D5 into D10
and D11, when M0 is turned on.
[Ladder Mode] [List Mode]
[Operation]
D1,D0 623541 (BIN)
D3,D2 4753647 (BIN) D11,D10 2101176 (BIN)
D5,D4 926342 (BIN)
7-104
FOR,NEXT
4
FOR n
FOR
Repeat program
6
NEXT NEXT
n
Bit Word Bit Word
––
7
8
Function
(1) When the processing in the FOR to NEXT loop is executed n-times without conditions, the
step following the NEXT instruction will be executed.
FOR K5
X
FOR K3
X1
NEXT
NEXT
NEXT
7-105
FOR,NEXT
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• An END, FEND or GOEND instruction was executed before the execution of a NEXT
instruction and after the execution of a FOR instruction. (Error code: 4200)
• A NEXT instruction is executed prior to the execution of a FOR instruction.
(Error code: 4201)
• A STOP instruction has been inserted within the FOR to NEXT loop.
(Error code: 4200)
• The 17th FOR instruction is executed when FOR instructions have been nested.
(Error code: 4202)
Program Example
(1) The following program executes the FOR to NEXT loop when X8 is OFF, and does not
execute it when X8 is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
7-106
FOR,NEXT
Remark
1. To force an end to the repetitious execution of the FOR to NEXT loop during the
1
execution of the loop, insert a BREAK instruction. See 7.6.2 for details
concerning the use of the BREAK instruction.
2. Use the EGP/EGF instruction to perform the pulse operation of an
2
index-modified program between the FOR and NEXT instructions. Refer to
5.2.5 for details of the EGP/EGF instruction. The program samples are shown
below:
3
3. Branching into a FOR to NEXT loop using a JMP or other branch instruction 7
from the outside of the FOR to NEXT loop is not possible.
7-107
BREAK(P)
Basic High
performance Process Redundant Universal
Command
BREAK D Pn
BREAK
Command
BREAKP BREAKP D Pn
D : Number of the device where the remaining number of loops will be stored (BIN 16 bits)
Pn : Number of the pointer (device name (pointer)) where the program is branched at the forced end of a loop.
D –– ––
Pn –– ––
Function
(1) Forces an end to a FOR to NEXT instruction loop and shifts the operation to the pointer
specified by Pn. Only a pointer within the same program file can be assigned to Pn. If a
pointer of the other program file is used, an operation error will be returned.
FOR K **
If the BREAK instruction is not executed,
Forced end condition program returns to the FOR instruction
BREAK D Pn as many times as the number specified
When forced end condition is satisfied with the FOR instruction.
NEXT
Pn
(2) The remaining number of the FOR to NEXT instruction loop times is stored at D .
Note that the remaining number includes the operation when the BREAK instruction is
executed.
(3) The BREAK instruction can be used only during the execution of a FOR to NEXT instruction
loop.
(4) The BREAK instruction can be used only when there is only one level of nesting. When an
end is forced to the multiple nesting levels, execute the same number of BREAK instructions
for the nesting levels.
7-108
BREAK(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The BREAK instruction is used in a case other than with the FOR to NEXT instruction 2
loop. (Error code: 4203)
• The jump destination for the pointer designated by Pn does not exist.
(Error code: 4210) 3
• The pointer of another program file is designated for Pn. (Error code: 4210)
4
Program Example
(1) The following program forces the FOR to NEXT loop to end when the value of D0 reaches
30 (when the FOR to NEXT loop has been executed 30 times).
6
[Ladder Mode] [List Mode]
Step Instruction Device 6
7-109
CALL(P)
Basic High
performance Process Redundant Universal
Command
CALL CALL Pn
Command
CALLP CALLP Pn
Command
CALL CALL Pn S1 to S5
Command
CALLP CALLP Pn S1 to S5
Pn –– –– ––
(Other
S1 to S5 ––
than F)
Function
(1) When the CALL (P) instruction is executed, executes the subroutine program of the program
specified by Pn.
CALL Pn RET
END
7-110
CALL(P)
(2) When function devices (FX, FY, FD) are used by a subroutine program, specify a device with
to corresponding to the function device. The contents to the devices specified by
S1 S5 S1
1
to S5 are as indicated below.
(a) Prior to execution of the subroutine program, bit data is transmitted to FX, and word
data is transmitted to FD.
6
(b) After the execution of the subroutine program, the contents of FY and FD are
transmitted to the corresponding devices. 6
(c) The processing units for the function devices are as follows:
• FX, FY: Bits
7
• FD : 4-word units
The size of the data to be dealt with will differ depending on the device specified in the
argument. The device specified as a function device should be secured for the data 8
size. An error will occur if it cannot be secured for the data size.
Function devices Device Data Size Remark
• FX Bit device 1 point
––
• FY When bit designation is made for word device 1 bit
*1: An error will not occur even when the device number specified by S1 to S5 is not a multiple of 16 at the digit
designation of the bit device.
X0
CALL P0 M0 D0 D30
7-111
CALL(P)
(6) The device used in the argument of the CALL (P) instruction should not be used in a subrou-
tine program. If used, it will not be possible to obtain accurate calculations.
(Refer to the following program example.)
(7) When the device, either timer or counter, is used in the argument of the CALL(P) instruction,
only the current value is transmitted/received.
[Program example]
Indefinite 0 33 *1 Indefinite
Indefinite 10 1 *1 Indefinite
FD0 FD0 FD0 FD0
Indefinite 100 100 Indefinite
Indefinite 1000 1000 Indefinite
7-112
CALL(P)
[Program example]
2
Indefinite 0 33 *1 Indefinite
Indefinite 10 1 *1 Indefinite
FD0 FD0 FD0 FD0
(8) Up to 16 nesting levels are possible with the CALL(P) instruction. However, this 16 levels is
the total number of levels in the CALL(P), FCALL(P), ECALL(P), EFCALL(P), and XCALL
instructions.
END
(9) Devices which are turned ON within subroutine programs will be latched even if the
subroutine program is not executed. Devices which are turned ON during the execution of a
subroutine program can be turned OFF by the execution of the FCALL(P) instruction.
7-113
CALL(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The device specified for the argument cannot be secured for the data size.
(Error code: 4101)
• Following the execution of the CALL (P) instruction, an END, FEND, GOEND, or STOP
instruction is executed before the execution of the RET instruction.
(Error code: 4211)
• An RET instruction is executed prior to the execution of the CALL (P) instruction.
(Error code: 4212)
• A 17th nesting level is executed. (Error code: 4213)
• There is no subroutine program for the pointer specified in the CALL (P) instruction.
(Error code: 4210)
Program Example
(1) The following program executes a subroutine program with argument when X20 is turned
ON.
[Ladder Mode] [List Mode]
Step Instruction Device
7-114
RET
3
RET RET
4
Setting Internal Devices J \
R, ZR U \G Zn Constants Other
Data Bit Word Bit Word
–– –– 6
Function 6
(1) Indicates end of subroutine program
(2) When the RET instruction is executed, returns to the step following the CALL (P), FCALL 7
(P), ECALL (P), EFCALL (P) or XCALL instruction which called the subroutine program.
CALL Pn RET
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• Following the execution of the CALL(P), FCALL (P), ECALL (P), EFCALL (P) or XCALL
instruction, an END, FEND, GOEND, or STOP instruction is executed before the
execution of the RET instruction. (Error code: 4211)
• An RET instruction is executed prior to the execution of the CALL (P), FCALL (P), ECALL
(P), EFCALL (P) or XCALL instruction. (Error code: 4212)
7-115
FCALL(P)
Basic High
performance Process Redundant Universal
Command
FCALL FCALL Pn
Command
FCALLP FCALLP Pn
Command
FCALL FCALL Pn S1 to S5
Command
FCALLP FCALLP Pn S1 to S5
Pn –– –– ––
(Other
S1 to S5 ––
than F)
Function
(1) When FCALL(P) is executed, the non-execution processing of the subroutine program of the
pointer designated by Pn is performed.
(a) Non-execution processing is identical to the processing that is conducted when the
condition contacts for the individual coil instructions are in the OFF state.
Main routine Subroutine
program program
Pn Non-execution processing is
executed when the command
for the FCALL(P) instruction is
FCALL Pn RET turned from ON to OFF.
END
7-116
FCALL(P)
(b) The operation results for the individual coil instructions following non-execution
processing will be as follows, regardless of the ON/OFF status of the individual
contacts:
1
OUT instruction ...... Forced OFF
SET instruction 2
RST instruction
SFT instruction ...... Maintains status
Basic instructions
Application instructions
3
PLS instruction Processing identical to
Pulse generation ...... when condition contacts
instruction ( P) are OFF 4
Present value of low speed/high speed timers ...... 0
Present value of retentive timer
...... Preserves
Present value of counter 6
(2) The FCALL (P) instruction is used in conjunction with the CALL(P) instruction.
(3) If the FCALL (P) instruction is used in conjunction with the CALL(P) instruction, 6
non-execution processing of a subroutine program is performed when the execution
command is turned OFF, enabling forcible turning OFF of the OUT instruction and the PLS
instruction (including P instructions).
In case the FCALL (P) instruction is not used in conjunction with the CALL(P) instruction,
7
non-execution processing of a subroutine program is not performed even if the execution
command is turned OFF. Therefore, output status of the individual coil instructions remains
unchanged. 8
X0
CALL P0 When FCALL instruction is used
X1
FEND Y10
X1
P0 Y10 Y11
SET Y11 M0
RET
X1
FEND
X1 Y10
P0 Y10
Y11
SET Y11
M0
PLS M0
RET
7-117
FCALL(P)
(4) When function devices (FX, FY, FD) are used by a subroutine program, specify a device with
S1 to S5 corresponding to the function device. The contents to the devices specified by S1
(a) Prior to execution of the subroutine program, bit data is transmitted to FX, and word
data is transmitted to FD.
(b) After the execution of the subroutine program, the contents of FY and FD are
transmitted to the corresponding devices.
(c) The processing units for the function devices are as follows:
• FX, FY: Bits
• FD : 4-word units
The size of the data to be dealt with will differ depending on the device specified in the
argument. The device specified as a function device should be secured for the data
size. An error will occur if it cannot be secured for the data size.
Function devices Device Data Size Remark
Bit device 1 point
• FX
When Bit Designation has been Made for Word ––––
• FY 1 bit
Device
The upper 2 words of
When digit designation of a bit device is used*1 4 words
• FD FD become 0
Word device 4 words ––––
*1: An error will not occur if the device number specified by S1 to S5 is not a multiple of 16 at the digit
designation of the bit device.
7-118
FCALL(P)
(6) Up to 16 nesting levels are possible with the FCALL(P) instruction. However, this 16 levels
is the total number of levels in the CALL(P), FCALL(P), ECALL(P), EFCALL(P), and XCALL
instructions. 1
CALL P0
P0 P10
2
FCALL P0 P20
END
4
Operation Error
6
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The device specified for the argument cannot be secured for the data size. 6
(Error code: 4101)
• Following the execution of the CALL (P) instruction, an END, FEND, GOEND, or STOP
instruction is executed before the execution of the RET instruction.
(Error code: 4211)
7
• An RET instruction is executed prior to the execution of the FCALL (P) instruction.
(Error code: 4212)
• A 17th nesting level is executed. (Error code: 4213)
8
• The subroutine program of the pointer designated by the FCALL (P) instruction does not
exist. (Error code: 4210)
[Operation]
X20
M0
Y1
7-119
ECALL(P)
High
Basic performance Process Redundant Universal
Command
ECALL ECALL File name Pn
Command
ECALLP ECALLP File name Pn
Command
ECALL ECALL File name Pn S1 to S5
Command
ECALLP ECALLP File name Pn S1 to S5
File name –– –– ––
Pn –– –– –– ––
(Other
S1 to S5 –– ––
than F)
Function
(1) Executes the subroutine program of the pointer designated by Pn in the designated program
file name when the ECALL (P) instruction is executed. The ECALL(P) instruction can be
used to call a subroutine program that uses a local pointer from a different program file.
ECALLABCPn RET
END
7-120
ECALL(P)
(2) Only the file name of a program file stored in the drive 0 (program memory/internal RAM)
can be designated for a file name.
1
(3) It is not necessary to designate the extension (.QPG) with the file name.
(Only .QPG files will be acted on.)
(4) When function devices (FX, FY, FD) are used by a subroutine program, specify a device 2
corresponding to the function device with S1 to S5 . The contents of the devices specified by
4
[ABC]
6
7
(a) Prior to execution of the subroutine program, bit data is transmitted to FX, and word
data is transmitted to FD.
8
(b) After the execution of the subroutine program, the contents of FY and FD are
transmitted to the corresponding devices.
(c) The processing units for the function devices are as follows:
When digit designation of a bit device is used*1 4 words The data size varies
• FD depending on the
Word device 4 words instruction to be used.
*1: An error will not occur even when the device number specified by S1 to S5 is not a multiple of 16 at the digit
designation of the bit device.
7-121
ECALL(P)
[Program example]
Indefinite 0 33 *1 Indefinite
Indefinite 10 1 *1 Indefinite
FD0 FD0 FD0 FD0
Indefinite 100 100 Indefinite
Indefinite 1000 1000 Indefinite
7-122
ECALL(P)
[Program example]
2
[MAIN]
3
[ABC]
4
Indefinite 0 33 *1 Indefinite
Indefinite 10 1 *1 Indefinite
FD0 FD0 FD0 FD0
Indefinite 100 100 Indefinite
Indefinite 1000 1000 Indefinite
(7) The numbers of the devices designated by the arguments in the ECALL(P) instruction
should not overlap. If they do overlap, it will not be possible to obtain accurate calculations.
(8) Up to 16 levels of nesting can be used with the ECALL(P) instruction. However, this 16
levels is the total number of levels in the CALL(P), FCALL(P), ECALL(P), EFCALL(P), and
XCALL instructions.
END
(9) Devices which are turned ON within subroutine programs will be latched even if the
subroutine program is not executed. Devices turned ON during the execution of a
subroutine program can be turned OFF by the EFCALL(P) instruction.
7-123
ECALL(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The device specified for the argument cannot be secured for the data size.
(Error code: 4101)
• Following the execution of the ECALL (P) instruction, an END, FEND, GOEND, or STOP
instruction is executed before the execution of the RET instruction.
(Error code: 4211)
• An RET instruction is executed prior to the execution of the ECALL(P) instruction.
(Error code: 4212)
• A 17th nesting level is executed. (Error code: 4213)
• The subroutine program of the pointer designated by the ECALL(P) instruction does not
exist. (Error code: 4210)
• The designated file does not exist. (Error code: 2410)
• The designated file cannot be executed. (Error code: 2411)
Program Example
(1) The following program executes program block P0 of the program A-LINE when X20 is
turned ON.
[Ladder Mode] [List Mode]
[MAIN] Step Instruction Device
7-124
EFCALL(P)
High
2
Basic performance Process Redundant Universal
3
Command
EFCALL EFCALL File name Pn
4
Command
EFCALLP EFCALLP File name Pn
Command
6
EFCALL EFCALL File name Pn S1 to S5
EFCALLP
Command
EFCALLP File name Pn S1 to S5 6
File name –– –– ––
Pn –– –– –– ––
Function
(1) When the EFCALL(P) instruction is executed, the non-execution processing of the
subroutine program of the pointer designated by Pn is performed.
The EFCALL (P) can also be used to call a subroutine program that uses a
local pointer from a different program file.
(a) Non-execution processing is identical to the processing that is conducted when the
condition contacts for the individual coil instructions are in the OFF state.
[File name: MAIN] [File name: ABC]
Main routine Subroutine
program program
Pn Non-execution processing
is executed when the
command for the
EFCALL(P) instruction is
EFCALL "ABC" Pn RET turned from ON to OFF.
END
7-125
EFCALL(P)
(b) The operation results for the individual coil instructions following non-execution
processing will be as follows, regardless of the ON/OFF status of the individual contacts:
OUT instruction ...... Forced OFF
SET instruction
RST instruction
SFT instruction ...... Maintains status
Basic instructions
Application instructions
PLS instruction Processing identical to
Pulse generation ...... when condition contacts
instruction ( P) are OFF
Present value of low speed/high speed timers ...... 0
Present value of retentive timer
...... Preserves
Present value of counter
(2) The EFCALL (P) instruction is used in combination with the ECALL (P) instruction.
(3) If the EFCALL(P) instruction is used in conjunction with the ECALL(P) instruction,
non-execution processing of a subroutine program is performed when the execution
command is turned OFF, enabling forcible turning OFF of the OUT instruction and the PLS
instruction (including P instructions).
In case the EFCALL(P) instruction is not used in conjunction with the ECALL(P) instruction,
non-execution processing of a subroutine program is not performed even if the execution
command is turned OFF. Therefore, output status of the individual coil instructions remains
unchanged.
7-126
EFCALL(P)
(4) Only the file name of a program file stored in the drive 0 (program memory/internal RAM)
can be designated for a file name.
1
(5) It is not necessary to designate the extension (.QPG) with the file name.
(Only .QPG files will be acted on.)
(6) When function devices (FX, FY, FD) are used by a subroutine program, specify a device 2
corresponding to the function device with S1 to S5 .
[MAIN]
3
[ABC] 6
(a) Prior to execution of the subroutine program, bit data is transmitted to FX, and word 8
data is transmitted to FD.
(b) After the execution of the subroutine program, the contents of FY and FD are
transmitted to the corresponding devices.
(c) The processing units for the function devices are as follows:
*1: An error will not occur even when the device number specified by S1 to S5 is not a multiple of 16 at the digit
designation of the bit device.
7-127
EFCALL(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The device specified for the argument cannot be secured for the data size.
(Error code: 4101)
• Following the execution of the EFCALL (P) instruction, an END, FEND, GOEND, or STOP
instruction is executed before the execution of the RET instruction.
(Error code: 4211)
• An RET instruction is executed prior to the execution of the EFCALL (P) instruction.
(Error code: 4212)
• A 17th nesting level is executed. (Error code: 4213)
• The subroutine program of the pointer designated by the EFCALL (P) instruction does not
exist. (Error code: 4210)
• The designated file does not exist. (Error code: 4210)
• The designated file cannot be executed. (Error code: 2411)
Program Example
(1) The following program executes a subroutine program with argument when X0 is ON, and
forces non-execution processing when X20 is turned from ON to OFF.
[Ladder Mode] [List Mode]
Step Instruction Device
7-128
XCALL
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
3
Command
XCALL XCALL Pn S1 to S5
4
Pn : Head pointer number of a subroutine program (Device name)
S1 to S5 : Number of the device to be passed as an argument to a subroutine program (bits, BIN 16 bits, BIN 32 bits) 6
Setting Internal Devices J \ Constants Other
R, ZR U \G Zn
Data Bit Word Bit Word K, H P
P –– –– –– 6
(Other
S1 to S5 ––
than F)
7
Function
8
(1) XCALL instruction executes the subroutine program and performs non-execution processing
of the subroutine program.
(a) Execution of subroutine program
Executes each coil instruction according to ON/OFF status of the condition contacts.
7-129
XCALL
(2) Operation of XCALL instruction varies according to the CPU module type. The following
program example shows the operation of XCALL instruction for each CPU module.
[Program example]
P1 subroutine program
*2: Time during X0 is ON(2)) does not include the time when turning X0 ON (1)).
7-130
XCALL
(3) When function devices (FX, FY, FD) are used by a subroutine program, specify a device with
to corresponding to the function device. The contents to the devices specified by
S1 S5 S1
1
to S5 are as indicated below.
4
(a) Prior to execution of the subroutine program, bit data is transmitted to FX, and word
data is transmitted to FD.
6
(b) After the execution of the subroutine program, the contents of FY and FD are
transmitted to the corresponding devices.
(c) The processing units for the function devices are as follows: 6
• FX, FY: Bits
• FD : 4-word units
7
The size of the data to be dealt with will differ depending on the device specified in the
argument. The device specified as a function device should be secured for the data
size. An error will occur if it cannot be secured for the data size.
8
Function devices Device Data Size Remark
Bit device 1 point
• FX
When Bit Designation has been Made for Word ––––
• FY 1 bit
Device
*3: An error will not occur even when the device number specified by S1 to S5 is not a multiple of 16 at the digit
specification of the bit device.
7-131
XCALL
(7) Up to 16 nesting levels can be used with the XCALL instruction. However, this 16 levels is
the total number of levels in the CALL(P), FCALL(P), ECALL(P), EFCALL(P), and XCALL
instructions.
XCALL P0 X0 P0 P20
END
(8) The device used for the argument of the XCALL instruction must not be used in a subroutine
program.
If used, it will not be possible to perform correct calculations.
(Refer to the following program example.)
The processing to be executed when D1 is used in a subroutine program with D0 designated
for FD0 in a subroutine program is shown below.
[Program example]
Indefinite 0 1 *1 Indefinite
Indefinite 10 10 Indefinite
FD0 FD0 FD0 FD0
Indefinite 100 100 Indefinite
Indefinite 1000 1000 Indefinite
7-132
XCALL
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The device specified for the argument cannot be secured for the data size. 2
(Error code: 4101)
• Following the execution of the XCALL(P) instruction, the END, FEND, GOEND or STOP
instruction is executed before the execution of the RET instruction. 3
(Error code: 4211)
• The RET instruction is executed prior to the execution of the XCALL(P) instruction.
(Error code: 4212) 4
• A 17th nesting level is executed. (Error code: 4213)
• There is no subroutine program for the pointer specified in the XCALL(P) instruction. 6
(Error code: 4210)
Program Example 6
(1) The following program executes a subroutine program with argument when X20 is turned
ON. 7
[Ladder Mode] [List Mode]
7-133
COM
Basic High
performance Process Redundant Universal
COM
Refer to Section 7.6.10 for the COM instruction of the following CPU modules.
• Basic model QCPU of serial No. 04122 or later
• High Performance model QCPU of serial No. 04012 or later
• Process CPU of serial No. 07032 or later
• Redundant CPU
• Universal model QCPU
COM
COM
Function
(1) Use the COM instruction when:
(a) It is desired to increase the speed of transmission/reception processing to/from the
remote I/O stations.
(b) It is desired to ensure reliable data transmission/reception with other stations that use
different scan times during the execution of the data link.
(2) The processing of the COM instruction differs depending on whether the special relay
SM775 is ON or OFF.
• When SM775 is OFF: Performs auto refresh and communication with a peripheral
device *1 *2
• When SM775 is ON: Performs communication with peripheral device only *1
*1: The following processing is performed in communication with peripheral device:
• Monitor processing of other stations
• Read processing by the serial communications module of the buffer memory of another intelligent
function module
*2: The auto refresh includes the following processing:
• Refresh of MELSECNET/10H
• CC-Link refresh
• Auto refresh of intelligent function modules.
7-134
COM
(3) At the point of the execution of the COM instruction, the CPU module temporarily stops the
processing of the sequence program, and performs the same operation as ordinary data
processing as well as auto refresh of intelligent function modules (including link refreshes) at 1
the END processing. However, the low speed cyclic refresh of
MELSECNET/10 or MELSECNET/H is not performed.
Execution of COM instruction Execution of COM instruction 2
0 END 0 END 0
4
(4) The COM instruction can be used in a sequence program any number of times. However,
note that the scan time of the sequence program will be lengthened by the time taken for
communication with peripheral device and the auto refresh (including the link refresh) of the
intelligent function modules.
6
(5) Data communications using the COM instruction
(a) Example of data communications when COM instruction is not used 6
Host station program 0 END 0 END 0 END 0 END 0 END 0 END 0
7
Data communications
(b) Example of data communications when COM instruction has been used
Data communications
1) When the COM instruction is used at the host station, it is possible to increase the number
of data communication repetitions with the remote I/O station unconditionally, as shown in
(b) above, and thus to speed up data communications.
2) In cases where the remote station scan time is longer than the scan time of the host
station, the COM instruction used at the remote station side can avoid the occurrence of
timing failure in which the data cannot be fetched, as shown in (a).
3) When the COM instruction has been used at the other station, a link refresh will be
performed each time that station receives a command from the host station.
Step 0 COM instruction Link refresh can be performed
COM instruction COM instruction once in each of these intervals.
COM instruction END instruction
7-135
COM
(6) If the scan time from the linked station is longer than the sequence program scan time at the
host station, designating the COM instruction at the host station will not increase the speed
of data communications.
END
Link scan
The programs in which the COM instruction cannot be used are shown below:
• Low-speed execution type programs
• Interrupt programs
• Fixed scan execution type programs
Operation Error
(1) There are no operation errors associated with the COM instruction.
7-136
COM
6
COM
COM
Remark
The following processing is performed in communication with peripheral device.
• Monitor processing of other station
• Read of another intelligent function module buffer memory by the serial
communication module
(2) Turning OFF SM775 refreshes all refresh items except I/O refresh.
7-137
COM
b15 b14 b6 b5 b4 b3 b2 b1 b0
SD778 1/0 0 1/0 1/0 1/0 1/0 1/0 1/0
I/O refresh
CC-Link refresh
CC-Link IE controller network,
MELSECNET/H refresh
Auto refresh of
intelligent function module
Auto refresh using QCPU standard
area of multiple CPU system
Reading inputs/outputs from the outside
of the multiple CPU system group
Auto refresh using the multiple CPU high speed
transmission area of multiple CPU system
Communication with peripheral devices
Example
To make only the send/receive processing with the remote I/O station faster,
designate MELSECNET/H refresh only.
(Set only b2 and b15 of SD778 to 1 (SD778: 8004H).)
Refresh between the multiple CPUs by the COM instruction is performed under
the following condition.
• Receiving operation from other CPUs : When b4 of SD778 (auto refresh in the
CPU shared memory) is 1.
• Sending operation from host CPU : When b15 of SD778 (communication
with peripheral device is executed/not
executed) is 0
7-138
COM
(4) Upon the execution of the COM instruction, the CPU module suspends the processing of the
sequence program, and refreshes the designated refresh item. 1
Execution of COM Execution of COM
instruction instruction
0 END 0 END 0
2
3
Refreshes the designated Refreshes the designated
refresh items refresh items
(5) The COM instruction can be used in a sequence program any number of times.
However, note that the sequence program scan time will be lengthened by the time taken for
refresh time of the communication with peripheral devices and refresh item that are selected 4
in SD778.
(6) Only with the Universal model QCPU, interruption is enabled during the execution of the
COM instruction. However, note that the data can be separated if the refresh data is used by
6
an interrupt program etc.
(7) With the Built-in Ethernet port QCPU, service processing time may be increased if the
processing was executed by the COM instruction while the built-in Ethernet ports are in
6
Ethernet connection.
(8) Refresh items for the COM instruction are indicated in the following table.
7
CPU Module Type Function
Serial No. SM775 Refresh Item
Name Version
Q00JCPU A
"04021" or
lower
OFF
ON
Refreshes all of the refresh items.
Communication with peripheral device only.
8
Q00CPU
"04122" or OFF Refreshes all of the refresh items.
Q01CPU B
higher ON Refreshes the refresh items selected by SD778.
7-139
COM
1. The COM instruction cannot be used in low speed execution type programs,
fixed scan execution type programs or interrupt programs.
2. For the redundant CPU, there are restrictions on use of the COM instruction.
Refer to the manual below for details.
• QnPRHCPU User's Manual (Redundant System)
7-140
CCOM
Ver.
Basic High
performance Process Redundant Universal 2
QnU(D)(H)CPU: The serial number (first five digits) is "10102" or later.
QnUDE(H)CPU: The serial number (first five digits) is "10102" or later.
3
Command
CCOM CCOM 4
Command
CCOMP CCOMP
6
Setting Internal Devices J \
Z, ZR U \G Zn Constants Other
Data
––
Bit Word Bit Word
––
6
Function 7
(1) When the CCOM(P) instruction is executed, the following refresh operations can be
executed. 8
• I/O refresh
• CC-Link refresh
• CC-Link IE controller network refresh
7-141
CCOM
b15 b14 b6 b5 b4 b3 b2 b1 b0
SD778 1/0 0 1/0 1/0 1/0 1/0 1/0 1/0
I/O refresh
CC-Link refresh
CC-Link IE controller network,
MELSECNET/H refresh
Auto refresh of
intelligent function module
Auto refresh using QCPU standard
area of multiple CPU system
Reading inputs/outputs from the outside
of the multiple CPU system group
Auto refresh using the multiple CPU high speed
transmission area of multiple CPU system
Communication with peripheral devices
7-142
CCOM
(4) On the execution of the CCOM (P) instruction, the CPU module suspends the processing of
the sequence program, and refreshes the specified refresh item.
Execution of CCOM(P) Execution of CCOM(P)
1
instruction instruction
0 END 0 END 0 2
Refresh specified Refresh specified
in refresh items in refresh items
3
(5) The CCOM(P) instruction can be used in a sequence program any number of times.
However, note that the sequence program scan time will be lengthened by the time taken for
refresh item that are specified in SD778.
4
(6) Interruption is enabled during the execution of the CCOM(P) instruction. However, note that
the data can be separated if the refresh data is used for an interrupt program.
(7) The CCOM(P) instruction is not available for the fixed scan execution type program or 6
interrupt program.
(8) With the Built-in Ethernet port QCPU, service processing time may be increased if the
processing was executed by the CCOM instruction while the built-in Ethernet ports are in 6
Ethernet connection.
Operation Error 7
(1) When the CCOM(P) instruction is executed in the QnUD(H)CPU whose serial number
(first five digits) is "10101" or later, an error occurs. (Error code: 4100) 8
Program Example
(1) Turning on M0 enables the program to execute the select refresh, while turning off M0
7-143
IX,IXEND
Basic High
performance Process Redundant Universal
IX IX S
IXEND I X END
S : Head number of the devices where index modification data is stored (BIN 16 bits)
S –– ––
Function
(1) Performs index modification on all devices in the ladder up to the IXEND instruction after the
IX instruction, using the index modification value specified in the index modification table.
Refer to 7.6.13 for how to configure an index modification table.
The configuration of the index modification table and the corresponding index register
numbers are as shown below:
Index register Index register
Device name Device name
number number
Modification value of timer Modification value of
S Z0 S +8 data register (D)
Z8
(T)
*1: When using a basic model QCPU, index registers with numbers from Z10 onward cannot be used.
7-144
IX,IXEND
(2) Index modification for device numbers is accomplished in the manner as below: By setting a
modification value to each of the devices, the set modification values are added to the all
device numbers of the devices used in the ladder between the IX and IXEND instructions. 1
The program is executed using the index modified device numbers.
Modification value
IX D100
D100 8 T (Z0) 2
X1Z2 M62Z4 Y24 Z3 D101 5 C (Z1)
SET M6Z4 D102 2 X (Z2)
D103 10
3
Y (Z3)
T495Z0 C270Z1B20Z6 D104 10 M (Z4)
MOV K0 D0Z8 D105 20 L (Z5)
D106 16 B (Z6)
X19Z2
D107 20 V (Z7)
Y40Z3
D108 1 D (Z8) 4
IXEND
X3 M72 Y2E
6
SET M16 Value "2" is added to X1 and X9 Processed as X3 and X1B, respectively.
Value "10 (AH)" is added to Y24 and Y40 Processed as Y2E and Y4A, respectively.
Value "10" is added to M6 and M62 Processed as M16 and M72, respectively.
6
T498 C275 B30
MOV K0 D1 Value "16 (10H)" is added to B20 Processed as B30
Value "8" is added to T495 Processed as T498
X1B Value "5" is added to C270 Processed as C275
Y4A Value "1" is added to D0 Processed as D1
(3) Instructions such as the PLS, PLF, and P instructions, which are executed only once 8
when input conditions have been established, cannot be index modified by using the IX to
IXEND instruction loop.
(4) In cases where adding the modification value causes the device number to exceed the
device range, accurate processing will not be conducted.
7-145
IX,IXEND
(8) Whether the program will be expanded or a user needs to create the program is depending
on your GPP function software package.
(a) When a user needs to create the program (When GX Developer is used)
The index register should be added to the index modification ladder established with the
IX and IXEND instructions. *2
IX D100
X1Z2 M62Z4 Y24Z3
SET M6Z4
T495Z0 C270Z1 B20Z6
MOV K0 D0Z8
X19Z2
Y40Z3
IXEND
*2 : The value of Zn is returned to the previous Zn value before the execution of the IX instruction after the IXEND
instruction has been executed.
IX D100 IX D100
X1 M62 Y24 X1Z2 M62Z4 Y24Z3
SET M6 SET M6Z4
Program
T495 C270 B20 expansion T495Z0 C270Z1 B20Z6
MOV K0 D0 (general MOV K0 D0Z8
X19 purpose X19Z2
mode)
Y40 Y40Z3
IXEND IXEND
*3 : The value of Zn is returned to the previous Zn value before the execution of the IX instruction after the IXEND
instruction has been executed.
1. When using the IX and IXEND instructions in both a normal sequence program
and an interrupt sequence program, establish the interlock to avoid
simultaneous execution. The interlock assumes the area between the IX and
IXEND instructions in the normal sequence program as DI, disabling the
interruption.
2. The IXDEV and IXSET instructions can be used to specify modification values.
Refer to 7.6.13 for details.
7-146
IX,IXEND
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The IX and IXEND instructions are not used together. (Error code: 4231) 2
• An END, FEND, GOEND, or STOP instruction is executed prior to the execution of the
IXEND instruction, but after the execution of the IX instruction. (Error code: 4231)
3
Program Example
4
(1) The following program executes the same ladder 10 times, while changing device numbers.
7
Ladder which
executes index
modification 8
[Operation]
Modification value 1st time 2nd time 3rd time 10th time
B0 B1 B2 B9
D100 Modification value of T
X10 X11 X12 X19
D101 Modification value of C Y30 Y31 Y32 Y39
D102 Modification value of X M0 M1 M2 M9
D103 Modification value of Y D0 D1 D2 D9
D104 Modification value of M D10 D11 D12 D19
T3 T4 T5 T12
D105 Modification value of L
C4 C5 C6 C13
D106 Modification value of B D40 D41 D42 D49
D107 Modification value of V
D108 Modification value of D
7-147
IXDEV,IXSET
Basic High
performance Process Redundant Universal
IXDEV IXDEV
IXSET IXSET S D
Dummy contact
S : Head number of the devices where index modification data is stored (pointer only) P (Pointer)
D : Head number of the devices where index modification data will be stored (except a pointer) (BIN 16 bits)
S –– –– ––
D –– –– ––
Function
(1) The IXDEV and IXSET instructions are used to configure an index modification table used in
the IX and IXEND instructions.
(2) The device offset value designated at the offset designation area is set at the index
modification table designated by D .
(3) The value 0 will be entered if no designation is made.
(4) Word devices are also indicated by contact (word device bit designation). Data register 10
(D10) is designated with D10.0.
(Any value from 0 to F can be used for the bit number.)
(5) Designation is made according to the method described below. *1 (The symbol is where
the offset value will be. The notation XX indicates random selection.)
Device T C X Y M L V B
Designation T C X Y M L V B
method
Device D W R U/G J ZR
Designation D .XX R U \G *2
W .XX .XX .XX J \B
method
Device P
Designation *3
IXSET S D
method
*1: When using a basic model QCPU, the devices R, U/G, J, ZR and P cannot be used.
*2: Devices following J \ designate B, W, X, or Y, and the offset value is also set in correspondence with this.
*3: When using a basic model QCPU, specify a dummy device number. S is P .
7-148
IXDEV,IXSET
(6) If two offsets for two identical types of device have been set in the offset designation area,
the last value set will be valid.
1
(7) The IXDEV and IXSET instructions should be treated as a pair.
(8) Any value from 0 to 32767 is valid for ZR. (The offset value will be the remainder of the
quotient of the designated device number divided by 32768.) 2
(9) The dummy contacts in the offset specifying part are valid for only LD and AND located
within the range of the IXDEV-IXSET instructions. The IXDEV-IXSET instructions will not be
executed if other instructions are described. 3
Example
IXDEV
Non-execution processing (outputs OFF) 4
IXSET P3 D0 6
Operation Error 7
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0. 8
• The IXDEV and IXSET instructions have not been used as a pair. (Error code: 4231)
7-149
IXDEV,IXSET
Program Example
(1) The following program changes the modification values for input (X), output (Y), data
register (D) and pointer (P).
When using a basic model QCPU, the devices R, U/G, J, ZR and P cannot be used.
[Ladder Mode] [List Mode]
Step Instruction Device
Index modification
table
D0 4 T
0 C
5 X
3 Y
0 M
0 L
0 B
0 V
8 D
0 W
0
0
D15 0 P
*4: Refer to 7.6.12 for index modification using the IX to IXEND instructions.
7-150
FIFW(P)
4
Command
FIFW FIFW S D
Command 6
FIFWP FIFWP S D
6
S : Data to be written into the table or the number of the device where the data is stored (BIN 16 bits)
D : Head number of the table (BIN 16 bits)
S ––
D –– –– –– ––
8
Function
0 0
S 4321
(2) The first time the FIFW instruction is executed, any values in the designated by D device
should be cleared.
(3) The number of data blocks to be written in the data table and the data table range should be
controlled by the user.
[See Program Example (2)]
7-151
FIFW(P)
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The data table range exceeds the relevant device range when the FIFW instruction is
executed. (Error code: 4101)
Program Example
(1) The following program stores the data at D0 to the data table following R0 when X10 is
turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Table Table
R0 4 Number of stored data blocks R0 5
R1 123 R1 123
R2 55 R2 55
R3 4321 R3 4321
Data table range
R4 11 R4 11
R5 0 R5 257
D0 257
(2) The following program stores the data at X20 to X2F to data table of D38 to D44 table when
X1B is turned ON, and, if there are more than 6 data blocks to be stored, turns Y60 ON and
disables the FIFW instruction.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Table Table
D38 5 Number of stored data blocks D38 6
D39 1000 D39 1000
D40 8100 D40 8100
D41 4321 D41 4321
Data table range
D42 1234 D42 1234
D43 123 D43 123
D44 0 D44 4444
D45 0 D45 0
7-152
FIFR(P)
3
Command
FIFR FIFR S D
Command 4
FIFRP FIFRP S D
S : Head number of the devices where the data read from the table will be stored (BIN 16 bits)
6
D : Head number of the table (BIN 16 bits)
Setting
Data
Internal Devices
R, ZR
J \
U \G Zn Constants Other 6
Bit Word Bit Word
S ––
D –– –– –– 7
Function 8
(1) Stores the oldest data ( D +1) input to the table designated by D at the device designated by
S .
After the execution of the FIFR instruction, the data in the table is all compressed up by one
0 0
S 5432
(2) Users should attempt to avoid executing the FIFR instruction if the value stored at D is 0.
[See Program Example (1)]
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The FIFR instruction was executed when the value at D was 0. (Error code: 4100)
• The data table range exceeded the corresponding device range at execution of the FIFR
instruction. (Error code: 4101)
7-153
FIFR(P)
Program Example
(1) The following program stores the R1 data from the table R0 to R7 at D0 when X10 is turned
ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Data table Data table
R0 5 Number of stored data blocks R0 4 Number of stored data blocks
R1 123 R1 55
R2 55 R2 4321
R3 4321 R3 123
R4 123 R4 234 Data table
R5 234 R5 0
R6 0 R6 0
R7 0 R7 0
D0 123
(2) The following program stores the data at D0 in the data table D38 to D43, and, when the
table stores 5 data, stores the data at D39 of the data table in R0, when X1C is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Data table Data table Data table
Number of Number of Number of
D38 4 stored D38 5 stored D38 4 stored
data tables data tables data tables
D39 1234 D39 1234 D39 55
D40 55 D40 55 D40 1000 Executes the FIFWP
D41 1000 D41 1000 D41 123 instruction when X1C
Data turns ON again
D42 123 D42 123 D42 4444
table
D43 0 D43 4444 D43 0
D44 0 D44 0 D44 0
D45 0 D45 0 D45 0
7-154
FPOP(P)
Command
3
FPOP FPOP S D
Command
FPOPP S D
4
FPOPP
S : Head number of the devices where the data read from the table will be stored (BIN 16 bits) 6
D : Head number of the table (BIN 16 bits)
Internal Devices
Setting
Data Bit Word
R, ZR
Bit
J \
Word
U \G Zn Constants Other 6
S ––
D –– –– ––
7
Function 8
(1) Stores the newest data input to the table designated by D at the device designated by S .
After the execution of the FPOP instruction, the device storing the data read by the FPOP
instruction is reset to 0.
-1000 -1000
D +7 -4321 D +7 0 Stores 0.
0 0
S -4321
(2) Perform interlock to avoid executing the FPOP instruction when the value stored at D is 0.
[See Program Example (1)]
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The FPOP instruction was executed when the value of D was 0. (Error code: 4100)
• The data table range exceeded the corresponding device range at execution of the FPOP
instruction. (Error code: 4101)
7-155
FPOP(P)
Program Example
(1) The following program stores the data stored last in the data table R0 to R7 at D0 when X10
is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Data table Data table
R0 5 R0 4
R1 -123 R1 -123
R2 1400 R2 1400
R3 1234 R3 1234
R4 5432 R4 5432
R5 3000 R5 0 Stores 0.
R6 0 R6 0
R7 0 R7 0
D0 3000
(2) The following program stores the data at D0 in the data table D38 to D43 when X1C is
turned ON, and when the number of data stores in the table reaches 5, turns X1D ON, and
stores the data stored last in the data table to R0.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Data table Data table Data table
D38 4 D38 5 D38 4 Since the number of
D39 1234 D39 1234 D39 1234 stored data block is 4, the
D40 55 X1C:ON D40 55 X1D:ON D40 55 FIFWP instruction is
Data table
D41 1000 D41 1000 D41 1000 executed when XIC turns ON
range
D42 123 D42 123 D42 123
D43 0 D43 4444 D43 0
D44 0 D44 0 D44 0
D45 0 D45 0 D45 0
7-156
FDEL(P),FINS(P)
Basic High
performance Process Redundant Universal
2
3
indicates an instruction symbol of FDEL/FINS.
Command 4
FDEL, FINS S D n
Command
FDELP, FINSP P S D n 6
S : Head number of the devices where data to be inserted is stored (BIN 16 bits) 6
Head number of the devices where the data to be deleted will be stored (BIN 16 bits)
D : Head number of the table (BIN 16 bits)
n : Location on the table where data is inserted/deleted (BIN 16 bits)
S –– ––
D –– –– –– ––
8
n ––
7.7.4 Deleting and inserting data from and in data tables (FDEL(P),FINS(P))
7.7 Data Table Operation Instructions
Function
FDEL
(1) Deletes the nth block of data from the data table designated by D , and stores it at the
device designated by S .
After the execution of the FDEL instruction, the data in the table following the deleted block
is compressed forward by one block.
Data table Data table
D 4 D 3
D +1 5432 D +1 5432
D +2 3333 D +2 3333
D +3 4444 D +3 1234
D +4 1234 D +4 0 Stores 0.
D +5 0 D +5 0
0 0
If n=3, data
at D +3 is deleted. S 4444
7-157
FDEL(P),FINS(P)
FINS
(1) Inserts the 16-bit data designated by S at the nth block of the data table designated by D .
After the execution of the FINS instruction, the data in the table following the inserted block
is all dropped one position.
Data table Data table
D 3 Number of stored D 4
D +1 5432 data blocks D +1 5432
D +2 1234 D +2 4444 Data table range
D +3 123 D +3 1234
D +4 0 D +4 123
D +5 0 D +4 0
0 0
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The Nth position from D is larger than the data storage number at the execution of the
FDEL instruction. (Error code: 4101)
• The Nth position from D is larger than the "data storage number + 1" at the execution of
the FINS instruction. (Error code: 4101)
• The value of n in the case of the FDEL, FINS instruction exceeds the device range of the
table D . (Error code: 4101)
• The FDEL or FINS instruction was executed when n 0. (Error code: 4100)
• The FDEL instruction was executed when the value of D was 0. (Error code: 4100)
• The data table range exceeded the corresponding device range at execution of the FDEL
or FINS instruction. (Error code: 4101)
7-158
FDEL(P),FINS(P)
Program Example
1
(1) The following program deletes the second data from the table R0 to R7 and stores the
deleted data at D0 when X10 is turned ON.
[Ladder Mode] [List Mode] 2
Step Instruction Device
[Operation] 4
Data table Data table
R0 5 R0 4
X10:ON
R1
R2
-123
4444
R1
R2
-123
3210 Data table
6
Data table R3 R3 range
3210 1234
range
R4 1234 R4 5432
R5
R6
5432
0
R5
R6
0
0
6
R7 0 R7 0
D0 4444
7
(2) The following program inserts the data at D0 into the third position at the table R0 to R7
when X10 is turned ON. 8
[Ladder Mode] [List Mode]
Step Instruction Device
7.7.4 Deleting and inserting data from and in data tables (FDEL(P),FINS(P))
7.7 Data Table Operation Instructions
[Operation]
Data table Data table
R0 4 R0 5
X10:ON
R1 1234 R1 1234
R2 4444 R2 4444
R3 -123 R3 -3210
Data table
R4 5000 R4 -123
range
R5 0 R5 5000
R6 0 R6 0
R7 0 R7 0
D0 -3210
7-159
FROM(P),DFRO(P)
Basic High
performance Process Redundant Universal
Command
FROM, DFRO n1 n2 D n3
Command
FROMP, DFROP P n1 n2 D n3
n1
n2 ––
D –– ––
n3 ––
Function
FROM
(1) Reads the data in n3 words from the buffer memory address designated by n2 of the
intelligent function module designated by n1, and stores the data into the area starting from
the device designated by D .
Intelligent function module
buffer memory Device designated CPU module
n2 by D
n3 words n3 points
7-160
FROM(P),DFRO(P)
DFRO
(1) Reads the data in (n3 2) words from the buffer memory address designated by n2 of the 1
the intelligent function module designated by n1, and stores the data into the area starting
from the device designated by D .
Intelligent function module
2
buffer memory CPU module
Device designated
n2
n2+1
by D
3
(n3 2) words (n3 2) points
6
Data read from intelligent function modules is also possible with the use of an
intelligent function module device. 6
For the intelligent function module device, refer to the QnUCPU User's Manual
(Function Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU
User's Manual (Function Explanation, Program Fundamentals). 7
Operation Error 8
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• There has been no exchange of signals with an intelligent function module at the
7.8.1 Reading 1-/2-word data from the intelligent function module (FROM(P),DFRO(P))
7.8 Buffer memory access instruction
execution of the instruction. (Error code: 1412)
• An error has been detected in an intelligent function module at the execution of the
instruction. (Error code: 1402)
• The I/O number designated by n1 is not for the intelligent function module.
(Error code: 2110)
• The range of n3 points (2 n3 points for DFRO) from the device designated by D
exceeds the designated device range. (Error code: 4101)
• The address designated by n2 is outside the buffer memory range.
(Error code: 4101)
7-161
FROM(P),DFRO(P)
Program Example
(1) The following program reads the digital value of CH1 of the A68AD mounted at I/O numbers
040 to 05F into D0 when X0 is turned ON. (Reads 1 word of data from address 10 of the
buffer memory.)
[Ladder Mode] [List Mode]
Step Instruction Device
(2) The following program reads the X-axis present value of the AD71 mounted at the I/O
numbers 040 to 05F into D0 and D1, when X0 is turned ON. (Reads data in 2 words from
the address 602 and 603 of the buffer memory.)
[Ladder Mode] [List Mode]
Step Instruction Device
Remark
1. The value of n1 is specified by the upper 3 digits of hexadecimal 4-digit
representation of the head I/O number of the slot in which an intelligent
function module is mounted.
Power supply module
CPU module
Q Q
Q Q Q Q 68 Q Q
X X X X A Y Y Y
10 10 10 10 D 41 10 10
V P
7-162
TO(P),DTO(P)
3
indicates an instruction symbol of TO/DTO.
Command
TO, DTO n1 n2 S n3
4
Command
TOP, DTOP P n1 n2 S n3
6
n1 : Head I/O number of an intelligent function module (BIN 16 bits)
n2 : Head address of the area where data is written (BIN 16 bits)
S : Data to be written or head number of the devices where the data to be written is stored (BIN 16/32 bits) 6
n3 : Number of data blocks to be written (BIN 16 bits)
n2 ––
S –– –– 8
n3 ––
Function
When a constant is designated to S , writes the same data (value designated to S ) to the area
of n3 points starting from the specified buffer memory. ( S can be designated in the following
range: -32768 to 32767 or 0H to FFFFH.)
Intelligent function module
buffer memory
CPU module 0
S 5
(When 5 is designated to S ) n2 5
5 n3 words
5 (The same data is written)
7-163
TO(P),DTO(P)
DTO
Writes the data stored in n3 2 points starting from the device designated by S into the area
starting from buffer memory address designated by n2 of the intelligent function module
designated by n1.
Intelligent function module
CPU module buffer memory
Device designated 0
by S
n2
n2+1
(n3 x 2) (n3 x 2)
points words
When a constant is designated to S , writes the same data (value designated to S ) to the area
of n3 2 points starting from the specified buffer memory. ( S can be designated in the following
range: -2147483648 to 2147483647 or 0H to FFFFFFFFH.)
Intelligent function module
buffer memory
CPU module 0
S 70000
n2
70000
(When 70000 is designated to S ) n2+1
70000 (n3 x 2) words
(The same data is written)
70000
Data write to intelligent function modules is also possible with the use of an
intelligent function module device.
For the intelligent function module device, refer to the QnUCPU User's Manual
(Function Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU
User's Manual (Function Explanation, Program Fundamentals).
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• There has been no exchange of signals with an intelligent function module at the
execution of the instruction. (Error code: 1412)
• An error has been detected in an intelligent function module at the execution of the
instruction. (Error code: 1402)
• The I/O number designated by n1 is not for the intelligent function module.
(Error code: 2110)
• The n3 points (2 n3 points for DTO) of the device designated by S exceed the
designated device range. (Error code: 4101)
• The address designated by n2 is outside the buffer memory range.
(Error code: 4101)
• The address designated by n2 is an odd numbered address. (AJ71QC24(N))
(Error code: 4100)
7-164
TO(P),DTO(P)
Program Example
1
(1) The following program sets the CH1 and CH2 of the Q68ADV mounted at the I/O numbers
040 to 04F to the "A/D conversion" mode, when X0 is turned ON.
(Writes 3 into the buffer memory address 0.) 2
[Ladder Mode] [List Mode]
Step Instruction Device
3
4
(2) The following program sets the X-axis current value of the AD71 mounted at I/O numbers
040 to 05F to 0 when X0 is turned ON. (Writes 0 to addresses 41, 42 of the buffer memory.) 6
[Ladder Mode] [List Mode]
Step Instruction Device
6
7
Remark
1. The value of n1 is specified by the upper 3 digits of hexadecimal 4-digit
8
representation of the head I/O number of the slot in which an intelligent
function module is mounted.
CPU module
Power supply module
Q Q
Q Q Q Q 68 Q Q
Y
7-165
PR
High
Basic performance Process Redundant Universal
Command
PR PR S D
S : ASCII code or head number of the devices where the ASCII code is stored (character string)
D : Head number of the output module to which the ASCII code will be output (bits)
S –– *1 –– ––
D (Only Y) –– –– –– ––
*1: Local devices and the file registers set for individual programs cannot be used.
Function
(1) Outputs ASCII code stored in the device specified by S or ASCII code stored in the area
startings from the device number to an output module specified by D .
The number of characters output differs according to the ON/OFF status of SM701
(number of output characters selection).
(a) If SM701 is ON, characters 8 points (16 characters) from the device designated by S
S +2 46 H (F) 45 H (E)
S +3 48 H (H) 47 H (G)
S +4 4A H (J) 49 H (I)
S +5 ASCII code output
4CH (L) 4B H (K)
Printer or
S +6 4E H (N) 4DH (M)
S +7 display device
50 H (P) 4F H (O) D +7
D +8
Strobe signal output
Sequence D +9
Flag indicating PR
program instruction in execution
Used as interlock
7-166
PR
(b) If SM701 is OFF, everything from the device designated by S to the 00H code will be
the target of the operation. 1
Device where ASCII code is stored
b15
Upper 8 bits
b8 b7
Lower 8 bits
b0 Output Y
2
S +0 42 H (B) 41 H (A) Head of output D
S +1 44 H (D) 43 H (C)
3
4CH
4B H
4A H
49 H
48 H
47 H
46 H
45 H
44 H
43 H
42 H
41 H
S +2 46 H (F) 45 H (E)
S +3 48 H (H) 47 H (G)
S +4 4A H (J) 49 H (I)
ASCII code output
S +5 4C H (L) 4B H (K)
S +6 4E H (N) 00 H (NULL)
Scheduled
completion
Printer or
display device
4
S +7 50 H (P) 4F H (O) D +7
D +8
Strobe signal output
Sequence program
Flag indicating PR
D +9 6
instruction in execution
Used as interlock
6
(2) The number of points used by the output module is 10 points from the Y address designated
by D .
(3) Output signals from the output module are transmitted at the rate of 30 ms per character.
7
For this reason, the time required to the completion of the transmission of the designated
number of characters (n) will be 30 ms n (ms).
At 10 ms interrupt intervals, the PR instruction executes data output, strobe signal ON, and 8
strobe signal OFF. The other instructions are executed continuously during a period
between the above processings.
Execution of sequence program PR instruction processing
ON
OFF
Strobe signal
10 ms 10 ms 10 ms 10 ms 10 ms
30 ms
(4) In addition to the ASCII code, the output module also outputs a strobe signal (10 ms ON, 20
ms OFF) from the D + 8 device.
(5) Following the execution of the PR instruction, the PR instruction execution flag ( D + 9
device) remains ON until the completion of the transmission of the designated number of
characters.
(6) The PR and PRC instructions can be used multiple times, but it is preferable to establish an
interlock with the PR instruction execution flag ( D + 9 device) so that they will not be ON
simultaneously.
(7) If the contents of the device in which ASCII codes are stored changes during the ASCII code
output, the modified data after change will be output.
7-167
PR
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• There is no 00H code within the range of the device specified by S when SM701 is OFF.
(Error code: 4101)
Program Example
(1) The following program converts the string "ABCDEFGHIJKLMNOP" to ASCII code when X0
is turned ON and stores it from D0 to D7, and then outputs the ASCII code at D0 to D7 to
Y14 to Y1D when X3 is turned ON.
[Ladder Mode]
[List Mode]
Step Instruction Device
[Timing Chart]
ON
OFF
X0
$MOV "ABCDEFGH" D0
A B P
Y14
ASCII code 41H 42H 50H
Y1B
10 10
10 ms ms ms
10 ms
PR instruction
OFF
Strobe signal Y1C
ON
OFF
PR instruction in PR instruction in execution 480 ms
execution flag Y1D
7-168
PRC
Command 4
PRC PRC S D
6
S : Head number of the device which prints the comment (Device name)
D : Head number of the output module which outputs the comment (bits)
S –– ––
D (Only Y) –– –– –– –– –– 7
Function 8
(1) Outputs comment (ASCII code) at device designated by S to output module designated by
D .
PRC X1 Y30
Comment at X1
Output Y
A B C D E F G H I K K L M n O
Y30
Head of output
Printer or
display device
Y37
Y38
Strobe signal output
Sequence Y39
program Flag indicating PRC
instruction in execution
Used as interlock
7-169
PRC
[Timing Chart]
A B C n O
Y30 to Y37 Preprocessing 41H 42H 43H 4EH 4FH
(several scans) 30 ms
ON
OFF
PRC
ON
Y38 OFF
(Strobe signal) 10 10 10
ms ms ms
ON
Y39 OFF
(Flag indicating strobe 30ms x 16 = 480 ms
signal is being output)
ON
SM721 OFF
(File access in
progress flag) PRC instruction cannot be executed again.
ON
SM720 OFF
(File access
completion flag) None of Instructions other than PRC instruction (SP.FREAD,
instructions can SP.FWRITE, PUNROAD, PLOAD, PSWAPP) can be executed.
be executed.
(2) Output signals from the output module are transmitted at the rate of 30 ms per character.
For this reason, the time required to the completion of the transmission of the designated
number of characters will be 30 ms n (ms).
At 10ms interrupt intervals, the PRC instruction executes data output, strobe signal ON, and
strobe signal OFF. The other instructions are executed continuously during a period
between the above processings.
Execution of sequence program Processing of PRC instruction
Data output
ON
OFF
Strobe signal
10 ms 10 ms 10 ms 10 ms 10 ms
30 ms
(3) In addition to the ASCII code, the output module also outputs a strobe signal (10 ms ON, 20
ms OFF) from the D + 8 device.
(4) Following the execution of the PRC instruction, the PRC instruction execution flag ( D + 9
device) remains ON until the completion of the transmission of the designated number of
characters.
(5) The PRC instruction can be used multiple times, but it is preferable to establish an interlock
with the PRC instruction execution flag ( D + 9 device) so that they will not be ON
simultaneously.
(6) If no comments have been registered at the device designated by S , processing will not be
performed.
(7) When a comment is read, SM720 turns ON for one scan after the instruction is completed.
SM721 turns ON during the execution of the instruction.
The PRC instruction cannot be executed while SM721 is ON. If the attempt is made, no
processing is performed.
7-170
PRC
1. For device comments used with the PRC instruction, use comment files stored 1
in the memory card Standard Rom.
Comment files stored in the program memory cannot be used.
2. The comment file used by the PRC instruction is set at the "PLC File Setting" 2
option in the PLC parameter dialog box.
If no comment file has been set for use by the PLC file setting, it will not be
possible to output device comments with the PRC instruction. 3
3. Do not execute the PRC instruction during an interrupt program.
Otherwise, malfunction may occur.
4
Operation Error 6
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The PRC instruction is executed while a comment is written during RUN.
6
(Error code: 4100)
Program Example 7
(1) Program which outputs the comment of Y60 to Y30 to Y39 when X0 is turned ON.
8
[Ladder Mode] [List Mode]
Step Instruction Device
7-171
LEDR
High
Basic performance Process Redundant Universal
Command
LEDR LEDR
Function
Resets the self-diagnosis error display so that annunciator display or operation can be continued.
With one execution of this instruction, either error display or annunciator is reset.
(1) Operation when self-diagnosis error is generated
(a) If the self-diagnosis error is one which allows continued operation.
If the self-diagnosis error being displayed is one that will allow continued operation of
the CPU module, the "ERROR/ERR." LED or error indication is reset. It will be
necessary to reset SM0, SM1, and SD0 at the user program, because they are not reset
automatically.
Since the cause of the error displayed at this time has a higher priority over annunciator,
no action for resetting the annunciator is taken.
7-172
LEDR
SD77 0
SD78 0 SD78 0
SD79 0 SD79 0
7-173
LEDR
Remark
1. The defaults for the error item numbers set in special registers SD207 to
SD209 and order of priority are given in the table below:
Factor number
Priority Meaning Remarks
(Hexadecimal)
Power supply cut
AC DOWN
Redundant base unit power supply voltage
1 1 SINGLE PS.DOWN
drop
SINGLE PS.ERROR
Redundant power supply module fault
UNIT VERIFY ERR. I/O module verify error
2 2 FUSE BREAK OFF Blown fuse
SP. UNIT ERROR Special function module verify error
OPERATION ERROR [Operation Errors]
LINK PARA.ERROR Link parameter error
3 3
SFCP OPE. ERROR SFC instruction operation error
SFCP EXE. ERROR SFC program execution error
ICM.OPE ERROR Memory card operation error
FILE OPE. ERROR File access error
EXTEND INST. ERROR Extend instruction error
OPE. MODE DIFF. Operation status, switch mismatch
4 4
CAN'T EXE.MODE Current mode-time function execution disabled
TRK.TRANS.ERR. Tracking data transmission error
TRK.SIZE ERROR Tracking capacity excess error
TRK.DISCONNECT Tracking cable not connected, failure
Constant scan setting time over error
5 5 PRG.TIME OVER Low speed execution monitoring tome over
error
6 6 CHK instruction ––
7 7 Annunciators ––
8 8 LED instruction ––
9 9 BATTERY ERR. ––
10 A Clock data ––
CAN'T SWITCH System switching error
11 B STANDBY SYS.DOWN Standby system not started/stop error
MEM.COPY EXE. Memory copy function executed
2. If the highest priority is given to the annunciator, it can be reset with priority by
the LEDR instruction.
7-174
CHKST,CHK
3
High
Basic performance Process Redundant Universal
4
Command
CHKST CHKST
X X X X 6
CHK CHK
X0 X2
When T0 is OFF,
CHK
program jumps to the
instruction next to the
CHK instruction. Y10
CHK
(1) The CHK instruction is the instruction used for the bidirectional operation as shown on the
following page to confirm the nature of the system failure.
(a) When the CHK instruction is executed, a failure diagnosis check is conducted with the
designated check conditions, and if a failure is detected, SM80 is turned ON, and the
failure number is stored at SD80 as a BCD value.
The error code "9010" will be returned if a failure is detected.
The contact number where the failure was discovered is stored at the upper 3 digits of
SD80 (see (3)), and the coil number where the failure was detected (see (2)) is stored at
the lower 1 digit of SD80.
At the detection of failure of
Contact No.: 62, Coil No.: 3
Before the detection of failure After the detection of failure
SM80 OFF SM80 ON
SD80 0 0 0 0 SD80 0 6 2 3
7-175
CHKST,CHK
(b) The contact instruction prior to the CHK instruction does not control the execution of the
CHK instruction, but rather sets the check conditions.
Advance command (X4)
Advance operation
(Y50)
Advance
M Retract operation
(Y51)
Retract
Advance end sensor (X0) Retract end sensor (X1)
turns ON at the detection turns ON at the detection
Retract command (X5)
(c) A ladder such as the one shown below can be created to perform a cycle time over
check for the system shown above:
T0 When T0 is OFF, program jumps to the instruction
CHKST next to the CHK instruction.
X000 Executes CHK instruction when T0 is ON.
CHK
X004 X005 X000
Y050 Advances conveyor 1.
Y050
SET Y000 Turns ON the internal relay used for failure detection.
X005 X004 X001
Y051 Retracts conveyor 1.
Y051
RST Y000 Turns OFF the internal relay used for failure detection.
Y050 X000 K100
T0 Cycle time
Y051 X001 check timer
(d) The following points should be taken into consideration when creating a ladder for use
with the CHK instruction:
1) The contact numbers for the advance edge detection sensor and the retract edge
detection sensor (X ) must always be continuous. Further, the contact number (X )
for the advance edge detection sensor should be lower than that for the retract edge.
2) Controls for the advance edge detection sensor contact number (X ) and output with
the identical number (Y ) *1 are as follows:
When advance operation is in progress .... turn ON
When retract operation is in progress ........ turn OFF
*1: Output (Y ) is treated as an internal relay, and cannot be output to an external device.
7-176
CHKST,CHK
(2) Depending on the designated contact, the CHK instruction undergoes processing identical
to that shown for the ladder below:
TO
1
CHKST
X X
Y
by the retraction end sensor)
X +1 6
Coil No. 4 SET SM80
(4) Reset SM80 and SD80 prior to forcing the execution of the CHK instruction.
After the execution of the CHK instruction, it cannot be performed once again until SM80
and SD80 have been reset.
(The contents of SM80 and SD80 will be preserved until reset by user.)
(5) A CHKST instruction must be placed before the CHK instruction.
An error will be returned if an instruction other than the LD, LDI, AND or ANI instruction is
used between the CHK instruction and the CHKST instruction. (Error code: 4235)
(6) The CHK instruction can be written at any step of the program.
However, there is a limit in the number of uses of the CHK instruction.
• Can be used up to two places in all program files being executed.
• Can be used only one place in a single program file.
An error will be returned if the CHK instruction is used exceeding the number of uses
specified above. (Error code: 4235)
7-177
CHKST,CHK
(7) Place LD and AND instructions prior to the CHK instruction to establish a check condition.
Check conditions cannot be set using other contact instructions.
If a check condition has been set with LDI or ANI, the processing for the check condition
they specify will not be conducted.
However, contact numbers during failure detection can also be allocated to the LDI and ANI
instructions.
Does not execute check
X5 X7 X9 XA X1A X1C
CHK
Contact No. 1 2 3 4
Contact numbers are allocated
(8) The failure detection method differs according to whether SM710 is ON or OFF.
(a) If SM710 is OFF, checks will be conducted of coil numbers 1 to 6 for each contact
successively.
When the CHK instruction is executed, checks will be in order from coil No. 1 of contact
No. 1, through coil No. 6, then move on to contact No. 2 and check the coils in order
from No. 1.
The CHK instruction will be completed when coil No. 6 from contact No. n has been
checked.
(b) If SM710 is ON, checks will be conducted of contact numbers 1 through n, in coil
number order.
When the CHK instruction is executed, checks will begin with the ladder for coil No. 1, in
order from contact No. 1 until contact No. n, then move on to the coil No. 2 ladder and
begin from contact No. 1.
The CHK instruction will be completed when a check has been made through contact
No. n of coil No. 6.
(9) If more than one failure is detected, the number of the first failure detected will be stored.
Failure numbers detected after this will be ignored.
(10) The CHK instruction cannot be used by a low speed execution type program.
If a low speed execution type program has been set in a program file containing the CHK
instruction, an operation error will be returned, and the CPU module operation will be
suspended.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• There is a parallel ladder. (Error code: 4235)
• There is an NOP instruction. (Error code: 4235)
• There are more than 150 contact instructions. (Error code: 4235)
• A CHK instruction is not executed following the CHKST instruction.
(Error code: 4235)
• The CHK instruction is executed when no CHKST instruction has been executed.
(Error code: 4235)
• The CHKST and CHK instruction are used in a low speed execution type program.
(Error code: 4235)
• There is an instruction other than the LD, LDI, AND or ANI instruction between the CHK
instruction and the CHKST instruction. (Error code: 4235)
• The CHK instruction is used at three places or more in all of programs being executed.
(Error code: 4235)
• The CHK instruction is used at two places or more in a single program.
(Error code: 4235)
7-178
CHKCIR,CHKEND
4
Command
CHKST CHKST Refer to
Section
X X X X
7.10.1. 6
CHK CHK
SM400
CHKCIR CHKCIR 6
Fn
7
Ladder pattern to be checked Fn Max. 9 coils
8
Fn
SM400
CHKEND CHKEND
Function
CHKCIR, CHKEND
(1) The check ladder pattern that will be used in the CHK instruction can be updated to any
format desired.
The actual failure checks are conducted with the CHKST and CHK instructions.
(2) Failure checks are conducted according to the check conditions designated by the CHK
instruction and the ladder pattern described between the CHKCIR and CHKEND
instructions.
Remark
Refer to 7.10.1 for more information on the CHKST and CHK instructions.
To change the check format of the CHK instruction using the CHKCIR to CHKEND
instructions, the user should create a ladder with index modification (Z0).
7-179
CHKCIR,CHKEND
(a) The device numbers indicated at check conditions (X2 and X8 in the figure below) will
assume index modification values for the individual device numbers (with the exception
of annunciators (F)) described in the ladder patterns.
Example X10 in the in the figure below would be as follows:
However, the order in which failure detection is executed differs depending on whether
SM710 is ON or OFF.
1) If SM710 is OFF, checks will be conducted of coil numbers 1 through the end for
each contact successively.
[Ladder designated by CHKCIR to CHKEND] [Order of check by CPU module]
X2 X8 XA
CHK F1
Ladder
SM400 Y60 X23 Y48 X1C equivalent to X2
CHKCIR F2
2) If SM710 is ON, checks will be conducted of contact numbers 1 through the end, in
coil number order.
[Ladder designated by CHKCIR to CHKEND] [Order of check by CPU module]
7-180
CHKCIR,CHKEND
(b) Failure checks check the ON/OFF status of OUT F by using the ladder pattern in the
various check conditions. 1
In all check conditions, SM80 will be turned ON if even one of the OUT F is ON in a
ladder pattern.
Further, the error numbers (contact numbers and coil numbers) corresponding to the 2
OUT F which were found to be ON will be stored from SD80 in BCD order.
(c) The instructions that can be used in ladder patterns are as follows:
Contacts ... LD, LDI, AND, ANI, OR, ORI, ANB, ORB, MPS, MPP,MRD, and
3
comparative operation instructions
Coil ........... OUT F 4
(d) The following devices can be used for ladder pattern contacts:
Input (X), Output (Y)
6
(e) Only annunciators (F) can be used in ladder pattern coils.
However, since annunciators (F) are used as a dummy, any value can be set for an
annunciator (F).
6
Further, they can overlap with no difficulties.
(f) ON/OFF controls can be performed without error if an annunciator (F) used during the
execution of the CHK instruction has the same number as an annunciator (F) used in 7
some other context than the CHK instruction. They will be treated differently during the
CHK instruction than they are in the different context.
(g) Since the annunciators (F) used in the CHK instruction do not turn ON/OFF actually,
8
they will not turn ON/OFF if monitored by a peripheral device.
F
Coil No. 1
F
Coil No. 2
to
F
Coil No. 8
F
Coil No. 9
SM400
CHKEND
7-181
CHKCIR,CHKEND
(4) The CHKCIR and CHKEND instructions can be written at any step in the program desired.
It can be used in up to two locations in all program files being executed.
However, the CHKCIR and CHKEND instructions cannot be used in more than 1 location in
a single program file.
(5) The CHKCIR and CHKEND instructions cannot be used in low speed execution type
programs.
If a program file in which the CHKCIR or CHKEND instruction is described is set as a low
speed execution type program, an operation error will occur, and the High Performance
model QCPU/Process CPU/Redundant CPU operation will be suspended.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The CHKCIR or CHKEND instruction appears three or more times in all program files.
(Error code: 4235)
• The CHKCIR or CHKEND instruction appears two or more times in a single program file.
(Error code: 4235)
• The CHKEND instruction is not executed following the execution of the CHKCIR
instruction. (Error code: 4230)
• The CHKEND instruction is executed although no CHKCIR instruction has been
executed. (Error code: 4230)
• The CHKST and CHK instruction are used in a low speed execution type program.
(Error code: 4235)
• There are 10 or more F instances in a ladder pattern. (Error code: 4235)
• A ladder pattern has 257 or more steps. (Error code: 4235)
• A device has been encountered which cannot be used in a ladder pattern.
(Error code: 4235)
• Index modification has been conducted on a ladder pattern device.
(Error code: 4235)
7-182
BINDA(P),DBINDA(P)
High
3
Basic performance Process Redundant Universal
4
indicates an instruction symbol of BINDA/DBINDA.
Command
6
BINDA, DBINDA S D
BINDAP, DBINDAP
Command
P S D
6
D –– –– ––
For example, if 12345 has been designated at S , the following will be stored from D
onward:
b15 b8 b7 b0
D 31H (1) 2DH ( )
b15 b0
D +1 33H (3) 32H (2)
S 1 2 3 4 5
D +2 35H (5) 34H (4)
D +3 00H
(2) The BIN data designated at S can be in the range from 32768 to 32767.
7-183
BINDA(P),DBINDA(P)
(b) The sign "20H" will be stored for the leading zeros of effective digits. (Zero suppression
is conducted.)
00325
Number of significant digits
20H is set
(c) The storage of data at devices specified by D +3 differs depending on the ON/OFF
status of SM701 (output number of characters conversion signal).
When SM701 is OFF......Stores "0"
When SM701 is ON ......Does not change
DBINDA
(1) Converts the individual digit numbers of decimal notation of the BIN 32-bit data designated
by S into ASCII codes, and stores the results into the area starting from the device
designated by D .
b15 b8b7 b0
D ASCII code for billions place Sign
D +1 ASCII code for ten-millions place ASCII code for hundred-mil ions place
S +1 S
D +2 ASCII code for hundred-thousands place ASCII code for millions place
Upper 16 bits Lower 16 bits
D +3 ASCII code for thousands place ASCII code for ten-thousands place
BIN 32-bit data D +4 ASCII code for tens place ASCII code for hundreds place
D +5 0 or 20 H ASCII code for units place
When SM701 is OFF 0
When SM701 is ON 20 H
For example, if the value 12345678 has been designated by S , the following would be
stored into the area starting from D :
b15 b8b7 b0
D 20H (space) 2D H ( )
D +1 31H (1) 20 H (space)
S +1 S
D +2 33H (3) 32 H (2)
12 3 4 5 6 7 8
D +3 35H (5) 34 H (4)
D +4 37H (7) 36 H (6)
D +4 0 or 20 H 38 H (8)
(3) The operations results stored at D will be stored in the following way:
(a) The sign "20H" will be stored if the BIN data is positive, and the sign "2DH" will be stored
if it is negative.
(b) The sign "20H" will be stored for the leading zeros of effective digits. (Zero suppression
is conducted.)
0012034560
20H Number of significant digits
(c) The data stored at the upper 8 bits of the device designated by D +5 differs depending
on the ON/OFF status of SM701 (number of characters to output select signal).
When SM701 is OFF......Stores "0"
When SM701 is ON .......Stores "20H"
7-184
BINDA(P),DBINDA(P)
Operation Error
1
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by D exceeds the range of the corresponding device.
2
(For the Universal model QCPU only.) (Error code: 4101)
3
Program Example
(1) The following example program uses the PR instruction to output the 16-bit BIN data W0
value by decimal to Y40 to Y48 as ASCII.
4
[Ladder Mode] [List Mode]
7
[Operation]
Conducts ASCII output of Y40 to Y48 by using the PR instruction when X0 goes ON. 8
Because SM701 is OFF, the PR instruction will output ASCII code until 00H is encountered.
b15 b8 b7 b0
D0 20 H(space) 20 H(space)
W0 PR
D1 31 H (1) 35 H (5)
5126 Y40 to Y48
(2) The following program uses the PR instruction to output the decimal value of the 32-bit BIN
data at W10 and W11 in ASCII code to Y40 to Y48.
[Ladder Mode] [List Mode]
[Operation]
Conducts ASCII output of Y40 to Y48 by using the PR instruction when X0 goes ON.
Because SM701 is OFF, the PR instruction will output ASCII code until 00H is encountered.
b15 b8 b7 b0
D0 20 H (space) 2D H ( )
PR
D1 20 H (space) 20 H (space)
W11 W10 Y40 to Y48
D2 38 H (8) 33 H (3) - 3842563
3 8 4 2 5 6 3
D3 32 H (2) 34 H (4) is output.
BIN value
D4 36 H (6) 35 H (5)
D5 00 H 33 H (3)
7-185
BINHA(P),DBINHA(P)
High
Basic performance Process Redundant Universal
Command
BINHA, DBINHA S D
Command
BINHAP, DBINHAP P S D
S ––
D –– –– ––
Function
BINHA
(1) Converts the individual digit numbers of hexadecimal notation of the BIN 16-bit data
designated by S into ASCII codes, and stores the results into the area starting from the
device designated by D .
b15 b8b7 b0
b15 b0 D ASCII code for the 3rd digit ASCII code for the 4th digit
S D +1 ASCII code for the 1st digit ASCII code for the 2nd digit
D +2 0 Only when
BIN 16-bit data SM701 is OFF
b15 b8 b7 b0
b15 b0 D 32H (2) 30H (0)
S 02A6H D +1 36H (6) 41H (A)
D +2 00H
(2) The BIN data designated by S can be in the range from 0H to FFFFH.
(3) The operation results stored at D are processed as 4-digit hexadecimal values.
For this reason, zeros which are significant digits on the left side of the value are processed
as "0". (No zero suppression is conducted.)
(4) The data to be stored at the device designated by D +2 differs depending on the ON/OFF
status of SM701 (number of characters to output select signal).
When SM701 is OFF......Stores "0"
When SM701 is ON .......Does not change
7-186
BINHA(P),DBINHA(P)
DBINHA
(1) Converts the individual digit numbers of hexadecimal notation of the BIN 32-bit data 1
designated by S into ASCII codes, and stores the results into the area starting from the
device designated by D .
b15 b8b7 b0
2
D ASCII code for the 7th digit ASCII code for the 8th digit
S +1 S D +1 ASCII code for the 5th digit ASCII code for the 6th digit
For example, if the value 03AC625EH has been designated by S , it would be stored 4
following D in the following manner:
D
b15
33H (3)
b8 b7
30H (0)
b0
6
D +1 43H (C) 41H (A)
S +1 S
D +2 32H (2) 36H (6)
0 3 A C 6 2 5EH
D
D
+3
+4
45H (E)
00H
35H (5)
6
(2) The BIN data designated by can be in the range from 0H to FFFFFFFFH.
7
S
(3) The operation results stored at D are processed as 8-digit hexadecimal values.
For this reason, zeros which are significant digits on the left side of the value are processed
as "0". (No zero suppression is conducted.) 8
(4) The data to be stored at the device designated by D +2 differs depending on the ON/OFF
status of SM701 (number of characters to output select signal).
When SM701 is OFF......Stores "0"
When SM701 is ON .......Does not change
7.11.2 Conversion from BIN 16-bit or 32-bit data to hexadecimal ASCII (BINHA(P),DBINHA(P))
7.11 Character string processing instructions
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
7-187
BINHA(P),DBINHA(P)
Program Example
(1) The following program uses the PR instruction to output the hexadecimal value of the 16-bit
BIN data at W0 in ASCII code to Y40 to Y48.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Conducts ASCII output of Y40 to Y48 by using the PR instruction when X0 goes ON.
Because SM701 is OFF, The PR instruction will output ASCII code until 00H is encountered.
b15 b8b7 b0
W0 D0 43H (C) 39H (9) PR
9C06 H D1 36H (6) 30H (0) Y40 to Y48
BIN value D2 00H Outputs "9C06"
(2) The following program uses the PR instruction to output the hexadecimal value of the 32-bit
BIN data at W10 and W11 to Y40 to Y48.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
Conducts ASCII output of Y40 to Y48 by using the PR instruction when X0 goes ON.
Because SM701 is OFF, The PR instruction will output ASCII code until 00H is encountered.
b15 b8b7 b0
D0 42H (B) 37H (7)
W11 W10 D1 43H (C) 33H (3) PR
7 B 3 C 5 8 1 FH D2 38H (8) 35H (5) Y40 to Y48
D3 46H (F) 31H (1) Outputs "7B3C581F"
D4 00H
7-188
BCDDA(P),DBCDDA(P)
7.11.3 Conversion from BCD 4-digit and 8-digit to decimal ASCII data
(BCDDA(P),DBCDDA(P)) 1
BCDDA(P),DBCDDA(P)
High
2
Basic performance Process Redundant Universal
3
indicates an instruction symbol of BCDDA/DBCDDA.
Command 4
BCDDA,DBCDDA S D
Command
BCDDAP,DBCDDAP P S D 6
D –– –– ––
8
Function
BCDDA
7.11.3 Conversion from BCD 4-digit and 8-digit to decimal ASCII data (BCDDA(P),DBCDDA(P))
7.11 Character string processing instructions
(1) Converts the individual digit numbers of hexadecimal notation of the BCD 4-digit data
designated by S into ASCII codes, and stores the results into the area starting from the
device designated by D .
b15 b8 b7 b0
b15 b12 b11 b8 b7 b4 b3 b0 D ASCII code for hundreds place ASCII code for thousands place
S D +1 ASCII code for units place ASCII code for tens place
D +2 0
Thousands Hundreds Tens Units
place place place place Only when SM701 is OFF
For example, when "9105" is designated for S , the results of the operation are stored into
the area starting from D in the following manner:
b15 b8b7 b0
b15 b12b11 b8 b7 b4b3 b0 D 31H (1) 39H (9)
S 9 1 0 5 D +1 35H (5) 30H (0)
D +2 00H
(2) The BCD data designated by S can be in the range of from 0 to 9999.
(3) The results of calculation stored in the device D . All zeros on the left side of the "Number of
significant digits" are zero-suppressed.
0050
Number of significant digits
20H
7-189
BCDDA(P),DBCDDA(P)
(4) The data to be stored at the device designated by D +2 differs depending on the ON/OFF
status of SM701 (number of characters to output select signal).
When SM701 is OFF......Stores "0"
When SM701 is ON .......Does not change
DBCDDA
(1) Converts the individual digit numbers of hexadecimal notation of the BCD 8-digit data
designated by S into ASCII codes, and stores the results into the area starting from the
device designated by D .
b15 b8b7 b0
S +1 S D ASCII code for millions place ASCII code for ten-millions place
b31 b28b27 b24b23 b20b19 b16 b15 b12b11 b8 b7 b4 b3 b0 D +1 ASCII code for ten-thousands place ASCII code for hundred-thousands place
D +2 ASCII code for hundreds place ASCII code for thousands place
D +3 ASCII code for unit place ASCII code for tens place
Ten Millions Hundred Ten Thou- Hundreds Tens Units
millions place thou- thou- sands place place place 0 (Only when
place sands sands place SM701 is OFF)
place place
For example, if the value 01234056 is designated by S , the operation result would be
stored following D in the following manner:
b15 b8b7 b0
D 31H (1) 20H
b31 b28b27 b24b23 b20b19 b16 b15 b12 b11 b8b7 b4 b3 b0 D +1 33H (3) 32H (2)
0 1 2 3 4 0 5 6 D +2 30H (0) 34H (4)
D +3 36H (6) 35H (5)
S +1 S
D +4 00H
(3) The results of calculation stored in the device D . All zeros on the left side of the "Number of
significant digits" are zero-suppressed.
00012098
Number of significant digits
20H
(4) The data to be stored at the device designated by D +4 differs depending on the ON/OFF
status of SM701 (number of characters to output select signal).
When SM701 is OFF......Stores "0"
When SM701 is ON .......Does not change
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The data at S during the operation of the BCDDA instruction is outside the range of from
0 to 9999. (Error code: 4100)
• The data at S during the operation of the DBCDDA instruction is outside the range of 0 to
99999999. (Error code: 4100)
• The device specified by D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
7-190
BCDDA(P),DBCDDA(P)
Program Example
1
(1) The following program uses the PR instruction to convert BCD 4-digit data (the value at W0)
to decimal, and outputs it in ASCII format to Y40 to Y48.
[Ladder Mode] [List Mode] 2
Step Instruction Device
6
[Operation]
Conducts ASCII output of Y40 to Y48 by using the PR instruction when X0 goes ON.
Because SM701 is OFF, The PR instruction will output ASCII code until 00H is encountered. 6
b15 b8b7 b0
W0 D0 32H (2) 31H (1) PR
1 2 9 5 D1 35H (5) 39H (9) Y40 to Y48 7
BCD value D2 00H Outputs "1295"
(2) The following program uses the PR instruction to convert BCD 8-digit data (the values at
W10 and W11) to decimal, and outputs it in ASCII format to Y40 to 48. 8
[Ladder Mode] [List Mode]
Step Instruction Device
7.11.3 Conversion from BCD 4-digit and 8-digit to decimal ASCII data (BCDDA(P),DBCDDA(P))
7.11 Character string processing instructions
[Operation]
Conducts ASCII output of Y40 to Y48 by using the PR instruction when X0 goes ON.
Because SM701 is OFF, The PR instruction will output ASCII code until 00H is encountered.
b15 b8b7 b0
D0 35H (5) 33H (3)
W11 W10 D1 37H (7) 34H (4) PR
3 5 4 7 8 3 5 2 D2 33H (3) 38H (8) Y40 to Y48
BCD value D3 32H (2) 35H (5) Outputs "35478352"
D4 00H
7-191
DABIN(P),DDABIN(P)
7.11.4 Conversion from decimal ASCII to BIN 16-bit and 32-bit data
(DABIN(P),DDABIN(P))
DABIN(P),DDABIN(P)
High
Basic performance Process Redundant Universal
Command
S D
DABIN,DDABIN
Command
P S D
DABINP,DDABINP
S : ASCII data to be converted to BIN value or head number of the devices where the ASCII data is stored
(character string)
D : Head number of the devices where the conversion result will be stored (BIN 16/32 bits)
S –– –– ––
D –– ––
Function
DABIN
(1) Converts decimal ASCII data stored into the area starting from the device number
designated by S into BIN 16-bit data, and stores it in the device number designated by D .
b15 b8b7 b0
S ASCII code for ten-thousands place Sign data b15 b0
S +1 ASCII code for hundreds place ASCII code for thousands place D
S +2 ASCII code for units place ASCII code for tens place
BIN 16 bits
For example, if the ASCII code " 25108H" is specified for the area starting from S , the
conversion result is stored at D as shown below:
b15 b8b7 b0
S 32H (2) 2DH ( ) b15 b0
S +1 31H (1) 35H (5) D 2 5 1 0 8
S +2 38H (8) 30H (0)
(2) The ASCII data designated by from S to S +2 can be in the range of from 32768 to 32767
(3) The sign "20H" will be stored if the BIN data is positive, and the sign "2DH" will be stored if it
is negative.
(If other than "20H " and "2DH" is set, it will be processed as positive data.)
(4) ASCII code can be set for each position within the range from "30H" to "39H".
(5) If the ASCII code set for individual positions is "20H" or "00H," it will be processed as "30H".
7-192
DABIN(P),DDABIN(P)
DDABIN
(1) Converts decimal ASCII data stored into the area starting from the device number 1
designated by S into BIN 32-bit data, and stores it in the device number designated by D .
b15 b8b7 b0
S ASCII code for billions place Sign data 2
S +1 ASCII code for ten-millions place ASCII code for hundred-millions place D +1 D
b31 b16b15 b0
S +2 ASCII code for hundred-thousands place ASCII code for millions place
Upper 16 bits Lower 16 bits
S
S
+3 ASCII code for thousands place
+4 ASCII code for tens place
ASCII code for ten-thousands place
ASCII code for hundreds place BIN 32 bits
3
S +5 (Ignored) ASCII code for units place
For example, if the ASCII code of 1234543210H is designated for the area starting from
4
S , the operation result would be stored at D +1 and D in the following manner:
b15 b8b7 b0
S
S +1
31H
33H
(1)
(3)
2DH
32H
( )
(2)
6
D +1 D
S +2 35H (5) 34H (4)
12 34 5 4 3 2 1 0
S +3 33H (3) 34H (4)
S
S
+4
+5
31H (1) 32H
30H
(2)
(0)
6
(2) The ASCII data designated by to +5 can be in the range of from 2147483648 to
2147483647.
S S
7
Further, data stored at the upper bytes of S +5 will be ignored.
(3) The sign "20H" will be stored if the BIN data is positive, and the sign "2DH" will be stored if it 8
is negative.
(If other than "20H " and "2DH" is set, it will be processed as positive data.)
(4) ASCII code can be set for each position within the range from "30H" to "39H".
7.11.4 Conversion from decimal ASCII to BIN 16-bit and 32-bit data (DABIN(P),DDABIN(P))
7.11 Character string processing instructions
(5) If the ASCII code set for individual positions is "20H" or "00H," it will be processed as "30H".
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The ASCII code designated by S to S +5 for the individual numbers is something other
than "30H" to "39H", "20H", or "00H". (Error code: 4100)
7-193
DABIN(P),DDABIN(P)
Program Example
(1) The following program converts the decimal, 5-digit ASCII data and sign set at D20 through
D22 to BIN values, and stores the result at D0.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8b7 b0
D0
D20 20H (space) 2DH ( )
276
D21 32H (2) 20H (space)
(Regarded as -00276) BIN value
D22 36H (6) 37H (7)
- 276
(2) The following program converts the decimal, 10-digit ASCII data and sign set at D20 through
D25 to BIN values and stores the result at D10 and D11.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8b7 b0
D20 20H (space) 20H (space)
D21 20H (space) 20H (space)
D11 D10
D22 39H (9) 33H (3)
3 9 6 8 3 7 0
D23 38H (8) 36H (6)
(Regarded as +0003968370) BIN value
D24 37H (7) 33H (3)
D25 30H (0)
3968370
7-194
HABIN(P),DHABIN(P)
7.11.5 Conversion from hexadecimal ASCII to BIN 16-bit and 32-bit data
(HABIN(P),DHABIN(P)) 1
HABIN(P),DHABIN(P)
High
2
Basic performance Process Redundant Universal
3
indicates an instruction symbol of HABIN/DHABIN.
Command 4
HABIN,DHABIN S D
Command
HABINP,DHABINP P S D 6
S : ASCII data to be converted to BIN value or head number of the devices where the ASCII data is stored 6
(character string)
D : Head number of the devices where the conversion result will be stored (BIN 16/32 bits)
S –– –– ––
D –– –– 8
Function
7.11.5 Conversion from hexadecimal ASCII to BIN 16-bit and 32-bit data (HABIN(P),DHABIN(P))
7.11 Character string processing instructions
HABIN
(1) Converts hexadecimal ASCII data stored in the area starting from the device number
designated by S into BIN 16-bit data, and stores it in the device number designated by D .
b15 b8b7 b0
b15 b0
S ASCII code for the 3rd digit ASCII code for the 4th digit
D
S +1 ASCII code for the 1st digit ASCII code for the 2nd digit
BIN 16 bits
For example, if the ASCII code of 5A8DH is designated for the area starting from S , the
operation result would be stored at D in the following manner:
b15 b8 b7 b0
b15 b0
S 41H (A) 35H (5)
D 5A8DH
S +1 44H (D) 38H (8)
(2) The ASCII data designated by S to S +1 can be in the range of from 0000H to FFFFH.
(3) The ASCII codes can be in the range of "30H" to "39H" and from "41H" to "46H".
7-195
HABIN(P),DHABIN(P)
DHABIN
(1) Converts hexadecimal ASCII data stored in the area starting from the device number
designated by S into BIN 32-bit data, and stores it in the device number designated by D .
b15 b8b7 b0
S ASCII code for the 7th digit ASCII code for the 8th digit D +1 D
b31 b16 b15 b0
S +1 ASCII code for the 5th digit ASCII code for the 6th digit
Upper 16 bits Lower 16 bits
S +2 ASCII code for the 3rd digit ASCII code for the 4th digit
S +3 ASCII code for the 1st digit ASCII code for the 2nd digit BIN 32 bits
For example, if the ASCII code of 5CB807E1H is designated for the area starting from S ,
the operation result would be stored at D +1 and D in the following manner:
b15 b8b7 b0
S 43H (C) 35H (5) D +1 D
b31 b16 b15 b0
S +1 38H (8) 42H (B)
5CB8H 07E1H
S +2 37H (7) 30H (0)
S +3 31H (1) 45H (E)
(2) The ASCII data designated by S to S +3 can be in the range of from 00000000H to
FFFFFFFFH.
(3) The ASCII codes can be in the range of "30H" to "39H" and from "41H" to "46H".
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The ASCII codes for the individual numbers designated by S to S +3 are outside the
range of from "30H" to "39H" and from "41H" to "46H". (Error code: 4100)
7-196
HABIN(P),DHABIN(P)
Program Example
1
(1) The following program converts the hexadecimal, 4-digit ASCII data set at D20 and D21 to
BIN data, and stores the result at D0.
[Ladder Mode] [List Mode] 2
Step Instruction Device
[Operation] 4
b15 b8b7 b0
D0
D20 36H (6) 41H (A)
22977
6
D21 46H (F) 33H (3)
Regarded as A63FH BIN value
A63F (-22977 in decimal
value)
(2) The following program converts the hexadecimal, 8-digit ASCII data set at D20 to D23 to
BIN values, and stores the result at D10 and D11.
6
[Ladder Mode] [List Mode]
Step Instruction Device 7
8
[Operation]
b15 b8b7 b0
D20 46H (F) 34H (4)
D11 D10
D21 32H (2) 44H (D)
1339 1 97264
7.11.5 Conversion from hexadecimal ASCII to BIN 16-bit and 32-bit data (HABIN(P),DHABIN(P))
7.11 Character string processing instructions
D22 37H (7) 38H (8)
Regarded as 4FD28750H BIN value
D23 30H (0) 35H (5) (1339197264 in decimal
4FD28750 value)
7-197
DABCD(P),DDABCD(P)
High
Basic performance Process Redundant Universal
Command
DABCD,DDABCD S D
Command
DABCDP,DDABCDP P S D
S : ASCII data to be converted to BCD value or head number of the devices where the ASCII data is stored
(character string)
D : Head number of the devices where the conversion result will be stored (BCD 4 digits/8 digits)
S –– –– ––
D –– ––
Function
DABCD
(1) Converts decimal ASCII data stored in the area starting from device number designated by
S into 4-digit BCD data, and stores at device number designated by D .
b15 b8b7 b0
S ASCII code for hundreds place ASCII code for thousands place
b15 b12b11 b8b7 b4b3 b0
D
S +1 ASCII code for units place ASCII code for tens place
Thousands Hundreds Tens Units
place place place place
For example, if the ASCII code of 8765H is designated for the area starting from S , the
operation results would be stored at D in the following manner:
b15 b8b7 b0
b15 b12 b11 b8 b7 b4 b3 b0
S 37H (7) 38H (8)
D 8 7 6 5
S +1 35H (5) 36H (6)
(2) The ASCII data designated by S to S +1 can be in the range of from 0 to 9999.
(3) The ASCII code set at each digit can be in the range of from "30H" to "39H".
(4) If ASCII code for individual digits is "20H" or "00H", it is processed as "30H".
7-198
DABCD(P),DDABCD(P)
DDABCD
(1) Converts decimal ASCII data stored in the area starting from the device designated by S to 1
8-digit BCD data, and stores it into the area starting from the device designated by D .
b15 b8b7 b0
D +1 D
2
S ASCII code for millions place ASCII code for ten-millions place
S +1 ASCII code for ten-thousands place ASCII code for hundred-thousands place b31 b28b27 b24 b23 b20b19 b16 b15 b12b11 b8b7 b4 b3 b0
S +2 ASCII code for hundreds place ASCII code for thousands place
S +3 ASCII code for units place ASCII code for tens place
Ten Milli- Hundred Ten Thou- Hund- Tens Units
3
milli- ons thou- thou- sands reds place place
ons place sands sands place place
place place place
4
For example, if the ASCII code of 87654321H is designated for the area starting from S , the
operation results would be stored at D +1 and D in the following manner:
b15 b8 b7 b0 6
S 37H (7) 38H (8)
S +1 35H (5) 36H (6) b31 b28b27 b24b23 b20b19 b16 b15 b12 b11 b8 b7 b4 b3 b0
S +2
S +3
33H
31H
(3)
(1)
34H
32H
(4)
(2)
8 7 6 5 4 3 2 1
6
D +1 D
(2) The ASCII data designated at S to S +3 can be in the range of from 0 to 99999999. 7
(3) The ASCII code set at each digit can be in the range of from "30H" to "39H".
(4) If ASCII code for individual digits is from "20H" to "00H", it is processed as "30H".
8
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
7.11.6 Conversion from decimal ASCII to BCD 4-digit or 8-digit data (DABCD(P),DDABCD(P))
7.11 Character string processing instructions
• There are characters within the data at S that are outside the 0 to 9 range.
(Error code: 4100)
7-199
DABCD(P),DDABCD(P)
Program Example
(1) The following program converts the decimal ASCII data set from D20 to D22 to BCD
4-digit data, and outputs the results to Y40 to Y4F.
[Ladder Mode]
[List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0
Y4F Y40
D20 34H (4) 20H (space)
0 4 9 4
D21 34H (4) 39H (9) Regarded BCD value
494 as 0494
(2) The following program converts the decimal ASCII data set at D20 to D23 into 8-digit BCD
data, stores the result at D10 and D11, and also outputs it to from Y40 to Y5F.
[Ladder Mode]
[List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0
D20 34H (4) 20H (space)
D11 D10 DMOV Y5F Y50 Y4F Y40
D21 37H (7) 39H (9)
0 4 9 7 2 9 4 9 0 4 9 7 2 9 4 9
D22 39H (9) 32H (2)
Regarded BCD value BCD value
D23 39H (9) 34H (4) as 04972949
4972949
7-200
COMRD(P)
3
Command
COMRD COMRD S D
Command 4
COMRDP COMRDP S D
S : Head number of the devices where a comment to be read is stored (Device name)
6
D : Head number of the devices where the read comment will be stored (character string)
––
7
S
D –– –– –– ––
8
Function
(1) Reads the comment at the device number designated by S , and stores it as ASCII code
in the area starting from the device number designated by D .
For example, if the comment for the device designated by S were "NO. 1 LINE
START," the operation results would be stored following D as follows:
b15 b8b7 b0
D 4FH (O) 4EH (N)
D +1 31H (1) 2EH (.)
Comment at S D +2 4CH (L) 20 H (space)
NO.1 LINE START D +3 4EH (N) 49H (I)
D +4 20H (space) 45H (E)
D +5 54H (T) 53H (S)
D +6 52H (R) 41H (A)
D +7 20 H (space) 54H (T)
7-201
COMRD(P)
(2) If no comment has been registered for the device specified by S despite the fact that the
comment range setting is made, all of the characters for the comment are processed as
"20H" (space).
(3) The device number plus 1 where the final character of D is stored differs depending on the
ON/OFF status of SM701 (number of characters to output select signal).
When SM701 is OFF : Does not change
When SM701 is ON : Stores "0"
(4) When a comment is read, SM720 turns ON for one scan after the instruction is completed.
SM721 turns ON during the execution of the instruction.
While SM721 is ON, the COMRD(P) instruction cannot be executed. If the attempt is made,
no processing is performed.
1. The device comment used in the COMRD(P) instruction uses a comment file
stored in a memory card and the standard ROM.
Comment files stored in the program memory cannot be used.
2. Set the comment file used for the COMRD(P) instruction in "PLC file setting" in
the PLC parameter dialog box. If the comment file to be used is not set in the
PLC file setting, device comments cannot be output with the COMRD(P)
instruction.
3. The COMRD(P) instruction cannot be executed during the interrupt program.
No operation if executed.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The comment is not registered to the device number specified by S . (Error code: 4100)
• The device number specified by D is not a word device. (Error code: 4101)
7-202
COMRD(P)
Program Example
1
(1) The following program stores the comments set at D100 into the area starting from W0 as
ASCII when X1C is turned ON.
[Ladder Mode] [List Mode] 2
Step Instruction Device
4
[Operation]
b15 b8 b7 b0
6
W0 49H (I) 4CH (L)
W1 45H (E) 4EH (N)
Comment at D100
LINE A TARGET
W2 41H (A)
54H (T)
20H (space)
20H (space)
6
W3
W4 52H (R) 41H (A)
W5 55H (E) 57H (G)
W6 20H (space) 54H (T) 7
W7 20H (space) 20H (space)
Caution
7-203
LEN(P)
High
Basic performance Process Redundant Universal
Command
LEN LEN S D
Command
LENP LENP S D
S : Character string or head number of the devices where the character string is stored (character string)
D : Number of the device where the length of detected character string will be stored (BIN 16 bits)
S –– –– ––
D –– ––
Function
(1) Detects length of character string designated by S and stores in the area starting from the
device number designated by D .
Processes the data from the device number designated by S to the device number storing
"00H" as a character string.
b15 b8b7 b0
S 2nd character 1st character
S 4th character 3rd character
b15 b0
S 6th character 5th character
D Length of character string
For example, when the value "ABCDEFGHI" is stored in the area starting from S , the value
9 is stored at D .
b15 b8b7 b0
S 42H (B) 41H (A)
S +1 44H (D) 43H (C) b15 b0
"ABCDEFGHI"
S +2 46H (F) 45H (E) D 9
S +3 48H (H) 47H (G)
S +4 00H 49H (I)
7-204
LEN(P)
Operation Error
1
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• There is no "00H" set within the relevant device range following the device number 2
designated by S . (Error code: 4101)
3
Program Example
(1) The following program outputs the length of the character string from D0 to Y40 to Y4F as
BCD 4-digit values.
4
[Ladder Mode]
6
Outputs the length of character
string to a display device.
6
[List Mode] 7
Step Instruction Device
8
[Operation]
b15 b8b7 b0
D0 49 H (I) 4DH (M)
D10 BCD conversion Y4F Y40
7-205
STR(P),DSTR(P)
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
Command
STRP,DSTRP P S1 S2 D
S1 : Head number of the devices where the digits numbers for the numerical value to be converted are stored
(BIN 16 bits)
S2 : BIN data to be converted (BIN 16/32 bits)
D : Head number of the devices where the converted character string will be stored (character string)
S1 –– ––
S2 ––
D –– –– –– ––
Function
STR
(1) Adds a decimal point to the BIN 16-bit data designated by S2 at the location designated by
S1 , converts the data to character string data, and stores it in the area starting from the
Automatically stored at
the end of the character string
S1 5
S1 +1 1
b15 b8 b7 b0
D 31 H (1) 2D ( )
1 2 . 3 D +1 2EH (.) 32H (2)
D +2 00H 33H (3)
S2 123
7-206
STR(P),DSTR(P)
(3) The number of digits that can be designated by S1 +1 as a part of the decimal fraction is from 1
0 to 5.
However, the number of digits following the decimal point must be smaller than or equal to
the total number of digits minus 3. 2
(4) BIN data in the range between 32768 and 32767 can be designated at S2 .
(5) After conversion, character string data is stored at the device number D or later device 3
number as indicated below:
(a) The sign "20H" (space) will be stored if the BIN data is positive, and the sign "2DH"
(minus sign) will be stored if it is negative. 4
(b) If the setting for the number of digits after the decimal fraction is anything other than "0",
"2EH" (.) will automatically be stored at the position before the first of the specified 6
number of digits.
Total number of digits 6
Number of digits
in decimal fraction 2 1 2. 34 6
BIN data 1 2 3 4 Number of digits in decimal fraction
Automatically added
If the number of digits in the decimal fraction part of the number is "0", the ASCII code 7
"2EH" (.) will not be stored.
(c) If the total number of digits following the decimal fraction is greater than the number of
BIN data digits, a zero will be added automatically and the number converted by shifting 8
to the right, so that it would become "0. ".
Total number of digits 6
Number of digits
in decimal fraction 3 0 . 012
(d) If the total number of digits excluding the sign and the decimal point is greater than the
number of BIN data digits, "20H" (space) will be stored between the sign and the
numeric value.
Total number of digits 8
Number of digits 1
in decimal fraction 12 . 3
BIN data 1 2 3 Filled with 20H (space)
(e) The value "00H" is automatically stored at the end of the converted character string.
7-207
STR(P),DSTR(P)
DSTR
(1) Adds a decimal point to the BIN 32-bit data designated by S2 at the location designated by
S1 , converts the data to character string data, and stores it following the device number
designated by D .
S1 Total number of digits
S1 +1 Number of digits in decimal fraction b15 b8 b7 b0
ASCII code for the
D (total number of digits -1) ASCII code for the sign
th digit
ASCII code for the ASCII code for the
. D +1 (total number of digits -3) (total number of digits -2)
th digit th digit
ASCII code for the ASCII code for the
Sign D +2 (total number of digits -5) (total number of digits -4)
th digit th digit Designated total
S2 +1 S2 ASCII code for the ASCII code for the number of digits
b31 b16 b15 b0 (total number of digits -7) (total number of digits -6)
D +3
Upper 16 bits Lower 16 bits th digit th digit
ASCII code for the ASCII code for the
BIN 32 bits D +4 (total number of digits -9) (total number of digits -8)
th digit th digit
ASCII code for the
D +5 00H (total number of digits -10)
th digit
(2) The total number of digits that can be designated by S1 is from 2 to 13.
(3) The number of digits that can be designated by S1 +1 as a part of the decimal fraction is from
0 to 10.
However, the number of digits following the decimal point must be smaller than or equal to
the total number of digits minus 3.
(4) The BIN data that can be designated by S1 and S2 +1 is within the range of from
2147483648 to 2147483647.
(5) After conversion, character string data is stored at the device number following D as
indicated below:
(a) The sign "20H" (space) will be stored if the BIN data is positive, and the sign "2DH"
(minus sign) will be stored if it is negative.
(b) If the setting for the number of digits after the decimal fraction is anything other than "0",
"2EH" (.) will automatically be stored at the position before the first of the specified
number of digits.
Total number of digits 10
Number of digits 3
in decimal fraction 12345 . 678
BIN data 12 3 4 5 6 7 8
Number of digits in decimal fraction
Automatically added
If the number of digits in the decimal fraction part of the number is "0", the ASCII code
"2EH" (.) will not be stored.
7-208
STR(P),DSTR(P)
(c) If the total number of digits following the decimal fraction is greater than the number of
BIN data digits, a zero will be added automatically and the number converted by shifting
1
to the right, so that it would become "0. ".
Total number of digits 13
2
Number of digits 10
in decimal fraction 0 . 0000054321
BIN data 5 4 3 2 1
Automatically added
(d) If the total number of digits excluding the sign and the decimal point is greater than the 3
number of BIN data digits, "20H" (space) will be stored between the sign and the
numeric value.
4
Total number of digits 13
Number of digits 2
in decimal fraction 5432 . 10
BIN data 5 4 3 2 1 0 Filled with 20H (space) codes
6
If the number of BIN digits is greater, an error will be returned.
(e) The value "00H" is automatically stored at the end of the converted character string.
6
Operation Error
7
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The total number of digits designated by is outside the ranges shown below.
S1 8
(Error code: 4100)
When the STR instruction is in use .......2 to 8
When the DSTR instruction is in use.....2 to 13
• The number of digits designated as a part of the decimal fraction by +1 is outside the
• The relationship between the total number of digits designated by S1 and the number of
digits in the decimal fraction designated by +1 is not as shown below:
S1
• The number of digits designated by S1 is smaller than "2 + number of digits of the BIN
data, designated by S2 ".
(Number of digits of S1 < Number of digits of the BIN data at S2 without a sign + Number
of digits of a sign (+ or -) + Number of digits of decimal point (.)) (Error code: 4100)
• The device range where the character string designated by D will be stored exceeds the
relevant device range. (Error code: 4101)
7-209
STR(P),DSTR(P)
Program Example
(1) The following program converts the BIN 16-bit data stored at D10 when X0 is turned ON in
accordance with the digit designation of D0 and D1, and stores the result from D20 to D23.
[Ladder Mode]
[List Mode]
[Operation]
b15 b8b7 b0
D10 12672 D20 31H (1) 20H (space)
D21 36H (6) 32H (2)
D0 7 1267.2
D22 2E H (.) 37H (7)
D1 1 D23 00H 32H (2)
7-210
STR(P),DSTR(P)
(2) The following program converts the BIN 32-bit data stored at D10 and D11 when X0 is
turned ON in accordance with the digit designation of D0 and D1, and stores the result at
from D20 to D26. 1
[Ladder Mode]
[List Mode] 6
Step Instruction Device
[Operation] 7
D11 D10 b15 b8b7 b0
D10 12345678 D20 30 H (0) 20 H (space)
D0 12
D21 30 H (0) 2EH (.)
0.012345678
8
D22 32 H (2) 31 H (1)
D1 9 D23 34 H (4) 33 H (3)
D24 36 H (6) 35 H (5)
D25 38 H (8) 37 H (7)
D26 00 H
7-211
VAL(P),DVAL(P)
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger
(Correspording GX Seveloper :Version 8.00 A or later).
Command
VALP,DVALP P S D1 D2
S : Character string to be converted to BIN data or head number of the devices where the character string is
stored (character string)
D1 : Head number of the devices where the number of digits of the converted BIN data will be stored (BIN 16 bits)
D2 : Head number of the devices where the converted BIN data will be stored (BIN 16/32 bits)
S –– –– ––
D1 –– –– ––
D2 –– ––
Function
VAL
(1) Converts character strings stored in the device numbers starting from that designated at S
to BIN 16-bit data, and stores the number of digits and BIN data in D1 and D2 .
For conversions from character strings to BIN, all data from the device number designated
by S to the device number where "00H" is stored will be processed as character strings.
Total number
D1 of digits
b15 b8b7 b0
S ASCII code for the 1st character ASCII code for the sign D1 +1 Number of digits
in decimal fraction
S +1 ASCII code for the 3rd character ASCII code for the 2nd character Integer value
S +2 ASCII code for the 5th character ASCII code for the 4th character . D2 ignoring decimal
point
S +3 ASCII code for the 7th character ASCII code for the 6th character
Sign 1st 2nd 7th
S +4 00H char- char- char- BIN 16 bits
acter acter acter
Indicates the end of character string
7-212
VAL(P),DVAL(P)
For example, if the character string " 123.45" is designated for the area starting from S ,
the operation result would be stored at and in the following manner:
D1 D2
7
1
D1
b15 b8 b7 b0 D1 +1 2
S 31H (1) 2DH ( )
S +1 33H (3) 32 H (2)
1 2 3 . 4 5 D2 12345 2
S +2 34H (4) 2EH (.)
S +3 00H 35 H (5)
(2) The total number of characters that can be designated as a character string at S is from 2 3
to 8.
(3) From 0 to 5 characters from the character string designated at can become the decimal
fraction part.
S
4
However, this number must not exceed the total number of digits minus 3.
(4) The range of the numerical character string that can be converted to BIN value is from 6
32768 to 32767, ignoring a decimal point.
Numerical value character strings, excluding the sign and the decimal point, can be
designated only within the range from "30H" to "39H". 6
The value ignoring a decimal point means:
Example : " 12345.6" " 123456"
(5) The sign "20H" will be stored if the numerical value is positive, and the sign "2DH" will be 7
stored if it is negative.
(6) "2EH" is set for the decimal point.
8
(7) The total number of digits stored at D1 amounts to all characters expressing numerical
values (including signs and decimal points).
The characters following the decimal point stored at D1 +1 include the number of characters
from "2EH" (.) onward.
7.11.10 Conversion from character string to BIN 16-bit or 32-bit data (VAL(P),DVAL(P))
7.11 Character string processing instructions
The BIN data stored at D2 is the character string ignoring the decimal point that has been
converted to BIN data.
(8) In cases where the character string designated by S contains "20H" (space) or "30H" (0)
between the sign and the first numerical value other than "0", these "20H" and "30H" are
ignored in the conversion into a BIN value.
Total number of digits 8 Total number of digits 7
Number of digits 2 Number of digits 4
123 . 45 in decimal fraction 0 . 0012 in decimal fraction
BIN data 12345 BIN data 12
Ignored Sign Ignored
7-213
VAL(P),DVAL(P)
DVAL
(1) Converts the character string stored in the area starting from the device designated by S to
BIN 32-bit data, and stores the digits numbers and BIN data in D1 and D2 .
For conversions from character strings to BIN, all data from the device number designated
by S to the device number where "00H" is stored will be processed as character strings.
b15 b8 b7 b0 D1 Total number of digits
S ASCII code for the 1st character ASCII code for the sign D1 +1 Number of digits
in decimal fraction
S +1 ASCII code for the 3rd character ASCII code for the 2nd character
S +2 ASCII code for the 5th character ASCII code for the 4th character D2 +1 D2
S +3 ASCII code for the 7th character ASCII code for the 6th character . Integer value ignoring decimal point
S +4 ASCII code for the 9th character ASCII code for the 8th character
ASCII code for the 11th character ASCII code for the 10th character
Sign 1st 2nd 12th BIN 32 bits
S +5 char- char- char-
S +6 00H ASCII code for the 12th character acter acter acter
b15 b8 b7 b0 D1 10
S 31H (1) 2D H ( ) D1 +1 3
S +1 33H (3) 32H (2)
S +2 35H (5) 34H (4)
S +3 36H (6) 2EH (.) 1 2 3 4 5 . 6 7 8 12 34 5 678
S +4 38H (8) 37H (7) D2 +1 D2
S +5 00H
(2) The total number of characters in the character string indicated by S is from 2 to 13.
(3) From 0 to 10 characters in the character string indicated by S can be the decimal fraction
part.
However, this number must not exceed the total number of digits minus 3.
(4) The range of the numerical character string that can be converted to BIN value is from
2147483648 to 2147483647, excluding the decimal point.
Numerical value character strings, excluding the sign and the decimal point, can be
designated only within the range from "30H" to "39H".
(5) The sign "20H" will be stored if the numerical value is positive, and the sign "2DH" will be
stored if it is negative.
(6) "2EH" is set for the decimal point.
(7) The total number of digits stored at D1 amounts to all characters expressing numerical
values (including signs and decimal points).
The characters following the decimal point stored at D1 +1 include the number of characters
from "2EH" (.) onward.
The BIN data stored at D2 is the character string ignoring the decimal point that has been
converted to BIN data.
7-214
VAL(P),DVAL(P)
(8) In cases where the character string designated by S contains "20H" (space) or "30H" (0)
between the sign and the first numerical value other than "0", these "20H" and "30H" are
ignored in the conversion into a BIN value.
1
Total number of digits 12
6543 . 21
Number of digits
in decimal fraction
2
2
BIN data 6 5 4 3 2 1
Ignored
BIN data 5 4 3 2 1
4
Sign Ignored
Operation Error
6
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The number of characters in the character string designated by S1 falls outside the ranges 6
shown below: (Error code: 4100)
When VAL instruction is in use ........... From 2 to 8 characters
When DVAL instruction is in use ........ From 2 to 13 characters 7
• The number of characters in the decimal fraction portion of the character string
designated by S falls outside the ranges shown below: (Error code: 4100)
When VAL instruction is in use ........... 0 to 5 8
When DVAL instruction is in use ........ 0 to 10
• The total number of characters in the character string designated by S and the number of
characters in the decimal fraction part stand in a relationship that is outside the range
indicated below: (Error code: 4100)
7.11.10 Conversion from character string to BIN 16-bit or 32-bit data (VAL(P),DVAL(P))
7.11 Character string processing instructions
Total number of characters minus 3 is equal to or greater than the number of characters in
the decimal fraction part.
• An ASCII code other than "20H" or "2DH" has been set for the sign.
(Error code: 4100)
• An ASCII code other than from "30H" to "39H" or "2EH" (decimal point) has been set as a
digit for one of the individual numbers. (Error code: 4100)
• There has been more than one decimal point set in the value. (Error code: 4100)
• The value of the BIN value when converted falls outside the following ranges:
(Error code: 4100)
When VAL instruction is in use ........... 32768 to 32767
When DVAL instruction is in use ........ 2147483648 to 2147483647
• No "00H" is set within the range from the device number designated by S to the last
device number of the relevant device. (Error code: 4101)
7-215
VAL(P),DVAL(P)
Program Example
(1) The following program reads the character string data stored from D20 to D22 as an integer,
converts it to a BIN value, and stores it at D0 when X0 is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8b7 b0
D20 31H (1) 2DH ( ) D0 1654
D21 2E H (.) 36H (6)
D22 34H (4) 35H (5) D10 6 Total number of digits
D23 00H D11 2 Number of digits in decimal fraction
Set 00H
(2) The following program reads the character string data stored from D20 to D24 as an integer,
converts it to a BIN value, and stores it at D0 when X0 is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0 D1 D0
D20 37H (7) 20 H (space) 7 9 1 0 0 6 1 1
D21 31H (1) 39H (9)
D22 30H (0) 30H (0) D10 10 Total number of digits
D23 36H (6) 2EH (.) D11 3 Number of digits in decimal fraction
D24 31H (1) 31H (1)
D25 00H
Set 00H
7-216
ESTR(P)
Ver.
High
2
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
3
Command
ESTR ESTR S S2 D 4
Command
ESTRP ESTRP S1 S2 D
6
S1 : 32-bit floating decimal point data to be converted or head number of the devices where the data is stored
(real number)
6
S2 : Head number of the devices where display designation for the numerical value to be converted is stored (BIN 16 bits)
D : Head number of the devices where the converted character string will be stored (character string)
S1 –– –– *1 ––
S2 –– –– –– –– –– –– 8
D –– –– –– –– –– ––
7.11.11 Conversion from floating decimal point to character string data (ESTR(P))
7.11 Character string processing instructions
Function
(1) Converts the 32-bit floating decimal point data designated by S1 to a character string
according to the display designation specified by S2 , and stores the result into the area
starting from the device number designated by D .
(2) The post-conversion data differs depending on the display designation designated by S2 .
7-217
ESTR(P)
b15 b8 b7 b0
S2 Decimal point format ASCII code for the
S2 +1 Total number of digits D (total number of digits -1) ASCII code for the sign
th digit
S2 +2 Number of digits in decimal fraction
ASCII code for the ASCII code for the
D +1 (total number of digits -3) (total number of digits -2)
th digit th digit
. ASCII code for the ASCII code for
D +2 (total number of digits -5) decimal point (.)
Sign th digit (2E H)
7-218
ESTR(P)
For example, in a case where there are 8 digits in total, with 3 digits in the decimal fraction
part, and the value designated is 1.23456, the operation result would be stored in the area
starting from D in the following manner: 1
S2 0
S2 +1
2
8
S2 +2 b15 b8 b7 b0
3
D 20H (space) 2DH(-)
D +1 31H (1) 20H (space)
D +2 32H (2) 2EH (.)
- 1 . 2 3 5
D +3 35H (5) 33H (3) 3
Sign D +4 00H
6
(a) The total number of digits that can be designated by S2 +1 is as shown below:
When the number of decimal fraction digits is "0"
.................... Number of digits (max.: 24) 2 6
When the number of decimal fraction digits is other than "0"
.................... Number of digits (max.: 24) (Number of decimal fraction digits + 3)
(b) The number of digits of decimal fraction part that can be designated by S2 +2 is from 0 to
7
7.
However, the number of digits following the decimal point must be smaller than or equal
to the total number of digits minus 3.
8
(c) The converted character string data is stored at the area starting from the device
number D as indicated below:
1) The sign "20H" (space) will be stored if the 32-bit floating decimal point type real
7.11.11 Conversion from floating decimal point to character string data (ESTR(P))
7.11 Character string processing instructions
number is positive, and the sign "2DH" (minus sign) will be stored if it is negative.
2) If the decimal fraction part of a 32-bit floating point real number data is out of the
range of the digits of decimal fraction part, the lower decimal values will be rounded
off.
3) If the number of digits following the decimal point has been set at any value other
than "0", "2EH" (.) will automatically be stored at the position before the first of the
specified number of digits.
7-219
ESTR(P)
4) If the total number of digits, excluding the sign, the decimal point and the decimal
fraction part, is greater than the integer part of the 32-bit floating point type real
number data, "20H (space)" will be stored between the sign and the integer part.
S2 0
S2 +1 8 Total number of digits
S2 +2 2
- 1 . 2 3
S1+1 S1 Number of digits
-1 . 2 3 4 5 6 in decimal fraction
Filled with 20H
(space) codes
5) The value "00H" is automatically stored at the end of the converted character string.
b15 b8b7 b0
S2 Exponent format ASCII code for the
S2 +1 Total number of digits
D (total number of digits -1)th digit ASCII code for the sign
S2 +2 Number of digits in decimal fraction ASCII code for decimal point (.) ASCII code for the
D +1 (2EH) (total number of digits -2)th digit
ASCII code for the ASCII code for the
E D +2 (total number of digits -5)th digit (total number of digits -4)th digit
.
ASCII code for the ASCII code for the
Sign (integer part) Sign (exponent part) D +3 (total number of digits -7)th digit (total number of digits -6)th digit
Automatically stored at
the end of character sting
For example, in a case where there are 12 digits is total, with 4 digits in the decimal fraction
portion, and the value designated is 12.34567, the operation results would be stored in the
area starting from D in the following manner:
S2 1
S2 +1 12
b15 b8 b7 b0
S2 +2 4
D 20H (space) 2DH (-)
D +1 2EH (.) 31H (1)
D +2 33H (3) 32H (2)
- 1 . 2 3 4 6 E+ 0 1
D +3 36H (6) 34H (4)
Sign Sign D +4 2CH(+) 45H (E)
(integer part) (exponent part) D +5 31H (1) 30H (0)
D +6 00H
S1 +1 S1
-1 2 . 34 5 6 7 Automatically added
7-220
ESTR(P)
(a) The total number of digits that can be designated by S2 +1 is as shown below:
When the number of decimal fraction digits is "0" 1
.................... Number of digits (max.: 24) 2
When the number of decimal fraction digits is other than "0"
.................... Number of digits (max.: 24) (Number of decimal fraction digits + 7) 2
(b) The number of digits of dicimal fraction part that can be designated by S2 +2 is from 0 to
7.
However, the number of digits in the decimal fraction portion should be equal to or less
3
than the total number of digits minus 7.
(c) The converted character string data is stored at the area starting from the device 4
number D as indicated below:
1) If the 32-bit floating decimal point type real number data is positive in value, the sign
before the integer will be stored as ASCII code "20H" (space), and if it is a negative 6
value, the sign will be stored as "2DH" ( ).
2) The integer portion is fixed to one digit.
20H (space) will be stored between the integer and the sign. 6
1 Total number of digits (12)
S2
S2 +1 12 Fixed to 1 digit
S2 +2 4
- 1 . 2 3 4 6 E+ 0 1
7
S1+1 S1
-1 2. 3 4567
Filled with 20H (space) codes
8
3) If the decimal fraction part of the 32-bit floating point type real number is out of the
range of the digits of the decimal fraction part, the lower decimal values will be
rounded off.
7.11.11 Conversion from floating decimal point to character string data (ESTR(P))
7.11 Character string processing instructions
S2 1
S2 +1 12 Total number of digits (12)
S2 +2 4
- 1 . 2 3 4 6 6 7 E+ 0 1
S1+1 S1
Number of digits These are cut
-1 2. 3 4 5 6 7 in decimal fraction (4)
4) If the number of digits of the decimal fraction part has been set at any value other
than "0", "2EH" (.) will automatically be stored at the position before the first of the
specified number of digits.
S2 1
S2 +1 12 Total number of digits (12)
S2 +2 4
- 1 . 2 3 4 6 E+ 0 1
S1 +1 S1 Number of digits
-1 2. 3 4 5 6 7 in decimal fraction (4)
Automatically added
If the number of digits in the decimal fraction part of the number is "0", the ASCII
code "2EH" (.) will not be stored.
7-221
ESTR(P)
5) The ASCII code "2CH" (+) will be stored as the sign for the exponent portion of the
value if the exponent is positive in value, and the code "2DH" ( ) will be stored if the
exponent is a negative value.
7) The value "00H" is automatically stored at the end of the converted character string.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The S1 value is not within the range indicated below: (Error code: 4100)
-126 128
0, 2 | S1 | 2
• The total number of digits designated by S2 + 1 is outside the ranges shown below.
(Error code: 4100)
When using decimal point format
When the number of decimal fraction digits is "0"
........................ Total number of digits 2
When the number of decimal fraction digits is other than "0"
........................ Total number of digits (Number of decimal fraction digits + 3)
When using exponent format
When the number of decimal fraction digits is "0"
........................ Total number of digits 6
When the number of decimal fraction digits is other than "0"
........................ Total number of digits (Number of decimal fraction digits + 7)
• The number of digits designated for the decimal fraction portion of the value by S2 +2 was
outside the ranges indicated below: (Error code: 4100)
When using the decimal point format
........................ Number of decimal fraction digits (Total number of digits 3)
When using the exponent format
........................ Number of decimal fraction digits (Total number of digits 7)
• The value whose total digits exceeds "24" is specified. (Error code: 4100)
• The device range to store the character string designated by D exceeds the relevant
device range. (Error code: 4101)
7-222
ESTR(P)
Program Example
1
(1) The following program converts the 32-bit floating point type real number data which had
been stored at R0 and R1 in accordance with the conversion designation that is being stored 2
at R10 to R12, and stores the result following D0 when X0 goes ON.
[Ladder Mode] [List Mode]
Step Instruction Device
3
4
[Operation]
R10 0 Conversion format b15 b8 b7 b0 6
R11 7 D0 20H (space) 20H (space)
Total number of digits Total number of digits
R12 D1 2EH (.) 30H (0)
3 Number of digits
in decimal fraction 0 . 0 3 3 D2 33H (3) 30H (0)
(2) The following program converts the 32-bit floating decimal point type real number data which 7
had been stored at D0 and D1 in accordance with the conversion designation that is being
stored at R10 to R12, and stores the result following D10 when X1C goes ON.
[Ladder Mode] [List Mode] 8
Step Instruction Device
7.11.11 Conversion from floating decimal point to character string data (ESTR(P))
7.11 Character string processing instructions
[Operation]
R10 1 (exponent format) Conversion format
R11 12 Total number of digits Total number of digits
R12 4 Number of digits
in decimal fraction 3 . 2 7 4 6 E- 0 2
Automatically stored
7-223
EVAL(P)
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
Command
EVAL EVAL S D
Command
EVALP EVALP S D
S : Character string data to be converted to 32-bit floating decimal point real number data or head number of the
devices where the character string data is stored (character string)
D : Head number of the devices where the converted 32-bit floating decimal point real number data will be stored
(real number)
S –– –– –– –– ––
D –– –– –– –– ––
Function
(1) Converts character string stored in the area starting from the device number designated by
S to 32-bit floating point type real number, and stores result at device designated by D .
(2) The designated character string can be converted to 32-bit floating point type real number
data either in the decimal point format or the exponent format.
b15 b8 b7 b0
S ASCII code for the 1st character ASCII code for the sign
S +1 ASCII code for the 3rd character ASCII code for the 2nd character D +1 D
S +2 ASCII code for the 5th character ASCII code for the 4th character
S +3 ASCII code for the 7th character ASCII code for the 6th character
32-bit floating-point
S +4 00H real number
- 1 . 0 7 8 1 2
7-224
EVAL(P)
S
b15
20H (space)
b8b7
2DH (-)
b0
1
S +1 2EH (.) 31H (1)
S +2 32H (2) 33H (3) D +1 D
S +3
S +4
31H (1)
2BH (+)
30H (0)
45H (E)
-1. 320 1E + 10
2
S +5 32-bit floating-point
30H (0) 31H (1) real number
S +6 00H
3
1 1 . 3 2 0 1 E+ 1 0
(3) Excluding the sign, decimal point, and exponent portion of the result, 6 digits of the character
string designated by S to be converted to a 32-bit floating decimal point type real number
4
will be effective; the 7th digit on later digit will be cut from the result.
(a) When using decimal point format 6
b15 b8b7 b0
S 20H (space) 2DH (-)
S +1 31H (1) 20H (space)
S +2 33H (3) 2EH (.) D +1 D 6
S +3 31H (1) 30H (0) -1. 3 0 1 5 6
S +4 36H (6) 35H (5)
32-bit floating-point real number
S +5
S +6
31H (1)
00H
38H (8)
32H (2)
7
- 1 . 3 0 1 5 6 8 1 2
8
These are cut
7.11.12 Conversion from character string to floating decimal point data (EVAL(P))
7.11 Character string processing instructions
20H (space) 2DH (-)
S +1 2EH (.) 31H (1)
S +2 35H (5) 33H (3) D +1 D
S +3 33H (3) 30H (0) -1 . 350 34 E- 2
S +4 31H (1) 34H (4)
S +5 45H (E) 32H (2) 32-bit floating-point
real number
S +6 30H (0) 2DH (-)
S +7 00H 32H (2)
- 1 . 3 5 0 3 4 1 2 E- 0 2
(4) In the decimal point format, if "2BH" (+) is specified for the sign or if the designation of sign is
omitted, conversion is made assuming a positive value.
If "2DH" (-) is specified for the sign, the character string is converted assuming a negative
value.
(5) In the exponent format, if "2BH" (+) is specified for the sign in the exponent portion or if the
designation of sign is omitted, conversion is made assuming a positive value.
If "2DH" (-) is specified for the sign in the exponent portion, the character string is converted
assuming a negative value.
7-225
EVAL(P)
(6) In a case where the ASCII code "20H (space)" or "30H" (0) exists between numbers not
including the initial zero in a character string specified by S , it will be ignored when the
conversion is done.
b15 b8b7 b0
S 20H (space) 2DH (-)
S +1 31H (1) 30H (0) D +1 D
S +2 32H (2) 2EH (.) -1 . 2 3 1
S +3 31H (1) 33H (3)
32-bit floating-point
S +4 00 real number
- 0 1 . 2 3 1
Ignored
(7) In a case where the ASCII code "30H (0) " exists between the character "E" and a number in
an exponent format character string, the "30H" would be ignored when the conversion is
performed.
b15 b8b7 b0
20H (space) 2DH (-)
2EH (.) 31H (1)
34H (4) 30H (0) D +1 D
33H (3) 35H (5) -1 . 0 4 5 3 E + 3
2BH (+) 45H (E)
33H (3) 30H (0)
00H
- 1 . 0 4 5 3 E+ 0 3
Ignored
(8) If the "20H" (space) code is contained in the character string, the code is ignored in the
conversion.
(9) Up to 24 characters can be set for a character string.
The codes "20H" (space) and "30H" (0) contained in the character string are also counted as
a character.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The integer portion or the decimal fraction portion contains a character other than one in
the range of from "30H" (0) to "39H" (9). (Error code: 4100)
• There are two or more occurrences of the character "2EH" (.) in the character string
designated by D . (Error code: 4100)
• The exponent portion contains the code (character) other than "45H"(E), "2BH"(+),
"45H"(E) or "2DH"( ), or the string contains more than one exponent portion.
(Error code: 4100)
• Data after conversion is not within the following range. (Error code: 4100)
-126 128
0, 2 |data after conversion| 2
• The code "00H" does not appear in the range from S to the relevant device.
(Error code: 4101)
• The number of characters in the character string following S is either 0 or more than 24.
(Error code: 4100)
7-226
EVAL(P)
Program Example
1
(1) The following program converts the character string stored in the area starting from R0 to a
32-bit floating decimal point type real number, and stores the result at D0 and D1 when X20
is turned ON. 2
[Ladder Mode] [List Mode]
Step Instruction Device
3
[Operation]
4
b15 b8b7 b0
R0 20H (space) 2DH (-)
R1 31H (1) 30H (0)
D1 D0
6
R2 32H (2) 2EH (.)
-1 . 234 5 2
R3 34H (4) 33H (3)
R4
R5
32H (2)
00H
35H (5)
31H (1)
6
- 0 1 . 2 3 4 5 2 1
7
Ignored These are cut
(2) The following program converts the character string stored in the area starting from D10 to a
32-bit floating decimal point type real number, and stores the result at D100 and D101 when 8
X20 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
7.11.12 Conversion from character string to floating decimal point data (EVAL(P))
7.11 Character string processing instructions
[Operation]
b15 b8b7 b0
D10 20H (space) 20H (space)
D11 2EH (.) 31H (1)
D12 33H (3) 32H (2) D101 D100
D13 35H (5) 34H (4) 1 . 2 3 4 5 E -2
D14 2DH (-) 45H (E)
D15 32H (2) 30H (0)
D16 00
1 . 2 3 4 5 E - 0 2
Ignored Ignored
7-227
ASC(P)
High
Basic performance Process Redundant Universal
Command
ASC ASC S D n
Command
ASCP ASCP S D n
S : Head number of the devices where BIN data to be converted to a character string is stored (BIN 16 bits)
D : Head number of the devices where the converted character string will be stored (character string)
n : Number of characters to be stored (BIN 16 bits)
S –– –– ––
D –– –– ––
n ––
Function
(1) Converts the BIN 16-bit data stored in the area starting from the device designated by S to
ASCII by treating the BIN data in hexadecimal representation. Then, stores the converted
data into the area starting from the device designated by D , for the number of characters
specified by n.
b15 b12b11 b8b7 b4b3 b0 b15 b8b7 b0
S 4th digit 3rd digit 2nd digit 1st digit D ASCII code for the 2nd digit ASCII code for the 1st digit
S +1 4th digit 3rd digit 2nd digit 1st digit D +1 ASCII code for the 4th digit ASCII code for the 3rd digit
D +2 ASCII code for the 2nd digit ASCII code for the 1st digit Number of
D +3 ASCII code for the 4th digit ASCII code for the 3rd digit characters
4th digit 3rd digit 2nd digit 1st digit designated by n
BIN data ASCII code for the 2nd digit ASCII code for the 1st digit
7-228
ASC(P)
(2) The use of n to set the number of characters causes the BIN data range designated by S
and the character string storage device range designated by D to be set automatically. 1
(3) Processing will be performed accurately even if the device range where BIN data to be
converted is being stored overlaps with the device range where the converted ASCII data
will be stored. 2
b15 b12 b11 b8 b7 b4b3 b0 b15 b8b7 b0
D11 4H 3H 2H 1H D10 32H 31H
D12
D13
8H 7H 6H
AH
5H
9H
D11
D12
34H
36H
33H
35H
3
D13 38H 37H
D14 41H 39H
(4) If an odd number of characters has been designated by n, the ASCII code "00H" will be
4
automatically stored in the upper 8 bits of the final device in the range where the character
string is to be stored.
When 5 characters have been designated by n. 6
b15 b12b11 b8b7 b4b3 b0 b15 b8b7 b0
S 1 A 2 B S D 32H(2) 42H(B)
S +1 B S D +1 31H(1) 41H(A) 6
S D +2 00H 42H(B)
Stored automatically
7
(5) If the number of characters designated by n is "0", conversion processing will not be
conducted.
8
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
Program Example
(1) The following program reads the BIN data being stored at D0 as hexadecimal values,
converts them to a character string, and stores the result from D10 to D14 when X0 is turned
ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b12b11 b8 b7 b4b3 b0 b15 b8b7 b0
D0 CH 7H 2H 9H D10 32H (2) 39H (9)
D1 0H 5H AH FH D11 43H (C) 37H (7)
D2 0H 0H 2H 2H D12 41H (A) 46H (F)
D13 30H (0) 35H (5)
D14 32H (2) 32H (2)
7-229
HEX(P)
High
Basic performance Process Redundant Universal
Command
HEX HEX S D n
Command
HEXP HEXP S D n
S : Head number of the devices where a character string to be converted to BIN data is stored (character string)
D : Head number of the devices where the converted BIN data will be stored (BIN 16 bits)
n : Number of characters to be stored (BIN 16 bits)
S –– –– ––
D –– –– ––
n ––
Function
(1) Converts the number of characters of hexadecimal ASCII data designated by n stored in the
area starting from the device number designated by S into BIN values and stores them in
the area starting from the device number designated by D .
b15 b8b7 b0 b15 b12b11 b8b7 b4b3 b0
S ASCII code for the 2nd digit ASCII code for the 1th digit D 4th digit 3rd digit 2nd digit 1st digit
S +1 ASCII code for the 4nd digit ASCII code for the 3th digit D +1 4th digit 3rd digit 2nd digit 1st digit
Number of S +2 ASCII code for the 2st digit ASCII code for the 1rd digit
characters
designated S +3 ASCII code for the 4st digit ASCII code for the 3rd digit
by n
BIN data
For example, if the number 9 has been designated by n, the operation would be as follows:
b15 b8b7 b0
S 33H (3) 34H (4)
When "9" S +1 31H (1) 32H (2) b15 b12b11 b8b7 b4b3 b0
is set S +2 42H (B) 36H (6) D 1H 2H 3H 4H
for n
S +3 41H (A) 39H (9) D +1 AH 9H BH 6H
S +4 38H (8) 45H (E) D +2 0H 0H 0H EH
Code "38H" remains unchanged since the designated number of characters is "9".
(2) When the number of characters is specified for n, the range of characters designated by S
as well as the device range designated by D in which the BIN data will be stored are
automatically decided.
7-230
HEX(P)
(3) Accurate processing will be conducted even in cases where the range of devices where the
ASCII code to be converted is being stored overlaps with the range of devices that will store
the converted BIN data. 1
b15 b8b7 b0 b15 b12 b11 b8 b7 b4b3 b0
D10 32H (2) 31H (1) D11 4H 3H 2H 1H
D11 34H (4) 33H (3) D12 8H 7H 6H 5H 2
D12 36H (6) 35H (5) D13 0H 0H AH 9H
D13 38H (8) 37H (7)
D14 41H (A) 39H (9)
3
(4) If the number of characters designated by n is not divisible by 4, "0" will be automatically
stored after the designated number of characters in the final device number of the devices
which are storing the converted BIN values. 4
b15 b8b7 b0 b15 b12 b11 b8b7 b4b3 b0
S 32H (2) 42H (B) D 1 A 2 B
S +1
S +2
31H (1)
43H (C)
41H (A)
38H (8)
D +1 0 0 0 8
6
Value "0" is automatically stored in
the area outside the range of the
designated number of characters.
(5) If the number of characters designated by n is "0", conversion processing will not be 6
conducted.
(6) ASCII code that can be designated by S includes from "30H" to "39H" and from "41H" to "46H". 7
Operation Error
8
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• Characters outside the hexadecimal character string (that is, characters that are not in the
range of from "30H" to "39H", or from "41H" to "46H") have been set by .
Program Example
(1) The following program converts the character string being stored from D0 to D4 to BIN data
and stores the result from D10 to D14 when X0 goes ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8b7 b0 b15 b12b11 b8 b7 b4b3 b0
D0 42H (B) 36H (6) 2H 5H BH 6H
D1 32H (2) 35H (5) 3H 1H 7H AH
D2 37H (7) 41H (A) 0H 0H 9H 7H
D3 33H (3) 31H (1)
D4 39H (9) 37H (7)
7-231
RIGHT(P),LEFT(P)
High
Basic performance Process Redundant Universal
Command
RIGHT,LEFT S D n
Command
RIGHTP,LEFTP P S D n
S : Character string or head number of the devices where the character string is stored (character string)
D : Head number of the devices where the character string consisting of n characters starting from the right or
left of S will be stored (character string)
n : Number of characters to be extracted (BIN 16 bits)
S –– –– –– ––
D –– –– –– –– ––
n –– ––
Function
RIGHT
(1) Stores n number of characters from the right side of the character string (the end of the
character string) being stored in devices starting from that whose number is designated by
S , in devices starting from that whose number is designated by D .
b15 b8b7 b0
S b15 b8b7 b0
ASCII code for the 2nd character ASCII code for the 1st character
D ASCII code for the (last - n + 2)th character ASCII code for the (last - n + 1)th character
S +1 ASCII code for the 4th character ASCII code for the 3rd character
D +1 ASCII code for the (last - n + 4)th character ASCII code for the (last - n + 3)th character
ASCII code for the (last - n + 2)th character ASCII code for the (last - n + 1)th character
ASCII code for the (last - 1)th character ASCII code for the (last - 2)th character
ASCII code for the (last - n + 4)th character ASCII code for the (last - n + 3)th character
00H ASCII code for the last character
ASCII code for the (last - 1)th character ASCII code for the (last - 2)th character
00H ASCII code for the last character
When n 5
b15 b8b7 b0
b15 b8b7 b0
S 42 H (B) 41H (A)
D 32 H (2) 31 H (1)
S +1 44 H (D) 43H (C)
D +1 34 H (4) 33 H (3)
S +2 46 H (F) 45H (E)
D +2 00 H 35 H (5)
S +3 32 H (2) 31H (1)
S +4 "12345"
34 H (4) 33H (3)
S +5 00H 35H (5) ASCII code for the 5th character
"ABCDEF12345"
7-232
RIGHT(P),LEFT(P)
(2) The NULL code (00H) indicating the end of the character string is automatically appended at
the end of the character string. Refer to 3.2.5 for the format of the character string data.
1
(3) If the number of characters designated by n is "0", the NULL code (00H) will be stored at D .
LEFT 2
(1) Stores n number of characters from the left side of the character string (the beginning of the
character string) being stored in devices starting from that whose number is designated by
3
S , in devices starting from that whose number designated by D .
b15 b8b7 b0
b15 b8b7 b0
S ASCII code for the 2nd character ASCII code for the 1st character
S +1 ASCII code for the 4th character ASCII code for the 3rd character
D ASCII code for the 2nd character ASCII code for the 1st character 4
D +1 ASCII code for the 4th character ASCII code for the 3rd character
ASCII code for the (n - 1)th character ASCII code for the (n - 2)th character
6
ASCII code for the (n - 1)th character ASCII code for the (n - 2)th character
ASCII code for the (n + 1)th character ASCII code for the nth character
00H ASCII code for the nth character
When n 7
6
b15 b8b7 b0
b15 b8b7 b0
S
7
42 H (B) 41H (A)
D 42 H (B) 41H (A)
S +1 44 H (D) 43H (C)
D +1 44 H (D) 43H (C)
S +2 46 H (F) 45H (E)
D +2 46 H (F) 45H (E)
S +3 32 H (2) 31H (1)
D +3 00 H 31H (1)
S
S
+4
+5
34 H (4)
00 H
33H (3)
35H (5)
ASCII code for the
7th character
"ABCDEF1" 8
"ABCDEF12345"
(2) The NULL code (00H) indicating the end of the character string is automatically added to the
end of the character string.
7.11.15 Extracting character string data from the right or left (RIGHT(P),LEFT(P))
7.11 Character string processing instructions
Refer to 3.2.5 for the format of the character string data.
(3) If the number of characters designated by n is "0", the NULL code (00H) will be stored at D .
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of n exceeds the number of characters designated by S . (Error code: 4101)
• The range of n characters from D exceeds the relevant device. (Error code: 4101)
7-233
RIGHT(P),LEFT(P)
Program Example
(1) The following program stores 4 characters of data from the rightmost of the character string
stored in the area starting from R0, and stores it into the area starting from D0 when X0 is
turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8b7 b0
b15 b8b7 b0
R0 41H (A) 42H (B)
D0 45H (E) 30H (0)
R1 31H (1) 32H (2)
D1 41H (A) 46H (F)
R2 45H (E) 30H (0)
D2 00H
R3 41H (A) 46H (F)
"0EFA"
R4 00H
"BA210EFA" ASCII code for the 4th character
(2) The following program stores the number of characters corresponding to the value being
stored in D0 from the left of the character string data being stored at D100 to the area
starting from R10 when X1C is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8b7 b0
b15 b8b7 b0
D100 51 H (Q) 53H (S)
R10 51 H (Q) 53H (S)
D101 4EH (N) 4FH (O)
R11 4EH (N) 4FH (O)
D102 44 H (D) 48H (H)
R12 44 H (D) 48H (H)
D103 42 H (B) 41H (A)
R13 00H
D104 00H
"SQONHD"
"SQONHDAB"
D0 6
ASCII code for the 6th character
7-234
MIDR(P),MIDW(P)
High
2
Basic performance Process Redundant Universal
3
indicates an instruction symbol MIDR/MIDW.
Command 4
MIDR,MIDW S1 D S2
6
Command
MIDRP,MIDWP P S1 D S2
S1 : Character string or head number of the devices where the character string is stored (character string) 6
D : Head number of the devices where a character string data obtained as the result of operation will be stored
(character string)
S2 : Head number of the devices where the location of the first character and the number of characters will be
stored (BIN 16 bits)
7
• S2 : Position of first character
S1 –– –– ––
D –– –– –– ––
Function
MIDR
(1) Extracts the character string data of S2 +1 characters, starting from the position designated
by S2 , counted from the left end of the character string data designated by S1 , and stores
the extracted data into the area starting from the device designated by D .
b15 b8b7 b0
b15 b8b7 b0
S1 42 H (B) 41H (A)
D 46 H (F) 45 H (E)
S1 +1 44 H (D) 43H (C)
D +1 48 H (H) 47 H (G)
S1+2 46 H (F) 45H (E)
Position of the 5th D +2 00 H 49 H (I)
S1+3 48 H (H) 47H (G)
S1+4 character S2 "EFGHI"
4AH (J) 49H (I)
S1+5 00 H 4BH (K) ASCII code for the 5th character S2 +1
"ABCDEFGHIJK"
S2 5
S2 +1 5
7-235
MIDR(P),MIDW(P)
(2) The NULL code (00H) indicating the end of the character string is automatically added to the
end of the character string.
Refer to 3.2.5 for the format of the character string data.
(4) If the number of characters designated by S2 +1 is " 1", stores the data up to the final
character designated by S starting from the device designated by D .
b15 b8b7 b0
S1 b15 b8b7 b0
42 H (B) 41 H (A)
D 46H (F) 45 H (E)
S1 +1 44 H (D) 43 H (C)
D +1 48H (H) 47 H (G)
S1 +2 46 H (F) 45 H (E)
Position of D +2 4AH (J) 49 H (I)
S1 +3 48 H (H) 47 H (G)
the 5th D +3 00 H 4B H (K)
S1 +4 4A H (J) 49 H (I) character S2
S1 +5 00 H 4B H (K) "EFGHIJK"
"ABCDEFGHIJK"
S2 5
S2 +1 1
MIDW
(1) Extracts the character string data of S2 +1 characters, starting from the left end of the
character string data designated by S1 , and stores the extracted data to the character string
data designated by D in the area starting from the position designated by S2 from the left
end.
Before execution
b15 b8b7 b0
b15 b8b7 b0 D 42H (B) 41 H (A)
S1 31H (1) 30H (0) D +1 44H (D) 43 H (C)
S1 +1 33H (3) 32H (2) D +2 46H (H) 45 H (E)
S1 +2 35H (5) 34H (4) D +3 48H (H) 47 H (G)
S1 +3 37H (7) 36H (6) D +4 00H 49 H (I)
S1 +4 00H 38H (8) "ABCDEFGHI"
After execution
"012345678"
b15 b8b7 b0
3 Position counted from the left D
S2 end of character string data 42H (B) 41H (A)
S2 +1 6 designated by D D +1 31H (1) 30H (0)
Number of characters counted D +2 33H (3) 32H (2)
from the left end of the character
string data designated by S1 D +3 35H (5) 34H (4)
D +4 00H 49H (I)
"AB012345I"
(2) The NULL code (00H) indicating the end of the character string is automatically added to the
end of the character string.
Refer to 3.2.5 for the format of the character string data.
7-236
MIDR(P),MIDW(P)
(4) If the number of characters designated by S2 +1 exceeds the final character from the
character string data designated by D , data will be stored up to the final character.
Before execution 1
b15 b8b7 b0
b15 b8b7 b0 D 42H (B) 41H (A)
S1 31H (1) 30H (0) D +1 44H (D) 43H (C)
S1 +1 33H (3) 32H (2) D +2 46H (F) 45H (E) 2
S1 +2 35H (5) 34H (4) D +3 48H (H) 47H (G)
S1 +3 37H (7) 36H (6) D +4 00H 49H (I)
S1 +4 00H 38H (8) "ABCDEFGHI"
"012345678" After execution 3
b15 b8b7 b0
Position counted from the left
S2 5 end of character string data D 42H (B) 41H (A)
S2 +1 8 designated by D D +1 44H (D) 43H (C)
Number of characters counted
from the left end of character
D +2 31H (1) 30H (0) 4
string data designated by S1 D +3 33H (3) 32H (2)
D +4 00H 34H (4)
"ABCD01234"
Characters "35H" (5) to "37H" (7)
6
are not stored.
(5) If the number of characters designated by S2 +1 is " 1", stores the data up to the final 6
character designated by S1 to the area starting from the device designated by D .
b15
Before execution
b8b7 b0 7
b15 b8b7 b0 D 42H (B) 41H (A)
S1 31H (1) 30 H (0) D +1 44H (D) 43H (C)
S1 +1
S1 +2
33H (3)
35H (5)
32 H (2)
34 H (4)
D
D
+2
+3
46H (F)
48H (H)
45H (E)
47H (G)
8
S1 +3 00 H D +4 4AH (J) 49H (I)
"012345" D +5 00H 4B H (K)
"ABCDEFGHIJK"
Position counted from the left After execution
S2 2
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
For MIDR instruction
• The value of S2 exceeds the number of characters designated by S1 . (Error code: 4101)
• "00H" does not exist in the specified devices that follow the device specified for S1 .
(Error code: 4101)
• The value of S2 exceeds the number of characters designated by D . (Error code: 4101)
7-237
MIDR(P),MIDW(P)
• The S2 +1 value exceeds the number of characters for S1 . (Error code: 4101)
• "00H" does not exist in the specified devices that follow the device specified for S1 .
(Error code: 4101)
Program Example
(1) The following program stores the 3rd character through the 6th character from the left of the
character string stored in the area starting from D10 at devices starting from D0 when X0 is
turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8b7 b0 b15 b8b7 b0
D10 41 H (A) 42 H (B) D0 31 H (1) 32 H (2)
D11 31 H (1) 32 H (2) D1 46 H (E) 33 H (3)
D12 46 H (E) 33 H (3) D2 00 H
D13 00 H 45 H (D) "213E"
"BA213ED"
R0 3
R1 4
(2) The following program stores 4 characters of the character string data stored in the area
starting from D0 into the area starting from the 3rd character from the left of the character
string data in the area starting from D100 when X0 is turned ON.
[Ladder Mode] [List Mode]
[Operation]
Before execution
b15 b8b7 b0 b15 b8b7 b0
D0 31H (3) 32H (2) D100 53H (S) 55H (U)
D1 45H (E) 46H (F) D101 59H (Y) 43H (C)
D2 33H (3) 30H (0) D102 31H (1) 5AH (Z)
D3 00H D103 42H (B) 30H (0)
"21FE03" D104 00H
"USCYZ10B"
R0 3
After execution
R1 4 b15 b8b7 b0
D100 53H (S) 55H (U)
D101 31H (1) 32H (2)
D102 45H (E) 46H (F)
D103 42H (B) 30H (0)
D104 00H
"US21FE0B"
7-238
INSTR(P)
3
Command
INSTR INSTR S1 S2 D n
4
Command
INSTRP INSTRP S1 S2 D n
6
S1 : Character string to be searched or head number of the devices where the character string to be searched is
S2
stored (character string)
: Character string in which a search is performed or head number of the devices where the character string is 6
stored (character string)
D : Head number of the devices where the result of search will be stored (BIN 16 bits)
D –– –– ––
n –– ––
7-239
INSTR(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of n exceeds the number of characters for S2 . (Error code: 4100)
• 00H (NULL) does not exist within the corresponding device range after the device
designated by S1 , S2 . (Error code: 4100)
• The value of n is negative number or “0”. (Error code: 4100)
Program Example
(1) The following program searches from the 5th character from the left of the character string
data stored in devices starting from R0 for the character string data in devices starting from
D0, and stores the results at D100 when X0 goes ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D100 0
Stores "0" because there are no matches.
(2) The following program searches from the 3rd character from the left of the character string
data being stored in devices starting from D0 for the character string data "AB", and stores
the results of the search at D100 when X1C goes ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8b7 b0
D0 32H (2) 31H (1) Searches from the
D1 34H (4) 33H (3) 3rd character "AB" D100 5
D2 42H (B) 41H (A) 5th character from
the first character
D3 36H (6) 35H (5)
D4 42H (B) 41H (A)
D5 00H
7-240
STRINS(P)
Command
STRINS STRINS S D n 4
Command
STRINSP STRINSP S D n
6
S : Character string to be inserted or head number (character string) of the devices where insert character
strings are stored
6
D : Head number (character string) of the devices where insert character strings are stored
–– –– –– ––
8
S
D –– –– –– –– ––
n –– –– ––
(2) This instruction stores the NULL code (00H) into the device (1 word) that positions after the
last device where the character string data are stored, if the character string ( S + D ) value is
even after the insertion.
(3) This instruction stores the NULL code (00H) into the last device (high 8 bits) where the
character string data are stored, if the character string ( S + D ) value is odd after the
insertion.
(4) This instruction links the device, where the character string data are stored, specified by S
with the last device specified by D , if n is specified by the number of devices specified by D
plus one.
7-241
STRINS(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
• The number of characters in the devices specified by S , D , or the devices specified by
( S + D ) after the insertion exceeds 16383 characters. (Error code: 4100)
• The value specified by n is not within the specified range. (1 n 16383)
(Error code: 4100)
• The value specified by n exceeds the number of the devices specified by D plus one.
(Error code: 4100)
• The devices, that store character strings, specified by S overlaps with even one of the
devices specified by D . (Error code: 4101)
• The range of the devices specified by ( S + D ) in which character strings data have been
inserted exceeds the specified device range. (Error code: 4101)
• The NULL code (00H) does not exist within the specified device range after the device
specified by S or D . (Error code: 4101)
• The range of the devices specified by ( S + D ) in which character strings data have been
inserted overlaps with the range of the devices specified by S that store the character
string data. (Error code: 4101)
Program Example
(1) The following program inserts the character string data stored in the device D0 and up to the
fourth device from the initial character string data stored in D20 and up, when M0 is turned
on.
[Ladder Mode] [List Mode]
[Operation]
Befor insertion
D0 38 H (8) 35 H (5) D20 52 H (R) 50H (P)
D1 00 H 34 H (4) D21 47 H (G) 4FH (O)
D22 41 H (A) 52H (R)
D0 character string 584
D23 41 H (A) 4DH (M)
D24 43 H (C) 42H (B)
D25 00 H 44H (D)
After insertion
D20 52 H (R) 50H (P)
D21 35 H (5) 4FH (O)
D22 34 H (4) 38H (8)
D23 52 H (R) 47H (G)
D24 4DH (M) 41H (A)
D25 42 H (B) 41H (A)
D26 44 H (D) 43H (C)
D27 00 H
7-242
STRDEL(P)
Command
STRDEL STRDEL D n1 n2 4
Command
STRDELP STRDELP D n1 n2
6
D : Head number (character string) of the devices where character strings to be deleted are stored
6
n1 : Deletion start position (Setting range 1 n1 16383) (BIN 16 bits)
Setting
Data
Internal Devices
R, ZR
J \
U \G Zn
Constants
Other 7
Bit Word Bit Word K, H
D –– –– –– ––
n1 –– –– 8
n2 –– ––
Function
(2) This instruction stores the NULL code (00H) into the device (one word) that positions after
the last device that stores the character string data when the character string data specified
by D is even, after the characters are deleted.
(3) This instruction stores the NULL code (00H) into the last device (high 8 bits) that stores the
character string data when the character string data specified by D is odd, after the
characters are deleted.
(4) This instruction shifts the characters stored in the devices that position after the deleted
devices by n2 characters to the right, and then stores the NULL code (00H) into the empty
device.
7-243
STRDEL(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
• The number of characters in the devices specified by D exceeds 16383.
(Error code: 4100)
• The value specified by n1 is not within the range. (1 n1 16383) (Error code: 4100)
• The value specified by n1 exceeds the number of characters in the devices specified by
D . (Error code: 4100)
• The value specified by n2 exceeds the number of characters in the devices starting from
n1th to the last devices position. (Error code: 4100)
• The value specified by n2 is negative. (Error code: 4100)
Program Example
(1) The following program deletes the fourth to the seventh characters in the character string
data stored in the devices D0 and up, when M0 is turned on.
[Ladder Mode] [List Mode]
[Operation]
D0 52 H (R) 50H (P) D0 52 H (R) 50H (P) D0 52 H (R) 50H (P)
D1 47 H (G) 4FH (O) D1 47 H (G) 4FH (O) D1 44H (D) 4FH (O)
D2 41 H (A) 52H (R) D2 41 H (A) 52H (R) D2 00 H
D3 41 H (A) 4DH (M) D3 41 H (A) 4DH (M)
D0 character string PROD
D4 43 H (C) 42H (B) D4 43 H (C) 42H (B)
D5 00 H 44H (D) D5 00 H 44H (D)
7-244
EMOD(P)
3
Command
EMOD EMOD S1 S2 D
Command 4
EMODP EMODP S1 S2 D
S1 : 32-bit floating decimal point real number data or head number of the devices where the floating decimal point
6
real number data is stored (real number)
S2 : Decimal fraction digits data (BIN 16 bits)
D : Head number of the devices where the data after break down into BCD will be stored (BIN 16 bits) 6
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H E
S1 –– –– *1 –– ––
7
S2 –– ––
D –– –– –– –– –– –– ––
8
*1:Available only in multiple Universal model QCPU
Function
S1 +1 S1 D 0
3 . 25427 D +1 4270H
3254270H
D +2 0325H
32-bit floating-point real number
D +3 1
S2 3 D +4 3
S2 specifies the decimal fraction digits of the 32-bit floating decimal point real number data
of S1 . In the example above, a decimal fraction digit is designated as shown below:
3.25427
S2 =3
7-245
EMOD(P)
S1 +1 S1 D 1
0 . 03542768 D +1
D 3542770H
+2
D +3 1
S2 4 D +4 4
S1 +1 S1 D 1
1 . 5 4 3 2 1E + 2 D +1
D +2 1543210H
D +3 1
S2 3 D +4 1
(2) The 7th digit of the significant digits being stored at D +1 and D +2 is rounded off to make a
6-digit number.
S1 +1 S1 D 0
1 . 2 3456789 D +1
1234570H
D +2
D +3 1 123456789
S2 3 D +4 3 Rounded off
1234570
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The decimal fraction digit designated by S2 is outside the range of from 0 to 7.
(Error code: 4100)
• The device range designated by D exceeds the range of the relevant device.
(Error code: 4101)
• The 32-bit floating point real number specified by S1 is outside the following range.
-126 128
0, 2 | device | < 2 (Error code: 4100)
7-246
EMOD(P)
Program Example
1
(1) The following program breaks down the 32-bit floating decimal point type real number data
stored at D0 and D1 into BCD according to the decimal fraction digits as designated by R10,
and stores the results into the area starting from D100 when X0 is turned ON. 2
[Ladder Mode] [List Mode]
Step Instruction Device
3
[Operation]
4
D1 D0 D100 1
0.987654 D101
D102
9876540H 6
D103 1
R10 3 D104 4
6
7-247
EREXP(P)
High
Basic performance Process Redundant Universal
Command
EREXP EREXP S1 S2 D
Command
EREXPP S1 S2 D
EREXPP
S1 : Head number of the devices where BCD type floating point format data is stored (BIN 16 bits)
S2 : Decimal fraction digits data (BIN 16 bits)
D : The device where the converted 32-bit floating point real number data will be stored (real number)
S1 –– –– –– –– –– ––
S2 ––
D –– –– *1 –– ––
Function
(1) Converts the BCD type floating point data designated by S1 to the 32-bit floating decimal
point real number data according to the decimal fraction digits specified by S2 , and stores
the result into the area starting from the device designated by D .
S1 Sign When positive: 0
S1 +1 When negative: 1 D +1 D
BCD type floating BCD 7 digits
point format S1 +2 When positive: 0
S1 +3 Sign (exponent part) When negative: 1
S1 +4 BCD exponent 32-bit floating-point
(0 to 38) real number
S2 Number of digits in decimal fraction (0 to7)
(2) The sign at S1 and the sign for the exponent part at S1 +3 is set at 0 for a positive value and
at 1 for a negative value.
7-248
EREXP(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The format designated by S1 was neither 0 nor 1. (Error code: 4100)
2
• A value other than 0 to 9 exists in the each digit of S1 + 1 and S1 + 2. (Error code: 4100)
D10 3
7-249
SIN(P)
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
Command
SIN SIN S D
Command
SINP S D
SINP
S : Angle data of which the SIN (sine) value is obtained or head number of the devices where the angle data is
stored (real number)
D : Head number of the devices where the operation result will be stored (real number)
S –– –– *1 ––
D –– –– *1 –– ––
Function
(1) Returns the SIN (sine) value of the angle designated at S and stores the operation result in
the device number designated at D .
S +1 S D +1 D
SIN ( )
7-250
SIN(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is 0. *2
2
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant
CPU) (Error code: 4100)
*2: There are CPU modules that will not result in an operation error if 0 is specified. For details, refer to 3.2.4.
3
• The result exceeds the following range (Operation results in an overflow)
(For the Universal model QCPU only)
4
2128 | Operation result | (Error code: 4141)
• The value of the specified device is 0, unnormalized number, nonnumeric, and ± .
(For the Universal model QCPU only) (Error code: 4140) 6
Program Example
6
(1) The following program conducts a SIN operation on the angles stored in the four BCD digits
from X20 to X2F and stores the results at D0 and D1 as 32-bit floating decimal point type
real numbers. 7
[Ladder Mode]
Inputs an angle used for SIN
operation ( 1 ). 8
Converts the input angle into
a 32-bit floating-point real
number ( 2 ).
Converts the converted angle
into a radian value ( 3 ).
Executes SIN operation
[List Mode]
Step Instruction Device
7-251
SIND(P)
High
Basic performance Process Redundant Universal
Command
SIND SIND S D
Command
SINDP S D
SINDP
S : Angle data of which the SIN (sine) value is obtained or head number of the devices where the angle data is
stored (real number)
D : Head number of the devices where the operation result will be stored (real number)
S –– –– ––
D –– –– –– ––
Function
(1) The SIN (sine) value of the angle specified by S is calculated and its result is stored into the
device specified by D .
S +3 S +2 S +1 S D +3 D +2 D +1 D
SIN ( )
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is not in the following range: (Error code: 4140)
-1022 1024
0,2 | value of specified device | < 2
• The value of the designated device is 0. (Error code: 4140)
• The result exceeds the following range (Operation results in an overflow):
21024 | Operation result | (Error code: 4141)
7-252
SIND(P)
Program Example
1
(1) The following program conducts a SIN operation on the angles stored in the four BCD digits
from X20 to X2F and stores the results at D0 to D3 as 64-bit floating decimal point type real
numbers. 2
[Ladder Mode]
[List Mode]
6
Step Instruction Device
8
[Operations involved when X20 to X2F designate a value of 150]
7-253
COS(P)
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
Command
COS COS S D
Command
COS
P S D
COSP
S : Angle data of which the COS (cosine) value is obtained or head number of the devices where the angle data
is stored (real number)
D : Head number of the devices where the operation result will be stored (real number)
S –– –– *1 ––
D –– –– *1 –– ––
Function
(1) Returns the COS (cosine) value of the angle designated by S and stores operation result at
device number designated by D .
S +1 S D +1 D
COS ( )
7-254
COS(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is 0. *2
2
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant
CPU) (Error code: 4100)
*2: There are CPU modules that will not result in an operation error if 0 is specified. For details, refer to 3.2.4.
3
• The result exceeds the following range (Operation results in an overflow)
(For the Universal model QCPU only)
4
2128 | Operation result | (Error code: 4141)
• The value of the specified device is 0, unnormalized number, nonnumeric, and ± .
(For the Universal model QCPU only) (Error code: 4140) 6
Program Example
6
(1) The following program performs a COS operation on the angle data designated by the 4
BCD digits from X20 to X2F, and stores results as 32-bit floating decimal point type real
numbers at D0 and D1. 7
[Ladder Mode]
Inputs an angle used for COS
operation ( 1 ).
Converts the input angle into
8
a 32-bit floating-point real
number ( 2 ).
Converts the converted angle into
a radian value ( 3 ).
Executes COS operation
[List Mode]
7-255
COSD(P)
High
Basic performance Process Redundant Universal
Command
COSD COSD S D
Command
COSDP S D
COSDP
S : Angle data of which the COS (cosine) value is obtained or head number of the devices where the angle data
is stored (real number)
D : Head number of the devices where the operation result will be stored (real number)
S –– –– ––
D –– –– –– ––
Function
(1) The COS (cosine) value of the angle specified by S is calculated and its result is stored into
the device specified by D .
S +3 S +2 S +1 S D +3 D +2 D +1 D
COS ( )
64-bit floating-point 64-bit floating-point
real number real number
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is not in the following range: (Error code: 4140)
0,2-1022 | value of specified device | < 21024
• The value of the designated device is 0. (Error code: 4140)
• The result exceeds the following range (Operation results in an overflow):
21024 | Operation result | (Error code: 4141)
7-256
COSD(P)
Program Example
1
(1) The following program performs a COS operation on the angle data designated by the 4
BCD digits from X20 to X2F, and stores results as 64-bit floating decimal point type real
numbers at D0 to D3. 2
[Ladder Mode]
[List Mode]
6
Step Instruction Device
8
[Operations involved when X20 to X2F designate a value of 60]
7-257
TAN(P)
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
Command
TAN TAN S D
Command
TANP S D
TANP
S : Angle data of which the TAN (tangent) value is obtained or head number of the devices where the angle data
is stored (real number)
D : Head number of the devices where the operation result will be stored (real number)
S –– –– *2 ––
D –– –– *2 –– ––
Function
(1) Returns the tangent (TAN) value of the angle data designated by S , and stores operation
result in device designated by D .
S +1 S D +1 D
TAN ( )
(3) When angles designated by S are /2 radians, or (3/2) radians, an operation error will
be generated in the calculation of the radian value, so care must be taken to avoid such
errors.
7-258
TAN(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• Operation results are outside the range shown below: 2
0, 2-126 |operation result| 2128
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant
CPU) (Error code: 4100) 3
• The value of the specified device is 0. *3
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant
CPU) (Error code: 4100)
4
*3: There are CPU modules that will not result in an operation error if 0 is specified. For details, refer to 3.2.4.
Program Example 7
(1) The following program performs a TAN operation on the angle data set by the 4 BCD digits
from X20 to X2F, and stores the results as 32-bit floating decimal point type real numbers at 8
D0 and D1.
[Ladder Mode]
[List Mode]
Step Instruction Device
7-259
TAND(P)
High
Basic performance Process Redundant Universal
Command
TAND TAND S D
Command
TANDP S D
TANDP
S : Angle data of which the TAN (tangent) value is obtained or head number of the devices where the angle data
is stored (real number)
D : Head number of the devices where the operation result will be stored (real number)
S –– –– ––
D –– –– –– ––
Function
(1) The TAN (tangent) value of the angle specified by S is calculated and its result is stored into
the device specified by D .
S +3 S +2 S +1 S D +3 D +2 D +1 D
TAN ( )
64-bit floating-point 64-bit floating-point
real number real number
(3) When angles designated by S are /2 radians, or (3/2) radians, an operation error will
be generated in the calculation of the radian value, so care must be taken to avoid such
errors.
(4) When the operation results in -0 or an underflow, the result is processed as 0.
7-260
TAND(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is not in the following range: (Error code: 4140) 2
0,2-1022 | value of specified device | < 21024
• The value of the designated device is 0. (Error code: 4140)
3
• The result exceeds the following range (Operation results in an overflow):
21024 | Operation result | (Error code: 4141)
4
Program Example
(1) The following program performs a TAN operation on the angle data set by the 4 BCD digits 6
from X20 to X2F, and stores the results as 64-bit floating decimal point type real numbers at
D0 to D3.
[Ladder Mode]
6
Inputs an angle used for TAN
operation ( 1 ).
Converts the input angle into a 7
64-bit floating-point real number ( 2 ).
Converts the converted angle into a
radian value ( 3 ).
Executes TAN operation using the 8
converted radian value ( 4 ).
D23 D22 D21 D20 4 TAN operation D23 D22 D21 D20
2.356194 -1.000000
64-bit floating-point TAND 64-bit floating-point
real number real number
7-261
ASIN(P)
High
Basic performance Process Redundant Universal
Command
ASIN ASIN S D
Command
ASINP S D
ASINP
S : SIN value of which the SIN-1 (inverse sine) value is obtained or head number of the devices where the SIN
value is stored (real number)
D : Head number of the devices where the operation result will be stored (real number)
S –– –– *1 ––
D –– –– *1 –– ––
Function
(1) Returns the SIN-1 angle of the SIN value designated by S , and stores operation results at
word device designated by D .
S +1 S D +1 D
-1
SIN ( )
(2) The SIN value designated by S can be in the range from 1.0 to 1.0.
7-262
ASIN(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value designated by S is outside the range of from 1.0 to 1.0. (Error code: 4100)
2
• The contents of the designated device or the result of the addition are not "0", or not within
the following range(For the Universal model QCPU only): (Error code: 4140)
3
0, 2-126 | Contents of designated device | < 2128
• The value of the specified device is 0. *2
(For the High Performance model QCPU, Process CPU, Redundant CPU) 4
(Error code: 4100)
*2: There are CPU modules that will not result in an operation error if 0 is specified. Refer to 3.2.4 for details.
7-263
ASIN(P)
Program Example
(1) The following program seeks the inverse sine of the 32-bit floating decimal point real number
at D0 and D1, and outputs the angle to the 4 BCD digits at Y40 to Y4F.
[Ladder Mode]
[List Mode]
Step Instruction Device
Conversion D30
D21 D20 b15 b0 BCD operation Y4F Y40
toBIN
30 30 0 0 3 0
32-bit floating-point INT BIN value BCD BCD value
real number
7-264
ASIND(P)
High
2
Basic performance Process Redundant Universal
3
Command
ASIND ASIND S D 4
Command
ASINDP S D
ASINDP
6
S : SIN value of which the SIN-1 (inverse sine) value is obtained or head number of the devices where the SIN
value is stored (real number)
6
D : Head number of the devices where the operation result will be stored (real number)
D –– –– –– ––
Function
(1) The angle is calculated from the SIN (sine) value specified by is and its result is stored
(2) The SIN value designated by S can be in the range from 1.0 to 1.0.
7-265
ASIND(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is not in the following range: (Error code: 4140)
-1022 1024
0,2 | value of specified device | < 2
• The value of the designated device is 0. (Error code: 4140)
• The value specified by S is within the double-precision floating-point range and outside
the range of -1.0 to 1.0. (Error code: 4100)
• The result exceeds the following range (Operation results in an overflow):
21024 | Operation result | (Error code: 4141)
Program Example
(1) The following program seeks the inverse sine of the 64-bit floating decimal point real number
at D0 to D3, and outputs the angle to the 4 BCD digits at Y40 to Y4F.
[Ladder Mode]
[List Mode]
3 Conversion D30
D23 D22 D21 D20 to BIN b15 b0 4 BCD operation Y4F Y40
30 30 0 0 3 0
64-bit floating-point INTD BIN value BCD BCD value
real number
7-266
ACOS(P)
High
2
Basic performance Process Redundant Universal
3
Command
ACOS ACOS S D
4
Command
ACOSP S D
ACOSP
6
S : COS value of which the COS-1 (inverse cosine) value is obtained or head number of the devices where the
COS value is stored (real number)
6
D : Head number of the devices where the operation result will be stored (real number)
D –– –– *1 –– ––
Function
(2) The COS value designated by S can be in the range of from 1.0 to 1.0.
7-267
ACOS(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value designated by S is outside the range of from 1.0 to 1.0. (Error code: 4100)
• The contents of the designated device or the result of the addition are not "0", or not within
the following range(For the Universal model QCPU only): (Error code: 4140)
0, 2-126 | Contents of designated device | < 2128
• The value of the specified device is 0. *2
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant
CPU) (Error code: 4100)
*2: There are CPU modules that will not result in an operation error if 0 is specified. Refer to 3.2.4 for details.
Program Example
(1) The following program seeks the inverse cosine of the 32-bit floating decimal point real
number at D0 and D1, and outputs the angle to the 4 BCD digits at Y40 to Y4F.
[Ladder Mode]
[List Mode]
Conversion D30
D21 D20 to BIN b15 b0 BCD operation Y4F Y40
60 60 0 0 6 0
32-bit floating-point INT BIN value BCD BCD value
real number
7-268
ACOSD(P)
High
2
Basic performance Process Redundant Universal
3
Command
ACOSD ACOSD S D 4
Command
ACOSDP S D
ACOSDP
6
S : COS value of which the COS-1 (inverse cosine) value is obtained or head number of the devices where the
COS value is stored (real number)
6
D : Head number of the devices where the operation result will be stored (real number)
D –– –– –– ––
8
Function
(1) The angle is calculated from the COS (cosine) value specified by is and its result is
(2) The COS value designated by S can be in the range of from 1.0 to 1.0.
7-269
ACOSD(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is not in the following range: (Error code: 4140)
-1022 1024
0,2 | value of specified device | < 2
• The value of the designated device is 0. (Error code: 4140)
• The value specified by S is within the double-precision floating-point range and outside
the range of -1.0 to 1.0. (Error code: 4100)
• The result exceeds the following range (Operation results in an overflow):
21024 | Operation result | (Error code: 4141)
Program Example
(1) The following program seeks the inverse cosine of the 64-bit floating decimal point real
number at D0 to D3, and outputs the angle to the 4 BCD digits at Y40 to Y4F.
[Ladder Mode]
1
Calculates an angle (radian value) by COS
operation ( 1 ).
Converts the radian value into an angle ( 2 ).
[List Mode]
3 Conversion D30
D23 D22 D21 D20 to BIN b15 b0 4 BCD operation Y4F Y40
60 60 0 0 6 0
64-bit floating-point INTD BIN value BCD BCD value
real number
7-270
ATAN(P)
High
2
Basic performance Process Redundant Universal
3
Command
ATAN ATAN S D 4
Command
ATANP S D
ATANP
6
S : TAN value of which the TAN-1 (inverse tangent) value is obtained or head number of the devices where the
TAN value is stored (real number)
6
D : Head number of the devices where the operation result will be stored (real number)
D –– –– *1 –– ––
Function
7-271
ATAN(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The contents of the designated device or the result of the addition are not "0", or not within
the following range(For the Universal model QCPU only): (Error code: 4140)
0, 2-126 | Contents of designated device | < 2128
• The value of the specified device is 0. *2
(For the High Performance model QCPU, Process CPU, Redundant CPU)
(Error code: 4100)
*2: There are CPU modules that will not result in an operation error if 0 is specified. Refer to 3.2.4 for details.
Program Example
(1) The following program seeks the inverse tangent of the 32-bit floating decimal point real
number at D0 and D1, and outputs the angle to the 4 BCD digits at Y40 to Y4F.
[Ladder Mode]
[List Mode]
Step Instruction Device
D30
D21 D20 Conversion to BIN b15 b0 BCD operation Y4F Y40
45 45 0 0 4 5
32-bit floating-point INT BIN value BCD BCD value
real number
7-272
ATAND(P)
High
2
Basic performance Process Redundant Universal
3
Command
ATAND ATAND S D 4
Command
ATANDP S D
ATANDP
6
S : TAN value of which the TAN-1 (inverse tangent) value is obtained or head number of the devices where the
TAN value is stored (real number)
6
D : Head number of the devices where the operation result will be stored (real number)
D –– –– –– ––
Function
(1) The angle is calculated from the TAN (tangent) value specified by is and its result is
S +3 S +2 S +1 S D +3 D +2 D +1 D
1
TAN ( )
64-bit floating-point 64-bit floating-point
real number real number
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is not in the following range: (Error code: 4140)
-1022 1024
0,2 | value of specified device | < 2
• The value of the designated device is 0. (Error code: 4140)
• The result exceeds the following range (Operation results in an overflow):
21024 | Operation result | (Error code: 4141)
7-273
ATAND(P)
Program Example
(1) The following program seeks the inverse tangent of the 64-bit floating decimal point real
number at D0 to D3, and outputs the angle to the 4 BCD digits at Y40 to Y4F.
[Ladder Mode]
1
Calculates an angle (radian value) by TAN
operation ( 1 ).
Converts the radian value into
an angle ( 2 ).
Converts the angle in 64-bit floating-point
real number into an integer ( 3 ).
Outputs the integer-converted angle
to a display device ( 4 ).
[List Mode]
3 Conversion D30
D23 D22 D21 D20 to BIN b15 b0 4 BCD operation Y4F Y40
45 45 0 0 4 5
64-bit floating-point INTD BIN value BCD BCD value
real number
7-274
RAD(P)
Ver.
High
2
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
3
Command
RAD RAD S D 4
Command
RADP S D
RADP
6
S : Angle to be converted to radian units or head number of the devices where the angle is stored (real number)
D : Head number of the devices where the value converted in radian units will be stored (real number) 6
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word E
S –– –– *2 ––
7
D –– –– *2 –– ––
Function
(2) Conversion from degree to radian units is performed according to the following equation:
Radian unit = Degree unit x
180
7-275
RAD(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The contents of the designated device or the result of the addition are not "0", or not within
the following range(For the Universal model QCPU only): (Error code: 4140)
0, 2-126 | Contents of designated device | < 2128
• The value of the specified device is 0. *3
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant
CPU) (Error code: 4100)
*3: There are CPU modules that will not result in an operation error if 0 is specified. For details, refer to 3.2.4.
Program Example
(1) The following program converts the angle set by the 4 BCD digits at X20 to X2F to radians,
and stores results as 32-bit floating decimal point type real number at D20 and D21.
[Ladder Mode]
[List Mode]
Step Instruction Device
7-276
RADD(P)
High
2
Basic performance Process Redundant Universal
3
Command
RADD RADD S D 4
Command
RADDP S D
RADDP
6
S : Angle to be converted to radian units or head number of the devices where the angle is stored (real number)
D : Head number of the devices where the value converted in radian units will be stored (real number) 6
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word E
S –– –– –– 7
D –– –– –– ––
8
Function
(1) The unit expressing the size of an angle is converted into the radian unit from the degree
S +3 S +2 S +1 S D +3 D +2 D +1 D
( ) ( )rad
(2) Conversion from degree to radian units is performed according to the following equation:
Radian unit = Degree unit x
180
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is not in the following range: (Error code: 4140)
-1022 1024
0,2 | value of specified device | < 2
• The value of the designated device is 0. (Error code: 4140)
• The result exceeds the following range (Operation results in an overflow):
21024 | Operation result | (Error code: 4141)
7-277
RADD(P)
Program Example
(1) The following program converts the angle set by the 4 BCD digits at X20 to X2F to radians,
and stores results as 64-bit floating decimal point type real number at D20 to D23.
[Ladder Mode]
[List Mode]
Step Instruction Device
7-278
DEG(P)
Ver.
High
2
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
3
Command
DEG DEG S D 4
Command
DEGP S D
DEGP
6
S : Radian angle to be converted to degrees or head number of the devices where the radian angle is stored
(real number) 6
D : Head number of the devices where the value converted in degrees will be stored (real number)
D –– –– *1 –– ––
Function
(2) The conversion from radians to angles is performed according to the following equation:
7-279
DEG(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is 0. *2
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant
CPU) (Error code: 4100)
*2: There are CPU modules that will not result in an operation error if 0 is specified. For details, refer to 3.2.4.
Program Example
(1) The following program converts the radian value set with 32-bit floating decimal point type
real number at D20 and D21 to angles, and stores the result as a BCD value at Y40 to Y4F.
[Ladder Mode]
[List Mode]
[Operations involved when the values at D20 and D21 are 1.435792]
Conversion Conversion D0
D21 D20 to angle D11 D10 to BIN b15 b0 BCD operation Y4F Y40
1 . 435792 82 . 26482 82 0 0 8 2
32-bit floating-point DEG 32-bit floating-point BIN BIN value BCD BCD value
real number real number
7-280
DEGD(P)
High
2
Basic performance Process Redundant Universal
3
Command
DEGD DEGD S D 4
Command
DEGDP S D
DEGDP
6
S : Radian angle to be converted to degrees or head number of the devices where the radian angle is stored
(real number)
6
D : Head number of the devices where the value converted in degrees will be stored (real number)
S –– –– ––
D –– –– –– ––
8
Function
(1) The unit expressing the size of an angle is converted into the degree unit from the radian
(2) The conversion from radians to angles is performed according to the following equation:
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is not in the following range: (Error code: 4140)
0,2-1022 | value of specified device | < 21024
• The value of the designated device is 0. (Error code: 4140)
• The result exceeds the following range (Operation results in an overflow):
21024 | Operation result | (Error code: 4141)
7-281
DEGD(P)
Program Example
(1) The following program converts the radian value set with 64-bit floating decimal point type
real number at D20 to D23 to angles, and stores the result as a BCD value at Y40 to Y4F.
[Ladder Mode]
[List Mode]
7-282
POW(P)
High
Ver. 2
Basic performance Process Redundant Universal
Command 4
POW POW S1 S2 D
Command
POWP POWP S1 S2 D 6
S1 : Exponentiation recipient data or head number of the devices where the exponentiation recipient data are 6
stored (real number)
S2 : Exponentiation data or head number of the devices where the data are stored (real number)
D : Head number of the devices where the operation result will be stored (real number)
7
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word E
S1 –– –– *1 ––
8
S2 –– –– *1
D –– –– –– ––
S1 +1 S1 D +1 D
S1 +1 S1 × S1 +1 S1 × ……… × S1 +1 S1 × S1 +1 S1
(2) The following shows the values to be specified by and stored into S1 or S2 .
-126 128
0, 2 | Set values (Storage values) | < 2
(3) If the value resulted from the operation is 0 or an underflow occurs, the result will be
processed as 0.
7-283
POW(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
• The values specified by S1 or S2 are out of the ranges shown below. (Error code: 4140)
0, 2-126 | Specified value (Storage value) | < 2128
Program Example
(1) The following program raises the 32-bit floating-point data type real number data specified
by D0 and D1 to the data specified by (D10 and D11)th power, when X10 is turned on. Then
the program stores the operation result into D20 and D21.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D11 D10
1.2
D1 D0 Exponentiation D21 D20
operation
0.22 0.163
7-284
POWD(P)
High
Ver. 2
Basic performance Process Redundant Universal
Command 4
POWD POWD S1 S2 D
Command
POWDP POWDP S1 S2 D 6
S1 : Exponentiation recipient data or head number of the devices where the exponentiation recipient data are 6
stored (real number)
S2 : Exponentiation data or head number of the devices where the data are stored (real number)
D : Head number of the devices where the operation result will be stored (real number)
7
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word E
S1 –– –– *1 ––
8
S2 –– –– *1 ––
D –– –– –– ––
S1 +3 S1 +2 S1 +1 S1 D +3 D +2 D +1 D
S1 +3 S1 +2 S1 +1 S1 × S1 +3 S1 +2 S1 +1 S1 × ……… × S1 +3 S1 +2 S1 +1 S1
64-bit floating-point data type real number 64-bit floating-point data type real number
(2) The following shows the values to be specified by and stored into S1 or S2
-1022 1024
0, 2 | Set values (Storage values) | < 2
(3) If the value resulted from the operation is 0 or an underflow occurs, the result will be
processed as 0.
7-285
POWD(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
• The values specified by S1 or S2 are out of the range shown below. (Error code: 4140)
-1022 1024
0, 2 | Set values (Storage values) | < 2
Program Example
(1) The following program raises the 64-bit floating-point data type real number specified by
D200 to D203 to the number nth specified by D0 to D3 power, when X10 is turned on. Then
the program stores the operation result into D100 to D103.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
D3 D2 D1 D0
Exponentiation
3
operation
D203 D202 D201 D200 D103 D102 D101 D100
15.6 3796.416
7-286
SQR(P)
Ver.
High
2
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
3
Command
SQR SQR S D 4
Command
SQRP S D
SQRP
6
S : Data of which the square root is obtained or head number of the devices where the data is stored
(real number) 6
D : Head number of the devices where the operation result will be stored (real number)
D –– –– *2 –– ––
Function
7.12.19 Square root operation for floating-point data (Single precision) (SQR(P))
7.12 Special function instructions
(1) Returns the square root of the value designated at S , and stores the operation result in the
device number designated at D .
S +1 S D +1 D
( )
(2) Only positive values can be designated by S . (Operation cannot be performed on negative
numbers.)
7-287
SQR(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value designated by S is a negative number. (Error code: 4100)
• The contents of the designated device or the result of the addition are not "0", or not within
the following range(For the Universal model QCPU only): (Error code: 4140)
0, 2-126 | Contents of designated device | < 2128
• The value of the specified device is 0. *3
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant
CPU, and Q4ARCPU) (Error code: 4100)
*3: There are CPU modules that will not result in an operation error if 0 is specified. For details, refer to 3.2.4.
Program Example
(1) The following program seeks the square root of the value set by the 4 BCD digits from X20
to X2F, and stores the result as a 32-bit floating decimal point type real number at D0 and
D1.
[Ladder Mode]
[List Mode]
Step Instruction Device
7-288
SQRD(P)
High
2
Basic performance Process Redundant Universal
3
Command
SQRD SQRD S D 4
Command
SQRDP S D
SQRDP
6
S : Data of which the square root is obtained or head number of the devices where the data is stored
(real number)
6
D : Head number of the devices where the operation result will be stored (real number)
D –– –– –– ––
Function
(1) Returns the square root of the value designated at , and stores the operation result in the
7.12.20 Square root operation for floating-point data (Double precision) (SQRD(P))
7.12 Special function instructions
S
S +3 S +2 S +1 S D +3 D +2 D +1 D
( )
(2) Only positive values can be designated by S . (Operation cannot be performed on negative
numbers.)
(3) When the operation results in -0 or an underflow, the result is processed as 0.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value designated by S is a negative number. (Error code: 4100)
• The value of the specified device is not in the following range: (Error code: 4140)
-1022 1024
0,2 | value of specified device | < 2
• The value of the designated device is 0. (Error code: 4140)
• The result exceeds the following range (Operation results in an overflow):
21024 | Operation result | (Error code: 4141)
7-289
SQRD(P)
Program Example
(1) The following program seeks the square root of the value set by the 4 BCD digits from X20
to X2F, and stores the result as a 64-bit floating decimal point type real number at D0 to D3.
[Ladder Mode]
[List Mode]
7-290
EXP(P)
Ver.
High
2
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
3
Command
EXP EXP S D 4
Command
EXPP S D
EXPP
6
S : Data of which the exponential value is obtained or head number of the devices where the data is stored
(real number) 6
D : Head number of the devices where the operation result will be stored (real number)
D –– –– *2 –– ––
Function
e ( )
(2) Exponent operations are calculated taking the base (e) to be "2.71828".
7-291
EXP(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• Operation results are outside the range shown below: (Error code: 4100)
2-126 | operation result | 2128
(For a High Performance model QCPU)
2-126 | operation result | 2128
(For a Basic model QCPU/Process CPU/Redundant CPU)
• The value of the specified device is 0. *3
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant
CPU) (Error code: 4100)
*3: There are CPU modules that will not result in an operation error if 0 is specified. For details, refer to 3.2.4.
7-292
EXP(P)
Program Example
1
(1) The following program performs an exponent operation on the value set by the 2 BCD digits
at X20 to X27, and stores the results as a 32-bit floating decimal point real number at D0 and
D1. 2
[Ladder Mode]
6
[List Mode]
Step Instruction Device
7
*4: The operation result will be under 2129 if the BCD value of X20 to X27 is less than 89, from the calculation
loge 2129 = 89.4.
Because setting a value of over 90 will return an operation error, turn M0 ON if a value of over 90 has been
set to avoid the error.
7-293
EXPD(P)
High
Basic performance Process Redundant Universal
Command
EXPD EXPD S D
Command
EXPDP S D
EXPDP
S : Data of which the exponential value is obtained or head number of the devices where the data is stored
(real number)
D : Head number of the devices where the operation result will be stored (real number)
S –– –– ––
D –– –– –– ––
Function
(1) Returns the exponent of the value designated by S , and stores the results of the operation
at the device designated by D .
S +3 S +2 S +1 S D +3 D +2 D +1 D
e ( ) ( )
(2) Exponent operations are calculated taking the base (e) to be "2.71828".
(3) When the operation results in -0 or an underflow, the result is processed as 0.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value of the specified device is not in the following range: (Error code: 4140)
0,2-1022 | value of specified device | < 21024
• The value of the designated device is 0. (Error code: 4140)
• The result exceeds the following range (Operation results in an overflow):
21024 | Operation result | (Error code: 4141)
7-294
EXPD(P)
Program Example
1
(1) The following program performs an exponent operation on the value set by the 2 BCD digits
at X20 to X31, and stores the results as a 64-bit floating decimal point real number at D0 to
D3. 2
[Ladder Mode]
[List Mode] 6
Step Instruction Device
8
[Operations involved when value designated by X20 to X31 is 13]
1 Conversion D20 2 Conversion to
X31 X20 to BIN b15 b0 floating-point D13 D12 D11 D10 3 EXP operation D3 D2 D1 D0
*1: The operation result will be under 21024 if the BCD value of X20 to X31 is less than 709, from the calculation
loge 21024 = 709.7832.
Because setting a value of over 710 will return an operation error, turn M0 ON if a value of over 710 has been
set to avoid the error.
7-295
LOG(P)
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
Command
LOG LOG S D
Command
LOGP S D
LOGP
S : Data of which the natural logarithm is obtained or head number of the devices where the data is stored
(real number)
D : Head number of the devices where the operation result will be stored (real number)
S –– –– *2 ––
D –– –– *2 –– ––
Function
(1) Returns the natural logarithm of the value designated by S taking (e) as base, and stores
operation results at device designated by D .
S +1 S D +1 D
log ( )
(2) Only positive values can be designated by S . (Operation cannot be performed on negative
numbers.)
7-296
LOG(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value designated by S is negative. (Error code: 4100) 2
• The value designated by S is 0. (Error code: 4100)
• The contents of the designated device or the result of the addition are not "0", or not within 3
the following range(For the Universal model QCPU only): (Error code: 4140)
0, 2-126 | Contents of designated device | < 2128
• The value of the specified device is 0. *3 4
(For the Basic model QCPU, High Performance model QCPU, Process CPU, Redundant
CPU) (Error code: 4100)
*3: There are CPU modules that will not result in an operation error if 0 is specified. For details, refer to 3.2.4. 6
• The result exceeds the following range (Operation results in an overflow)
(For the Universal model QCPU only)
2128 | Operation result | (Error code: 4141)
6
• The value of the specified device is 0, unnormalized number, nonnumeric, and ± .
(For the Universal model QCPU only) (Error code: 4140)
7
Program Example
8
(1) The following program seeks the natural logarithm of the value "10" set by D50, and stores
the result at D30 and D31.
[Ladder Mode]
[List Mode]
Step Instruction Device
[Operation]
D50 Conversion to
1 b15 b0 2
floating-point D41 D40 3 LOG operation D31 D30
10 10 10 2 . 302585
MOV BIN value FLT 32-bit floating-point LOG 32-bit floating-point
real number real number
7-297
LOGD(P)
High
Basic performance Process Redundant Universal
Command
LOGD LOGD S D
Command
LOGDP S D
LOGDP
S : Data of which the natural logarithm is obtained or head number of the devices where the data is stored
(real number)
D : Head number of the devices where the operation result will be stored (real number)
S –– –– ––
D –– –– –– ––
Function
(1) Returns the natural logarithm of the value designated by S taking (e) as base, and stores
operation results at device designated by D .
S +3 S +2 S +1 S D +3 D +2 D +1 D
log ( ) ( )
(2) Only positive values can be designated by S . (Operation cannot be performed on negative
numbers.)
(3) When the operation results in -0 or an underflow, the result is processed as 0.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value designated by S is negative. (Error code: 4100)
• The value designated by S is 0. (Error code: 4100)
• The value of the specified device is not in the following range: (Error code: 4140)
-1022 1024
0,2 | value of specified device | < 2
• The value of the designated device is 0. (Error code: 4140)
• The result exceeds the following range (Operation results in an overflow):
21024 | Operation result | (Error code: 4141)
7-298
LOGD(P)
Program Example
1
(1) The following program seeks the natural logarithm of the value "10" set by D50, and stores
the result at D30 to D33.
[Ladder Mode] 2
Sets data used for natural logarithm
operation ( 1 ).
3
Converts the operation data into a 64-bit
floating-point real number ( 2 ).
Executes natural logarithm operation ( 3 ).
4
[List Mode] 6
Step Instruction Device
[Operation] 7
D50 2 Conversion to
1 b15 b0 floating-point D43 D42 D41 D40 3 LOG operation D33 D32 D31 D30
10 10 10 2.302585
MOV BIN value FLTD 64-bit floating-point LOGD 64-bit floating-point 8
real number real number
7-299
LOG10(P)
Ver.
High
Basic performance Process Redundant Universal
Command
LOG10 LOG10 S D
Command
LOG10P S D
LOG10P
S : Data of which the common logarithm is obtained or head number of the devices where the data are stored
(real number)
D : Head number of the devices where the operation result will be stored (real number)
S –– –– –– *1 ––
D –– –– –– –– ––
Function
(1) This instruction obtains the value specified by S for common logarithm (logarithm with base
10), and then stores the operation result into the device specified by D .
Log10 S +1 S D +1 D
(2) Only positive values can be specified by S . (Operation cannot be performed on negative
numbers.)
(3) If the value resulted from the operation is 0 or an underflow occurs, the result will be
processed as 0.
7-300
LOG10(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
• The value specified by S is negative. (Error code: 4100) 2
• The value specified by S is 0. (Error code: 4100)
• The value of the specified device is not in the following range.
-126 128
(Error code: 4140) 3
0,2 | value of specified device | < 2
7-301
LOG10D(P)
Ver.
High
Basic performance Process Redundant Universal
Command
LOG10D LOG10D S D
Command
LOG10DP S D
LOG10DP
S : Data of which the common logarithm is obtained or head number of the devices where the data are stored
(real number)
D : Head number of the devices where the operation result will be stored (real number)
S –– –– *1 ––
D –– –– –– ––
Function
(1) This instruction obtains the value specified by S for common logarithm (logarithm with base
10),and then stores the operation result into the device specified by D .
Log10 S +3 S +2 S +1 S D +3 D +2 D +1 D
(2) Only positive values can be specified by S . (Operation cannot be performed on negative
numbers.)
(3) If the value resulted from the operation is 0 or an underflow occurs, the result will be
processed as 0.
7-302
LOG10D(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
• The value specified by S is negative. (Error code: 4100) 2
• The value specified by S is 0. (Error code: 4100)
• The value of the specified device is not in the following range:
-1022 1024
(Error code: 4140) 3
0,2 | value of specified device | < 2
• The value of the specified device is 0. (Error code: 4140)
• The value resulted from the operation is within the range shown below. 4
(When an overflow occurs): (Error code: 4141)
21024 | value of specified device |
6
Program Example
6
(1) This following program obtains the value for common logarithm of the 64-bit floating-point
data type real number specified by D600 to D603 when X10 is turned on. Then the program
stores the operation result into D123 to D126.
[Ladder Mode] [List Mode]
7
Step Instruction Device
[Operation]
7-303
RND(P),SRND(P)
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
Command
RND RND D
Command
RNDP D
RNDP
Command
SRND SRND S
Command
SRNDP S
SRNDP
D : Head number of the devices where random numbers will be stored (BIN 16 bits)
S : Random number serial data or the first number of the devices where the random number serial data is stored
(BIN 16 bits)
D –– ––
S ––
Function
The random number generation instruction generates random numbers conforming to a certain
calculation formula. In the calculation using the formula, the result of previous calculation is used
as a coefficient.
The random series change instruction can change the random number generation pattern.
RND
Generates random number of from 0 to 32767, and stores at device designated by D .
SRND
Updates random number series according to the 16-bit BIN data being stored in device
designated by S .
7-304
RND(P),SRND(P)
Operation Error
1
(1) There are no operation errors associated with the RND(P) or SRND(P) instructions.
2
Program Example
(1) The following program stores random number at D100 when X10 is turned ON.
3
[Ladder Mode] [List Mode]
6
(2) The following program updates a random number series according to the contents of D0
when X10 is turned ON.
[Ladder Mode] [List Mode]
6
Step Instruction Device
7-305
BSQR(P),BDSQR(P)
High
Basic performance Process Redundant Universal
BSQR/BDSQR
Command
BSQR,BDSQR S D
Command
P S D
BSQRP,BDSQRP
S : Data of which the square root is obtained or the number of the device where the data is stored
(BSQR(P): BCD 4 digits, BDSQR(P): BCD 8 digits)
D : Head number of the devices where the square root calculation result will be stored (BCD 4 digits)
S ––
D –– ––
Function
BSQR
(1) Returns the square root of the value designated at S , and stores the operation result in the
device number designated at D .
D D +1
S Integer part . Decimal fraction part
(2) Values that can be designated at S are BCD values with a maximum of 4 digits
(from 0 to 9999).
(3) The operation results of D and D +1 are stored as their respective BCD values of between
0 and 9999.
(4) Operation results are rounded off from the fifth decimal place.
For this reason, the fourth decimal place has an error of ±1.
7-306
BSQR(P),BDSQR(P)
BDSQR
(1) Calculates the square root of the values designated by and +1 and stores the results at
1
S S
(2) BCD value of a maximum of 8 digits (0 to 99999999) can be designated by S and S +1. 3
(3) The operation results of D and D +1 are stored as their respective BCD values of between
0 and 9999.
(4) Operation results are rounded off from the fifth decimal place.
4
For this reason, the fourth decimal place has an error of ±1.
6
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error 6
code is stored into SD0.
• The data designated by S is not a BCD value. (Error code: 4100)
7
Program Example
(1) The following program calculates the square root of BCD value 1325 and outputs the integer 8
part to the 4 BCD digits from Y50 to Y5F, and the decimal fraction part to the 4 BCD digits
from Y40 to Y4F.
[Ladder Mode]
[List Mode]
Step Instruction Device
[Operation]
D0 BSQR operation D1 Transfer Y5F Y50
1325H 1 3 2 5 0 0 3 6 0 0 3 6 Integer part
MOV BCD value BSQR BCD value BCD value
7-307
BSQR(P),BDSQR(P)
(2) The following program calculates the square root of BCD value 74625813 and outputs the
integer part of the result to the 4 BCD digits at Y50 to Y5F, and the decimal fraction part to
the 4 BCD digits from Y40 to Y4F.
[Ladder Mode]
[List Mode]
Step Instruction Device
[Operation]
1 D1 D0 2 BDSQR operation D2 3 Transfer Y5F Y50
74625813 7 4 6 2 5 8 1 3 8 6 3 8 8 6 3 8 Integer part
BCD value DMOV BCD value BDSQR BCD value MOV BCD value
7-308
BSIN(P)
3
Command
BSIN BSIN S D
Command 4
BSINP S D
BSINP
6
S : Data of which the SIN (sine) value is obtained or the number of the device where the data is stored
(BCD 4 digits)
: Head number of the devices where the operation result will be stored (BCD 4 digits)
6
D
S ––
7
D –– –– ––
8
Function
(1) Calculates the SIN (sine) value of value (angle) designated by S , and stores the sign of the
operation result in the device designated at D , and the operation result in the devices
(2) The value designated at S is a BCD value which can be between 0 and 360 degrees
(in units of degrees).
(3) The sign for the operation result stored in D will be "0" if the result is a positive value, and
"1" if the result is a negative value.
(4) The operation results stored in D +1 and D +2 are BCD values between 1.000 and 1.000.
(5) Operation results are rounded off from the fifth decimal place.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The data designated by S is not a BCD value. (Error code: 4100)
• The data designated by S is not in the range of from 0 to 360. (Error code: 4100)
7-309
BSIN(P)
Program Example
(1) The program example below calculates the SIN of 3-digit BCD data designated by X20 to
X2B, and outputs a 1-digit BCD part to the integer part from Y50 to Y53, and a 4-digit BCD
fraction part from Y40 to Y4F.
Y60 is turned ON if the results of the operation are negative. (If a value has been set at X20
to X2F that is greater than 360, it will be adjusted to be in the range from 0 to 360.)
[Ladder Mode]
[List Mode]
7-310
BCOS(P)
3
Command
BCOS BCOS S D
Command 4
BCOSP S D
BCOSP
6
S : Data of which the COS (cosine) value is obtained or head number of the devices where the data is stored
(BCD 4 digits)
: Head number of the devices where the operation result will be stored (BCD 4 digits)
6
D
S ––
7
D –– –– ––
8
Function
(1) Calculates COS (cosine) value of value (angle) designated by S , then stores the sign for
the operation result in the word device designated by D , and the operation result in the
(2) The value designated at S is a BCD value which can be between 0 and 360 degrees
(in units of degrees).
(3) The sign for the operation result stored in D will be "0" if the result is a positive value, and
"1" if the result is a negative value.
(4) The operation results stored in D +1 and D +2 are BCD values between 1.000 and 1.000.
(5) Operation results are rounded off from the fifth decimal place.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The data designated by S is not a BCD value. (Error code: 4100)
• The data designated by S is not in the range of from 0 to 360. (Error code: 4100)
7-311
BCOS(P)
Program Example
(1) The following program calculates the cosine of the data designated by the 3 BCD digits from
X20 to X2B and outputs the integer part of the result to 1 BCD digit from Y50 to Y53, and the
decimal fraction part of the result to the 4 BCD digits from Y40 to Y4F.
Y60 is turned ON if the results of the operation are negative.
[Ladder Mode]
[List Mode]
Step Instruction Device
7-312
BTAN(P)
3
Command
BTAN BTAN S D
Command 4
BTANP S D
BTANP
S : Data of which the TAN (tangent) value is obtained or head number of the devices where the data is stored
6
(BCD 4 digits)
D : Head number of the devices where the operation result will be stored (BCD 4 digits)
––
7
S
D –– –– ––
8
Function
(1) Calculates TAN (tangent) value for value (angle) designated by S , and stores the sign for
the operation result in the word device designated by D , and the operation result in the
(2) The value designated at S is a BCD value which can be between 0 and 360 degrees
(in units of degrees).
(3) The sign for the operation result stored in D will be "0" if the result is a positive value, and
"1" if the result is a negative value.
(4) The operation results stored at D +1 and D +2 are BCD values within the range of from
57.2901 and 57.2902.
(5) Operation results are rounded off from the fifth decimal place.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The data designated by S is not a BCD value. (Error code: 4100)
• The data designated by S is not in the range of from 0 to 360. (Error code: 4100)
7-313
BTAN(P)
Program Example
(1) The following program calculates the tangent of the data stored in the 3 BCD digits from X20
to X2B, and stores the integer part of the results in the 4 BCD digits from Y50 to Y53, and
the decimal fraction part in the 4 BCD digits from Y40 to Y4F.
Y60 is turned ON if the results of the operation are negative.
[Ladder Mode]
[List Mode]
7-314
BASIN(P)
3
Command
BASIN BASIN S D
Command 4
BASINP S D
BASINP
6
S : Number of the device where data of which the SIN-1 (inverse sine) value is obtained is stored
(BCD 4 digits)
D : Head number of the devices where the operation result will be stored (BCD 4 digits) 6
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H
S –– –– –– –– 7
D –– ––
8
Function
(1) Returns the SIN-1 (inverse sine) value of the value designated by S and stores operation
results (angles) at device designated by D .
(3) The part before the decimal point and fraction part are stored at S +1 and S +2 respectively,
as BCD values.
(Settings can be between 0 and 1.0000.)
(4) Operation results stored at D are BCD values between 0 and 90 degrees, and 270 and 360
degrees (degree units).
(5) Calculation results are a value from which the decimal fraction part has been rounded.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The data designated by S is not a BCD value. (Error code: 4100)
7-315
BASIN(P)
Program Example
(1) The following program performs a SIN-1 operation on the sign (positive when X0 is OFF, and
negative when X0 is ON), the BCD 1-digit integer part from X30 to X33 and the BCD 4-digit
decimal fraction part from X20 to X2F, and outputs the calculated angle in 4 BCD digits from
Y40 to Y4F.
[Ladder Mode]
[List Mode]
Step Instruction Device
7-316
BACOS(P)
3
Command
BACOS BACOS S D
Command 4
BACOSP S D
BACOSP
6
S : Number of the device where data of which the COS-1 (inverse cosine) value is obtained is stored
(BCD 4 digits)
: Head number of the devices where the operation result will be stored (BCD 4 digits)
6
D
S –– –– ––
7
D ––
8
Function
(1) Returns the COS-1 (inverse cosine) value of the value designated by S , and stores
operation results at device designated by D .
(3) The part before the decimal point and fraction part are stored at S +1 and S +2 respectively,
as BCD values.
(Settings can be between 0 and 1.0000.)
(4) The operation results stored at D will be a BCD value in the range of between 0 and 180°
(degree units).
(5) Calculation results are a value from which the decimal fraction part has been rounded.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The operation data designated by S is not a BCD value. (Error code: 4100)
• The operation data designated by S is not in the range of from 1.0000 to 1.0000.
(Error code: 4100)
7-317
BACOS(P)
Program Example
(1) The following program performs a COS-1 operation on the sign (positive when X0 is OFF,
and negative when X0 is ON), the BCD 1-digit integer part from X30 to X33 and the BCD
4-digit decimal fraction part from X20 to X2F, and outputs the calculated angle in 4 BCD
digits from Y40 to Y4F.
[Ladder Mode]
[List Mode]
7-318
BATAN(P)
3
Command
BATAN BATAN S D
Command 4
BATANP S D
BATANP
S : Number of the device where data of which the TAN-1 (inverse tangent) value is obtained is stored
6
(BCD 4 digits)
D : Head number of the devices where the operation result will be stored (BCD 4 digits)
–– –– ––
7
S
D ––
8
Function
(1) Performs TAN-1 (inverse tangent) on value designated by S and stores operation results
(angles) at device designated by D .
(3) The part before the decimal point and fraction part are stored at S +1 and S +2 respectively,
as BCD values.
(Values from 0 to 9999.9999 can be set.)
(4) Operation results stored at D are BCD values between 0 and 90 degrees, and 270 and 360
degrees (degree units).
(5) Calculation results are a value from which the decimal fraction part has been rounded.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The operation data designated by S is not a BCD value. (Error code: 4100)
7-319
BATAN(P)
Program Example
(1) The following program performs a TAN-1 operation on the sign (positive when X0 is OFF,
and negative when X0 is ON), the BCD 4-digit integer part from X20 to X2F and the BCD
4-digit decimal fraction part from X30 to X3F, and outputs the calculated angle in 4 BCD
digits from Y40 to Y4F.
[Ladder Mode]
[List Mode]
Step Instruction Device
7-320
LIMIT(P),DLIMIT(P)
Basic High
performance Process Redundant Universal
3
4
indicates an instruction symbol of LIMIT/DLIMIT.
Command 6
LIMIT, DLIMIT S1 S2 S3 D
Command
LIMITP, DLIMITP P S1 S2 S3 D 6
S1 : Lower limit value (minimum output threshold value) (BIN 16/32 bits) 7
S2 : Upper limit value (maximum output threshold value) (BIN 16/32 bits)
S3 : Input value to be controlled by the upper and lower limit control (BIN 16/32 bits)
D : Head number of the devices where the output value controlled by the upper and lower limit control will be 8
stored (BIN 16/32 bits)
S1 ––
7.13.1 Upper and lower limit controls for BIN 16-bit and BIN 32-bit data (LIMIT(P),DLIMIT(P))
7.13 Data Control Instructions
S2 ––
S3 ––
D –– ––
Function
LIMIT
(1) Controls the output value to be stored at the device designated by D by checking whether
the input value (BIN 16 bits) designated by S3 is within the range of upper and lower limit
values specified by S1 and S2 or not.
Output value is controlled in the way shown below:
• When S1 Lower limit value S3 Input value .................... S1 Lower limit value D Output value
• When S2 Upper limit value S3 Input value .................... S2 Upper limit value D Output value
• When S1 Lower limit value S3 Input value S2 Upper ......... S3 Input value D Output value
Output value ( D )
Value designated by S2
Value designated Input value( S3 )
by S1
(2) Values in the range from 32768 and 32767 can be designated at S1 , S2 , and S3 .
7-321
LIMIT(P),DLIMIT(P)
(3) When control based only on upper limit values is performed, the lower limit value designated
at S1 is set at " 32678".
(4) When control based only on lower limit values is performed, the upper limit value designated
at S2 is set at "32767".
DLIMIT
(1) The function controls the output value to be stored at the device designated by ( D , D +1) by
checking whether the input value (BIN 32 bits) designated by ( S3 , S3 +1) is within the range
of upper and lower limit values specified by ( S1 , S1 +1) and ( S2 , S2 +1) or not.
S1 +1 S1 S3 +1 S3 S1 +1 S1 D +1 D
When Lower limit value Input value Lower limit value Output value
S2 +1 S2 S3 +1 S3 S2 +1 S2 D +1 D
When Upper limit value Input value Upper limit value Output value
S1 +1 S1 S3 +1 S3 S2 +1 S2 S3 +1 S3 D +1 D
When Lower limit value Input value Upper limit value Input value Output value
(2) The values designated by ( S1 , S1 +1), ( S2 , S2 +1), or ( S3 , S3 +1) are within the range of
2147483648 to 2147483647.
(3) To perform controls based only on the upper limit value, set the lower limit value designated
by ( S1 , S1 +1) to " 2147483648".
(4) To perform controls based only on the lower limit value, set the upper limit value designated
by ( S2 , S2 +1) to "2147483647".
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The lower limit value designated by S1 is larger than the upper limit value designated by
S2 . (Error code: 4100)
7-322
LIMIT(P),DLIMIT(P)
Program Example
1
(1) The following program conducts limit controls from 500 to 5000 on the data set as BCD
values from X20 to X2F, and stores the result at D1 when X0 is turned ON.
[Ladder Mode] [List Mode] 2
Step Instruction Device
[Operation] 6
• D1 becomes 500 if D0 500.
Example D0 400 D1 500
6
• D1 becomes the value of D0 when 500 D0 5000.
Example D0 1300 D1 1300
• D1 becomes 5000 when 5000 D0.
7
Example D0 9600 D1 5000
(2) The following program conducts limit value controls from 10000 to 1000000 on the data set 8
as BCD values from X20 to X3F when X0 is turned ON.
[Ladder Mode] [List Mode]
7.13.1 Upper and lower limit controls for BIN 16-bit and BIN 32-bit data (LIMIT(P),DLIMIT(P))
7.13 Data Control Instructions
[Operation]
• (D11, D10) become 10000 if (D1, D0) are less than 10000.
Example (D1,D0) 400 (D11,D10) 10000
• (D11, D10) become the value of (D1, D0) if 10000 (D1, D0) 1000000.
Example (D1,D0) 345678 (D11,D10) 345678
• (D11, D10) become 1000000 if 1000000 (D1, D0).
Example (D1,D0) 9876543 (D11,D10) 1000000
7-323
BAND(P),DBAND(P)
Basic High
performance Process Redundant Universal
Command
BAND,DBAND S1 S2 S3 D
Command
P S1 S2 S3 D
BANDP,DBANDP
S1 : Lower limit value of dead band (no output band) (BIN 16/32 bits)
S2 : Upper limit value of dead band (no output band) (BIN 16/32 bits)
S3 : Input value to be controlled by a dead band control (BIN 16/32 bits)
D : Head number of the devices where the output value controlled by the dead band control will be stored
(BIN 16/32 bits)
S1 ––
S2 ––
S3 ––
D –– ––
Function
BAND
(1) Controls the output value to be stored at the device designated by D by checking whether
the input value (BIN 16 bits) designated by S3 is within the range of dead band upper and
lower limit values specified by S1 and S2 or not.
Output value is controlled in the way shown below:
• When S1 Lower limit value S3 Input value .......... S3 Input value - S1 Lower D Output value
• When S2 Upper limit value S3 Input value ......... S3 Input value - S2 Upper D Output value
• When S1 Lower limit value S3 Input value S2 Upper ..... 0 D Output value
Output value ( D )
Dead band
lower limit value ( S1 )
Input value ( S2 )
0
Dead band upper
limit value ( S3 )
(2) The values that can be designated by S1 , S2 , and S3 are in the range of from 32768 to
32767.
7-324
BAND(P),DBAND(P)
(3) The output value stored at D is a signed 16-bit BIN value. Therefore, if the operation results
exceed the range of from 32768 to 32767, the following will take place:
1
Dead band lower limit value S1 .................10
When :
Input value ............................................ 32768
S3
2
Output value 32768 10 8000H AH 7FF6H 32758
DBAND 3
(1) Controls the output value to be stored at the device designated by D by checking whether
the input value (BIN 32 bits) designated by ( S3 , +1) is within the range of dead band upper
and lower limit values specified by ( S1 , S1
S3
0
Input value ( S3 , S3 +1)
8
Dead band upper
limit value ( S2 , S2 +1)
(2) The values designated by ( S1 , S1 +1), ( S2 , S2 +1), or ( S3 , S3 +1) are within the range of from
2147483648 to 2147483647.
7FFFFC18H 2147482648
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The lower limit value designated by S1 is greater than the upper limit value designated by
S2 . (Error code: 4100)
7-325
BAND(P),DBAND(P)
Program Example
(1) The following program performs the dead band control by applying the lower and upper
limits of 0 and 1000 for the data set in BCD at X20 to X2F and stores the result of control at
D1 when X0 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
[Operation]
• The value (D1, D0) ( 10000) is stored at (D11, D10) if (D1, D0) ( 10000).
Example (D1, D0) 12345 (D11, D10) 2345
• The value 0 is stored at (D11, D10) if 10000 (D1, D0) 10000.
Example (D1, D0) 6789 (D11, D10) 0
• The value (D1, D0) 10000 is stored at (D11, D10) if 10000 (D1, D0).
Example (D1, D0) 50000 (D11, D10) 40000
7-326
ZONE(P),DZONE(P)
7.13.3 Zone control for BIN 16-bit and BIN 32-bit data
(ZONE(P),DZONE(P)) 1
ZONE(P),DZONE(P)
Basic High
performance Process Redundant Universal
2
3
indicates an instruction symbol of ZONE/DZONE.
Command 4
ZONE,DZONE S1 S2 S3 D
Command
ZONEP,DZONEP P S1 S2 S3 D 6
S2 ––
S3 ––
7.13.3 Zone control for BIN 16-bit and BIN 32-bit data (ZONE(P),DZONE(P))
7.13 Data Control Instructions
D –– ––
Function
ZONE
(1) Adds bias value designated by S1 or S2 to input value designated by S3 , and stores at
device number designated by D .
Bias values are calculated in the following manner:
• When S3 Input value 0....... S3 Input value + S1 Negative bias value D Output value
• When S3 Input value 0....... S3 Input value + S2 Positive bias value D Output value
Output value ( D )
Input value ( S3 )
0
Negative bias value ( S1 )
7-327
ZONE(P),DZONE(P)
(2) The values that can be designated by S1 , S2 , and S3 are in the range of from 32768 to
32767.
(3) The output value stored at D is a signed 16-bit BIN value. Therefore, if the operation results
exceed the range of 32768 to 32767, the following will take place:
DZONE
(1) Adds bias value designated by ( S1 , S1 +1) or ( S2 , S2 +1) to input value designated by ( S3 ,
S3 +1), and stores the result at device number designated by ( D , D +1).
Addition of the bias value is performed as follows:
S3 +1 S3 S3 +1 S3 S1 +1 S1 D +1 D
When Input value 0 Input value + Negative bias value Output value
S3 +1 S3 D +1 D
When Input value 0 0 Output value
S3 +1 S3 S3 +1 S3 S2 +1 S2 D +1 D
When Input value 0 Input value + Positive bias value Output value
(2) The values designated by ( S1 , S1 +1), ( S2 , S2 +1), or ( S3 , S3 +1) are within the range of from
2147483648 to 2147483647.
Operation Error
(1) There are no operation errors associated with the ZONE(P) or DZONE(P) instructions.
7-328
ZONE(P),DZONE(P)
Program Example
1
(1) The following program performs zone control by applying negative and positive bias values
of 100 to 100 for the data set at D0 and stores the result of control at D1 when X0 is turned
ON. 2
[Ladder Mode] [List Mode]
Step Instruction Device
3
4
[Operation]
7.13.3 Zone control for BIN 16-bit and BIN 32-bit data (ZONE(P),DZONE(P))
7.13 Data Control Instructions
[Operation]
• The value (D1, D0) + ( 10000) is stored at (D11, D10) if (D1, D0) 0.
Example (D1,D0) 12345 (D11,D10) 22345
• The value 0 is stored at (D11, D10) if (D1, D0) 0.
• The value (D1, D0) + 10000 is stored at (D11, D10) if 0 (D1, D0).
Example (D1,D0) 50000 (D11,D10) 60000
7-329
(SCL(P),DSCL(P))
Ver.
High
Basic performance Process Redundant Universal
S1 : Input values for scaling or head number of the device where input values are stored(BIN 16/32 bits)
S2 : Head number of the devices where scaling conversion data are stored(BIN 16/32 bits)
D : Head number of the devices where output values depending on scaling are stored(BIN 16/32 bits).
S1 –– ––
S2 –– –– –– ––
D –– –– ––
Function
SCL(P)
(1) This instruction executes scaling for the scaling conversion data (16-bit data units) specified
by S2 with the input value specified by S1 , and then stores the operation result into the
devices specified by D .
The scaling conversion is executed based on the scaling conversion data stored in the
device specified by S2 and up.
Scaling conversion data component Y
Setting item Device assignment
Number of coordinate points S2
X coordinate S2 +1 Point 2
Point 1 Output Point 3
Y coordinate S2 +2 value: D
X coordinate S2 +3
Point 2 Point n
Y coordinate S2 +4
Point 1
Point n−1
X coordinate S2 +2n−1
X
Point n Input value: S1
Y coordinate S2 +2n
Operation error Operable range Operation error
※n indicates the number of coordinates
specified by (S2).
(2) If the value does not result in an integer, this instruction rounds the value to the whole
number.
(3) Set the X coordinate of the scaling conversion data in ascending order.
(4) Set the input value S1 within the range of the scaling conversion data (within the range of S2
devices).
7-330
(SCL(P),DSCL(P))
(5) If some specified points have same X coordinates, the Y coordinate data of the highest point
number will be output.
(6) Specify the number of coordinate points of scaling conversion data from 1 to 32767. 1
DSCL(P)
(1) This instruction executes scaling for the scaling conversion data (32-bit data units) specified
2
by S2 with the input value specified S1 , and then stores the operation result into the devices
specified by D .
The scaling conversion is executed based on the scaling conversion data stored in the
3
device specified by S2 and up.
Scaling conversion data component
Setting item Device assignment
Number of coordinate points S2 +1 ,S2
Y
4
X coordinate S2 +3 ,S2 +2 Operation Operable range Operation error
Point 1 error
Y coordinate S2 +5 ,S2 +4 Input value: S1
X
6
X coordinate S2 +7 ,S2 +6
Point 2 Point n−1
Y coordinate S2 +9 ,S2 +8
Output D Point n
value:
Point n
X coordinate
Y coordinate
S2
S2
+4n−1 , S2
+4n+1 , S2
+4n−2
+4n
Point 1 6
Point 2
※n indicates the number of coordinates
specified by (S2).
(2) If the value does not result in an integer, this instruction rounds the value to the whole 7
number.
(3) Set the X coordinate of the scaling conversion data in ascending order.
(4) Set the input value S1 within the range of the scaling conversion data (within the range of S2
8
and S2 +1 devices).
(5) If some specified points have same X coordinates, the Y coordinate data of the highest point
number will be output.
7-331
(SCL(P),DSCL(P))
(1) There are two searching methods that depend on whether SM750 is on or off.
SM750 Searching method Range of number of searches
(2) When the scaling conversion data are set in ascending order, the searching
methods change from one to the other depending on the SM750 status.
Therefore, the processing speed also changes. The number of searches
determines the processing speed. Fewer number of serches make the
processing run faster.
(a) If the data processing speed with the sequential search rises:
If the number of coordinates is highest and the input value S1 is within
the coordinate range from 1 to 15 point, the number of sequential
searches will be 15 or smaller. Therefore, the data processing speed with
the sequential search will rise.
(b) If the data processing speed with the binary search rises:
f the maximum number of searches is 15 and the input value S1 is out of
the coordinate range, 16 or over, the number of binary searches will be
equal to the number of sequential numbers or smaller. Therefore, the
data processing speed with the binary search will rise.
Number of coordinate points=32767 Number of sequential searches=32767
Number of binary searches=15
The processing speed with binary search
rises since the number of binary searches is
smaller than the number of sequential searches.
S1 S1
Number of sequential searches=1
Number of binary searches=15
7-332
(SCL(P),DSCL(P))
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
• The X coordinates of the scaling conversion data positioned before the point specified by 2
S1 are not set in ascending order. (However, this error is not detected when SM750 is on.)
(Error code: 4100)
• The input value specified by S1 is out of the range of the scaling conversion data set. 3
(Error code: 4100)
[Operation]
X coordinate D101 K5
Point 1
Y coordinate D102 K13
Point 2
X coordinate D103 K10
Point 2 Point 1 (10,15) Point 3
Y coordinate D104 K15 (5,13) (17,13)
7-333
SCL2,DSCL2
Ver.
High
Basic performance Process Redundant Universal
S1 : Input values for scaling or head number of the device where input values are stored(BIN 16/32 bits)
S2 : Head number of the devices where scaling conversion data are stored(BIN 16/32 bits)
D : Head number of the devices where output values depending on scaling are stored(BIN 16/32 bits).
S1 –– ––
S2 –– –– –– ––
D –– –– ––
Function
SCL2
(1) This instruction executes scaling for the scaling conversion data (16-bit data units) specified
by S2 with the input value specified by S1 , and then stores the operation result into the
devices specified by D .
The scaling conversion is executed based on the scaling conversion data stored in the
device specified by S2 and up.
Scaling conversion data component Y
Setting item Device assignment
Number of coordinate points S2
Point 1 S2 +1
Point 2
S2 Output Point 3
Point 2 +2
D Point n−1
X coordinate value:
Point n
Point n S2 +n
Point 1
Point 1 S2 +n+1
Point 2 S2 +n+2
Y coordinate X
Input value: S1
Point n S2 +2n Operation error Operable range Operation error
※n indicates the number of coordinates
specified by (S2).
(2) If the value does not result in an integer, this instruction rounds the value to the whole
number.
(3) Set the X coordinate of the scaling conversion data in ascending order.
7-334
SCL2,DSCL2
(4) Set the input value S1 within the range of the scaling conversion data (within the range of S2
devices).
(5) If some specified points have same X coordinates, the Y coordinate data of the highest point 1
number will be output.
DSCL2(P)
(1) This instruction executes scaling for the scaling conversion data (32-bit data units) specified
2
by S2 with the input value specified S1 , and then stores the operation result into the devices
specified by D .
The scaling conversion is executed based on the scaling conversion data stored in the
3
device specified by S2 and up.
Scaling conversion data component
Setting item Device assignment
Y
4
Number of coordinate points S2 +1 , S2
Point 1 S2 +3 , S2 +2
Operation Operable range Operation error
error
X coordinate
Point 2 S2 +5 , S2 +4 Input value: S1
X 6
Point n−1
Point n S2 +2n+1 , S2 +2n
Y coordinate
Point 2 S2 +2n+5 , S2 +2n+4
Output D
value:
Point n 6
Point 1
Point n S2 +4n+1 , S2 +4n Point 2
7
※n indicates the number of coordinates
specified by (S2).
(2) If the value does not result in an integer, this instruction rounds the value to the whole
number.
(3) Set the X coordinate of the scaling conversion data in ascending order. 8
(4) Set the input value S1 within the range of the scaling conversion data (within the range of S2
and S2 +1 devices).
(5) If some specified points have same X coordinates, the Y coordinate data of the highest point
When the coordinates of the scaling conversion data are set in ascending order,
the searching methods change from one to the other depending on the SM750
status. Therefore, the processing speed also change. The number of searches
determines the processing speed. Fewer number of searches make the
processing run faster.
For details, refer to Section 7.13.4.
7-335
SCL2,DSCL2
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
• The X coordinates are not set in ascending order. (Error code: 4100)
• The input value specified by S1 is out of the range of the scaling conversion data set.
(Error code: 4100)
• The number of X and Y coordinates of the device specified by S2 is out of the range from
1 to 32767. (Error code: 4100)
• The number of X and Y coordinates of the device specified by S2 is out of the specified
range. (Error code: 4101)
Program Example
(1) The following program executes scaling for the scaling conversion data of which the devices
specified at D100 and up are set with the input value specified at D0, and then outputs the
data at D20.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
7-336
RSET(P)
4
Command
RSET RSET S
Command 6
RSETP S
RSETP
6
S : Block number data used to change the block number or the number of the device where the block number
data is stored (BIN 16 bits)
Setting
Data
Internal Devices
Bit Word
R, ZR
Bit
J \
Word
U \G Zn
Constants
K, H
Other 7
S ––
8
Function
(1) Changes the file register block number used in the program to the block number stored in
the device designated at S .
S Setting of a
block number
R32767
(
Presently
used file
register
) (
used after the
execution of
RSET
R32767 instruction
) R32767
When a file register (R) is refreshed and the block No. of the file register is
switched with the RSET instruction, follow restrictions.
For the restrictions on file registers, refer to Section 3.10.
7-337
RSET(P)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The block number designated by S does not exist. (Error code: 4100)
• There is no file register for the specified block No. (Error code: 4101)
Program Example
(1) The following program compares R0 of block No. 0 and block No. 1.
[Ladder Mode]
[List Mode]
[Operation]
Block No. 0 Block No. 1
R0 -3216 756 R0
R1 5001 9330 R1
R2 128 D0 D1 -1762 R2
R3 -7981 -3216 756 3911 R3
R4 9610 -5 R4
R5 0 -3781 R5
Y41 turns ON since D0<D1
7-338
QDRSET(P)
3
Command
QDRSET QDRSET S
Command 4
QDRSETP S
QDRSETP
6
S : Character string data of the drive No./file name in which the file register is set, or head number of the devices
where the character string data is stored (character string)
S –– –– ––
7
Function
8
(1) Changes the file register file name used in the program to the file name being stored at the
device designated by S .
After the file names have been changed, all the file registers being used by the sequence
program process the file register of the block No. 0 of the renamed file.
Example
When switching from Drive No. 1/File name B to Drive No. 3/File name A
7-339
QDRSET(P)
1. If the file name is changed with the QDRSET instruction, the file name returns
to the name specified by the parameter when the CPU module is switched from
STOP to RUN. To maintain the file name even after the CPU mode is changed
from STOP to RUN, execute the QDRSET instruction with the SM402 special
relay, which turns ON during one scan when the CPU enters from STOP to
RUN mode.
2. For refreshing a file register, do not change the file name of the file register with
the QDRSET instruction. For restrictions on file registers, refer to Section 3.10.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• File name does not exist at the drive number designated by S . (Error code: 2410)
7-340
QDRSET(P)
Program Example
1
(1) The following program compares R0 of ABC in block No. 1 and R0 of DEF in block No. 1.
[Ladder Mode]
2
6
[List Mode]
Step Instruction Device
7
7-341
QCDSET(P)
High
Basic performance Process Redundant Universal
Command
QCDSET QCDSET S
Command
QCDSETP S
QCDSETP
S : Character string data of the drive No./file name in which the comment file is set, or head number of the
devices where the character string data is stored (character string)
S –– –– ––
Function
(1) Changes the file register file name used in the program to the file name being stored at the
device designated by S .
After the file name change, comment data being used by the sequence program perform
processing in relation to the comment data of the file name after the change.
Example
When switching from Drive No. 1/File name B to Drive No. 3/File name A
7-342
QCDSET(P)
(4) A file name setting can be deleted by designating the NULL character (00H) for the file
name.
1
(5) File names designated with this instruction will be given priority even if a drive number and
file name have been designated in the parameters.
(6) This instruction cannot be executed while SM721 is ON for the Universal model QCPU. No 2
operation if executed.
3
If the file name is changed with the QCDSET instruction, the file name returns to
the name specified by the parameter when the CPU module is switched from
STOP to RUN.
4
To maintain the file name even after the CPU mode is changed from STOP to
RUN, execute the QCDSET instruction with the SM402 special relay, which turns
ON during one scan when the CPU enters from STOP to RUN mode.
6
Operation Error 6
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0. 7
• File name does not exist at the drive number designated by S . (Error code: 2410)
Program Example 8
(1) The following program switches object file to file name ABC. QCD at drive No. 0 when X0 is
ON, and to DEF. QCD at drive No. 1 when X1 is ON.
[Ladder Mode]
[List Mode]
Step Instruction Device
Caution
(1) This instruction will not be executed even when the execution command of this instruction is
ON while SM721 (file access in execution) is ON for the Universal model QCPU only.
Execute this instruction when SM721 is OFF.
7-343
DATERD(P)
Basic High
performance Process Redundant Universal
Command
DATERD DATERD D
Command
DATERDP D
DATERDP
D : Head number of the devices where the read clock data will be stored (BIN 16 bits)
D –– ––
Function
(1) Reads "year, month, day, hour, minute, second, and day of week" from the clock element of
the CPU module and stores it as BIN value to the device designated by D or later device.
D Year (1980 to 2079)
D +1 Month (1 to 12)
D +2 Day (1 to 31)
Clock element D +3 Hour (24-hour clock) (0 to 23)
D +4 Minute (0 to 59)
D +5 Second (0 to 59)
D +6 Day of week (0 to 6)
(3) The "day of week" at D +6 is stored as 0 to 6 to represent the days Sunday to Saturday.
Day of week Sun Mon Tue Wed Thu Fri Sat
Stored data 0 1 2 3 4 5 6
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
7-344
DATERD(P)
Program Example
1
(1) The following program outputs the following clock data as BCD values:
Year .......... Y70 to Y7F
Month ....... Y68 to Y6F 2
Day ........... Y60 to Y67
Hour.......... Y58 to Y5F
Minute....... Y50 to Y57 3
Second ..... Y48 to Y4F
Week ........ Y44 to Y47
[Ladder Mode]
4
6
Outputs "Year"
Outputs "Month"
6
Outputs "Day"
Outputs "Hour"
7
Outputs "Minute"
[List Mode]
[Operation]
BCD Y7F Y70
2 0 0 5 (Year)
D0 2005
Y6F Y68 Y67 Y60
D1 12
1 2 2 4 (Month, Day)
Clock data D2 24
2005, 12, 24, 12:57:39, Sunday D3 12
Y5F Y58 Y57 Y50
D4 57
1 2 5 7 (Hour, Minute)
D5 39
D6 0
Y4F Y48 Y47 Y44
BIN 3 9 0 (Second, Day of week)
7-345
DATEWR(P)
Basic High
performance Process Redundant Universal
Command
DATEWR DATEWR S
Command
DATEWRP S
DATEWRP
S : Head number of the devices where clock data to be written into the clock device is stored (BIN 16 bits)
S –– ––
Function
(1) Writes clock data stored in the device number designated by S or later device number to
the clock element of the CPU module.
S Year
S +1 Month
S +2 Day
S +3 Hour Clock element
S +4 Minute
S +5 Second
S +6 Day of week
(3) The "year" at S is designated by using four-digit year indication between 1980 to 2079.
(6) S +3 designates the "hour" in values of from 0 to 23 (using 24-hour clock, from 0 hours to 23
hundred hours). (Uses the 24-hour clock.)
7-346
DATEWR(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• Individual items of data have been set outside the setting range. 2
(Error code: 4100)
Program Example 4
(1) The following program writes the following clock data to the clock element as BCD values
when X40 is turned ON.
Year ............... X30 to X3F Hour................. X18 to X1F
6
Month ............ X28 to X2F Minute.............. X10 to X17
Day ................ X20 to X27 Second ............ X8 to XF
Week ............. X4 to X7 6
[Ladder Mode]
Sets "Year" 7
Sets "Month"
Sets "Day" 8
Sets "Hour"
Sets "Minute"
[List Mode]
Step Instruction Device
[Operation]
X3F X38 X37 X30 BIN
(Year) 2 0 0 0
D0 2000
X2F X28 X27 X20
D1 12
(Month, Day) 1 2 2 4
D2 24 Clock data
D3 12 2000, 12, 24 12:57:39 Sunday
X1F X18 X17 X10
D4 57
(Hour, Minute) 1 2 5 7
D5 39
D6 0
XF X8 X7 X4
(Second, Day of week) 3 9 0 BIN
7-347
DATE+(P)
Basic High
performance Process Redundant Universal
Command
DATE+ DATE+ S1 S2 D
Command
DATE+P S1 S2 D
DATE+P
S1 : Head number of the devices where the clock data to be adjusted by addition is stored (BIN 16 bits)
S2 : Head number of the devices where the time data to be added for adjustment is stored (BIN 16 bits)
D : Head number of the devices where the result of addition of clock (time) data will be stored (BIN 16 bits)
S2 –– ––
D –– ––
Function
(1) Adds the time data designated by S2 to the clock data designated by S1 , and stores the
result into the area starting from the device designated by D .
Data range Data range Data range
S1 Hour (0 to 23) S2 Hour (0 to 23) D Hour (0 to 23)
S1 +1 Minute (0 to 59) + S2 +1 Minute (0 to 59) D +1 Minute (0 to 59)
S1 +2 Second (0 to 59) S2 +2 Second (0 to 59) D +2 Second (0 to 59)
For example, adding the time 7:48:10 to 6:32:40 would result in the following operation:
S1 Hour: 6 S2 Hour: 7 D Hour: 14
S1 +1 Minute: 32 + S2 +1 Minute: 48 D +1 Minute: 20
S1 +2 Second: 40 S2 +2 Second: 10 D +2 Second: 50
(2) If the results of the addition of time exceed 24 hours, 24 hours will be subtracted from the
sum to make the final operation result.
For example, if the time 20:20:20 were added to 14:20:30, the result would not be 34:40:50,
but would instead be 10:40:50.
S1 Hour: 14 S2 Hour: 20 D Hour: 10
S1 +1 Minute: 20 + S2 +1 Minute: 20 D +1 Minute: 40
S1 +2 Second: 30 S2 +2 Second: 20 D +2 Second: 50
Remark
See 7.15.2 for further information regarding the data that can be set for hours,
minutes, and seconds.
7-348
DATE+(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The data set by S1 and S2 is outside the setting range. (Error code: 4100)
2
• The device specified by S1 or S2 or D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101) 3
Program Example
4
(1) The following program adds 1 hour to the clock data read from the clock element, and stores
the results in the area starting from D100 when X20 is ON. 6
[Ladder Mode]
[List Mode]
[Operation]
• Time data read operation triggered by DATERDP instruction.
Clock element D0 95 Year
D1 5 Month
D2 15 Day
D3 10 Hour
D4 23 Minute Time data
D5 41 Second
D6 2 Day of week
7-349
DATE-(P)
Basic High
performance Process Redundant Universal
Command
DATE- DATE- S1 S2 D
Command
DATE-P DATE-P S1 S2 D
S1 : Head number of the devices where the clock time data to be adjusted by substraction is stored (BIN 16 bits)
S2 : Head number of the devices where time data to be subtracted for adjustment is stored (BIN 16 bits)
D : Head number of the devices where the result of subtraction of clock (time) data will be stored (BIN 16 bits)
S2 –– ––
D –– ––
Function
(1) Subtracts the time data designated by S2 from the clock data designated by S1 , and stores
the result into the area starting from the device designated by D .
Data range Data range Data range
S1 Hour (0 to 23) S2 Hour (0 to 23) D Hour (0 to 23)
S1 +1 Minute (0 to 59) S2 +1 Minute (0 to 59) D +1 Minute (0 to 59)
S1 +2 Second (0 to 59) S2 +2 Second (0 to 59) D +2 Second (0 to 59)
For example, if the clock time 3:50:10 were subtracted from the clock time 10:40:20, the
operation would be performed as follows:
S1 Hour: 10 S2 Hour: 3 D Hour: 6
S1 +1 Minute: 40 S2 +1 Minute: 50 D +1 Minute: 50
S1 +2 Second: 20 S2 +2 Second: 10 D +2 Second: 10
(2) If the subtraction results in a negative number, 24 will be added to the result to make a final
operation result.
For example, if the clock time 10:42:12 were subtracted from 4:50:32, the result would not
be 6:8:20, but rather would be 18:8:20.
S1 Hour: 4 S2 Hour: 10 D Hour: 18
S1 +1 Minute: 50 S2 +1 Minute: 42 D +1 Minute: 8
S1 +2 Second: 32 S2 +2 Second: 12 D +2 Second: 20
Remark
See 7.15.2 for further information regarding the data that can be set for hours,
minutes, and seconds.
7-350
DATE-(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The data set by S1 and S2 is outside the setting range. (Error code: 4100)
2
• The device specified by S1 or S2 or D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101) 3
Program Example
4
(1) The following program subtracts the time data stored in devices starting from D10 from the
clock data read from the clock element when X1C is turned ON, and stores the result at
devices starting from R10. 6
[Ladder Mode] [List Mode]
[Operation] 8
• Time data read operation triggered by DATERDP instruction.
Clock device D100 95 Year
D101 4 Month
7-351
SECOND(P)
Basic High
performance Process Redundant Universal
Command
SECOND SECOND S D
Command
SECONDP SECONDP S D
S : Head number of the devices where the clock data before conversion is stored (BIN 16 bits)
D : Head number of the devices where the clock data after conversion will be stored (BIN 32 bits)
S –– –– ––
D ––
Function
(1) Converts the time data stored in the area starting from the device designated by S to
seconds and stores the conversion result into the device designated by D .
Data range
D +1 D
S Hour (0 to 23)
S +1 Minute (0 to 59) Second
S +2 Second (0 to 59)
For example, if the value were 4 hours, 29 minutes, and 31 seconds, the conversion would
be made as follows:
D 1 D
S 4
S +1 29 16171
S +2 31
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The data set by S and is outside the setting range. (Error code: 4100)
7-352
SECOND(P)
Program Example
1
(1) The following program converts the clock time data read from the clock element into second
when X20 is turned ON, and stores the result at D100 and D101.
[Ladder Mode] [List Mode] 2
Step Instruction Device
[Operation] 6
• Time data read operation triggered by DATERDP instruction.
Clock device D10 95 Year
D11 4 Month 6
D12 20 Day
D13 20 Hour
D14 21 Minute Time data
D15 23 Second 7
D16 5 Day of week
7-353
HOUR(P)
Basic High
performance Process Redundant Universal
Command
HOUR HOUR S D
Command
HOURP HOURP S D
S : Head number of the devices where clock data before conversion is stored (BIN 32 bits)
D : Head number of the devices where the clock data after conversion will be stored (BIN 16 bits)
S ––
D –– –– –– ––
Function
(1) Converts the data in seconds stored in the device number designated by S to an hour/
minute/second format, and stores the conversion result into the area starting from the device
designated by D .
Data range Data range
S 1 S
D Hour (0 to 23)
Second (0 to 86399) D +1 Minute (0 to 59)
D +2 Second (0 to 59)
For example, if 45325 seconds were the value designated, the conversion operation would
be conducted as follows:
S +1 S
D 12
45325 D +1 35
D +2 25
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The data set by S and is outside the setting range. (Error code: 4100)
7-354
HOUR(P)
Program Example
1
(1) The following program converts the seconds stored at D0 and D1 into an hour, minute,
second format, and stores the result at devices starting from D100 when X20 is turned ON.
[Ladder Mode] [List Mode] 2
Step Instruction Device
4
[Operation]
• Conversion to hour minute, and second format by the HOURP instruction (when the value
40000 seconds has been designated by D1 and D0).
6
D100 11
D1,D0 40000 D101 6
D102 40
6
7-355
(DT=,DT<>,DT>,DT<=,DT<,DT>=)
Ver.
High
Basic performance Process Redundant Universal
LD
Command
AND
Command
OR
S1 : Head number of the devices where the data to be compared are stored (BIN 16 bits)
S2 : Head number of the devices where the data to be compared are stored (BIN 16 bits)
n : Value of the data to be compared or the number of the stored data to be compared (BIN 16 bits)
S1 –– –– –– ––
S2 –– –– –– ––
n –– ––
Function
(1) This instruction compares the date data specified by S1 with those specified by S2 , or the
date data specified by S1 with current date data. Setting n can determine the data to be
compared.
(a) Comparison of given date data
• This instruction treats the date data specified by S1 and S2 as a normally open
contact, and then compares the data in accordance with the value of n.
Data range Data range
S1 Year (1980∼2079) S2 Year (1980∼2079)
Comparison Comparison
S1 +1 Month (1∼12) S2 +1 Month (1∼12)
operator operation result
S1 +2 Day (1∼31) S2 +2 Day (1∼31)
• This instruction treats the date data specified by S1 and the current date data as a
normally open contact, and then compares the data in accordance with the value of
n.
Data range
S1 Year (1980∼2079)
Comparison Comparison
S1 +1 Month (1∼12) Current date
operator operation result
S1 +2 Day (1∼31)
7-356
(DT=,DT<>,DT>,DT<=,DT<,DT>=)
Day
If this instruction specifies 1 (on) at 15th bit, the Month
• 0: Compares the date data specified by S1 with the date data specified by S2 .
• 1: Compares the date data specified by S1 with the current date data.
7-357
(DT=,DT<>,DT>,DT<=,DT<,DT>=)
(7) If the data stored in the devices to be compared are not recognized as date data, SM709 will
be turned on after the instruction execution and no-conductive status will be made. Even if
they are not recognized as date data but the range of the devices is within the setting range,
SM709 will not be turned on.
Moreover, if the range of devices specified by S1 to S1 +2 or S2 to S2 +2 exceeds the range of
specified devices, SM709 will be turned on after the instruction execution and no-conductive
status will be made.
Once SM709 is turned on, on-status will be retained till when the CPU modules are reset or
powered off. Therefore, turn off SM709 if necessary.
(8) The following table shows the comparison operation results for each instruction.
Instruction Comparison Instruction Comparison
Condition Condition
symbols in operation result symbols in operation result
DT= S1
= S2 DT= S1 S2
DT<> S1 S2 DT<> S2 = S1
7-358
(DT=,DT<>,DT>,DT<=,DT<,DT>=)
The following table shows the conductive states resulting from performing the
2
comparison operation of the dates A, B, and C shown above.
Even if the objects to be compared are under the same condition, the comparison
operation results vary depending on the objects selected.
3
Comparison Comparison condition
objects A<B B<C A<C
4
Day
Month
Month, day
6
Year
Month, day 6
Year, month
Year, month, day
No objects 7
: Conductive : No-conductive
(b) Even if the dates to be compared do not exist practically, this instruction executes the 8
comparison operation for the objects with the settable dates in accordance with the
following condition.
• Date A: 2006/02/30 (This date is settable, though it does not exist.)
Day
Month
Month, day
Year
Month, day
Year, month
Year, month, day
No objects
: Conductive : No-conductive
7-359
(DT=,DT<>,DT>,DT<=,DT<,DT>=)
Operation Error
(1) Any operation errors do not occur in DT=,DT<>,DT>,DT<=,DT<,DT>= instruction.
Program Example
(1) The following program compares the data stored in D0 with the data (year, month, and day)
stored in D10, and makes Y33 be conductive status when the data stored in D0 meet the
data stored in D10.
[Ladder Mode] [List Mode]
Step Instruction Device
(2) The following program compares the data stored in D0 with the current date data (year and
month), and makes Y33 be conductive status when the data stored in D0 do not meet the
current date data, when M0 is turned on.
[Ladder Mode] [List Mode]
Step Instruction Device
(3) The following program compares the data stored in D0 with the data (year and day) stored in
D10, and makes Y33 be conductive status when the data value stored in D10 is smaller than
the data value stored in D0, when M0 is turned on.
[Ladder Mode] [List Mode]
Step Instruction Device
(4) The following program compares the data stored in D0 with the current date data (year), and
makes Y33 be conductive status when the value of the current date data is the data value
stored in D0 or larger.
[Ladder Mode] [List Mode]
Step Instruction Device
7-360
(TM=,TM<>,TM>,TM<=,TM<,TM>=)
3
indicates an instruction symbol of DT=/DT<>/DT</DT<=/DT>/DT>=.
LD S1 S2 n 4
Command
AND S1 S2 n
Command 6
OR
S1 S2 n
6
S1 : Head number of the devices where the data to be compared are stored (BIN 16 bits)
S2: Head number of the devices where the data to be compared are stored (BIN 16 bits) 7
n : Value of the data to be compared or the number of the stored data to be compared (BIN 16 bits)
S2 –– –– –– ––
n –– ––
• This instruction treats the clock data specified by S1 and the clock data specified by
S1 as a normally open contact, and compares the data in accordance with the value
of n.
Data range Data range
S1 Hour (0∼23) S2 Hour (0∼23)
Comparison Comparison
S1 +1 Minute (0∼59) S2 +1 Minute (0∼59)
operator operation result
S1 +2 Second (0∼59) S2 +2 Second (0∼59)
7-361
(TM=,TM<>,TM>,TM<=,TM<,TM>=)
• This instruction treats the clock data specified by S1 and the current time data as a
normally open contact, and compares the data in accordance with the value of n.
• This instruction treats the clock data specified by S1 as dummy data and ignores the
data.
Data range
S1 Hour (0∼23)
Comparison Comparison
S1 +1 Minute (0∼59) Current time
operator operation result
S1 +2 Second (0∼59)
b15 b14 b3 b2 b1 b0
0/1 0 0/1 0/1 0/1
Second
If this instruction specifies 1 (on) at 15th bit, the Minute
instruction compares S1 with the current date in
accordance with the bit condition specified at 0 to 2nd Hour
bit.
• 0: Compares the clock data specified by S1 with the clock data specified by S1 .
• 1: Compares the clock data specified by S1 with the current time data.
Ignores the clock data specified by S1 .
7-362
(TM=,TM<>,TM>,TM<=,TM<,TM>=)
(7) If the data stored in the devices to be compared are not recognized as date data, SM709 will 7
be turned on after the instruction execution and no-conductive status will be made. Once
SM709 is turned on, on-status will be retained till when the CPU modules are reset or
powered off. Therefore, turn off SM709 if necessary. 8
Moreover, if the range of devices specified by S1 to S1 +2 or S1 to S1 +2 exceeds the range of
specified devices, SM709 will be turned on and no-conductive status will be made.
(8) The following table shows the comparison operation results for each instruction.
Instruction Instruction
TM= S1
= S2 TM= S1 S2
TM<> S1 S2 TM<> S2 = S1
7-363
(TM=,TM<>,TM>,TM<=,TM<,TM>=)
The following table shows the conductive states resulting from performing the
comparison operation of the dates A, B, and C shown above.
Even if the objects to be compared are under the same condition, the comparison
operation results vary depending on the objects selected.
Comparison condition
Comparison objects
A<B B<C A<C
Second
Month
Month, day
Hour
Hour, second
Hour, minute
No objects
: Conductive : No-conductive
Operation Error
(1) Any operation errors do not occur in TM=,TM<>,TM>,TM<=,TM<,TM>=instruction.
7-364
(TM=,TM<>,TM>,TM<=,TM<,TM>=)
Program Example
1
(1) The following program compares the data stored in D0 with the data (hour, minute, and
second) stored in D10, and makes Y33 be conductive status when the data stored in D0
meet the data stored in D10. 2
[Ladder Mode] [List Mode]
3
Step Instruction Device
4
(2) The following program compares the data stored in D0 with the current time data (hour and
minute), and makes Y33 be conductive status when the data stored in D0 do not meet the
current date data, when M0 is turned on. 6
[Ladder Mode] [List Mode]
Step Instruction Device
6
7
(3) The following program compares the data stored in D0 with the data (hour and second)
stored in D10, and makes Y33 be conductive status when the data value stored in D10 is
smaller than the data value stored in D0, when M0 is turned on. 8
[Ladder Mode] [List Mode]
Step Instruction Device
7-365
S(P).DATERD
Command
S.DATERD S.DATERD D
Command
SP.DATERD D
SP.DATERD
D : Head number of the devices where the read clock data will be stored (BIN 16 bits)
D –– ––
Function
(1) Reads "year, month, day, hour, minute, second, day of the week, and millisecond" from the
clock element of the CPU module, and stores it as BIN value into the device specified by D
or later device.
D Year (1980 to 2079)
D +1 Month (1 to 12)
D +2 Day (1 to 31)
D +3 Hour (24-hour clock) (0 to 23)
Clock element
D +4 Minute (0 to 59)
D +5 Second (0 to 59)
D +6 Day of week (0 to 6)
D +7 Millisecond (0 to 999)
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device specified by D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
7-366
S(P).DATERD
Program Example
1
(1) The following program outputs the following clock data as BCD values:
Year .................... Y70 to Y7F
Month ................. Y68 to Y6F 2
Day ..................... Y60 to Y67
Hour.................... Y58 to Y5F
Minute................. Y50 to Y57
Second ............... Y48 to Y4F
3
Week .................. Y44 to Y47
Millisecond.......... Y38 to Y43
[Ladder Mode]
4
6
Outputs "Year"
Outputs "Month"
6
Outputs "Day"
Outputs "Hour"
7
Outputs "Minute"
Outputs "Second"
8
Outputs "Day of Week"
Outputs "Millisecond"
[Operation]
BCD Y7F Y70
2 0 0 5 (Year)
D0 2005
Y6F Y68 Y67 Y60
D1 12
1 2 2 4 (Month, Day)
Clock data D2 24
2005, 12, 24 12:57:39 Sunday 530 D3 12
Y5F Y58 Y57 Y50
D4 57
1 2 5 7 (Hour, Minute)
D5 39
D6 0
Y4F Y48 Y47 Y44
D7 530
3 9 0 (Second, Day of week)
BIN
Y43 Y38
5 3 0 (Millisecond)
7-367
S(P).DATERD
Caution
(1) This instruction reads clock data and stores those to a specified device even if a wrong clock
data is set to the CPU module. (example: Feb. 30th)
When setting clock data with the DATEWR instruction or GX Developer, make sure to set a
correct data.
(2) Time error of reading a clock data of millisecond is a maximum of 2ms. (Difference between
the data memorized by clock element inside of the CPU module and the data read by this
function.)
(3) Specifying digit for the bit device can be used only when the following conditions (a) and (b)
are met.
(a) Digit specification: K4
7-368
S(P).DATE+
3
Command
S.DATE+ S.DATE+ S1 S2 D
Command 4
SP.DATE+ S1 S2 D
SP.DATE+
6
S1 : Head number of the devices where the clock data to be adjusted by addition is stored (BIN 16 bits)
S2 : Head number of the devices where the time data to be added for adjustment is stored (BIN 16 bits)
D : Head number of the devices where the result of addition of clock (time) data will be stored (BIN 16 bits)
6
Setting Internal Devices J \
R, ZR U \G Zn Constants Other
Data Bit Word Bit Word
S1 –– –– 7
S2 –– ––
D –– ––
8
Function
For example, adding the time 7:48:10:500 to 6:32:40:875 would result in the following
operation:
S1 Hour: 6 S2 Hour: 7 D Hour: 14
S1 +1 Minute: 32 S2 +1 Minute: 48 D +1 Minute: 20
S1 +2 Second: 40 + S2 +2 Second: 10 D +2 Second: 51
S1 +3 -- S2 +3 -- D +3 --
S1 +4 Millisecond: 875 S2 +4 Millisecond: 500 D +4 Millisecond: 375
7-369
S(P).DATE+
(2) If the results of the addition of time exceed 24 hours, 24 hours will be subtracted from the
sum to make the final operation result.
For example, when the time 20:20:20:500 is added to 14:20:30:875, the result is not
34:40:51:375, but 10:40:51:375.
S1 Hour: 14 S2 Hour: 20 D Hour: 10
S1 +1 Minute: 20 S2 +1 Minute: 20 D +1 Minute: 40
S1 +2 Second: 30 + S2 +2 Second: 20 D +2 Second: 51
S1 +3 -- S2 +3 -- D +3 --
S1 +4 Millisecond: 875 S2 +4 Millisecond: 500 D +4 Millisecond: 375
D Hour
D +1 Minute
D +2 Second
D +3 Day of week
D +4 Millisecond
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The data set by S1 and S2 is outside the range. (See Function (1).) (Error code: 4100)
• The device specified by S1 , S2 or D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
Caution
(1) Specifying digit for the bit device can be used only when the following conditions (a) and (b)
are met.
(a) Digit specification: K4
7-370
S(P).DATE+
Program Example
1
(1) The following program adds 1 hour to the clock data read from the clock element, and stores
the results into the area starting from D100 when X20 is turned ON.
[Ladder Mode] 2
Reads out the clock element
data to D0 or later.
3
Sets the time to D10 or later.
4
6
[List Mode]
[Operation]
7-371
S(P).DATE-
Command
S.DATE- S.DATE- S1 S2 D
Command
SP.DATE- SP.DATE- S1 S2 D
S1 : Head number of the devices where the clock time data to be adjusted by substraction is stored (BIN 16 bits)
S2 : Head number of the devices where time data to be subtracted for adjustment is stored (BIN 16 bits)
D : Head number of the devices where the result of subtraction of clock (time) data will be stored (BIN 16 bits)
S1 –– ––
S2 –– ––
D –– ––
Function
(1) Subtracts the time data designated by S2 from the clock data designated by S1 , and stores
the result into the area starting from the device designated by D .
Setting data Setting data Setting data
S1 Hour (0 to 23) S2 Hour (0 to 23) D Hour (0 to 23)
S1 +1 Minute (0 to 59) S2 +1 Minute (0 to 59) D +1 Minute (0 to 59)
S1 +2 Second (0 to 59) - S2 +2 Second (0 to 59) D +2 Second (0 to 59)
S1 +3 -- S2 +3 -- D +3 --
S1 +4 Millisecond (0 to 999) S2 +4 Millisecond (0 to 999) D +4 Millisecond (0 to 999)
For example, when the clock time 3:50:10:500 is subtracted from the clock time
10:40:20:875, the operation is performed as follows:
S1 Hour: 10 S2 Hour: 3 D Hour: 6
S1 +1 Minute: 40 S2 +1 Minute: 50 D +1 Minute: 50
S1 +2 Second: 20 - S2 +2 Second: 10 D +2 Second: 10
S1 +3 -- S2 +3 -- D +3 --
S1 +4 Millisecond: 875 S2 +4 Millisecond: 500 D +4 Millisecond: 375
7-372
S(P).DATE-
(2) If the subtraction results in a negative number, 24 will be added to the result to make a final
operation result.
For example, when the clock time 10:42:12:500 is subtracted from 4:50:32:875, the result is
1
not 6:8:20:375, but 18:8:20:375.
Hour: 4 Hour: 10 D Hour: 18
2
S1 S2
S1 +1 Minute: 50 S2 +1 Minute: 42 D +1 Minute: 8
S1 +2 Second: 32 - S2 +2 Second: 12 D +2 Second: 20
S1 +3 -- S2 +3 -- D +3 --
S1 +4 Millisecond: 875 S2 +4 Millisecond: 500 D +4 Millisecond: 375
3
8
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
Caution
(1) Specifying digit for the bit device can be used only when the following conditions (a) and (b)
are met.
(a) Digit specification: K4
7-373
S(P).DATE-
Program Example
(1) The following program subtracts the time data stored in the area starting from D10 from the
clock data read from the clock element when X1C is turned ON, and stores the result into
the area starting from D100.
[Ladder Mode]
[List Mode]
Step Instruction Device
[Operation]
• Time data read operation by the SP.DATERD instruction
Clock element D0 05 Year
D1 2 Month
D2 23 Day
D3 8 Hour
D4 42 Minute Time data
D5 1 Second
D6 3 Day of week
D7 997 Millisecond Time data
22:1:51:497
7-374
7.17 Program control instructions
1
(1) Processing when the execution type is converted with the program control instruction is as
follows.
2
Executed Instruction
Execution type before change 3
PSCAN PSTOP POFF PLOW
7-375
(2) As program execution type conversions by PSCAN and PSTOP instructions occur at the
END processing, such conversions are impossible during program execution.
When different execution types have been set for the same program in the same scan, the
execution type will be that specified by the execution switching command that was executed
last.
END processing END processing END processing
Execution
program name GHI "ABC" GHI GHI *1 DEF *1 GHI
*1: The order of "GHI" and "DEF" program execution is determined by the program settings parameters.
Switching from the fixed scan execution type program to the execution type program is
performed in the following timing.
(b) For the CPU modules other than the Universal model QCPU
The execution of the fixed scan execution type is stopped at the execution of the
program control instruction, and the execution type is changed at the END processing.
(3) When the POFF instruction is executed, the output is turned OFF at the next scan, and the
execution type will be the stand-by type at the second next scan and later.
If executed prior to the output OFF processing, the program control instruction is ignored.
7-376
PSTOP(P)
3
Command
PSTOP PSTOP S
PSTOPP
Command
PSTOPP S
4
S : Character string for the name of the program file to be set in the stand-by status or head number of the
6
devices where the character string data is stored (character string)
7
Function
(1) Places the file name program stored in the device designated by S in the stand-by status. 8
(2) Only the programs stored in the drive No. 0 (program memory/internal RAM) can be set as
the stand-by type.
(3) The specified program is placed in the stand-by status when END processing is performed.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The program with the file name specified by S does not exist. (Error code: 2410)
• The program type of the file name specified by S is the SFC program. (Error code: 2412)
• The file name storage destination device of S exceeds the range of the corresponding
device. (Error code: 4101)
Program Example
(1) The following program places the program with the file name ABC in the stand-by status
when X0 goes ON.
[Ladder Mode] [List Mode]
7-377
POFF(P)
High
Basic performance Process Redundant Universal
Command
POFF POFF S
Command
POFFP POFFP S
S : File name of the program to be set in the standby status by turning OFF the output, or the device where the
file name is stored (character string)
S –– –– ––
Function
(1) Changes the execution type of the program with the file name stored in the device
designated by S .
• Scan execution type: Turns OFF outputs at the next scan (Non-execution
processing). Programs are set as the stand-by type after
the subsequent scan.
• Low speed execution type: Stops the execution of the low speed execution type
program and turns OFF outputs at the next scan. Programs
are set as the stand-by type after the subsequent scan.
(2) Only the programs stored in the drive No. 0 (program memory) can be set as the stand-by
type.
(3) This instruction will be given priority even in cases when a program execution type has been
designated in the parameters.
(4) It is not necessary to designate the extension (.QPG) with the file name.
(Only .QPG files will be acted on.)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The program with the file name specified by S does not exist.
(Error code: 2410)
• The file name storage destination device of S exceeds the range of the corresponding
device. (Error code: 4101)
7-378
POFF(P)
Remark
1. Non-execution processing is identical to the processing that is conducted when
1
the condition contacts for the individual coil instructions are in the OFF state.
The operation results for the individual coil instructions following non-execution
2
processing will be as follows, regardless of the ON/OFF status of the individual
contacts:
OUT instruction ...... Forced OFF
3
SET instruction
RST instruction
SFT instruction ...... Maintains status 4
Basic instruction
Application instruction
PLS instruction Processing identical to 6
Pulse generation ...... when condition contacts
instruction ( P) are OFF
Current value of low speed/high speed timer ...... 0 6
Current value of retentive timer
...... Preserves
Current value of counter
7
Program Example 8
(1) The following program makes the program with the file name ABC non-executionable and
places it in the standby status when X0 is turned ON.
[Ladder Mode] [List Mode]
7-379
PSCAN(P)
High
Basic performance Process Redundant Universal
Command
PSCAN PSCAN S
Command
PSCANP PSCANP S
S : File name of the program to be set as a scan execution type, or head number of the devices where the file
name is stored (character string)
S –– –– ––
Function
(1) Sets the program whose file name is being stored at the device designated by S in the scan
execution type.
(2) Only the programs stored in the drive No. 0 (program memory/internal RAM) can be set as
the scan execution type.
(3) Designated programs assume the scan execution type with END processing.
Example
When programs A, B, and C exist and program A performs "PSCAN" of program D.
A B C END A B C D END
Execution of Program D
PSCAN is executed
Scan Scan
(4) This instruction will be given priority even in cases when a program execution type has been
designated in the parameters.
(5) It is not necessary to designate the extension (.QPG) with the file name.
(Only .QPG files will be acted on.)
7-380
PSCAN(P)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The program with the file name specified by S does not exist.
2
(Error code: 2410)
• The file name storage destination device of S exceeds the range of the corresponding 3
device. (Error code: 4101)
• The specified file name is the SFC program, and the SFC program for the other file name
has been already started. (Dual activation error of the SFC program) 4
(For the Universal model QCPU) (Error code: 4131)
(For the High Performance model QCPU, Process CPU, Redundant CPU)
(Error code: 2504) 6
Program Example
6
(1) The following program sets the program with file name ABC as scan execution type when
X0 is turned ON.
[Ladder Mode] [List Mode] 7
Step Instruction Device
7-381
PLOW(P)
High
Basic performance Process Redundant Universal
Command
PLOW PLOW S
Command
PLOWP PLOWP S
S : File name of the program to be set as a low speed execution type, or head number of the devices where the
file name is stored (character string)
S –– –– ––
Function
(1) Sets the program whose file name is being stored at the device designated by S in
low-speed execution type.
(2) Only the programs stored in the drive No. 0 (program memory/internal RAM) can be set as
the low speed execution type.
(3) Designated programs assume the low speed execution type with END processing.
Example
When programs A, B, and C exist and program A performs "PLOW" of program D.
(Assume that the constant scan has been set.)
Waiting for constant
A B C END A B C END D
Execution of Program D
PLOW is executed
Scan Scan
(4) This instruction will be given priority even in cases when a program execution type has been
designated in the parameters.
(5) It is not necessary to designate the extension (.QPG) with the file name.
(Only .QPG files will be acted on.)
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The program with the designated file name does not exist. (Error code: 2410)
• There is a CHK instruction contained within the program whose file name has been
designated. (Error code: 4235)
7-382
PLOW(P)
Program Example
1
(1) The following program sets the program with file name ABC as low-speed execution type
when X0 is turned ON.
[Ladder Mode] [List Mode] 2
Step Instruction Device
7-383
PCHK
High
Basic performance Process Redundant Universal
Command
ANDPCHK PCHK File name
Command
ORPCHK
S : File name of the program whose execution status will be checked (character string)
S –– ––
Function
(1) Checks whether the program of the specified file name is in execution or not
(non-execution).
(2) The instruction is in conduction when the program of the specified file name is in execution,
and the instruction is in non-conduction when the program is in non-execution.
(3) Specify the file name without an extension (.QPG).
For example, specify "ABC" when the file name is ABC.QPG.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The program with the designated file name does not exist. (Error code: 2410)
Program Example
(1) Program that keeps Y10 ON when the program file "ABC.QPG" is being executed.
Execution
Non-execution
7-384
PCHK
Remark
Non-execution indicates that the program execution type is a stand-by type.
1
Execution indicates that the program execution type is a scan execution type
(including during output OFF (during non-execution processing)), low speed
execution type or fixed scan execution type.
2
3
The PCHK instruction is in conduction when the program of the specified file
name (target program) is in execution, and the instruction is in non-conduction 4
when the program is in non-execution.
When the target program is set to non-execution (stand-by type) with the POFF
instruction, the PCHK instruction is in conduction while the non-execution 6
processing of the target program is being performed.
At the END processing of the scan where the non-execution processing is
completed, the target program is put into non-execution (stand-by type), and the
6
PCHK instruction is brought into non-conduction.
Therefore, note that if the PCHK instruction is executed for the program where the
non-execution processing has been completed by the POFF instruction, the
7
PCHK instruction may be brought into conduction.
The following chart shows the operation performed when program A executes the
POFF instruction of program B and program C executes the PCHK instruction of
8
program B with the programs being executed in order of program A, program B
and program C.
Program B execution type change
(Scan execution type to stand-by type)
7-385
WDT(P)
Basic High
performance Process Redundant Universal
Command
WDT WDT
Command
WDTP WDTP
Function
(1) Resets watchdog timer during the execution of a sequence program.
(2) Used in cases where the scan time exceeds the value set for the watchdog timer due to
prevailing conditions.
If the scan time exceeds the watchdog timer setting value on every scan, change the
watchdog timer settings at the peripheral device parameter settings.
(3) Make sure that the setting for t1 from step 0 to the WDT instruction and the setting for t2
from the WDT instruction to the END (FEND) instruction do not exceed the setting value of
the watchdog timer.
Step 0 END (FEND)
WDT
T1 T2
(4) The WDT instruction can be used two or more times during a single scan, but care should be
taken in such cases, because of the time required until the output goes OFF during the
generation of an error.
(5) Scan time values stored at the special register will not be cleared even if the WDT or WDTP
instruction is executed.
Accordingly, there are times when the value for the scan time for the special register is
greater than the value of the watchdog timer set at the parameters.
7-386
WDT(P)
Operation Error
1
(1) There are no operation errors associated with the WDT(P) instruction.
2
Program Example
(1) The following program has a watchdog timer setting of 200 ms, when due to the execution
3
conditions program execution requires 300 ms from step 0 to the END (FEND) instruction.
[When WDT instruction is used]
4
Program where
Program where scan time is
scan time is 150 ms.
300 ms.
WDT 6
END
Program where
scan time is
150 ms.
6
END
7-387
DUTY
Basic High
performance Process Redundant Universal
Command
DUTY DUTY n1 n2 D
n1 ––
n2 ––
D *1 –– ––
Function
(1) Turns the user timing clock (SM420 to SM424, SM430 to M434), designated by D , ON for
the duration equivalent to the number of scans specified by n1, and OFF for the duration
equivalent to the number of scans specified by n2.
ON
SM420 to SM424 OFF
SM430 to SM434 n1 scans n2 scans
(2) Scan execution type programs use SM420 to SM424, and low speed execution type
programs use SM430 to SM434.
(3) The following will take place if both n1 and n2 have been set for 0:
(4) The data designated by n1, n2, and D is registered with the system when the DUTY
instruction is executed, and the timing pulse is turned ON and OFF by END processing.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The device designated by D is not from SM420 to SM424 or SM430 to SM434.
(Error code: 4101)
• The values of n1 and n2 are less than 0. (Error code: 4100)
7-388
DUTY
Program Example
1
(1) The following program turns SM420 ON for 1 scan, and OFF for 3 scans if X0 is ON.
[Ladder Mode] [List Mode]
2
Step Instruction Device
[Operation] 4
ON
OFF
X0
ON 6
OFF
SM420
1 scan 3 scans
6
7-389
TIMCHK
Ver.
High
Basic performance Process Redundant Universal
Basic model QCPU: The upper five digits of the serial No. are "04122" or larger.
command
TIMCHK TIMCHK S1 S2 D
S1 : Device where the measured current value will be stored (BIN 16 bits)
S2 : Device where the set value of measurement is stored (BIN 16 bits)
D : Device to be turned ON at time-out (bits)
S1 –– –– ––
S2 ––
D –– –– ––
Function
(1) Measures the ON time of the device used as a condition, and turns ON the device specified
by S2 if the condition device remains ON for longer than the time set to the device specified
by D .
(2) The current value of the device specified by S1 is cleared to 0 and the device specified by D
is turned OFF at the leading edge of the execution command.
The current value of the device designated by S1 and the ON status of the device
designated by D are retained after the execution command turns OFF.
(3) Set the set value of measurement in units of 100ms.
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• The device that cannot be specified has been specified. (Error code: 4100)
Program Example
(1) Program where the ON time of X0 is set to 5s, the current value storage device to D0, and
the device that will turn ON at time-out to Y10.
[Ladder Mode] [List Mode]
7-390
ZRRDB(P)
3
Command
ZRRDB ZRRDB n D
Command 4
ZRRDBP ZRRDBP n D
n : Serial byte number for the file register to be read (BIN 32 bits)
6
D : Number of the device where the read data will be stored (BIN 16 bits)
Setting
Data
Internal Devices
Bit Word
R, ZR
Bit
J \
Word
U \G Zn
Constants
K, H
Other 6
n ––
D –– ––
7
Function 8
(1) Reads the serial byte number designated by n that does not signify a block number, and
stores at the lower 8 bits of the device designated by D .
The upper 8 bits designated by D will become 00H.
(2) The correspondence between file register numbers and serial byte numbers is as indicated
below:
b15 b8b7 b0
ZR0 Serial byte No. 1 Serial byte No. 0
ZR1 Serial byte No. 3 Serial byte No. 2
ZR2 Serial byte No. 5 Serial byte No. 4
7-391
ZRRDB(P)
(a) If the value of n has been designated as 23560, the data at the lower 8 bits of ZR11780
will be read.
Read destination
designation b15 b8 b7 b0 b15 b8 b7 b0
n 23560 ZR11780 43H 21H D 00H 21H
Data is stored
(b) If the value of n has been designated as 43257, the data at the upper 8 bits of ZR21628
will be read.
Read destination
designation b15 b8 b7 b0 b15 b8 b7 b0
n 43257 ZR21628 93H 42H D 00H 93H
Data is stored
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• A device number (serial byte number) that exceeds the range of allowable designations
has been designated. (Error code: 4101)
Program Example
(1) The following program reads the lower bits of ZR16000 and the upper bits of R16003, and
stores results at D100 and D101 when X0 is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
[Operation]
b15 b8 b7 b0 b15 b8 b7 b0
Serial byte No. 32000
R16000 8FH 25H D100 00H 25H
(Lower bits of R16000)
R16001 42H 32H D101 00H 93H
R16002 12H 34H
Serial byte No. 32007
R16003 93H 00H
(Upper bits of R16003)
7-392
ZRWRB(P)
3
Command
ZRWRB ZRWRB n S
ZRWRBP
Command
ZRWRBP n S
4
n : Serial byte number for the file register to be written (BIN 32 bits) 6
D : Number of the device where the data to be written is stored (BIN 16 bits)
S ––
7
Function 8
(1) Writes the lower bits of data stored in the device designated by S that does not signify a
block number to the file register of the serial byte number designated by n.
The upper 8 bits of data in the device designated by are ignored. S
(2) The correspondence between file register numbers and serial byte numbers is as indicated
below:
b15 b8b7 b0
ZR0 Serial byte No. 1 Serial byte No. 0
ZR1 Serial byte No. 3 Serial byte No. 2
ZR2 Serial byte No. 5 Serial byte No. 4
Storage destination
when an even number is designated
Storage destination
when an odd number is designated
7-393
ZRWRB(P)
If n 12340 is specified, the data will be written to the lower 8 bits of ZR11170.
Write destination
designation b15 b8 b7 b0 b15 b8 b7 b0
n 12340 ZR11170 43H 21H S Ignored 54H
b15 b8 b7 b0
43H 54H
If n 43257 is specified, the data will be written to the upper 8 bits of ZR21628.
Write destination
designation b15 b8 b7 b0 b15 b8 b7 b0
n 43257 ZR21628 12H 50H S Ignored 43H
b15 b8 b7 b0
43H 50H
Operation Error
(1) In the following case, an operation error occurs, the error flag (SM0) turns ON, and an error
code is stored into SD0.
• A device number (serial byte number) that exceeds the range of allowable designations
has been designated. (Error code: 4101)
Program Example
(1) The following program writes the data at the lower bits of D100 and D101 to the lower bits of
R16000 and the upper bits of R16003 when X0 is turned ON.
[Ladder Mode] [List Mode]
[Operation]
b15 b8 b7 b0 b15 b8 b7 b0
Serial byte No. 32000 D100 10H
R16000 54H 59H Ignored
(Lower bits of R16000)
R16001 4AH BAH
R16002 ABH 80H b15 b8 b7 b0
Serial byte No. 32007 D101 Ignored 01H
R16003 99H 77H
(Upper bits of R16003)
b15 b8 b7 b0
R16000 54H 10H
R16001 4AH BAH
R16002 ABH 80H
R16003 01H 77H
7-394
ADRSET(P)
Command
3
ADRSET ADRSET S D
ADRSETP
Command
ADRSETP S D
4
S : Number of the device whose indirect address is read out (Device name)
6
D : Number of the device where the indirect address of the device designated by S will be stored (BIN 32 bits)
Setting
Data
Internal Devices
Bit Word
R, ZR
Bit
J \
Word
U \G Zn Constants Other 6
S ––
D ––
7
Function 8
(1) Stores the indirect address of the device designated by S at D +1 and D .
The address stored at the device designated by D is used when an indirect device address
is performed by the sequence program.
Device area
D0
D1
D100
Address of W100
D101 W100 1234
Operation Error
(1) There are no operation errors associated with the ADRSET(P) instruction.
Remark
See Section 3.4 for further information on indirect designations.
7-395
KEY
High
Basic performance Process Redundant Universal
Command
KEY KEY S n D1 D2
S : Head number of the devices (X) to which a numeral will be input (bits)
n : Number of digits of the numeral to be input (BIN 16 bits)
D1 : Head number of the devices where the input numeral will be stored (BIN 16 bits)
D2 : Number of the bit device to turn ON at the completion of input (bits)
S (Only X) –– –– –– ––
n ––
D1 –– –– –– ––
D2 –– ––
Function
(1) Fetches ASCII data from the 8 points of input (X) designated by S , converts it to
hexadecimal values and stores the result in the area starting from the device designated by
D1 .
Designation of
n the number of Input module
digits to be input
S
S +1
S +2
S +3 "0" (30H) to "9" (39H)
b15 b12 b11 b8b7 b4 b3 b0 S +4
S +5 "A" (41H) to "F" (46H)
D1 Number of digits that are input
S +6
D1 +1 5 digits 6 digits 7 digits 8 digits S +7
D1 +2 1 digit 2 digits 3 digits 4 digits S +8 Strobe signal
For example, in a case where the number of digits (n) has been set at 5, and the values "31",
"33", "35", "37" and "39" have been input through X10 to X18 of the input module, the
following will take place:
Number of digits
5 Input module
of input data D0
The first input value
X10
X11
X12
b15 b12b11 b8 b7 b4 b3 b0 X13 " 1 3 5 7 9 "
X14 (31H)(33H)(35H)(37H)(39H)
D10 5 X15
X16
D11 3H 5H 7H 9H X17
D12 0H 0H 0H 1H X18 Strobe signal
7-396
KEY
(2) Numerical input to input (X) designated by S undergoes bit development at S through
S +7 and is input as the ASCII code corresponding to the numbers. 1
ASCII code which can be input is from 30H (0) to 39H (9), and from 41H (A) to 46H (F).
(3 H) (1 H)
Input module
b7 b4 b3
"1"(31 H)= 0 0 1 1 0 0 0 1
b0
2
S
S +1
S +2
S +3
S +4 3
S +5
S +6
S +7
4
(3) After ASCII code is input to S to S +7, the strobe signal at S +8 goes ON to incorporate the
designated numbers internally.
The strobe signal should be held at its ON or OFF status for more than one scan of the
sequence program.
6
If this time is less than 1 scan, there will be cases when the data is correctly incorporated.
Execution command
6
Condition contact for ON for 1 scan OFF for 1 scan
the execution of KEY or longer or longer
instruction
7
Strobe signal ( S +8)
ASCII code input
( S to S +7)
31H 32H 33H 34H 8
(4) Be sure to keep the execution command (condition contact for the KEY instruction) ON until
(5) The digits for the numbers actually fetched to D1 will be stored at the device designated by
D1 , and these will be converted to the ASCII codes input at D1 +1 and D1 +2, converted to
hexadecimal BIN values, and stored.
Execution command
Condition contact for the
execution of KEY instruction
Strobe signal ( S 8)
D1 1 2 3 4 5
D1 1 0 0 0 1 0 0 1 3 0 1 3 5 1 3 5 7 3 5 7 9
D1 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
7-397
KEY
(7) Fetching of the input data is completed when any of the inputs shown below has been made.
At the completion, the bit device designated by D2 is turned ON.
• When the number of digits specified by n has been input
• When the "0DH" code has been input
For example, the operations at the location designated if n 5 will be as indicated below:
Execution command
Strobe signal
( S +8)
ASCII code input
When the 31H 42H 35H 37H 39H
designated ( S to S +7)
number of digits
are input
D1 1 2 3 4 5
D1 +1 0 0 0 1 0 0 1 B 0 1 B 5 1 B 5 7 B 5 7 9
D1 +2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Processing
completed ( D2 )
Execution command
Strobe signal
( S +8)
When 0DH code ASCII code input
31H 42H 35H 0DH
is input ( S to S +7)
D1 1 2 3 3
D1 +1 0 0 0 1 0 0 1 B 0 1 B 5 0 1 B 5
D1 +2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Processing
completed ( D2 )
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The device designated by D is not an input (X) device. (Error code: 4100)
• The number of digits designated by n are outside the range of from 1 to 8.
(Error code: 4100)
7-398
KEY
Program Example
1
(1) The following program fetches data of the 5 or fewer digits from the numerical key pad
connected to X20 to X28, and stores it to the area starting from D0 when X0 is turned ON.
[Ladder Mode] 2
6
[List Mode]
X20
" 1 2 3 4 5" X21
X22 b15 b12b11 b8 b7 b4 b3 b0
X23 D0 5
X24 D1 2H 3H 4H 5H
X25 D2 0H 0H 0H 1H
X26
Numerical keypad X27
(Strobe signal) X28
7-399
ZPUSH(P),ZPOP(P)
Basic High
performance Process Redundant Universal
Command
ZPUSHP, ZPOPP P D
D : Head number of the devices to/from which contents of an index register are saved/recovered (BIN 16 bits)
D –– ––
Function
ZPUSH
(1) Saves the contents of the following index registers to after the device specified by D .
(When contents of an index register are saved, D + 0 (the number of saves made) is
increased by 1.)
• Basic model QCPU: Z0 to Z9
• High Performance model QCPU/Process CPU/Redundant CPU:
Z0 to Z15
• Universal model QCPU: Z0 to Z19
(2) The ZPOP instruction is used for data recovery. Nesting is possible within the ZPUSH to
ZPOP cycle.
(3) If nesting has been done, each time the ZPUSH instruction is executed, the field used
following D will be added to, so a field large enough to accommodate the number of times
the instruction will be used should be maintained from the beginning.
(4) The composition of the field used following D is as shown below:
• When Basic model QCPU is used
D +0 Number of saves
+1 Z0
+2 Z1
1st nesting
(15 words for the 1st nesting)
+10 Z9
+11 Reserved by the
+15 system (5 words)
+16 Z0
+17 Z1
2nd nesting
7-400
ZPUSH(P),ZPOP(P)
Operation Error
Program Example
(1) The following program saves the contents of the index register to the fields following D0
before calling the subroutine following P0 that uses the index register.
[Ladder Mode] [List Mode]
Step Instruction Device
7-401
UNIRD(P)
Basic High
performance Process Redundant Universal
Command
UNIRD UNIRD n1 D n2
Command
UNIRDP UNIRDP n1 D n2
n1: Value obtained by dividing the head I/O number of the reading module information source by 16 (0 to FFn)
(BIN 16 bits)
D : Head number of the devices where the module information will be stored (device name)
n2: The number of points of read data (0 to 256) (BIN 16 bits)
n1 –– ––
D –– –– –– ––
n2 –– ––
Function
(1) Reads the module information as much as designated by n2 from the module designated by
n1 (value obtained by dividing the head I/O number by 16), and stores that information into
the area starting from the device designated by D .
(Reads the status of the actually installed modules instead of the module type designated by
I/O assignment.)
Remark
The value of n1 is designated by the higher 3 digits of the head I/O number of the
slot from which the module information is read, when it is expressed in 4 digits in
hexadecimal notation.
Power supply module
CPU module
Q68ADV
QY41P
QX10
QX10
QX10
QX10
QY10
QY10
7-402
UNIRD(P)
*1: The Universal model QCPU used in the multiple CPU system is turned ON during the online
module change of the module controlled by the other CPU.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
[High Performance model QCPU, Process CPU, Redundant CPU and Universal model
QCPU]
• When n1 is other than 0 to FFH (Error code: 4100)
• When n2 is other than 0 to 256 (Error code: 4100)
• When a total of n1 and n2 is equal to or greater than 257 (Error code: 4100)
[Q00/Q01CPU]
• When n1 is other than 0 to 3FH (Error code: 4100)
• When n2 is other than 0 to 64 (Error code: 4100)
• When a total of n1 and n2 is equal to or greater than 65 (Error code: 4100)
[Q00JCPU]
• When n1 is other than 0 to FH (Error code: 4100)
• When n2 is other than 0 to 16 (Error code: 4100)
• When n1 and n2 is equal to or greater than 17 (Error code: 4100)
7-403
UNIRD(P)
Program Example
(1) The following program stores the module information at I/O numbers 10H to 20H into the
devices starting from D0 when X10 is turned ON.
Card information Device
X/Y0 module information D0
X/Y10 module information D1
X/Y20 module information
:
X/YFE0 module information
X/YFF0 module information
32-point module
Intelligent function module
No external power supply connected
No blown-fuse error existing
Execution other than during online module
change or from the standby system
No module error existing
• With a 48- or 64-point module, the same contents as those of D1 are stored in D2 or D2
and D3 respectively.
7-404
UNIRD(P)
For an A series module, all of these bits turn 0 because information is not stored. 2
A series module
Module is installed 3
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
D1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
4
All of these bits turn 0 because information is stored to "D0."
7-405
7.18.10 Reading module model name(TYPERD(P))
Ver.
High
Basic performance Process Redundant Universal
Universal model QCPU: The serial number (first five digits) is "11043" or later.
Command
TYPERD TYPERD n D
Command
TYPERDP TYPERDP n D
.
Setting Internal device J \ Constant
R, ZR U \G Zn Others
data Bit Word *6 Bit Word K, H
n –– –– ––
D –– –– –– ––
Set Data
Function
(1) This instruction reads the module information stored in the area starting from the I/O number
specified by "n", and stores it in the area starting from the device specified by D .
The following 6 modules (Q series only) support the instruction.
• CPU module
• Input module
• Output module
• I/O combined module
• Intelligent function module
• GOT (bus connection)
7-406
(2) Specify the start I/O number of a module whose model name is to be read by "n" as follows:
• Specify the value obtained by dividing the start I/O number of the target module by 16.
1
Power CPU Q68 QY41
supply module QX10 QX10 QX10
module
QX10 ADV P QY10 QY10
2
3E00H 0000H 0010H 0020H 0030H 0040H 0050H 0070H 0080H Start I/O number configured in
the I/O assignment setting
3
Specify the start I/O number by K3 or H3.
Example) QJ71GP21S-SX 6
Specify a value to which 0010H, start I/O number of the mounted module, is added.
Power
supply CPU QJ71G P21S-SX Empty Empty Empty Empty Empty Empty
7
module module
3E00H 0000H 0010H 0030H 0040H 0050H 0060H 0070H 0080H Start I/O number configured in 8
the I/O assignment setting
Power
Q20UDH Q20UDH Q20UDH QY41 Q68 QY41
supply CPU QY10 QY10
CPU CPU CPU P ADV P
module module
3E00H 3E10H 3E20H 3E30H 0000H 0010H 0020H 0030H 0040H Start I/O number configured in
the I/O assignment setting
Or, the model name can be read by specifying the start I/O number of a module controlled
by another CPU.
7-407
(3) D +0 and D +1 to D +9 store the execution result of the instruction and module model
name, respectively.
A value stored in D is as follows:
(a) When the model name has been written to the target module (example: QJ71GP21-SX)
b15 to b8 b7 to b0
○+0
D 0 Stores 0.
○+1
D 4AH (J) 51H (Q) Indicates that the model name
that has been written to
Nine words are used. ○+2
D 31H (1) 37H (7) the target module is stored.
○+3
D 50H (P) 47H (G) Stores the model name that has been
written to the target module
○+4
D 31H (1) 32H (2) (stored in ASC II).
○+5
D 53H (S) 2DH (-)
○+6
D 00H 58H (X)
○+7
D 00H 00H
00H 00H Stores the remaining model name and
○+8
D
00H to the 12th to 17th devices and
○+9
D 00H 00H the 18th device, respectively.
The following table shows the examples of model names stored in D +1 to D +9.
Target module Stored model name
CPU module Q06UDEHCPU
Intelligent function module QJ71GP21-SX
GOT GOT1000
(b) When the model name has not been written to the target module (example: QX40)
b15 to b8 b7 to b0
○+0
D 1 Stores 1.
○+1
D 4AH (N) 49H (I) Indicates that the character
string consists of module type and
Nine words are used. ○+2
D 55H (U) 50H (P) the number of points is stored.
○+3
D 5FH (_) 54H (T) Stores the character string consists
of module type and the number of points.
○+4
D 36H (6) 31H (1) (stored in ASC II).
○+5
D 00H 00H
○+6
D 00H 00H
○+7
D 00H 00H
○+8
D 00H 00H Stores the remaining model name and
00H to the 12th to 17th devices and
○+9
D 00H 00H the 18th device, respectively.
The following table shows the examples of character strings stored in D +1 to D +9..
Target module Stored character string
Input module INPUT_16
Output module OUTPUT_32
I/O combined module MIXED_64
Intelligent function module INTELLIGENT_128
7-408
[Character string indicating the number of points]
• 16 points:_16
1
• 32 points:_32
• 48 points:_48
• 64 points:_64 2
• 128 points:_128
• 256 points:_256 3
• 512 points:_512
• 1024 points:_1024
4
(c) Others
• The specified slot is empty or the target module is during online module change.
• The specified value (n) is not the start I/O number. 6
• The specified value (n) is within the allowable setting range, but cannot be set in the
I/O assignment setting screen of the PLC parameter dialog box.
6
b15 to b8 b7 to b0
○+0
D -1 Stores -1.
○+1
D 00H 00H
Indicates that the model
name is not stored. 7
Nine words are used. ○+2
D 00H 00H
○+3
D 00H 00H
○+4
D 00H 00H
8
○+5
D 00H 00H
○+6
D 00H 00H
○+7
D 00H 00H
○+8
D 00H 00H Stores 00H.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
• The target module cannot be communicated due to a failure. (Error code: 2110)
• Devices by 10 words starting from the device specified by D exceed the device range.
(Error code: 4101)
• The specified value (n) is except 0 to FFH and 3E0 to 3E3H. (Error code: 4101)
7-409
Program Example
(1) The following program stores the model name of a module having the start I/O number
0020H in the area starting from the device specified by D when X0 is turned on.
[Ladder Mode] [List Mode]
Step Instruction Device
7-410
TRACE,TRACER
3
Command
TRACE TRACE
Command 4
TRACER TRACER
6
Setting Internal Devices J \
R, ZR U \G Zn Constants Other
Data Bit Word Bit Word
–– ––
6
Function
7
The sampling trace function collects the specified device data of a CPU module consecutively at
the specified timing.
With the sampling trace function, the traced results obtained through the specified number of 8
trace operations will be stored in the trace file of the memory card when SM800, SM801, and
SM802 are turned ON.
Trace ends by
TRACE number of trace TRACER
Number of trace
after trigger
SM800
(Preparation for trace)
SM801
(Starting trace)
SM802
(During the execution of trace)
SM803
(Trigger for trace)
SM804
(After the execution of trace
trigger)
SM805
(Completion of trace)
7-411
TRACE,TRACER
TRACE
(1) The TRACE instruction turns ON SM803, executes sampling by the number of times set for
"After trigger number of times" in the Trace condition settings, latches the data and stops
sampling trace.
(2) The sampling is stopped if SM801 is turned OFF during the trace execution.
(3) After the TRACE instruction is executed and the trace is completed, SM805 is turned ON.
(4) Once the TRACE instruction is executed, the second and the subsequent TRACE
instructions are ignored.
When the TRACER instruction is executed, the TRACE instruction is enabled again.
TRACER
(1) The TRACER instruction resets the TRACE instruction. When the TRACER instruction is
executed, the TRACE instruction is enabled again.
(2) When the TRACER instruction is executed, SM803 to SM805 are turned OFF.
Remark
1. For details of the trace, refer to the QnUCPU User's Manual (Function
Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU User's
Manual (Function Explanation, Program Fundamentals).
2. For trace execution with GX Developer, refer to the GX Developer Operating
Manual.
Operation Error
(1) There are no operation errors associated with the TRACE or TRACER instruction.
Program Example
(1) The following program executes the TRACE instruction when X0 is turned ON, and resets
the TRACE instruction with the TRACER instruction when X1 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
7-412
SP.FWRITE
3
Command
SP.FWRITE SP.FWRITE U0 S0 D0 S1 S2 D1
4
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data Bit Word Bit Word K, H $
S0 –– –– ––
6
D0 –– –– –– –– ––
S1 –– –– –– –– –– 6
S2 –– –– –– ––
D1 *1 *1 –– –– –– ––
*1: Local devices and the devices designated for individual programs cannot be used. 7
Setting
Meaning Setting Range Set by Data Type
8
Data
U0 Dummy –– ––
D0 +3 (Not used) –– –– ––
Set the file position when binary data writing
is specified by D0 .
BIN 16 bits
00000000H :Starting at the beginning of the file
D0 00000001H to FFFFFFFEH:
From the specified position
The unit of the value depends
on data type specification.
FFFFFFFFH : Addition starts from the end
of the file.
When CSV format write is specified at D0
D0 +4 File • For the High Performance model QCPU of 00000000H to
which the first 5 digits of the serial number User
D0 +5 position FFFFFFFFH
are "01111" or lower, always set the
beginning (0H) of the file.
• For the High Performance model QCPU/
Process CPU/Redundant CPU/Universal
model QCPU of which the first 5 digits of
the serial number are "01112" or higher, set
the file position.
00000000H to FFFFFFFEH
: Starting at the beginning of
the file
FFFFFFFFH : Addition starts at the end of the file.
7-413
SP.FWRITE
Setting
Meaning Setting Range Set by Data Type
Data
S2 +1 to 0000H to
Write data Data to request writing.
S2 + FFFFH
*2: Indicates the range applicable only for the Universal model QCPU.
7-414
SP.FWRITE
Caution 1
(1) At S0 (drive designation), only the ATA card drive (2) can be set.
Note that when the Flash card is loaded, the SP.FWRITE instruction cannot be used to
perform writing.
2
The SRAM card, standard RAM or standard ROM drive cannot be set.
(2) For CSV setting, the data written are decimal values. 3
Example Character "A" (41H) "65" is written.
Handling range: -32768 to 32767
4
(3) For binary write, the word-specified file position setting range is 00000000H to 7FFFFFFFH
and FFFFFFFFH.
7-415
SP.FWRITE
Function
(1) The designated number of data is written to the designated file.
Set the execution/completion type in the control data to designate whether to write binary
data without any conversion or to convert binary data into CSV format data before writing it.
(The writing target is the ATA card only.)
(2) The execution completion bit device ( D1 ) is automatically turned ON at the END processing
after the completion of the instruction is detected. The bit device is turned OFF at the
execution of the END instruction in the next scan.
Use this bit device as the execution completion flag for the SP.FWRITE instruction.
When this instruction is completed abnormally, the error completion device ( D1 +1) is turned
ON/OFF in synchronization with the processing complete ( D1 ) device. Use this device as the
error completion flag for this instruction.
SM721 is turned ON during the execution of the instruction.
This instruction cannot be executed while SM721 is ON. (If an attempt is made, no
processing is performed.)
When an error is detected at the execution of the instruction (before SM721 is turned ON),
the processing complete device ( D1 ), the error completion device ( D1 +1), and SM721 are
not turned ON.
(3) Be sure to use in units of words to designate the No. of request write data ( S2 ) and the file
position ( D0 +4 and D0 +5).
The following shows the method for writing binary data when No. of request write data and
file position are specified.
Control data
D0+0 H0000 Execution/completion type
D0+1 - (Not used)
D0+2 K3 Number of written
result data
D0+3 - (Not used)
D0+4 K1
Head position of the file to be written
D0+5
D0+6 - Designation of the number of columns
D0+7 K0 Data type specification
7-416
SP.FWRITE
(e) An error occurs when the saving space becomes full while data is added and saved.
6
In such a case, the data that is successfully added/saved remains in the medium.
The error completion is indicated after as much data as possible is added/saved.
(5) When writing data after CSV format conversion
6
(a) If the extension is omitted, ".CSV" is used as an extension.
(b) When the existing file is specified: 7
[High Performance model QCPU of which the first 5 digits of the serial number are
"01111" or lower]
File contents are all deleted and data are saved, starting at the beginning. 8
[High Performance model QCPU/Process CPU/Redundant CPU/Universal model
QCPU of which the first 5 digits of the serial number are "01112" or higher]
• When other than FFFFFFFFH is set at ( D0 +4, D0 +5), file contents are all deleted and
data are saved, starting at the beginning.
7-417
SP.FWRITE
(e) When the designated number of columns is "0", the data is stored as single-row data in
CSV format file.
Example
When data is written after CSV format conversion and the designated No. of columns is
"0":
0 , 10 , 20 , 30 , 40 , -50 , 100 CR LF
7-418
SP.FWRITE
(f) When data is written after CSV format conversion and the designated number of
columns is other than "0", the data is stored as table data with designated number of
columns in a CSV format file.
1
Example
2
When data is written after CSV format conversion and the designated No. of columns is
other than "0":
4
D10 H0100 Execution/completion type
D11 K0 In the module
D12 K0 Number of written result data (In normal completion,
it is the same number as the number of data to be written.) 6
D13 K0 Not used
D14 K0
D15 K0 6
D16 K3 No. of columns designation
D17 K0 Data type specification
7
D20 H4241 File name
D21 H4443 "ABCD"
D22 H0000 8
Number of data to be written
D099 K7
Data to be written
D100 K0
D101 K10
0 , 10 , 20 CR LF
30 , 40 , -50 CR LF
100 CR LF
7-419
SP.FWRITE
(g) When data is added by the High Performance model QCPU/Process CPU/Redundant
CPU/Universal model QCPU of which the first 5 digits of the serial number are 01112 or
higher:
[Specify the file to which data will be written.] (If a file exists, delete it and create a new
file again.)
Execution type = CSV format File position = 0H (New file is created)
Column designation = 4H*3*5 Write head device = D0
Data type specification = Word Number of data = 6H*3
Device data
(Data to be written)
Column Column Column Column K6 D0 Number of write points
1 2 3 4
K1 D1
Starting row Row 1 1 , 2 , 3 , 4 CR LF K2 D2
K3 D3
*3 K4 D4
Row 2 5 , 6 CR LF
K5 D5
K6 D6
K5 D7
K7 D8
K8 D9
K9 D10
K10 D11
K11 D12
K12 D13
[In the addition mode, make addition from the end of the file.]
Execution type = CSV format File position = FFFFFFFH (Continuation mode)
Column designation = 3H*3*5 Write head device = D7
Data type specification = Word Number of data = 8H*3
Device data
(Data to be written)
K6 D0
7-420
SP.FWRITE
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• Drive specified by drive designation device S0 contains the medium other than the ATA 2
card. (Error code: 4100)
• Values specified in control data and the subsequent devices are out of the setting
range.
D0
(Error code: 4100)
3
• Value designated by "No. of request write data" ( S2 ) is out of the setting range, or
exceeds the device range designated by ( S2 +1) or the subsequent devices.
(Error code: 4101)
4
• Empty space in the ATA card is insufficient. (Error code: 4100)
• No free space is found when an attempt is made to create a new file. 6
(Error code: 4100)
• Invalid device is designated. (Error code: 4004)
• Access error occurred in the ATA card. (Error code: 4100) 6
• An unusable value is set for a file name ( S1 ). (Error code: 4100)
• The attribute of a file name ( S1 ) is "read only". (Error code: 4100) 7
• The device specified by D0 or D1 exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
8
7-421
SP.FWRITE
Program Example
(1) When X10 is turned ON, the following program adds four bytes of binary data (00H, 01H,
02H, and 03H) to file "ABCD.BIN" in the memory card inserted to drive 2.
• Assume that 8 points from D0 are reserved for the control data devices.
[Ladder Mode]
[List Mode]
7-422
SP.FWRITE
(2) When X10 is turned ON, the following program creates a file named "ABCD.CSV" in the
memory card inserted to drive 1, and writes four bytes of data (00H, 01H, 02H, and 03H) as
two-column table data in CSV format. 1
• The written file is displayed as follows:
[Ladder Mode]
2
Sets the execution/completion type
8
[List Mode]
• Assume that 8 points from D0 are reserved for the control data devices.
7-423
SP.FREAD
High
Basic performance Process Redundant Universal
Command
SP.FREAD SP.FREAD U0 S0 D0 S1 D1 D2
S0 –– –– ––
D0 –– –– –– –– ––
S1 –– –– –– –– ––
D1 –– –– –– ––
D2 *1 *1 –– –– –– ––
*1: Local devices and the devices designated for individual programs cannot be used.
Setting
Meaning Setting Range Set by Data Type
Data
U0 Dummy –– ––
D0 +3 (Not used) –– –– ––
*2: Indicates the range applicable only for the Universal model QCPU.
7-424
SP.FREAD
Setting
Meaning Setting Range Set by Data Type
Data
Designate the file position to start reading when
1
binary data reading is designated by D0 .
00000000H: Starting at the beginning of the file
00000001H to FFFFFFFEH
:From the designated position
2
The unit for the value is
determined by word/byte unit
designation.
FFFFFFFFH: Setting disabled
3
When CSV format read is specified at D0
• For the High Performance model QCPU of
D0 +4 File
which the first 5 digits of the serial number
00000000H to 4
are "01111" or lower, always set the User
position FFFFFFFFH
D0 +5 beginning (0H) of the file.
• For the High Performance model QCPU/
Process CPU/Redundant CPU/Universal 6
model QCPU of which the first 5 digits of the
D0 serial number are "01112" or higher, set the
file position (Row).
00000000H: Read starts at the beginning of 6
the file.
00000001H to FFFFFFFEH
:Read starts at the specified row.
FFFFFFFFH: Read continues, starting at the 7
previous read position.
When binary read is specified at D0 , always
set 0.
When CSV format read is specified at D0 , set
8
No. of
the number of columns from where data will 0H to FFFFH BIN 16 bits
+6 columns User
D0 be read. (0 to 65535)
designation
0: No columns. Regarded as one row.
Other than 0: Regarded as the specified
number of columns.
D1 +1 to Reading
Read data –– System
data
D1 +
7-425
SP.FREAD
Setting
Meaning Setting Range Set by Data Type
Data
Bit device that turned ON at the completion of the processing.
( D2 +1 is also turned ON at error completion.)
Device Item Contents/Setting Data Setting Range Set by
Indicates the completion of the processing.
Completion
D2 D2 ON: Completed –– Bit
signal
OFF: Not completed
Indicates whether the processing is normally System
Error
completed or abnormally completed.
D2 +1 completion ––
ON: Error completion
signal
OFF: Normal completion
Caution
(1) At S0 (drive designation), only the ATA card drive (2) can be set.
Note that when the Flash card is loaded, the SP.FREAD instruction cannot be used to
perform read.
The SRAM card, standard RAM or standard ROM drive cannot be set.
(2) For CSV setting, the data written are decimal values.
Example
Character "A" (41H) "65" is written.
Handling range: -32768 to 32767
(3) For binary read, the word-specified file position setting range is 00000000H to 7FFFFFFFH.
Function
(1) Data is read from the designated file.
Set the execution/completion type in the control data to designate whether to read binary
data without any conversion or to convert binary data into CSV format data before reading it.
(The reading target is the ATA card only.)
(2) The execution completion bit device ( D2 ) is automatically turned ON at the END processing
after the completion of the instruction is detected. The bit device is turned OFF at the
execution of the END instruction in the next scan.
Use this bit device as the execution completion flag for the SP.FWRITE instruction.
When this instruction is completed abnormally, the error completion device ( D2 +1) is turned
ON/OFF in synchronization with the execution completion ( D2 ) device. Use this device as
the error completion flag for this instruction.
SM721 is turned ON during the execution of the instruction.
This instruction cannot be executed while SM721 is ON. (If an attempt is made, no
processing is performed.)
When an error is detected at the execution of the instruction (before SM721 is turned ON),
the processing complete device ( D1 ), the error completion device ( D1 +1), and SM721 are
not turned ON.
7-426
SP.FREAD
(3) Be sure to use word units to designate the number of request read data ( D0 +2), file position
( D0 +4 and D0 +5), and read data device size ( D1 ).
The following shows how the individual device data is read in binary data reading operation.
1
Control data
D0+0
D0+1
H0000
-
Execution/completion type
(Not used)
2
D0+2 K3 Number of request read data
D0+3 - (Not used)
D0+4 K1 3
D0+5 Location to start reading in the file
D0+6 - Designation of columns
D0+7 K0 Data type specification 4
Data device File data (in byte units)
D1+0 K3 H00 6
H11
D1+1 H33 22 H22
Total H33 6
D1+2 H55 44 H44
Read data
H55
D1+3 H77 H66
7
H77
H88
H99
HAA
8
(c) If the position specified is greater than the existing file size:
• The High Performance model QCPU of which the first 5 digits of the serial number
are "01111" or lower results in an error.
• The High Performance model QCPU/Process CPU/Redundant CPU/Universal
model QCPU of which the first 5 digits of the serial number are '01112' or higher will
perform reading at point 0 and will be completed normally.
(d) The elements designated by the number of request read data ( D0 +2) are read from the
beginning of the file.
When the last data of the file is reached before the specified number of data are read:
• The High Performance model QCPU of which the first 5 digits of the serial number
are "01111" or lower results in an error.
• The High Performance model QCPU/Process CPU/Redundant CPU/Universal
model QCPU whose the first 5 digits of the serial number are '01112' or higher reads
the data up to the point where the reading is possible.
7-427
SP.FREAD
(e) When the designated number of columns is 0, the data is read by ignoring the rows in
CSV format file.
Example When data is read after CSV format conversion and the designated No. of
columns is 0:
7-428
SP.FREAD
If the number of columns varies in each row, the data is also read by ignoring the rows.
1
Such file cannot be created using EXCEL. This happens when CSV file is
modified by a user.
2
Example If the number of columns varies in each row when the data is read:
3
Main / sub item , , Measured value , Excess CR LF
Length CR LF
Temperature , -21 , CR LF
4
7
D10 H0100 Execution/completion type
D11 - Not used
D12 K7 Number of request read data 8
D13 - Not used
D14 K0
D15 K0
D16 K0 Designation of the number of columns
7-429
SP.FREAD
(f) When data is read after CSV format conversion and the designated number of columns
is other than 0, the data is read as the table with designated number of columns in CSV
format file. The elements outside of the designated columns are ignored.
Example When data is read after CSV format conversion and the designated No. of
columns is other than "0":
7-430
SP.FREAD
If the number of columns varies in each row, the elements outside of the designated columns are
ignored and "0" is added to the places where elements do not exist.
1
Example
If the number of columns varies in each row when the data is read: 2
Main / sub item , , Measured value , Excess CR LF
Length CR LF 3
Temperature , -21 , CR LF Elements outside the designated
number of columns are ignored.
4
Data to be read into devices
Read Length D102 K0 Conversion data (0) is stored since "Length" is nonnumeric data.
data No data D103 K0 No data Since no element exists here, conversion data (D) is added.
Temperature D104 K0 Conversion data (0) is stored since "Temperature" is nonnumeric data.
-21 D105 K-21 Since " -21 " is a numeric value, it is converted to a binary value.
7-431
SP.FREAD
Row 5 17 , 18 , 19 , CR LF
[In the continuation mode, read continues from the end of the previous read position.]
Execution type = CSV format Starting row number = FFFFFFFH (Continuation mode)
Column designation = 4H Read head device = D7
Data type specification = Word Number of data = 5H
Device data
(Data to be read out)
K6 D0
K11 D8
position
K12 D9
K13 D10
Row 3 9 , 10 , 11 , 12 CR LF K14 D11
K15 D12
D13
Row 4 13 , 14 , 15 , 16 CR LF
Next starting
position
Row 5 17 , 18 , 19 , 20 CR LF
• When read is performed in the continuation mode, the previous addition cannot be made
normally if the "execution type", "column designation" and "Data type specification"
settings differ from those at the previous time.
• The previous addition cannot be made normally if the SP.FREAD instruction or
SP.FWRITE instruction with another setting is executed while data is being read
continuously in the continuation mode.
7-432
SP.FREAD
(h) When data is read after CSV format conversion, the numerical values that are out of
range or the elements other than numerical values in the object CSV format file are
converted into 0H.
1
(i) When data is read after CSV format conversion, numerical values are read and
converted as follows: 2
Numerical Values in
-32768 to -1 0 to 32767 32768 to 65535
CSV Format
Without
3
32768 to 65535 0 to 32767 32768 to 65535
Word a sign
device With a
sign
-32768 to -1 0 to 32767 -32768 to -1 4
(j) Do not execute this instruction in an interrupt program.
(Otherwise, a malfunction may result.) 6
Operation Error
6
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• Drive specified by drive designation device ( S0 ) contains the medium other than the ATA 7
card. (Error code: 4100)
• Values designated in control data ( D0 ) and the subsequent devices are out of the setting
range. (Excluding D0 +2) (Error code: 4100)
8
• Value designated by number of data blocks to be read ( D0 +2) is out of the setting range.
(Error code: 4101)
• Invalid device is designated. (Error code: 4004)
7-433
SP.FREAD
Program Example
(1) The following program reads 4 bytes of binary data from the beginning of file "ABCD.BIN" in
the memory card inserted to drive 2 when X10 is turned ON.
• Assume that 8 points from (D0) are reserved for the control data devices.
• Assume that 100 bytes from D20 are reserved for the reading devices.
[Ladder Mode]
[List Mode]
7-434
SP.FREAD
(2) The following program reads file "ABCD.CSV" in the PC card inserted to slot 0 as
two-column table data in CSV format when X10 is turned ON.
• Assume that 8 points from (D0) are reserved for the control data devices.
1
• Assume that 100 bytes from D20 are reserved for the reading devices.
• Assume that the target CSV format file contains numerical values only. 2
[Ladder Mode]
6
Normal completion display
6
Error completion display
[List Mode]
8
Step Instruction Device
7-435
SP.DEVST
High
Basic performance Process Redundant Universal
Command
SP.DEVST SP.DEVST n1 S n2 D
n1: Write offset of the device data storage file (specified in units of 16-bit words) (BIN 32-bit)
S : Head device number written to the standard ROM (device name)
n1 –– –– ––
S –– –– –– ––
n2 –– –– ––
D *1 –– *1 –– –– ––
Function
(1) Writes device data for the number of points specified at n2 of the device S to the write
offset, which is specified for n1, of the device data storage file in the standard ROM.
n1 is the offset from the head of device data storage file and specified by word offset (in units
of 16-bit words).
Standard ROM
Write
offset 16-bit
+0
Number of
+1
n2 points
+2
(2) Since the device data write position completion device ( D +0) in the standard ROM
automatically turns ON at execution of the END instruction, which detects the completion of
this instruction, and turns OFF with the END instruction of next scan, it is used as an
execution completion flag of this instruction.
(3) When this instruction is completed in error, the error completion device ( D +1) turns ON/
OFF at the same timing with the completion device ( D +0). This device is used as an error
completion flag of this instruction.
7-436
SP.DEVST
Operation Error 3
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The write offset specified at n1 is out of the device data storage file range.
4
(Error code: 4100)
• The number of n2 points from the write offset specified at n1 is out of the device data 6
storage file range. (Error code: 4100)
• The range for the number of n2 points from the device S exceeds the corresponding
device. (Error code: 4141) 6
• The device data storage file is not set at "PLC file" of PLC parameter on GX Developer.
(Error code: 2410)
• The device specified by D exceeds the range of the corresponding device. 7
(Error code: 4101)
Program Example 8
(1) The program which writes the ten points of data from D100 to the device data storage file in
the standard ROM when M0 turns ON.
[Ladder Mode] [List Mode]
Caution
(1) The value written to the standard ROM is the value at execution of this instruction.
(2) The standard ROM write count index (SD687 and SD688) is increased by the execution of
the SP.DEVST instruction. If the standard ROM write count index exceeds hundred
thousand times, FLASH ROM ERROR (error code: 1610) occurs.
(3) To prevent the number of ROM writes from increasing due to executing instruction
carelessly, set the specification of writing to standard ROM instruction count (SD695) to
restrict the number of writes a day.
Exceeding the number of writes (the default values are 36 times.) set causes OPERATION
ERROR (error code: 4113).
7-437
(S(P).DEVLD)
High
Basic performance Process Redundant Universal
Command
S.DEVLD S.DEVLD n1 D n2
Command
SP.DEVLD SP.DEVLD n1 D n2
n1 : Read offset of the device data storage file (specified in units of 16-bit words) (BIN 32-bit)
D : Head device number read from the standard ROM (device name)
n2 : The number of reading points (BIN 16-bit)
n1 –– –– ––
D –– –– –– ––
n2 –– –– ––
Function
(1) Reads device data for the number of points specified at n2 from the read offset, which is
specified for n1, of the device data storage file in the standard ROM, and stores the data to
the device specified for D .
n1 is the offset from the head of device data storage file and specified by word offset (in units
of 16-bit words).
Standard ROM
Read
offset 16-bit
+0
Number of
n2 points +1
+2
7-438
(S(P).DEVLD)
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The address specified at n1 is out of the standard ROM range. (Error code: 4100) 2
• The number of n2 points from the address specified at n1 is out of the standard ROM
range. (Error code: 4100)
3
• The range for the number of n2 points from the device D exceeds the corresponding
device. (Error code: 4101)
• The device data storage file is not set at "PLC file" of PLC parameter on GX Developer. 4
(Error code: 2410)
Program Example 6
(1) The program which reads the ten points of data from D100 to the device data storage file in
the standard ROM when M0 turns ON. 6
[Ladder Mode] [List Mode]
7-439
PLOADP
High
Basic performance Process Redundant Universal
Command
PLOADP PLOADP S D
S : Drive No. storing the program to be loaded, character string data of the file name, or head number of the
devices storing the character string data (BIN 16 bits) *1
D : Device that turns ON for 1 scan by the instruction completion (bits)
S –– –– ––
D *2 –– –– –– ––
Function
(1) The program stored in the memory card or standard ROM is transferred to the program
memory (drive 0).
If the transferred program is not registered to the program setting of the PLC parameter
dialog box, its program setting in the CPU module is set to the standby type.
At this time, the program setting of the PLC parameter dialog box does not change.
(To transfer a program with the PLOADP instruction, a continuous free space is required in
the program memory.)
(2) The program added using the PLOADP instruction is assigned the lowest number among
the unused program Nos.
(To assign a program number manually, store the program number to be assigned in
SD720.)
The following example assumes that "MAIN6" is added by the PLOADP instruction.
(a) When the program Nos. have been set consecutively, the new program is added at the
end of the preset program Nos.
When programs No. 1 to 5 have been set, the new program is added as program No. 6.
Program No. Program name Program No. Program name
1 MAIN1 1 MAIN1
2 MAIN2 Adds "MAIN6" by the 2 MAIN2
3 MAIN3 PLOADP instruction. 3 MAIN3
4 MAIN4 4 MAIN4
5 MAIN5 5 MAIN5
6 MAIN6 Added at the end.
7-440
PLOADP
(b) When there are multiple open program Nos., the program designated by the PLOADP
instruction is added to the lowest number among them to be added.
(The open program Nos. are made when programs are deleted by the PUNLOADP
1
instruction.)
When programs No. 2 and 4 are open, the new program is added as program No. 2.
2
Program No. Program name Program No. Program name
1 MAIN1 1 MAIN1
2 Empty Adds "MAIN6" by the 2 MAIN6 Added to the smallest program
3 MAIN3 PLOADP instruction. 3 MAIN3 number which is empty. 3
4 Empty 4 Empty
5 MAIN5 5 MAIN5
7-441
PLOADP
(10) The "PLOADP instruction" and "Write during RUN" processing cannot be executed
simultaneously.
(a) When a write during RUN request is given during processing of the PLOADP
instruction, write during RUN is delayed.
Write during RUN is started after the processing of the PLOADP instruction is
completed.
(b) When the PLOADP instruction is executed during write during RUN, the processing of
the PLOADP instruction is delayed.
The processing of the PLOADP instruction is started after completion of write during
RUN.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• File name does not exist at the drive number designated by S . (Error code: 2410)
• The drive No. designated by S is invalid. (Error code: 4100)
• There is not enough memory to load the specified program in drive 0.
(Error code: 2413)
• The number of files registered in the program memory is as much number as the one
indicated in the table below. (Error code: 4101)
• The program No. stored in SD720 is already used, or larger than the largest program
number shown in the table below. (Error code: 4101)
• The program file which has the same name as the program file to be loaded already
exists. (Error code: 2410)
• The file size of the local devices cannot be reserved. (Error code: 2401)
CPU Model Name Program Memory (No. of Files) Largest Program No.
Q02 (H) CPU 28 28
Q06HCPU 60 60
Q12HCPU 124 124
Q25HCPU 124 124
Q12PHCPU 124 124
Q25PHCPU 124 124
Program Example
(1) The following program transfers "ABCD.QPG" stored in drive 4 to drive 0 and places the
program in standby status when M0 is turned ON.
[Ladder Mode] [List Mode]
7-442
PUNLOADP
3
Command
PUNLOADP PUNLOADP S D
4
S : Character string data of the program file name to be unloaded, or head number of the devices storing the
character string data (BIN 16 bits)
D : Device turned ON for 1 scan on completion of the instruction (bits)
6
Setting Internal Devices J \ Constants
R, ZR U \G Zn Other
Data $
6
Bit Word Bit Word
S –– –– ––
D *1 –– –– –– ––
Function 8
(1) The standby program stored in the program memory (drive 0) is deleted from the program
memory.
(The program set as the "scan execution type" with the PSCAN instruction or the program
set as the "low speed execution type" with the PLOW instruction cannot be deleted.)
(3) An extension (.QPG) need not be specified for the file name.
(4) The bit device specified by D is turned ON during the END processing of the scan where
this instruction is completed. The bit device is turned OFF at the next END processing.
(5) The PLOADP, PUNLOADP and PSWAPP instructions cannot be executed simultaneously.
If two or more of the above instructions are executed simultaneously, the instruction
executed later will not be executed.
When using the above instructions, provide interlocks manually to avoid simultaneous
execution.
7-443
PUNLOADP
(6) When the Programmable Controller is powered OFF, then ON or the CPU module is reset
after execution of the PUNLOADP instruction, the following operation is performed.
(a) When boot setting has been made in the PLC parameter dialog box, the program where
the boot setting has been made is transferred to the program memory.
When the program deleted by the PUNLOADP instruction is not to be executed, delete
the corresponding program name from the boot setting and program setting of the PLC
parameter dialog box.
(b) When boot setting has not been made in the PLC parameter dialog box, "FILE SET
ERROR (error code: 2400)" occurs.
1) When the program deleted by the PUNLOADP instruction is not to be executed,
delete the corresponding program name from the program setting of the PLC
parameter dialog box.
2) When the program deleted by the PUNLOADP instruction is to be executed again,
write the corresponding program to the CPU module.
(b) When the PUNLOADP instruction is executed during write during RUN, the processing
of the PUNLOADP instruction is delayed.
The processing of the PUNLOADP instruction is started after completion of write during
RUN.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The file name designated by S does not exist. (Error code: 2410)
• The program designated by S is not in standby status or is being executed.
(Error code: 4101)
Program Example
(1) The following program deletes "ABCD.QPG" stored in drive 0 from the memory when M0
turns from OFF to ON.
[Ladder Mode] [List Mode]
7-444
PSWAPP
3
Command
PSWAPP PSWAPP S1 S2 D
4
S1 : Character string data of the file name of the program to be unloaded, or head number of the devices storing
the character string data (BIN 16 bits)
S2 : Drive No. storing the program to be loaded, character string data of the file name, or head number of the
6
devices storing the character string data (BIN 16 bits) *1
–– –– ––
7
S1
S2 –– –– ––
D *2 –– –– –– ––
Function
7-445
PSWAPP
(b) When boot setting has not been made in the PLC parameter dialog box, "FILE SET
ERROR (error code: 2400)" occurs.
1) When the program replaced by the PSWAPP instruction is to be executed, change
the program setting of the PLC parameter dialog box for the corresponding program
name.
2) To execute the program set in the program setting of the PLC parameter dialog box,
write the corresponding program to the CPU module again.
(10) The "PSWAPP instruction" and "write during RUN" processing cannot be executed
simultaneously.
(a) When a write during RUN request is given during processing of the PSWAPP
instruction, write during RUN is delayed.
Write during RUN is started after the processing of the PSWAPP instruction is
completed.
(b) When the PSWAPP instruction is executed during write during RUN, the processing of
the PSWAPP instruction is delayed.
The processing of the PSWAPP instruction is started after completion of write during
RUN.
7-446
PSWAPP
Operation Error
1
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The drive No. or the file name designated by S1 or S2 does not exist. 2
(Error code: 2410)
• The drive No. designated by S1 is invalid. (Error code: 4100)
• There is not enough memory to load the specified program in drive 0. 3
(Error code: 2413)
• The program designated by is not in standby status or is being executed.
4
S1
Program Example 6
(1) The following program deletes "EFGH.QPG" stored in drive 0 from the memory, transfers
"ABCD.QPG" stored in drive 4 to drive 0, and places the program in standby status when M0
is turned from OFF to ON. 6
[Ladder Mode] [List Mode]
7-447
RBMOV(P)
High
Basic performance Process Redundant Universal
Command
RBMOV RBMOV S D n
Command
RBMOVP RBMOVP S D n
S : Head number of the devices where the data to be transferred is stored (BIN 16 bits)
D : Head number of the devices of transfer destination (BIN 16 bits)
n : Number of data to be transferred (BIN 16 bits)
S –– ––
D –– ––
n ––
Function
(1) Transfers in batch 16-bit data of n points from the device designated by S to location n
points from the device designated by D .
b15 b0 b15 b0
S 1234H D 1234H
S +1 5678H Block D +1 5678H
S +2 7FF0H transfer D +2 7FF0H
n n
(2) The transfer is available even if there is an overlap between the source and destination
devices.
For the transmission to the smaller number of device, the data is transferred from S . For the
transmission to the larger number of device, the data is transferred from S +(n-1).
However, as shown in the example below, when transferring data from R to ZR, or from ZR
to R, the range to be transferred (source) and the range of destination must not overlap.
• ZR transfer range ((specified head No. of ZR) to (specified head No. of ZR + the number
of transfers -1))
R transfer range ((specified head No. of R + file register block No. 32768) to (specified
head No. of R + file register block No. 32768 + the number of transfers -1))
7-448
RBMOV(P)
Example
Transfer ranges of ZR and R overlap when transferring 10000 points of data from ZR30000 1
(source) to R10 (block No.1 of the destination).
• ZR transfer range (30000) to (30000+10000-1) (30000) to (39999)
• R transfer range (10+(1 32768)) to (10+(1 32768)+10000-1)
2
(32778) to (42777)
Therefore, the range 32778 to 39999 overlaps.
3
Source of transfer Destination of transfer
ZR0 R0
4
Overlapped Block No. 0
ZR30000 R32767
ZR39999 R10 6
R10009 Block No. 1
(3) When S is a word device and D is a bit device, the number of bits designated by the bit
device digit specification will be transferred. If K1Y30 has been designated by D , the lower
7
four bits of the word device designated by S will be transferred.
S
b15
R100
b4b3b2b1b0
1011
D +2 D +1 D 8
Y3B Y38Y37 Y34Y33 Y30
S +1 R101 0011 n 011100111011
n
S +2 R102 0111
7-449
RBMOV(P)
Program Example
(1) The following program outputs the lower four bits of data in R66 to R69 to Y30 through Y3F
in units of 4 points.
[Ladder Mode] [List Mode]
Before execution
(source of transfer) After execution
b15 b4b3 b0 (destination of transfer)
R66 1110 1 1 1 0 1 Y33 to Y30
R67 00000 0 0 0 0 Y37 to Y34
R68 10011 0 0 1 1 Y3B to Y38
R69 0 110 1 1 1 0 1 Y3F to Y3C
Ignored
(2) The following program outputs the data in X20 to X2F to R100 to R103 in units of 4 points.
[Ladder Mode] [List Mode]
0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 R101
4 points
0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 R102
0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 R103
Filled with 0s
7-450
RBMOV(P)
The RBMOV (P) instruction is useful to batch transfer a large quantity of file 1
register data with the QnHCPU/QnPHCPU/QnPRHCPU.
For the QnUCPU, the processing speed of the RBMOV instruction is equivalent to
that of the BMOV instruction. 2
The comparison of processing speed between the RBMOV and BMOV
instructions is as follows:
145.1 µs 1111.5 µs
5800.0 µs
1135.1 µs
8
RBMOV SRAM card*2 - - - - - -
*1 : When file registers are stored in the Flash card, no processing is performed for transfer from
internal devices to file registers.
*2 : Unusable for the Q00UCPU and Q01UCPU.
7-451
RBMOV(P)
7-452
I INDEX
Index-1
[Symbols] BIN 16-bit addition operations (+) .................... 6-22
- (BIN 16-bit subtraction operations).................... 6-22 BIN 32-bit addition operations (D+).................. 6-26
$+ (Linking character strings) ...................... 6-65,6-67 Block addition (BK+)................................. 6-59,6-62
$=, $<>, $>, $<=, $<, $>= (Character string data Addition and subtraction of floating decimal point data
comparisons) ....................................................... 6-11 (Double precision) (ED+, ED-) ..................... 6-50,6-52
$MOV (Character string transfers) .................... 6-112 Addition and subtraction of floating decimal point data
* (BIN 16-bit multiplication operations) ................ 6-30 (Single precision) (E+, E-)............................ 6-46,6-48
+ (BIN 16-bit addition operations)........................ 6-22 ADRSET (Indirect address read) ....................... 7-395
/ (BIN 16-bit division operations) ......................... 6-30 ANB (Ladder block series connections)............... 5-10
<(BIN 16-bit data comparisons)............................. 6-2 AND (=, <>, >, <=, <, >=) (BIN 16-bit data
<=(BIN 16-bit data comparisons)........................... 6-2 comparisons) ......................................................... 6-2
<>(BIN 16-bit data comparisons)........................... 6-2 AND (A contact series connection) ........................ 5-2
=(BIN 16-bit data comparisons)............................. 6-2 AND (D=, D<>, D>, D<=, D<, D>=) (BIN 32-bit data
>(BIN 16-bit data comparisons)............................. 6-2 comparisons) ......................................................... 6-4
>=(BIN 16-bit data comparisons)........................... 6-2 AND (E=, E<>, E>, E<=, E<, E>=) (Floationg decimal
point data comparisons(Single precision))............. 6-6
AND (ED=, ED<>, ED>, ED<=, ED<, ED>=) (Floationg
[Numerics]
decimal point data comparisons(Double precision))
16-bit data block transfers (FMOV) ......... 6-120,6-122 ............................................................................... 6-8
16-bit data checks (SUM) .................................... 7-69 And inverse (ANI) .................................................. 5-3
16-bit data exchange (XCH) .............................. 6-124 AND($=, $<>, $>, $<=, $<, $>=) (Character string data
16-bit data exclusive NOR operation (WXNR)..... 7-27 comparisons) ....................................................... 6-11
16-bit data searches (SER) ................................. 7-66 ANDF (Pulse series connections / trailing edge
16-bit dead band controls (BAND)..................... 7-324 leading edg) ..................................................... 5-5,5-7
16-bit exclusive OR operations (WXOR) ............. 7-19 ANDP (Pulse series connections / leading edge
16-bit negation transfers (CML) ......................... 6-114 leading edg) ..................................................... 5-5,5-7
16-bit transfers (MOV) ....................................... 6-106 ANDPI, ANDFI ....................................................... 5-8
1-bit shift to left of n-bit data (BSFL) ............ 7-49,7-51 ANI (B contact series connection) ......................... 5-2
1-bit shift to right of n-bit data (BSFR) ......... 7-49,7-51 Annunciator output (OUT F) ................................ 5-28
1-word shift to left of n-word data (DSFL).... 7-54,7-56 Application instructions ........................................ 2-29
1-word shift to right of n-word data (DSFR) Arithmetic operation instructions.......................... 2-16
..................................................................... 7-54,7-56 ASC (Conversion from hexadecimal BIN to ASCII)
32-bit data checks (DSUM) ................................. 7-69 ........................................................................... 7-228
32-bit data exchanges (DXCH).......................... 6-124 ASIN (SIN-1 operation on floating-point data (Single
32-bit data exclusive NOR operation (DXNR) ..... 7-27 precision)) .......................................................... 7-262
32-bit data searches (DSER)............................... 7-66 ASIND (SIN-1 operation on floating-point data (Double
32-bit dead band controls (DBAND) .................. 7-324 precision)) .......................................................... 7-265
32-bit exclusive OR operations (DXOR) .............. 7-19 ATAN (TAN-1 operation on floating-point data (Single
32-bit negation transfers (DCML) ...................... 6-114 precision)) .......................................................... 7-271
32-bit transfers (DMOV) .................................... 6-106 ATAND (TAN-1 operation on floating-point data
4-bit dissociation of 16-bit data (DIS) .................. 7-77 ........................................................................... 7-273
4-bit linking of 16-bit data (UNI) ........................... 7-79
7-segment decode (SEG) .................................... 7-75 [B]
B- (BCD 4-digit subtraction) ................................. 6-34
[A]
B contact operation start (LDI) ............................... 5-2
A contact operation start (LD)................................ 5-2 B* (BCD 4-digit multiplication) ............................. 6-42
A contact parallel connection (OR) ........................ 5-2 B+ (BCD 4-digit addition) ..................................... 6-34
A contact series connection (AND)........................ 5-2 B/ (BCD 4-digit division)....................................... 6-42
ACOS (COS-1 operation on floating-point data (Single BACOS (BCD type COS-1 operation) ................ 7-317
precision)) .......................................................... 7-267 BAND (16-bit dead band controls) ..................... 7-324
ACOSD (COS-1 operation on floating-point data Basic instructions ................................................. 2-10
(Double precision)) ............................................ 7-269 BASIN (BCD type SIN-1 operation).................... 7-315
Addition BATAN (BCD type TAN-1 operation) ................. 7-313
Addition of floating decimal point (Double precision) Batch recovery of index register (ZPOP) ........... 7-400
(ED+)........................................................ 6-50,6-52 Batch reset of bit devices (BKRST) ..................... 7-64
Addition of floating decimal point (Single precision) Batch save of index register (ZPUSH) ............... 7-400
(E+) .......................................................... 6-46,6-48 BCD (BIN data to 4-digit) ..................................... 6-73
BCD 4-digit addition (B+) ................................. 6-34 BCD 4-digit addition and subtraction operations (B+,
BCD 8-digit addition (DB+)............................... 6-38 B-) ........................................................................ 6-34
Index - 2
BCD 4-digit multiplication and division operations (B*, BK+ (Block addition) .................................... 6-59,6-62
B/) ........................................................................ 6-42 BKAND (Block logical products) ............................ 7-9
BCD 4-digit square roots (BSQR)...................... 7-306 BKBCD (Conversion from block BIN 16-bit data to
BCD 8-digit addition and subtraction operations (DB+, BCD 4-digit data) ................................................. 6-98
DB-) ..................................................................... 6-38 BKBIN (Conversion from block BCD 4-digit data to
BCD 8-digit multiplication and division operations block BIN 16-bit data) ........................................ 6-100
(DB*, DB/)............................................................ 6-44 BKCMP
(BIN block data comparisons).... 6-15,6-18
BCD 8-digit square roots (BDSQR) ................... 7-306 BKOR (Block logical sum operations).................. 7-17
BCD conversion BKRST (Batch reset of bit devices) ..................... 7-64
Conversion from BIN data to 4-digit BCD (BCD) BKXNR (Block exclusive NOR operations).......... 7-33
......................................................................... 6-73 BKXOR (Block exclusive OR operations) ............ 7-25
Conversion from BIN data to 8-digit BCD (DBCD) Block 16-bit exchanges (BXCH) ........................ 6-126
......................................................................... 6-73 Block 16-bit transfers (BMOV) ........................... 6-117
BCD type COS operations (BCOS) ................... 7-311 Block addition (BK+) .................................... 6-59,6-62
BCD type COS-1 operations (BACOS) .............. 7-317 Block exclusive NOR operations (BKXNR).......... 7-33
BCD type SIN operation (BSIN) ........................ 7-309 Block exclusive OR operations (BKXOR) ............ 7-25
BCD type SIN-1 operation (BASIN) ................... 7-315 Block logical products (BKAND) ............................ 7-9
BCD type TAN operation (BTAN) ...................... 7-313 Block logical sum operations (BKOR).................. 7-17
BCD type TAN-1 operations (BATAN) ............... 7-319 Block subtraction (BK-) ................................ 6-59,6-62
BCDDA (Conversion from BCD 4-digit to decimal BMOV (Block 16-bit data transfers) ................... 6-117 I
ASCII) ................................................................ 7-189 BREAK (Forced end of FOR to NEXT instruction loop)
BCOS (BCD type COS operations) ................... 7-311 ........................................................................... 7-108
BDSQR (BCD 8-digit square roots) ................... 7-306 BRST (Bit reset for word devices) ....................... 7-59
BIN (BCD 4-digit data to BIN data)...................... 6-75 BSET (Bit set for word devices)........................... 7-59
BIN 16-bit addition and subtraction operations (+, -) BSFL (1-bit shift to left of n-bit data) ............ 7-49,7-51
............................................................................. 6-22 BSFR (1-bit shift to right of n-bit data) ......... 7-49,7-51
BIN 16-bit data comparisons (=, <>, >, <=, <, >=) BSIN (BCD type SIN operation)......................... 7-309
............................................................................... 6-2 BSQR (BCD 4-digit square roots)...................... 7-306
BIN 16-bit data sort operations (SORT) .............. 7-95 BTAN (BCD type TAN operation) ...................... 7-313
BIN 16-bit multiplication and division operations (*, /) BTOW (Data linking in byte units)........................ 7-85
............................................................................. 6-30 Buffer memory access instructions...................... 2-41
BIN 16-bit to BIN 32-bit (DBL) ............................. 6-88 BXCH (Block 16-bit data exchanges) ................ 6-126
BIN 16-bit to Gray code (GRY)............................ 6-90
BIN 32-bit addition and subtraction operations (D+, D-) [C]
............................................................................. 6-26
Calculation of averages for 16-bit or 32-bit data
BIN 32-bit block data comparisons (DBKCMP
,
(MEAN(P),DMEAN(P)) ...................................... 7-103
DBKCMP
P) .................................................... 6-18
Calculation of totals for 16-bit data (WSUM) ....... 7-99
BIN 32-bit data block addition and subtraction
Calculation of totals for 32-bit data (DWSUM)
operations (DBK+(P),DBK-(P))............................ 6-62
................................................................. 7-101,7-103
BIN 32-bit data comparisons (D=, D<>, D>, D<=, D<,
CALL (Subroutine program calls) ...................... 7-110
D>=)....................................................................... 6-4
Cautions on programming ................................... 3-27
BIN 32-bit data sort operations (DSORT)............ 7-95
Changing check format of CHK instruction (CHKCIR,
BIN 32-bit data to BIN 16-bit data (WORD)......... 6-89
CHKEND) .......................................................... 7-179
BIN 32-bit data to Gray code (DGRY) ................. 6-90
Character string data ........................................... 3-11
BIN 32-bit multiplication and division operations (D*,
Character string data comparisons...................... 6-11
D/)........................................................................ 6-32
Character string length detection (LEN) ............ 7-204
BIN block data comparisons (BKCMP
) ... 6-15,6-18
Character string processing instructions.............. 2-43
BINDA (Conversion from BIN 16-bit data to decimal
Character string search (INSTR) ...7-239,7-241,7-243
ASCII) ................................................................ 7-183
Character string transfers ($MOV)..................... 6-112
BINHA (Conversion from BIN 16-bit data to
CHKCIR (Changing check format of CHK instruction)
hexadecimal ASCII)........................................... 7-186
........................................................................... 7-179
Bit data .................................................................. 3-3
CHKEND (Changing check format of CHK instruction)
Bit device output reverse (FF) ............................. 5-40
........................................................................... 7-179
Bit device shifts (SET) ......................................... 5-44
CHKST, CHK (Special format failure checks).... 7-175
Bit processing instructions................................... 2-34
CJ (Pointer branch instruction) .......................... 6-129
Bit reset for word devices (BRST) ....................... 7-59
Clock comparison (TM=,TM,TM>,TM=)............. 7-361
Bit set for word devices (BSET)........................... 7-59
Clock data addition operation (DATE+) ............. 7-348
Bit tests (TEST/DTEST) ...................................... 7-61
Clock data subtraction operation (DATE-) ......... 7-350
BK- (Block subtraction)................................ 6-59,6-62
Clock instructions................................................. 2-52
Index - 3
CML (16-bit negation transfers) ......................... 6-114 Conversion from ASCII to hexadecimal BIN (HEX)
COM (Refresh instruction) ............. 7-134,7-137,7-141 ........................................................................... 7-230
Common logarithm operation on floating-point data Conversion from BCD 4-digit to decimal ASCII
(Double precision) (LOG10D(P)) ....................... 7-302 (BCDDA) ............................................................ 7-189
Common logarithm operation on floating-point data Conversion from BCD 8-digit to decimal ASCII
(Single precision) (LOG10(P)) ........................... 7-300 (DBCDDA) ......................................................... 7-189
Comparison operation instruction table ............... 2-10 Conversion from BIN 16-bit to character string (STR)
Comparison operation instructions ........................ 6-2 ........................................................................... 7-206
Comparisons (BIN 16-bit data) .............................. 6-2 Conversion from BIN 16-bit to decimal ASCII (BINDA)
Comparisons (BIN 32-bit data) .............................. 6-4 ........................................................................... 7-183
Comparisons (Character string data) .................. 6-11 Conversion from BIN 16-bit to floating decimal point
Complement of 2 of BIN 16-bit data (NEG) ......... 6-94 (Double precision) (FLTD) ................................... 6-81
Complement of 2 of BIN 32-bit data (DNEG) ...... 6-94 Conversion from BIN 16-bit to floating decimal point
COMRD (Reading device comment data) ......... 7-201 (Single precision) (FLT) ....................................... 6-78
Conditions for execution of instructions ............... 3-33 Conversion from BIN 16-bit to hexadecimal ASCII
Connection instructions (BINHA) ............................................................. 7-186
Association instruction table............................... 2-7 Conversion from BIN 32-bit to character string (DSTR)
Ladder block parallel connection (ORB) .......... 5-10 ........................................................................... 7-206
Ladder block series connection (ANB)............. 5-10 Conversion from BIN 32-bit to decimal ASCII
Linking character strings ($+)........................... 6-65 (DBINDA) ........................................................... 7-183
Contact instruction ................................................. 2-6 Conversion from BIN 32-bit to floating decimal point
Contact instructions (Double precision) (DFLTD)................................. 6-81
Operation start (LD, LDI).................................... 5-2 Conversion from BIN 32-bit to floating decimal point
Parallel connection (OR, ORI)............................ 5-2 (Single precision) (DFLT)..................................... 6-78
Pulse operation start (LDF, LDP) ................. 5-5,5-7 Conversion from BIN 32-bit to hexadecimal ASCII
Pulse parallel connection (ORF,ORP) ......... 5-5,5-7 (DBINHA) ........................................................... 7-186
Pulse serial connection (ANF, ANP) ............ 5-5,5-7 Conversion from block BCD 4-digit data to block BIN
Series connection (AND, ANI)............................ 5-2 16-bit data (BKBIN)............................................ 6-100
Conversion Conversion from block BIN 16-bit data to BCD 4-digit
BCD 4-digit to BIN (BIN) .................................. 6-75 data (BKBCD) ...................................................... 6-98
BCD 8-digit to BIN (DBIN)................................ 6-75 Conversion from character string to BIN 16-bit (VAL)
BIN 16-bit to BIN 32-bit (DBL).......................... 6-88 ........................................................................... 7-212
BIN 16-bit to floating decimal point (Double Conversion from character string to BIN 32-bit (DVAL)
precision) (FLTD) ............................................. 6-81 ........................................................................... 7-212
BIN 16-bit to floating decimal point (Single Conversion from character string to floating decimal
precision) (FLT)................................................ 6-78 point (EVAL) ...................................................... 7-224
BIN 16-bit to Gray code (GRY) ........................ 6-90 Conversion from decimal ASCII to BCD 4-digit
BIN 32-bit to BIN 16-bit (WORD) ..................... 6-89 (DABCD) ............................................................ 7-198
BIN 32-bit to floating decimal point (Double Conversion from decimal ASCII to BCD 8-digit
precision) (DFLTD)........................................... 6-81 (DDABCD) ......................................................... 7-198
BIN 32-bit to floating decimal point (Single Conversion from decimal ASCII to BIN 16-bit (DABIN)
precision) (DFLT) ............................................. 6-78 ........................................................................... 7-192
BIN 32-bit to Gray code (DGRY)...................... 6-90 Conversion from decimal ASCII to BIN 32-bit
BIN to BCD 4-digit (BCD)................................. 6-73 (DDABIN) ........................................................... 7-192
BIN to BCD 8-digit (DBCD) .............................. 6-73 Conversion from floating decimal point to character
Double precision to Single precision (EDCON) string (ESTR) ..................................................... 7-217
....................................................................... 6-104 Conversion from floating-point angle to radian (Double
Floating decimal point data to BIN 16-bit (Double precision) (RADD).............................................. 7-277
precision) (INTD).............................................. 6-86 Conversion from floating-point angle to radian (Single
Floating decimal point data to BIN 16-bit (Single precision) (RAD) ................................................ 7-275
precision) (INT) ................................................ 6-83 Conversion from floating-point radian to angle (Double
Floating decimal point data to BIN 32-bit (Single precision) (DEGD) .........................7-281,7-283,7-285
precision) (DINT).............................................. 6-83 Conversion from floating-point radian to angle (Single
Floating decimal point data to BIN32-bit (Double precision) (DEG) ................................................ 7-279
precision) (DINTD) ........................................... 6-86 Conversion from hexadecimal ASCII to BIN 16-bit
Gray code to BIN 16-bit (GBIN) ....................... 6-92 (HABIN) ............................................................. 7-195
Gray code to BIN 32-bit (DGBIN)..................... 6-92 Conversion from hexadecimal ASCII to BIN 32-bit
Single precision to Double precision (ECON) (DHABIN) ........................................................... 7-195
....................................................................... 6-102
Index - 4
Conversion from hexadecimal BIN to ASCII (ASC) Data table operation instructions ......................... 2-40
........................................................................... 7-228 DATE- (Clock data subtraction operation) ......... 7-350
Conversion of Gray code to BIN 16-bit (GBIN).... 6-92 Date comparison (DT=,DT,DT>,DT=)................ 7-356
Conversion of Gray code to BIN 32-bit (DGBIN) DATE+ (Clock data addition operation) ............. 7-348
............................................................................. 6-92 DATERD (Reading clock data) .......................... 7-344
Conversion to BIN DATEWR (Writing clock data) ........................... 7-346
BCD 4-digit to BIN 16-bit (BIN) ........................ 6-75 DB- (BCD 8-digit subtraction) .............................. 6-38
BCD 8-digit to BIN 32-bit (DBIN)...................... 6-75 DB* (BCD 8-digit multiplication)........................... 6-44
Floating decimal point data to BIN 16-bit (Double DB+ (BCD 8-digit addition) .................................. 6-38
precision) (INTD).............................................. 6-86 DB/ (BCD 8-digit division) .................................... 6-44
Floating decimal point data to BIN 16-bit (Single DBAND (32-bit dead band controls) .................. 7-324
precision) (INT) ................................................ 6-83 DBCD (Conversion from BIN to BCD 8-digit) ...... 6-73
Floating decimal point data to BIN 32-bit (Double DBCDDA (Conversion from BCD 8-digit to decimal
precision) (DINTD) ........................................... 6-86 ASCII) ................................................................ 7-189
Floating decimal point data to BIN 32-bit (Single DBIN (BCD 8-digit to BIN 16-bit conversion) ....... 6-75
precision) (DINT).............................................. 6-83 DBINDA (Conversion from BIN 32-bit to decimal
Conversion to floating decimal point (Double ASCII) ................................................................ 7-183
precision) (FLTD, DFLTD) ................................... 6-81 DBINHA (Conversion from BIN 32-bit to hexadecimal
Conversion to floating decimal point (Single precision) ASCII) ................................................................ 7-186
(FLT, DFLT)......................................................... 6-78 DBK- .................................................................... 6-63 I
COS (COS operation on floating-point data (Single DBK+ ................................................................... 6-62
precision)).......................................................... 7-254 DBL (BIN 16-bit to BIN 32-bit) ............................. 6-88
COS operation on floating-point data (Double DCML (32-bit negation transfers) ...................... 6-114
precision) (COSD) ............................................. 7-256 DDABCD (Conversion from decimal ASCII to BCD
COS operation on floating-point data (Single 8-digit)................................................................ 7-198
precision) (COS)................................................ 7-254 DDABIN (Conversion from decimal ASCII to BIN
COS-1 operation on floating-point data (Double 32-bit)................................................................. 7-192
precision) (ACOSD)........................................... 7-269 DDEC (Decrementing 32-bit BIN)........................ 6-71
COS-1 operation on floating-point data (Single Debugging and failure diagnosis instructions ...... 2-42
precision) (ACOS) ............................................. 7-267 DEC (Decrementing 16-bit BIN) .......................... 6-69
COSD (COS operation on floating-point data (Double DECO (Decoding from 8 to 256 bits) ................... 7-71
precision)).......................................................... 7-256 Decoding from 8 to 256 bits (DECO) ................... 7-71
Count 1-phase input or down (UDCNT1) .......... 6-143 Decrement
Count 2-phase input or down (UDCNT2) .......... 6-146 BIN 16-bit (DEC) .............................................. 6-69
Counters (OUT C) ............................................... 5-26 BIN 32-bit (DDEC)............................................ 6-71
Decrementing 16-bit BIN (DEC) .......................... 6-69
[D] Decrementing 32-bit BIN (DDEC)........................ 6-71
DEG (Conversion from floating-point radian to angle
D- (BIN 32-bit subtraction operations .................. 6-26
(Single precision)).............................................. 7-279
D(P).DDRD(Reading Devices to Another CPU)
DEGD (Conversion from floating-point radian to angle
........................................................................... 10-17
(Double precision)) ........................7-281,7-283,7-285
D(P).DDWR(Writing Devices to Another CPU)
Deleting data from data tables (FDEL) .............. 7-157
........................................................................... 10-13
Deletion of character string (STRDEL(P)) ......... 7-243
D* (BIN 32-bit multiplication operations).............. 6-32
DELTA (Pulse conversion of direct output).......... 5-42
D+ (BIN 32-bit addition operations) ..................... 6-26
Designating data.................................................... 3-3
D/ (BIN 32-bit division operations)....................... 6-32
Designation of modification values in index
D=, D<>, D>, D<=, D<, D>= (BIN 32-bit data
modification (IXDEV, IXSET) ............................. 7-148
comparisons) ......................................................... 6-4
Device range check ............................................. 3-27
DABCD (Conversion from decimal ASCII to BCD
DFLT (Conversion from BIN 32-bit to floating decimal
4-digit)................................................................ 7-198
point (Single precision)) ....................................... 6-78
DABIN (Conversion from decimal ASCII to BIN 16-bit)
DFLTD (Conversion from BIN 32-bit to floating
........................................................................... 7-192
decimal point (Double precision)) ........................ 6-81
DAND (Logical products with 32-bit data) ............. 7-3
DFRO (Reading 2-word data from intelligent function
Data control instructions ...................................... 2-49
modules) ............................................................ 7-160
Data conversion instruction table ........................ 2-22
DGBIN (Conversion of Gray code to BIN 16-bit)
Data conversion instructions ............................... 6-73
............................................................................. 6-92
Data dissociation in byte units (WTOB)............... 7-85
DGRY (BIN 32-bit to Gray code) ......................... 6-90
Data link instructions ........................................... 2-59
DHABIN (Conversion from hexadecimal ASCII to BIN
Data linking in byte units (BTOW) ....................... 7-85
32-bit)................................................................. 7-195
Data processing instructions ............................... 2-35
Index - 5
DI (Interrupt disable) .......................................... 6-133 [E]
Digit designation .................................................... 3-4 E- (Subtraction of floating decimal point data (Single
Digit designation of bit devices .............................. 3-4 precision)) .................................................... 6-46,6-48
DINC (Incrementing 32-bit BIN)........................... 6-71 E* (Multiplication of floating decimal point data (Single
DINT (Floating decimal point data to BIN 32-bit (Single precision)) ............................................................ 6-54
precision)) ............................................................ 6-83 E+ (Addition of floating decimal point data (Single
DINTD (Floating decimal point data to BIN 32-bit precision)) .................................................... 6-46,6-48
(Double precision)) .............................................. 6-86 E/ (Dividion of floating decimal point data (Single
Direct 1-byte read from file register (ZRRDB).... 7-391 precision)) ............................................................ 6-54
DIS (4-bit grouping of 16-bit data) ....................... 7-77 E=, E<>, E>, E<=, E<, E>= (Floationg decimal point
Display instructions.............................................. 2-41 data comparisons(Single precision)) ..................... 6-6
Dissociation of random data (NDIS) .................... 7-81 ECALL (Sub-routine calls between program files)
Division ........................................................................... 7-120
BCD 4-digit (B/) ................................................ 6-42 ECON (Single precision to Double precision
BCD 8-digit division (DB/) ................................ 6-44 conversion) ........................................................ 6-102
BIN 16-bit (/)..................................................... 6-30 ED- (Subtraction of floating decimal point data
Division of floating decimal point(Double precision) (Double precision)) ...................................... 6-50,6-52
(ED/)................................................................. 6-56 ED* (Multiplication of floating decimal point data
Division of floating decimal point(Single precision) (Double precision)) .............................................. 6-56
(E/) ................................................................... 6-54 ED+ (Addition of floating decimal point data (Double
DLIMIT (Upper and lower limit controls for BIN 32-bit) precision)) .................................................... 6-50,6-52
........................................................................... 7-321 ED/ (Dividion of floating decimal point data (Double
DMAX (Maximum value search for 32-bit data)... 7-89 precision)) ............................................................ 6-56
DMEAN(P) ......................................................... 7-103 ED=,ED<>,ED>,ED<=,ED<,ED>= (Floationg decimal
DMIN (Minimum value search for 32-bit data) ..... 7-92 point data comparisons (Double precision)) .......... 6-8
DMOV (32-bit transfers) .................................... 6-106 EDCON (Double precision to Single precision
DNEG (Complement of 2 of BIN 32-bit data) ...... 6-94 conversion) ........................................................ 6-104
DOR (Logical sums of 32-bit data) ...................... 7-11 EDMOV (Floating-point data transfer (Double
Double precision to Single precision conversion precision)) .......................................................... 6-110
(EDCON) ........................................................... 6-104 EDNEG (Floating-point sign invertion (Double
Double word data .................................................. 3-6 precision)) ............................................................ 6-97
DRCL (Left rotation of 32-bit data) ...................... 7-44 EFCALL (Output OFF calls between program files)
DRCR (Right rotation of 32-bit data) ................... 7-41 ........................................................................... 7-125
DROL (Left rotation of 32-bit data) ...................... 7-44 EGF (Pulse operation results / leading edge) ...... 5-18
DROR (Right rotation of 32-bit data) ................... 7-41 EGP (Pulse operation results / trailing edge)....... 5-18
DSCL(P) ............................................................ 7-331 EI (Interrupt enable) ........................................... 6-133
DSCL2(P) .......................................................... 7-335 EMOD (Floating decimal point to BCD) ............. 7-245
DSER (32-bit data searches)............................... 7-66 EMOV (Floating-point data transfer (Single precision))
DSFL (1-word shift to left of n-word data).... 7-54,7-56 ........................................................................... 6-108
DSFR (1-word shift to right of n-word data) ENCO (Encoding from 256 to 8 bits) ................... 7-73
..................................................................... 7-54,7-56 Encoding from 256 to 8 bits (ENCO) ................... 7-73
DSORT (BIN 32-bit data sort).............................. 7-95 END (End sequence program) ............................ 5-53
DSTR (Conversion from BIN 32-bit to character string) End main routine program (FEND) ...................... 5-51
........................................................................... 7-206 End sequence program (END) ............................ 5-53
DSUM (32-bit data checks) ................................. 7-69 ENEG (Floating-point sign invertion(Single precision))
DTEST (Bit tests)................................................. 7-61 ............................................................................. 6-96
DTO (Writing 2-word data to intelligent function EREXP (From BCD format data to floating decimal
modules) ............................................................ 7-163 point).................................................................. 7-248
DUTY (Timing pulse generation) ....................... 7-388 Error display and annunciator reset instruction (LEDR)
DVAL (Conversion from character string to BIN 32-bit) ........................................................................... 7-172
........................................................................... 7-212 ESTR (Conversion from floating decimal point to
DWSUM (Calculation of totals for 32-bit data) character string) ................................................. 7-217
................................................................. 7-101,7-103 EVAL (Conversion from character string to floating
DXCH (16-bit data exchanges).......................... 6-124 decimal point) .................................................... 7-217
DXNR (32-bit data exclusive NOR operation) ..... 7-27 EXP (Exponent operation on floating-point data
DXOR (32-bit exclusive OR operations) .............. 7-19 (Single precision)) .............................................. 7-291
DZONE (Zone control for BIN 32-bit data) Expansion clock data addition operation (S.DATE+)
....................................................... 7-327,7-330,7-334 ........................................................................... 7-366
Index - 6
Expansion clock data subtraction operation (S.DATE-) From BCD format data to floating decimal point
........................................................................... 7-366 (EREXP) ............................................................ 7-248
EXPD (Exponent operation on floating-point data
(Double precision)) ............................................ 7-294 [G]
Exponent operation on floating-point data (Double
GBIN (Conversion of Gray code to BIN 16-bit).... 6-92
precision) (EXPD).............................................. 7-294
GOEND (Jump to END)..................................... 6-132
Exponent operation on floating-point data (Single
GRY (BIN 16-bit to Gray code) ............................ 6-90
precision) (EXP) ................................................ 7-291
Exponentiation operation on floating-point data
(Single precision) (POW(P)) .............................. 7-283 [H]
Exponentiation operation on floating-point data HABIN (Conversion from hexadecimal ASCII to BIN
(Single precision) (POWD(P)) ........................... 7-285 16-bit)................................................................. 7-195
Extracting character string data from the left (LEFT) HEX (Conversion from ASCII to hexadecimal BIN)
........................................................................... 7-232 ........................................................................... 7-230
Extracting character string data from the right (RIGHT) High speed retentive timer (OUTH ST)................ 5-22
........................................................................... 7-232 High speed timer (OUTH T)................................. 5-22
High-speed block transfer of file register (RBMOV)
[F] ........................................................................... 7-448
HOUR (Time data conversion) .......................... 7-354
FCALL (Subroutine program output OFF calls)
........................................................................... 7-116
How to read instruction tables ............................... 2-4 I
How to read instructions ........................................ 4-2
FDEL (Deleting data from data tables) .............. 7-157
FEND (End main routine program)...................... 5-51
FF (Bit device output reverse) ............................. 5-40 [I]
FIFR (Reading oldest data from data tables) .... 7-153 I/O refrech (RFS) ............................................... 6-141
FIFW (Writing data to the data tables)............... 7-151 I/O refresh instruction table.................................. 2-27
File register direct 1-byte write (ZRWRB).......... 7-393 Identical 32-bit data block transfers (DFMOV(P))
File setting for comments (QCDSET) ................ 7-342 ........................................................................... 6-122
FINS (Inserting data in data tables)................... 7-157 IMASK (Interrupt program mask)....................... 6-133
Fixed cycle pulse output (PLSY) ....................... 6-162 INC (Incrementing 16-bit BIN) ............................. 6-69
Floating decimal point data comparisons (Double Increment
precision) (ED=, ED<>, ED>, ED<=, ED<, ED>=) BIN 16-bit (INC)................................................ 6-69
............................................................................... 6-8 BIN 32-bit (DINC) ............................................. 6-71
Floating decimal point data comparisons (Single Incrementing 16-bit BIN (INC) ............................. 6-69
precision) (E=, E<>, E>, E<=, E<, E>=) ................ 6-6 Incrementing 32-bit BIN (DINC)........................... 6-71
Floating decimal point to BCD (EMOD)............. 7-245 Index modification................................................ 3-12
Floating-point data transfer (Double precision) Indirect address read (ADRSET) ....................... 7-395
(EDMOV) ........................................................... 6-110 Indirect specification ............................................ 3-23
Floating-point data transfer (Single precision) (EMOV) Inserting data in data tables (FINS) ................... 7-157
........................................................................... 6-108 Insertion of character string (STRINS(P)).......... 7-241
Floating-point sign invertion (Double precision) INSTR (Character string search) ...7-239,7-241,7-243
(EDNEG) ............................................................. 6-97 Instructions for data link....................................... 2-59
Floating-point sign invertion (Single precision) (ENEG) INT (Floating decimal point data to BIN 16-bit (Single
............................................................................. 6-96 precision)) ............................................................ 6-83
FLT (Conversion from BIN 16-bit to floating decimal INTD (Floating decimal point data to BIN 16-bit
point (Single precision))....................................... 6-78 (Double precision)) .............................................. 6-86
FLTD (Conversion from BIN 16-bit to floating decimal Interrupt disable (DI) .......................................... 6-133
point (Double precision)) ..................................... 6-81 Interrupt enable (EI)........................................... 6-133
FMOV (16-bit data block transfers) ......... 6-120,6-122 Interrupt program mask (IMASK)....................... 6-133
FOR (FOR to NEXT) ......................................... 7-105 INV (Operation results inversion)......................... 5-15
FOR to NEXT (FOR, NEXT).............................. 7-105 Inversion
Forced end of FOR to NEXT instruction loop (BREAK) Bit device output reverse (FF).......................... 5-40
........................................................................... 7-108 Operation results inversion (INV) ..................... 5-15
FPOP (Reading newest data from data tables) IRET (Recovery from interrupt programs) ......... 6-139
........................................................................... 7-155 IX, IXEND (Index modification of entire ladder)
FROM (Reading from other CPU shared memory) ........................................................................... 7-144
............................................................................. 9-12 IXDEV (Designation of modification values in index
FROM (Reding 1-word data from intelligent function modification) ...................................................... 7-148
modules)............................................................ 7-160 IXSET (Designation of modification values in index
modification) ...................................................... 7-148
Index - 7
[J] [M]
JMP (Pointer branch)......................................... 6-129 Master control instructions ................................... 5-47
Jump to END (GOEND)..................................... 6-132 Matrix input (MTR) ............................................. 6-166
MAX (Maximum value search for 16-bit data) ..... 7-89
[K] Maximum value search for 16-bit data (MAX) ..... 7-89
Maximum value search for 32-bit data (DMAX) ... 7-89
KEY (Numerical key input from keyboard)......... 7-396
MC (Setting the master control) ........................... 5-47
MCR (Resetting the master control) .................... 5-47
[L] MEAN(P)............................................................ 7-103
Ladder block parallel connections (ORB) ............ 5-10 MEF (Pulse operation results / trailing edge)....... 5-17
Ladder block series connections (ANB) .............. 5-10 MEP (Pulse operation results / leading edge) ..... 5-17
LD ($=, $<>, $>, $<=, $<, $>=) (Character string data MIDR (Random selection from character strings)
comparisons) ....................................................... 6-11 ........................................................................... 7-235
LD (=, <>, >, <=, <, >=) (BIN 16-bit data comparisons) MIDW (Random replacement in character strings)
............................................................................... 6-2 ........................................................................... 7-235
LD (A contact operation start)................................ 5-2 MIN (Minimum value search for 16-bit data)........ 7-92
LD (D=, D<>, D>, D<=, D<, D>=) (BIN 32-bit data Minimum value search for 16-bit data (MIN)........ 7-92
comparisons) ......................................................... 6-4 Minimum value search for 32-bit data (DMIN) ..... 7-92
LD (E=, E<>, E>, E<=, E<, E>=) (Floationg decimal MOV (16-bit transfers) ....................................... 6-106
point data comparisons(Single precision)) ............ 6-6 MPP (Operation results pop) ............................... 5-12
LD (ED=, ED, ED>, ED<=, ED<, ED>=) (Floationg MPS (Operation results push) ............................. 5-12
decimal point data comparisons(Double precision)) MRD (Operation results read).............................. 5-12
............................................................................... 6-8 MTR (Matrix input) ............................................. 6-166
LDF (Pulse operation start / trailing edge) ....... 5-5,5-7 Multiplication
LDI (B contact operation start)............................... 5-2 BCD 4-digit (B*)................................................ 6-42
LDP (Pulse operation start / leading edge)...... 5-5,5-7 BCD 8-digit (DB*) ............................................. 6-44
LDPI, LDFI ............................................................. 5-7 BIN 16-bit (*) .................................................... 6-30
Leading edge output (PLS).................................. 5-37 BIN 32-bit (D*) .................................................. 6-32
LEDR (Error display and annunciator reset instruction) Multiplication of floating decimal point (Double
........................................................................... 7-172 precision) (ED*) ................................................ 6-56
LEFT (Extracting character string data from the left) Multiplication of floating decimal point (Single
........................................................................... 7-232 precision) (E*) .................................................. 6-54
Left rotation of 16-bit data (ROL, RCL)................ 7-38 Multiplication and division of floating decimal point
Left rotation of 32-bit data (DROL, DRCL) .......... 7-44 (Double precision)(ED*, ED/) ............................... 6-56
LEN (Character string length detection) ............ 7-204 Multiplication and division of floating decimal point
LIMIT (Upper and lower limit controls for BIN 16-bit) (Single precision)(E*, E/) ..................................... 6-54
........................................................................... 7-321
Link refresh instructions....................................... 2-59 [N]
Linking character strings ($+) ...................... 6-65,6-67
Natural logarithm operation on floating-point data
Linking of random data (NUNI) ............................ 7-81
(Double precision) (LOGD) ................................ 7-298
Load (LD)............................................................... 5-2
Natural logarithm operation on floating-point data
Load + unload (PSWAPP) ................................. 7-445
(Single precision) (LOG) .......................... 7-296,7-302
Load inverse (LDI) ................................................. 5-2
n-bit shift to left of 16-bit data (SFL) .................... 7-46
Load program from Memory Card (PLOADP) ... 7-440
n-bit shift to right of 16-bit data (SFR).................. 7-46
LOG (Natural logarithm operation on floating-point
n-bit shift to right or left of n-bit data (SFTBR(P),
data (Single precision))............................ 7-296,7-302
SFTBL(P))............................................................ 7-51
LOGD (Natural logarithm operation on floating-point
n-bit shift to right or left of n-word data (SFTWR(P),
data (Double precision)) .................................... 7-298
SFTWL(P))........................................................... 7-56
Logical operation instructions .............................. 2-29
NEG (complement of 2 of BIN 16-bit data) .......... 6-94
Logical product ...................................................... 7-2
Network refresh instruction (ZCOM) ...................... 8-2
Logical products with 16-bit data (WAND)............. 7-3
NEXT (FOR to NEXT)........................................ 7-105
Logical products with 32-bit data (DAND) ............. 7-3
No operation (NOP, NOPLF, PAGE) ................... 5-57
Logical sum ........................................................... 7-2
NOP ..................................................................... 5-57
Logical sums of 16-bit data (WOR) ..................... 7-11
NOP (No operation) ............................................. 5-57
Logical sums of 32-bit data (DOR) ...................... 7-11
NOPLF (No operation page change) ................... 5-57
Low speed retentive timer (OUTH ST) ................ 5-22
Number of steps .................................................. 3-34
Low speed timer (OUT T) .................................... 5-22
Numerical key input (KEY)................................. 7-396
Numerical key input from keyboard (KEY)......... 7-396
NUNI (Linking of random data) ............................ 7-81
Index - 8
[O] PLOW (Program low speed execution registration)
Operation errors .................................................. 3-27 ........................................................................... 7-382
Operation results inversion (INV) ........................ 5-15 PLS (Leading edge output).................................. 5-37
Operation results pop (MPP) ............................... 5-12 PLSY (Fixed cycle pulse output)........................ 6-162
Operation results push (MPS) ............................. 5-12 POFF (Program output OFF standby instruction)
Operation results read (MRD) ............................. 5-12 ........................................................................... 7-378
Operation start (LD, LDI) ....................................... 5-2 Pointer branching instruction (CJ, SCJ, JMP) ... 6-129
OR ($=, $<>, $>, $<=, $<, $>=) (Character string data Pop (MPP) ........................................................... 5-12
comparisons) ....................................................... 6-11 PR (Print ASCII code instruction) ...................... 7-166
OR (=, <>, >, <=, <, >=) (BIN 16-bit data comparisons) PRC (Print comment instruction) ....................... 7-169
............................................................................... 6-2 Print ASCII code instruction (PR) ...................... 7-166
OR (A contact parallel connection)........................ 5-2 Print comment instruction (PRC) ....................... 7-169
OR (D=, D<>, D>, D<=, D<, D>=) (BIN 32-bit data Program branch instruction table......................... 2-27
comparisons) ......................................................... 6-4 Program control instructions ................................ 2-56
OR (E=, E<>, E>, E<=, E<, E>=) (Floationg decimal Program execution control instruction table......... 2-27
point data comparisons (Single precision)) ........... 6-6 Program low speed execition registration instruction
OR (ED=, ED<>, ED>, ED<=, ED<, ED>=) (Floationg (PCHK) .............................................................. 7-384
decimal point data comparisons (Double precision)) Program low speed execution registration (PLOW)
............................................................................... 6-8 ........................................................................... 7-382
Or inverse (ORI) .................................................... 5-2 Program output OFF standby instruction (POFF) I
ORB (Ladder block parallel connections) ............ 5-10 ........................................................................... 7-378
ORF (Pulse parallel connection / trailing edge) Program scan execution registration instruction
......................................................................... 5-5,5-7 (PSCAN) ............................................................ 7-380
ORI (B contact parallel connection)....................... 5-2 Program standby instruction (PSTOP) .............. 7-377
ORP (Pulse parallel connection / leading edge) PSCAN (Program scan execution registration
......................................................................... 5-5,5-7 instruction) ......................................................... 7-380
ORPI, ORFI ........................................................... 5-8 PSTOP (Program standby instruction) .............. 7-377
Other convenient instructions ................................ 2-6 PSWAPP (Load + unload) ................................. 7-445
Other instructions ................................................ 5-55 Pulse conversion
Application instructions .................................... 2-29 (DELTA) ........................................................... 5-42
Sequence instructions........................................ 2-6 (EGF, EGP)...................................................... 5-18
OUT (MEF, MEP) ..................................................... 5-17
Annunciator output (OUT F)............................. 5-28 Pulse conversion of direct output (DELTA).......... 5-42
Counters (OUT C)............................................ 5-26 Pulse density measurement (SPD).................... 6-160
High speed retentive timer (OUTH ST)............ 5-22 Pulse NOT operation start, pulse NOT series
High speed timer (OUTH T) ............................. 5-22 connection, pulse NOT parallel connection LDPI,LDFI,
Low speed retentive timer (OUT ST) ............... 5-22 ANDPI,ANDFI,ORPI,ORFI) ................................... 5-7
Low speed timer (OUT T) ................................ 5-22 Pulse operation results
Output (OUT) ................................................... 5-20 Operation result conversions (MEF, MEP)....... 5-17
Out instructions (OUT)......................................... 5-20 Pulse conversions of edge relay operation results
Output instruction table.......................................... 2-8 (EGF, EGP)...................................................... 5-18
Output instructions (OUT).................................... 5-20 Pulse operation start (LDF, LDP)..................... 5-5,5-7
Output of sub-routine program OFF calls (FCALL) Pulse parallel connection (ORF, ORP) ............ 5-5,5-7
........................................................................... 7-116 Pulse series connection (ANDF, ANDP)................ 5-5
Output OFF calls between program files (EFCALL) Pulse width modulation (PWM).......................... 6-164
........................................................................... 7-125 PUNLOADP (Unload program from program memory)
Output reverse (FF) ............................................. 5-40 ........................................................................... 7-443
Push (MPS) ......................................................... 5-12
PWM (Pulse width modulation).......................... 6-164
[P]
PAGE (No operation page change)..................... 5-57
[Q]
Page change (NOPLF) ........................................ 5-57
Page change (PAGE n) ....................................... 5-57 QCDSET (File setting for comments) ................ 7-342
Parallel connection (OR, ORI) ............................... 5-2 QCPU dedicated instructions............................... 2-60
Parallel connections (ORB) ................................. 5-10 QDRSET(Setting files for file register use) ........ 7-339
PCHK (Program low speed execution registeration
instruction) ......................................................... 7-384 [R]
PLF (Trailing edge output)................................... 5-37 RAD (Conversion from floating-point angle to radian
PLOADP (Load program from Memory Card) ... 7-440 (Single precision)).............................................. 7-275
Index - 9
RADD (Conversion from floating-point angle to radian ROTC (Rotary table shortest direction control)
(Double precision)) ............................................ 7-277 ........................................................................... 6-154
RAMP (Ramp signal) ......................................... 6-157 RSET (Switching file register numbers) ............. 7-337
Ramp signal (RAMP) ......................................... 6-157 RST
Random number generation (RND/SRND)........ 7-304 Resetting devices (RST) .................................. 5-32
Random selection from and replacement in character Resetting the annunciators (RST F)................. 5-35
strings (MIDR) ................................................... 7-235 RTREAD (Reading routing information) ................ 8-6
Random selection replacement in character strings RTWRITE (Writing routing information) ................. 8-8
(MIDW) .............................................................. 7-235
RBMOV (High-speed block transfer of file register) [S]
........................................................................... 7-448
S.DATE- (Expansion clock data subtraction operation)
RCL (Left rotation of 16-bit data) ......................... 7-38
........................................................................... 7-366
RCR (Right rotation of 16-bit data) ...................... 7-35
S.DATE+ (Expansion clock data addition operation)
Read (MRD) ........................................................ 5-12
........................................................................... 7-366
Read data from standard ROM (S.DEVLD)....... 7-438
S.DATERD (Reading expansion clock data) ..... 7-366
Reading 1-word data from intelligent function modules
S.DEVLD (Read data from standard ROM) ....... 7-438
(FROM).............................................................. 7-160
S.TO (Write to host CPU shared memory) ............ 9-4
Reading 2-word data from intelligent function modules
Scaling (Point-by-point coordinate data) (SCL(P),
(DFRO) .............................................................. 7-160
DSCL(P)) ........................................................... 7-330
Reading clock data (DATERD) .......................... 7-344
Scaling (Point-by-point coordinate data) (SCL2(P),
Reading data from designated file (SP.FREAD) 7-424
DSCL2(P)) ......................................................... 7-334
Reading device comment data (COMRD) ......... 7-201
SCJ (Pointer branching instruction) ................... 6-129
Reading expansion clock data (S.DATERD) ..... 7-366
SCL(P) ............................................................... 7-330
Reading from other CPU shared memory (FROM)
SCL2 .................................................................. 7-334
............................................................................. 9-12
SECOND (Time data conversion)...................... 7-352
Reading module information (UNIRD) ............... 7-402
SEG (7-segment decode) .................................... 7-75
Reading newest data from data tables (FPOP)
Sequence instructions ........................................... 2-6
........................................................................... 7-155
Sequence program stop (STOP) ......................... 5-55
Reading oldest data from data tables (FIFR) .... 7-153
SER (16-bit data searches) ................................. 7-66
Reading routing information (RTREAD) ................ 8-6
Series connection (AND, ANI) ............................... 5-2
Real number data .................................................. 3-8
Series connections (ANB).................................... 5-10
Recovery from interrupt programs (IRET) ......... 6-139
SET
Refresh instruction (COM) ................................. 7-134
Setting devices (SET) ...................................... 5-30
Related programming manuals ............................. 1-2
Setting the annunciators (SET F) ..................... 5-35
Resetting devices (RST).............................. 5-32,5-35
Setting devices (SET) .................................. 5-30,5-35
Resetting the annunciators (RST F) .................... 5-35
Setting files for file register use (QDRSET) ....... 7-339
Resetting the master control (MCR) .................... 5-47
Setting the annunciators (SET F) ........................ 5-35
Resetting watchdog timer (WDT) ...................... 7-386
Setting the master control (MC) ........................... 5-47
RET (Return from sub-routine programs) .......... 7-115
SFL (n-bit shift to left of 16-bit data) .................... 7-46
Return from sub-routine programs (RET) .......... 7-115
SFR (n-bit shift to right of 16-bit data).................. 7-46
Revercing
SFT (Bit device shifts).......................................... 5-44
Bit device output reverse (FF).......................... 5-40
SFTBL(P) ............................................................. 7-52
Floating-point sign invertion (Double precision)
SFTBR(P) ............................................................ 7-51
(EDNEG) .......................................................... 6-97
SFTWL(P) ............................................................ 7-57
Floating-point sign invertion (Single precision)
SFTWR(P) ........................................................... 7-56
(ENEG)............................................................. 6-96
Shift instruction ............................................ 5-44,7-46
Operation results inversion (INV) ..................... 5-15
(Application instructions) .................................. 2-29
RFS (I/O refresh) ............................................... 6-141
Shift instruction table
RIGHT (Extracting character string data from the right)
(Sequence instructions) ..................................... 2-6
........................................................................... 7-232
SIN (SIN operation on floating-point data (Single
Right rotation of 16-bit data (ROR, RCR) ............ 7-35
precision)) .......................................................... 7-250
Right rotation of 32-bit data (DROR, DRCL)........ 7-41
SIN operation on floating-point data (Double
RND (Random number generation and series update)
precision) (SIND) ............................................... 7-252
........................................................................... 7-304
SIN operation on floating-point data (Single precision)
ROL (Left rotation of 16-bit data) ......................... 7-38
(SIN) .................................................................. 7-250
ROR (Right rotation of 16-bit data) ...................... 7-35
SIN-1 operation on floating-point data (Double
Rotary table shortest direction control (ROTC)
precision) (ASIND) ............................................. 7-265
........................................................................... 6-154
SIN-1 operation on floating-point data (Single
Rotation instructions ............................................ 2-32
precision) (ASIN) ............................................... 7-262
Index - 10
SIND (SIN operation on floating-point data (Double TAN-1 operation on floating-point data (Double
precision)).......................................................... 7-252 precision)(ATAND)............................................. 7-273
Single precision to Double precision conversion TAN-1 operation on floating-point data (Single
(ECON).............................................................. 6-102 precision)(ATAN) ............................................... 7-271
SORT (BIN 16-bit data sort) ................................ 7-95 TAND (TAN operation on floating-point data (Double
SP.CONTSW (System switching instruction) ...... 11-2 precision)) .......................................................... 7-260
SP.DEVST (Writing data to standard ROM)...... 7-436 Teaching timer (TTMR)...................................... 6-149
SP.FREAD (Reading data from designated file) Termination instruction table.................................. 2-9
........................................................................... 7-424 TEST (Bit tests) ................................................... 7-61
SP.FWRITE (Writing data to designated file) .... 7-413 TIMCHK (Time check instruction)...................... 7-390
SPD (Pulse density measurement) ................... 6-160 Time check instruction (TIMCHK)...................... 7-390
Special format failure checks (CHKST, CHK) ... 7-175 Time data conversion (HOUR) ......7-354,7-356,7-361
Special function instructions ................................ 2-46 Time data conversion (SECOND)...................... 7-352
Special timer (STMR) ........................................ 6-151 Timer (OUT T) ..................................................... 5-22
SQR (Square root operation for floating-point data Timing pulse generation (DUTY) ....................... 7-388
(Single precision)).............................................. 7-287 TO (Writing 1-word data to intelligent function
SQRD (Square root operation for floating-point data modules) ............................................................ 7-163
(Double precision)) ............................................ 7-289 TRACE (Trace set) ............................................ 7-411
Square root operation for floating-point data (Double TRACER (Trace reset) ...................................... 7-411
precision) (SQRD) ............................................. 7-289 TTMR (Teaching timer)...................................... 6-149 I
Square root operation for floating-point data (Single Types of Instructions.............................................. 2-2
precision) (SQR)................................................ 7-287
SRND (Random number generation and series [U]
updates)............................................................. 7-304
UDCNT1 (Counter 1-phase input up or down) .. 6-143
STMR (Special function timer)........................... 6-151
UDCNT2 (Counter 2-phase input up or down) .. 6-146
STOP (Sequence program stop) ......................... 5-55
UNI (4-bit linking of 16-bit data) ........................... 7-79
STR (Conversion from BIN 16-bit to character string)
UNIRD (Reading module information) ............... 7-402
........................................................................... 7-206
Unload program from program memory (PUNLOADP)
Structure creation instructions ............................. 2-38
........................................................................... 7-443
Subrotine program calls (CALL) ........................ 7-110
Up / Down counter
Subroutine calls (XCALL) .................................. 7-129
Count 1-phase input or dawn (UDCNT1) ....... 6-143
Subroutine calls between program files (ECALL)
Count 2-phase input or down (UDCNT2) ....... 6-146
........................................................................... 7-120
Upper and lower byte exchanges (SWAP) ........ 6-128
Subroutine program output OFF calls (FCALL)
Upper and lower limit controls for BIN 32-bit (DLIMIT)
........................................................................... 7-116
........................................................................... 7-321
Subset processing ............................................... 3-25
Subtraction
BCD 4-digit subtraction (B-) ............................. 6-34 [V]
BCD 8-digit subtraction (DB-) .......................... 6-38 VAL (Conversion from character string to BIN 16-bit)
BIN 16-bit subtraction operations (-) ................ 6-22 ........................................................................... 7-212
BIN 32-bit subtraction operations (D-) ............. 6-26
Block subtraction (BK-) ............................ 6-59,6-62 [W]
Subtraction of floating decimal point data (Double WAND (Logical products with 16-bit data)............. 7-3
precision) (ED-)........................................ 6-50,6-52 WDT (Resetting watchdog timer)....................... 7-386
Subtraction of floating decimal point data (Single WOR (Logical sums of 16-bit data)...................... 7-11
precision) (E-) .......................................... 6-46,6-48 WORD (Conversion from BIN 32-bit to BIN 16-bit)
SUM (16-bit data checks) .................................... 7-69 ............................................................................. 6-89
SWAP (Upper and lower byte exchanges) ........ 6-128 Word data .............................................................. 3-4
Switching file register numbers (RSET)............. 7-337 Word device bit designation................................... 3-3
Switching instructions .......................................... 2-51 Writing 1-word data to intelligent function modules
System Switching (SP.CONTSW) ....................... 11-2 (TO) ................................................................... 7-163
Writing 2-word data to intelligent function modules
[T] (DTO)................................................................. 7-163
TAN (TAN operation on floating-point data (Single Writing clock data (DATEWR) ........................... 7-346
precision)).......................................................... 7-258 Writing data to designated file (SP.FWRITE) .... 7-413
TAN operation on floating-point data (Double Writing data to standard ROM (SP.DEVST) ...... 7-436
precision)(TAND)............................................... 7-260 Writing data to the data tables (FIFW)............... 7-151
TAN operation on floating-point data (Single Writing routing information (RTWRITE) ................. 8-8
precision)(TAN) ................................................. 7-258 Writing to the CPU shared memory of host CPU... 9-2
Index - 11
S.TO................................................................... 9-4
TO ...................................................................... 9-7
WSUM (Calculation of totals for 16-bit data) ....... 7-99
WTOB (Data dissociation in byte units) ............... 7-85
WXNR (16-bit data exclusive NOR operation)..... 7-27
WXNR (16-bit data non-exclusive logical sum
operations)........................................................... 7-30
WXOR (16-bit exclusive OR operations) ..... 7-19,7-22
[X]
XCALL (Subroutine program call)...................... 7-129
XCH (32-bit data exchange) .............................. 6-124
[Z]
ZCOM (Network refresh instruction) ...................... 8-2
ZONE (Zone control for BIN 16-bit)
....................................................... 7-327,7-330,7-334
Zone control for BIN 16-bit (ZONE)
....................................................... 7-327,7-330,7-334
Zone control for BIN 32-bit data (DZONE)
....................................................... 7-327,7-330,7-334
ZPOP (Batch recovery of index register) ........... 7-400
ZPUSH (Batch save of index register)............... 7-400
ZRRDB (Direct 1-byte read from file register).... 7-391
ZRWRB (File register direct 1-byte write) .......... 7-393
Index - 12
Warranty
Please confirm the following product warranty details before using this product.
1. Gratis Warranty Term and Gratis Warranty Range
If any faults or defects (hereinafter "Failure") found to be the responsibility of Mitsubishi occurs during use of the
product within the gratis warranty term, the product shall be repaired at no cost via the sales representative or
Mitsubishi Service Company.
However, if repairs are required onsite at domestic or overseas location, expenses to send an engineer will be
solely at the customer's discretion. Mitsubishi shall not be held responsible for any re-commissioning,
maintenance, or testing on-site that involves replacement of the failed module.
[Gratis Warranty Term]
The gratis warranty term of the product shall be for one year after the date of purchase or delivery to a designated
place.
Note that after manufacture and shipment from Mitsubishi, the maximum distribution period shall be six (6) months,
and the longest gratis warranty term after manufacturing shall be eighteen (18) months. The gratis warranty term of
repair parts shall not exceed the gratis warranty term before repairs.
[Gratis Warranty Range]
(1) The range shall be limited to normal use within the usage state, usage methods and usage environment, etc.,
which follow the conditions and precautions, etc., given in the instruction manual, user's manual and caution
labels on the product.
(2) Even within the gratis warranty term, repairs shall be charged for in the following cases.
1. Failure occurring from inappropriate storage or handling, carelessness or negligence by the user. Failure
caused by the user's hardware or software design.
2. Failure caused by unapproved modifications, etc., to the product by the user.
3. When the Mitsubishi product is assembled into a user's device, Failure that could have been avoided if
functions or structures, judged as necessary in the legal safety measures the user's device is subject to or
as necessary by industry standards, had been provided.
4. Failure that could have been avoided if consumable parts (battery, backlight, fuse, etc.) designated in the
instruction manual had been correctly serviced or replaced.
5. Failure caused by external irresistible forces such as fires or abnormal voltages, and Failure caused by force
majeure such as earthquakes, lightning, wind and water damage.
6. Failure caused by reasons unpredictable by scientific technology standards at time of shipment from
Mitsubishi.
7. Any other failure found not to be the responsibility of Mitsubishi or that admitted not to be so by the user.
2. Onerous repair term after discontinuation of production
(1) Mitsubishi shall accept onerous product repairs for seven (7) years after production of the product is
discontinued.
Discontinuation of production shall be notified with Mitsubishi Technical Bulletins, etc.
(2) Product supply (including repair parts) is not available after production is discontinued.
3. Overseas service
Overseas, repairs shall be accepted by Mitsubishi's local overseas FA Center. Note that the repair conditions at
each FA Center may differ.
4. Exclusion of loss in opportunity and secondary loss from warranty liability
Regardless of the gratis warranty term, Mitsubishi shall not be liable for compensation of damages caused by any
cause found not to be the responsibility of Mitsubishi, loss in opportunity, lost profits incurred to the user by Failures
of Mitsubishi products, special damages and secondary damages whether foreseeable or not , compensation for
accidents, and compensation for damages to products other than Mitsubishi products, replacement by the user,
maintenance of on-site equipment, start-up test run and other tasks.
5. Changes in product specifications
The specifications given in the catalogs, manuals or technical documents are subject to change without prior notice.
6. Product application
(1) In using the Mitsubishi MELSEC programmable controller, the usage conditions shall be that the application will
not lead to a major accident even if any problem or fault should occur in the programmable controller device,
and that backup and fail-safe functions are systematically provided outside of the device for any problem or
fault.
(2) The Mitsubishi programmable controller has been designed and manufactured for applications in general
industries, etc. Thus, applications in which the public could be affected such as in nuclear power plants and
other power plants operated by respective power companies, and applications in which a special quality
assurance system is required, such as for Railway companies or Public service purposes shall be excluded
from the programmable controller applications.
In addition, applications in which human life or property that could be greatly affected, such as in aircraft,
medical applications, incineration and fuel devices, manned transportation, equipment for recreation and
amusement, and safety devices, shall also be excluded from the programmable controller range of
applications.
However, in certain cases, some applications may be possible, providing the user consults their local
Mitsubishi representative outlining the special requirements of the project, and providing that all parties
concerned agree to the special circumstances, solely at the users discretion.
Microsoft, Windows, Windows NT are registered trademarks of Microsoft Corporation in the United States and other
countries.
Pentium and Celeron are trademarks of Intel Corporation in the United States and other countries.
Ethernet is a trademark of Xerox Co., Ltd. in the United States.
CompactFlash is a trademark of SanDisk Corporation.
VxWorks, Tornado, WindPower, WindSh and WindView are registered trademarks of Wind River Systems, Inc.
Other company names and product names used in this document are trademarks or registered trademarks of respective
owners.
SH(NA)-080809ENG-C 1/2
SAFETY PRECAUTIONS
(Always read these cautions before using the product)
Before using this product, please read this manual and the related manuals introduced in this manual, and pay
full attention to safety to handle the product correctly.
Please store this manual in a safe place and make it accessible when required. Always forward a copy of the
manual to the end user.
A-1
REVISIONS
*The manual number is given on the bottom left of the back cover.
Jul., 2009 SH (NA)-080809ENG-C Revision because of function support by the Universal model QCPU having a
serial number "11043" or later
Partial corrections
Section 2.1, 2.5.6, 2.5.18, 2.5.20, 7.6.9, 7.12.7, 7.12.11, 12.1.3, 12.1.4, APPENDIX 1.2, 1.3, 1.4.2,
3, 5.1
Additions
Section 2.5.16, 7.16, 7.18.10
Modification
Section 2.5.21 2.5.22, Section 2.5.22 2.5.21, Section 9.13 7.6.10,
Section 9.14 7.6.1, Section 9.15 7.16, Section 9.15.1 7.16.1, Section 9.15.2 7.16.2,
Section 9.15.3 7.16.3, Section 9.1 7.18.9, Section 9.2 7.18.11, Section 9.3 7.18.12,
Section 9.4 7.18.13, Section 9.5 7.18.14, Section 9.6 7.18.15, Section 9.7 7.18.16,
Section 9.8 7.18.17, Section 9.9 7.18.18, Section 9.10 7.18.19, Section 9.11 9.1,
Section 9.11.1 9.1.1, Section 9.11.2 9.1.2, Section 9.12 9.2, Section 9.12.1 9.2.1,
Chapter 10 11, Chapter 11 10
This manual confers no industrial property rights or any rights of any other kind, nor does it confer any patent licenses.
Mitsubishi Electric Corporation cannot be held responsible for any problems involving industrial property rights which may
occur as a result of using the contents noted in this manual.
© 2008 MITSUBISHI ELECTRIC CORPORATION
A-2
INTRODUCTION
This manual explains the common instructions required for programming of the QCPU.
• The common instructions refer to all instructions except those dedicated to special function
modules (such as AJ71QC24 and AJ71PT32-S3) and to AD57 models, as well as PID control instructions, SFC
instructions and ST instructions.
Before using this product, please read this manual and the relevant manuals carefully and develop familiarity with
the functions and performance of the Q series programmable controller to handle the product correctly.
A-3
CONTENTS
SAFETY PRECAUTIONS ..................................................................................................................A - 1
REVISIONS .......................................................................................................................................A - 2
INTRODUCTION ...............................................................................................................................A - 3
CONTENTS .......................................................................................................................................A - 4
MANUALS........................................................................................................................................A - 14
1. GENERAL DESCRIPTION 1 - 1 to 1 - 8
1.1 Related Programming Manuals 1-2
1.2 Abbreviations and Generic Names 1-5
2. INSTRUCTION TABLES 2 - 1 to 2 - 62
2.1 Types of Instructions 2-2
2.2 How to Read Instruction Tables 2-4
2.3 Sequence Instructions 2-6
2.3.1 Contact instructions ...................................................................................................... 2 - 6
2.3.2 Association instructions ................................................................................................ 2 - 7
2.3.3 Output instructions........................................................................................................ 2 - 8
2.3.4 Shift instructions ........................................................................................................... 2 - 8
2.3.5 Master control instructions............................................................................................ 2 - 9
2.3.6 Termination instructions ............................................................................................... 2 - 9
2.3.7 Other instructions ......................................................................................................... 2 - 9
2.4 Basic instructions 2 - 10
2.4.1 Comparison operation instructions ............................................................................. 2 - 10
2.4.2 Arithmetic operation instructions ................................................................................ 2 - 16
2.4.3 Data conversion instructions ...................................................................................... 2 - 22
2.4.4 Data transfer instructions............................................................................................ 2 - 24
2.4.5 Program branch instructions....................................................................................... 2 - 27
2.4.6 Program execution control instructions ...................................................................... 2 - 27
2.4.7 I/O refresh instructions ............................................................................................... 2 - 27
2.4.8 Other convenient instructions ..................................................................................... 2 - 28
2.5 Application Instructions 2 - 29
2.5.1 Logical operation instructions ..................................................................................... 2 - 29
2.5.2 Rotation instructions ................................................................................................... 2 - 32
2.5.3 Shift instructions ......................................................................................................... 2 - 33
2.5.4 Bit processing instructions.......................................................................................... 2 - 34
2.5.5 Data processing instructions ...................................................................................... 2 - 35
2.5.6 Structure creation instructions .................................................................................... 2 - 38
2.5.7 Data table operation instructions ................................................................................ 2 - 40
2.5.8 Buffer memory access instructions............................................................................. 2 - 41
2.5.9 Display instructions..................................................................................................... 2 - 41
2.5.10 Debugging and failure diagnosis instructions ............................................................. 2 - 42
A-4
2.5.11 Character string processing instructions .................................................................... 2 - 43
2.5.12 Special function instructions ....................................................................................... 2 - 46
2.5.13 Data control instructions ............................................................................................. 2 - 49
2.5.14 Switching instructions ................................................................................................. 2 - 51
2.5.15 Clock instructions ....................................................................................................... 2 - 52
2.5.16 Expansion clock instruction ........................................................................................ 2 - 55
2.5.17 Program control instructions....................................................................................... 2 - 56
2.5.18 Other instructions ....................................................................................................... 2 - 57
2.5.19 Instructions for Data Link............................................................................................ 2 - 59
2.5.20 Multiple CPU dedicated instruction............................................................................. 2 - 60
2.5.21 Multiple CPU high-speed transmission dedicated instruction..................................... 2 - 60
2.5.22 Redundant system instructions (For Redundant CPU) .............................................. 2 - 61
3. CONFIGURATION OF INSTRUCTIONS 3 - 1 to 3 - 48
3.1 Configuration of Instructions 3-2
3.2 Designating Data 3-3
3.2.1 Using bit data................................................................................................................ 3 - 3
3.2.2 Using word (16 bits) data.............................................................................................. 3 - 4
3.2.3 Using double word data (32 bits).................................................................................. 3 - 6
3.2.4 Using real number data ................................................................................................ 3 - 8
3.2.5 Using character string data......................................................................................... 3 - 11
3.3 Indexing 3 - 12
3.4 Indirect Specification 3 - 23
3.5 Reducing Instruction Processing Time 3 - 25
3.5.1 Subset Processing...................................................................................................... 3 - 25
3.5.2 Operation processing with standard device registers (Z)
(only Universal model QCPU) ............................................................................ 3 - 26
3.6 Cautions on Programming (Operation Errors) 3 - 27
3.7 Conditions for Execution of Instructions 3 - 33
3.8 Counting Step Number 3 - 34
3.9 Operation when the OUT, SET/RST, or PLS/PLF Instructions Use the Same Device 3 - 39
3.10 Precautions for Use of File Registers 3 - 44
5. SEQUENCE INSTRUCTIONS 5 - 1 to 5 - 60
5.1 Contact Instructions 5-2
5.1.1 Operation start, series connection, parallel connection (LD,LDI,AND,ANI,OR,ORI).... 5 - 2
5.1.2 Pulse operation start, pulse series connection, pulse parallel connection
(LDP,LDF,ANDP,ANDF,ORP,ORF) ..................................................................... 5 - 5
5.1.3 Pulse NOT operation start, pulse NOT series connection, pulse NOT parallel connection
(LDPI,LDFI,ANDPI,ANDFI,ORPI,ORFI) ............................................................... 5 - 7
5.2 Association Instructions 5 - 10
5.2.1 Ladder block series connection and parallel connection (ANB,ORB) ........................ 5 - 10
5.2.2 Operation results push,read,pop (MPS,MRD,MPP) ................................................... 5 - 12
A-5
5.2.3 Operation results inversion (INV) ............................................................................... 5 - 15
5.2.4 Operation result conversions (MEP,MEF) .................................................................. 5 - 17
5.2.5 Pulse conversions of edge relay operation results (EGP,EGF).................................. 5 - 18
5.3 Output Instructions 5 - 20
5.3.1 Out instruction (excluding timers, counters, and annunciators) (OUT)....................... 5 - 20
5.3.2 Timers (OUT T,OUTH T) ............................................................................................ 5 - 22
5.3.3 Counter (OUT C) ........................................................................................................ 5 - 26
5.3.4 Annunciator output (OUT F) ....................................................................................... 5 - 28
5.3.5 Setting devices (except for annunciators) (SET) ........................................................ 5 - 30
5.3.6 Resetting devices (except for annunciators) (RST).................................................... 5 - 32
5.3.7 Setting and resetting the annunciators (SET F,RST F) .............................................. 5 - 35
5.3.8 Leading edge and trailing edge outputs (PLS,PLF).................................................... 5 - 37
5.3.9 Bit device output reverse (FF) .................................................................................... 5 - 40
5.3.10 Pulse conversions of direct outputs (DELTA(P)) ........................................................ 5 - 42
5.4 Shift Instructions 5 - 44
5.4.1 Bit device shifts (SFT(P))............................................................................................ 5 - 44
5.5 Master Control Instructions 5 - 47
5.5.1 Setting and resetting the master control (MC,MCR)................................................... 5 - 47
5.6 Termination Instructions 5 - 51
5.6.1 End main routine program (FEND)............................................................................. 5 - 51
5.6.2 End sequence program (END) ................................................................................... 5 - 53
5.7 Other instructions 5 - 55
5.7.1 Sequence program stop (STOP) ................................................................................ 5 - 55
5.7.2 No operations (NOP,NOPLF,PAGE n) ....................................................................... 5 - 57
A-6
6.2.10 Addition and subtraction of floating decimal point data (Double precision)
(ED+(P),ED-(P)) ................................................................................................. 6 - 50
6.2.11 Multiplication and division of floating decimal point data (Single precision)
(E*(P),E/(P)) ....................................................................................................... 6 - 54
6.2.12 Multiplication and division of floating decimal point data (Double precision)
(ED*(P),ED/(P)) .................................................................................................. 6 - 56
6.2.13 Block addition and subtraction (BK+(P),BK-(P))......................................................... 6 - 59
6.2.14 BIN 32-bit data block addition and subtraction operations (DBK+(P),DBK-(P)) ........ 6 - 62
6.2.15 Linking character strings ($+(P)) ................................................................................ 6 - 65
6.2.16 Incrementing and decrementing 16-bit BIN data (INC(P),DEC(P)) ............................ 6 - 69
6.2.17 Incrementing and decrementing 32-bit BIN data (DINC(P),DDEC(P)) ....................... 6 - 71
6.3 Data conversion instructions 6 - 73
6.3.1 Conversion from BIN data to 4-digit and 8-digit BCD (BCD(P),DBCD(P)) ................. 6 - 73
6.3.2 Conversion from BCD 4-digit and 8-digit data to BIN data (BIN(P),DBIN(P)) ............ 6 - 75
6.3.3 Conversion from BIN 16 and 32-bit data to floating decimal point (Single precision)
(FLT(P),DFLT(P)) ............................................................................................... 6 - 78
6.3.4 Conversion from BIN 16 and 32-bit data to floating decimal point (Double precision)
(FLTD(P),DFLTD(P)).......................................................................................... 6 - 81
6.3.5 Conversion from floating decimal point data to BIN16- and
32-bit data (Single precision) (INT(P),DINT(P)) ................................................. 6 - 83
6.3.6 Conversion from floating decimal point data to BIN16- and
32-bit data (Double precision) (INTD(P),DINTD(P)) ........................................... 6 - 86
6.3.7 Conversion from BIN 16-bit to BIN 32-bit data (DBL(P)) ............................................ 6 - 88
6.3.8 Conversion from BIN 32-bit to BIN 16-bit data (WORD(P))........................................ 6 - 89
6.3.9 Conversion from BIN 16 and 32-bit data to Gray code (GRY(P),DGRY(P)) .............. 6 - 90
6.3.10 Conversion of Gray code to BIN 16 and 32-bit data (GBIN(P),DGBIN(P))................. 6 - 92
6.3.11 Complement of 2 of BIN 16- and 32-bit data (sign reversal) (NEG(P),DNEG(P)) ...... 6 - 94
6.3.12 Floating-point sign invertion (Single precision) (ENEG(P)) ........................................ 6 - 96
6.3.13 Floating-point sign invertion (Double precision) (EDNEG(P)) .................................... 6 - 97
6.3.14 Conversion from block BIN 16-bit data to BCD 4-digit data (BKBCD(P))................... 6 - 98
6.3.15 Conversion from block BCD 4-digit data to block BIN 16-bit data (BKBIN(P)) ......... 6 - 100
6.3.16 Single precision to Double precision conversion (ECON(P)) ................................... 6 - 102
6.3.17 Double precision to Single precision conversion (EDCON(P))................................. 6 - 104
6.4 Data Transfer Instructions 6 - 106
6.4.1 16-bit and 32-bit data transfers (MOV(P),DMOV(P))................................................ 6 - 106
6.4.2 Floating-point data transfer (Single precision) (EMOV(P)) ....................................... 6 - 108
6.4.3 Floating-point data transfer (Double precision) (EDMOV(P)) ................................... 6 - 110
6.4.4 Character string transfers ($MOV(P))....................................................................... 6 - 112
6.4.5 16-bit and 32-bit negation transfers (CML(P),DCML(P)) .......................................... 6 - 114
6.4.6 Block 16-bit data transfers (BMOV(P)) ..................................................................... 6 - 117
6.4.7 Identical 16-bit data block transfers (FMOV(P)) ....................................................... 6 - 120
6.4.8 Identical 32-bit data block transfers (DFMOV(P))..................................................... 6 - 122
6.4.9 16-bit and 32-bit data exchanges (XCH(P),DXCH(P)) ............................................. 6 - 124
6.4.10 Block 16-bit data exchanges (BXCH(P)) .................................................................. 6 - 126
6.4.11 Upper and lower byte exchanges (SWAP(P)) .......................................................... 6 - 128
6.5 Program Branch Instructions 6 - 129
6.5.1 Pointer branch instructions (CJ,SCJ,JMP) ............................................................... 6 - 129
6.5.2 Jump to END (GOEND)............................................................................................ 6 - 132
A-7
6.6 Program Execution Control Instructions 6 - 133
6.6.1 Interrupt disable/enable instructions, interrupt program mask (DI,EI,IMASK) .......... 6 - 133
6.6.2 Recovery from interrupt programs (IRET) ................................................................ 6 - 139
6.7 I/O Refresh Instructions 6 - 141
6.7.1 I/O refresh (RFS(P)) ................................................................................................. 6 - 141
6.8 Other Convenient Instructions 6 - 143
6.8.1 Counter 1-phase input up or down (UDCNT1) ......................................................... 6 - 143
6.8.2 Counter 2-phase input up or down (UDCNT2) ......................................................... 6 - 146
6.8.3 Teaching timer (TTMR) ............................................................................................ 6 - 149
6.8.4 Special function timer (STMR).................................................................................. 6 - 151
6.8.5 Rotary table shortest direction control (ROTC) ........................................................ 6 - 154
6.8.6 Ramp signal (RAMP)................................................................................................ 6 - 157
6.8.7 Pulse density measurement (SPD) .......................................................................... 6 - 160
6.8.8 Fixed cycle pulse output (PLSY) .............................................................................. 6 - 162
6.8.9 Pulse width modulation (PWM) ................................................................................ 6 - 164
6.8.10 Matrix input (MTR).................................................................................................... 6 - 166
A-8
7.5.5 7-segment decode (SEG(P)) ...................................................................................... 7 - 75
7.5.6 4-bit dissociation of 16-bit data (DIS(P))..................................................................... 7 - 77
7.5.7 4-bit linking of 16-bit data (UNI(P)) ............................................................................. 7 - 79
7.5.8 Dissociation or linking of random data (NDIS(P),NUNI(P)) ........................................ 7 - 81
7.5.9 Data dissociation and linking in byte units (WTOB(P),BTOW(P)) .............................. 7 - 85
7.5.10 Maximum value search for 16- and 32-bit data (MAX(P),DMAX(P)) .......................... 7 - 89
7.5.11 Minimum value search for 16- and 32-bit data (MIN(P),DMIN(P)) ............................. 7 - 92
7.5.12 BIN 16 and 32 bits data sort operations (SORT,DSORT) .......................................... 7 - 95
7.5.13 Calculation of totals for 16-bit data (WSUM(P)) ......................................................... 7 - 99
7.5.14 Calculation of totals for 32-bit data (DWSUM(P))..................................................... 7 - 101
7.5.15 Calculation of averages for 16-bit or 32-bit data (MEAN(P),DMEAN(P)) ................. 7 - 103
7.6 Structure creation instructions 7 - 105
7.6.1 FOR to NEXT instruction loop (FOR,NEXT)............................................................. 7 - 105
7.6.2 Forced end of FOR to NEXT instruction loop (BREAK(P))....................................... 7 - 108
7.6.3 Subroutine program calls (CALL(P)) ........................................................................ 7 - 110
7.6.4 Return from subroutine programs (RET) .................................................................. 7 - 115
7.6.5 Subroutine program output OFF calls (FCALL(P)) ................................................... 7 - 116
7.6.6 Subroutine calls between program files (ECALL(P)) ................................................ 7 - 120
7.6.7 Subroutine output OFF calls between program files (EFCALL(P))........................... 7 - 125
7.6.8 Subroutine program call (XCALL)............................................................................. 7 - 129
7.6.9 Refresh instruction (COM)........................................................................................ 7 - 134
7.6.10 Select Refresh Instruction (COM)............................................................................. 7 - 137
7.6.11 Select Refresh Instruction (CCOM) .......................................................................... 7 - 141
7.6.12 Index modification of entire ladder (IX,IXEND)......................................................... 7 - 144
7.6.13 Designation of modification values in index modification of entire ladders
(IXDEV,IXSET)................................................................................................. 7 - 148
7.7 Data Table Operation Instructions 7 - 151
7.7.1 Writing data to the data table (FIFW(P))................................................................... 7 - 151
7.7.2 Reading oldest data from tables (FIFR(P))............................................................... 7 - 153
7.7.3 Reading newest data from data tables (FPOP(P)) ................................................... 7 - 155
7.7.4 Deleting and inserting data from and in data tables (FDEL(P),FINS(P)).................. 7 - 157
7.8 Buffer memory access instruction 7 - 160
7.8.1 Reading 1-/2-word data from the intelligent function module
(FROM(P),DFRO(P))........................................................................................ 7 - 160
7.8.2 Writing 1-/2-word data to intelligent function module (TO(P),DTO(P)) ..................... 7 - 163
7.9 Display instructions 7 - 166
7.9.1 Print ASCII code instruction (PR) ............................................................................. 7 - 166
7.9.2 Print comment instruction (PRC) .............................................................................. 7 - 169
7.9.3 Error display and annunciator reset instruction (LEDR) ........................................... 7 - 172
7.10 Debugging and failure diagnosis instructions 7 - 175
7.10.1 Special format failure checks (CHKST,CHK) ........................................................... 7 - 175
7.10.2 Changing check format of CHK instruction (CHKCIR,CHKEND) ............................. 7 - 179
7.11 Character string processing instructions 7 - 183
7.11.1 Conversion from BIN 16-bit or 32-bit to decimal ASCII (BINDA(P),DBINDA(P))...... 7 - 183
7.11.2 Conversion from BIN 16-bit or 32-bit data to hexadecimal ASCII
(BINHA(P),DBINHA(P)).................................................................................... 7 - 186
A-9
7.11.3 Conversion from BCD 4-digit and 8-digit to decimal ASCII data
(BCDDA(P),DBCDDA(P))................................................................................. 7 - 189
7.11.4 Conversion from decimal ASCII to BIN 16-bit and 32-bit data
(DABIN(P),DDABIN(P)).................................................................................... 7 - 192
7.11.5 Conversion from hexadecimal ASCII to BIN 16-bit and 32-bit data
(HABIN(P),DHABIN(P)).................................................................................... 7 - 195
7.11.6 Conversion from decimal ASCII to BCD 4-digit or 8-digit data
(DABCD(P),DDABCD(P))................................................................................. 7 - 198
7.11.7 Reading device comment data (COMRD(P)) ........................................................... 7 - 201
7.11.8 Character string length detection (LEN(P)) .............................................................. 7 - 204
7.11.9 Conversion from BIN 16-bit or 32-bit to character string (STR(P),DSTR(P)) ........... 7 - 206
7.11.10 Conversion from character string to BIN 16-bit or 32-bit data (VAL(P),DVAL(P)) .... 7 - 212
7.11.11 Conversion from floating decimal point to character string data (ESTR(P))............. 7 - 217
7.11.12 Conversion from character string to floating decimal point data (EVAL(P)) ............. 7 - 224
7.11.13 Conversion from hexadecimal BIN to ASCII (ASC(P)) ............................................. 7 - 228
7.11.14 Conversion from ASCII to hexadecimal BIN (HEX(P)) ............................................. 7 - 230
7.11.15 Extracting character string data from the right or left (RIGHT(P),LEFT(P)).............. 7 - 232
7.11.16 Random selection from and replacement in character strings (MIDR(P),MIDW(P))
........................................................................................................................ 7 - 235
7.11.17 Character string search (INSTR(P)) ......................................................................... 7 - 239
7.11.18 Insertion of character string (STRINS(P))................................................................. 7 - 241
7.11.19 Deletion of character string (STRDEL(P)) ................................................................ 7 - 243
7.11.20 Floating decimal point to BCD (EMOD(P)) ............................................................... 7 - 245
7.11.21 From BCD format data to floating decimal point (EREXP(P)) .................................. 7 - 248
7.12 Special function instructions 7 - 250
7.12.1 SIN operation on floating-point data (Single precision) (SIN(P)) .............................. 7 - 250
7.12.2 SIN operation on floating-point data (Double precision) (SIND(P)) .......................... 7 - 252
7.12.3 COS operation on floating-point data (Single precision) (COS(P)) .......................... 7 - 254
7.12.4 COS operation on floating-point data (Double precision) (COSD(P)) ...................... 7 - 256
7.12.5 TAN operation on floating-point data (Single precision) (TAN(P))............................ 7 - 258
7.12.6 TAN operation on floating-point data (Double precision) (TAND(P))........................ 7 - 260
7.12.7 SIN-1 operation on floating point data (Single precision) (ASIN(P)) ......................... 7 - 262
7.12.8 SIN-1 operation on floating-point data (Double precision) (ASIND(P)) ..................... 7 - 265
7.12.9 COS -1 operation on floating-point data (Single precision) (ACOS(P)) .................... 7 - 267
7.12.10 COS -1 operation on floating-point data (Double precision) (ACOSD(P)) ................ 7 - 269
7.12.11 TAN -1 operation on floating-point data (Single precision) (ATAN(P))...................... 7 - 271
7.12.12 TAN -1 operation on floating-point data (Double precision) (ATAND(P)).................. 7 - 273
7.12.13 Conversion from floating-point angle to radian (Single precision) (RAD(P)) ............ 7 - 275
7.12.14 Conversion from floating-point angle to radian (Double precision) (RADD(P)) ........ 7 - 277
7.12.15 Conversion from floating-point radian to angle (Single precision) (DEG(P)) ............ 7 - 279
7.12.16 Conversion from floating-point radian to angle (Double precision) (DEGD(P)) ........ 7 - 281
7.12.17 Exponentiation operation on floating-point data (Single precision) (POW(P)).......... 7 - 283
7.12.18 Exponentiation operation on floating-point data (Single precision) (POWD(P)) ....... 7 - 285
7.12.19 Square root operation for floating-point data (Single precision) (SQR(P)) ............... 7 - 287
7.12.20 Square root operation for floating-point data (Double precision) (SQRD(P)) ........... 7 - 289
7.12.21 Exponent operation on floating-point data (Single precision) (EXP(P)).................... 7 - 291
7.12.22 Exponent operation on floating-point data (Double precision) (EXPD(P))................ 7 - 294
7.12.23 Natural logarithm operation on floating-point data (Single precision) (LOG(P)) ....... 7 - 296
7.12.24 Natural logarithm operation on floating-point data (Double precision) (LOGD(P)) ... 7 - 298
A-10
7.12.25 Common logarithm operation on floating-point data (Single precision)
(LOG10(P))....................................................................................................... 7 - 300
7.12.26 Common logarithm operation on floating-point data (Double precision)
(LOG10D(P)) .................................................................................................... 7 - 302
7.12.27 Random number generation and series updates (RND(P),SRND(P)) ..................... 7 - 304
7.12.28 BCD 4-digit and 8-digit square roots (BSQR(P),BDSQR(P)) ................................... 7 - 306
7.12.29 BCD type SIN operation (BSIN(P))........................................................................... 7 - 309
7.12.30 BCD type COS operations (BCOS(P)) ..................................................................... 7 - 311
7.12.31 BCD type TAN operation (BTAN(P)) ........................................................................ 7 - 313
7.12.32 BCD type SIN -1 operations (BASIN(P)) ................................................................... 7 - 315
7.12.33 BCD type COS -1 operation (BACOS(P)) ................................................................. 7 - 317
7.12.34 BCD type TAN -1 operations (BATAN(P)) ................................................................ 7 - 319
7.13 Data Control Instructions 7 - 321
7.13.1 Upper and lower limit controls for BIN 16-bit and BIN 32-bit data
(LIMIT(P),DLIMIT(P)) ....................................................................................... 7 - 321
7.13.2 BIN 16-bit and 32-bit dead band controls (BAND(P),DBAND(P)) ............................ 7 - 324
7.13.3 Zone control for BIN 16-bit and BIN 32-bit data (ZONE(P),DZONE(P))................... 7 - 327
7.13.4 Scaling (Point-by-point coordinate data) (SCL(P),DSCL(P)).................................... 7 - 330
7.13.5 Scaling (Point-by-point coordinate data) (SCL2(P),DSCL2(P))................................ 7 - 334
7.14 File register switching instructions 7 - 337
7.14.1 Switching file register numbers (RSET(P))............................................................... 7 - 337
7.14.2 Setting files for file register use (QDRSET(P)) ......................................................... 7 - 339
7.14.3 File setting for comments (QCDSET(P)) .................................................................. 7 - 342
7.15 Clock instructions 7 - 344
7.15.1 Reading clock data (DATERD(P)) ............................................................................ 7 - 344
7.15.2 Writing clock data (DATEWR(P)) ............................................................................. 7 - 346
7.15.3 Clock data addition operation (DATE+(P)) ............................................................... 7 - 348
7.15.4 Clock data subtraction operation (DATE-(P)) ........................................................... 7 - 350
7.15.5 Time data conversion (from Hour/Minute/Second to Second) (SECOND(P)) .......... 7 - 352
7.15.6 Time data conversion (from Second to Hour/Minute/Second ) (HOUR(P)).............. 7 - 354
7.15.7 Date comparison (DT=,DT<>,DT>,DT<=,DT<,DT>=) .............................................. 7 - 356
7.15.8 Clock comparison (TM=,TM<>,TM>,TM<=,TM<,TM>=).......................................... 7 - 361
7.16 Expansion Clock Instructions 7 - 366
7.16.1 Reading expansion clock data (S(P).DATERD) ....................................................... 7 - 366
7.16.2 Expansion clock data addition operation (S(P).DATE+)........................................... 7 - 369
7.16.3 Expansion clock data subtraction operation (S(P).DATE-)....................................... 7 - 372
7.17 Program control instructions 7 - 375
7.17.1 Program standby instruction (PSTOP(P)) ................................................................ 7 - 377
7.17.2 Program output OFF standby instruction (POFF(P))................................................ 7 - 378
7.17.3 Program scan execution registration instruction (PSCAN(P)) .................................. 7 - 380
7.17.4 Program low speed execution registration instruction (PLOW(P)) ........................... 7 - 382
7.17.5 Program execution status check instruction (PCHK)................................................ 7 - 384
7.18 Other instructions 7 - 386
7.18.1 Resetting watchdog timer (WDT(P))......................................................................... 7 - 386
7.18.2 Timing pulse generation (DUTY) .............................................................................. 7 - 388
7.18.3 Time check instruction (TIMCHK)............................................................................. 7 - 390
7.18.4 Direct 1-byte read from file register (ZRRDB(P))...................................................... 7 - 391
A-11
7.18.5 File register direct 1-byte write (ZRWRB(P)) ............................................................ 7 - 393
7.18.6 Indirect address read operations (ADRSET(P)) ....................................................... 7 - 395
7.18.7 Numerical key input from keyboard (KEY) ............................................................... 7 - 396
7.18.8 Batch save or recovery of index register (ZPUSH(P),ZPOP(P)) .............................. 7 - 400
7.18.9 Reading Module Information (UNIRD(P))................................................................. 7 - 402
7.18.10 Reading module model name(TYPERD(P))............................................................. 7 - 406
7.18.11 Trace Set/Reset (TRACE,TRACER) ........................................................................ 7 - 411
7.18.12 Writing Data to Designated File (SP.FWRITE)......................................................... 7 - 413
7.18.13 Reading Data from Designated File (SP.FREAD) .................................................... 7 - 424
7.18.14 Writing Data to Standard ROM (SP.DEVST)............................................................ 7 - 436
7.18.15 Read Data from Standard ROM (S(P).DEVLD)........................................................ 7 - 438
7.18.16 Load Program from Memory Card (PLOADP).......................................................... 7 - 440
7.18.17 Unload Program from Program Memory (PUNLOADP) ........................................... 7 - 443
7.18.18 Load + Unload (PSWAPP) ....................................................................................... 7 - 445
7.18.19 High-speed Block Transfer of File Register (RBMOV(P)) ........................................ 7 - 448
A-12
12.1.4 Error code list (2000 to 2999) ................................................................................... 12 - 16
12.1.5 Error code list (3000 to 3999) ................................................................................... 12 - 34
12.1.6 Error code list (4000 to 4999) ................................................................................... 12 - 51
12.1.7 Error code list (5000 to 5999) ................................................................................... 12 - 66
12.1.8 Error code list (6000 to 6999) ................................................................................... 12 - 68
12.1.9 Error code list (7000 to 10000) ................................................................................. 12 - 78
12.2 Canceling of Errors 12 - 83
A-13
MANUALS
To understand the main specifications, functions, and usage of the CPU module, refer to the basic manuals.
Read other manuals as well when using a different type of CPU module and its functions.
Order each manual as needed, referring to the following list.
The numbers in the "CPU module" and the respective modules are as follows.
Nunber CPU module
1) Basic model QCPU
2) High Perfomance model QCPU
3) Process CPU
4) Redundant CPU
5) Universal model QCPU
A-14
Related Manuals
Manual name
Description
< Manual number (model code) >
CC-Link IE Controller Network Reference Manual Specifications, procedures and settings before system operation, parameter
< SH-080668ENG (13JV16) > setting, programming, and troubleshooting of the CC-Link IE controller network module
Q Corresponding MELSECNET/H Network System Reference Explains the specifications for a MELSECNET/H network system for PLC to PLC
Manual (PLC to PLC network) network. It explains the procedures and settings up to operation, setting the parame-
< SH-080049 (13JF92) > ters, programming and troubleshooting.
Q Corresponding MELSECNET/H Network System Refer- Explains the specifications for a MELSECNET/H network system for remote I/O
ence Manual (Remote I/O network) network. It explains the procedures and settings up to operation, setting the
< SH-080124 (13JF96) > parameters, programming and troubleshooting.
Type MELSECNET, MELSECNET/B Data Link System
Describes the general concept, specifications, and part names and settings for
Reference Manual
MELSECNET (II) and MELSECNET/B.
< IB-66530 (13JF70) >
Describes various functions of the Ethernet module: e-mail function, PLC CPU
Q Corresponding Ethernet Interface Module
status monitoring, communication via MELSECNET/H or MELSECNET/10 net-
User's Manual (Application)
work system, communication using data link instructions, file transfer (using FTP)
< SH-080010 (13JF70) >
and other functions.
A-15
MEMO
A-16
8
7
INSTRUCTIONS
FOR DATA LINK 7
Reference
7
Category Processing Details
section
Network refresh instructions Refreshes the specified network module. Section 8.1
Routing information Reading the data specified by routing parameters. Section 8.2.1 7
read/write instructions Writing routing data to the area specified by routing parameters. Section 8.2.2
Remark
7
In this chapter, instruction names are abbreviated as follows if not specified
particularly. 8
• S(P)/J(P)/G(P).ZCOM ZCOM • S(P)/Z(P).RTWRITE RTWRITE
• S(P)/Z(P).RTREAD RTREAD
8-1
ZCOM
Basic High
performance Process Redundant Universal
Command
S.ZCOM S.ZCOM Jn
Command
SP.ZCOM SP.ZCOM Jn
Command
S.ZCOM S.ZCOM Un
Command
SP.ZCOM SP.ZCOM Un
The ZCOM instruction is used to perform refresh at any timing during execution of a
sequence program.
The targets of refresh performed by the ZCOM instruction are indicated below.
• Refresh of CC-Link IE controller network (when refresh parameters are set)
• Refresh of MELSECNET/H (when refresh parameters are set)
• Auto refresh of CC-Link (when refresh device is set)
• Auto refresh of intelligent function module (when auto refresh is set)
Function
(1) When the ZCOM instruction is executed, the CPU module temporarily suspends processing
of the sequence program and conducts refresh processing of the network modules
designated by Jn/Un.
Execution of ZCOM Execution of ZCOM Execution of ZCOM
instruction instruction instruction
0 END END
8-2
ZCOM
(2) The ZCOM instruction does not perform the following processing.
(a) Communication processing between CPU module and programming tool 1
(b) Monitor processing of other station
(c) Read processing of buffer memory of other intelligent function module by serial 2
communication module.
Link scan
6
Normal station
program
0 END 0 END 0
7
(2) Example of data communications when the ZCOM instruction is used
Link scan
For details of the transmission delay time on the PLC to PLC network*1, refer to the
manual below:
• CC-Link IE Controller Network Reference Manual
• Q Corresponding MELSECNET/H Network System Reference Manual
(PLC to PLC network)
(b) When the link scan time is longer than the sequence program scan time, data
communications will not be faster even if the ZCOM instruction is used.
END
Sequence program 0 ZCOM END 0 ZCOM END 0 ZCOM 0 ZCOM END
Link scan
8-3
ZCOM
Link scan
Link refresh
Remote I/O station
network refresh
I/O refresh
I/O module
Auto refresh
Intelligent
function module
Link scan
Link refresh
For details of the transmission delay time on the remote I/O network, refer to the manual
below:
• Q Corresponding MELSECNET/H Network System Reference Manual
(Remote I/O network)
(5) The ZCOM instruction can be used as many times as desired in sequence programs.
However, note that each execution of a refresh operation will lengthen the sequence
program scan time by the amount of time required for the refresh operation.
8-4
ZCOM
(6) Designating "Un" in the argument enables the target designation of the intelligent function as
well as the network modules.
In this case, the auto refresh is performed for the buffer memory of the intelligent function
modules. (It replaces the FROM/TO instructions.)
1
(7) Only with the universal model QCPU, interruption of processing is enabled during the
execution of the ZCOM instruction. However, when refresh data are used in an interrupted
program, the data can split.
2
1. The ZCOM instruction cannot be used in a fixed cycle execution type program
3
or interrupt program.
2. The Redundant CPU has restrictions on use of the ZCOM instruction.
Refer to the manual below for details. 4
• QnPRHCPU User's Manual (Redundant System)
6
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
6
an error code is stored into SD0.
• When the specified network number is not connected to the host station
(Error code: 4102)
7
• When the module specified with the head I/O number is not a network module or link
module (Except Universal model QCPU) (Error code: 2111)
8
• When the module specified with the head I/O number is not a network module or link
module (Only Universal model QCPU) (Error code: 4102)
Program Example
(1) The following program conducts a link refresh for the network module of network No. 6 while
X0 is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
(2) The following program conducts a link refresh for the network module mounted to the
position whose head I/O number is a X/Y30 to X/Y4F while X0 is ON.
[Ladder Mode] [List Mode]
Step Instruction Device
8-5
RTREAD
High
Basic performance Process Redundant Universal
Command
S.RTREAD S.RTREAD n D
Command
SP.RTREAD n D
SP.RTREAD
D : Head number of the devices that stores the read data (Device name)
n –– ––
D –– –– –– ––
Function
(1) Reads data from transfer destination network number specified by n, using routing
information set by the routing parameters, and stores it into the area starting from D .
(2) If no data for the transfer destination network number specified by n is set at the routing
parameters, stores 0 into the area starting from D .
(3) The contents of the data stored in the area starting from D is as indicated below.
(Individual data ranges)
D +0 Relay network number (1 to 239)
+1 Relay station number (1 to 120)
+2 Dummy
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• When data specified by n is other than 1 to 239. (Error code: 4100)
• The device specified by D exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
8-6
RTREAD
Program Example
1
(1) The following program reads the routing information for the network number specified by D0
when X0 is turned ON.
[Ladder Mode] [List Mode] 2
Step Instruction Device
4
[Operation] [Content of routing parameter setting]
D0 1 Transfer Relay network Relay station
destination
network number number number 6
D1 10 1 10 3
D2 3 2 10 2
6
D3 Dummy 3 10 1
8-7
RTWRITE
High
Basic performance Process Redundant Universal
Command
S.RTWRITE S.RTWRITE n S
Command
SP.RTWRITE n S
SP.RTWRITE
S : Head number of the devices where the data to be written is stored (Device name)
n –– ––
S –– –– –– ––
Function
(1) Registers routing data of S or later in the area for the transfer destination network number
specified by n in the routing parameters.
(2) The following shows the contents of data to be set at S or later.
(Individual data ranges)
S +0 Relay network number (0 to 239)
+1 Relay station number (0 to 120)
+2 Dummy
(3) If data for the transfer destination network number specified by n is set in the routing
parameters, it is used to update the data in the area starting from S .
(4) If all data in S or later ( S +0 to S +2) is 0, the data for the transfer destination network
number specified by n is deleted from the routing parameters.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• When data specified by n is other than 1 to 239. (Error code: 4100)
• When the data of S or later exceeds each setting ranges. (Error code: 4100)
• When the total number of routing information registered in the routing parameter of the
network parameters and routing information registered with the RTWRITE instruction
exceeds 64. (Error code: 4100)
• The device specified by S exceeds the range of the corresponding device.
(For the Universal model QCPU only.) (Error code: 4101)
8-8
RTWRITE
Program Example
1
(1) The following program writes the routing information specified by D1 to D3 to the network
module of the network number specified by D0 when X0 is turned ON.
[Ladder Mode] [List Mode] 2
Step Instruction Device
4
[Operation] [Content of routing parameter setting]
D0 1 Transfer
destination
Relay network Relay station
network number number number
6
D1 20 1 20 1
D2 1 2 10 2
D3 Dummy 3 10 1 6
8-9
MEMO
8-10
MULTIPLE
9
9
CPU DEDICATED
INSTRUCTION 7
7
Reference
Category Processing Details
section
Writing to the CPU shared Writes device data of the host CPU to the CPU shared
memory of host CPU memory of the host CPU module.
Section 9.1 7
Reading from the CPU shared Reads device data from the CPU shared memory of another
Section 9.2
memory of another CPU CPU module to the host CPU.
9-1
9.1 Writing to the CPU Shared Memory of Host CPU
The S.TO or TO instruction is used to write to the CPU shared memory of the host station in the
multiple CPU system.
The following table indicates the usability of the S.TO and TO instructions.
Intelligent
CPU No. 1 CPU No. 2 function module
[ SP.TO H3E0 n2 n3 n4 D ]
9-2
(2) Operation of the TO instruction
The TO instruction can write device memory data to the following memories.
9
• CPU shared memory of host CPU module
• Buffer memory of intelligent function module
7
The following figure shows the processing performed when the TO instruction is executed in
CPU No. 1.
7
Intelligent
CPU No. 1 CPU No. 2 function module
Device
memory
Data
write
CPU
shared
Device
memory
CPU
shared
Buffer
memory
7
memory memory
7
Writes data
7
[ TO H3E0 n2 S n3 ]
[ TO H0 n2 S n3 ]
7
Designation of intelligent function module
Remark
Refer to Section 7.8.2 when writing to the buffer memory of the intelligent function
module by the TO instruction.
9-3
S(P).TO
Ver. Ver.
High
Basic performance Process Redundant Universal
Command
S.TO S.TO n1 n2 n3 n4 D
Command
SP.TO SP.TO n1 n2 n3 n4 D
n1 –– –– ––
n2 –– –– ––
n3 –– –– –– ––
n4 –– –– ––
D –– ––
Function
(1) Writes device data of words n3 to n4 to the CPU shared memory address specified by n2 of
the host CPU module or later address.
When writing is completed, the completion bit specified by D turns ON.
Host CPU
n4
Writes the
data of n4
words
9-4
S(P).TO
Write designation
permitted area
User free area 7
511(1FFH)
(b) CPU shared memory address of the High Performance model QCPU, Process CPU and 7
Universal model QCPU*4
CPU shared memory address
*3 : Usable as a user free area when auto refresh setting is not made.
In addition, even when auto refresh setting is made, the auto refresh send range or later is 7
usable as a user free area.
*4 : Data cannot be written to the multiple CPU high speed transmission area of the Universal
model QCPU with the S(P).TO instruction.
(2) When the number of write points is 0, no processing is performed and the completion device
Writing data to CPU shared memory can be performed using the intelligent
function module device.
For intelligent function module device, refer to the QnUCPU User's Manual
(Function Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU
User's Manual (Function Explanation, Program Fundamentals).
9-5
S(P).TO
Operation Error
In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and an
error code is stored into SD0.
(1) When the specified data is outside the following range (Error code: 4101)
• When the number of write points (n4) is outside the specified range of the setting data.
• When the head of the CPU shared memory address (n2) of the write destination host
CPU exceeds the CPU shared memory address range
• When the CPU shared memory address (n2) + the number of write points (n4) of the write
destination host CPU exceeds the CPU shared memory address range
• When the head number of the devices (n3) where the data to be written is stored + the
number of write points (n4) exceeds the device range
(2) When the host CPU operation information area, system area or host CPU refresh area is
specified to the CPU shared memory address (n2) of the write destination
(High Performance model QCPU, Process CPU) (Error code: 4101)
(Basic model QCPU, Universal model QCPU) (Error code: 4111)
(3) When the head I/O number (n1) of the host CPU is other than that of the host CPU
(High Performance model QCPU, Process CPU) (Error code: 2107)
(Basic model QCPU, Universal model QCPU) (Error code: 4112)
(4) No CPU module is installed at the position specified by the head I/O number of the CPU
module. (Error code: 2110)
(5) When the head I/O number (n1) of the host CPU is other than 3E0H/3E1H/3E2H/3E3H
(Error code: 4100)
(6) When the specified instruction is improper (Error code: 4002)
(7) When the specified number of devices is wrong (Error code: 4003)
(8) When the unusable device is specified (Error code: 4004)
Program Example
(1) The following program stores 10 points of data from D0 into address 800H of the CPU
shared memory of CPU No. 1 when X0 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
Remark
The n1 is specified by the first 3 digits of the hexadecimal 4 digits which represent
the head I/O number of the slot mounted to the CPU module.
CPU Slot Slot 0 Slot 1 Slot 2
Head I/O number 3E00 3E10 3E20 3E30
n1 3E0 3E1 3E2 3E3
9-6
TO(P), DTO(P)
Command 7
TOP,DTOP P n1 n2 S n3
7
n1 : Head I/O number of the host CPU (BIN 16 bits)
• Basic model QCPU : 3E0H
• Universal model QCPU: 3E0H to 3E3H
n2 : CPU shared memory address of the write destination host CPU (BIN 16 bits) 7
• Basic model QCPU : 192 to 511
• Universal model QCPU: 2048 to 4095, 10000 to 24335*2
S : Data to be written or head number of the devices where the data to be written is stored (BIN 16 bits)
n3 : Number of data blocks to be written (BIN 16 bits)
7
• Basic model QCPU : TO(P): 1 to 320, DTP(P) : 1 to 160
• Universal model QCPU: TO(P): 1 to 14336*2, DTP(P) : 1 to 7168*2
n1
n2 ––
–– ––
n3 ––
*2: The setting range varies depending on the auto refresh setting range of the multiple CPU high speed
transmission function.
Function
TO
(1) Writes device data of words S to n3 to the CPU shared memory address specified by n2 of
the host CPU module or later address.
Host CPU
CPU shared memory
Device memory of host CPU (n1)
S n2
n3
Writes the
data of n3
words
9-7
TO(P), DTO(P)
When a constant is specified to S , writes the same data (value specified to S ) to the area
of n3 words from the specified CPU shared memory.
Write designation
permitted area
User free area
511(1FFH)
24335(5F0FH)
*2 : Usable as a user free area when auto refresh setting is not made.
In addition, even when auto refresh setting is made, the auto refresh send range or later is
usable as a user free area.
*3 : With Q02UCPU, data can not be written to the multiple CPU high speed transmission area.
9-8
TO(P), DTO(P)
DTO
(1) Writes device data of words S to (n3×2) to the CPU shared memory address specified by
n2 of the host CPU module or later address. 9
Host CPU
CPU shared memory
S
Device memory
n2
of host CPU (n1) 7
n3 2
Writes the
data of (n3 2)
7
words
When a constant is specified to S , writes the same data (value specified to S ) to the area 7
of (n3×2) words from the specified CPU shared memory.
n2
of host CPU (n1) 7
Constant 5
S 5 5
(When "5" is designated 5
(n3 2)
for S )
Writes the same
data to the area words 7
of (n3 2) words
5
7
(2) No processing is performed when the number of write points is 0.
(3) The number of data that can be written varies depending on the target CPU module.
CPU mode Number of Write Points 7
Basic model QCPU 1 to 160
Universal model QCPU 1 to 7168
9-9
TO(P), DTO(P)
Operation Error
In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and an
error code is stored into SD0.
(1) When the specified data is outside the following range (Error code: 4101)
• When the number of write points (n3) is outside the specified range of the setting data.
• When the CPU shared memory address (n2) of the write destination host CPU + the
number of write points (n3) exceeds the CPU shared memory range
• When the head number of the devices that stores the data to be written ( S ) + the number
of write points (n3) exceeds the device range
• When the head of CPU shared memory address (n2) of the write destination host CPU is
outside the write permitted area.
(2) When the head of CPU shared memory address (n2) of the write destination host CPU is an
invalid value. (Error code: 4111)
(3) When the I/O number specified in (n1) is other than that of the host CPU (Exclude the case
when the multiple CPU high speed transmisson area of other CPU is used.)
(Error code: 4112)
(4) No CPU module is installed at the position specified by the head I/O number of the CPU
module. (Error code: 2110)
Program Example
(1) The following program stores 10 points of data from D0 into address 10000 of the CPU
shared memory of CPU No. 1 when X0 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
(2) The following program stores 20 points of data from D0 into address 10000 of the CPU
shared memory of CPU No. 4 when X0 is turned ON.
[Ladder Mode] [List Mode]
Step Instruction Device
Remark
The n1 is specified by the first 3 digits of the hexadecimal 4 digits which represent
the head I/O number of the slot mounted to the CPU module.
CPU Slot Slot 0 Slot 1 Slot 2
Head I/O number 3E00 3E10 3E20 3E30
n1 3E0 3E1 3E2 3E3
9-10
9.2 Reading from the CPU Shared Memory of another CPU
9
The FROM(P)/DFRO(P) instruction of Multiple CPU system can be read from the following
memories.
7
• Buffer memory of intelligent function module
• CPU shared memory of other CPU module
• CPU shared memory of host CPU module (applicable for the Basic model QCPU and 7
Universal model QCPU)
The following figure shows the processing performed when the FROM(P) instruction is executed 7
in CPU No. 1.
7
Intelligent
CPU No. 1 CPU No. 2 function module
Data read
7
*1
Device Data CPU Device CPU Buffer
memory read shared
memory
memory shared
memory
memory 7
7
Reads data
[ FROM H0 n1 n2 D n3]
*1 : Applicable for the Basic model QCPU and Universal model QCPU
Remark
Refer to Section 7.8.1 for reading the buffer memory of the intelligent function
module with the FROM/DFRO instruction.
9-11
FROM(P),DFRO(P)
Ver. Ver.
High
Basic performance Process Redundant Universal
Command
FROMP,DFROP P n1 n2 D n3
n1 : Head I/O number of the reading target CPU module (BIN 16 bits)
• Basic model QCPU : 3E0H to 3E2H
• Universal model QCPU: 3E0H to 3E3H
n2 : Head address of data to be read (BIN 16 bits)
• Basic model QCPU : 0 to 512
• Universal model QCPU: 0 to 4095, 10000 to 24335*3
D : Head number of the devices where the read data is stored (BIN 16 bits)
n3 : Number of read data (BIN 16 bits)
• Basic model QCPU : FROM(P): 1 to 512, DFRO(P) : 1 to 256
• Universal model QCPU: FROM(P): 1 to 14336*3, DRRO(P) : 1 to 7168*3
n1 ––
n2 –– ––
D –– –– –– ––
n3 –– ––
*3: The setting range varies depending on the auto refresh setting range of the multiple CPU high speed
communication function.
Function
FROM
(1) Reads the data of n3 words from the CPU shared memory address designated by n2 of the
CPU module designated by n1, and stores that data into the area starting from the device
designated by D .
CPU shared memory of
Device memory the designated CPU (n1)
n2
D
n3
Reads the
data of n3
words
9-12
FROM(P),DFRO(P)
511(1FFH) 7
(b) CPU shared memory address of the Universal model QCPU*5
CPU shared memory address
7
0(0H) Host CPU operation information area
512(200H)
2048(800H)
System area
*4
7
Host CPU refresh area
DFRO
(1) Reads the data of (n3×2) words from the CPU shared memory address designated by n2 of
the CPU module designated by n1, and stores that data into the area starting from the
device designated by D .
CPU shared memory of the
Device memory designated CPU (n1)
n2
D
n3
Reads the data
of (n3 2)
words
9-13
FROM(P),DFRO(P)
Read of data from the CPU shared memory can also be performed using the
intelligent function module devices.
For intelligent function module device, refer to the QnUCPU User's Manual
(Function Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU
User's Manual (Function Explanation, Program Fundamentals).
Operation Error
In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and an
error code is stored into SD0.
(1) When the specified data is outside the following range. (Error code: 4101)
• The head of the CPU shared memory address (n2) which performs reading is outside the
CPU shared memory range.
• The address of the CPU shared memory (n2) which performs reading plus the number of
read points (n3) is outside the CPU shared memory range.
• The read data storage device number (D) plus the number of read points (n3) is outside
the specified device range.
(2) The CPU module does not exist in the position specified by the CPU module head I/O
number. (Error code: 2110)
(3) When the head of the CPU shared memory address (n2) which performs reading is an
invalid value. (4097 to 9999) (Error code: 4101)
9-14
FROM(P),DFRO(P)
Program Example
9
(1) The following program stores 10 points of data from address C0H of the CPU shared
memory of CPU No. 2 into the area starting from D0 when X0 is turned ON.
[Ladder Mode] [List Mode] 7
Step Instruction Device
(2) The following program stores 20 points of data from address 10000 of the CPU shared
memory of CPU No. 4 into the area starting from D0 when X0 is turned ON.
7
[Ladder Mode] [List Mode]
Step Instruction Device 7
7
Remark
The n1 is specified by the first 3 digits of the hexadecimal 4digits which represent 7
the head I/O number of the slot mounted to the CPU module.
CPU Slot Slot 0 Slot 1 Slot 2
Head I/O number 3E00 3E10 3E20 3E30 7
n1 3E0 3E1 3E2 3E3
The QCPU provides automatic interlocks for the FROM and TO instructions.
9-15
FROM(P),DFRO(P)
Command
FROM FROM n1 n2 D n3
Command
FROMP FROMP n1 n2 D n3
n1 : Head I/O number of the reading target CPU module (BIN 16 bits)
n2 : Head address of data to be read (BIN 16 bits)
D : Head number of the devices where the read data is stored (BIN 16 bits)
n3 : Number of read data (BIN 16 bits)
n1 ––
n2 –– ––
D –– –– –– ––
n3 –– ––
Function
(1) Reads the data of n3 words from the CPU shared memory address designated by n2 of the
CPU module designated by n1, and stores that data into the area starting from the device
designated by D .
CPU shared memory of
Device memory the designated CPU (n1)
n2
D
n3
Reads the
data of n3
words
CPU shared memory address of the High Performance model QCPU and Process CPU
CPU shared memory address
4095(0FFFH)
*1 : Usable as a user free area when auto refresh setting is not made.
When auto refresh setting is made, the auto refresh send range and later are usable as a user
free area.
9-16
FROM(P),DFRO(P)
Read of data from the CPU shared memory can also be performed using the 9
intelligent function module devices.
For intelligent function module device, refer to the QnUCPU User's Manual
(Function Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU 7
User's Manual (Function Explanation, Program Fundamentals).
7
Operation Error
In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and an
7
error code is stored into SD0.
(1) When the specified data is outside the following range. (Error code: 4101)
7
• The head address of the CPU shared memory (n2) from which read will be performed is
outside the CPU shared memory range.
• The address of the CPU shared memory (n2) from which data is read plus the number of 7
read points (n3) is outside the CPU shared memory range.
• The read data storage device number (D) plus the number of read points (n3) is outside
the specified device range. 7
(2) The CPU module does not exist in the position specified by the CPU module head I/O
number. (Error code: 2110)
(3) When the head of read CPU shared memory address (n2) is an invalid value. 7
(4097 to 9999) (Error code: 4101)
Program Example
Remark
The n1 is specified by the first 3 digits of the hexadecimal 4digits which represent
the head I/O number of the slot mounted to the CPU module.
CPU Slot Slot 0 Slot 1 Slot 2
Head I/O number 3E00 3E10 3E20 3E30
n1 3E0 3E1 3E2 3E3
The QCPU provides automatic interlocks for the FROM and TO instructions.
9-17
MEMO
9-18
10
7
QCPU INSTRUCTIONS 10
10-1
10.1 Overview
The multiple CPU high-speed transmission dedicated instruction directs the Universal model
QCPU to write/read device data to/from the Universal model QCPU in another CPU.
The following shows an operation when CPU No.1 writes device data to CPU No.2 with the
multiple CPU high-speed transmission dedicated instruction.
D0 D0
D100
Writing
D200
(1) Parameter setting and system configuration to execute the multiple CPU high-speed
transmission dedicated instruction
The multiple CPU high-speed transmission dedicated instruction can be executed in the
following parameter setting and system configuration.
• CPU No.1 uses QnUD(H)CPU or QnUDE(H)CPU.
• The multiple CPU high speed main base unit (Q3 DB) is used.
• "Use multiple CPU high speed transmission" is selected in the Multiple CPU settings
screen of PLC parameter.
10-2
(2) Writable/readable devices
(a) Writable/readable device names 7
The following table shows the devices that can be written to/read from the Univesal
model QCPU in another CPU with the multiple CPU high-speed transmission dedicated
instruction. 10
Setting of target
Category Type Device name Remarks
device
Requirements for the setting
• Digits are specified by 16 bits (4 digits). 7
Bit device X, Y, M, L, B, F, SB
Internal user device • The start bit device is multiples of
16(10H).
Word device T, ST, C, D, W, SW –– 7
Requirements for the setting
• Digits are specified by 16 bits (4 digits).
Bit device SM
• The start bit device is multiples of
Internal system device
16(10H). 7
Word device SD ––
File register Word device R, ZR ––
SB, SW, SM, and SD include system information area. Take care not to destroy
7
the system information when writing data to the devices above with the
D(P).DDWR instruction of the multiple CPU high-speed transmission dedicated
instruction.
7
10.1 Overview
string specification. They differ in writable/readable device range to another CPU.
10-3
Writable/readable device range in device specification
Host CPU Another CPU
D0 D0
D12287 D12287
D12288
Not writable/not readable
D16383
D12287
D16383
Remark
The following explains precautions for string specification.
• The number of characters that can be specified is 32.
• Whether "0" is appended at the start of the device number or not, the devices
are processed as the same.
• For example, both "D1" and "D0001" are processed as "D1".
• Whether a device is specified by upper case character or lower-case character,
they are processed as the same.
• For example, both "D1" and "d1" are processed as "D1".
• If a device not existing in another CPU is specified by a character string, the
instruction will be completed abnormally.
10-4
(4) Managing the multiple CPU high speed transmission area
(a) The multiple CPU high speed transmission area is managed by blocks in units of 16 7
words.
The following table shows the number of blocks that can be used in each CPU and the
number of blocks used in the instruction. 10
*1
System area
C Number of CPU modules
1k points 2k points
2 46 110 7
3 22 54
4 14 35
*1: For setting of the system area, refer to the QCPU User's Manual (Multiple CPU System). 7
(b) The following shows configuration of the multiple CPU high speed transmission area
when the multiple CPU system is configured with three CPU modules and the system
area size is 1k word.
7
Multiple CPU high speed Multiple CPU high speed Multiple CPU high speed
transmission area in transmission area in transmission area in
CPU No.1 CPU No.2
Area to be sent from CPU No.1 to CPU No.s 2 and 3
CPU No.3
7
22 Send area to Receive area from 22
blocks CPU No.2 CPU No.1 blocks
22 Send area to
blocks CPU No.3
Receive area from 22
blocks
7
CPU No.1
10.1 Overview
22 Receive area to Send area to 22
blocks CPU No.3 CPU No.1 blocks
22 Receive area to Send area to 22
blocks CPU No.3 CPU No.2 blocks
10-5
(6) The multiple CPU high-speed transmission dedicated instructions that can be executed
concurrently
For the Universal model QCPU, the multiple CPU high-speed transmission dedicated
instructions can be concurrently executed within the range satisfying the following formula.
The number of blocks that Total number of blocks used for the
can be used in each CPU instructions concurrently executed
When the number of blocks used for the multiple CPU high-speed transmission dedicated
instructions exceeds the total number of blocks in the multiple CPU high speed transmission
area, the instruction will not be executed in the scan (no processing) but executed at the
next scan.
Note that the instruction will be completed abnormally when the number of empty blocks in
the multiple CPU high speed transmission area is less than the setting values of SD796 to
SD799 (maximum number of used blocks for multiple CPU high-speed transmission
dedicated instruction setting) at the execution of the instruction.
The following table shows execution possibility of the multiple CPU high-speed transmission
dedicated instructions when the number of empty blocks in the multiple CPU high speed
transmission area is less than the number of blocks used for the multiple CPU high-speed
transmission dedicated instructions or the setting values of SD796 to SD799.
Magnitude relation between the number of blocks
used for the instructions*1 and
the number of empty Number of blocks used Number of blocks used
Number of empty blocks*2 Number of empty blocks*2
Magnitude relation blocks for the instruction*1 for the instruction*1
between SD setting value
and the number of empty blocks
SD setting value*3 Number of empty blocks*2 Executed Not executed (no processing)
SD setting value*3 Number of empty blocks*2 Completed abnormally
*1:The number of blocks used for the multiple CPU high-speed transmission dedicated instruction.
*2:The number of empty blocks in the multiple CPU high-speed transmission area.
*3:Setting values from SD796 of SD799.
10-6
(7) Interlock when using the multiple CPU high-speed transmission dedicated instruction
(a) Special relays SM796 to SM799 (maximum number of used blocks for multiple CPU 7
high-speed transmission dedicated instruction setting) can be used as an interlock for
the multiple CPU high-speed transmission dedicated instruction.
When executing the multiple CPU high-speed transmission dedicated instructions 10
concurrently, use SM796 to SM799 as an interlock for the instructions.
7
When using special relays SM796 to SM799, set the maximum number of blocks
for the instruction used for each CPU to special registers SD796 to SD799. (For
example, when the maximum number of blocks for the multiple CPU high-speed 7
transmission dedicated instruction to be executed to CPU No.3 is 5, set 5 to
SD798.)
When the multiple CPU high speed transmission area becomes equal to or less 7
than the number of blocks set at SD796 to SD799, the corresponding special
relay (SM796 to SM799) turns on.
CPU No.1
Multiple CPU high speed transmission area Multiple CPU high speed transmission area
CPU No.2
7
SM
Execution Send area Receive area
command 797
(1 2) (1 2)
DP.DDWR H3E1
7
Number of request blocks:4 During use
Empty area of the request blocks in send area (1 2) has been increased.
CPU No.1 CPU No.2
10.1 Overview
Multiple CPU high speed transmission area Multiple CPU high speed transmission area
SM
Execution 797 Send area Receive area
command (1 2) (1 2)
DP.DDWR H3E1
During use
10-7
(b) Program example when SM796 to SM799 are used as an interlock
The following shows a program that executes the D.DDWR instruction to CPU No.2 at
the rise of X0, and executes the D.DDWR instruction to CPU No.3 at the rise of X1.
The maximum number of used blocks for multiple CPU hight speed transmission dedicated
SM402
0 MOV K7 SD797
Turn-on for one Maximum number of
scan after RUN used blocks
(CPU No.2)
MOV K7 SD798
Maximum number of
used blocks
(CPU No.3)
SM402
8 MOV K100 D1
Turn-on for one Mumber of write points
scan after RUN to CPU No.2
MOV K100 D3
Mumber of write points
to CPU No.3
M0 SM797
14 D.DDWRH3E1 D0 ZR0 ZR0 M1
During execution Number of used Completion Write data Write data Completion
of the DDWR blocks information status to CPU No.2 to CPU No.2 devaice
instruction to (CPU No.2) (CPU No.2) (CPU No.2)
CPU No.3
RST M0
During execution of the
DDWR instruction to CPU No.2
M3 SM798
32 D.DDWRH3E2 D2 ZR1000 ZR1000 M4
During execution Number of used Completion Write data Write data Completion
of the DDWR blocks information status to CPU No.3 to CPU No.3 device
instruction to (CPU No.3) (CPU No.3) (CPU No.3)
CPU No.3
RST M3
During execution of the
DDWR instruction to CPU No.3
10-8
(8) Program example when the multiple CPU high-speed transmission dedicated instructions
are executed to CPU modules by turns
When the multiple CPU high-speed transmission dedicated instructions are executed to
7
Universal model QCPUs by turns, release an interlock to prevent the concurrent execution.
Use the cyclic transmission area device (from U3En¥G10000) as an interlock.
The following shows a program example when the multiple CPU high-speed transmission 10
dedicated instructions are executed at CPU No.s 1 and 2 by turns.
Program example when the multiple CPU high-speed transmission dedicated instruction is 7
executed at CPU No.1
SM402
X0 7
SET M0
Write command During execution of the
DDWR instruction
MOV K100 D1 7
Number of
write points
10.1 Overview
DP.DDWR H3E1 D0 ZR100 ZR100 M1
Completion Completion
status device
RST M0
During execution of
the DDWR instruction
M1 U3E0¥
SET G10000.0
Completion device CPU No.1 is during of
the instruction
10-9
Program example when the multiple CPU high-speed transmission dedicated instruction is
executed at CPU No.2
SM402
MOV K1 SD796
Turn-on for one Maximum number of
scan after RUN used blocks
(CPU No.1)
X20
SET M0
Read instruction During execution the
DDRD instruction
U3E1¥G10000.0 is turned on while CPU No.2 is executing the DP.DDRD instruction.
MOV K50 D1
Read instruction
RST M0
During execution of
the DDRD instruction
M1 U3E1¥
RST G10000.0
Completion device CPU No.2 is during of
execution the instruction
(9) Program example when data exceeding 100 words are written/read with the multiple CPU
high-speed transmission dedicated instruction
The maximum number of write/read points that can be processed with the multiple CPU
high-speed transmission dedicated instruction is 100 words. Data exceeding 100 words can
be written/read by executing the multiple CPU high-speed transmission dedicated
instruction at several times.
The following shows a program example using the D(P).DDWR instruction of the multiple
CPU high-speed transmission dedicated instruction. The similar program can be used when
using the D(P).DDRD instruction of the multiple CPU high-speed transmission dedicated
instruction.
10-10
(a) Program example when one D(P).DDWR instruction is executThe following shows a
program example that writes ZR0 to ZR999 (1000 points) in CPU No.1 to ZR0 to ZR999
in CPU No.2 with the D.DDWR instruction.
7
In the following program example, the next D.DDWR instruction is executed after the
completion device of the D.DDWR instruction (M2) turns on so that only one D.DDWR
instruction may be executed.
10
Program example when one D(P).DDWR instruction is executed
The maximum number of used blocks for multiple CPU high-speed
transmission dedicated instruction setting is set to CPU No.2 7
SM402
0 MOV K7 SD797
Turn-on for one Maximum number of
scan after used blocks
(CPU No.2) 7
MOV K100 D1
Number of
write points 7
Data writing is started at the rise of the write command (X0)
X0 M0
7
37 RST Z2
Write During
comman writing
7
SET M0
During writing
68
M0
SET M1
7
During During execution of
writing the DDWR instruction
M4
10.1 Overview
Execution request of the next
DDWR instruction
M1 SM797
71 D.DDWR H3E1 D0 ZR0Z2 ZR0Z2 M2
During execution Number of used Completion Write source/write Completion
of the DDWR blocks information status destination device
instruction (CPU No.2)
RST M1
During execution of the
DDWR instruction
When the DDWR instruction is completed abnomally, the annunciator is turned on and data writing is stopped
M2 M3
98 SET F0
Completion Error
device completion
device
RST M0
During
writing
Next data writing is requested at nomal completion of the DDWR instruction
M2 M3
134 + K100 Z2
Completion Error
device completion
device
< Z2 K1000 PLS M4
Execution request of the
next DDWR instruction
= Z2 K1000 RST M0
During writing
173 END
10-11
(b) Program example when the D(P).DDWR instructions are executed concurrently
The following shows a program example that writes ZR0 to ZR999 (1000 points) in CPU
No.1 to ZR0 to ZR999 in CPU No.2 with the D.DDWR instruction.
As shown on the program example, multiple CPU device write/read instructions can be
executed concurrently.
When reading/writing devices with the multiple CPU high-speed transmission dedicated
instructions concurrently, the more the total number of blocks in the multiple CPU high
speed transmission area (send area), the more the time taken to complete reading/
writing with the multiple CPU high-speed transmission dedicated instruction can be
shortened.
10-12
D(P).DDWR
Ver.
Basic High
performance Process Redundant Universal 10
Q03UDCPU, Q04UDHCPU, Q06UDHCPU: that the first 5 digits of serial number is 10012 or higer QnUDE(H)CPU.
7
Command
D.DDWR D.DDWR n S1 S2 D1 D2
Command
7
DP.DDWR DP.DDWR n S1 S2 D1 D2
7
Setting Internal device J \ Constant
R, ZR U \G Zn Others
data Bit Word*6 Bit Word K, H
n *2 –– –– –– 7
S1 *3 –– *4 *5 –– –– ––
S2 *3 –– –– –– ––
D1 *3 –– –– –– ––
7
D2 *3 *7 –– *5 –– –– ––
Device*6
S
D1 Start device of another CPU that stores write data
Character string*7
D2 Completion device Bit
*6: By specifying a file register (R, ZR), data can be written to devices in another CPU, outside the range of host
CPU.
*7: By specifying the start device by " ", devices can be written to devices in another CPU, outside the range of
host CPU.
10-13
D(P).DDWR
Control Data
Function
(1) In multiple CPU system, data stored in a device specified by host CPU ( S2 ) or later is stored
by the number of write points specified by ( D2 +1) into a device specified by another CPU (n)
( D1 ) or later.
Strat devaice number of the Start device nimber of the strage
storageiocation for write data iocation where write data has stored
S2 D1
Host CPU Another CPU n
(CPU that repuests writing) (CPU to be read)
(2) Whether to complete the D(P).DDWR instruction normally can be checked by the
completion device ( D2 +0) and completion status display device ( D2 +1).
10-14
D(P).DDWR
(3) The number of blocks used for the instruction depends on the number of write points (refer
to Section 12.1).
Number of blocks used for the instruction
7
Number of write points D(P).DDWR
specified by the instruction instruction
1 to 4 1 10
5 to 20 2
21 to 36 3
37 to 52
53 to 68
4
5
7
69 to 84 6
85 to 100 7
7
(4) The instruction will be completed abnormally when there are no empty blocks in the multiple
CPU high speed transmission area.
Set the number of blocks used for the instruction at special registers (SD796 to SD799), and
use the special relays (SM796 to SM799)as an interlock prevent error completion (refer to
7
Section 12.1).
7
Operation Error
In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
7
(1) Specified another CPU is wrong or the multiple CPU high-speed transmission dedicated
instruction cannot be used in the setting (Error code: 4350) 7
• The reserved CPU has been specified.
• Unmounted CPU has been specified.
• Another CPU start I/O number divided by 16n is out of 3E0H to 3E3H.
(6) The number of write points ( S1 +1)is other than 0 to 100. (Error code 4354)
10-15
D(P).DDWR
In any of the following cases, the instruction is completed abnormally, and an error code is
stored into a device specified at completion status storage device ( S1 +0).
(1) The request of the instruction to the target CPU is more than the acceptable value (no empty
blocks exist in the multiple CPU high speed transmission area).
(Error code: 0010H)
(2) A device for another CPU specified at S1 cannot be used at another CPU, or is out of device
range. (Error code: 1001H)
(3) The number of write points set with the D(P).DDWR instruction is 0.
(Error code: 1080H)
(4) The response of the instruction from another CPU cannot be returned (no empty blocks exist
in the multiple CPU high speed transmission area). (Error code: 1003H)
Program Example
(1) This program stores data by 10 words starting from DO in host CPU into W10 or later in CPU
No.2 when XO turns on.
[Ladder mode]
X0 The number of write points "10" is
stored into D101, setting device of
MOVP K10 D101 the number of write points (S1+1)
Execution command
of control data.
of the instruction
DP.DDWR H3E1 D100 D0 W10 M100 D0 to D9 in host CPU are stored into
W10 to W19 in CPU No.2.
M100 M101
Normal completion Program
Completion device
M101
Error completion Program
Caution
(1) Digit specification of bit device is possible for n, S2 , and D1 . Note that when the digit
specification of bit device is made to S2 or D1 , the following conditions must be met.
• Digits are specified by 16 bits (4 digits).
• The start bit device is multiples of 16 (10H).
(2) Execute this instruction after checking that the write target CPU is powered on. Not doing so
may end up no processing.
(3) If changing a range of the device specified at setting data between after execution of the
instruction and turn-on of the completion device, data to be stored by system (completion
status, completion device) cannot be stored normally.
(4) SB, SW, SM, and SD include system information area. Take care not to destroy the system
information when writing data to the devices above with the D(P).DDWR instruction of the
multiple CPU high-speed transmission dedicated instruction.
10-16
D(P).DDRD
Ver.
Basic High
performance Process Redundant Universal 10
Q03UDCPU, Q04UDHCPU, Q06UDHCPU: that the first 5 digits of serial number is 10012 or higer
QnUDE(H)CPU.
7
Command
D.DDRD D.DDRD n S1 S2 D1 D2
7
Command
DP.DDRD DP.DDRD n S1 S2 D1 D2
7
Setting Internal device J \ Constant
R, ZR Zn Others
data Bit Word Bit Word
U \G
K, H
7
n *2 –– –– ––
S1 *3 –– *3 *4 –– –– ––
S2 *3 –– –– –– –– 7
S *3
D1 –– *3 *4 –– –– ––
D2 *3 *3 –– *4 –– –– ––
Device*6
S
D1 Start device of the host CPU that stores read data
Character string*7
D2 Completion device Bit
*6: By specifying a file register (R, ZR), data can be read to devices in another CPU, outside the range of host
CPU.
*7: By specifying the start device by " ", devices can be read to devices in another CPU, outside the range of host
CPU.
10-17
D(P).DDRD
Control Data
(1) In multiple CPU system, data stored in a device specified by another CPU (n) ( D1 ) or later is
stored by the number of read points specified by ( S1 +1) into a device specified by host CPU
( S2 ) or later.
Strat device number of the storage
Start device number of the location where read has been stored
storage location for read data
D2 Host CPU Another CPU n S1
(CPU that requests reading) (CPU to be read)
(2) Whether to complete the D(P).DDRD instruction normally can be checked by the completion
device ( D2 +0) and completion status display device ( D2 +1).
(a) END processing in scan data that CPU completed the instruction turns on the device
and the next END processing turns off the device.
(b) This device turns on/off depending on the status upon completion of the instruction.
• Normal completion: Off
• Error completion: Turns on at END processing in the scan where the instruction has
been completed, and turns off at the next END processing (At error completion, an
error code is stored at control data ( S1 +0): Completion status)).
(3) The number of blocks used for the instruction depends on the number of read points (refer to
Section 12.1).
Number of blocks used for the instruction
Number of read points
D(P).DDRD instruction
specified by the instruction
1 to 100 1
(4) The instruction will be completed abnormally when there are no empty blocks in the multiple
CPU high speed transmission area.
Set the number of blocks used for the instruction at special registers (SD796 to SD799), and
use the special relays (SM796 to SM799)as an interlock prevent error completion (refer to
Section 12.1).
10-18
D(P).DDRD
Operation Error
7
In any of the following cases, an operation error occurs, the error flag (SM0) turns on, and an
error code is stored into SD0.
(1) Specified another CPU is wrong or the multiple CPU high-speed transmission dedicated
10
instruction cannot be used in the setting (Error code: 4350).
• The reserved CPU has been specified.
7
• Unmounted CPU has been specified.
• The result of dividing the start I/O number of another CPU by 16n is outside the range of
3E0H to 3E3H. 7
• The instruction was executed without setting "Use multiple CPU high speed
transmission".
• The instruction was executed with the Q02UCPU. 7
• Host CPU has been specified.
• The CPU where the instruction cannot be executed has been specified.
7
(2) The instruction cannot be executed with the CPU. (Error code: 4351)
• Another CPU does not support this instruction.
(3) The number of devices is wrong. (Error code: 4352)
7
(4) The device that cannot be used for the instruction has been specified. (Error code: 4353)
(5) A device has been specified by the character string that cannot be used.(Error code: 4354) 7
(6) The number of read points ( S1 +1)is other than 0 to 100. (Error code: 4355)
In any of the following cases, the instruction is completed abnormally, and an error code is
(2) A device for another CPU specified at S2 cannot be used at another CPU, or is out of device
range. (Error code: 1001H)
(3) The number of read points set with the D(P).DDRD instruction is 0. (Error code: 1081H)
(4) The response of the instruction from another CPU cannot be returned (no empty blocks exist
in the multiple CPU high speed transmission area). (Error code: 1003H)
10-19
D(P).DDRD
Program Example
(1) This program stores data by 10 words starting from DO in CPU No.2 into W10 or later in host
CPU when XO turns on.
[Ladder mode]
X0
MOVP K10 D101
Execution command
of the instruction
DP.DDRD H3E1 D100 D0 W10 M100
M100 M101
Normal completion Program
Completion device
M101
Error completion Program
Caution
(1) Digit specification of bit device is possible for n, S2 , and D1 . Note that when the digit
specification of bit device is made to S2 or D1 , the following conditions must be met.
• Digits are specified by 16 bits (4 digits).
• The start bit device is multiples of 16 (10H).
(2) Execute this instruction after checking that the read target CPU is powered on. Not doing so
may end up no processing.
(3) If changing a range of the device specified at setting data between after execution of the
instruction and turn-on of the completion device, data to be stored by system (completion
status, completion device) cannot be stored normally.
10-20
11
7
QCPU INSTRUCTIONS 7
11
11-1
SP.CONTSW
High
Basic performance Process Redundant Universal
Command
SP.CONTSW SP.CONTSW S D
S : Value other than 0 and used to identify the processing that issued the system switching request (BIN 16 bits)
D : Error completion device number (bits)
S –– –– ––
D *1 –– –– ––
Function
(1) Switches between the control system and standby system at the END processing of the
scan executed with the SP.CONTSW instruction.
(2) When using the SP.CONTSW instruction for system switching, the "manual switching enable
flag (SM1592)" must have been turned ON (enabled) in advance.
(3) S is provided to identify the processing block of the program where system switching
occurred when multiple SP.CONTSW instructions are used.
At S , specify a value within the ranges -32768 to -1 and 1 to 32767 (1H to FFFFH).
The S value specified for the SP.CONTSW instruction is stored into the "system switching
instruction argument (SD6)" of the error common information when the system switching is
normally completed. *2
When multiple SP.CONTSW instructions are executed during the same scan, the argument
of the SP.CONTSW instruction executed first is stored into the system switching instruction
argument (SD6).
(4) When system switching is normally completed, the S value specified for the SP.CONTSW
instruction is stored into the "system switching instruction argument (SD1602)" of the new
control system CPU module. *3
By reading the SD1602 value from the new control system CPU module, which the
SP.CONTSW instruction was used for system switching can be confirmed.
*2 : The S value specified for the SP.CONTSW instruction can be confirmed in the error common information
of the PLC diagnostics dialog box on GX Developer.
*3 : The new control system CPU module means the CPU module that was switched from the standby system
to the control system by the SP.CONTSW instruction.
11-2
SP.CONTSW
(5) The error completion device is turned ON by the control system CPU module when system
switching by the SP.CONTSW instruction was unsuccessful.
7
(a) When OPERATION ERROR is detected due to any of the following reasons at the
execution of the SP.CONTSW instruction, the error completion device is turned ON
during the instruction execution.
7
• 0 is specified at S of the executed SP.CONTSW instruction.
• The "manual switching enable flag (SM1592)" is OFF.
• The SP.CONTSW instruction was executed by the standby system in the separate
11
mode.
• The SP.CONTSW instruction was executed in the debug mode. 7
(b) If systems could not be switched due to any of the reasons given in the following table,
the error completion device turns ON when system switching is executed in the END
processing. 7
Reason No. Reasons for System Switching Failure
0 Normally completed
1 Tracking cable is disconnected or faulty.
7
Hardware fault, power-off, reset or watchdog timer error occurred in the standby
2
system.
3 Watchdog timer error occurred in the control system. 7
4 Preparations being made for tracking transfer.
5 Communication time-out.
6 Stop error occurred in the standby system. (Excluding watchdog timer error) 7
7 Operating status different between the control system and standby system.
8 Memory copy being executed from the control system to the standby system.
9 Write during RUN being executed.
10 Network fault detected by the standby system.
(6) Use a user program or GX Developer to turn OFF the error completion bit that has turned
ON.
If normal system switching is performed by the execution of the SP.CONTSW instruction
with the error completion device ON, the error completion device of the new standby system
CPU module is also turned OFF.
When system switching is performed due to a factor other than the SP.CONTSW instruction,
however, the error completion device is not turned OFF.
Operation Error
(1) In any of the following cases, an operation error occurs, the error flag (SM0) turns ON, and
an error code is stored into SD0.
• The value specified at S is 0 at execution of the SP.CONTSW instruction.
(Error code: 4100)
• The manual switching enable flag (SM1592) is OFF (disable) at execution of the
SP.CONTSW instruction. (Error code: 4120)
• The SP.CONTSW instruction was executed by the standby system CPU module in the
separate mode. (Error code: 4121)
• The SP.CONTSW instruction was executed in the debug mode. (Error code: 4121)
11-3
SP.CONTSW
(2) If system switching was unsuccessful, the error flag (SM0) is turned ON and an error code is
stored into SD0.
• The tracking cable is disconnected or faulty. (Error code: 6220)
• Hardware fault, power-off, reset or watchdog timer error occurred in the standby system.
(Error code: 6220)
• Watchdog timer error occurred in the control system. (Error code: 6220)
• Preparations are being made for tracking transfer. (Error code: 6220)
• Communication time-out occurred. (Error code: 6220)
• Stop error, excluding watchdog timer error, occurred in the standby system.
(Error code: 6220)
• The operating status differs between the control system and standby system.
(Error code: 6220)
• Memory copy is being executed from the control system to the standby system.
(Error code: 6220)
• Write during RUN is being executed. (Error code: 6220)
• Network fault was detected by the standby system. (Error code: 6220)
Program Example
(1) The following program executes system switching on the leading edge of the system
switching command (M100).
If the system switching command (M100) remains ON, the SP.CONTSW instruction is also
executed by the new control system CPU module after system switching. Therefore, M101 is
added to the execution conditions as a consecutive switching prevention flag.
11-4
12
6
ERROR CODES 6
12
12-1
12.1 Error Code List
The CPU module uses the self diagnostics function to display error information (on the LED) and
stores the information into the special relay SM and special register SD, when an error occurs in
the following situations:
• When the Progammable Controller is powered ON.
• When the CPU module is switched from STOP to RUN.
• While the CPU module is running.
If an error occurs when a communication request is issued from the peripheral device, intelligent
function module or network system to the CPU module, the CPU module returns the error code
(4000H to 4FFFH) to the request source.
The following describes the description of errors which occur in the CPU module and the
corrective actions for the errors.
12-2
12.1.1 Error codes
1
Errors are detected by the self diagnostic function of the CPU module or detected during
communication with the CPU module.
The relation between the error detection pattern, error detection location and error code is shown 2
in Table 12.1.
3
Table12.1Reference destination
Error detection
Error detection pattern Error code Reference
location 12
Detection by the self
diagnostics function of CPU CPU module 1000 to 10000*1*2 Section 12.1.3 to 12.1.9
module
• QCPU User’s Manual (Hardware design, 6
CPU module 4000H to 4FFFH
Maintenance and Inspection)
Serial communication
7000H to 7FFFH Serial Communication User’s Manual, etc.
module, etc.
CC-Link System Master/Local Module User’s
6
CC-Link module B000H to BFFFH
Manual
Ethernet module C000H to CFFFH Ethernet Interface Module User’s Manual
Detection at communication
with CPU module
CC-Link IE controller
E000H to EFFFH
CC-Link IE Controller Network Reference 7
network Manual
• MELSECNET/H mode
MELSECNET/H
Q Corresponding MELSECNET/H Network
System Reference Manual
8
F000H to FFFFH
network module • MELSECNET/10 mode
For QnA/Q4AR MELSECNET/10 Network
System Reference Manual
*1: CPU module error codes are classified into minor, moderate, major errors as shown below.
• Minor error: Errors that may allow the CPU module to continue the operation, e.g., battery error.
When an error occurs, reading an error code, error message or the like can be executed with GX
Developer.
For the details of the operation method, refer to the operating manual for GX Developer.
12-3
12.1.3 Error code list (1000 to 1999)
The following shows the error messages from the error code 1000 to 1999, the contents and
causes of the errors, and the corrective actions for the errors.
12-4
Error LED Status Corresponding
Error Contents and Cause Corrective Action
Code CPU Status CPU
1006 [MAIN CPU DOWN]
1007 Runaway or failure of CPU module or failure of
main CPU
1
• Take noise reduction measures.
• Malfunctioning due to noise or other reason
• Reset the CPU module and RUN it again.If the Qn(H)
• Hardware fault
same error is displayed again, this suggests a QnPH
1008
■Collateral information
• Common Information:–
CPU module hardware fault.(Contact your local QnPRH 2
Mitsubishi representative.)
• Individual Information:–
■Diagnostic Timing
• Always
[MAIN CPU DOWN] 3
• A failure is detected on the power supply module,
CPU module, main base unit, extension base
unit or extension cable.
• When using the redundant base unit, the
Reset the CPU module and RUN it again.If the
same error is detected again, it is considered that
Q00J/Q00/Q01*4 12
redundant power supply module failure in both
the power supply module, CPU module, main base Qn(H)*6
1009 systems and/or the redundant base unit failure QnPH
unit, extension base unit or extension cable is
are detected. QnPRH
faulty.
■Collateral information
• Common Information:–
(Contact your local Mitsubishi representative.) QnU 6
• Individual Information:–
■Diagnostic Timing
• Always
[END NOT EXECUTE] 6
Entire program was executed without the execution
of an END instruction. RUN:
• When the END instruction is executed it is read Off
as another instruction code, e.g. due to noise.
• Take noise reduction measures.
• Reset the CPU module and RUN it again. If the
ERR.: 7
• The END instruction has been changed to Flicker
1010 same error is displayed again, this suggests a QCPU
another instruction code somehow.
CPU module hardware fault. (Contact your local
■Collateral information CPU Status:
Mitsubishi representative.)
• Common Information:–
• Individual Information:–
Stop
8
■Diagnostic Timing
• When an END instruction executed
[SFCP. END ERROR]
The SFC program cannot be normally terminated
due to noise or other reason.
• The SFC program cannot be normally terminated
• Take noise reduction measures.
due to noise or any similar cause.
• Reset the CPU module and RUN it again. If the Q00J/Q00/Q01*4
12-5
Error LED Status Corresponding
Error Contents and Cause Corrective Action
Code CPU Status CPU
[RAM ERROR]
The sequence program storing program memory in
the CPU module is faulty. • Take noise reduction measures.
■Collateral information • Reset the CPU module and RUN it again. If the
1101 • Common Information:– same error is displayed again,this suggests a
• Individual Information:– CPU module hardware fault.(Contact your local
■Diagnostic Timing Mitsubishi representative.)
• At power ON/ At reset/ When an END instruction
executed
[RAM ERROR]
• The work area RAM in the CPU module is faulty.
• The standard RAM and extended RAM in the
• Take noise reduction measures.
CPU module are faulty.
• Reset the CPU module and RUN it again. If the QCPU
■Collateral information
1102 same error is displayed again,this suggests a
• Common Information:–
CPU module hardware fault.(Contact your local
• Individual Information:–
Mitsubishi representative.)
■Diagnostic Timing
• At power ON/ At reset/ When an END instruction
executed
[RAM ERROR]
The device memory in the CPU module is faulty.
■Collateral information
• Common Information:–
• Individual Information:–
■Diagnostic Timing • Take noise reduction measures.
• At power ON/ At reset • When indexing is performed, check the value of
[RAM ERROR] index register to see if it is within the device RUN:
• The device memory in the CPU module is faulty. range. Off
1103
• The device out of range is accessed due to • Reset the CPU module and RUN it again. If the ERR.:
indexing, and the device for system is same error is displayed again,this suggests a Flicker
overwritten. CPU module hardware fault.(Contact your local Qn(H)*8
■Collateral information Mitsubishi representative.) CPU Status: QnPH*8
• Common Information:– Stop QnPRH*9
• Individual Information:–
■Diagnostic Timing
• At power ON/ At reset/ When an END instruction
executed
[RAM ERROR]
The address RAM in the CPU module is faulty. • Take noise reduction measures.
■Collateral information • Reset the CPU module and RUN it again.If the
1104 • Common Information:– same error is displayed again, this suggests a QCPU
• Individual Information:– CPU module hardware fault. (Contact your local
■Diagnostic Timing Mitsubishi representative.)
• At power ON/ At reset
[RAM ERROR]
The CPU memory in the CPU module is faulty.
■Collateral information
Q00J/Q00/Q01
• Common Information:–
QnU
• Individual Information:–
■Diagnostic Timing • Take noise reduction measures.
• At power ON/ At reset • Reset the CPU module and RUN it again.If the
1105 [RAM ERROR] same error is displayed again, this suggests a
The CPU shared memory in the CPU module is CPU module hardware fault. (Contact your local
faulty. Mitsubishi representative.) Qn(H)*4
■Collateral information QnPH
• Common Information:– QnPRH
• Individual Information:– QnU
■Diagnostic Timing
• At power ON/ At reset
12-6
Error LED Status Corresponding
Error Contents and Cause Corrective Action
Code CPU Status CPU
• Check the battery to see if it is dead or not. If
[RAM ERROR]
The battery is dead.
dead, replace the battery. 1
• Take noise reduction measures.
The program memory in the CPU module is faulty.
• Format the program memory, write all files to the
■Collateral information Qn(H)
• Common Information:– PLC, then reset the CPU module, and RUN it
1106 QnPH*7
• Individual Information:– again.
If the same error is displayed again, the possible
QnPRH 2
■Diagnostic Timing
cause is a CPU module hardware fault. (Contact
• STOP RUN/When an END instruction
your local Mitsubishi representative, explaining a
executed
1110
■Collateral information Flicker 7
• Common Information:–
• Individual Information:– CPU Status:
■Diagnostic Timing Stop
• At power ON/ At reset
[TRK. CIR. ERROR]
8
A tracking hardware fault was detected.
■Collateral information
1111 • Common Information:–
• Individual Information:–
■Diagnostic Timing
• At power ON/ At reset
1112 [TRK. CIR. ERROR] QnPRH
12-7
Error LED Status Corresponding
Error Contents and Cause Corrective Action
Code CPU Status CPU
[TRK. CIR. ERROR]
A fault was detected by the initial check of the
tracking hardware.
■Collateral information This suggests a CPU module hardware fault.
1115
• Common Information:– (Contact your nearest Mitsubishi representative.)
• Individual Information:–
■Diagnostic Timing
• At power ON/ At reset
[TRK. CIR. ERROR]
A tracking hardware fault was detected during
running.
• Start after checking that the tracking cable is
• The tracking cable was disconnected and
connected. QnPRH
reinserted without the standby system being
If the same error is displayed again, the cause is
powered off or reset.
the hardware fault of the tracking cable or CPU
• The tracking cable is not secured by the
module. (Please contact your local Mitsubishi
connector fixing screws.
1116 representative, explaining a detailed description
• The error occurred at a startup since the
of the problem.)
redundant system startup procedure was not
• Confirm the redundant system startup procedure,
followed.
and execute a startup again. For details, refer to
■Collateral information
the QnPRHCPU User's Manual (Redundant
• Common Information:–
System).
• Individual Information:–
■Diagnostic Timing
• During running
[RAM ERROR]
The memory of the CPU module in the Multiple • Take noise reduction measures. RUN:
CPU high speed transmission area is faulty. • Reset the CPU module and RUN it again. Off
■Collateral information If the same error is displayed again, the CPU ERR.:
1150 QnU*10
• Common Information:– module has hardware failure. Contact your local Flicker
• Individual Information:– Mitsubishi representative, explaining a detailed
■Diagnostic Timing description of the problem. CPU Status:
• At power ON/ At reset Stop
[RAM ERROR] • Take noise reduction measures.
The program memory in the CPU module is • Format the program memory, write all files to the
overwritten. PLC, then reset the CPU module, and RUN it
■Collateral information again.
1160
• Common Information:– If the same error is displayed again, the CPU
• Individual Information:– module has hardware failure. Contact your local
■Diagnostic Timing Mitsubishi representative, explaining a detailed
• At program execution description of the problem.
[RAM ERROR]
The data of the device memory built in the CPU
• Take noise reduction measures.
module is overwritten.
If the same error is displayed again, the CPU
■Collateral information
1161 module has hardware failure. Contact your local
• Common Information:– QnU
Mitsubishi representative, explaining a detailed
• Individual Information:–
description of the problem.
■Diagnostic Timing
• At program execution
[RAM ERROR]
The error of the data held by the battery in the CPU • Take noise reduction measures.
module is detected. (It occurs when the automatic • Change the CPU main body or SRAM card
format is not set.) battery.
1162 ■Collateral information If the same error is displayed again, the CPU
• Common Information:– module has hardware failure. Contact your local
• Individual Information:– Mitsubishi representative, explaining a detailed
■Diagnostic Timing description of the problem.
• At power ON/ At reset
*10 The Universal model QCPU except the Q00UJCPU, Q00UCPU, Q01UCPU, and Q02UCPU.
12-8
Error LED Status Corresponding
Error Contents and Cause Corrective Action
Code CPU Status CPU
[RAM ERROR]
The destruction of the data stored in the standard
RAM is detected.
• Take noise reduction measures. 1
If the same error is displayed again, the CPU
■Collateral information
1164 module has hardware failure. Contact your local QnU*11
• Common Information:–
Mitsubishi representative, explaining a detailed
• Individual Information:–
■Diagnostic Timing
description of the problem. 2
• When instruction executed
[OPE. CIRCUIT ERR.]
The operation circuit for index modification in the
CPU module does not operate normally. 3
■Collateral information
1200
• Common Information:–
• Individual Information:–
■Diagnostic Timing
• At power ON/ At reset
12
[OPE. CIRCUIT ERR.]
The hardware (logic) in the CPU module does not
operate normally.
■Collateral information
6
1201 QCPU
• Common Information:–
• Individual Information:–
■Diagnostic Timing
• At power ON/ At reset 6
[OPE. CIRCUIT ERR.]
RUN:
The operation circuit for sequence processing in
Off
the CPU module does not operate normally.
7
ERR.:
■Collateral information
1202 Flicker
• Common Information:–
• Individual Information:–
CPU Status:
■Diagnostic Timing
Stop
• At power ON/ At reset
[OPE. CIRCUIT ERR.]
This suggests a CPU module hardware fault.
(Contact your local Mitsubishi representative.)
8
The operation circuit for index modification in the
CPU module does not operate normally.
■Collateral information
1203
• Common Information:–
• Individual Information:–
■Diagnostic Timing
• When an END instruction executed
12-9
Error LED Status Corresponding
Error Contents and Cause Corrective Action
Code CPU Status CPU
• Check FUSE. LED of the output modules and
[FUSE BREAK OFF]
replace the module whose LED is lit.
There is an output module with a blown fuse.
(The module with a blown fuse can also be
■Collateral information
identified using GX Developer.
• Common Information:Module No.(Slot No.) Qn(H)
Check the special registers SD1300 to SD1331
[For Remote I/O QnPH
to see if the bit corresponding to the module is
network]Network No./ QnPRH
"1".) RUN:
Station No. QnU
• When a GOT is bus-connected to the main base Off/On
• Individual Information:–
unit or extension base unit, check the connection ERR.:
■Diagnostic Timing
• Always status of the extension cable and the earth status Flicker/On
1300 of the GOT.
[FUSE BREAK OFF] CPU Status:
There is an output module with a blown fuse. Stop/
■Collateral information Check ERR. LED of the output modules and
Continue*1
• Common Information:Module No.(Slot No.) replace the module whose LED is lit.
[For Remote I/O (The module with a blown fuse can also be
Q00J/Q00/Q01
network]Network No./ identified using GX Developer. Check the special
Station No. registers SD130 to SD137 to see if the bit
• Individual Information:– corresponding to the module is "1".)
■Diagnostic Timing
• Always
[I/O INT. ERROR]
An interruption has occurred although there is no
interrupt module. Any of the mounted modules is experiencing a
■Collateral information hardware fault. Therefore, check the mounted
1310 QCPU
• Common Information:– modules and change the faulty module. (Contact
• Individual Information:– your local Mitsubishi representative.)
■Diagnostic Timing
• During interrupt
[I/O INT. ERROR]
An interrupt request from other than the interrupt
RUN:
module was detected.
Off
■Collateral information Take action so that an interrupt will not be issued Q00J/Q00/Q01*4
• Common Information:– from other than the interrupt module. ERR.:
QnU
• Individual Information:– Flicker
■Diagnostic Timing
• During interrupt CPU Status:
Stop
• Correct the interrupt pointer setting in the PLC
1311 [I/O INT. ERROR]
system setting of the PLC parameter dialog box.
An interrupt request from the module where
• Take measures so that an interrupt is not issued
interrupt pointer setting has not been made in the
from the module where the interrupt pointer
PLC parameter dialog box was detected. Q00J/Q00/Q01 *5
setting in the PLC system setting of the PLC
■Collateral information QnPRH
parameter dialog box has not been made.
• Common Information:– QnU
Correct the interrupt setting of the network
• Individual Information:–
parameter. Correct the interrupt setting of the
■Diagnostic Timing
• During interrupt intelligent function module buffer memory.
Correct the basic program of the QD51.
1320 [LAN CTRL.DOWN]
RUN:
The H/W self-diagnostics detected a LAN controller
Off
failure.
ERR.:
■Collateral information This suggests a CPU module hardware fault.
Flicker QnU*13
1321 • Common Information:– (Contact your local Mitsubishi representative.)
• Individual Information:–
CPU Status:
■Diagnostic Timing
• At power ON/ At reset Stop
*1 CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
*4 Function version is B or later.
*5 Function version is A.
*13 This applies to the Built-in Ethernet port QCPU.
12-10
Error LED Status Corresponding
Error Contents and Cause Corrective Action
Code CPU Status CPU
[SP. UNIT DOWN]
• There was no response from the intelligent
function module/special function module in the
1
initial processing.
When the unsupported module is mounted, remove
• The size of the buffer memory of the intelligent
it.
function module/special function module is
invalid.
When the corresponding module is supported, this 2
1401 suggests the intelligent function module/special
• The unsupported module is mounted.
function module, CPU module and/or base unit is
■Collateral information
expecting a hardware fault (Contact your local
• Common Information:Module No.(Slot No.)
• Individual Information:–
Mitsubishi representative.)
3
■Diagnostic Timing
• At power ON/ At reset/When intelligent function
module is accessed
[SP. UNIT DOWN]
The intelligent function module/special function
12
module was accessed in the program, but there
was no response. This suggests the intelligient function module/
1402
■Collateral information
• Common Information:Module No. (Slot No.)
special function module , CPU module and/or base
unit is expecting a hardware fault (Contact your
RUN: 6
Off/On
• Individual Information:Program error location local Mitsubishi representative.)
ERR.:
■Diagnostic Timing
Flicker/On
• When an intelligent function module access
instruction is executed
CPU Status:
6
[SP. UNIT DOWN] When the unsupported module is mounted, remove
Stop/
• The unsupported module is mounted. it.
When the corresponding module is supported, this Continue*2
■Collateral information
• Common Information:Module No. (Slot No.) suggests the intelligent function module/special 7
• Individual Information:– function module , CPU module and/or base unit is
■Diagnostic Timing expecting a hardware fault (Contact your local QCPU
• When an END instruction executed Mitsubishi representative.)
[SP. UNIT DOWN]
• There was no response from the intelligent
8
function module/special function module when
1403 the END instruction is executed.
• An error is detected at the intelligent function
module/special function module. The CPU module, base module and/or the
• The I/O module (intelligent function module/ intelligent function module/special function module
special function module) is nearly removed, that was accessed is experiencing a hardware
completely removed, or mounted during running. fault. (Contact your local Mitsubishi representative.)
*2 In the QCPU, either error stop or continue can be selected for each intelligent function module by the parameters.
12-11
Error LED Status Corresponding
Error Contents and Cause Corrective Action
Code CPU Status CPU
[CONTROL-BUS. ERR.]
The FROM/TO instruction is not executable, due to
a control bus error with the intelligent function
module/special function module. Reset the CPU module and RUN it again. If the
(On error occurring, the program error location is same error is displayed again, the intelligent
1412 stored in the individual information.) function module/special function module, CPU QCPU
■Collateral information module or base unit is faulty. (Contact your local
• Common Information:Module No. (Slot No.) Mitsubishi representative.)
• Individual Information:Program error location
■Diagnostic Timing
• During execution of FROM/TO instruction set
[CONTROL-BUS. ERR.]
• Remove the CPU module incompatible with the
In a multiple CPU system, a CPU module
multiple CPU system from the main base unit, or
incompatible with the multiple CPU system is
replace the CPU module incompatible with the
mounted. Q00J/Q00/Q01*4
multiple CPU system with a CPU module
■Collateral information Qn(H)*4
compatible with the multiple CPU system.
• Common Information:– QnPH
• The intelligent function module, CPU module or
• Individual Information:–
base unit is faulty. (Contact your local Mitsubishi
■Diagnostic Timing
representative.)
• Always
1413 RUN:
[CONTROL-BUS. ERR.]
Off
An error is detected on the system bus.
ERR.:
• Self-diagnosis error of the system bus.
Reset the CPU module and RUN it again. If the Flicker
• Self-diagnosis error of the CPU module
same error is displayed again, the intelligent
■Collateral information QCPU
function module, CPU module or base unit is faulty. CPU Status:
• Common Information:–
(Contact your local Mitsubishi representative.) Stop
• Individual Information:–
■Diagnostic Timing
• Always
[CONTROL-BUS. ERR.]
• Remove the CPU module incompatible with the
• Fault of a loaded module was detected.
multiple CPU system from the main base unit, or
• In a multiple CPU system, a CPU module
replace the CPU module with a CPU module
incompatible with the multiple CPU system is Q00J/Q00/Q01*4
compatible with the multiple CPU system.
mounted.
• Reset the CPU module and RUN it again. If the Qn(H)*4
■Collateral information QnPH
same error is displayed again, the intelligent
• Common Information:Module No. (Slot No.) QnU
function module, CPU module or base unit is
• Individual Information:–
faulty. (Contact your local Mitsubishi
1414 ■Diagnostic Timing
• Always representative.)
[CONTROL-BUS. ERR.]
An error is detected on the system bus. Q00J/Q00/Q01*4
Reset the CPU module and RUN it again. If the
■Collateral information Qn(H)
same error is displayed again, the intelligent
• Common Information:Module No. (Slot No.) QnPH
function module, CPU module or base unit is faulty.
• Individual Information:– QnPRH
(Contact your local Mitsubishi representative.)
■Diagnostic Timing QnU
• Always
12-12
Error LED Status Corresponding
Error Contents and Cause Corrective Action
Code CPU Status CPU
[CONTROL-BUS. ERR.]
Fault of the main or extension base unit was
detected.
Q00J/Q00/Q01 1
Qn(H)*4
■Collateral information
QnPH
• Common Information:Module No. (Slot No.)
QnPRH
• Individual Information:–
■Diagnostic Timing
QnU 2
• When an END instruction executed
1415 [CONTROL-BUS. ERR.]
Fault of the main or extension base unit was
detected.
Reset the CPU module and RUN it again. If the
3
■Collateral information *8
same error is displayed again, the intelligent Qn(H)
• Common Information:Module No. (Slot No.)
function module, CPU module or base unit is faulty. QnPH*8
• Individual Information:–
■Diagnostic Timing
• At power-ON/ At reset/ When an END instruction
(Contact your local Mitsubishi representative.)
12
executed
[CONTROL-BUS. ERR.]
System bus fault was detected at power-on or
reset.
6
Qn(H)*4
■Collateral information
QnPH
• Common Information:Module No. (Slot No.)
QnU
• Individual Information:–
■Diagnostic Timing 6
• At power ON/ At reset
1416
[CONTROL-BUS. ERR.]
In a multiple CPU system, a bus fault was detected RUN:
at power-on or reset.
■Collateral information
Off
ERR.: Q00/Q01*4
7
• Common Information:Module No. (Slot No.) Flicker QnU
• Individual Information:–
■Diagnostic Timing
• At power ON/ At reset
Reset the CPU module and RUN it again. If the
same error is displayed again, the intelligent
CPU Status:
Stop
8
[CONTROL-BUS. ERR.] function module, CPU module or base unit is faulty.
A reset signal error was detected on the system (Contact your local Mitsubishi representative.)
bus.
■Collateral information
1417 QnPRH
• Common Information:–
• Individual Information:–
■Diagnostic Timing
12-13
Error LED Status Corresponding
Error Contents and Cause Corrective Action
Code CPU Status CPU
[MULTI-C.BUS ERR.] • Take noise reduction measures.
The communication error with other CPU is • Check the main base unit mounting status of the
detected in the Multiple CPU high speed bus. CPU module.
■Collateral information • Reset the CPU module and RUN it again. If the
1431
• Common Information:Module No. (CPU No.) same error is displayed again, the CPU module
• Individual Information:– has hardware failure. (Contact your local
■Diagnostic Timing Mitsubishi representative, explaining a detailed
• At power ON/ At reset description of the problem.)
[MULTI-C.BUS ERR.]
The communication time out with other CPU is
Reset the CPU module and RUN it again. If the
detected in the Multiple CPU high speed bus.
same error is displayed again, the CPU module has
■Collateral information
1432 hardware failure. (Contact your local Mitsubishi
• Common Information:Module No. (CPU No.)
representative, explaining a detailed description of
• Individual Information:–
the problem.)
■Diagnostic Timing
• At power ON/ At reset
1433 [MULTI-C.BUS ERR.] • Take noise reduction measures.
1434 The communication error with other CPU is • Check the main base unit mounting status of the
detected in the Multiple CPU high speed bus. CPU module.
■Collateral information • Reset the CPU module and RUN it again. If the
RUN:
• Common Information:Module No. (CPU No.) same error is displayed again, the CPU module
1435 Off
• Individual Information:– has hardware failure. (Contact your local
ERR.:
■Diagnostic Timing Mitsubishi representative, explaining a detailed
• Always description of the problem.)
Flicker QnU*10
*10 The Universal model QCPU except the Q00UJCPU, Q00UCPU, Q01UCPU, and Q02UCPU.
12-14
Error LED Status Corresponding
Error Contents and Cause Corrective Action
Code CPU Status CPU
[SINGLE PS. DOWN]
The power supply voltage of either of redundant
power supply modules on the redundant base unit
1
dropped. Check the power supplied to the redundant power
1510 ■Collateral information supply modules mounted on the redundant base
• Common Information:Base No./ Power supply No.
• Individual Information:–
unit. RUN:
On
Qn(H)*6
2
■Diagnostic Timing ERR.:
• Always QnPH*6
On
QnPRH
[SINGLE PS. ERROR]
On the redundant base unit, the one damaged CPU Status: QnU*12 3
redundant power supply module was detected. Hardware fault of the redundant power supply Continue
■Collateral information module. (Contact your local Mitsubishi
1520
• Common Information:Base No./ Power supply No. representative, explaining a detailed description of
• Individual Information:–
■Diagnostic Timing
the problem.) 12
• Always
[BATTERY ERROR*3]
• The battery voltage in the CPU module has
dropped below stipulated level.
6
• Change the battery.
• The lead connector of the CPU module battery is
• If the battery is for program memory, standard
not connected.
RAM or for the back-up power function, install a
1600
• The lead connector of the CPU module battery is
not securely engaged.
lead connector.
• Check the lead connector of the CPU module for RUN:
QCPU 6
■Collateral information
looseness. Firmly engage the connector if it is On
• Common Information:Drive Name
loose. ERR.:
• Individual Information:–
■Diagnostic Timing
Off
7
• Always
CPU Status:
[BATTERY ERROR*3] Continue
Voltage of the battery on memory card has dropped
below stipulated level. Qn(H)
QnPH
8
■Collateral information
1601 Change the battery.
• Common Information:Drive Name QnPRH
• Individual Information:– QnU*14
■Diagnostic Timing
• Always
[FLASH ROM ERROR]
The number of writing to flash ROM (standard ROM
RUN:
and system securement area) exceeds 100,000
12-15
12.1.4 Error code list (2000 to 2999)
The following shows the error messages from the error code 2000 to 2999, the contents and
causes of the errors, and the corrective actions for the errors.
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[UNIT VERIFY ERR.]
In a multiple CPU system, a CPU module
incompatible with the multiple CPU system is
mounted.
■Collateral information Replace the CPU module incompatible with the
Qn(H)*3
• Common Information:Module No. (Slot No.) multiple CPU system with a CPU module
QnPH
[For Remote I/O network] compatible with the multiple CPU system.
Network No./Station No.
• Individual Information:–
■Diagnostic Timing
• When an END instruction executed
[UNIT VERIFY ERR.]
The I/O module status is different from the I/O
module information at power ON.
Read the error common information at the GX RUN:
• I/O module (or intelligent function module) is not
Developer, and check and/or change the module Off/On
installed properly or installed on the base unit.
that corresponds to the numerical value (module ERR.:
■Collateral information
number) there. Flicker/On Q00J/Q00/Q01
2000 • Common Information:Module No. (Slot No.)
Alternatively, monitor special registers SD150 to
[For Remote I/O network]
SD157 using GX Developer, and check and replace CPU Status:
Network No./Station No.
the module where the bit of its data is "1". Stop/
• Individual Information:–
■Diagnostic Timing Continue*1
• When an END instruction executed
[UNIT VERIFY ERR.] • Read the common information of the error using
I/O module information power ON is changed. the peripheral device, and check and/or change
• I/O module (or intelligent function module/special the module that corresponds to the numerical
function module) not installed properly or value (module number) there.
installed on the base unit. • Alternatively, monitor the special registers Qn(H)
■Collateral information SD1400 to SD1431 at a peripheral device, and QnPH
• Common Information:Module No. (Slot No.) change the fuse at the output module whose bit QnPRH
[For Remote I/O network] has a value of "1". QnU
Network No./Station No. • When a GOT is bus-connected to the main base
• Individual Information:– unit or extension base unit, check the connection
■Diagnostic Timing status of the extension cable and the grounding
• When an END instruction executed status of the GOT.
[UNIT VERIFY ERR.] RUN:
During operation, a module was mounted on the
Off/On
slot where the empty setting of the CPU module
ERR.:
was made. During operation, do not mount a module on the
Flicker/On Q00J/Q00/Q01*3
2001 ■Collateral information slot where the empty setting of the CPU module
QnU
• Common Information:Module No. (CPU No.) was made.
CPU Status:
• Individual Information:–
Stop/
■Diagnostic Timing
• When an END instruction executed Continue*2
*1 CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
*2 Either error stop or continue can be selected for each module by the parameters.
*3 The function version is B or later.
12-16
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[BASE LAY ERROR] 1
The QA1S6 B, QA6 B, or
QA6ADP+A5 B/A6 B was used as the base unit. Q00J/Q00/Q01*3
Do not use the QA1S6 B, QA6 B, or QnPH
■Collateral information
2
2011
• Common Information:Base No. QA6ADP+A5 B/A6 B as the base unit. QnPRH
• Individual Information:– QnU
■Diagnostic Timing
• At power ON/At reset
[BASE LAY ERROR]
The GOT is bus-connected to the main base unit of
3
the redundant system.
The following errors are detected in the CPU
redundant system compatible with the extension
base unit.
12
• The base unit other than the Q6 WRB is • Remove a bus connection cable for GOT
connected to the extension stage No.1. connection connected to the main base unit.
• The base unit is connected to any one of the
extension stages No.2 to No.7, although the
• Use the Q6 WRB (fixed to the extension stage
No.1)
6
Q6 WRB does not exist in the extension stage • Use the CPU module compatible with the
No.1 . extension base unit for the other system.
2012 • The other system CPU module is incompatible
with the extension base unit.
• Do not use the Q5 B, QA1S6 B, QA6 B or
QA6ADP+A5 B/A6 B for the base unit.
6
• The Q5 B, QA1S6 B, QA6 B or • Use the main base unit which has the same
QA6ADP+A5 B/A6 B is connected. number of slots.
• The number of slots of the main base unit for • Hardware failure of the Q6 WRB. (Contact your
RUN:
QnPRH*6 7
both systems is different. local Mitsubishi representative, explaining a
Off
Information of the Q6 WRB cannot be read detailed description of the problem.)
ERR.:
correctly. Flicker
■Collateral information
• Common Information:Base No.
8
CPU Status:
• Individual Information:–
Stop
■Diagnostic Timing
• At power ON/At reset
[BASE LAY ERROR]
Stage number of the Q6 WRB is recognized as
other than extension stage No.1 in the redundant
Hardware failure of the Q6 WRB. (Contact your
12-17
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SP. UNIT LAY ERR.]
The slot to which the QI60 is mounted is set to
other than Inteli (intelligent function module) or
Interrupt (interrupt module) in the I/O assignment of
Qn(H)*3
PLC parameter. Make setting again to match the PLC parameter I/O
QnPH
■Collateral information assignment with the actual loading status.
QnPRH
• Common Information:Module No. (Slot No.)
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[SP. UNIT LAY ERR.]
• In the I/O assignment setting of PLC parameter,
Inteli (intelligent function module) was allocated
to an I/O module or vice versa.
• In the I/O assignment setting of PLC parameter,
a module other than CPU (or nothing) was
allocated to the location of a CPU module or vice
versa.
• Make the PLC parameter’s I/O assignment
• In the I/O assignment setting of the PLC
setting again so it is consistent with the actual Qn(H)
parameter, switch setting was made to the
status of the intelligent function module and the QnPH
module that has no switch setting.
CPU module. QnPRH
• In the I/O assignment setting of the PLC
• Delete the switch setting in the I/O assignment QnU
parameter dialog box, the number of points
setting of the PLC parameter.
assigned to the intelligent function module is less
2100 than the number of points of the mounted
module.
RUN:
■Collateral information
Off
• Common Information:Module No. (Slot No.)
ERR.:
• Individual Information:–
Flicker
■Diagnostic Timing
• At power ON/At reset
CPU Status:
[SP. UNIT LAY ERR.]
Stop
• In the parameter I/O allocation settings, an Inteli
(intelligent function module) was allocated to a
location reserved for an I/O module or vice versa.
• In the parameter I/O allocation settings, a module
other than CPU (or nothing) was allocated to a
location reserved for a CPU module or vice
versa.
Reset the parameter I/O allocation setting to
• In the I/O assignment setting of the PLC
conform to the actual status of the intelligent Q00J/Q00/Q01
parameter dialog box, the number of points
function module and the CPU module.
assigned to the intelligent function module is less
than the number of points of the mounted
module.
■Collateral information
• Common Information:Module No. (Slot No.)
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[SP. UNIT LAY ERR.]
13 or more A-series special function modules
(except for the A1SI61) that can initiate an interrupt
to the CPU module have been installed. Reduce the A series special function modules
2101 ■Collateral information (except the A1SI61) that can make an interrupt Qn(H)
• Common Information:Module No. (Slot No.) start to the CPU module to 12 or less.
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
12-18
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SP. UNIT LAY ERR.]
Seven or more A1SD51S have been installed.
1
■Collateral information
2102 • Common Information:Module No. (Slot No.) Keep the number of A1SD51S to six or fewer. Qn(H)
• Individual Information:–
■Diagnostic Timing
2
• At power ON/At reset
[SP. UNIT LAY ERR.]
• Reduce the number of QI60/A1SI61 modules
• Two or more QI60/A1SI61 modules are mounted
in a single CPU system.
mounted in the single CPU system to one.
• Change the number of QI60/A1SI61 modules set
3
• Two or more QI60/A1SI61 modules are set to the
to the same control CPU to only one in the
same control CPU in a multiple CPU system.
multiple CPU system.
• Two or more A1SI61 modules are loaded in a Qn(H)*3
multiple CPU system.
■Collateral information
• Reduce the number of A1SI61 modules to only
one in the multiple CPU system. When using an
QnPH 12
interrupt module with each QCPU in a multiple
• Common Information:Module No. (Slot No.)
CPU system, replace it with the QI60. (Use one
• Individual Information:–
A1SI61 module + max. three QI60 modules or
■Diagnostic Timing
• At power ON/At reset
only the QI60 modules.) RUN: 6
Off
[SP. UNIT LAY ERR.]
ERR.:
Two or more QI60, A1SI61 interrupt modules have
Flicker
been mounted.
■Collateral information
Install only 1 QI60, A1SI61 module. CPU Status:
Qn(H) 6
• Common Information:Module No. (Slot No.) QnPRH
Stop
2103 • Individual Information:–
■Diagnostic Timing
• At power ON/At reset 7
[SP. UNIT LAY ERR.]
Two or more QI60 modules are mounted.
■Collateral information
• Common Information:Module No. (Slot No.)
• Individual Information:–
Reduce the QI60 modules to one. Q00J/Q00/Q01*5
8
■Diagnostic Timing
• At power ON/At reset
[SP. UNIT LAY ERR.]
Two or more QI60 modules where interrupt pointer
setting has not been made are mounted.
• Reduce the QI60 modules to one.
■Collateral information Q00J/Q00/Q01*3
• Make interrupt pointer setting to the second QI60
• Common Information:Module No. (Slot No.) QnU
module and later.
12-19
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SP.UNIT LAY ERR.]
• Two or more MELSECNET/H modules are
mounted.
• Reduce the number of MELSECNET/H modules
• Two or more CC-Link IE controller network
modules are mounted. to one.
• Two or more Ethernet modules are mounted. • Reduce the number of CC-Link IE controller Q00UJ
■Collateral information network modules to one.
• Common Information:Module No.
• Reduce the number of Ethernet modules to one.
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[SP.UNIT LAY ERR.]
• Five or more MELSECNET/H and CC-Link IE
controller network modules in total are mounted • Reduce the number of MELSECNET/H and CC-
in the entire system. Link IE controller network modules to four or less
• Two or more MELSECNET/H modules are
in total in the entire system.
mounted in the entire system.
• Two or more CC-Link IE controller network • Reduce the number of MELSECNET/H modules
modules are mounted in the entire system. to one in the entire system. Q00U/Q01U
• Two or more Ethernet modules are mounted in • Reduce the number of CC-Link IE controller
the entire system.
network modules to one in the entire system.
■Collateral information
• Common Information:Module No. • Reduce the number of Ethernet modules to one
• Individual Information:– in the entire system.
■Diagnostic Timing
• At power ON/At reset
[SP.UNIT LAY ERR.]
• Three or more MELSECNET/H and CC-Link IE
controller network modules in total are mounted RUN:
in the entire system. • Reduce the MELSECNET/H and CC-Link IE Off
• Three or more Ethernet interface modules are controller network modules up to two or less in ERR.:
2106 mounted in the entire system. the entire system. Flicker Q02U
■Collateral information • Reduce the Ethernet interface modules up to two
• Common Information:Module No. or less in the entire system. CPU Status:
• Individual Information:– Stop
■Diagnostic Timing
• At power ON/At reset
[SP.UNIT LAY ERR.]
• Five or more MELSECNET/H and CC-Link IE
controller network modules in total are mounted
in the entire system. • Reduce the MELSECNET/H and CC-Link IE
• Five or more Ethernet interface modules are controller network modules up to four or less in
mounted in the entire system. the entire system. QnU*7
■Collateral information • Reduce the Ethernet interface modules up to four
• Common Information:Module No. or less in the entire system.
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[SP.UNIT LAY ERR.]
• Three or more CC-Link IE controller network
modules are mounted in the entire system.
• Five or more MELSECNET/H and CC-Link IE • Reduce the CC-Link IE controller network
controller network modules in total are mounted modules up to two or less in the entire system. Qn(H)*6
in the entire system. • Reduce the total number of the MELSECNET/H QnPH*9
■Collateral information and CC-Link IE controller network modules up to QnPRH*9
• Common Information:Module No. four or less in the entire system.
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
12-20
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SP. UNIT LAY ERR.]
• Five or more MELSECNET/H modules have
1
been installed.
• Five or more Ethernet interface modules have • Reduce the number of MELSECNET/H modules
Qn(H)
been installed.
■Collateral information
to four or less.
• Reduce the number of Ethernet modules to four
QnPH 2
QnPRH
• Common Information:Module No. (Slot No.) or less.
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset 3
[SP. UNIT LAY ERR.]
• Two or more MELSECNET/H modules were
installed.
2106
• Two or more Ethernet modules were installed.
• Three or more CC-Link modules were installed.
• Reduce the MELSECNET/H modules to one or
less.
12
Q00J/Q00/Q01
■Collateral information • Reduce the Ethernet modules to one or less.
• Common Information:Module No. (Slot No.) • Reduce the CC-Link modules to two or less.
• Individual Information:–
■Diagnostic Timing
6
• At power ON/At reset
[SP. UNIT LAY ERR.]
• The same network number or same station
number is duplicated in the MELSECNET/H
RUN:
Off Q00J/Q00/Q01
6
network system.
ERR.: Qn(H)
■Collateral information • Check the network number and station number.
Flicker QnPH
• Common Information:Module No. (Slot No.)
• Individual Information:–
■Diagnostic Timing
CPU Status:
QnPRH
7
Stop
• At power ON/At reset
[SP. UNIT LAY ERR.]
The start X/Y set in the PLC parameter’s I/O
assignment settings is overlapped with the one for
8
Make the PLC parameter’s I/O assignment setting
another module.
again so it is consistent with the actual status of the
2107 ■Collateral information QCPU
intelligent function module/special function
• Common Information:Module No. (Slot No.)
modules.
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[SP. UNIT LAY ERR.]
12-21
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SP. UNIT ERROR]
• The location designated by the FROM/TO
instruction set is not the intelligent function
module/special function module.
• The module that does not include buffer memory
has been specified by the FROM/TO instruction.
• The intelligent function module/special function Q00J/Q00/Q01
module, Network module being accessed is Qn(H)*3
2110 faulty. QnPH
• Station not loaded was specified using the • Read the individual information of the error using QnPRH
instruction whose target was the CPU share the GX Developer, check the FROM/TO QnU
memory. instruction that corresponds to that numerical
■Collateral information value (program error location), and correct when
• Common Information:Module No. (Slot No.) necessary.
• Individual Information:Program error location • The intelligent function module/special function
■Diagnostic Timing module that was accessed is experiencing a
• When instruction executed hardware fault. Therefore, change the faulty
[SP. UNIT ERROR] module. Alternatively, contact your local
• The location designated by a link direct device Mitsubishi representative.
(J \ ) is not a network module.
• The I/O module (intelligent function module/
special function module) was nearly removed,
RUN:
2111 completely removed, or mounted during running.
Off/On
■Collateral information
ERR.:
• Common Information:Module No. (Slot No.)
Flicker/On
• Individual Information:Program error location
■Diagnostic Timing
CPU Status:
• When instruction executed
Stop/
[SP. UNIT ERROR]
• The module other than intelligent function Continue*1
QCPU
module/special function module is specified by
the intelligent function module/special function
module dedicated instruction.
Or, it is not the corresponding intelligent function
module/special function module.
2112 • There is no network No. specified by the network
dedicated instruction.
Or the relay target network does not exit. Read the individual information of the error using a
■Collateral information peripheral device, and check the special function
• Common Information:Module No. (Slot No.) module /special function module dedicated
• Individual Information:Program error location instruction (network instruction) that corresponds to
■Diagnostic Timing the value (program error part) to make modification.
• When instruction executed/STOP RUN
[SP. UNIT ERROR]
The module other than network module is specified
bythe network dedicated instruction.
■Collateral information Qn(H)
2113 • Common Information:FFFFH (fixed) QnPH
• Individual Information:Program error location
■Diagnostic Timing
• When instruction executed/STOP RUN
*1 CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
*3 The function version is B or later.
12-22
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SP. UNIT ERROR]
An instruction, which on execution specifies other
1
stations, has been used for specifying the host
CPU. (An instruction that does not allow the host Q00J/Q00/Q01*3
2114
CPU to be specified).
■Collateral information
Qn(H)*3
QnPH
2
• Common Information:Module No. (Slot No.)
QnU
• Individual Information:Program error location
■Diagnostic Timing
• When instruction executed/ STOP RUN 3
[SP. UNIT ERROR]
An instruction, which on execution specifies the
host CPU, has been used for specifying other
CPUs. (An instruction that does not allow other
Q00J/Q00/Q01*3
12
stations to be specified).
2115 Qn(H)*3
■Collateral information
• Common Information:Module No. (Slot No.) QnPH
• Individual Information:Program error location
■Diagnostic Timing
6
Read the individual information of the error using
• When instruction executed/ STOP RUN the GX Developer, check the program
[SP. UNIT ERROR] corresponding that value (program error location),
• An instruction that does not allow the under the
control of another CPU to be specified is being
and make correction. 6
RUN:
used for a similar task. Off/On
• Instruction was executed for the A or QnA ERR.:
2116 module under control of another CPU.
■Collateral information
Flicker/On
7
• Common Information:Module No. (Slot No.) CPU Status:
Q00J/Q00/
• Individual Information:Program error location Stop/Continue
■Diagnostic Timing Q01*3
• When instruction executed/ STOP RUN Qn(H)*3 8
QnPH
[SP. UNIT ERROR]
A CPU module that cannot be specified in the QnU
instruction dedicated to the multiple CPU system
was specified.
2117 ■Collateral information
• Common Information:Module No. (Slot No.)
• Individual Information:Program error location
12-23
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SP. UNIT LAY ERR.]
The locations of the Q5 B/Q6 B, QA1S6 B/
QA6 B, and QA6ADP+A5 B/A6 B are
improper. Q00J/Q00/Q01*4
2120 Check the location of the base unit. Qn(H)
■Collateral information
• Common Information:– QnPH
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[SP. UNIT LAY ERR.]
The CPU module is installed to other than the CPU
slot and slots 0 to 2.
■Collateral information Check the loading position of the CPU module and Qn(H)
2121
• Common Information:– reinstall it at the correct slot. QnPH
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[SP. UNIT LAY ERR.]
The QA1S6 B/QA6 B and QA6ADP+A5 B/
A6 B are used for the main base unit. Qn(H)
2122 ■Collateral information Replace the main base unit with a usable one. QnPH
• Common Information:– QnPRH
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset RUN:
[SP. UNIT LAY ERR.] Off
• A module is mounted on the 65th slot or later ERR.:
slot. Flicker
• Remove the module mounted on the 65th slot or
• A module is mounted on the slot whose number
later slot.
is greater than the number of slots specified at CPU Status:
• Remove the module mounted on the slot whose
[Slots] in [Standard setting] of the base setting. Stop
number is greater than the number of slots Qn(H)
• A module is mounted on the slot whose number
specified at [Slots] in [Standard setting] of the QnPH
of I/O points exceeds 4096 points.
base setting. QnPRH
• A module is mounted on the slot whose number
• Remove the module mounted on the slot whose QnU*7
of I/O points strides 4096 points.
number of I/O points exceeds 4096 points.
■Collateral information
• Replace the module with the one whose number
• Common Information:–
of occupied points does not exceed 4096 points.
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
2124 [SP. UNIT LAY ERR.]
• A module is mounted on after the 25th slot (on
after the 17th slot for the Q00UJ).
• Remove the module mounted on after the 25th
• A module is mounted on the slot whose number
is later than the one set in the "Base setting" on (on after the 17th slot for the Q00UJ).
the I/O assignment tab of PLC parameter in GX • Remove the module mounted on the slot whose
Developer. number is later than the one set in the "Base
• A module is mounted on the slot for which I/O setting" on the I/O assignment tab of PLC
points greater than 1024 (greater than 256 for
parameter in GX Developer. Q00UJ
the Q00UJ) is assigned.
• Remove the module mounted on the slot for Q00U/Q01U
• A module is mounted on the slot for which I/O
points is assigned from less than 1024 to greater which I/O points greater than 1024 (greater than
than 1024 (from less than 256 to greater than 256 for the Q00UJ) is assigned.
256 for the Q00UJ). • Replace the end module with the one whose
■Collateral information number of occupied points is within 1024 (within
• Common Information:–
256 for the Q00UJ).
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
12-24
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SP. UNIT LAY ERR.]
• A module is mounted on the 37th slot or later
1
slot. • Remove the module mounted on the 37th slot or
• A module is mounted on the slot whose number later slot.
is greater than the number of slots specified at • Remove the module mounted on the slot whose
[Slots] in [Standard setting] of the base setting.
• A module is mounted on the slot whose number
number is greater than the number of slots 2
specified at [Slots] in [Standard setting] of the
of I/O points exceeds 2048 points. Q02U
• A module is mounted on the slot whose number base setting.
of I/O points strides 2048 points. • Remove the module mounted on the slot whose
■Collateral information
• Common Information:–
number of I/O points exceeds 2048 points.
• Replace the module with the one whose number
3
• Individual Information:– of occupied points does not exceed 2048 points.
■Diagnostic Timing
• At power ON/At reset
[SP. UNIT LAY ERR.] 12
• A module is mounted on the 25th slot or later
slot. (The 17th slot or later slot for the Q00J.) • Remove the module mounted on the 25th slot or
• A module is mounted on the slot whose number later slot. (The 17th slot or later slot for the
is greater than the number of slots specified at
[Slots] in [Standard setting] of the base setting.
Q00J.)
• Remove the module mounted on the slot whose
6
2124
• A module is mounted on the slot whose number number is greater than the number of slots
of I/O points exceeds 1024 points. (256 points for specified at [Slots] in [Standard setting] of the RUN:
the Q00J.)
• A module is mounted on the slot whose number
base setting.
• Remove the module mounted on the slot whose
Off
ERR.:
Q00J/Q00/Q01
6
of I/O points strides 1024 points. (256 points for number of I/O points exceeds 1024 points. (256 Flicker
the Q00J.) points for the Q00J.)
7
■Collateral information • Replace the module with the one whose number CPU Status:
• Common Information:– of occupied points does not exceed 1024 points. Stop
• Individual Information:– (256 points for the Q00J.)
■Diagnostic Timing
• At power ON/At reset
[SP. UNIT LAY ERR.] 8
5 or more extension base units were added. (3
bases for Q00J)
■Collateral information Remove 5 or more extension base units. (3 bases
Q00J/Q00/Q01*4
• Common Information:– for Q00J)
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[SP. UNIT LAY. ERR.]
12-25
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SP. UNIT LAY. ERR.]
CPU module locations in a multiple CPU system
are either of the following. • Mount modules on the available slots so that the
• There are empty slots between the QCPU and empty slots will be located on the right-hand side
QCPU/motion controller. of the CPU module.
• A module other than the High Performance • Remove the module mounted on the left-hand
model QCPU/Process CPU (including the motion side of the High Performance model QCPU/ Qn(H)*3
2126
controller) is mounted on the left-hand side of the Process CPU, and mount the High Performance QnPH
High Performance model QCPU/Process CPU. model QCPU/Process CPU on the empty slot.
■Collateral information Mount the motion CPU on the right-hand side of
• Common Information:Module No. (Slot No.) the High Performance model QCPU/Process
• Individual Information:– CPU.
■Diagnostic Timing
• At power ON/ At reset
[SP.UNIT LAY ERR.]
The unusable module is mounted on the extension
base unit in the redundant system.
■Collateral information • Remove the unusable module from the extension
2128 QnPRH*6
• Common Information:Module No. base unit.
• Individual Information:– RUN:
■Diagnostic Timing Off
• At power-ON/ At reset ERR.:
[SP. UNIT VER. ERR.] Flicker
In a multiple CPU system, the control CPU of the
intelligent function module incompatible with the • Change the intelligent function module for the CPU Status:
multiple CPU system is set to other than CPU No.1. one compatible with the multiple CPU system Stop Q00J/Q00/Q01
■Collateral information (function version B).
2150 QnPH
• Common Information:Module No. (Slot No.) • Change the setting of the control CPU of the
QuU*10
• Individual Information:– intelligent function module incompatible with the
■Diagnostic Timing multiple CPU system to CPU No.1.
• At power ON/At reset/
At writing to progurammable controller
[SP. UNIT VER. ERR.]
Either of the following modules incompatible with
the redundant system has been mounted in a
redundant system.
• CC-Link IE controller network modules Use either of the following modules compatible with
• MELSECNET/H modules the redundant system.
2151 • Ethernet modules • CC-Link IE controller network modules QnPRH
■Collateral information • MELSECNET/H modules
• Common Information:Module No. (Slot No.) • Ethernet modules
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset/
At writing to progurammable controller
12-26
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[MISSING PARA.]
There is no parameter file in the drive specified as
1
valid parameter drive by the DIP switches. • Check and correct the valid parameter drive
Qn(H)
■Collateral information settings made by the DIP switches.
QnPH
• Common Information:Drive Name
• Individual Information:–
• Set the parameter file to the drive specified as
valid parameter drive by the DIP switches.
QnPRH 2
■Diagnostic Timing
• At power ON/At reset/ STOP RUN
[MISSING PARA.]
There is no parameter file at the program memory.
3
■Collateral information
2200 • Common Information:Drive Name Set the parameter file to the program memory. Q00J/Q00/Q01
• Individual Information:–
■Diagnostic Timing 12
• At power ON/At reset/ STOP RUN
[MISSING PARA.]
Parameter file does not exist in all drives where
parameters will be valid. 6
■Collateral information
• Common Information:Drive Name Set a parameter file in a drive to be valid. QuU
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset/ STOP RUN RUN:
6
Off
[BOOT ERROR]
ERR.:
The contents of the boot file are incorrect. Q00J/Q00/Q01*3
2210
■Collateral information
• Common Information:Drive name Check the boot setting.
Flicker
Qn(H)
QnPH
7
• Individual Information:– CPU Status:
QnPRH
■Diagnostic Timing Stop
QnU
• At power ON/ At reset
[BOOT ERROR] 8
File formatting is failed at a boot.
• Reboot.
■Collateral information Qn(H)
• CPU module hardware fault. (Contact your local
2211 • Common Information:Drive name QnPRH
Mitsubishi representative, explaining a detailed
• Individual Information:– QnU
description of the problem.)
■Diagnostic Timing
• At power ON/ At reset
[RESTORE ERROR]
12-27
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[RESTORE ERROR]
• The device information backuped by the device
data backup function is incomplete. (Turning
power supply OFF or reset is suspected.)
Do not return the data when this error occurs. Also,
delete the incomplete device information at the time
2221 Reset the CPU module and run it again.
of this error occurrence.
■Collateral information
• Common Information:File name/ Drive name
• Individual Information:–
■Diagnostic Timing
• At power ON/ At reset
[RESTORE ERROR]
The model name of the restoration destination CPU
module is different from the one of the backup
source CPU module.
Execute a restore for the CPU module whose name
2225 ■Collateral information
is same as the backup source CPU module.
• Common Information:–
• Individual Information:– RUN:
■Diagnostic Timing Off
• At power ON/ At reset ERR.:
[RESTORE ERROR] Flicker QnU
• ·The backup data file is destroyed. (The content
of the file is different from the check code. CPU Status:
• Reading the backup data from the memory card Stop
is not successfully completed.
• Since the write protect switch of the SRAM card • Execute a restore of other backup data because
is set to on (write inhibited), the checked the backup data may be destructed.
2226
"Restore for the first time only" setting cannot be • Set the write protect switch of the SRAM card to
performed. off (write enabled).
■Collateral information
• Common Information:–
• Individual Information:–
■Diagnostic Timing
• At power ON/ At reset
[RESTORE ERROR]
Writing the backup data to the restoration
destination drive is not successfully completed.
■Collateral information Execute a restore for the other CPU module too
2227
• Common Information:File name/Drive name because the CPU module may be damaged.
• Individual Information:–
■Diagnostic Timing
• At power ON/ At reset
[ICM. OPE. ERROR]
• A memory card was removed without switching RUN:
the memory card in/out switch OFF. Off/On
• The memory card in/out switch is turned ON • Remove memory card after placing the memory ERR.: Qn(H)
although a memory card is not actually installed. card in/out switch OFF. Flicker/On QnPH
2300
■Collateral information • Turn on the card insert switch after inserting a QnPRH
• Common Information:Drive name memory card. CPU Status: QnU*11
• Individual Information:– Stop/
■Diagnostic Timing Continue*1
• When memory card is inserted or removed
*1 CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
*11 The Universal model QCPU except the Q00UJCPU, Q00UCPU, and Q01UCPU.
12-28
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[ICM. OPE. ERROR]
• The memory card has not been formatted.
1
• Memory card format status is incorrect.
• The QCPU file does not exist in the Flash card. Qn(H)
• Format memory card.
■Collateral information
• Common Information:Drive name
• Reformat memory card.
QnPH
QnPRH 2
• Write the QCPU file the Flash card
• Individual Information:– QnU*11
■Diagnostic Timing
• When memory card is inserted or removed/When
memory card is inserted 3
2301 [ICM. OPE. ERROR] RUN:
SRAM card failure is detected. (It occurs when
Off/On
automatic format is not set.)
ERR.:
Writing parameters was performed duruing setting
file registers.
Format SRAM card after changing battery of SRAM Flicker/On 12
card.
■Collateral information
CPU Status: QnU*11
Write a parameter, which set the file register at "Not
• Common Information:Drive name
available", in CPU, and then perform the ioperation. Stop/
• Individual Information:–
■Diagnostic Timing
Continue*1 6
• When memory card is inserted or removed/When
memory card is inserted
[ICM. OPE. ERROR]
A memory card that cannot be used with the CPU 6
module has been installed. Qn(H)
• Format memory card.
■Collateral information QnPH
2302 • Reformat memory card.
• Common Information:Drive name QnPRH
• Individual Information:–
■Diagnostic Timing
• Check memory card.
QnU*11 7
• When memory card is inserted or removed
[FILE SET ERROR]
Automatic write to standard ROM was performed
on the CPU module that is incompatible with
8
• Execute automatic write to standard ROM on the
automatic write to standard ROM.
CPU module which is compatible with automatic
(Memory card where automatic write to standard
write to standard ROM.
ROM was selected in the boot file was fitted and
• Using GX Developer, perform write of Qn(H)*3
the parameter enable drive was set to the memory
parameters and programs to standard ROM. QnPH
card.)
• Change the memory card for the one where QnPRH
■Collateral information RUN:
automatic write to standard ROM has not been
• Common Information:File name/ Drive name Off
set, and perform boot operation from the memory
*1 CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
*3 The function version is B or later.
*11 The Universal model QCPU except the Q00UJCPU, Q00UCPU, and Q01UCPU.
12-29
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[FILE SET ERROR]
Program memory capacity was exceeded by
performing boot operation or automatic write to
standard ROM.
Qn(H)*3
■Collateral information
QnPH
• Common Information:File name/ Drive name
QnPRH
• Individual Information:Parameter number
■Diagnostic Timing • Check and correct the parameters (boot setting).
• At power ON/At reset/ • Delete unnecessary files in the program memory.
At writing to progurammable controller • Choose "Clear program memory" for boot in the
[FILE SET ERROR] parameter so that boot is started after the
Program memory capacity was exceeded by program memory is cleared.
performing boot operation.
■Collateral information
• Common Information:File name/ Drive name QnU
• Individual Information:Parameter number
■Diagnostic Timing
• At power ON/At reset/
At writing to progurammable controller
[FILE SET ERROR] RUN:
The file specified by parameters cannot be made. • Read the individual information of the error using Off
■Collateral information the peripheral device, check to be sure that the ERR.:
2401 • Common Information:File name/ Drive name parameter drive name and file name correspond Flicker
QCPU
• Individual Information:Parameter number to the numerical values there (parameter
■Diagnostic Timing number), and correct. CPU Status:
• At power ON/At reset/ At writing to • Check the space remaining in the memory card. Stop
progurammable controller
[FILE SET ERROR]
• Although setting is made to use the device data
storage file, there is no empty capacity required
for creating the device data storage file in the
standard ROM.
• When the latch data backup function (to standard
ROM) is used, there is no empty capacity
required for storing backup data in standard
ROM. (The parameter number "FFFFH" is
Secure the empty capacity of the standard ROM. QnU
displayed for the error individual information.)
• Standard RAM capacity is insufficient that error
history of the module cannot be stored.
■Collateral information
• Common Information:File name/ Drive name
• Individual Information:Parameter number
■Diagnostic Timing
• At power ON/At reset/ At writing to
progurammable controller
[FILE OPE. ERROR]
• The specified program does not exist in the
• Read the individual information of the error using
program memory. RUN:
the peripheral device, check to be sure that the
This error may occur when the ECALL, EFCALL, Off/On
program corresponds to the numerical values
PSTOP, PSCAN, POFF or PLOW instruction is ERR.: Qn(H)
there (program location), and correct.
executed. Flicker/On QnPH
2410 Create a file created using parameters, and load
• The specified file does not exist. QnPRH
it to the CPU module.
■Collateral information CPU Status: QnU
• In case a specified file does not exist, write the
• Common Information:File name/ Drive name Stop/
file to a target memory and/or check the file
• Individual Information:Program error location Continue*1
specified with the instruction again.
■Diagnostic Timing
• When instruction executed
*1 CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
*3 The function version is B or later.
12-30
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[FILE OPE. ERROR]
• The file is the one which cannot be specified by
1
the sequence program (such as comment file).
• The specified program exists in the program
memory, but has not been registered in the
program setting of the Parameter dialog box.
Read the individual information of the error using Qn(H) 2
the peripheral device, check to be sure that the QnPH
2411 This error may occur when the ECALL, EFCALL,
program corresponds to the numerical values there QnPRH
PSTOP, PSCAN or POFF instruction is executed.
(program location), and correct. QnU
■Collateral information
• Common Information:File name/ Drive name 3
• Individual Information:Program error location RUN:
■Diagnostic Timing Off/On
• When instruction executed
ERR.:
[FILE OPE. ERROR]
The SFC program file is one that cannot be
Flicker/On 12
designated by the sequence program. Read the individual information of the error using Qn(H)
CPU Status:
■Collateral information the peripheral device, check to be sure that the QnPH
2412 Stop/
• Common Information:File name/ Drive name
• Individual Information:Program error location
program corresponds to the numerical values there
(program location), and correct.
Continue*1
QnPRH
QnU
6
■Diagnostic Timing
• When instruction executed
[FILE OPE. ERROR]
No data has been written to the file designated by Read the individual information of the error using 6
the sequence program. the peripheral device, check to be sure that the
Qn(H)
■Collateral information program corresponds to the numerical values there
2413 QnPH
• Common Information:File name/ Drive name (program location), and correct.
• Individual Information:Program error location
■Diagnostic Timing
Check to ensure that the designated file has not
QnPRH
7
been write protected.
• When instruction executed
[CAN'T EXE. PRG.]
• There is a program file that uses a device that is
out of the range set in the PLC parameter device
• Read the common information of the error using
the peripheral device, check to be sure that the
8
setting. parameter device allocation setting and the
• After the PLC parameter setting is changed, only program file device allocation correspond to the
the parameter is written into the PLC. numerical values there (file name), and correct if QCPU
■Collateral information necessary. RUN:
• Common Information:File name/ Drive name • If PLC parameter device setting is changed, Off
• Individual Information:– batch-write the parameter and program file into ERR.:
2500 ■Diagnostic Timing the PLC. Flicker
*1 CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
12-31
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[CAN'T EXE. PRG.]
There are multiple program files although "none"
has been set at the PLC parameter program
Qn(H)
settings.
Edit the PLC parameter program setting to "yes". QnPH
■Collateral information
• Common Information:File name/ Drive name Alternatively, delete unneeded programs. QnPRH
• Individual Information:– QnU
■Diagnostic Timing
• At power ON/At reset/ STOP RUN
2501
[CAN'T EXE. PRG.]
• There are three or more program files.
• The program name differs from the program
contents. • Delete unnecessary program files.
■Collateral information • Match the program name with the program Q00J/Q00/Q01
• Common Information:File name/ Drive name contents.
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset/ STOP RUN
[CAN'T EXE. PRG.]
The program file is incorrect.
Alternatively, the file contents are not those of a
sequence program. Check whether the program version
■Collateral information is .QPG, and check the file contents to be QCPU
• Common Information:File name/ Drive name
sure they are for a sequence program.
• Individual Information:–
■Diagnostic Timing
RUN:
2502 • At power ON/At reset/ STOP RUN Off
[CAN'T EXE. PRG.] ERR.:
The program file is not the one for the redundant Flicker
CPU. Create a program using GX Developer or PX
■Collateral information Developer for which the PLC type has been set to CPU Status:
• Common Information:File name/ Drive name QnPRH
the redundant CPU (Q12PRH/Q25PRH), and write Stop
• Individual Information:– it to the CPU module.
■Diagnostic Timing
• At power ON/At reset/ STOP RUN
[CAN'T EXE. PRG.]
There are no program files at all.
■Collateral information
2503 • Common Information:File name/ Drive name QCPU
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset/ STOP RUN
• Check program configuration.
[CAN'T EXE. PRG.]
• Check parameters and program configuration.
Two or more SFC normal programs or control
programs have been designated. Qn(H)
■Collateral information QnPH
• Common Information:File name/ Drive name QnPRH
• Individual Information:– QnU
■Diagnostic Timing
2504 • At power ON/At reset/ STOP RUN
[CAN'T EXE. PRG.]
There are two or more SFC programs.
■Collateral information
• Common Information:File name/ Drive name Reduce the SFC programs to one. Q00J/Q00/Q01*3
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset/ STOP RUN
12-32
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
Check for illegal accesses. If any illegal access is 1
identified, take actions such as disabling
[REMOTE PASS.FAIL] communication of the connection.
RUN:
The count of remote password mismatches If no illegal access is identified, clear the error and
ON
reached the upper limit.
■Collateral information
perform the following. (Clearing the error also
clears the count of remote password mismatches.)
ERR.: 2
2700 ON
• Common Information:– • Check if the remote password sent is correct.
• Individual Information:– • Check if the remote password has been locked.
CPU Status:
■Diagnostic Timing
• Always
• Check if concurrent access was made from
multiple devices to one connection by UDP.
Continue 3
QnU*8
• Check if the upper limit of the remote password
mismatch count is too low.
12
[SNTP OPE.ERROR]
RUN:
Time setting failed when the programmable • Check if the time setting function is set up
Off/ON
controller was powered ON or reset. correctly.
ERR.:
■Collateral information • Check if the specified SNTP server is operating
2710 Flicker/ON
• Common Information:– normally, or if any failure has occurred on the
• Individual Information:–
■Diagnostic Timing
network connected to the specified SNTP server
computer.
CPU Status: 6
• When time setting function is executed Stop/Continue
12-33
12.1.5 Error code list (3000 to 3999)
The following shows the error messages from the error code 3000 to 3999, the contents and
causes of the errors, and the corrective actions for the errors.
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[PARAMETER ERROR]
In a multiple CPU system, the intelligent function
module under control of another CPU is specified in
the interrupt pointer setting of the PLC parameter. • Specify the head I/O number of the intelligent
Qn(H)*1
■Collateral information function module under control of the host CPU.
QnPH
• Common Information:File name/ Drive name • Delete the interrupt pointer setting of the
• Individual Information:Parameter number parameter. QnU*10
■Diagnostic Timing
• At power ON/At reset/STOP RUN/
At writing to progurammable controller
[PARAMETER ERROR]
The PLC parameter settings for timer time limit
setting, the RUN-PAUSE contact, the common
pointer number, general data processing, number
of empty slots, system interrupt settings, baud rate
setting, and service processing setting are outside
the range that can be used by the CPU module. QCPU
■Collateral information
• Common Information:File name/ Drive name
• Individual Information:Parameter number
■Diagnostic Timing
• At power ON/At reset/STOP RUN/
At writing to progurammable controller
[PARAMETER ERROR]
In a program memory check, the check capacity RUN:
has not been set within the range applicable for the Off
CPU module. ERR.:
3000 ■Collateral information Flicker QnPH
• Read the individual information of the error using
• Common Information:File name/ Drive name the peripheral device, check the parameter item QnPRH*5
• Individual Information:Parameter number CPU Status:
corresponding to the numerical value (parameter
■Diagnostic Timing Stop
No.), and correct it.
• At power ON/At reset/STOP RUN/ • Rewrite corrected parameters to the CPU
At writing to progurammable controller module, reload the CPU power supply and/or
[PARAMETER ERROR] reset the module.
The parameter settings in the error individual • If the same error occurs, it is thought to be a
information (special register SD16) are illegal. hardware error. (Contact your local Mitsubishi
■Collateral information representative.)
• Common Information:File name/ Drive name QCPU
• Individual Information:Parameter number
■Diagnostic Timing
• At power ON/At reset/STOP RUN/
At writing to progurammable controller
[PARAMETER ERROR]
The ATA card is set to the memory card slot when
the specified drive for the file register is set to
“memory card (ROM)” and [Use the following file]
or [Use the same file name as the program] (either
one is allowed) is set in the PLC file setting.
■Collateral information QnU*11
• Common Information:File name/ Drive name
• Individual Information:Parameter number
■Diagnostic Timing
• At power ON/At reset/STOP RUN/
At writing to progurammable controller
12-34
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
• Read the individual information of the error using 1
[PARAMETER ERROR] the peripheral device, check the parameter item
The parameter settings are corrupted. corresponding to the numerical value (parameter
■Collateral information No.), and correct it.
3001
• Common Information:File name/ Drive name
• Individual Information:Parameter number
• Rewrite corrected parameters to the CPU
module, reload the CPU power supply and/or
QCPU 2
■Diagnostic Timing reset the module.
• At power ON/At reset/STOP RUN/ • If the same error occurs, it is thought to be a
At writing to progurammable controller hardware error. (Contact your local Mitsubishi
representative.) 3
[PARAMETER ERROR]
When "Use the following file" is selected for the file
register in the PLC file setting of the PLC parameter
dialog box, the specified file does not exist although 12
the file register capacity has been set. Qn(H)
■Collateral information QnPH
• Common Information:File name/ Drive name QnPRH
• Individual Information:Parameter number
■Diagnostic Timing
6
• At power ON/At reset/STOP RUN/ RUN:
Off
At writing to progurammable controller
[PARAMETER ERROR]
When [Use the following file] is set for the file
ERR.:
Flicker 6
• Read the individual information of the error using
register in the PLC file setting of the PLC parameter the peripheral device, check the parameter item
CPU Status:
dialog box and the capacity of file register is not set, corresponding to the numerical value (parameter
Stop
the file register file does not exist in the specified
target memory.
No.), and correct it.
• Rewrite corrected parameters to the CPU
7
3002
■Collateral information QnU*10
module, reload the CPU power supply and/or
• Common Information:File name/ Drive name reset the module.
• Individual Information:Parameter number
■Diagnostic Timing
• If the same error occurs, it is thought to be a
hardware error. (Contact your local Mitsubishi 8
• At power ON/At reset/STOP RUN/ representative.)
At writing to progurammable controller
[PARAMETER ERROR]
When [Use the following file.] is set for the device
data storage file in [PLC file] of [PLC parameter],
and [Capacity] is not set, the device data storage
file does not exist in the target memory.
12-35
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[PARAMETER ERROR]
The automatic refresh range of the multiple CPU
system exceeded the file register capacity.
Qn(H)*1
■Collateral information Change the file register file for the one refresh-
QnPH
• Common Information:File name/ Drive name enabled in the whole range.
• Individual Information:Parameter number QnU*10
■Diagnostic Timing
• When an END instruction executed
[PARAMETER ERROR]
3003 • Read the individual information of the error using
The number of devices set at the PLC parameter
the peripheral device, check the parameter item
device settings exceeds the possible CPU module
corresponding to the numerical value (parameter
range.
No.), and correct it.
■Collateral information
• Common Information:File name/ Drive name • If the error is still generated following the
• Individual Information:Parameter number correction of the parameter settings, the possible
■Diagnostic Timing cause is the memory errorm of the CPU module's
program memory or the memory card. (Contact
• At power-On/ At reset/ STOP RUN/
your local Mitsubishi representative.)
At writing to progurammable controller
QCPU
[PARAMETER ERROR]
The parameter file is incorrect.
Alternatively, the contents of the file are not
parameters.
Check whether the parameter file version
■Collateral information
3004 • Common Information:File name/ Drive name is .QPA, and check the file contents to be
• Individual Information:Parameter number sure they are parameters. RUN:
■Diagnostic Timing Off
• At power-On/ At reset/ STOP RUN/ ERR.:
Flicker
At writing to progurammable controller
• Read the individual information of the error using
CPU Status:
the peripheral device, check the parameter item
Stop
[PARAMETER ERROR] corresponding to the numerical value (parameter
The contents of the parameter are broken. No.), and correct it.
■Collateral information • Write the modified parameter items to the CPU Qn(H)*7
3005 • Common Information:File name/ Drive name module again, and power-on the Programmable QnPH*9
• Individual Information:Parameter number Controller or reset the CPU module. QnPRH*9
■Diagnostic Timing • When the same error occurs again, the hardware
• At power-ON/ At reset/ STOP RUN is faulty. Contact your local Mitsubishi
representative, explaining a detailed description
of the problem.
[PARAMETER ERROR] • Delete the setting of the Q02CPU' s high speed
• The high speed interrupt is set in a Q02CPU. interrupt. To use high speed interrupts, change
• The high speed interrupt is set in a multiple CPU the CPU module to one of the Q02H/Q06H/
system. Q12H/Q25HCPU.
• The high speed interrupt is set when aQA1S6 B • To use a multiple CPU system, delete the setting
of the high-speed interrupt. To use high speed
or QA6 B is used.
interrupts, change the system to a single CPU
• No module is installed at the I/O address
3006 system. Qn(H)*4
designated by the high speed interrupt.
• To use either the QA1S6 B or QA6 B, delete
■Collateral information
• Common Information:File name/ Drive name the setting of the high speed interrupt. To use
• Individual Information:Parameter number high speed interrupts, do not use the QA1S6 B/
■Diagnostic Timing QA6 B.
• At power-On/ At reset/ STOP RUN/ • Re-examine the I/O address designated by the
At writing to progurammable controller high speed interrupt setting.
12-36
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[PARAMETER ERROR]
The parameter file in the drive specified as valid
1
parameter drive by the DIP switches is inapplicable
for the CPU module.
Create parameters using GX Developer, and write
3007
■Collateral information
• Common Information:File name/ Drive name them to the drive specified as valid parameter drive QnPRH 2
• Individual Information:Parameter number by the DIP switches.
■Diagnostic Timing
3
• At power-On/ At reset/ STOP RUN/
At writing to progurammable controller
[PARAMETER ERROR]
In a multiple CPU system, the modules for AnS, A,
Q2AS and QnA have been set to multiple control
CPUs. Re-set the parameter I/O assignment to control 12
■Collateral information them under one CPU module. (Change the
3009 • Common Information:File name/ Drive name Qn(H)*1
parameters of all CPUs in the multiple CPU
• Individual Information:Parameter number system.) RUN:
■Diagnostic Timing Off 6
• At power-On/ At reset/ STOP RUN/ ERR.:
At writing to progurammable controller Flicker
[PARAMETER ERROR]
The parameter-set number of CPU modules differs
from the actual number in a multiple CPU system.
CPU Status:
Stop
6
Match the number of (CPU modules in multiple
■Collateral information
• Common Information:File name/ Drive name CPU setting) - (CPUs set as empty in I/O Qn(H)*1
3010
assignment) with that of actually mounted CPU QnPH
• Individual Information:Parameter number
■Diagnostic Timing modules. 7
• At power-On/ At reset/ STOP RUN/
At writing to progurammable controller
[PARAMETER ERROR]
Multiple CPU setting or control CPU setting differs
8
from that of the reference CPU settings in a
multiple CPU system.
Match the multiple CPU setting or control CPU Q00/Q01*1
■Collateral information
3012 • Common Information:File name/ Drive name setting in the PLC parameter with that of the Qn(H)*1
• Individual Information:Parameter number reference CPU (CPU No.1) settings. QnU
■Diagnostic Timing
• At power-On/ At reset/ STOP RUN/
12-37
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[PARAMETER ERROR]
Multiple CPU auto refresh setting is any of the
followings in a multiple CPU system.
• When a bit device is specified as a refresh
Check the following in the multiple CPU auto
device, a number other than a multiple of 16 is
refresh setting and make correction.
specified for the refresh-starting device.
• When specifying the bit device, specify a multiple
• The device specified is other than the one that
may be specified.
of 16 for the refresh starting device. Qn(H)*1
• Specify the device that may be specified for the QnPH
• The number of send points is an odd number.
refresh device.
■Collateral information
• Common Information:File name/ Drive name • Set the number of send points to an even
• Individual Information:Parameter number number.
■Diagnostic Timing
• At power-On/ At reset/ STOP RUN/
At writing to progurammable controller
[PARAMETER ERROR]
In a multiple CPU system, the multiple CPU auto
refresh setting is any of the following.
• The total number of transmission points is
greater than the maximum number of refresh Check the following in the multiple CPU auto
points. refresh setting and make correction.
■Collateral information Q00/Q01*1
• The total number of transmission points is within
3013 • Common Information:File name/ Drive name the maximum number of refresh points.
• Individual Information:Parameter number
■Diagnostic Timing
• At power-On/ At reset/ STOP RUN/
At writing to progurammable controller RUN:
[PARAMETER ERROR] Off
In a multiple CPU system, the multiple CPU auto ERR.:
refresh setting is any of the following. Flicker
• The device specified is other than the one that Check the following in the multiple CPU auto
may be specified. refresh setting and make correction. CPU Status:
• The number of send points is an odd number. • Specify the device that may be specified for the Stop
• The total number of send points is greater than refresh device.
the maximum number of refresh points. • Set the number of send points to an even
• The setting of the refresh range crosses over the number.
boundary between the internal user device and QnU*10
• Set the total number of send points within the
the extended data register (D) or extended link range of the maximum number of refresh points.
register (W). • Set the refresh range so that it does not cross
■Collateral information over the boundary between the internal user
• Common Information:File name/ Drive name device and the extended data register (D) or
• Individual Information:Parameter number extended link register (W).
■Diagnostic Timing
• At power-On/ At reset/ STOP RUN/
At writing to progurammable controller
[PARAMETER ERROR]
• In a multiple CPU system, the online module
change parameter (multiple CPU system
parameter) settings differ from those of the
reference CPU. • Match the online module change parameter with
• In a multiple CPU system, the online module
that of the reference CPU.
change setting is enabled although the CPU Qn(H)
• If the CPU module that does not support online
3014 module mounted does not support online module QnPH
chang parameter. module change is mounted, replace it with the
QnU*8
■Collateral information CPU module that supports online module
• Common Information:File name/ Drive name change.
• Individual Information:Parameter number
■Diagnostic Timing
• At power-On/ At reset/ STOP RUN/
At writing to progurammable controller
12-38
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[PARAMETER ERROR]
In a multiple CPU system configuration, the CPU
1
verified is different from the one set in the
Read the individual information of the error using
parameter setting.
the peripheral device, check the parameter item
3015
■Collateral information
• Common Information:File name/ Drive name corresponding to the numerical value (parameter 2
• Individual Information:Parameter number/CPU No. No./CPU No.) and parameter of target CPU, and
■Diagnostic Timing correct them.
3
• At power-On/ At reset/ STOP RUN/
At writing to progurammable controller
[PARAMETER ERROR]
QnU*8
The CPU module incompatible with multiple CPU
synchronized boot-up is set as the target for the
synchronized boot-up in the [Multiple CPU 12
synchronous startup setting].
■Collateral information Delete the CPU module incompatible with multiple
3016
• Common Information:File name/ Drive name CPU synchronized boot-up from the setting.
• Individual Information:Parameter number/ CPU
No.
6
■Diagnostic Timing
• At power ON/ At reset/
At writing to progurammable controller
[PARAMETER ERROR]
6
With GX Developer, write [PLC parameter/Network
The parameter file is damaged. RUN:
parameter/Remote password] to a valid drive then
■Collateral information Off
reload the power supply for system and/or reset the
3040 • Common Information:– ERR.:
• Individual Information:–
CPU module. If the same error occurs, it is thought
to be hardware error. (Contact your local Mitsubishi
Flicker 7
■Diagnostic Timing
• At power ON/At reset representative.)
CPU Status:
[PARAMETER ERROR] Stop
Parameter file of intelligent function module is
damaged.
With GX Developer, write [Intelligent function
module parameter] to a valid drive to write the
8
■Collateral information parameters then reload the power supply for
3041
• Common Information:– system and/or reset the CPU module. If the same
• Individual Information:– error occurs, it is thought to be a hardware error.
■Diagnostic Timing (Contact your local Mitsubishi representative.)
• At power ON/At reset Qn(H)*5
• With GX Developer, write [PLC parameter/ QnPH*5
Network parameter/Remote password] to a valid
QnPRH*5
12-39
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[LINK PARA. ERROR]
In a multiple CPU system, the CC-Link IE controller
network module controlled by another CPU is • Delete the network parameter of the CC-Link IE
specified as the head I/O number of the CC-Link IE controller network module controlled by another
Qn(H)*7
controller network module. CPU.
■Collateral information • Change the setting to the head I/O number of the QnPH*9
• Common Information:File name/ Drive name CC-Link IE controller network module controlled QnU
• Individual Information:Parameter number by host CPU.
■Diagnostic Timing
• At power-ON/ At reset/ STOP RUN
[LINK PARA. ERROR]
The network parameter of the CC-Link IE controller
network operating as the normal station is
overwritten to the control station.
Or, the network parameter of the CC-Link IE
controller network operating as the control station is
overwritten to the normal station.
Reset the CPU module.
(The network parameter is updated on the module
by resetting.)
■Collateral information
• Common Information:File name/ Drive name
• Individual Information:Parameter number
■Diagnostic Timing
• At power-ON/ At reset/ STOP RUN
RUN:
[LINK PARA. ERROR]
Off
• The number of modules actually mounted is
ERR.:
different from that is set in Network parameter for
3100 Flicker
MELSECNET/H.
• The head I/O number of the actually mounted
CPU Status:
module is different from the one set in the
Stop
network parameter of the CC-Link IE controller Qn(H)*7
network. QnPH*9
• Data cannot be handled in the parameter exists. • Check the network parameter and actual QnPRH*9
• The network type of CC-Link IE controller mounting status, and if they differ, make them QnU
network is overwritten during power-on. (When matched. When network parameters are
changing the network type, switch RESET to modified, write them to the CPU module.
RUN.) • Check the setting of extension base unit stage
■Collateral information number.
• Common Information:File name/ Drive name • Check the connection status of extension base
• Individual Information:Parameter number unit and extension cable. When the GOT is bus-
■Diagnostic Timing connected to the main base unit or extension
• At power-ON/ At reset/ STOP RUN base unit, also check its connection status.
[LINK PARA. ERROR] If an error occurs even after performing the
• The CC-Link IE controller network module is above checks, the hardware may be faulty.
specified for the head I/O number of network (Contact your local Mitsubishi representative,
parameter in the MELSECNET/H. explaining a detailed description of the problem.)
• The MELSECNET/H module is specified for the
head I/O number of network parameter in the
CC-Link IE controller network.
■Collateral information
• Common Information:File name/ Drive name
• Individual Information:Parameter number
■Diagnostic Timing
• At power-ON/ At reset/ STOP RUN
12-40
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
12-41
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[LINK PARA. ERROR]
The link refresh range exceeded the file register
capacity. Qn(H)*1
■Collateral information Change the file register file for the one that enables QnPH
• Common Information:File name/ Drive name entire range refresh. QnPRH
• Individual Information:Parameter number QnU*10
■Diagnostic Timing
• When an END instruction executed
[LINK PARA. ERROR]
• When the station number of the MELSECNET/H
module is 0, the PLC-to-PLC network parameter
has been set.
• When the station number of the MELSECNET/H
module is other than 0, the remote master
Correct the type or station number of the Qn(H)*1
MELSECNET/H module in the network parameter QnPH
parameter setting has been made.
to meet the used system. QnPRH
■Collateral information
• Common Information:File name/ Drive name
• Individual Information:Parameter number
■Diagnostic Timing
• At power ON/At reset/STOP RUN
[LINK PARA. ERROR]
The refresh parameter for the CC-Link IE controller
network is outside the range. Qn(H)*7
■Collateral information QnPH*9
• Common Information:File name/ Drive name
RUN: QnPRH*9
• Individual Information:Parameter number • Check the network parameters and mounting Off QnU
■Diagnostic Timing status, and if they differ, match the network ERR.:
3101 • At power ON/At reset/STOP RUN parameters and mounting status. Flicker
[LINK PARA. ERROR] If any network parameter has been corrected,
• The network No. specified by a network write it to the CPU module. CPU Status:
parameter is different from that of the actually • Confirm the setting of the number of extension Stop
mounted network. stages of the extension base units.
• The head I/O No. specified by a network • Check the connection status of the extension
parameter is different from that of the actually base units and extension cables.
mounted I/O unit. When the GOT is bus-connected to the main
• The network class specified by a network base unit and extension base units, also check
parameter is different from that of the actually their connection status.
QCPU
mounted network. If the error occurs after the above checks, the
• The network refresh parameter of the cause is a hardware fault. (Contact your local
MELSECNET/H, MELSECNET/10 is out of the Mitsubishi representative, explaining a detailed
specified area. description of the problem.)
■Collateral information
• Common Information:File name/ Drive name
• Individual Information:Parameter number
■Diagnostic Timing
• At power ON/At reset/STOP RUN
[LINK PARA. ERROR]
A multi-remote I/O network was configured using a
module that does not support the MELSECNET/H
multi-remote I/O network.
Use a module that supports the MELSECNET/H
■Collateral information QnPH
• Common Information:File name/ Drive name multi-remote I/O network.
• Individual Information:Parameter number
■Diagnostic Timing
• At power ON/At reset/STOP RUN
12-42
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[LINK PARA. ERROR]
• The system A of the MELSECNET/H remote
1
master station has been set to other than Station
No. 0.
• Set the system A of the MELSECNET/H remote
• The system B of the MELSECNET/H remote
master station has been set to Station No. 0.
master station to Station No. 0.
QnPRH
2
• Set the system B of the MELSECNET/H remote
■Collateral information
• Common Information:File name/ Drive name master station to any of Station No. 1 to 64.
• Individual Information:Parameter number
■Diagnostic Timing 3
• At power ON/At reset/STOP RUN
[LINK PARA. ERROR]
Since the number of points of the B/W device set in
[Device] of the PLC parameter is lower than the 12
number of B/W refresh device points shown in the
following table when parameters of the
MELSECNET/H are not set, the refresh between
the CPU module and the MELSECNET/H cannot 6
be performed..
RUN:
Refresh No. of refresh device No. of refresh device
device points of B device points of W device Off
3101
1
8192 points
(8192 points×1
module)
8192 points
(8192 points×1
module)
Set the refresh parameter of the MELSECNET/H in
ERR.:
Flicker
Qn(H)*7
QnPH*7
6
accordance with the number of points of B/W
8192 points 8192 points
No. of 2 (4096 points×2 (4096 points×2 devices set in [Device] of the PLC parameter. QnPRH*7
mountable modules) modules) CPU Status: QnU
network
modules 3
6144 points
(2048 points×3
modules)
6144 points
(2048 points×3
modules)
Stop
7
8192 points 8192 points
4 (2048 points×4 (2048 points×4
modules) modules)
■Collateral information
• Common Information:File name/ Drive name
8
• Individual Information:Parameter number
■Diagnostic Timing
• At power ON/At reset/STOP RUN
[LINK PARA. ERROR]
The setting of the network refresh range crosses
over the boundary between the internal user device
and the extended data register (D) or extended link
12-43
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[LINK PARA. ERROR]
A CC-Link IE controller network parameter error
was detected. Qn(H)*7
■Collateral information QnPH*9
• Common Information:File name/ Drive name
QnPRH*9
• Individual Information:Parameter number
QnU
■Diagnostic Timing
• At power ON/At reset/STOP RUN • Correct and write the network parameters.
[LINK PARA. ERROR] • If the error occurs after correction, it suggests a
• The network module detected a network hardware fault. (Contact your local Mitsubishi
parameter error. representative.)
• A MELSECNET/H network parameter error was
detected.
QCPU
■Collateral information
• Common Information:File name/ Drive name
• Individual Information:Parameter number
■Diagnostic Timing
• At power ON/At reset/STOP RUN
[LINK PARA. ERROR]
The station No. specified in pairing setting are not
correct.
• The stations are not numbered consecutively.
Refer to the troubleshooting of the network module,
• Pairing setting has not been made for the CPU
and if the error is due to incorrect pairing setting,
module at the normal station. QnPRH
reexamine the pairing setting of the network
■Collateral information
• Common Information:File name/ Drive name parameter. RUN:
• Individual Information:Parameter number Off
■Diagnostic Timing ERR.:
3102 • At power ON/At reset/STOP RUN Flicker
12-44
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[LINK PARA. ERROR]
• LB/LW own station send range at LB/LW4000 or
1
later was set.
• LB/LW setting (2) was performed.
Examine the network range assignments for the
3102 ■Collateral information
• Common Information:File name/ Drive name network parameter in the control station.
Q00J/Q00/Q01
2
• Individual Information:Parameter number
■Diagnostic Timing
3
• At power ON/At reset/STOP RUN
[LINK PARA. ERROR]
In a multiple CPU system, Ethernet interface
module under control of another station is specified • Delete the Ethernet network parameter of
to the start I/O number of the Ethernet network Q00/Q01*1
12
Ethernet interface module under control of
parameter. another station. Qn(H)*1
■Collateral information • Change the setting to the start I/O number of QnPH
• Common Information:File name/ Drive name Ethernet interface module under control of the QnU*10
• Individual Information:Parameter number host station.
■Diagnostic Timing 6
• At power ON/At reset/STOP RUN
[LINK PARA. ERROR]
• Although the number of modules has been set to
one or greater number in the Ethernet module
count parameter setting, the number of actually
6
mounted module is zero.
• The start I/O No. of the Ethernet network
3103
parameter differs from the I/O No. of the actually
mounted module. RUN:
QCPU
7
■Collateral information Off
• Common Information:File name/ Drive name ERR.:
• Individual Information:Parameter number
■Diagnostic Timing • Correct and write the network parameters.
Flicker
8
• At power ON/At reset/STOP RUN • If the error occurs after correction, it suggests a
CPU Status:
hardware fault. (Contact your local Mitsubishi
[LINK PARA. ERROR] Stop
representative.)
• Ethernet module whose network type is set to
“Ethernet (main base)” is mounted on the
extension base unit in the redundant system.
• Ethernet module whose network type is set to
“Ethernet (extension base)” is mounted on the
QnPRH*7
12-45
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[LINK PARA. ERROR]
In a multiple CPU system, the CC-Link module
under control of another station is specified as the
head I/O number of the CC-Link network • Delete the CC-Link network parameter of the Q00/Q01*1
parameter. CC-Link module under control of another station. Qn(H)*1
■Collateral information • Change the setting to the start I/O number of the QnPH
• Common Information:File name/ Drive name CC-Link module under control of the host station. QnU*10
• Individual Information:Parameter number
■Diagnostic Timing
• At power ON/At reset/STOP RUN
[LINK PARA. ERROR]
• Though the number of CC-Link modules set in
the network parameters is one or more, the
number of actually mounted modules is zero.
• The start I/O number in the common parameters
is different from that of the actually mounted
RUN:
module.
Off
• The station type of the CC-Link module count QCPU
ERR.:
setting parameters is different from that of the
3105 Flicker
actually mounted station.
■Collateral information
• Common Information:File name/ Drive name CPU Status:
• Individual Information:Parameter number Stop
• Correct and write the network parameters.
■Diagnostic Timing • If the error occurs after correction, it suggests a
• At power ON/At reset/STOP RUN hardware fault. (Contact your local Mitsubishi
[LINK PARA. ERROR] representative.)
• CC-Link module whose station type is set to
“master station (compatible with redundant
function)” is mounted on the extension base unit
in the redundant system.
• CC-Link module whose station type is set to
“master station (extension base)” is mounted on QnPRH*7
the main base unit in the redundant system.
■Collateral information
• Common Information:File name/ Drive name
• Individual Information:Parameter number
■Diagnostic Timing
• At power ON/At reset/STOP RUN
12-46
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[LINK PARA. ERROR]
The CC-Link link refresh range exceeded the file
1
register capacity. Qn(H)*1
■Collateral information Change the file register file for the one refresh- QnPH
• Common Information:File name/ Drive name
• Individual Information:Parameter number
enabled in the whole range. QnPRH
QnU
2
■Diagnostic Timing
• When an END instruction executed
[LINK PARA. ERROR]
The network refresh parameter for CC-Link is out of 3
range.
■Collateral information
• Common Information:File name Check the parameter setting. QCPU
3106 • Individual Information:Parameter number
■Diagnostic Timing
12
• At power ON/At reset/STOP RUN
[LINK PARA. ERROR]
The setting of the network refresh range crosses
over the boundary between the internal user device
6
and the extended data register (D) or extended link Set the network refresh range so that it does not
register (W). cross over the boundary between the internal user
QnU
■Collateral information
• Common Information:File name
device and the extended data register (D) or
extended link register (W).
6
• Individual Information:Parameter number RUN:
■Diagnostic Timing Off
ERR.:
7
• At power ON/At reset/STOP RUN
Flicker
[LINK PARA. ERROR]
• The CC-Link parameter setting is incorrect.
• The set mode is not allowed for the version of the CPU Status:
mounted CC-Link module. Stop
12-47
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SFC PARA. ERROR]
The number of step relays specified in the device
setting of the PLC parameter dialog box is less than
that used in the program. Qn(H)
3202 ■Collateral information QnPH
• Common Information:File name QnPRH
• Individual Information:Parameter number
■Diagnostic Timing Read the common information of the error using
• STOP RUN the peripheral device, check error step
[SFC PARA. ERROR] corresponding to its numerical value (program error
The execution type of the SFC program specified in location), and correct the problem.
the program setting of the PLC parameter dialog
Qn(H)
box is other than scan execution.
QnPH
3203 ■Collateral information
• Common Information:File name QnPRH
• Individual Information:Parameter number QnU
■Diagnostic Timing
• At power-ON/ At reset/ STOP RUN*3
[SP. PARA ERROR]
The start I/O number in the intelligent function
module parameter set on GX Configurator differs
from the actual I/O number.
■Collateral information
3300 • Common Information:File name Check the parameter setting. QCPU
• Individual Information:Parameter number*2
■Diagnostic Timing
• At power-On/ At reset/ STOP RUN/
At writing to progurammable controller RUN:
Off
[SP. PARA ERROR]
• The refresh setting of the intelligent function ERR.:
module exceeded the file register capacity. Flicker
• The intelligent function module set in GX
CPU Status: Q00J/Q00/Q01
Configurator differs from the actually mounted
module. • Change the file register file for the one which Stop Qn(H)*1
■Collateral information allows refresh in the whole range. QnPH
• Common Information:File name • Check the parameter setting. QnPRH
• Individual Information:Parameter number*2 QnU
■Diagnostic Timing
• At power-On/ At reset/ STOP RUN/
At writing to progurammable controller
[SP. PARA ERROR]
The intelligent function module's refresh parameter
setting is outside the available range.
■Collateral information
3301 • Common Information:File name Check the parameter setting. QCPU
• Individual Information:Parameter number*2
■Diagnostic Timing
• At power-On/ At reset/ STOP RUN/
At writing to progurammable controller
[SP. PARA ERROR]
The setting of the refresh parameter range crosses
over the boundary between the internal user device
and the extended data register (D) or extended link
register (W). Set the refresh parameter range so that it does not
■Collateral information cross over the boundary between the internal user
QnU
• Common Information:File name device and the extended data register (D) or
extended link register (W).
• Individual Information:Parameter number*2
■Diagnostic Timing
• At power-On/ At reset/ STOP RUN/
At writing to progurammable controller
12-48
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SP. PARA ERROR]
The intelligent function module's refresh parameter
1
are abnormal.
■Collateral information
3302 • Common Information:File name
• Individual Information:Parameter number*2
Check the parameter setting. QCPU
2
■Diagnostic Timing
• At power-On/ At reset/ STOP RUN/
At writing to progurammable controller
[SP. PARA ERROR]
3
In a multiple CPU system, the automatic refresh
setting or other parameter setting was made to the • Delete the automatic refresh setting or other
intelligent function module under control of another
station.
parameter setting of the intelligent function
module under control of another CPU.
Q00/Q01*1 12
■Collateral information Qn(H)*1
3303 • Change the setting to the automatic refresh
• Common Information:File name/ Drive name QnPH
setting or other parameter setting of the
• Individual Information:Parameter number intelligent function module under control of the QnU*10
■Diagnostic Timing host CPU. 6
• At power-On/ At reset/ STOP RUN/
At writing to progurammable controller
RUN:
[REMOTE PASS. ERR.]
The head I/O number of the target module of the
Off
ERR.:
6
remote password is set to other than 0H to 0FF0H. Qn(H)*1
Flicker
■Collateral information Change the head I/O number of the target module QnPH
• Common Information:– to be within the 0H to 0FF0H range. QnPRH
CPU Status:
• Individual Information:–
■Diagnostic Timing
Stop QnU*7 7
• At power ON/At reset/STOP RUN
[REMOTE PASS. ERR.]
The head I/O number of the target module of the
remote password is set to other than 0H to 07E0H.
8
■Collateral information Change the head I/O number of the target module
• Common Information:– Q02U
to be within the 0H to 07E0H range.
3400 • Individual Information:–
■Diagnostic Timing
• At power ON/At reset/STOP RUN
[REMOTE PASS. ERR.]
The head I/O number of the target module of the
12-49
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[REMOTE PASS. ERR.]
Position specified as the head I/O number of the
remote password file is incorrect due to one of the
following reasons:
• Module is not loaded.
• Other than a the intelligent function module (I/O
module)
• Intelligent function module other than serial
communication module, modem interface
Mount serial communication module, modem Qn(H)*1
interface module or Ethernet module of function QnPH
module or Ethernet module
version B or later in the position specified in the QnPRH
• Serial communication module or Ethernet
head I/O No. of the remote password file. QnU
module of function version A
The intelligent function module where remote
password is available is not mounted.
■Collateral information
• Common Information:–
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset/STOP RUN RUN:
[REMOTE PASS. ERR.] Off
Any of the following modules is not mounted on the ERR.:
3401 slot specified for the head I/O number of the remote Flicker
password. Mount any of the following modules in the position
• Serial communication module of function version specified for the head I/O number of the remote CPU Status:
B or later password. Stop
• Ethernet module of function version B or later • Serial communication module of function version
• Modem interface module of function version B or Q00J/Q00/Q01*1
B or later
later • Ethernet module of function version B or later
■Collateral information • Modem interface module of function version B or
• Common Information:– later
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset/STOP RUN
[REMOTE PASS. ERR.]
Serial communication module, modem interface
module or Ethernet module of function version B or
later controlled by another CPU was specified in a
• Change it for the Ethernet module of function Qn(H)*1
multiple CPU system.
version B or later connected by the host CPU. QnPH
■Collateral information
• Common Information:– • Delete the remote password setting. QnU*10
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset/STOP RUN
12-50
12.1.6 Error code list (4000 to 4999)
1
The following shows the error messages from the error code 4000 to 4999, the contents and
causes of the errors, and the corrective actions for the errors.
2
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
3
(SD0)
[INSTRCT. CODE ERR]
• The program contains an instruction code that
cannot be decoded.
• An unusable instruction is included in the
program. 12
4000 ■Collateral information QCPU
• Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset/STOP RUN
6
When instruction executed
[INSTRCT. CODE ERR]
The program contains a dedicated instruction for
SFC although it is not an SFC program.
6
Q00J/Q00/Q01*2
■Collateral information Qn(H)
4001 • Common Information:Program error location QnPH
• Individual Information:–
■Diagnostic Timing
QnPRH
QnU
7
• At power ON/At reset/STOP RUN
When instruction executed
[INSTRCT. CODE ERR]
• The name of dedicated instruction specified by 8
RUN:
the program is incorrect.
Off
• The dedicated instruction specified by the Read the common information of the error using a
ERR.:
program cannot be executed by the specified peripheral device, check error step corresponding
Flicker
module. to its numerical value (program error location), and
4002
■Collateral information correct the problem.
• Common Information:Program error location CPU Status:
• Individual Information:– Stop
12-51
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[MISSING END INS.]
There is no END (FEND) instruction in the
program.
■Collateral information
4010 • Common Information:Program error location QCPU
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset/STOP RUN
[CAN'T SET(P)]
The total number of internal file pointers used by
the program exceeds the number of internal file
Qn(H)
pointers set in the parameters.
QnPH
4020 ■Collateral information
• Common Information:Program error location QnPRH
• Individual Information:– RUN: QnU
■Diagnostic Timing Off
• At power ON/At reset/STOP RUN ERR.:
Flicker
[CAN'T SET(P)]
• The common pointer Nos. assigned to files
Read the common information of the error using a CPU Status:
overlap.
peripheral device, check error step corresponding Stop
• The local pointer Nos. assigned to files overlap.
to its numerical value (program error location), and
4021 ■Collateral information
correct the problem.
• Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset/STOP RUN QCPU
[CAN'T SET(I)]
The allocation pointer Nos. assigned by files
overlap.
■Collateral information
4030 • Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset/STOP RUN
[OPERATION ERROR]
The instruction cannot process the contained data.
■Collateral information
• Common Information:Program error location QCPU
• Individual Information:–
■Diagnostic Timing
• When instruction executed
[OPERATION ERROR] RUN:
• Take measurements against noise.
Access error of ATA card occurs by
• Reset and restart the CPU module. Off/On
SP.FREAD/SP.FWRITE instructions. Qn(H)
When the same error is displayed again, the ERR.:
■Collateral information QnPH
ATA card has hardware failure. Flicker/On
4100 • Common Information:Program error location QnPRH
(Please consult your local Mitsubishi service
• Individual Information:–
CPU Status: QnU*11
center or representative, explaining a detailed
■Diagnostic Timing
description of the problem.) Stop/
• When instruction executed
Continue*1
[OPERATION ERROR]
The file being accessed by other functions with
• Stop the file accessed with other functions to
SP.FWRITE instruction was accessed.
execute SP.FWRITE instruction.
■Collateral information
• Stop the access with othrer functions and the QnU*11
• Common Information:Program error location
SP.FWRITE instructuion to execute at same
• Individual Information:–
time.
■Diagnostic Timing
• When instruction executed
*1 CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
*11 The Universal model QCPU except the Q00UJCPU, Q00UCPU, and Q01UCPU.
12-52
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[OPERATION ERROR]
• The number of setting data dealt with the
1
instruction exceeds the applicable range.
• The storage data and constant of the device
specified by the instruction exceeds the
applicable range.
2
• When writing to the host CPU shared memory,
the write prohibited area is specified for the write
3
destination address.
• The range of storage data of the device specified
QCPU
by the instruction is duplicated.
• The device specified by the instruction exceeds
the range of the number of device points.
• The interrupt pointer No. specified by the 12
instruction exceeds the applicable range.
■Collateral information
• Common Information:Program error location RUN:
• Individual Information:–
■Diagnostic Timing
Off/On 6
Read the common information of the error using ERR.:
• When instruction executed
the peripheral device, check error step Flicker/On
4101 [OPERATION ERROR]
corresponding to its numerical value (program error
• The storage data of file register specified by the
instruction exceeds the applicable range. Or, file
location), and correct the problem. CPU Status:
Stop/
6
register is not set.
Continue*1
■Collateral information QnU*10
• Common Information:Program error location
• Individual Information:– 7
■Diagnostic Timing
• When instruction executed
[OPERATION ERROR]
• The block data that crosses over the boundary
between the internal user device and the
8
extended data register (D) or extended link
register is specified (including 32-bit binary, real
number (single precision, double precision),
QnU
indirect address, and control data)
■Collateral information
• Common Information:Program error location
• Individual Information:–
*1 CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
*10 The Universal model QCPU except the Q00UJCPU.
12-53
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[OPERATION ERROR]
In a multiple CPU system, the link direct device
(J \ ) was specified for the network module • Delete from the program the link direct device
Q00/Q01*2
under control of another station. which specifies the network module under
Qn(H)*2
■Collateral information control of another CPU.
QnPH
• Common Information:Program error location • Using the link direct device, specify the network
• Individual Information:– module under control of the host CPU. QnU*10
■Diagnostic Timing
• When instruction executed
[OPERATION ERROR]
• The network No. or station No. specified for the
dedicated instruction is wrong.
• The link direct device (J \ ) setting is incorrect.
• The module No./ network No./number of
4102 character strings exceeds the range that can be QCPU
specified.
■Collateral information
• Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• When instruction executed
[OPERATION ERROR] Read the common information of the error using
• The specification of character string the peripheral device, check error step RUN:
(" ") specified by dedicated instruction cannot be corresponding to its numerical value (program error Off/On
used for the character string. location), and correct the problem. ERR.:
■Collateral information QnU
Flicker/On
• Common Information:Program error location
• Individual Information:–
CPU Status:
■Diagnostic Timing
• When instruction executed Stop/
*1 CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
*2 The function version is B or later.
*5 The module whose first 5 digits of serial No. is "07032" or later.
*10 The Universal model QCPU except the Q00UJCPU.
12-54
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[OPERATION ERROR]
With high speed interrupt setting PR, PRC,
1
UDCNT1, UDCNT2, PLSY or PWM instruction is
Delete the high-speed interrupt setting.
executed.
When using high-speed interrupt, delete the PR,
4109 ■Collateral information
• Common Information:Program error location
PRC, UDCNT1, UDCNT2, PLSY and PWM
Qn(H)*3
2
instructions.
• Individual Information:–
■Diagnostic Timing
• When instruction executed
[OPERATION ERROR] RUN: 3
An attempt was made to perform write/read to/from Off/On
the CPU shared memory write/read disable area of ERR.:
the host station CPU module with the instruction. Flicker/On
Q00/Q01*2
4111 ■Collateral information
• Common Information:Program error location CPU Status: QnU 12
• Individual Information:– Stop/
Read the common information of the error using
■Diagnostic Timing Continue*1
GX Developer, and check and correct the error step
• When instruction executed
[OPERATION ERROR]
corresponding to that value (program error 6
location).
The CPU module that cannot be specified with the
multiple CPU dedicated instruction was specified.
■Collateral information Q00/Q01*2
4112
• Common Information:Program error location QnU*10 6
• Individual Information:–
■Diagnostic Timing
• When instruction executed
[OPERATION ERROR]
• When the SP.DEVST instruction is executed, the
7
number of writing to the standard ROM of the day • Check that the number of execution of the RUN:
exceeds the value specified by SD695. SP.DEVST instruction is proper. Off/On
4113
• The value outside the specified range is set to
SD695.
• Execute the SP.DEVST instruction again the
following day or later day. Or, arrange the value
ERR.:
Flicker/On QnU
8
■Collateral information of SD695.
• Common Information:Program error location • Correct the value of SD695 so that it does not CPU Status:
• Individual Information:– exceed the range. Stop/Continue
■Diagnostic Timing
• When instruction executed
[OPERATION ERROR]
Since the manual system switching enable flag RUN:
*1 CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
*2 The function version is B or later.
*3 The module whose first 5 digits of serial No. is "04012" or later.
*10 The Universal model QCPU except the Q00UJCPU.
12-55
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[OPERATION ERROR]
• The dedicated instruction was executed to the
module mounted on the extension base unit in
the redundant system. RUN:
• The instruction for accessing the intelligent • Delete the dedicated instruction for the module Off/On
function module mounted on the extension base mounted on the extension base unit. ERR.:
4122 unit from the standby system at separate mode • Delete the instruction for accessing the intelligent Flicker/On QnPRH*6
was executed. function module mounted on the extension base
■Collateral information unit from the standby system. CPU Status:
• Common Information:Program error location Stop/Continue
• Individual Information:–
■Diagnostic Timing
• When instruction executed
[OPERATION ERROR]
Instructions to read SFC step comment RUN:
(S(P).SFCSCOMR) and SFC transition condition Off/On
comment (S(P).SFCTCOMR) are executed for the ERR.:
Qn(H)*4
comment file in ATA card Target comment file is to be other than the Flicker/On
4130 QnPH*5
■Collateral information comment file in ATA card.
• Common Information:Program error location CPU Status: QnPRH
• Individual Information:– Stop/
■Diagnostic Timing Continue*1
• When END/other instruction executed
[OPERATION ERROR]
The SFC program is started up by the instruction RUN:
while the other SFC program has not yet been Off/On
completed. Check the SFC program specified by the ERR.:
4131 ■Collateral information instruction. Or, check the executing status of the Flicker/On
• Common Information:Program error location SFC program.
• Individual Information:– CPU Status:
■Diagnostic Timing Stop/Continue
• When instruction executed
[OPERATION ERROR]
Operation where the input data is special value
("-0", unnormalized number, nonnumeric, ) is
Read the common information of the error using
performed. QnU
the peripheral device, check the error step RUN:
4140 ■Collateral information
corresponding to the numerical value (program Off/On
• Common Information:Program error location
error part), and correct it. ERR.:
• Individual Information:–
■Diagnostic Timing Flicker/On
• When instruction executed
[OPERATION ERROR] CPU Status:
Overflow occurs at operation. Stop/
Read the common information of the error using
■Collateral information
the peripheral device, check the error step Continue*1
4141 • Common Information:Program error location
corresponding to the numerical value (program
• Individual Information:–
error part), and correct it.
■Diagnostic Timing
• When instruction executed
[FOR NEXT ERROR]
No NEXT instruction was executed following the
RUN:
execution of a FOR instruction.
Off
Alternatively, there are fewer NEXT instructions Read the common information of the error using
ERR.:
than FOR instructions. the peripheral device, check error step
4200 Flicker QCPU
■Collateral information corresponding to its numerical value (program error
• Common Information:Program error location location), and correct the problem.
CPU Status:
• Individual Information:–
Stop
■Diagnostic Timing
• When instruction executed
*1 CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
*4 The module whose first 5 digits of serial No. is "07012" or later.
*5 The module whose first 5 digits of serial No. is "07032" or later.
*6 The module whose first 5 digits of serial No. is "09012" or later.
12-56
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[FOR NEXT ERROR]
A NEXT instruction was executed although no FOR
1
instruction has been executed.
Alternatively, there are more NEXT instructions Read the common information of the error using
4201
than FOR instructions.
■Collateral information
the peripheral device, check error step
corresponding to its numerical value (program error
2
• Common Information:Program error location location), and correct the problem.
• Individual Information:–
■Diagnostic Timing
• When instruction executed 3
[FOR NEXT ERROR]
More than 16 nesting levels are programmed.
■Collateral information
4202 • Common Information:Program error location
• Individual Information:–
Keep nesting levels at 16 or under. 12
■Diagnostic Timing
• When instruction executed
[FOR NEXT ERROR]
A BREAK instruction was executed although no
6
FOR instruction has been executed prior to that.
■Collateral information
4203
• Common Information:Program error location
• Individual Information:– 6
■Diagnostic Timing Read the common information of the error using
• When instruction executed the peripheral device, check error step
RUN:
[CAN'T EXECUTE(P)] corresponding to its numerical value (program error
7
Off
The CALL instruction is executed, but there is no location), and correct the problem.
ERR.:
subroutine at the specified pointer.
Flicker QCPU
■Collateral information
4210
• Common Information:Program error location
CPU Status:
• Individual Information:–
■Diagnostic Timing
Stop 8
• When instruction executed
[CAN'T EXECUTE(P)]
There was no RET instruction in the executed
subroutine program.
■Collateral information
4211
• Common Information:Program error location
• Individual Information:–
12-57
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[CAN'T EXECUTE(I)]
Though an interrupt input occurred, the
corresponding interrupt pointer does not exist.
■Collateral information
4220
• Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• When instruction executed
[CAN'T EXECUTE(I)]
An IRET instruction does not exist in the executed
interrupt program.
■Collateral information
4221 QCPU
• Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• When instruction executed Read the common information of the error using
[CAN'T EXECUTE(I)] the peripheral device, check error step
The IRET instruction exists before the FEND corresponding to its numerical value (program error
instruction of the main routine program. location), and correct the problem.
■Collateral information
• Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• When instruction executed
[CAN'T EXECUTE(I)]
4223
• The IRET instruction was executed in the fixed
scan execution type program. RUN:
• The STOP instruction was executed in the fixed Off
scan execution type program. ERR.:
QnU
■Collateral information Flicker
• Common Information:Program error location
• Individual Information:– CPU Status:
■Diagnostic Timing Stop
• When instruction executed
[CAN'T EXECUTE(I)]
The interrupt pointer for the module mounted on
the extension base unit is set in the redundant
system. Delete the setting of interrupt pointer for the module
4225 ■Collateral information mounted on the extension base unit, since it cannot QnPRH*6
• Common Information:– be used.
• Individual Information:–
■Diagnostic Timing
• At power-ON/At reset
[INST. FORMAT ERR.]
The number of CHK and CHKEND instructions is
not equal.
■Collateral information Qn(H)
4230
• Common Information:Program error location QnPH
• Individual Information:–
■Diagnostic Timing Read the common information of the error using
• When instruction executed the peripheral device, check error step
[INST. FORMAT ERR.] corresponding to its numerical value (program error
The number of IX and IXEND instructions is not location), and correct the problem.
equal.
■Collateral information
4231 QCPU
• Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• When instruction executed
12-58
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[INST. FORMAT ERR.]
The configuration of the check conditions for the
1
CHK instruction is incorrect.
Alternatively, a CHK instruction has been used in a
4235
low speed execution type program.
■Collateral information
Qn(H)
QnPH
2
• Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• When instruction executed 3
[MULTI-COM.ERROR]
• The multiple CPU high-speed transmission
dedicated instruction used in the program
specifies the wrong CPU module. Or, the setting
in the CPU module is incompatible with the
12
multiple CPU high-speed transmission dedicated
instruction.
• The reserved CPU is specified.
• The uninstalled CPU is specified.
6
• The head I/O number of the target CPU/16 (n1)
is outside the range of 3EH to 3E3H.
4350 • The CPU module where the instruction cannot be
executed is specified.
6
• The instruction is executed in a single CPU
system. RUN:
• The host CPU is specified. Off
• The instruction is executed without setting the
Read the common information of the error using
the peripheral device, check error step
ERR.: 7
"Use multiple CPU high speed communication". Flicker
corresponding to its numerical value (program error
■Collateral information location), and correct the problem.
• Common Information:Program error location CPU Status:
• Individual Information:– Stop 8
■Diagnostic Timing
• When instruction executed QnU*7
[MULTI-COM.ERROR]
• The multiple CPU high-speed transmission
dedicated instruction specified by the program
cannot be executed to the specified target CPU
module.
• The instruction name is wrong.
*7 The Universal model QCPU except the Q00UJCPU, Q00UCPU, Q01UCPU, and Q02UCPU.
12-59
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[MULTI-COM.ERROR]
The device which cannot be used for the multiple
CPU high-speed transmission dedicated instruction
specified by the program is specified.
4353 ■Collateral information QnU*7
• Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• When instruction executed
[MULTI-COM.ERROR]
The character string which cannot be handled by
the multiple CPU high-speed transmission
dedicated instruction is specified. Read the common information of the error using
4354 ■Collateral information the peripheral device, check error step
• Common Information:Program error location corresponding to its numerical value (program error
• Individual Information:– location), and correct the problem.
■Diagnostic Timing
• When instruction executed
[MULTI-COM.ERROR] QnU*7
The number of read/write data (number of request/
receive data) for the multiple CPU high-speed
transmission dedicated instruction specified by the
program is not valid.
4355
■Collateral information
• Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• When instruction executed RUN:
[SFCP. CODE ERROR] Off
No SFCP or SFCPEND instruction in SFC ERR.:
program. Flicker
Qn(H)
■Collateral information
4400 • Common Information:Program error location QnPH
CPU Status:
• Individual Information:– QnPRH
Stop
■Diagnostic Timing
• STOP RUN
[CAN'T SET(BL)]
The block number designated by the SFC program
exceeds the range.
■Collateral information
4410 • Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• STOP RUN Write the program to the CPU module again using
[CAN'T SET(BL)] GX Developer.
Block number designations overlap in SFC
program. Q00J/Q00/Q01*2
■Collateral information Qn(H)
4411 • Common Information:Program error location QnPH
• Individual Information:– QnPRH
■Diagnostic Timing QnU
• STOP RUN
[CAN'T SET(S)]
A step number designated in an SFC program
exceeds the range.
■Collateral information
4420 • Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• STOP RUN
12-60
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[CAN'T SET(S)]
Total number of steps in all SFC programs exceed
1
the maximum.
■Collateral information
4421 • Common Information:Program error location
• Individual Information:–
Q00J/Q00/Q01*2
2
■Diagnostic Timing
Qn(H)
• STOP RUN Write the program to the CPU module again using
QnPH
GX Developer.
[CAN'T SET(S)]
Step number designations overlap in SFC program.
QnPRH
QnU
3
■Collateral information
4422 • Common Information:Program error location
• Individual Information:–
■Diagnostic Timing 12
• STOP RUN
[CAN'T SET(S)]
The total number of (maximum step No.+1) of each
block exceeds the total number of step relays.
Correct the total number of step relays so that it
6
■Collateral information
4423 • Common Information:Program error location does not exceed the total number of (maximum
• Individual Information:– step No.+1) of each block.
■Diagnostic Timing
• STOP RUN RUN:
6
Off
[SFC EXE. ERROR]
ERR.:
The SFC program cannot be executed.
Flicker
• The data of the block data setting is illegal.
• The SFC data device of the block data setting is
• Write the program to the CPU module again 7
using GX Developer. CPU Status:
beyond the device setting range set in the PLC
• After correcting the setting of the SFC data Stop
4430 parameter.
device, write it to the CPU module.
■Collateral information
• Common Information:File name/Drive name • After correcting the device setting range set in 8
• Individual Information:– the PLC parameter, write it to the CPU module.
■Diagnostic Timing Q00J/Q00/Q01*2
• STOP RUN QnU
12-61
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SFCP. FORMAT ERR.]
The numbers of BLOCK and BEND instructions in
an SFC program are not equal.
■Collateral information
4500 • Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• STOP RUN Qn(H)
[SFCP. FORMAT ERR.] QnPH
The configuration of the STEP* to TRAN* to TSET QnPRH
to SEND instructions in the SFC program is
incorrect.
4501 ■Collateral information Write the program to the CPU module again using
• Common Information:Program error location the peripheral device.
• Individual Information:–
■Diagnostic Timing
• STOP RUN
[SFCP. FORMAT ERR.]
The structure of the SFC program is illegal.
• STEPI* instruction does not exist in the block of
RUN:
the SFC program.
Off
4502 ■Collateral information
• Common Information:Program error location ERR.:
• Individual Information:– Flicker
■Diagnostic Timing
CPU Status:
• STOP RUN
Stop
[SFCP. FORMAT ERR.]
The structure of the SFC program is illegal.
• The step specified in the TSET instruction does
• Write the program to the CPU module again
not exist. Q00J/Q00/Q01*2
using GX Developer.
• In jump transition, the host step number was Qn(H)
• Read the common information of the error using
4503 specified as the destination step number. QnPH
GX Developer, and check and correct the error
■Collateral information QnPRH
• Common Information:Program error location step corresponding to that value (program error
QnU
• Individual Information:– location).
■Diagnostic Timing
• STOP RUN
[SFCP. FORMAT ERR.]
The structure of the SFC program is illegal.
• The step specified in the TAND instruction does
not exist.
Write the program to the CPU module again using
4504 ■Collateral information
• Common Information:Program error location GX Developer.
• Individual Information:–
■Diagnostic Timing
• STOP RUN
12-62
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SFCP. FORMAT ERR.]
The structure of the SFC program is illegal.
1
• In the operation output of a step, the SET Sn/
BLmSn or RST Sn/BLmSn instruction was
4505
specified for the host step.
■Collateral information
2
• Common Information:Program error location RUN:
• Individual Information:– Off
■Diagnostic Timing Read the common information of the error using
• STOP RUN GX Developer, and check and correct the error step
ERR.:
Flicker
Q00J/Q00/Q01*2 3
corresponding to that value (program error QnU
[SFCP. FORMAT ERR.]
location).
The structure of the SFC program is illegal. CPU Status:
• In a reset step, the host step number was Stop
specified as the destination step. 12
4506 ■Collateral information
• Common Information:Program error location
• Individual Information:–
■Diagnostic Timing 6
• STOP RUN
[SFCP. OPE. ERROR]
The SFC program contains data that cannot be
processed.
■Collateral information
6
4600
• Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• When instruction executed 7
[SFCP. OPE. ERROR] RUN:
Exceeds device range that can be designated by Off/On
the SFC program. Read common information of the error using the ERR.:
4601
■Collateral information peripheral device, check error step corresponding Flicker/On
Qn(H)
QnPH
8
• Common Information:Program error location to its numerical value (program error location), and
QnPRH
• Individual Information:– correct the problem. CPU Status:
■Diagnostic Timing Stop/
• When instruction executed Continue*1
[SFCP. OPE. ERROR]
The START instruction in an SFC program is
preceded by an END instruction.
■Collateral information
*1 CPU operation can be set in the parameters at error occurrence. (LED indication varies.)
*2 The function version is B or later.
12-63
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[SFCP. EXE. ERROR]
The active step information at presumptive start of
the SFC program is incorrect.
■Collateral information
4610 • Common Information:Program error location
• Individual Information:– RUN:
■Diagnostic Timing Read common information of the error using the
On
• STOP RUN peripheral device, check error step corresponding
ERR.:
to its numerical value (program error location), and
[SFCP. EXE. ERROR] On
correct the problem.
Key-switch was reset during RUN when
The program is automatically subjected to an initial
presumptive start was designated for SFC CPU Status:
start.
program. Continue Qn(H)
4611 ■Collateral information QnPH
• Common Information:Program error location QnPRH
• Individual Information:–
■Diagnostic Timing
• STOP RUN
[BLOCK EXE. ERROR]
Startup was executed at a block in the SFC
program that was already started up. Read common information of the error using the
■Collateral information peripheral device, check error step corresponding
4620
• Common Information:Program error location to its numerical value (program error location), and
• Individual Information:– correct the problem.
■Diagnostic Timing
• When instruction executed
[BLOCK EXE. ERROR]
RUN:
Startup was attempted at a block that does not exist
• Read the common information of the error using Off Q00J/Q00/Q01*2
in the SFC program.
GX Developer, and check and correct the error ERR.: Qn(H)
■Collateral information
4621 step corresponding to that value (program error Flicker QnPH
• Common Information:Program error location
location). QnPRH
• Individual Information:–
• Turn ON if the special relay SM321 is OFF. CPU Status: QnU
■Diagnostic Timing
• When instruction executed Stop
12-64
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[STEP EXE. ERROR]
• Startup was attempted at the step that does not
1
exist in the SFC program.
Or, the step that does not exist in the SFC
program was specified for end.
• Forced transition was executed based on the
2
• Read the common information of the error using Q00J/Q00/Q01*2
transition condition that does not exit in the SFC
the peripheral device, and check and correct the Qn(H)
program.
4631 error step corresponding to that value (program QnPH
3
Or, the transition condition for forced transition
error location). QnPRH
that does not exit in the SFC program was
• Turn ON if the special relay SM321 is OFF. QnU
canceled.
■Collateral information
• Common Information:Program error location
• Individual Information:–
RUN:
Off 12
■Diagnostic Timing
ERR.:
• When instruction executed
Flicker
[STEP EXE. ERROR]
There were too many simultaneous active steps in
blocks that can be designated by the SFC program.
CPU Status: 6
Stop
■Collateral information
4632
• Common Information:Program error location
6
• Individual Information:–
■Diagnostic Timing Read common information of the error using the Qn(H)
• When instruction executed peripheral device, check error step corresponding QnPH
[STEP EXE. ERROR] to its numerical value (program error location), and QnPRH
There were too many simultaneous active steps in correct the problem. QnU
all blocks that can be designated. 7
■Collateral information
4633
• Common Information:Program error location
• Individual Information:–
■Diagnostic Timing
• When instruction executed
8
12-65
12.1.7 Error code list (5000 to 5999)
The following shows the error messages from the error code 5000 to 5999, the contents and
causes of the errors, and the corrective actions for the errors.
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[WDT ERROR]
• The scan time of the initial execution type
• Read the individual information of the error from
program exceeded the initial execution
the peripheral device, check its value (time), and
monitoring time specified in the PLC RAS setting
shorten the scan time. Qn(H)
of the PLC parameter.
• Change the initial execution monitoring time or QnPH
■Collateral information
the WDT value in the PLC RAS setting of the QnPRH
• Common Information:Time (value set)
PLC parameter. QnU
• Individual Information:Time (value actually
• Resolve the endless loop caused by jump
measured)
transition.
■Diagnostic Timing
• Always
[WDT ERROR]
5000 • The power supply of the standby system is
• Since power-off of the standby system increases
turned OFF.
the control system scan time, reset the WDT
• The tracking cable is disconnected or connected
value, taking the increase of the control system
without turning off or resetting the standby
scan time into consideration.
system.
• When the tracking cable is disconnected during
• The tracking cable is not secured by the
operation, securely connect it and restart the QnPRH
connector fixing screws.
CPU module. If the same error is displayed
■Collateral information
again, the tracking cable or CPU module has a
• Common Information:Time (value set)
hardware fault. (Contact your local Mitsubishi
• Individual Information:Time (value actually RUN:
representative, explaining a detailed description
measured) Off
of the problem.)
■Diagnostic Timing ERR.:
• Always Flicker
[WDT ERROR]
• The scan time of the program exceeded the • Read the individual information of the error using CPU Status:
WDT value specified in the PLC RAS setting of the peripheral device, check its value (time), and Stop
the PLC parameter. shorten the scan time.
■Collateral information • Change the initial execution monitoring time or
QCPU
• Common Information:Time (value set) the WDT value in the PLC RAS setting of the
• Individual Information:Time (value actually PLC parameter.
measured) • Resolve the endless loop caused by jump
■Diagnostic Timing transition.
• Always
[WDT ERROR]
• The power supply of the standby system is
5001 • Since power-off of the standby system increases
turned OFF.
the control system scan time, reset the WDT
• The tracking cable is disconnected or connected
value, taking the increase of the control system
without turning off or resetting the standby
scan time into consideration.
system.
• When the tracking cable is disconnected during
• The tracking cable is not secured by the
operation, securely connect it and restart the QnPRH
connector fixing screws.
CPU module. If the same error is displayed
■Collateral information
again, the tracking cable or CPU module has a
• Common Information:Time (value set)
hardware fault. (Contact your local Mitsubishi
• Individual Information:Time (value actually
representative, explaining a detailed description
measured)
of the problem.)
■Diagnostic Timing
• Always
12-66
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[PRG. TIME OVER]
The program scan time exceeded the constant
1
scan setting time specified in the PLC RAS setting
of the PLC parameter. Qn(H)
■Collateral information
• Common Information:Time (value set)
QnPH
QnPRH
2
• Individual Information:Time (value actually QnU
measured)
• Review the constant scan setting time.
■Diagnostic Timing
• Always
• Review the constant scan setting time and low
speed program execution time in the PLC
3
[PRG. TIME OVER]
parameter so that the excess time of constant
The low speed program execution time specified in
scan can be fully secured.
the PLC RAS setting of the PLC parameter
exceeded the excess time of the constant scan.
■Collateral information
Qn(H) 12
5010 QnPH
• Common Information:Time (value set)
QnPRH
• Individual Information:Time (value actually
■Diagnostic Timing
measured) RUN:
On
6
• Always ERR.:
[PRG. TIME OVER] On
The program scan time exceeded the constant
scan setting time specified in the PLC RAS setting CPU Status: 6
of the PLC parameter. Continue
Review the constant scan setting time in the PLC
■Collateral information
parameter so that the excess time of constant scan Q00J/Q00/Q01
• Common Information:Time (value set)
• Individual Information:Time (value actually
measured)
can be fully secured.
7
■Diagnostic Timing
• Always
[PRG. TIME OVER]
The scan time of the low speed execution type
8
program exceeded the low speed execution watch
time specified in the PLC RAS setting of the PLC Read the individual information of the error using
parameter dialog box. the peripheral device, check the numerical value
Qn(H)
5011 ■Collateral information (time) there, and shorten scan time if necessary.
QnPH
• Common Information:Time (value set) Change the low speed execution watch time in the
• Individual Information:Time (value actually PLC RAS setting of the PLC parameter dialog box.
measured)
12-67
12.1.8 Error code list (6000 to 6999)
The following shows the error messages from the error code 6000 to 6999, the contents and
causes of the errors, and the corrective actions for the errors.
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[FILE DIFF.]
In a redundant system, the control system and
standby system do not have the same programs
and parameters.
• Match the programs and parameters of the
The file type detected as different between the two control system and standby system.
systems can be checked by the file name of the • Verify the systems by either of the following
error common information. procedures 1), 2) to clarify the differences
between the files of the two systems, then
• The program is different. correct a wrong file, and execute “Write to PLC“
(File name = ********.QPG) again.
• The PLC parameters/network parameters/ 1) After reading the programs/parameters of
redundant parameters are different. System A using
(File name = PARAM.QPA) GX Developer or PX Developer, verify them
• The remote password is different. with those of System B.
(File name = PARAM.QPA) 2) Verify the programs/parameters of GX
• The intelligent function module parameters are Developer or PX Developer saved in the
different. offline environment with those written to the
6000
(File name = IPARAM.QPA) CPU modules of both systems.
• The device initial values are different. • When the capacity of each write destination
RUN:
(File name = ********.QDI) within the CPU for online change of multiple
Off
• The capacity of each write destination within the program blocks is different between the two
ERR.:
CPU for online pchange of multiple program systems, take corrective action 1) or 2).
Flicker QnPRH
blocks is different. 1) Using the memory copy from control system
(File name = MBOC.QMB) to standby system, copy the program memory
CPU Status:
(This can be detected from the standby system from the control system to the standby
Stop
of the redundant system.) system.
■Collateral information 2) Format the CPU module program memories
• Common Information:File name of both systems. (For the capacity of each
• Individual Information:– write destination within the CPU for online
■Diagnostic Timing change of multiple program blocks, set the
• At power ON/At reset/ same value to both systems.)
At tracking cable connection/At changing to
backup mode/At completion of write during RUN/
At system switching/At switching both systems
into RUN
[FILE DIFF.]
In a redundant system, the valid parameter drive
settings (SW2, SW3) made by the DIP switches are
not the same.
Match the valid parameter drive settings (SW2,
■Collateral information
6001 SW3) by the DIP switches of the control system
• Common Information:–
and standby system.
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset/At tracking cable
connection/At operation mode change
12-68
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[OPE. MODE DIFF.]
The operational status of the control system and
1
standby system in the redundant system is not the RUN:
same. On
6010
(This can be detected from the standby system of
the redundant system.)
Synchronise the operation statuses of the control
ERR.:
On
2
system and standby system.
■Collateral information
• Common Information:– CPU Status:
• Individual Information:– Continue
■Diagnostic Timing 3
• Always
[OPE. MODE DIFF.]
At power ON/reset, the RUN/STOP switch settings
of the control system and standby system are not
the same in a redundant system.
12
(This can be detected from the control system or
Set the RUN/STOP switches of the control system
6020 standby system of the redundant system.)
and standby system to the same setting.
■Collateral information
• Common Information:–
6
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[UNIT LAY. DIFF.] 6
• In a redundant system, the module configuration
QnPRH
differs between the control system and standby
system.
• The network module mode setting differs
• Match the module configurations of the control
RUN: 7
between the two systems. Off
system and standby system.
(This can be detected from the control system or ERR.:
6030 • In the redundant setting of the network
standby system of the redundant system.) Flicker
parameter dialog box, match the mode setting of
■Collateral information
• Common Information:Module No.
System B to that of System A.
CPU Status:
8
• Individual Information:– Stop
■Diagnostic Timing
• At power ON/At reset/At tracking cable
connection/At operation mode change
[UNIT LAY. DIFF.]
In a redundant system, the CPU module model
name differs between the control system and
12-69
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[UNIT LAY. DIFF.]
A difference in the remote I/O configuration of the
MELSECNET/H multiplexed remote I/O network
between the control system and standby system of
a redundant system was detected.
(This can be detected from the control system or Check the network cables of the MELSECNET/H
6036
standby system of the redundant system.) multiplexed remote I/O network for disconnection.
■Collateral information
• Common Information:Module No.
• Individual Information:–
■Diagnostic Timing
• Always
RUN:
[CARD TYPE DIFF.]
Off
In a redundant system, the memory card
ERR.:
installation status (installed/not installed) differs
Flicker
between the control system and standby system.
Match the memory card installation statuses (set/
6040 ■Collateral information
not set) of the control system and standby system. CPU Status:
• Common Information:–
Stop
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[CARD TYPE DIFF.]
In a redundant system, the memory card type
differs between the control system and standby
system.
Match the memory card types of the control system
6041 ■Collateral information
and standby system.
• Common Information:– QnPRH
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[CAN'T EXE. MODE]
The function inexecutable in the debug mode or
operation mode (backup/separate mode) was RUN:
executed. On
(This can be detected from the control system or ERR.:
Execute the function executable in the debug mode
6050 standby system of the redundant system.) On
or operation mode (backup/separate mode).
■Collateral information
• Common Information:– CPU Status:
• Individual Information:– Continue
■Diagnostic Timing
• Always
[CPU MODE DIFF.]
In a redundant system, the operation mode
(backup/separate) differs between the control
RUN:
system and standby system.
Off
(This can be detected from the standby system of
ERR.:
the redundant system.) Match the operation modes of the control system
6060 Flicker
■Collateral information and standby system.
• Common Information:–
CPU Status:
• Individual Information:–
Stop
■Diagnostic Timing
• At power ON/At reset/At tracking cable
connection
12-70
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[CPU MODE DIFF.]
In a redundant system, the operation mode
1
(backup/separate) differs between the control
system and standby system.
6061
(This can be detected from the standby system of
the redundant system.)
Match the operation modes of the control system 2
and standby system.
■Collateral information
• Common Information:–
RUN:
• Individual Information:–
■Diagnostic Timing
Off
ERR.:
3
• When an END instruction executed
Flicker
[CPU MODE DIFF.]
Both System A and B are in the same system
status (control system).
(This can be detected from the system B of the
CPU Status:
Stop 12
redundant system.)
Power the CPU module (System B) which resulted
6062 ■Collateral information
in a stop error, OFF and then ON.
• Common Information:–
• Individual Information:–
6
■Diagnostic Timing
• At power ON/At reset/At tracking cable
connection
[TRK. TRANS. ERR.] 6
• An error (e.g. retry limit exceeded) occurred in
tracking data transmission.
(This error may be caused by tracking cable
removal or other system power-off (including
QnPRH
7
reset).)
• The error occurred at a startup since the
6100 redundant system startup procedure was not
followed.
■Collateral information
8
• Common Information:Tracking transmission data
classification
• Individual Information:–
• Check the CPU module or tracking cable. If the RUN:
■Diagnostic Timing
error still occurs, this indicates the CPU module On
• Always
or tracking cable is faulty. (Contact your local ERR.:
[TRK. TRANS. ERR.]
Mitsubishi representative, explaining a detailed On
• A timeout error occurred in tracking (data
description of the problem.)
12-71
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[TRK. TRANS. ERR.]
A data sum value error occurred in tracking (data
reception).
(This can be detected from the control system or
standby system of the redundant system.)
6102
■Collateral information
• Common Information:–
• Individual Information:–
■Diagnostic Timing
• Always
[TRK. TRANS. ERR.]
• A data error (other than sum value error)
occurred in tracking (data reception).
(This error may be caused by tracking cable
removal or other system power-off (including
reset).)
• The error occurred at a startup since the
redundant system startup procedure was not
6103
followed. • Check the CPU module or tracking cable. If the
(This can be detected from the control system or error still occurs, this indicates the CPU module
standby system of the redundant system.) or tracking cable is faulty. (Contact your local
■Collateral information Mitsubishi representative, explaining a detailed
• Common Information:– description of the problem.)
• Individual Information:– • Confirm the redundant system startup procedure,
■Diagnostic Timing and execute a startup again.
• Always
[TRK. TRANS. ERR.]
RUN:
• An error (e.g. retry limit exceeded) occurred in
On
tracking (data transmission).
ERR.:
(This error may be caused by tracking cable
On QnPRH
removal or other system power-off (including
reset).)
CPU Status:
• The error occurred at a startup since the
Continue
redundant system startup procedure was not
6105 followed.
(This can be detected from the control system or
standby system of the redundant system.)
■Collateral information
• Common Information:Tracking transmission data
classification
• Individual Information:–
■Diagnostic Timing
• Always
[TRK. TRANS. ERR.]
• A timeout error occurred in tracking (data
transmission).
(This error may be caused by tracking cable
removal or other system power-off (including
reset).) • Check the CPU module or tracking cable. If the
• The error occurred at a startup since the error still occurs, this indicates the CPU module
redundant system startup procedure was not or tracking cable is faulty. (Contact your local
6106 followed. Mitsubishi representative, explaining a detailed
(This can be detected from the control system or description of the problem.)
standby system of the redundant system.) • Confirm the redundant system startup procedure,
■Collateral information and execute a startup again.
• Common Information:Tracking transmission data
classification
• Individual Information:–
■Diagnostic Timing
• Always
12-72
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[TRK. TRANS. ERR.]
A data sum value error occurred in tracking (data
1
reception).
(This can be detected from the control system or
6107
standby system of the redundant system.)
■Collateral information
2
• Common Information:–
• Individual Information:–
■Diagnostic Timing
• Always
• Check the CPU module or tracking cable. If the
3
[TRK. TRANS. ERR.]
error still occurs, this indicates the CPU module
• A data error (other than sum value error)
or tracking cable is faulty. (Contact your local
occurred in tracking (data reception).
(This error may be caused by tracking cable
removal or other system power-off (including
Mitsubishi representative, explaining a detailed
description of the problem.) 12
• Confirm the redundant system startup procedure,
reset).)
and execute a startup again.
• The error occurred at a startup since the
6108
redundant system startup procedure was not
followed.
6
(This can be detected from the control system or
standby system of the redundant system.)
■Collateral information
• Common Information:– 6
• Individual Information:–
■Diagnostic Timing
• Always
[TRK. SIZE ERROR]
RUN:
On 7
The tracking capacity exceeded the allowed range.
ERR.:
(This can be detected from the control system or
On QnPRH
standby system of the redundant system.)
6110
■Collateral information
• Common Information:Tracking capacity excess
Reexamine the tracking capacity. CPU Status: 8
Continue
error factor
• Individual Information:–
■Diagnostic Timing
• When an END instruction executed
[TRK. SIZE ERROR]
The control system does not have enough file
register capacity for the file registers specified in
12-73
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[TRK. CABLE ERR.]
• A start was made without the tracking cable
being connected.
• A start was made with the tracking cable faulty.
RUN:
• As the tracking hardware on the CPU module Make a start after connecting the tracking cable. If
Off
side was faulty, communication with the other the same error still occurs, this indicates the
ERR.:
system could not be made via the tracking cable. tracking cable or CPU module side tracking
6120 Flicker
(This can be detected from the control system or transmission hardware is faulty.
standby system of the redundant system.) (Contact your local Mitsubishi representative,
CPU Status:
■Collateral information explaining a detailed description of the problem.)
Stop
• Common Information:–
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[TRK. DISCONNECT]
• The tracking cable was removed.
• If the tracking cable was removed, connect the
• The tracking cable became faulty while the CPU
tracking cable to the connectors of the CPU
module is running. RUN:
modules of the two systems.
• The CPU module side tracking hardware On
• When the error is not resolved after connecting
became faulty. ERR.:
the tracking cable to the connectors of the CPU
6130 (This can be detected from the control system or On
modules of the two systems and resetting the
standby system of the redundant system.)
error, the tracking cable or CPU module side
■Collateral information CPU Status:
tracking hardware is faulty.
• Common Information:– Continue
(Contact your local Mitsubishi representative,
• Individual Information:–
explaining a detailed description of the problem.)
■Diagnostic Timing
• Always
[TRK.INIT. ERROR]
• The other system did not respond during initial
QnPRH
communication at power ON/reset.
• Power the corresponding CPU module OFF and
• The error occurred at a startup since the RUN:
then ON again, or reset it and then unreset. If the
redundant system startup procedure was not Off
same error still occurs, this indicates the CPU
followed. ERR.:
module is faulty. (Contact your local Mitsubishi
6140 (This can be detected from the control system or Flicker
representative, explaining a detailed description
standby system of the redundant system.)
of the problem.)
■Collateral information CPU Status:
• Confirm the redundant system startup procedure,
• Common Information:– Stop
and execute a startup again.
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[CONTROL EXE.]
The standby system has been switched to the
control system in a redundant system. (Detected by
the CPU that was switched from the standby
system to the control system)
Since this error code does not indicate the error
RUN:
information of the CPU module but indicates its
On
status, the error code and error information are not
ERR.:
stored into SD0 to 26, but are stored into the error
6200 – Off
log every system switching.
(Check the error information by reading the error
CPU Status:
log using GX Developer.)
No error
■Collateral information
• Common Information:Reason(s) for system
switching
• Individual Information:–
■Diagnostic Timing
• Always
12-74
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[STANDBY]
The control system has been switched to the
1
standby system in a redundant system. (Detected
by the CPU that was switched from the control
system to the standby system)
Since this error code does not indicate the error
2
RUN:
information of the CPU module but indicates its
On
status, the error code and error information are not
ERR.:
3
stored into SD0 to 26, but are stored into the error
6210 – Off
log every system switching.
(Check the error information by reading the error
CPU Status:
log using GX Developer.)
No error
■Collateral information
• Common Information:Reason(s) for system 12
switching
• Individual Information:–
■Diagnostic Timing
• Always
[CAN'T SWITCH]
6
System switching cannot be executed due to
standby system error/ tracking cable error/ online
module change in execution at separate mode.
Causes for switching system at control system are
RUN:
On
6
as follows:
• Check the status of the standby system and ERR.: QnPRH
• System switching by SP. CONTSW instruction
6220 resolve the error. On
• System switching request from network module
■Collateral information
• Complete the online module change.
CPU Status:
7
• Common Information:Reason(s) for system switching
No error
• Individual Information:Reason(s) for system switching
failure
■Diagnostic Timing
• At switching execution
8
[STANDBY SYS. DOWN]
Any of the following errors was detected in the
• Check whether the standby system is on or not,
backup mode.
and if it is not on, power it on.
• The standby system has not started up in the
• Check whether the standby system has been
redundant system.
reset or not, and if it has been reset, unreset it. RUN:
• The standby system has developed a stop error
• Check whether the standby system has On
in the redundant system.
12-75
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
• The standby system exists but the control system
[CONTROL SYS. DOWN]
does not exist.
Any of the following errors was detected in the
• Check whether the system other than the
backup mode.
standby system is on or not, and if it is not on,
• The control system has not started up in the
power it on.
redundant system.
• Check whether the system other than the
• The control system has developed a stop error in
standby system has been reset or not, and if it is
the redundant system. RUN:
has been reset, unreset it.
• The CPU module in the debug mode was Off
• Check whether the system other than the
connected to the operating standby system. ERR.:
standby system has developed a stop error or
6310 • The error occurred at a startup since the Flicker
not, and if has developed the error, remove the
redundant system startup procedure was not
error factor, set the control system and standby
followed. CPU Status:
system to the same operating status, and restart.
(This can be detected from the standby system of Stop
• When the CPU module in the debug mode was
the redundant system.)
connected to the control system operating in the
■Collateral information
backup mode, make connection so that the
• Common Information:–
control system and control system are combined
• Individual Information:–
correctly. QnPRH
■Diagnostic Timing
• Always • Confirm the redundant system startup procedure,
and execute a startup again.
6311 [CONTROL SYS. DOWN]
• As consistency check data has not transmitted
from the control system in a redundant system,
the other system cannot start as a standby
system. RUN:
• Replace the tracking cable. If the same error still
• The error occurred at a startup since the Off
occurs, this indicates the CPU module is faulty.
redundant system startup procedure was not ERR.:
(Contact your local Mitsubishi representative,
followed. Flicker
6312 explaining a detailed description of the problem.)
(This can be detected from the standby system of
• Confirm the redundant system startup procedure,
the redundant system.) CPU Status:
and execute a startup again.
■Collateral information Stop
• Common Information:–
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[CONTROL SYS. DOWN]
The control system detected the error of the system RUN:
configuration and informed it to the standby system Off
Restart the system after checking that the
(host system) in the redundant system. ERR.:
connection between base unit and the system
6313 ■Collateral information Flicker QnPRH*1
configuration (type/number/parameter of module)
• Common Information:–
are correct.
• Individual Information:– CPU Status:
■Diagnostic Timing Stop
• At power ON/At reset
[PRG. MEM. CLEAR]
The memory copy from control system to standby
RUN:
system was executed, and the program memory
Off
was cleared.
After the memory copy from control system to ERR.:
■Collateral information
6400 standby system is completed, switch power OFF Flicker QnPRH
• Common Information:–
and then ON, or make a reset.
• Individual Information:–
CPU Status:
■Diagnostic Timing
• At execution of the memory copy from control Stop
system to standby system
12-76
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[MEM.COPY EXE]
The memory copy from control system to standby
1
system was executed. RUN:
(This can be detected from the control system of On
6410
the redundant system.)
■Collateral information –
ERR.:
On
2
• Common Information:–
• Individual Information:– CPU Status:
■Diagnostic Timing Continue
• At execution of the function of copying memory 3
from control system to standby system
[TRK. PARA. ERROR]
The file register file specified in the tracking setting
of the PLC parameter dialog box does not exist.
■Collateral information
Read the individual information of the error using
QnPRH
12
6500 GX Developer, and check and correct the drive
• Common Information:File name/Drive name
name and file name. Create the specified file.
• Individual Information:Parameter number
RUN:
■Diagnostic Timing
• At power ON/At reset
Off 6
ERR.:
[TRK. PARA. ERROR]
Flicker
The file register range specified in the device detail
setting of the tracking setting of the PLC parameter
dialog box exceeded the specified file register file
Read the individual information of the error using
CPU Status:
Stop
6
capacity.
6501 GX Developer, and increase the file register
■Collateral information
capacity.
• Common Information:File name/Drive name
• Individual Information:Parameter number
■Diagnostic Timing
7
• At power ON/At reset
12-77
12.1.9 Error code list (7000 to 10000)
The following shows the error messages from the error code 7000 to 10000, the contents and
causes of the errors, and the corrective actions for the errors.
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[MULTI CPU DOWN]
• In the operating mode of a multiple CPU system,
a CPU error occurred at the CPU where "All
station stop by stop error of CPU " was selected. • Read the individual information of the error using
• In a multiple CPU system, a CPU module GX Developer, identify the error of the CPU
incompatible with the multiple CPU system was Q00/Q01*1
module, and remove the error.
mounted.
• CPU modules other than CPU No.1 were
• Remove the CPU module incompatible with the Qn(H)*1
removed from the base unit in operation, or multiple CPU system from the main base unit. QnPH
reset. • Check the mounting status of CPU modules QnU*6
■Collateral information other than CPU No.1 and whether the CPU
• Common Information:Module No.(CPU No.) modules were reset.
• Individual Information:–
7000
■Diagnostic Timing
• Always
[MULTI CPU DOWN]
In a multiple CPU system, CPU other than CPU
No.1 cannot be started up due to stop error of the
CPU No.1 at power-on, which occurs to CPU No.2 Q00/Q01*1
Read the individual information of the error using
to No.4. Qn(H)*1
GX Developer, identify the error of the CPU
■Collateral information QnPH
module, and remove the error.
• Common Information:Module No.(CPU No.) QnU*6
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset RUN:
[MULTI CPU DOWN] Off
• There is no response from the target CPU • Reset the CPU module and RUN it again. If the ERR.:
module in a multiple CPU system during initial same error is displayed again, this suggests the Flicker
communication.
hardware fault of any of the CPU modules.
• In a multiple CPU system, a CPU module
(Contact your local Mitsubishi representative.) CPU Status: Q00/Q01*1
incompatible with the multiple CPU system was
• Remove the CPU module incompatible with the Stop Qn(H)*1
mounted.
■Collateral information multiple CPU system from the main base unit. QnPH
• Common Information:Module No.(CPU No.) Or, replace the CPU module incompatible with
• Individual Information:– the multiple CPU system with the compatible
■Diagnostic Timing one.
7002
• At power ON/At reset
[MULTI CPU DOWN]
• There is no response from the target CPU
module in a multiple CPU system during initial
• Reset the CPU module and RUN it again. If the
communication.
same error is displayed again, this suggests the
■Collateral information QnU*6
hardware fault of any of the CPU modules.
• Common Information:Module No.(CPU No.)
(Contact your local Mitsubishi representative.)
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[MULTI CPU DOWN]
There is no response from the target CPU module
in a multiple CPU system at initial communication
Reset the CPU module and RUN it again. If the
stage. Q00/Q01*1
same error is displayed again, this suggests the
7003 ■Collateral information Qn(H)*1
hardware fault of any of the CPU modules. (Contact
• Common Information:Module No.(CPU No.) QnPH
your local Mitsubishi representative.)
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
12-78
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[MULTI CPU DOWN] • Check the system configuration to see if modules
RUN: 1
In a multiple CPU system, a data error occurred in are mounted in excess of the number of I/O
Off
communication between the CPU modules. points.
ERR.:
■Collateral information • When there are no problems in the system Q00/Q01*1
7004 Flicker
• Common Information:Module No.(CPU No.)
• Individual Information:–
configuration, this indicates the CPU module
hardware is faulty. (Contact your local Mitsubishi
QnU*6 2
CPU Status:
■Diagnostic Timing representative, explaining a detailed description
• Always Stop
of the problem.)
[MULTI EXE. ERROR]
• In a multiple CPU system, a faulty CPU module
3
was mounted.
• In a multiple CPU system, a CPU module
incompatible with the multiple CPU system was • Read the individual information of the error using
mounted. (The CPU module compatible with the
multiple CPU system was used to detect an
GX Developer, and replace the faulty CPU
RUN:
Off
12
module. Q00/Q01*1
error.) ERR.:
• In a multiple CPU system, any of the CPU No. 2
• Replace the CPU module with the one Qn(H)*1
Flicker
to 4 was reset with power ON. (The CPU whose compatible with the multiple CPU system. QnPH
reset state was cancelled was used to detect an • Do not reset any of the No. 2 to 4 CPU modules.
• Reset CPU No. 1 and restart the multiple CPU
CPU Status: QnU*6 6
error.)
Stop
■Collateral information system.
• Common Information:Module No.(CPU No.)
• Individual Information:–
■Diagnostic Timing
6
• At power ON/At reset
[MULTI EXE. ERROR]
The PC CPU module-compatible software package RUN:
(PPC-DRV-01)*5 whose version is 1.06 or earlier is Off 7
used in a multiple CPU system. Change the version of the PC CPU module- ERR.:
■Collateral information compatible software package (PPC-DRV-01)*5 to Flicker Q00/Q01*1
• Common Information:Module No.(CPU No.) 1.07 or later.
7010
• Individual Information:– CPU Status: 8
■Diagnostic Timing Stop
• At power ON/At reset
[MULTI EXE. ERROR]
The Q172(H)CPU(N) or Q173(H)CPU(N) is
RUN:
mounted on the multiple CPU high-speed main
Off
base unit (Q3 DB). (This may result in a module
Replace the Q172(H)CPU(N) and Q173(H)CPU(N) ERR.:
failure.) with the Motion CPU compatible with the multiple Flicker
12-79
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[MULTI EXE. ERROR]
Either of the following settings was made in a
multiple CPU system.
RUN:
• Multiple CPU automatic refresh setting was
Off
made for the inapplicable CPU module. • Correct the multiple CPU automatic refresh
ERR.:
• "I/O sharing when using multiple CPUs" setting setting. Q00/Q01*1
Flicker
was made for the inapplicable CPU module. • Correct the "I/O sharing when using multiple QnU*6
■Collateral information CPUs" setting.
CPU Status:
• Common Information:Module No.(CPU No.)
Stop
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[MULTI EXE. ERROR]
The system configuration for using the Multiple
7011 CPU high speed transmission function is not met.
• The QnUCPU is not used for the CPU No.1.
• The Multiple CPU high speed main base unit
(Q3 DB) is not used. • Change the system configuration to meet the RUN:
• Points other than 0 is set to the send range for conditions for using the Multiple CPU high speed Off
the CPU module incompatible with the multiple transmission function. ERR.:
CPU high speed transmission function. • Set the send range of CPU, that does not Flicker QnU*3
• Points other than 0 is set to the send range for correspond to multiple CPU compatible area, at 0
the CPU module incompatible with the multiple point, when performing automatic refreshing in CPU Status:
CPU. multiple CPU compatible area. Stop
■Collateral information
• Common Information:Module No.(CPU No.)
• Individual Information:–
■Diagnostic Timing
• At power ON/At reset
[MULTI EXE. ERROR]
The Q172(H)CPU(N) or Q173(H)CPU(N) is RUN:
mounted to the CPU slot or slots 0 to 2. (The • Check the QCPU and Motion CPU that can be Off
module may break down.) used in a multiple CPU system, and change the ERR.:
7013 ■Collateral information system configuration. Flicker QnU
• Common Information:Module No.(CPU No.) • Remove the Motion CPU incompatible with the
• Individual Information:– multiple CPU system. CPU Status:
■Diagnostic Timing Stop
• At power ON/At reset
[MULTI CPU ERROR]
In the operating mode of a multiple CPU system, an
error occurred in the CPU where "system stop" was RUN:
not selected. On
Read the individual information of the error using Q00/Q01*1
(The CPU module where no error occurred was ERR.:
the peripheral device, check the error of the CPU Qn(H)*1
7020 used to detect an error.) On
module resulting in CPU module fault, and remove QnPH
■Collateral information
the error. QnU*6
• Common Information:Module No.(CPU No.) CPU Status:
• Individual Information:– Continue
■Diagnostic Timing
• Always
[CPU LAY. ERROR]
An assignment error occurred in the CPU- • Set the same value to the number of CPU RUN:
mountable slot (CPU slot, I/O slot 0, 1) in excess of
modules specified in the multiple CPU setting of Off
the number of CPU modules specified in the
multiple CPU setting of the PLC parameter dialog the PLC parameter dialog box and the number of ERR.:
Q00J/Q01/Q01*1
7030 box. mounted CPU modules (including CPU (empty)). Flicker
■Collateral information QnU
• Make the type specified in the I/O assignment
• Common Information:Module No.(CPU No.)
setting of the PLC parameter dialog box CPU Status:
• Individual Information:–
■Diagnostic Timing consistent with the CPU module configuration. Stop
• At power ON/At reset
12-80
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
[CPU LAY. ERROR]
An assignment error occurred within the range of
• Set the same value to the number of CPU RUN: 1
modules specified in the multiple CPU setting of Off
the number of CPUs specified in the multiple CPU
setting of the PLC parameter dialog box. the PLC parameter dialog box and the number of ERR.:
Q00J/Q01/Q01*1
7031 ■Collateral information mounted CPU modules (including CPU (empty)). Flicker
• Common Information:Module No.(CPU No.)
• Individual Information:–
• Make the type specified in the I/O assignment
setting of the PLC parameter dialog box CPU Status:
QnU
2
■Diagnostic Timing
• At power ON/At reset consistent with the CPU module configuration. Stop
7035
inapplicable slot.
■Collateral information
Mount the CPU module on the applicable slot.
ERR.:
Flicker
Q00J/Q00/Q01*1
QnPRH
6
• Common Information:Module No.(CPU No.)
• Individual Information:– QnU
■Diagnostic Timing CPU Status:
• At power ON/At reset
[CPU RAY ERROR]
Stop
RUN:
6
The host CPU No. set by the multiple CPU setting
• Mount the mounting slot of the CPU module Off
and the host CPU No. determined by the mounting
position of the CPU module are not the same. correctly. ERR.:
7036 ■Collateral information
• Common Information:Module No.(CPU No.)
• Correct the host CPU No. set by the multiple
CPU setting to the CPU No. determined by the
Flicker QnU*3
7
• Individual Information:–
mounting position of the CPU module. CPU Status:
■Diagnostic Timing
• At power ON/At reset Stop
[INCORRECT FILE]
The error of stored file (enabled parameter file) is
Write the file shown as SD17 to SD22 of individual
information to the drive shown as SD16(L) of RUN:
8
detected.
■Collateral information individual information, and turn ON from OFF the Off
• Common Information:– power supply of the CPU module or cancel the ERR.:
8031 • Individual Information:File diagnostic information reset. Flicker QnU
■Diagnostic Timing
If the same error is displayed again, the CPU
• At power-On/
• At reset/ module has hardware failure. Contact your local CPU Status:
• STOP RUN/At writing to progurammable Mitsubishi representative, explaining a detailed Stop
controller description of the problem.
CPU Status:
Continue
12-81
Error
LED Status Corresponding
Code Error Contents and Cause Corrective Action
CPU Status CPU
(SD0)
RUN:
[<CHK>ERR ***-***]
On
Error detected by the CHK instruction.
Read the individual information of the error using ERR.:
■Collateral information Qn(H)
the peripheral device, and check the program Off
9010 • Common Information:Program error location QnPH
corresponding to the numerical value (error USER LED On
• Individual Information:Failure No. QnPRH
number) there.
■Diagnostic Timing
• When instruction executed CPU Status:
Continue
[BOOT OK]
Storage of data onto ROM was completed normally RUN:
in automatic write to standard ROM. Off
Use the DIP switches to set the valid parameter
(BOOT LED also flickers.) ERR.: Qn(H)*1
drive to the standard ROM. Then, switch power on
9020 ■Collateral information Flicker QnPH
again, and perform boot operation from the
• Common Information:– QnPRH
standard ROM.
• Individual Information:– CPU Status:
■Diagnostic Timing Stop
• At power ON/At reset
[CONT. UNIT ERROR]
In the multiple CPU system, an error occurred in RUN:
the CPU module other than the Process CPU/High Off
Performance model QCPU. Check the details of the generated error by ERR.:
Qn(H)*1
10000 ■Collateral information connecting to the corresponding CPU module Flicker
QnPH
• Common Information:– using GX Developer.
• Individual Information:– CPU Status:
■Diagnostic Timing Continue
• Always
12-82
12.2 Canceling of Errors
1
Q series CPU module can perform the cancel operation for errors only when the errors allow
the CPU module to continue its operation.
To cancel the errors, follow the steps shown below. 2
1) Eliminate the cause of the error.
2) Store the error code to be canceled in the special register SD50. 3
3) Energize the special relay SM50 (OFF ON).
4) The error to be canceled is canceled.
After the CPU module is reset by the canceling of the error, the special relays, special
12
registers, and LEDs associated with the error are returned to the status under which the
error occurred.
If the same error occurs again after the cancellation of the error, it will be registered again in 6
the error history.
When multiple enunciators(F) detected are canceled, the first one with No. F only is
canceled.
6
Refer to the following manual for details of error canceling.
QCPU User's Manual (Function Explanation, Program Fundamentals) 7
8
(1) When the error is canceled with the error code to be canceled stored in the
SD50, the lower one digit of the code is neglected.
(Example)
If error codes 2100 and 2101 occur, and error code 2100 to cancel error code
2101.
If error codes 2100 and 2111 occur, error code 2111 is not canceled even if
12-83
MEMO
12-84
A
8
APPENDICES 8
App-1
Appendix 1 OPERATION PROCESSING TIME
App-2
Appendix 1.2 Operation Processing Time of Basic Model
QCPU 8
The processing time for the individual instructions are shown in the table on the following pages.
Operation processing times can vary substantially depending on the nature of the sources and
8
destinations of the instructions, and the values contained in the following tables should therefore
be taken as a set of general guidelines to processing time rather than as being strictly accurate.
8
(1) Sequence instructions
Processing Time (µs) 8
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU
LD
LDI X0 0.20 0.16 0.10 A
AND
ANI
OR
D0.0 0.30 0.24 0.15 6
ORI
LDP
LDF X0 7
ANDP
0.30 0.24 0.15
ANDF
ORP D0.0 8
ORF
ANB
ORB
MPS –– 0.20 0.16 0.10
(OFF OFF)
When not executed
(ON ON)
EGP 0.20 0.16 0.10
(OFF ON)
When executed
(ON OFF)
(OFF OFF)
When not executed 17 9.5 9.4
(ON ON)
EGF
(OFF ON)
When executed 18 14 14
(ON OFF)
App-3
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU
When not (OFF OFF)
0.20 0.16 0.10
changed (ON ON)
Y
When (OFF ON)
0.20 0.16 0.10
changed (ON OFF)
When not (OFF OFF)
0.40 0.32 0.20
changed (ON ON)
D0.0
When (OFF ON)
0.40 0.32 0.20
changed (ON OFF)
When OFF 24 20 19
OUT
F When When displayed 260 210 200
ON Display completed 205 165 155
When not executed 1.1 0.88 0.55
After time up 1.1 0.88 0.55
T When
K 1.1 0.88 0.55
executed When added
D 1.2 0.96 0.60
When not executed 1.1 0.88 0.55
After time up 1.1 0.88 0.55
C When
K 1.1 0.88 0.55
executed When added
D 1.2 0.96 0.60
When not executed 1.1 0.88 0.55
After time up 1.1 0.88 0.55
OUTH T When
K 1.1 0.88 0.55
executed When added
D 1.2 0.96 0.60
When not executed 0.20 0.16 0.10
Y When When not changed (ON ON) 0.20 0.16 0.10
executed When changed (OFF ON) 0.20 0.16 0.10
When not executed 0.40 0.32 0.20
SET D0.0 When When not changed (ON ON) 0.40 0.32 0.20
executed When changed (OFF ON) 0.40 0.32 0.20
When not executed 0.50 0.44 0.25
F When When displayed 255 205 195
executed Display completed 195 160 150
When not executed 0.20 0.16 0.10
Y When When not changed (OFF OFF) 0.20 0.16 0.10
executed When changed (ON OFF) 0.20 0.16 0.10
When not executed 0.40 0.32 0.20
D0.0 When When not changed (ON ON) 0.40 0.32 0.20
executed When changed (OFF ON) 0.40 0.32 0.20
When not executed 0.20 0.16 0.10
SM
When executed 0.20 0.16 0.10
When not executed 0.48 0.44 0.25
RST
F When When displayed 75 69 65
executed Display completed 43 35 33
When not executed 0.80 0.64 0.40
T, C
When executed 1.0 0.80 0.50
When not executed 0.40 0.32 0.20
D
When executed 0.60 0.48 0.30
When not executed 0.50 0.40 0.25
Z
When executed 9.4 7.9 7.4
When not executed –– 0.32 0.20
R
When executed –– 0.48 0.30
App-4
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU
8
PLS 12 9.5 9.2
PLF 11 9.5 8.9
FF Y
When not executed
When executed
0.68
7.5
0.40
6.2
0.25
5.7
8
When not executed 0.50 0.40 0.25
DELTA DY0
When executed 26 21 21
When not executed 0.48 0.40 0.25
8
DELTAP DY0
When executed 58 45 43
SFT When not executed 0.50 0.34 0.25
SFTP When executed 12 8.7 8.3 8
M0 0.40 0.32 0.20
MC
D0.0 3.3 2.9 2.8
MCR –– 0.20 0.16 0.10 A
Error check performed 660 600 520
No error check performed
FEND
END
(• Battery check)
(• Fuse blown check)
660 600 520 6
(• I/O module verification)
NOP –– 0.20 0.16 0.10
NOPLF 7
–– 0.20 0.16 0.10
PAGE
8
(2) Basic instructions
The processing time when the instruction is not executed is calculated as follows:
Q00JCPU ··················································· 0.20 (No. of steps for each instruction + 1) µs
Q00CPU ····················································· 0.16 (No. of steps for each instruction + 1) µs
App-5
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU
When not executed 0.70 0.56 0.35
OR < > In conductive status 0.80 0.64 0.40
When executed
In non-conductive status 0.80 0.64 0.40
In conductive status 0.80 0.64 0.40
LD >
In non-conductive status 0.80 0.64 0.40
When not executed 0.70 0.56 0.35
AND > In conductive status 0.80 0.64 0.40
When executed
In non-conductive status 0.80 0.64 0.40
When not executed 0.70 0.56 0.35
OR > In conductive status 0.80 0.64 0.40
When executed
In non-conductive status 0.80 0.64 0.40
In conductive status 0.80 0.64 0.40
LD < =
In non-conductive status 0.80 0.64 0.40
When not executed 0.70 0.56 0.35
AND < = In conductive status 0.80 0.64 0.40
When executed
In non-conductive status 0.80 0.64 0.40
When not executed 0.70 0.56 0.35
OR < = In conductive status 0.80 0.64 0.40
When executed
In non-conductive status 0.80 0.64 0.40
In conductive status 0.80 0.64 0.40
LD <
In non-conductive status 0.80 0.64 0.40
When not executed 0.70 0.56 0.35
AND < In conductive status 0.80 0.64 0.40
When executed
In non-conductive status 0.80 0.64 0.40
When not executed 0.70 0.56 0.35
OR < In conductive status 0.80 0.64 0.40
When executed
In non-conductive status 0.80 0.64 0.40
In conductive status 0.80 0.64 0.40
LD > =
In non-conductive status 0.80 0.64 0.40
When not executed 0.70 0.56 0.35
AND > = In conductive status 0.80 0.64 0.40
When executed
In non-conductive status 0.80 0.64 0.40
When not executed 0.70 0.56 0.35
OR > = In conductive status 0.80 0.64 0.40
When executed
In non-conductive status 0.80 0.64 0.40
In conductive status 1.0 0.80 0.50
LDD =
In non-conductive status 1.0 0.80 0.50
When not executed 0.80 0.64 0.40
ANDD = In conductive status 1.0 0.80 0.50
When executed
In non-conductive status 1.0 0.80 0.50
When not executed 0.80 0.64 0.40
ORD = In conductive status 1.0 0.80 0.50
When executed
In non-conductive status 1.0 0.80 0.50
In conductive status 1.0 0.80 0.50
LDD < >
In non-conductive status 1.0 0.80 0.50
When not executed 0.80 0.64 0.40
ANDD < > In conductive status 1.0 0.80 0.50
When executed
In non-conductive status 1.0 0.80 0.50
App-6
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU 8
When not executed 0.80 0.64 0.40
ORD < > In conductive status 1.0 0.80 0.50
When executed
In non-conductive status 1.0 0.80 0.50
8
In conductive status 1.0 0.80 0.50
LDD >
In non-conductive status 1.0 0.80 0.50
When not executed 0.80 0.64 0.40
8
ANDD > In conductive status 1.0 0.80 0.50
When executed
In non-conductive status 1.0 0.80 0.50
When not executed 0.80 0.64 0.40
8
ORD > In conductive status 1.0 0.80 0.50
When executed
In non-conductive status 1.0 0.80 0.50
LDD < =
In conductive status 1.0 0.80 0.50
A
In non-conductive status 1.0 0.80 0.50
When not executed 0.80 0.64 0.40
ANDD < =
When executed
In conductive status
In non-conductive status
1.0
1.0
0.80
0.80
0.50
0.50
6
When not executed 0.80 0.64 0.40
ORD < =
When executed
In conductive status
In non-conductive status
1.0
1.0
0.80
0.80
0.50
0.50
7
In conductive status 1.0 0.80 0.50
LDD <
In non-conductive status 1.0 0.80 0.50
When not executed 0.80 0.64 0.40
8
ANDD < In conductive status 1.0 0.80 0.50
When executed
In non-conductive status 1.0 0.80 0.50
When not executed 0.80 0.64 0.40
App-7
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU
+ S D
When executed 1.0 0.80 0.50
+P S D
+ S1 S2 D
When executed 1.2 0.96 0.60
+P S1 S2 D
- S D
When executed 1.0 0.80 0.50
-P S D
- S1 S2 D
When executed 1.2 0.96 0.60
- P S1 S2 D
D+ S D
When executed 1.3 1.04 0.65
D+P S D
D+ S1 S2 D
When executed 1.5 1.2 0.75
D+P S1 S2 D
D- S D
When executed 1.3 1.04 0.65
D-P S D
D - S1 S2 D
When executed 1.5 1.2 0.75
D - P S1 S2 D
* S1 S2 D
When executed 1.1 0.88 0.55
* P S1 S2 D
/ S1 S2 D
–– 19 16 15
/P S1 S2 D
D * S1 S2 D
–– 41 34 31
D * P S1 S2 D
D/ S1 S2 D
–– 28 23 21
D/P S1 S2 D
B+ S D
–– 34 28 26
B+P S D
B+ S1 S2 D
–– 47 39 37
B+P S1 S2 D
B- S D
–– 34 28 26
B-P S D
B - S1 S2 D
–– 48 40 38
B - P S1 S2 D
DB+ S D
–– 58 48 44
DB+P S D
DB+ S1 S2 D
–– 60 49 46
DB+P S1 S2 D
DB - S D
–– 59 48 45
DB - P S D
DB - S1 S2 D
–– 60 51 45
DB - P S1 S2 D
App-8
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU 8
B* S1 S2 D
–– 42 35 33
B * P S1 S2 D
8
B/ S1 S2 D
–– 48 40 37
B/P S1 S2 D
DB * S1 S2 D 8
–– 140 120 110
DB * P S1 S2 D
DB/ S1 S2 D
–– 83 69 65 8
DB/P S1 S2 D
BK + S1 S2 D n n=1 105 86 80
BK - S1 S2 D n n=1 105 86 80
App-9
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU
BKBCD S D n n=1 78 63 57
BKBIN S D n n=1 74 61 57
$MOV 0 characters 46 38 35
$MOVP 32 characters 98 80 73
CML
–– 0.70 0.56 0.35
CMLP
DCML
–– 0.90 0.72 0.45
DCMLP
BMOV S D n n=1 27 21 20
BMOVP S D n n = 96 72 62 53
FMOV S D n n=1 23 19 17
FMOVP S D n n = 96 48 41 36
XCH
–– 7.6 6.3 5.7
XCHP
DXCH
–– 9.5 8.0 7.1
DXCHP
BXCH D1 D2 n n=1 62 51 48
SWAP
–– 17 14 13
SWAPP
CJ –– 10 8.5 8.1
SCJ –– 10 8.5 8.1
JMP –– 11 8.5 8.1
GOEND –– 3.3 2.9 2.8
DI –– 13 12 11
EI –– 14 11 11
IMASK –– 41 34 35
IRET –– 205 170 155
n=1 55 46 43
X
RFS n = 96 79 64 59
RFSP n=1 54 45 41
Y
n = 96 73 61 56
App-10
(3) Application instructions
The processing time when the instruction is not executed is calculated as follows:
Q00JCPU ··················································· 0.20 (No. of steps for each instruction + 1) µs
8
Q00CPU ····················································· 0.16 (No. of steps for each instruction + 1) µs
Q01CPU ····················································· 0.10 (No. of steps for each instruction + 1) µs
8
DAND S D
When executed 1.3 1.04 0.65
DANDP S D
DAND S1 S2 D
6
When executed 1.5 1.2 0.75
DANDP S1 S2 D
WOR S D
When executed 1.0 0.80 0.50 8
WORP S D
WOR S1 S2 D
When executed 1.2 0.96 0.60
WORP S1 S2 D
DOR S1 S2 D
When executed 1.5 1.2 0.75
DORP S1 S2 D
WXOR S D
When executed 1.0 0.80 0.50
WXORP S D
WXOR S1 S2 D
When executed 1.2 0.96 0.60
WXORP S1 S2 D
DXOR S D
When executed 1.3 1.04 0.65
DXORP S D
DXOR S1 S2 D
When executed 1.5 1.2 0.75
DXORP S1 S2 D
App-11
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU
WXNR S D
When executed 1.0 0.80 0.50
WXNRP S D
WXNR S1 S2 D
When executed 1.2 0.96 0.60
WXNRP S1 S2 D
DXNR S D
When executed 1.3 1.04 0.65
DXNRP S D
DXNR S1 S2 D
When executed 1.5 1.2 0.75
DXNRP S1 S2 D
RORP D n n = 15 13 11 9.7
RCR D n n=1 15 12 12
RCRP D n n = 15 15 13 12
ROL D n n=1 13 11 10
ROLP D n n = 15 13 11 10
RCL D n n=1 15 13 12
RCLP D n n = 15 16 13 12
DROR D n n=1 15 12 12
DRORP D n n = 31 15 13 12
DRCR D n n=1 17 14 14
DRCRP D n n = 31 18 16 15
DROL D n n=1 14 13 12
DROLP D n n = 31 14 13 12
DRCL D n n=1 18 15 14
DRCLP D n n = 31 20 17 16
SFRP D n n = 15 13 11 9.5
BSFLR D n n=1 42 35 33
BSFLRP D n n = 96 69 58 54
BSFL D n n=1 41 34 32
BSFLP D n n = 96 63 53 50
DSFR D n n=1 19 16 15
DSFRP D n n = 96 71 61 53
DSFL D n n=1 19 16 15
DSFLP D n n = 96 70 60 52
App-12
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU 8
BSET D n n=1 27 22 20
BSETP D n n = 15 27 22 20
8
BRST D n n=1 27 22 21
BRSTP D n n = 15 27 22 21
TEST S1 S2 D
8
–– 35 30 27
TESTP S1 S2 D
DTEST S1 S2 D
–– 37 31 28
8
DTESTP S1 S2 D
n=1 49 41 38
BKRST D n
A
BKRSTP D n n = 96 64 54 50
All match 56 54 42
n=1
SER S1 S2 D n None match 56 54 42 6
SERP S1 S2 D n
All match 280 240 220
n = 96
None match 280 240 220
n=1
All match 71 67 53 7
DSER S1 S2 D n None match 71 67 54
DSERP S1 S2 D n
All match 495 415 375
n = 96
None match 500 415 375 8
SUM S =0 32 26 25
SUMP 27 22 21
S = FFFFH
DSUM S =0 54 44 42
DECO S D n n=2 60 50 46
DECOP S D n n=8 80 65 61
M1 = ON 66 55 51
n=2
ENCO S D n M4 = ON 66 54 51
ENCOP S D n
M1 = ON 90 76 71
n=8
M256 = ON 76 74 71
SEG
–– 8.0 6.8 6.1
SEGP
DIS S D n n=1 47 39 36
DISP S D n n=4 53 43 40
UNI S D n n=1 54 44 41
UNIP S D n n=4 60 49 46
NDIS S1 D S2
–– 92 76 38
NDISP S1 D S2
NUNI S1 D S2
–– 47 39 36
NUNIP S1 D S2
App-13
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU
WTOB S D n n=1 56 46 42
BTOW S D n n=1 56 46 42
MAX S D n n=1 48 40 36
MIN S D n n=1 48 40 36
DMAX S D n n=1 52 43 39
DMIN S D n n=1 52 43 39
n=1 66 55 50
SORT S1 n S2 D1 D2
n = 96 105 86 80
n=1 98 57 52
DSORT S1 n S2 D1 D2
n = 96 115 96 88
WSUM S D n n=1 52 43 40
DWSUM S D n n=1 61 51 46
CALL Pn S1 to S5
–– 245 200 190
CALLP Pn S1 to S5
RET Return to original program 16 13 12
FCALL Pn
–– 29 24 22
FCALLP Pn
FCALL Pn S1 to S5
–– 250 205 190
FCALLP Pn S1 to S5
App-14
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU 8
COM –– 110 77 72
IX –– 65 54 51
IXEND –– 30 26 25
8
Number of contacts 1 145 120 110
IXDEV + IXSET
Number of contacts 14 770 630 585
FIFW Number of data points 0 36 32 28 8
FIFWP Number of data points 96 36 32 28
FIFR Number of data points 1 45 41 36
FIFRP Number of data points 96 93 82 70 8
FPOP Number of data points 1 40 37 32
FPOPP Number of data points 96 40 37 32
FINS Number of data points 0 53 44 38 A
FINSP Number of data points 96 100 89 76
FDEL Number of data points 1 60 50 43
FDELP Number of data points 96 110 95 82 6
FROM n1 n2 D n3 n3 = 1 125 105 93
*1 : The FROM/TO instruction differs in processing time according to the number of slots and the loaded
modules. (The CPU also differs in processing time according to the extension base type.)
App-15
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU
LIMIT
–– 34 28 26
LIMITP
DLIMIT
–– 41 34 30
DLIMITP
BAND
–– 33 28 25
BANDP
DBAND
–– 40 34 30
DBANDP
ZONE
–– 31 25 24
ZONEP
DZONE
–– 37 29 28
DZONEP
RSET
–– –– 18 16
RSETP
DATERD
–– 30 25 23
DATERDP
DATEWR
–– 69 57 54
DATEWRP
DATE+ No digit increase 47 39 36
DATE+P Digit increase 50 42 38
DATE - No digit increase 47 40 36
DATE - P Digit increase 50 42 38
SECOND
–– 28 24 22
SECONDP
HOUR
–– 38 32 29
HOURP
WDT
–– 18 15 14
WDTP
DUTY –– 41 36 32
ZRRDB
–– –– 24 22
ZRRDBP
ZRWRB
–– –– 27 24
ZRWRBP
ADRSET
–– 23 19 18
ADRSETP
ZPUSH
–– 38 33 30
ZPUSHP
ZPOP
–– 37 31 29
ZPOPP
ZCOM –– 105 82 80
App-16
(5) Instructions executable by the product with the first 5 digits of the serial No. "04122" or higher
App-17
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU
When not executed 1.5 1.2 1.0
ORE > = Single precision In conductive status 45.0 38.5 34.5
When executed
In non-conductive status 37.5 31.0 28.5
App-18
Processing Time (µs)
Instruction Condition (Device)
Q00JCPU Q00CPU Q01CPU 8
SIN
Single precision 204.0 173.0 157.0
SINP
COS
COSP
Single precision 187.0 158.0 144.0 8
TAN
Single precision 224.0 190.0 173.0
TANP
RAD
Single precision 51.0 43.0 39.0
8
RADP
DEG
Single precision 51.0 43.0 39.0
DEGP 8
SQR
Single precision 60.0 51.0 46.5
SQRP
EXP
Single precision
S = - 10 306.0 259.0 235.0
A
EXPP 306.0 259.0 235.0
S =1
RND
–– 12.5 11.0 10.0
RNDP
7
SRND
–– 13.5 12.0 11.0
SRNDP
App-19
Instruction Processing Time (µs)
Condition/Number of Points Processed
Name Q00JCPU Q00CPU Q01CPU
With auto refresh of CPU Refresh range: 2k words
–– 920 880
shared memory (0.5k words assigned equally to all CPUs)
COM *2
Without auto refresh of CPU
–– –– 150 135
shared memory
Read from CPU shared n3 = 1 –– 100 90
memory of host CPU n3 = 320 –– 440 420
FROM
Read from CPU shared n3 = 1 –– 110 105
memory of another CPU n3 = 320 –– 305 290
Write to CPU shared memory n3 = 1 –– 100 95
TO
of host CPU n3 = 320 –– 440 425
Write to CPU shared memory n4 = 1 –– 205 195
S.TO
of host CPU n4 = 320 –– 545 525
*2: If the processing overlaps those of the other CPUs in a multiple CPU system, the processing time increases
by a maximum of the following time.
(6) Table of the time to be added when file register, module access device or link direct device is
used
App-20
Appendix 1.3 Operation Processing Time of High Performance
Model QCPU/Process CPU/Redundant CPU 8
The processing time for the individual instructions are shown in the table on the following pages. 8
Operation processing time can vary substantially depending on the nature of the sources and
destinations of the instructions, and the values contained in the following tables should therefore
be taken as a set of general guidelines to processing times rather than as being strictly accurate. 8
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
MPP
When not executed
INV 0.079 0.034 0.034 0.034
When executed
MEP When not executed
0.173 0.073 0.073 0.073
MEF When executed
(OFF OFF)
When not executed
EGP (ON ON)
0.158 0.068 0.068 0.068
EGF (OFF ON)
When executed
(ON OFF)
App-21
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
(OFF OFF)
When not changed 0.158 0.068 0.068 0.068
(ON ON)
(OFF ON)
When changed 0.158 0.068 0.068 0.068
(ON OFF)
When OFF 2.8 1.2 1.2 1.2
F When When displayed 162 69.7 69.7 69.7
ON Display completed 126 54 54 54
OUT When not executed 0.63 0.27 0.27 0.27
After time up 0.63 0.27 0.27 0.27
T When
K 0.63 0.27 0.27 0.27
executed When added
D 0.63 0.27 0.27 0.27
When not executed 0.63 0.27 0.27 0.27
After time up 0.63 0.27 0.27 0.27
C When
K 0.63 0.27 0.27 0.27
executed When added
D 0.63 0.27 0.27 0.27
When not executed 0.63 0.27 0.27 0.27
After time up 0.63 0.27 0.27 0.27
OUTH T When
K 0.63 0.27 0.27 0.27
executed When added
D 0.63 0.27 0.27 0.27
When not executed 0.158 0.068 0.068 0.068
When not changed (ON ON) 0.158 0.068 0.068 0.068
When executed
When changed (OFF ON) 0.158 0.068 0.068 0.068
SET
When not executed 0.47 0.20 0.20 0.20
F When When displayed 161 69 69 69
executed Display completed 0.47 0.20 0.20 0.20
When not executed 0.158 0.068 0.068 0.068
When not changed (OFF OFF) 0.158 0.068 0.068 0.068
When executed
When changed (ON OFF) 0.158 0.068 0.068 0.068
When not executed 0.158 0.068 0.068 0.068
SM
When executed 0.158 0.068 0.068 0.068
When not executed 0.47 0.20 0.20 0.20
F When When displayed 90 38 38 38
executed Display completed 0.47 0.20 0.20 0.20
RST
When not executed 0.63 0.27 0.27 0.27
T, C
When executed 0.63 0.27 0.27 0.27
When not executed 0.24 0.10 0.10 0.10
D
When executed 0.24 0.10 0.10 0.10
When not executed 0.47 0.20 0.20 0.20
Z
When executed 4.3 1.9 1.9 1.9
When not executed 0.40 0.17 0.17 0.17
R
When executed 0.40 0.17 0.17 0.17
PLS
–– 1.0 0.44 0.44 0.44
PLF
When not executed 0.47 0.20 0.20 0.20
FF Y
When executed 0.47 0.20 0.20 0.20
DELTA When not executed 0.47 0.20 0.20 0.20
DY0
DELTAP When executed 5.9 2.6 2.6 2.6
App-22
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH 8
SFT When not executed 0.47 0.20 0.20 0.20
SFTP When executed 1.66 0.71 0.71 0.71
MC –– 0.24 0.10 0.10 0.10
8
MCR –– 0.079 0.034 0.034 0.034
Error check performed 380 150 150 500
FEND
No error check performed
(• Battery check)
8
END 380 150 150 500
(• Fuse blown check)
(• I/O module verification)
NOP –– 0.079 0.034 0.034 0.034 8
NOPLF
–– 0.079 0.034 0.034 0.034
PAGE
A
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
App-23
(2) Basic instructions
The processing time when the instruction is not executed is calculated as follows:
Q02CPU ·····················································0.079 (No. of steps for each instruction + 1) µs
Q02HCPU, Q06HCPU, Q12HCPU, Q25HCPU, Q02PHCPU, Q06PHCPU, Q12PHCPU,
Q25PHCPU, Q12PRHCPU, Q25PRHCPU 0.034 (No. of steps for each instruction + 1) µs
App-24
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH 8
When not executed 0.24 0.10 0.10 0.10
OR < = In conductive status 0.24 0.10 0.10 0.10
When executed
In non-conductive status
In conductive status
0.24
0.24
0.10
0.10
0.10
0.10
0.10
0.10
8
LD <
In non-conductive status 0.24 0.10 0.10 0.10
When not executed 0.24 0.10 0.10 0.10
AND < In conductive status 0.24 0.10 0.10 0.10
8
When executed
In non-conductive status 0.24 0.10 0.10 0.10
When not executed 0.24 0.10 0.10 0.10
OR < In conductive status 0.24 0.10 0.10 0.10 8
When executed
In non-conductive status 0.24 0.10 0.10 0.10
In conductive status 0.24 0.10 0.10 0.10
LD > =
In non-conductive status 0.24 0.10 0.10 0.10 A
When not executed 0.24 0.10 0.10 0.10
AND > = In conductive status 0.24 0.10 0.10 0.10
When executed
In non-conductive status 0.24 0.10 0.10 0.10 6
When not executed 0.24 0.10 0.10 0.10
OR > = In conductive status 0.24 0.10 0.10 0.10
When executed
In non-conductive status 0.24 0.10 0.10 0.10
7
In conductive status 0.55 0.24 0.24 0.24
LDD =
In non-conductive status 0.39 0.17 0.17 0.17
ANDD =
When not executed
In conductive status
0.39
0.55
0.17
0.24
0.17
0.24
0.17
0.24
8
When executed
In non-conductive status 0.39 0.17 0.17 0.17
When not executed 0.39 0.17 0.17 0.17
ORD = In conductive status 0.55 0.24 0.24 0.24
When executed
In non-conductive status 0.55 0.24 0.24 0.24
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
In conductive status 0.55 0.24 0.24 0.24
LDD < >
In non-conductive status 0.55 0.24 0.24 0.24
When not executed 0.39 0.17 0.17 0.17
ANDD < > In conductive status 0.55 0.24 0.24 0.24
When executed
In non-conductive status 0.55 0.24 0.24 0.24
When not executed 0.39 0.17 0.17 0.17
ORD < > In conductive status 0.55 0.24 0.24 0.24
When executed
In non-conductive status 0.55 0.24 0.24 0.24
In conductive status 0.55 0.24 0.24 0.24
LDD >
In non-conductive status 0.55 0.24 0.24 0.24
When not executed 0.39 0.17 0.17 0.17
ANDD > In conductive status 0.55 0.24 0.24 0.24
When executed
In non-conductive status 0.55 0.24 0.24 0.24
When not executed 0.39 0.17 0.17 0.17
ORD > In conductive status 0.55 0.24 0.24 0.24
When executed
In non-conductive status 0.55 0.24 0.24 0.24
In conductive status 0.55 0.24 0.24 0.24
LDD < =
In non-conductive status 0.55 0.24 0.24 0.24
When not executed 0.39 0.17 0.17 0.17
ANDD < = In conductive status 0.55 0.24 0.24 0.24
When executed
In non-conductive status 0.55 0.24 0.24 0.24
When not executed 0.39 0.17 0.17 0.17
ORD < = In conductive status 0.55 0.24 0.24 0.24
When executed
In non-conductive status 0.55 0.24 0.24 0.24
App-25
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
In conductive status 0.55 0.24 0.24 0.24
LDD <
In non-conductive status 0.55 0.24 0.24 0.24
When not executed 0.39 0.17 0.17 0.17
ANDD < In conductive status 0.55 0.24 0.24 0.24
When executed
In non-conductive status 0.55 0.24 0.24 0.24
When not executed 0.39 0.17 0.17 0.17
ORD < In conductive status 0.55 0.24 0.24 0.24
When executed
In non-conductive status 0.55 0.24 0.24 0.24
In conductive status 0.55 0.24 0.24 0.24
LDD > =
In non-conductive status 0.55 0.24 0.24 0.24
When not executed 0.39 0.17 0.17 0.17
ANDD > = In conductive status 0.55 0.24 0.24 0.24
When executed
In non-conductive status 0.55 0.24 0.24 0.24
When not executed 0.39 0.17 0.17 0.17
ORD > = In conductive status 0.55 0.24 0.24 0.24
When executed
In non-conductive status 0.55 0.24 0.24 0.24
93 40
In conductive status 6.4 6.4
Single 14.9 6.4
precision 92 40
In non-conductive status 6.4 6.4
14.9 6.4
*1
LDE =
93 40
In conductive status –– ––
Double 14.9 6.4
precision 92 40
In non-conductive status –– ––
14.9 6.4
When not executed 0.55 0.24 0.24 0.24
93 40
Single In conductive status 6.4 6.4
When 14.9 6.4
precision
executed 92 40
In non-conductive status 6.4 6.4
14.9 6.4
ANDE = *1
When not executed –– –– –– ––
93 40
Double In conductive status –– ––
When 14.9 6.4
precision
executed 92 40
In non-conductive status –– ––
14.9 6.4
When not executed 0.55 0.24 0.24 0.24
93 40
Single In conductive status 6.4 6.4
When 14.9 6.4
precision
executed 92 40
In non-conductive status 6.4 6.4
14.9 6.4
ORE = *1
When not executed 0.55 0.24 –– ––
93 40
Double In conductive status –– ––
When 14.9 6.4
precision
executed 92 40
In non-conductive status –– ––
14.9 6.4
*1 : The Qn/QnH changes in processing time depending on the serial No. of the CPU module.
Top : The first 5 digits of the serial No. are "05031" or lower
Bottom : The first 5 digits of the serial No. are "05032" or higher
For the condition to be satisfied when the instruction is not executed, there is no differentiation between the
top and bottom.
App-26
Processing Time (µs)
Instruction Condition (Device)
Qn
92
QnH
40
QnPH QnPRH
8
In conductive status 6.4 6.4
Single 14.9 6.4
precision 92 40
LDE<> *1
In non-conductive status
14.9 6.4
6.4 6.4
8
92 40
In conductive status –– ––
Double 14.9 6.4
precision
In non-conductive status
92
14.9
40
6.4
–– –– 8
When not executed 0.55 0.24 0.24 0.24
92 40
Single
precision
When
In conductive status
14.9 6.4
6.4 6.4
8
executed 93 40
In non-conductive status 6.4 6.4
14.9 6.4
ANDE<> *1
When not executed 0.55
92
0.24
40
–– ––
A
Double In conductive status –– ––
When 14.9 6.4
precision
executed 92 40
In non-conductive status
14.9 6.4
–– ––
6
When not executed 0.55 0.24 0.24 0.24
93 40
Single In conductive status 6.4 6.4
precision
When
executed
14.9
92
6.4
40
7
In non-conductive status 6.4 6.4
14.9 6.4
ORE<> *1
When not executed 0.55 0.24 –– ––
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
Single 14.9 6.4
precision In conductive status 92 40
6.4 6.4
14.9 6.4
LDE> *1
92 40
–– ––
Double 14.9 6.4
In non-conductive status
precision 92 40
–– ––
14.9 6.4
When not executed 0.55 0.24 0.24 0.24
92 40
Single In conductive status 6.4 6.4
When 14.9 6.4
precision
executed 93 40
In non-conductive status 6.4 6.4
14.9 6.4
ANDE> *1
When not executed 0.55 0.24 –– ––
92 40
Double In conductive status –– ––
When 14.9 6.4
precision
executed 92 40
In non-conductive status –– ––
14.9 6.4
*1 : The Qn/QnH changes in processing time depending on the serial No. of the CPU module.
Top : The first 5 digits of the serial No. are "05031" or lower
Bottom : The first 5 digits of the serial No. are "05032" or higher
For the condition to be satisfied when the instruction is not executed, there is no differentiation between the
top and bottom.
App-27
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
When not executed 0.55 0.24 0.24 0.24
93 40
Single In conductive status 6.4 6.4
When 14.9 6.4
precision
executed 92 40
In non-conductive status 6.4 6.4
14.9 6.4
ORE> *1
When not executed 0.55 0.24 –– ––
93 40
Double In conductive status –– ––
When 14.9 6.4
precision
executed 92 40
In non-conductive status –– ––
14.9 6.4
93 40
In conductive status 6.4 6.4
Single 14.9 6.4
precision 92 40
In non-conductive status 6.4 6.4
14.9 6.4
LDE<= *1
93 40
In conductive status –– ––
Double 14.9 6.4
precision 92 40
In non-conductive status –– ––
14.9 6.4
When not executed 0.55 0.24 0.24 0.24
92 40
Single In conductive status 6.4 6.4
When 14.9 6.4
precision
executed 92 40
In non-conductive status 6.4 6.4
14.9 6.4
ANDE<= *1
When not executed 0.55 0.24 –– ––
92 40
Double In conductive status –– ––
When 14.9 6.4
precision
executed 92 40
In non-conductive status –– ––
14.9 6.4
When not executed 0.55 0.24 0.24 0.24
92 40
Single In conductive status 6.4 6.4
When 14.9 6.4
precision
executed 92 40
In non-conductive status 6.4 6.4
14.9 6.4
ORE<= *1
When not executed 0.55 0.24 –– ––
92 40
Double In conductive status –– ––
When 14.9 6.4
precision
executed 92 40
In non-conductive status –– ––
14.9 6.4
92 40
In conductive status 6.4 6.4
Single 14.9 6.4
precision 92 40
In non-conductive status 6.4 6.4
14.9 6.4
LDE< *1
92 40
In conductive status –– ––
Double 14.9 6.4
precision 92 40
In non-conductive status –– ––
14.9 6.4
*1 : The Qn/QnH changes in processing time depending on the serial No. of the CPU module.
Top : The first 5 digits of the serial No. are "05031" or lower
Bottom : The first 5 digits of the serial No. are "05032" or higher
For the condition to be satisfied when the instruction is not executed, there is no differentiation between the
top and bottom.
App-28
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH 8
When not executed 0.55 0.24 0.24 0.24
92 40
Single In conductive status 6.4 6.4
precision
When 14.9 6.4
8
executed 92 40
In non-conductive status 6.4 6.4
14.9 6.4
ANDE< *1
When not executed 0.55 0.24 –– ––
8
92 40
Double In conductive status –– ––
When 14.9 6.4
precision
executed
In non-conductive status
92 40
–– –– 8
14.9 6.4
When not executed 0.55 0.24 0.24 0.24
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
Double 14.9 6.4
precision 92 40
In non-conductive status –– ––
14.9 6.4
When not executed 0.55 0.24 0.24 0.24
92 40
Single In conductive status 6.4 6.4
When 14.9 6.4
precision
executed 92 40
In non-conductive status 6.4 6.4
14.9 6.4
ANDE>= *1
When not executed 0.55 0.24 –– ––
92 40
Double In conductive status –– ––
When 14.9 6.4
precision
executed 92 40
In non-conductive status –– ––
14.9 6.4
*1 : The Qn/QnH changes in processing time depending on the serial No. of the CPU module.
Top : The first 5 digits of the serial No. are "05031" or lower
Bottom : The first 5 digits of the serial No. are "05032" or higher
For the condition to be satisfied when the instruction is not executed, there is no differentiation between the
top and bottom.
App-29
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
When not executed 0.55 0.24 0.24 0.24
92 40
Single In conductive status 6.4 6.4
When 14.9 6.4
precision
executed 92 40
In non-conductive status 6.4 6.4
14.9 6.4
ORE>= *1
When not executed 0.55 0.24 –– ––
92 40
Double In conductive status –– ––
When 14.9 6.4
precision
executed 92 40
In non-conductive status –– ––
14.9 6.4
In conductive status 38 16 16 16
LD$ =
In non-conductive status 34 15 15 15
When not executed 0.56 0.23 0.23 0.23
AND$ = In conductive status 39 17 17 17
When executed
In non-conductive status 32 14 14 14
When not executed 0.56 0.24 0.24 0.24
OR$ = In conductive status 40 17 17 17
When executed
In non-conductive status 33 14 14 14
In conductive status 32 14 14 14
LD$ < >
In non-conductive status 40 17 17 17
When not executed 0.56 0.23 0.23 0.23
AND$ < > In conductive status 33 14 14 14
When executed
In non-conductive status 39 17 17 17
When not executed 0.56 0.24 0.24 0.24
OR$ < > In conductive status 32 14 14 14
When executed
In non-conductive status 39 17 17 17
In conductive status 32 14 14 14
LD$ >
In non-conductive status 40 17 17 17
*1 : The Qn/QnH changes in processing time depending on the serial No. of the CPU module.
Top : The first 5 digits of the serial No. are "05031" or lower
Bottom : The first 5 digits of the serial No. are "05032" or higher
For the condition to be satisfied when the instruction is not executed, there is no differentiation between the
top and bottom.
App-30
Instruction Processing Time (µs)
Condition (Device)
Qn QnH QnPH QnPRH 8
When not executed 0.56 0.23 0.23 0.23
AND$ > In conductive status 33 14 14 14
When executed
In non-conductive status 39 17 17 17 8
When not executed 0.56 0.24 0.24 0.24
OR$ > In conductive status 32 14 14 14
When executed
In non-conductive status 39 17 17 17 8
In conductive status 40 17 17 17
LD$ < =
In non-conductive status 32 14 14 14
When not executed 0.56 0.23 0.23 0.23 8
AND$ < = In conductive status 39 17 17 17
When executed
In non-conductive status 32 14 14 14
When not executed 0.56 0.24 0.24 0.24 A
OR$ < = In conductive status 40 17 17 17
When executed
In non-conductive status 33 14 14 14
LD$ <
In conductive status 32 14 14 14
6
In non-conductive status 40 17 17 17
When not executed 0.56 0.23 0.23 0.23
AND$ <
When executed
In conductive status 32 14 14 14
7
In non-conductive status 39 16 16 16
When not executed 0.56 0.24 0.24 0.24
OR$ <
When executed
In conductive status 32 14 14 14
8
In non-conductive status 39 16 16 16
In conductive status 40 17 17 17
LD$ > =
In non-conductive status 32 14 14 14
When not executed 0.56 0.23 0.23 0.23
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
AND$ > = In conductive status 39 16 16 16
When executed
In non-conductive status 32 14 14 14
When not executed 0.56 0.24 0.24 0.24
OR$ > = In conductive status 39 17 17 17
When executed
In non-conductive status 32 14 14 14
BKCMP = S1 S2 D n n=1 48 21 21 21
BKCMP = P S1 S2 D n n = 96 142 61 61 61
App-31
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
+ S D
When executed 0.39 0.17 0.17 0.17
+P S D
+ S1 S2 D
When executed 0.47 0.20 0.20 0.20
+P S1 S2 D
- S D
When executed 0.39 0.17 0.17 0.17
-P S D
- S1 S2 D
When executed 0.47 0.20 0.20 0.20
- P S1 S2 D
D+ S D
When executed 0.71 0.31 0.31 0.31
D+P S D
D+ S1 S2 D
When executed 0.79 0.34 0.34 0.34
D+P S1 S2 D
D- S D
When executed 0.71 0.30 0.30 0.30
D-P S D
D - S1 S2 D
When executed 0.79 0.34 0.34 0.34
D - P S1 S2 D
* S1 S2 D
When executed 0.47 0.20 0.20 0.20
* P S1 S2 D
/ S1 S2 D
–– 2.7 1.2 1.2 1.2
/P S1 S2 D
D * S1 S2 D
–– 7.9 3.4 3.4 3.4
D * P S1 S2 D
D/ S1 S2 D
–– 14 6.1 6.1 6.1
D/P S1 S2 D
B+ S D
–– 2.2 1.0 1.0 1.0
B+P S D
B+ S1 S2 D
–– 5.0 2.2 2.2 2.2
B+P S1 S2 D
B- S D
–– 2.0 0.9 0.9 0.9
B-P S D
B - S1 S2 D
–– 4.9 2.1 2.1 2.1
B - P S1 S2 D
DB+ S D
–– 12 5.0 5.0 5.0
DB+P S D
DB+ S1 S2 D
–– 12 5.3 5.3 5.3
DB+P S1 S2 D
DB - S D
–– 11 4.8 4.8 4.8
DB - P S D
DB - S1 S2 D
–– 12 5.2 5.2 5.2
DB - P S1 S2 D
B * S1 S2 D
–– 3.7 1.6 1.6 1.6
B * P S1 S2 D
App-32
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH 8
B/ S1 S2 D
–– 3.8 1.6 1.6 1.6
B/P S1 S2 D
8
DB * S1 S2 D
–– 24 10 10 10
DB * P S1 S2 D
DB/ S1 S2 D 8
–– 27 12 12 12
DB/P S1 S2 D
E+P S = 0, =0 203 87 –– ––
A
D
Double S D
precision 203 87
S = 2127, D = 2127 –– ––
E+ S1 S2 D
precision
S1 = 2127, S2 = 2127 2.4 1.1 1.1 1.1
6
E+P S1 S2 D
Double S1 = 0, S2 =0 209 90 –– ––
precision
S1 = 2127, S2 = 2127 209 90 –– –– 7
Single S = 0, D =0 1.8 0.78 0.78 0.78
precision
E- S D S = 2127, D = 2127 1.8 0.78 0.78 0.78 8
E -P S D
Double S = 0, D =0 202 87 –– ––
precision 202 87
S = 2127, D = 2127 –– ––
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
precision 2.4 1.1 1.1 1.1
E - S1 S2 D S1 = 2127, S2 = 2127
E -P S1 S2 D
Double S1 = 0, S2 =0 210 90 –– ––
precision 210 90
S1 = 2127, S2 = 2127 –– ––
E*P S1 S2 D
Double S1 = 0, S2 =0 222 96 –– ––
precision 222 96
S1 = 2126, S2 = 2127 –– ––
E/P S1 S2 D
Double S1 = 0, S2 =1 369 159 –– ––
App-33
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
$+ S D
–– 68 29 29 29
$+P S D
$+ S1 S2 D
–– 81 35 35 35
$+P S1 S2 D
INC
–– 0.32 0.14 0.14 0.14
INCP
DINC
–– 0.47 0.20 0.20 0.20
DINCP
DEC
–– 0.32 0.14 0.14 0.14
DECP
DDEC
–– 0.47 0.20 0.20 0.20
DDECP
BCD
–– 1.1 0.48 0.48 0.48
BCDP
DBCD
–– 3.2 1.4 1.4 1.4
DBCDP
BIN
–– 1.0 0.44 0.44 0.44
BINP
DBIN
–– 1.9 0.82 0.82 0.82
DBINP
App-34
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH 8
DBL
–– 4.5 1.9 1.9 1.9
DBLP
WORD
WORDP
–– 4.7 2.0 2.0 2.0 8
GRY
–– 4.7 2.0 2.0 2.0
GRYP
DGRY
–– 5.3 2.3 2.3 2.3
8
DGRYP
GBIN
–– 18 7.7 7.7 7.7
GBINP 8
DGBIN
–– 32 14 14 14
DGBINP
NEG
NEGP
–– 3.6 1.6 1.6 1.6 A
DNEG
–– 4.3 1.8 1.8 1.8
DNEGP
ENEG
–– 3.9 1.7 1.7 1.7
6
ENEGP
BKBCD S D n n=1 38 17 17 17
n = 96 99 43 43 43
7
BKBCDP S D n
BKBIN S D n n=1 38 17 17 17
BKBINP S D n n = 96 99 43 43 43 8
S = D0, D = D1 0.24 0.10 0.10 0.10
MOV –– –– –– ––
MOVP –– –– –– ––
S = D0, D = J1 \ W1
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
140*1 60*1 60*1 60*1
DMOV –– –– –– ––
DMOVP –– –– –– ––
S = D0, D = J1 \ W1
147*1 64*1 64*1 64*1
EMOV
–– 0.63 0.27 0.27 0.27
EMOVP
$MOV
–– 40 17 17 17
$MOVP
CML
–– 0.40 0.17 0.17 0.17
CMLP
DCML
–– 0.55 0.24 0.24 0.24
DCMLP
*1 : The upper row indicates the processing time when A38B/A1S38B and the extension base are used.
The center row indicates the processing time when A38HB/A1S38HB is used.
The lower row indicates the processing time when Q312B is used.
App-35
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
BMOVP S D n n = 96 32 14 14 14
XCH
XCHP
–– 1.3 0.54 0.54 0.54
DXCH
DXCHP
BXCH D1 D2 n n=1 31 13 13 13
BXCHP D1 D2 n n = 96 84 36 36 36
SWAP
–– 3.7 1.6 1.6 1.6
SWAPP
CJ –– 3.2 1.4 1.4 1.4
SCJ –– 3.2 1.4 1.4 1.4
JMP –– 3.2 1.4 1.4 1.4
GOEND –– 0.39 0.34 0.34 0.34
DI –– 0.95 0.41 0.41 0.41
EI –– 1.3 0.54 0.54 0.54
IMASK –– 11 4.6 4.6 4.6
IRET –– 1.6 0.68 0.68 0.68
RFS n=1 6.7 4.7 4.7 4.7
RFSP n = 96 19 13 13 13
UDCNT1 –– 15 6.5 6.5 ––
ROTC –– 26 11 11 ––
App-36
(3) Application instructions
The processing time when the instruction is not executed is calculated as follows:
Q02CPU ·······················································0.079 (No. of steps for each instruction + 1) µs
8
Q02HCPU, Q06HCPU, Q12HCPU, Q25HCPU, Q02PHCPU, Q06PHCPU, Q12PHCPU,
Q25PHCPU, Q12PRHCPU, Q25PRHCPU ·0.034 (No. of steps for each instruction + 1) µs
8
Processing Time ( µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH 8
WAND S D
When executed 0.39 0.17 0.17 0.17
WANDP S D
8
WAND S1 S2 D
When executed 0.47 0.20 0.20 0.20
WANDP S1 S2 D
DAND S D
A
When executed 0.71 0.31 0.31 0.31
DANDP S D
DAND S1 S2 D
When executed 0.79 0.34 0.34 0.34
6
DANDP S1 S2 D
BKAND S1 S2 D n n=1 36 16 16 16
7
BKANDP S1 S2 D n n = 96 74 32 32 32
WOR S D
When executed 0.40 0.17 0.17 0.17 8
WORP S D
WOR S1 S2 D
When executed 0.47 0.20 0.20 0.20
WORP S1 S2 D
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
DOR S D
When executed 0.71 0.31 0.31 0.31
DORP S D
DOR S1 S2 D
When executed 0.79 0.34 0.34 0.34
DORP S1 S2 D
BKOR S1 S2 D n n=1 36 16 16 16
BKORP S1 S2 D n n = 96 74 32 32 32
WXOR S D
When executed 0.39 0.17 0.17 0.17
WXORP S D
WXOR S1 S2 D
When executed 0.47 0.20 0.20 0.20
WXORP S1 S2 D
DXOR S D
When executed 0.71 0.31 0.31 0.31
DXORP S D
DXOR S1 S2 D
When executed 0.79 0.34 0.34 0.34
DXORP S1 S2 D
BKXOR S1 S2 D n n=1 36 16 16 16
BKXORP S1 S2 D n n = 96 74 32 32 32
App-37
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
WXNR S D
When executed 0.40 0.17 0.17 0.17
WXNRP S D
WXNR S1 S2 D
When executed 0.47 0.20 0.20 0.20
WXNRP S1 S2 D
DNXR S D
When executed 0.71 0.31 0.31 0.31
DNXRP S D
DNXR S1 S2 D
When executed 0.79 0.34 0.34 0.34
DNXRP S1 S2 D
BKNXOR S1 S2 D n n=1 36 16 16 16
BKNXORP S1 S2 D n n = 96 74 32 32 32
BSFLRP D n n = 96 24 10 10 10
BSFLP D n n = 96 23 10 10 10
DSFRP D n n = 96 25 11 11 11
DSFLP D n n = 96 26 11 11 11
App-38
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH 8
BSET D n n=1 7.6 3.3 3.3 3.3
TEST S1 S2 D 8
–– 8.2 3.5 3.5 3.5
TESTP S1 S2 D
DTEST S1 S2 D
–– 9.2 3.9 3.9 3.9 8
DTESTP S1 S2 D
SERP S1 S2 D n
All match 115 49 49 49 6
n = 96
None match 133 57 57 57
All match 23 9.9 9.9 9.9
n=1
DSER S1 S2 D n None match 23 9.7 9.7 9.7 7
All match 142 61 61 61
DSERP S1 S2 D n n = 96
None match 132 57 57 57
SUM S =0
3.9 1.7 1.7 1.7
8
SUMP
S = FFFFH
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
DECO S D n n=2 20 8.6 8.6 8.6
DECOP S D n n=8 27 12 12 12
M1 = ON 21 9.1 9.1 9.1
n=2
ENCO S D n M4 = ON 21 9.1 9.1 9.1
M1 = ON 28 12 12 12
ENCOP S D n n=8
M256 = ON 26 11 11 11
SEG
–– 1.3 0.54 0.54 0.54
SEGP
NDIS S1 D S2
–– 41 18 18 18
NDISP S1 D S2
NUNI S1 D S2
–– 42 18 18 18
NUNIP S1 D S2
WTOB S D n n=1 47 20 20 20
WTOBP S D n n = 96 99 43 43 43
BTOW S D n n=1 45 19 19 19
BTOWP S D n n = 96 89 38 38 38
App-39
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
MAXP S D n n = 96 136 59 59 59
MINP S D n n = 96 159 69 69 69
DMAX S D n n=1 27 12 12 12
DMAXP S D n n = 96 181 78 78 78
DMIN S D n n=1 27 12 12 12
DMINP S D n n = 96 112 48 48 48
CALL Pn S1 to S5
–– 135 58 58 58
CALLP Pn S1 to S5
Return to original program 2.9 1.3 1.3 1.3
RET
Return to other program 20 8.5 8.5 8.5
FCALL Pn Internal file pointer 3.6 1.6 1.6 1.6
FCALLP Pn Common pointer 20 8.7 8.7 8.7
FCALL Pn S1 to S5
–– 134 57 57 57
FCALLP Pn S1 to S5
ECALL * Pn
ECALLP * Pn –– 77 33 33 33
*: Program name
ECALL * Pn S1 to S5
–– 162 70 70 70
ECALLP * Pn S1 to S5
*: Program name
EFCALL * Pn
EFCALLP * Pn –– 78 34 34 34
*: Program name
EFCALL * Pn S1 to S5
–– 200 86 86 86
EFCALLP * Pn S1 to S5
*: Program name
App-40
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
8
COM –– 55 16 16 16
IX –– 12 5.2 5.2 5.2
IXEND –– 4.7 2.0 2.0 2.0
8
Number of contacts 1 48 21 21 21
IXDEV + IXSET
Number of contacts 14 93 40 40 40
FIFW Number of data points 0 11 4.5 4.5 4.5
8
FIFWP Number of data points 96 11 4.5 4.5 4.5
FIFR Number of data points 1 13 5.6 5.6 5.6
FIFRP Number of data points 96 32 14 14 14
FPOP Number of data points 1 16 7.0 7.0 7.0 8
FPOPP Number of data points 96 16 7.0 7.0 7.0
FINS Number of data points 0 20 8.4 8.4 8.4
FINSP Number of data points 96 36 15 15 15 A
FDEL Number of data points 1 19 7.5 7.5 7.5
FDELP Number of data points 96 39 15 15 15
n3 = 1
––
––
––
––
––
––
––
––
6
FROM n1 n2 D n3
47 22 22 22
FROMP n1 n2 D n3 –– –– –– ––
*1 n3 = 1000 –– –– –– –– 7
476 437 437 437
–– –– –– ––
n3 = 1 –– –– –– ––
DFRO n1 n2 D n3
51 24 24 24 8
DFROP n1 n2 D n3 –– –– –– ––
*1 n3 = 500 –– –– –– ––
478 437 437 437
–– –– –– ––
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
n3 = 1 –– –– –– ––
TO n1 n2 D n3
48 20 20 20
TOP n1 n2 D n3 –– –– –– ––
*1 n3 = 1000 –– –– –– ––
479 412 412 412
–– –– –– ––
n3 = 1 –– –– –– ––
DTO n1 n2 D n3
50 23 23 23
DTOP n1 n2 D n3 –– –– –– ––
*1 n3 = 500 –– –– –– ––
457 416 416 416
Variable 1 character 33 11 11 ––
SM701ON
PR Variable 32 character 48 18 18 ––
SM701OFF 21 7.8 7.8 ––
PRC –– 181 16 16 ––
When displayed –– –– –– ––
LED
Display completed –– –– –– ––
*1 : The upper row indicates the processing time when A38B/A1S38B and the extension base are used.
The center row indicates the processing time when A38HB/A1S38HB is used.
The bottom row indicates the processing times taken when the Q312B is used to execute the instruction for
the QJ71C24 in slot 0.
The FROM/TO instruction differs in processing time according to the number of slots and the loaded
modules.
(The QnCPU/QnHCPU also differs in processing time according to the extension base type.)
App-41
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
When displayed –– –– –– ––
LEDC
Display completed –– –– –– ––
DBINDA S =1 43 18 18 18
DBINDAP 86 37 37 37
S = - 2147483648
DBINHA S =1 23 10 10 10
DBINHAP 24 10 10 10
S = FFFFFFFFH
DABIN S =1 57 25 25 25
DABINP 58 25 25 25
S = - 32768
DDABIN S =1 92 40 40 40
DDABINP 106 46 46 46
S = - 2147483648
App-42
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH 8
DABCD S =1 16 6.9 6.9 6.9
DABCDP 17 7.2 7.2 7.2
= 9999
8
S
DDABCD S =1 25 11 11 11
DDABCDP 29 13 13 13
S = 99999999
COMRD
–– 40 17 17 17
8
COMRDP
LEN 1 character 18 8.0 8.0 8.0
LENP 96 characters 86 37 37 37 8
STR
–– 53 23 23 23
STRP
DSTR
DSTRP
–– 123 53 53 53 A
VAL
–– 95 41 41 41
VALP
DVAL 6
–– 166 72 72 72
DVALP
ESTR
564 243 243 243
ESTRP
––
7
EVAL Decimal point format all 2-digit specification 100 43 43 43
EVALP Exponent format all 6-digit specification 127 55 55 55
ASC S D n n=1 64 28 28 28
8
ASCP S D n n = 96 289 125 125 125
HEX S D n n=1 60 26 26 26
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
HEXP S D n n = 96 343 148 148 148
RIGHT S D n n=1 49 21 21 21
RIGHTP S D n n = 96 131 56 56 56
LEFT S D n n=1 50 21 21 21
LEFTP S D n n = 96 131 56 56 56
MIDR
–– 53 23 23 23
MIDRP
MIDW
–– 128 55 55 55
MIDWP
No match 58 25 25 25
INSTR
Head 55 24 24 24
INSTRP Match
End 58 25 25 25
App-43
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
EMOD
–– 527 227 227 227
EMODP
EREXP
–– 1656 713 713 713
EREXPP
SIN Single precision 115 50 50 50
SINP Double precision 1945 837 –– ––
S = - 10
Single precision 129 56 56 56
EXP S =1
EXPP
S = - 10
Double precision 2386 1026 –– ––
S =1
S =1
Single precision 113 49 49 49
LOG S = 10
LOGP
S =1
Double precision 2146 924 –– ––
S = 10
RND
–– 3.9 1.7 1.7 1.7
RNDP
SRND
–– 3.5 1.5 1.5 1.5
SRNDP
App-44
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH 8
BSQR S =0 6.2 2.7 2.7 2.7
BSQRP 38 16 16 16
= 9999
8
S
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
DZONE
–– 11 4.6 4.6 4.6
DZONEP
RSET
–– 6.8 2.9 2.9 2.9
RSETP
QDRSET
–– 205 88 88 88
QDRSETP
QCDSET
–– 147 63 63 63
QCDSETP
DATERD
–– 13 5.5 5.5 5.5
DATERDP
DATEWR
–– 15 6.4 6.4 6.4
DATEWRP
App-45
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
DATE+ No digit increase 13 5.4 5.4 5.4
DATE+P Digit increase 13 5.4 5.4 5.4
DATE - No digit increase 12 5.2 5.2 5.2
DATE - P Digit increase 12 5.2 5.2 5.2
SECOND
–– 10 4.5 4.5 4.5
SECONDP
HOUR
–– 12 5.2 5.2 5.2
HOURP
1 character 3.0 1.3 1.3 1.3
MSG
32 characters 3.0 1.3 1.3 1.3
Initial time 20 8.6 8.6 8.6
PKEY
No reception 19 8.2 8.2 8.2
PSTOP
–– 79 34 34 34
PSTOPP
POFF
–– 79 34 34 34
POFFP
PSCAN
–– 75 32 32 32
PSCNAP
PLOW
–– 80 34 34 ––
PLOWP
WDT
–– 5.9 2.6 2.6 2.6
WDTP
DUTY –– 9.3 4.0 4.0 4.0
ZRRDB
–– 7.9 3.4 3.4 3.4
ZRRDBP
ZRWRB
–– 9.4 4.0 4.0 4.0
ZRWRBP
ADRSET
–– 4.9 2.1 2.1 2.1
ADRSETP
KEY –– 17 7.3 7.3 ––
ZPUSH
–– 11 4.7 4.7 4.7
ZPUSHP
ZPOP
–– 5.1 2.2 2.2 2.2
ZPOPP
EROMWR
–– –– –– –– ––
EROMWRP
App-46
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH 8
ZCOM –– 691 289 289 289
READ –– –– –– –– ––
SREAD –– –– –– –– ––
8
WRITE –– –– –– –– ––
SWRITE –– –– –– –– ––
SEND
RECV
––
––
––
––
––
––
––
––
––
––
8
REQ –– –– –– –– ––
ZNFR –– –– –– –– ––
ZNTO –– –– –– –– ––
8
MELSECNET/10 –– –– –– ––
ZNRD
MELSECNET (II) –– –– –– ––
MELSECNET/10 –– –– –– –– A
ZNWR
MELSECNET (II) –– –– –– ––
RFRP –– –– –– –– ––
RTOP –– –– –– –– –– 6
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
TRACER ––
SP.FWRITE –– 84 36 36 36
SP.FREAD –– 82 35 35 35
PLOADP –– 58 25 25 ––
1 point 45.5 20 20 20
When standard RAM is used
1000 points 215 91 91 91
RBMOV
1 point 49.5 22 22 22
When SRAM card is used
1000 points 540 305 305 305
App-47
(b) Instructions available from function version B
Processing Time (µs)
Instruction Condition/Number of Points Processed
Qn QnH QnPH QnPRH
Refresh range: 2k words
(0.5k words 720 660 660 ––
With auto refresh of assigned equally to all CPUs)
CPU shared memory Refresh range: 4k words
COM *1
(1k words assigned equally to all 860 730 730 ––
CPUs)
Without auto refresh of
–– 43 20 20 20
CPU shared memory
Reading from CPU n3 = 1 59 29 29 ––
shared memory of
n3 = 1000 530 500 500 ––
another CPU
FROM *1 Main base unit 51 24 24 ––
Reading buffer memory n3 = 1
Extension base unit 54 27 27 ––
of intelligent function
Main base unit 540 480 480 ––
module*2 n3 = 1000
Extension base unit 1100 1050 1050 ––
n3 = 1 ("TO" instruction)
Writing to CPU shared 74 33 33 ––
S.TO n4 = 1 ("S.TO instruction")
memory of host CPU
n2 = 256 126 54 54 ––
Reading data of the
*3 –– 25 11 11 11
S (P).DATERD
expansion clock
Expansion clock data
*3 –– 38 17 17 17
S (P).DATE+
addition operation
Expansion clock data
*3 –– 38 17 17 17
S (P).DATE-
subtraction operation
*1 : If the processing overlaps those of the other CPUs in a multiple CPU system, the processing time
increases by a maximum of the following time.
*2 : In a multiple CPU system, the instruction processing time for the intelligent function module under control
of the host CPU is equal to that for the intelligent function module under control of another CPU.
*3 : Products with the first 5 digits of the serial No. "07032" or higher are applicable.
(5) Redundant system instructions (for redundant CPU)
Processing Time (µs)
Instruction Condition (Device)
Qn QnH QnPH QnPRH
SP.CONTSW –– –– –– –– 9.6
App-48
(6) Table of the time to be added when file register, module access device or link direct device is
used
8
Device Specification Processing Time (µs)
Instruction data
Location Qn QnH QnPH QnPRH
Bit
Source
Destination
5.56
4.44
2.40
1.91
2.40
1.91
2.40
1.91
8
When standard Source 2.60 1.12 1.12 1.12
Word
RAM is used Destination 3.76 1.62 1.62 1.62
Double word
Source 2.83 1.22 1.22 1.22 8
Destination 4.00 1.72 1.72 1.72
File register (ZR)
Source 5.22 2.25 2.25 2.25
Bit
When SRAM Destination 4.09 1.76 1.76 1.76
card is used Source 2.25 0.97 0.97 0.97 8
Word
(Q2MEM-1MBS, Destination 3.42 1.47 1.47 1.47
Q2MEM-2MBS) Source 2.49 1.07 1.07 1.07
Double word
Destination 3.65 1.57 1.57 1.57 A
Source 35.56 15.31 15.31 15.31
Bit
Destination 65.08 28.01 28.01 28.01
Module access device Source 32.76 14.10 14.10 14.10
(Un\G , U3En\G0 to G4095)
Word
Destination 28.84 12.41 12.41 12.41 6
Source 32.99 14.20 14.20 14.20
Double word
Destination 29.07 12.51 12.51 12.51
Bit
Source 75.67 32.57 32.57 32.57 7
Destination 138.65 59.67 59.67 59.67
Source 72.73 31.30 31.30 31.30
Link direct device (Jn\ ) Word
Destination 137.32 59.10 59.10 59.10
Source 72.96 31.40 31.40 31.40 8
Double word
Destination 137.55 59.20 59.20 59.20
Appendix 1.3 Operation Processing Time of High Performance Model QCPU/Process CPU/Redundant CPU
Appendix1 OPERATION PROCESSING TIME
App-49
Appendix 1.4 Operation Processing Time of Universal
Model QCPU
The processing time for the individual instructions are shown in the table on the following pages.
Operation processing times can vary substantially depending on the nature of the sources and
destinations of the instructions, and the values contained in the following tables should therefore
be taken as a set of general guidelines to processing time rather than as being strictly accurate.
1. The subset instruction processing time table shown in (1) applies when the device
used in an instruction satisfies either of the conditions (a) and (b).
2. Since the processing time of each instruction is not constant due to the cache
function in the Universal model QCPU, the minimum value and the maximum
value are described.
App-50
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
8
In conductive status
LD= 0.360 0.240 0.180 0.120
In non-conductive status
When not executed 8
AND= In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status
When not executed 8
OR= In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status
In conductive status 8
LD<> 0.360 0.240 0.180 0.120
In non-conductive status
When not executed
AND<> In conductive status 0.360 0.240 0.180 0.120 A
When executed
In non-conductive status
When not executed
OR<> In conductive status 0.360 0.240 0.180 0.120 6
When executed
In non-conductive status
In conductive status
LD>
In non-conductive status
0.360 0.240 0.180 0.120
7
When not executed
AND> In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status 8
When not executed
OR> In conductive status 0.360 0.240 0.180 0.120
When executed
Basic In non-conductive status
instruction In conductive status
App-51
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
In conductive status
LDD= 0.360 0.240 0.180 0.120
In non-conductive status
When not executed
ANDD= In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status
When not executed
ORD= In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status
In conductive status
LDD<> 0.360 0.240 0.180 0.120
In non-conductive status
When not executed
ANDD<> In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status
When not executed
ORD<> In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status
In conductive status
LDD> 0.360 0.240 0.180 0.120
In non-conductive status
When not executed
ANDD> In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status
When not executed
ORD> In conductive status 0.360 0.240 0.180 0.120
When executed
Basic In non-conductive status
instruction In conductive status
LDD<= 0.360 0.240 0.180 0.120
In non-conductive status
When not executed
ANDD<= In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status
When not executed
ORD<= In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status
In conductive status
LDD< 0.360 0.240 0.180 0.120
In non-conductive status
When not executed
ANDD< In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status
When not executed
ORD< In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status
In conductive status
LDD>= 0.360 0.240 0.180 0.120
In non-conductive status
When not executed
ANDD>= In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status
When not executed
ORD>= In conductive status 0.360 0.240 0.180 0.120
When executed
In non-conductive status
App-52
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
8
+ S D When executed 0.360 0.240 0.180 0.120
B+ S D When executed 3.100 12.300 3.100 12.300 3.100 12.300 3.300 8.300 7
B + S1 S2 D When executed 5.900 13.500 5.900 13.500 5.900 13.500 4.600 6.200
B- S D When executed 3.150 12.300 3.150 12.300 3.150 12.300 3.300 9.000
8
B - S1 S2 D When executed 5.950 13.600 5.950 13.600 5.950 13.600 4.600 8.200
B * S1 S2 D When executed 3.700 12.100 3.700 12.100 3.700 12.100 4.000 8.200
Basic
B/ S1 S2 D When executed 4.000 14.000 4.000 14.000 4.000 14.000 4.200 12.400
instruction
Single
E/ S1 S2 D
precision S1 = 2127, S2 = 2127 4.900 18.900 4.900 18.900 4.900 18.900 5.100 14.100
App-53
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
App-54
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
8
n=1 2.250 10.800 2.250 10.800 2.250 10.800 2.300 7.800
ROR D n
n = 15 2.250 10.800 2.350 10.800 2.350 10.800 2.400 7.800
n=1 2.250 10.800 2.250 10.800 2.250 10.800 2.300 3.900
8
RCR D n
n = 15 2.250 10.800 2.250 10.800 2.250 10.800 2.400 4.100
n=1 2.250 10.800 2.350 10.800 2.350 10.800 2.500 4.600
ROL D n
n = 15 2.250 10.800 2.350 10.800 2.350 10.800 2.400 4.600 8
n=1 2.250 11.500 2.300 11.500 2.300 11.500 2.400 7.500
RCL D n
n = 15 2.250 11.500 2.300 11.500 2.300 11.500 2.500 7.500
n=1 2.350 11.500 2.350 11.500 2.350 11.500 2.400 10.300 8
DROR D n
n = 31 2.350 11.500 2.350 11.500 2.350 11.500 2.500 10.300
n=1 2.350 13.300 2.350 13.300 2.350 13.300 2.500 12.700
DRCR D n
n = 31 2.350 14.900 2.350 14.900 2.350 14.900 2.500 12.700 A
n=1 2.350 10.800 2.350 10.800 2.350 10.800 2.500 11.800
DROL D n
n = 31 2.350 10.800 2.350 10.800 2.350 10.800 2.500 11.800
n=1 2.350 13.300 2.350 13.300 2.350 13.300 2.500 5.100 6
DRCL D n
Application n = 31 2.350 13.300 2.350 13.300 2.350 13.300 2.500 5.100
instruction n=1 2.350 9.900 2.350 9.900 2.350 9.900 2.400 6.100
SFR D n
n = 15 2.350 9.900 2.350 9.900 2.350 9.900 2.300 5.700 7
n=1 2.350 9.850 2.350 9.850 2.350 9.850 2.400 4.300
SFL D n
n = 15 2.350 9.850 2.350 9.850 2.350 9.850 2.400 4.300
n=1 3.250 15.500 3.250 15.500 3.250 15.500 3.300 12.000 8
DSFR D n
n = 96 32.600 45.000 32.600 45.000 32.600 45.000 32.600 42.200
n=1 3.200 15.500 3.200 15.500 3.200 15.500 3.300 8.200
DSFL D n
n = 96 32.600 45.100 32.600 45.100 32.600 45.100 32.600 37.700
SEG When executed 2.100 7.700 2.100 7.700 2.100 7.700 2.100 5.900
FOR –– 1.500 7.500 1.500 7.500 1.500 7.500 1.200 6.300
Internal file pointer 4.800 5.400 4.800 5.400 4.800 5.400 2.700 4.800
CALL Pn
Common pointer 7.100 30.500 7.100 30.500 7.100 30.500 4.400 5.700
Remark
For the instructions for which a leading edge instruction ( P) is not described,
the processing time is the same as an ON execution instruction.
Example MOVP instruction, WANDP instruction etc.
App-55
(b) When using Q03UD(E)HCPU, Q04UD(E)HCPU, Q06UD(E)HCPU,
Q10UD(E)HCPU,Q13UD(E)HCPU, Q20UD(E)HCPU, Q26UD(E)HCPU
Processing Time (µs)
Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU Q04/Q06UD(E)HCPU
Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
LD
LDI
AND
ANI
OR
ORI
When executed 0.020 0.0095 0.0095
LDP
LDF
ANDP
ANDF
Sequence ORP
instruction ORF
LDPI
When executed 0.060 0.0285 0.0285
LDFI
ANDPI
ANDFI
When executed 0.080 0.038 0.038
ORPI
ORFI
When not changed
OUT 0.020 0.0095 0.0095
When changed
SET
When not executed 0.020 0.0095 0.0095
RST
App-56
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU 8
Min. Max. Min. Max. Min. Max.
In conductive status
LD=
In non-conductive status
0.060 0.0285 0.0285
8
When not executed
AND= In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status 8
When not executed
OR= In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status 8
In conductive status
LD<> 0.060 0.0285 0.0285
In non-conductive status
When not executed A
AND<> In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status
When not executed 6
OR<> In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status
LD>
In conductive status
0.060 0.0285 0.0285
7
In non-conductive status
When not executed
AND>
When executed
In conductive status 0.060 0.0285 0.0285 8
In non-conductive status
When not executed
OR> In conductive status 0.060 0.0285 0.0285
When executed
Basic In non-conductive status
App-57
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
In conductive status
LDD= 0.060 0.0285 0.0285
In non-conductive status
When not executed
ANDD= In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status
When not executed
ORD= In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status
In conductive status
LDD<> 0.060 0.0285 0.0285
In non-conductive status
When not executed
ANDD<> In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status
When not executed
ORD<> In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status
In conductive status
LDD> 0.060 0.0285 0.0285
In non-conductive status
When not executed
ANDD> In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status
When not executed
ORD> In conductive status 0.060 0.0285 0.0285
When executed
Basic In non-conductive status
instruction In conductive status
LDD<= 0.060 0.0285 0.0285
In non-conductive status
When not executed
ANDD<= In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status
When not executed
ORD<= In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status
In conductive status
LDD< 0.060 0.0285 0.0285
In non-conductive status
When not executed
ANDD< In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status
When not executed
ORD< In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status
In conductive status
LDD>= 0.060 0.0285 0.0285
In non-conductive status
When not executed
ANDD>= In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status
When not executed
ORD>= In conductive status 0.060 0.0285 0.0285
When executed
In non-conductive status
App-58
Processing Time (µs)
Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU Q04/Q06UD(E)HCPU
Q26UD(E)HCPU 8
Min. Max. Min. Max. Min. Max.
App-59
Processing Time (µs)
Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU Q04/Q06UD(E)HCPU
Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
App-60
Processing Time (µs)
Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU Q04/Q06UD(E)HCPU
Q26UD(E)HCPU 8
Min. Max. Min. Max. Min. Max.
App-61
Processing Time (µs)
Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU Q04/Q06UD(E)HCPU
Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
n=1 2.300 3.100 1.700 2.500 1.700 2.500
ROR D n
n = 15 2.400 3.100 1.800 2.500 1.800 2.500
n=1 2.300 3.900 1.700 3.200 1.700 3.200
RCR D n
n = 15 2.400 4.100 1.700 3.200 1.700 3.200
n=1 2.400 3.300 1.800 3.200 1.800 3.200
ROL D n
n = 15 2.400 3.300 1.800 3.200 1.800 3.200
n=1 2.400 2.700 1.800 2.100 1.800 2.100
RCL D n
n = 15 2.400 2.800 1.800 2.200 1.800 2.200
n=1 2.400 3.400 1.900 2.700 1.900 2.700
DROR D n
n = 31 2.500 3.400 1.900 2.700 1.900 2.700
n=1 2.500 4.800 1.900 4.200 1.900 4.200
DRCR D n
n = 31 2.500 4.900 1.900 4.200 1.900 4.200
n=1 2.500 3.900 1.800 3.200 1.800 3.200
DROL D n
n = 31 2.500 3.900 1.800 3.300 1.800 3.300
n=1 2.500 4.800 1.900 3.800 1.900 3.800
DRCL D n
Application n = 31 2.500 4.600 1.900 3.800 1.900 3.800
instruction n=1 2.400 3.900 1.700 2.600 1.700 2.600
SFR D n
n = 15 2.300 3.900 1.800 2.600 1.800 2.600
n=1 2.400 4.300 1.800 2.700 1.800 2.700
SFL D n
n = 15 2.400 4.300 1.800 2.700 1.800 2.700
n=1 2.700 4.800 2.200 4.300 2.200 4.300
DSFR D n
n = 96 32.600 35.900 23.900 26.100 23.900 26.100
n=1 2.700 4.600 2.100 4.000 2.100 4.000
DSFL D n
n = 96 32.600 35.300 23.700 25.800 23.700 25.800
Remark
For the instructions for which a leading edge instruction ( P) is not described,
the processing time is the same as an ON execution instruction.
Example MOVP instruction, WANDP instruction etc.
App-62
(2) Table of the time to be added when file register, module access device is used
(a) When using Q00UJCPU, Q00UCPU, Q01UCPU and Q02UCPU 8
Device Specification Processing Time (µs)
Device name data
Location Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Bit
Source 0.100 0.100 0.100 0.100 8
Destination 0.220 0.220 0.220 0.220
When standard Source 0.100 0.100 0.100 0.100
Word
RAM is used Destination 0.100 0.100 0.100 0.100
Source 0.200 0.200 0.200 0.200 8
Double word
Destination 0.200 0.200 0.200 0.200
Source –– –– –– 0.220
Bit
When SRAM Destination –– –– –– 0.420 8
File register card is used Source –– –– –– 0.220
Word
(R) (Q2MEM-1MBS, Destination –– –– –– 0.180
Q2MEM-2MBS) Source –– –– –– 0.440
Double word
Destination –– –– –– 0.380 A
Source –– –– –– 0.160
Bit
When SRAM Destination –– –– –– 0.320
card is used
Word
Source –– –– –– 0.160 6
(Q3MEM-4MBS, Destination –– –– –– 0.140
Q3MEM-8MBS) Source –– –– –– 0.320
Double word
0.300
Destination
Source
––
0.220
––
0.180
––
0.160 0.140
7
Bit
Destination 0.280 0.320 0.300 0.280
When standard Source 0.220 0.180 0.160 0.140
RAM is used
Word
Destination 0.220 0.180 0.160 0.140 8
Source 0.320 0.280 0.260 0.240
Double word
Destination 0.320 0.280 0.260 0.240
File register
Source –– –– –– 0.260
(ZR)/ Bit
When SRAM Destination –– –– –– 0.480
Extended
0.260
App-63
(b) When using Q03UD(E)CPU, Q04UD(E)HCPU, Q06UD(E)HCPU, Q10UD(E)HCPU,
Q13UDE(H)CPU,Q20UD(E)HCPU and Q26UD(E)HCPU
Processing Time (µs)
Device Specification
Device name data Q10/Q13/Q20/
Location Q03UD(E)CPU Q04/Q06UD(E)HCPU
Q26UD(E)HCPU
Source 0.100 0.048 0.048
Bit
Destination 0.100 0.038 0.038
When standard Source 0.100 0.048 0.048
Word
RAM is used Destination 0.100 0.038 0.038
Source 0.200 0.095 0.095
Double word
Destination 0.200 0.086 0.086
Source 0.220 0.200 0.200
Bit
When SRAM
Destination 0.180 0.162 0.162
File register card is used Source 0.220 0.200 0.200
Word
(R) (Q2MEM-1MBS, Destination 0.180 0.162 0.162
Q2MEM-2MBS) Source 0.440 0.399 0.399
Double word
Destination 0.380 0.361 0.361
Source 0.160 0.152 0.152
Bit
When SRAM
Destination 0.140 0.133 0.133
card is used Source 0.160 0.152 0.152
Word
(Q3MEM-4MBS, Destination 0.140 0.133 0.133
Q3MEM-8MBS) Source 0.320 0.304 0.304
Double word
Destination 0.300 0.295 0.295
Source 0.120 0.057 0.057
Bit
Destination 0.120 0.048 0.048
When standard Source 0.120 0.057 0.057
Word
RAM is used Destination 0.120 0.048 0.048
Source 0.220 0.105 0.105
Double word
Destination 0.220 0.095 0.095
File register
Source 0.240 0.209 0.209
(ZR)/ Bit
When SRAM
Destination 0.200 0.171 0.171
Extended
card is used Source 0.240 0.209 0.209
data register Word
(Q2MEM-1MBS, Destination 0.200 0.171 0.171
(D)/Extended Q2MEM-2MBS) Source 0.460 0.409 0.409
link register Double word
Destination 0.400 0.371 0.371
(W))
Source 0.180 0.162 0.162
Bit
When SRAM Destination 0.160 0.143 0.143
card is used Source 0.180 0.162 0.162
Word
(Q3MEM-4MBS, Destination 0.160 0.143 0.143
Q3MEM-8MBS) Source 0.340 0.314 0.314
Double word
Destination 0.320 0.304 0.304
Source 0.220 0.181 0.181
Bit
Module access device Destination 0.140 0.105 0.105
(Multiple CPU high speed trans- Source 0.220 0.181 0.181
Word
mission area) Destination 0.140 0.105 0.105
(U3En\G10000) Source 0.500 0.437 0.437
Double word
Destination 0.340 0.285 0.285
App-64
(3) Table of the time to be added when F/T(ST)/C device is used in OUT/SET/RST instruction
(a) When using Q00UJCPU, Q00UCPU, Q01UCPU amd Q02UCPU. 8
Instruction Processing Time (µs)
Device name Condition
name Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
When not executed 2.900 2.900 2.900 2.100 8
F When displayed 116.000 116.000 116.000 68.800
When executed
Display completed 116.000 116.000 116.000 61.600
OUT
When not executed 0.360 0.240 0.180 0.120 8
T(ST), C After time up 0.360 0.240 0.180 0.120
When executed
When added 0.360 0.240 0.180 0.120
When not executed 0.120 0.080 0.006 0.004 8
SET F When displayed 116.000 116.000 116.000 68.600
When executed
Display completed 116.000 116.000 116.000 65.700
When not executed 0.120 0.080 0.006 0.004 A
F When displayed 55.800 55.800 55.800 26.500
When executed
RST Display completed 29.200 29.200 29.200 21.600
T(ST), C
When not executed 0.360 0.240 0.180 0.120 6
When executed 0.360 0.240 0.180 0.120
7
(b) When using Q03UD(E)CPU, Q04UD(E)HCPU, Q06UD(E)HCPU, Q10UD(EHCPU,
Q13UD(E)HCPU, Q20UD(E)HCPU and Q26UD(E)HCPU
Processing Time (µs) 8
Instruction
Device name Condition Q10/Q13/Q20/
name Q03UD(E)CPU Q04/Q06UD(E)HCPU
Q26UD(E)HCPU
When not executed 1.940 1.570 1.570
F When displayed 39.930 38.090 38.090
App-65
Appendix 1.4.2 Processing time of instructions other than subset instruction
The following table shows the processing time of instructions other than subset instructions.
(1) Table of the processing time of instructions other than subset instructions
(a) When using Q00UJCPU, Q00UCPU, Q01UCPU and Q02UCPU
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
ANB
ORB
MPS –– 0.120 0.080 0.060 0.040
MRD
MPP
When not executed
INV 0.120 0.080 0.060 0.040
When executed
MEP When not executed
0.120 0.080 0.060 0.040
MEF When executed
EGP When not executed
0.120 0.080 0.060 0.040
EGF When executed
Sequence PLS –– 1.800 1.900 1.800 1.900 1.800 1.900 1.300 1.600
instruction
PLF –– 1.800 1.900 1.800 1.900 1.800 1.900 1.600 1.700
When not executed 0.240 0.160 0.120 0.080
FF
When executed 1.700 1.800 1.700 1.800 1.700 1.800 1.200 1.500
When not executed 0.240 0.160 0.120 0.080
DELTA
When executed 4.000 14.700 4.000 14.700 4.000 14.700 2.800 3.600
When not executed 0.240 0.160 0.120 0.800
SFT
When executed 1.800 12.600 1.800 12.600 1.800 12.600 1.600 6.600
MC –– 0.240 0.160 0.120 0.080
MCR –– 0.120 0.080 0.060 0.040
FEND Error check performed 250.000 250.000 250.000 250.000 250.000 250.000 175.000 252.000
END No error check performed 250.000 250.000 250.000 250.000 250.000 250.000 175.000 221.000
App-66
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
8
NOP
Sequence
NOPLF –– 0.120 0.080 0.060 0.040
instruction
PAGE 8
Single In conductive status 4.400 20.900 4.400 20.900 4.400 20.900 4.700 10.100
LDE=
precision In non-conductive status 4.400 20.900 4.400 20.900 4.400 20.900 4.700 10.100
Single
When not executed 0.360 0.240 0.180 0.120 8
ANDE= When In conductive status 4.200 19.600 4.200 19.600 4.200 19.600 4.200 12.500
precision
executed In non-conductive status 4.200 19.600 4.200 19.600 4.200 19.600 4.400 11.900
Single
When not executed 0.360 0.240 0.180 0.120 8
ORE= When In conductive status 4.200 17.400 4.200 17.400 4.200 17.400 4.600 10.800
precision
executed In non-conductive status 4.200 17.400 4.200 17.400 4.200 17.400 4.500 9.800
LDE< >
Single In conductive status 4.400 20.900 4.400 20.900 4.400 20.900 4.700 7.700 A
precision In non-conductive status 4.400 20.900 4.400 20.900 4.400 20.900 4.600 8.200
When not executed 0.360 0.240 0.180 0.120
Single
ANDE< >
precision
When In conductive status 4.200 19.600 4.200 19.600 4.200 19.600 4.300 14.200 6
executed In non-conductive status 4.200 19.600 4.200 19.600 4.200 19.600 4.400 14.200
When not executed 0.360 0.240 0.180 0.120
Single
ORE< >
precision
When In conductive status 4.200 17.400 4.200 17.400 4.200 17.400 4.600 6.700 7
executed In non-conductive status 4.200 17.400 4.200 17.400 4.200 17.400 4.400 6.600
Single In conductive status 4.400 20.900 4.400 20.900 4.400 20.900 4.700 13.700
LDE>
precision In non-conductive status 4.400 20.900 4.400 20.900 4.400 20.900 4.600 13.700 8
When not executed 0.360 0.240 0.180 0.120
Single
Basic ANDE> When In conductive status 4.200 19.600 4.200 19.600 4.200 19.600 4.300 8.100
precision
instruction executed In non-conductive status 4.200 19.600 4.200 19.600 4.200 19.600 4.200 8.100
When not executed 0.360 0.240 0.180 0.120
Single
Single In conductive status 4.400 20.900 4.400 20.900 4.400 20.900 4.700 11.100
LDE<=
precision In non-conductive status 4.400 20.900 4.400 20.900 4.400 20.900 4.700 9.600
When not executed 0.360 0.240 0.180 0.120
Single
ANDE<= When In conductive status 4.200 19.600 4.200 19.600 4.200 19.600 4.100 7.800
precision
executed In non-conductive status 4.200 19.600 4.200 19.600 4.200 19.600 4.400 8.200
When not executed 0.360 0.240 0.180 0.120
Single
ORE<= When In conductive status 4.200 17.400 4.200 17.400 4.200 17.400 4.500 10.300
precision
executed In non-conductive status 4.200 17.400 4.200 17.400 4.200 17.400 4.400 9.800
Single In conductive status 4.400 20.900 4.400 20.900 4.400 20.900 4.700 11.500
LDE<
precision In non-conductive status 4.400 20.900 4.400 20.900 4.400 20.900 4.700 10.900
When not executed 0.360 0.240 0.180 0.120
Single
ANDE< When In conductive status 4.200 19.600 4.200 19.600 4.200 19.600 4.300 9.200
precision
executed In non-conductive status 4.200 19.600 4.200 19.600 4.200 19.600 4.400 9.400
When not executed 0.360 0.240 0.180 0.120
Single
ORE< When In conductive status 4.200 17.400 4.200 17.400 4.200 17.400 4.600 10.400
precision
executed In non-conductive status 4.200 17.400 4.200 17.400 4.200 17.400 4.400 9.800
App-67
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
Single In conductive status 4.400 20.900 4.400 20.900 4.400 20.900 4.700 12.200
LDE>=
precision In non-conductive status 4.400 20.900 4.400 20.900 4.400 20.900 4.700 11.800
When not executed 0.360 0.240 0.180 0.120
Single
ANDE>= When In conductive status 4.200 19.600 4.200 19.600 4.200 19.600 4.100 6.700
precision
executed In non-conductive status 4.200 19.600 4.200 19.600 4.200 19.600 4.400 7.000
When not executed 0.360 0.240 0.180 0.120
Single
ORE>= When In conductive status 4.200 17.400 4.200 17.400 4.200 17.400 4.600 14.000
precision
executed In non-conductive status 4.200 17.400 4.200 17.400 4.200 17.400 4.500 14.300
Double In conductive status 4.700 37.400 4.700 37.400 4.700 37.400 4.200 21.000
LDED=
precision In non-conductive status 4.700 37.400 4.700 37.400 4.700 37.400 5.100 21.900
When not executed 0.360 0.240 0.180 0.120
Double
ANDED= When In conductive status 4.500 34.700 4.500 34.700 4.500 34.700 3.800 17.800
precision
executed In non-conductive status 4.500 34.700 4.500 34.700 4.500 34.700 4.100 18.100
When not executed 0.360 0.240 0.180 0.120
Double
ORED= When In conductive status 4.700 33.200 4.700 33.200 4.700 33.200 4.100 23.800
precision
executed In non-conductive status 4.700 33.200 4.700 33.200 4.700 33.200 4.900 25.500
Double In conductive status 4.700 37.400 4.700 37.400 4.700 37.400 5.100 23.500
LDED<>
precision In non-conductive status 4.700 37.400 4.700 37.400 4.700 37.400 4.200 22.600
When not executed 0.360 0.240 0.180 0.120
Double
Basic ANDED<> When In conductive status 4.500 34.700 4.500 34.700 4.500 34.700 4.000 18.800
precision
instruction executed In non-conductive status 4.500 34.700 4.500 34.700 4.500 34.700 4.000 18.700
When not executed 0.360 0.240 0.180 0.120
Double
ORED<> When In conductive status 4.700 33.200 4.700 33.200 4.700 33.200 5.000 25.200
precision
executed In non-conductive status 4.700 33.200 4.700 33.200 4.700 33.200 4.100 23.400
Double In conductive status 4.700 37.400 4.700 37.400 4.700 37.400 5.100 25.100
LDED>
precision In non-conductive status 4.700 37.400 4.700 37.400 4.700 37.400 4.200 23.400
When not executed 0.360 0.240 0.180 0.120
Double
ANDED> When In conductive status 4.500 34.700 4.500 34.700 4.500 34.700 4.000 19.500
precision
executed In non-conductive status 4.500 34.700 4.500 34.700 4.500 34.700 4.100 19.700
When not executed 0.360 0.240 0.180 0.120
Double
ORED> When In conductive status 4.700 33.200 4.700 33.200 4.700 33.200 5.000 24.200
precision
executed In non-conductive status 4.700 33.200 4.700 33.200 4.700 33.200 4.900 25.800
Double In conductive status 4.700 37.400 4.700 37.400 4.700 37.400 4.200 22.500
LDED<=
precision In non-conductive status 4.700 37.400 4.700 37.400 4.700 37.400 4.200 13.500
When not executed 0.360 0.240 0.180 0.120
Double
ANDED<= When In conductive status 4.500 34.700 4.500 34.700 4.500 34.700 4.000 19.600
precision
executed In non-conductive status 4.500 34.700 4.500 34.700 4.500 34.700 4.100 19.700
When not executed 0.360 0.240 0.180 0.120
Double
ORED<= When In conductive status 4.700 33.200 4.700 33.200 4.700 33.200 5.000 26.300
precision
executed In non-conductive status 4.700 33.200 4.700 33.200 4.700 33.200 5.000 25.200
App-68
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
8
Double In conductive status 4.700 37.400 4.700 37.400 4.700 37.400 5.100 25.000
LDED<
precision In non-conductive status 4.700 37.400 4.700 37.400 4.700 37.400 4.200 24.100
When not executed 0.360 0.240 0.180 0.120 8
Double
ANDED< When In conductive status 4.500 34.700 4.500 34.700 4.500 34.700 4.000 19.400
precision
executed In non-conductive status 4.500 34.700 4.500 34.700 4.500 34.700 4.100 19.700
When not executed 0.360 0.240 0.180 0.120 8
Double
ORED< When In conductive status 4.700 33.200 4.700 33.200 4.700 33.200 5.000 25.100
precision
executed In non-conductive status 4.700 33.200 4.700 33.200 4.700 33.200 5.000 25.100
Double In conductive status 4.700 37.400 4.700 37.400 4.700 37.400 4.200 13.100 8
LDED>=
precision In non-conductive status 4.700 37.400 4.700 37.400 4.700 37.400 4.300 13.100
When not executed 0.360 0.240 0.180 0.120
ANDED>=
Double
When In conductive status 4.500 34.700 4.500 34.700 4.500 34.700 3.900 19.500 A
precision
executed In non-conductive status 4.500 34.700 4.500 34.700 4.500 34.700 4.100 19.800
When not executed 0.360 0.240 0.180 0.120
ORED>=
Double
precision
When In conductive status 4.700 33.200 4.700 33.200 4.700 33.200 5.000 25.100 6
executed In non-conductive status 4.700 33.200 4.700 33.200 4.700 33.200 4.200 18.500
In conductive status 8.300 38.500 8.300 38.500 8.300 38.500 5.500 14.900
LD$=
In non-conductive status 8.300 38.500 8.300 38.500 8.300 38.500 5.500 15.600 7
When not executed 0.360 0.240 0.180 0.120
AND$= In conductive status 7.200 37.300 7.200 37.300 7.200 37.300 5.200 13.800
When executed
In non-conductive status 7.200 37.300 7.200 37.300 7.200 37.300 5.300 14.500 8
When not executed 0.360 0.240 0.180 0.120
Basic
OR$= In conductive status 7.500 36.600 7.500 36.600 7.500 36.600 5.500 14.900
instruction When executed
In non-conductive status 7.500 36.600 7.500 36.600 7.500 36.600 5.300 14.600
In conductive status 8.300 39.300 8.300 39.300 8.300 39.300 5.600 15.200
App-69
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
When not executed 0.360 0.240 0.180 0.120
OR$<= When In conductive status 7.400 35.600 7.400 35.600 7.400 35.600 4.700 14.600
executed In non-conductive status 7.400 35.600 7.400 35.600 7.400 35.600 4.600 14.400
In conductive status 7.400 40.000 7.400 40.000 7.400 40.000 4.800 17.000
LD$<
In non-conductive status 7.400 40.000 7.400 40.000 7.400 40.000 5.500 18.000
When not executed 0.360 0.240 0.180 0.120
AND$< When In conductive status 8.000 37.300 8.000 37.300 8.000 37.300 5.900 13.400
executed In non-conductive status 8.000 37.300 8.000 37.300 8.000 37.300 6.200 14.500
When not executed 0.360 0.240 0.180 0.120
OR$< When In conductive status 8.300 35.600 8.300 35.600 8.300 35.600 6.200 18.700
executed In non-conductive status 8.300 35.600 8.300 35.600 8.300 35.600 5.400 19.700
In conductive status 7.400 38.300 7.400 38.300 7.400 38.300 4.800 10.000
LD$>=
In non-conductive status 7.400 38.300 7.400 38.300 7.400 38.300 5.500 11.200
When not executed 0.360 0.240 0.180 0.120
AND$>= When In conductive status 7.200 37.300 7.200 37.300 7.200 37.300 4.400 21.600
executed In non-conductive status 7.200 37.300 7.200 37.300 7.200 37.300 4.500 21.800
When not executed 0.360 0.240 0.180 0.120
OR$>= When In conductive status 8.200 36.400 8.200 36.400 8.200 36.400 5.400 15.400
executed In non-conductive status 8.200 36.400 8.200 36.400 8.200 36.400 5.300 15.300
n=1 15.300 36.100 15.300 36.100 15.300 36.100 8.200 22.600
BKCMP = S1 S2 D n
n = 96 64.500 85.500 64.500 85.500 64.500 85.500 57.400 72.500
Basic n=1 15.300 36.100 15.300 36.100 15.300 36.100 8.200 22.500
instruction BKCMP<> S1 S2 D n
n = 96 66.600 87.500 66.600 87.500 66.600 87.500 59.500 74.500
n=1 15.300 36.100 15.300 36.100 15.300 36.100 8.200 23.100
BKCMP> S1 S2 D n
n = 96 66.600 87.500 66.600 87.500 66.600 87.500 59.500 74.400
n=1 15.300 36.100 15.300 36.100 15.300 36.100 8.200 22.500
BKCMP<= S1 S2 D n
n = 96 64.500 85.500 64.500 85.500 64.500 85.500 57.400 72.400
n=1 15.300 36.100 15.300 36.100 15.300 36.100 8.300 23.000
BKCMP< S1 S2 D n
n = 96 66.600 87.500 66.600 87.500 66.600 87.500 59.500 74.500
n=1 15.300 36.100 15.300 36.100 15.300 36.100 8.200 22.500
BKCMP>= S1 S2 D n
n = 96 64.500 85.500 64.500 85.500 64.500 85.500 57.400 72.400
n=1 15.800 36.300 15.800 36.300 15.800 36.300 9.350 29.000
DBKCMP = S1 S2 D n
n = 96 64.900 85.700 64.900 85.700 64.900 85.700 60.700 78.400
n=1 15.700 36.300 15.700 36.300 15.700 36.300 9.350 28.900
DBKCMP<> S1 S2 D n
n = 96 67.000 87.700 67.000 87.700 67.000 87.700 62.500 80.300
n=1 15.800 36.300 15.800 36.300 15.800 36.300 9.350 29.000
DBKCMP> S1 S2 D n
n = 96 67.000 87.700 67.000 87.700 67.000 87.700 62.600 80.300
n=1 15.700 36.300 15.700 36.300 15.700 36.300 9.350 29.000
DBKCMP<= S1 S2 D n
n = 96 64.800 85.700 64.800 85.700 64.800 85.700 60.800 78.400
n=1 15.800 36.300 15.800 36.300 15.800 36.300 9.350 29.000
DBKCMP< S1 S2 D n
n = 96 67.000 87.700 67.000 87.700 67.000 87.700 62.700 80.400
n=1 15.700 36.300 15.700 36.300 15.700 36.300 9.300 29.000
DBKCMP>= S1 S2 D n
n = 96 64.800 85.700 64.800 85.700 64.800 85.700 60.700 78.400
App-70
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
8
DB + S D When executed 5.750 13.300 5.750 13.300 5.750 13.300 4.900 7.500
DB + S1 S2 D When executed 5.650 13.200 5.650 13.200 5.650 13.200 5.200 11.000 8
DB - S D When executed 5.750 12.700 5.750 12.700 5.750 12.700 4.900 10.200
DB - S1 S2 D When executed 5.650 12.600 5.650 12.600 5.650 12.600 5.200 8.600
8
DB * S1 S2 D When executed 8.750 40.200 8.750 40.200 8.750 40.200 8.300 22.200
DB/ S1 S2 When executed 5.750 21.500 5.750 21.500 5.750 21.500 6.100 19.200
8
D
ED * S1 S2 D
Double
preci-
S1 = 0, S2 =0 5.550 34.400 5.550 34.400 5.550 34.400 10.500 22.300
8
sion S1 = 21023, S2 = 21023 5.950 39.100 5.950 39.100 5.950 39.100 10.500 22.300
Basic Double
instruction ED / S1 S2 D preci- S1 = 21023, S2 = 21023 8.050 44.200 8.050 44.200 8.050 44.200 7.500 27.200
sion
App-71
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
DBL When executed 3.300 5.900 3.300 5.900 3.300 5.900 2.700 3.800
WORD When executed 3.000 7.250 3.000 7.250 3.000 7.250 2.900 7.000
GRY When executed 3.350 7.500 3.350 7.500 3.350 7.500 2.700 6.100
DGRY When executed 3.000 7.200 3.000 7.200 3.000 7.200 2.900 4.600
GBIN When executed 4.600 9.700 4.600 9.700 4.600 9.700 4.000 8.200
DGBIN When executed 5.550 10.700 5.550 10.700 5.550 10.700 5.500 8.000
NEG When executed 3.300 6.850 3.300 6.850 3.300 6.850 2.400 4.100
DNEG When executed 3.050 5.700 3.050 5.700 3.050 5.700 2.500 4.300
Floating point = 0 3.100 7.350 3.100 7.350 3.100 7.350 2.500 3.400
ENEG
Floating point = -1.0 3.350 11.700 3.350 11.700 3.350 11.700 2.700 4.500
Floating point = 0 3.000 21.200 3.000 21.200 3.000 21.200 2.200 3.500
EDNEG
Floating point = -1.0 3.100 22.900 3.100 22.900 3.100 22.900 2.400 3.500
n=1 8.700 27.600 8.700 27.600 8.700 27.600 9.700 22.000
BKBCD S D n
n = 96 84.200 104.000 84.200 104.000 84.200 104.000 74.200 86.500
n=1 8.450 28.100 8.450 28.100 8.450 28.100 8.900 16.300
BKBIN S D n
n = 96 56.100 75.800 56.100 75.800 56.100 75.800 58.500 65.100
ECON –– 3.100 21.300 3.100 21.300 3.100 21.300 4.300 6.800
EDCON –– 5.050 24.000 5.050 24.000 5.050 24.000 2.800 5.400
EDMOV –– 2.900 22.900 2.900 22.900 2.900 22.900 3.200 7.800
Character string to be
6.250 30.100 6.250 30.100 6.250 30.100 4.500 13.900
transferred = 0
$MOV
Character string to be
Basic 15.500 39.300 15.500 39.300 15.500 39.300 15.400 17.500
transferred = 32
instruction
n=1 8.400 20.900 8.400 20.900 8.400 20.900 8.700 15.200
BXCH D1 D2 n
n = 96 67.100 79.900 67.100 79.900 67.100 79.900 67.200 74.000
SWAP –– 3.300 3.550 3.300 3.550 3.300 3.550 2.400 2.700
GOEND –– 0.550 0.550 0.550 0.500
DI –– 2.800 8.400 2.800 8.400 2.800 8.400 1.800 2.200
EI –– 4.300 12.300 4.300 12.300 4.300 12.300 3.100 3.800
IMASK –– 12.900 40.600 12.900 40.600 12.900 40.600 9.800 25.000
IRET –– 1.000 1.000 1.000 1.000
n=1 7.500 26.500 7.500 26.500 7.500 26.500 4.300 16.100
RSF X n
n = 96 11.400 30.400 11.400 30.400 11.400 30.400 11.400 23.700
n=1 7.300 26.300 7.300 26.300 7.300 26.300 3.800 10.000
RSF Y n
n = 96 10.900 29.900 10.900 29.900 10.900 29.900 8.500 15.200
UDCNT1 –– 1.500 7.100 1.500 7.100 1.500 7.100 1.000 2.000
UDCNT2 –– 1.500 6.300 1.500 6.300 1.500 6.300 1.000 4.000
TTMR –– 5.300 20.900 5.300 20.900 5.300 20.900 3.900 6.100
STMR –– 8.900 49.800 8.900 49.800 8.900 49.800 7.200 30.000
ROTC –– 52.300 52.600 52.300 52.600 52.300 52.600 15.200 16.100
RAMP –– 7.400 30.900 7.400 30.900 7.400 30.900 5.900 18.300
SPD –– 1.500 6.300 1.500 6.300 1.500 6.300 1.000 2.800
PLSY –– 6.400 7.100 6.400 7.100 6.400 7.100 3.500 4.700
PWM –– 3.900 4.600 3.900 4.600 3.900 4.600 3.400 3.400
MTR –– 10.100 61.400 10.100 61.400 10.100 61.400 20.500 28.400
App-72
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
8
n=1 13.600 28.500 13.600 28.500 13.600 28.500 12.100 20.100
BKAND S1 S2 D n
n = 96 63.200 78.200 63.200 78.200 63.200 78.200 57.400 63.200
n=1 13.500 28.500 13.500 28.500 13.500 28.500 7.700 13.200
8
BKOR S1 S2 D n
n = 96 63.100 78.200 63.100 78.200 63.100 78.200 57.400 62.800
n=1 13.600 28.300 13.600 28.300 13.600 28.300 7.800 13.200
BKXOR S1 S2 D n
n = 96 63.100 78.000 63.100 78.000 63.100 78.000 57.300 62.800
8
n=1 13.500 28.300 13.500 28.300 13.500 28.300 7.800 14.100
BKXNR S1 S2 D n
n = 96 63.100 78.000 63.100 78.000 63.100 78.000 57.400 62.900
n=1 5.050 21.100 5.050 21.100 5.050 21.100 3.700 6.300 8
BSFR D n
n = 96 9.000 34.800 9.000 34.800 9.000 34.800 10.200 12.800
n=1 4.800 19.100 4.800 19.100 4.800 19.100 4.500 8.900
BSFL D n
n = 96 8.550 34.300 8.550 34.300 8.550 34.300 10.100 14.300 A
n1 = 16 / n2 = 1 10.300 46.500 10.300 46.500 10.300 46.500 8.800 43.400
SFTBR D n1 n2
n1 = 16 / n2 = 15 10.300 46.400 10.300 46.400 10.300 46.400 8.750 43.400
n1 = 16 / n2 = 1 10.500 49.800 10.500 49.800 10.500 49.800 8.050 45.100 6
SFTBL D n1 n2
n1 = 16 / n2 = 15 10.500 49.800 10.500 49.800 10.500 49.800 8.050 45.100
n1 = 16 / n2 = 1 7.950 24.000 7.950 24.000 7.950 24.000 6.500 22.800
SFTWR D n1 n2
n1 = 16 / n2 = 15 7.950 24.100 7.950 24.100 7.950 24.100 6.500 22.800 7
n1 = 16 / n2 = 1 8.700 23.600 8.700 23.600 8.700 23.600 7.350 23.600
SFTWL D n1 n2
n1 = 16 / n2 = 15 8.650 23.700 8.650 23.700 8.650 23.700 7.300 23.700
n=1 4.550 4.750 4.550 4.750 4.550 4.750 3.000 3.400 8
BSET D n
n = 15 4.550 4.750 4.550 4.750 4.550 4.750 3.000 3.500
Application
n=1 4.600 4.750 4.600 4.750 4.600 4.750 3.000 3.400
instruction
BRST D n
n = 15 4.600 4.750 4.600 4.750 4.600 4.750 3.000 3.400
TEST When executed 7.250 13.200 7.250 13.200 7.250 13.200 4.400 6.900
App-73
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
n=1 6.500 14.800 6.500 14.800 6.500 14.800 5.000 10.900
DIS S D n
n=4 6.900 15.200 6.900 15.200 6.900 15.200 5.400 11.300
n=1 6.800 15.100 6.800 15.100 6.800 15.100 5.500 8.900
UNI S D n
n=4 7.500 15.900 7.500 15.900 7.500 15.900 6.200 9.600
NDIS When executed 4.750 18.700 4.750 18.700 4.750 18.700 11.000 16.300
NUNI When executed 4.750 18.700 4.750 18.700 4.750 18.700 10.600 16.000
n=1 6.600 14.900 6.600 14.900 6.600 14.900 5.000 6.500
WTOB S D n
n = 96 37.700 46.100 37.700 46.100 37.700 46.100 36.000 38.400
n=1 7.350 15.600 7.350 15.600 7.350 15.600 5.100 6.100
BTOW S D n
n = 96 32.100 40.500 32.100 40.500 32.100 40.500 29.900 32.000
n=1 8.250 24.900 8.250 24.900 8.250 24.900 4.300 6.900
MAX S D n
n = 96 34.200 51.600 34.200 51.600 34.200 51.600 32.000 34.300
n=1 8.250 24.800 8.250 24.800 8.250 24.800 4.400 6.800
MIN S D n
n = 96 34.200 51.600 34.200 51.600 34.200 51.600 30.300 34.800
n=1 6.800 34.900 6.800 34.900 6.800 34.900 4.800 14.200
DMAX S D n
n = 96 60.300 89.200 60.300 89.200 60.300 89.200 56.400 68.000
n=1 7.600 35.700 7.600 35.700 7.600 35.700 4.800 9.300
DMIN S D n
n = 96 59.400 90.000 59.400 90.000 59.400 90.000 55.400 62.800
n=1 10.100 28.900 10.100 28.900 10.100 28.900 6.200 12.200
SORT S1 n S2 D1 D2
n = 96 52.100 92.400 52.100 92.400 52.100 92.400 6.200 13.100
n=1 9.300 29.000 9.300 29.000 9.300 29.000 6.200 10.500
DSORT S1 n S2 D1 D2
n = 96 43.600 89.600 43.600 89.600 43.600 89.600 6.100 10.500
Application n=1 6.700 15.000 6.700 15.000 6.700 15.000 4.800 6.200
WSUM S D n
instruction n = 96 28.900 37.100 28.900 37.100 28.900 37.100 26.900 28.700
n=1 8.600 26.800 8.600 26.800 8.600 26.800 5.500 7.000
DWSUM S D n
n = 96 56.200 74.700 56.200 74.700 56.200 74.700 53.000 56.300
n=1 5.850 19.800 5.850 19.800 5.850 19.800 4.300 17.300
MEAN S D n
n = 96 17.300 38.200 17.300 38.200 17.300 38.200 16.000 35.500
n=1 6.900 23.300 6.900 23.300 6.900 23.300 5.750 21.900
DMEAN S D n
n = 96 29.400 49.900 29.400 49.900 29.400 49.900 29.200 48.600
NEXT –– 1.000 1.100 1.000 1.100 1.000 1.100 0.980 1.400
BREAK –– 4.700 25.000 4.700 25.000 4.700 25.000 21.300 17.900
Return to original program 4.100 19.500 4.100 19.500 4.100 19.500 2.000 3.000
RET
Return to other program 4.700 16.700 4.700 16.700 4.700 16.700 2.300 4.900
Internal file pointer 5.400 5.400 5.400 5.400 5.400 5.400 3.300 5.300
FCALL Pn
Common pointer 7.600 30.500 7.600 30.500 7.600 30.500 4.900 6.600
ECALL * Pn
–– 105.000 214.000 105.000 214.000 105.000 214.000 75.700 134.000
*: Program name
ECALL * Pn S1 to S5
–– 164.000 271.000 164.000 271.000 164.000 271.000 109.000 173.000
*: Program name
EFCALL * Pn
–– 105.000 214.000 105.000 214.000 105.000 214.000 76.200 134.000
*: Program name
EFCALL * Pn S1 to S5
–– 164.000 271.000 164.000 271.000 164.000 271.000 90.500 170.000
*: Program name
XCALL –– 5.100 6.700 5.100 6.700 5.100 6.700 3.800 6.400
App-74
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
8
When selecting I/O refresh only 18.100 89.100 18.100 89.100 18.100 89.100 12.800 79.000
When selecting CC-Link refresh
only (Master station side)
33.300 132.000 33.300 132.000 33.300 132.000 24.900 119.000
8
When selecting CC-Link refresh
33.300 132.000 33.300 132.000 33.300 132.000 24.900 119.000
only (Local station side)
When selecting MELSECNET/H
78.600 231.000 78.600 231.000 78.600 231.000 54.000 212.000
8
refresh only (Control station side)
When selecting MELSECNET/H
78.600 231.000 78.600 231.000 78.600 231.000 54.000 212.000
refresh only (Normal station side)
8
When selecting intelli auto
18.100 89.000 18.100 89.000 18.100 89.000 12.800 79.000
COM refresh only
CCOM When selecting I/O outside the
group only (Input only)
15.700 71.600 15.700 71.600 15.700 71.600 8.600 76.500 A
When selecting I/O outside the
40.200 152.000 40.200 152.000 40.200 152.000 26.300 135.000
group only (Output only)
When selecting I/O outside the
45.800 153.000 45.800 153.000 45.800 153.000 26.100 135.000
6
group only (Both I/O)
When selecting refresh of multi-
ple CPU high speed transmission –– –– –– –– –– –– –– –– 7
area only
When selecting communication
18.200 89.000 18.200 89.000 18.200 89.000 7.250 54.300
with peripheral device
Number of data points = 0 6.100 14.200 6.100 14.200 6.100 14.200 3.700 10.100
8
FIFW
Number of data points = 96 6.100 14.200 6.100 14.200 6.100 14.200 3.800 5.200
Application Number of data points = 0 7.500 15.600 7.500 15.600 7.500 15.600 4.400 5.800
FIFR
instruction Number of data points = 96 37.000 45.000 37.000 45.000 37.000 45.000 33.500 35.200
No display no display 1.500 7.100 1.500 7.100 1.500 7.100 5.100 5.100
LEDR LED instruction execution no
38.900 109.000 38.900 109.000 38.900 109.000 35.700 89.200
display
App-75
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
App-76
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
8
Decimal point format
23.900 70.400 23.900 70.400 23.900 70.400 23.300 36.500
all 2-digit specification
EVAL
Exponent format
23.700 70.300 23.700 70.300 23.700 70.300 23.300 36.400
8
all 6-digit specification
n=1 10.200 41.800 10.200 41.800 10.200 41.800 5.600 19.700
ASC S n
8
D
n = 96 31.900 66.600 31.900 66.600 31.900 66.600 30.200 44.700
n=1 8.600 43.400 8.600 43.400 8.600 43.400 7.500 23.100
HEX S D n
n = 96 77.100 115.000 77.100 115.000 77.100 115.000 37.500 53.300
RIGHT S D n
n=1 10.900 29.600 10.900 29.600 10.900 29.600 7.600 11.400 8
n = 96 41.400 60.300 41.400 60.300 41.400 60.300 36.300 46.000
n=1 10.600 29.300 10.600 29.300 10.600 29.300 6.500 16.100
LEFT S n
A
D
n = 96 41.300 60.200 41.300 60.200 41.300 60.200 36.200 46.200
MIDR –– 11.700 30.600 11.700 30.600 11.700 30.600 9.500 19.100
MIDW –– 12.400 24.000 12.400 24.000 12.400 24.000 10.300 18.200
No match 22.000 38.200 22.000 38.200 22.000 38.200 19.300 29.000 6
INSTR Head 13.300 29.600 13.300 29.600 13.300 29.600 10.300 20.000
Match
End 21.900 38.100 21.900 38.100 21.900 38.100 51.100 60.800
EMOD –– 11.600 24.000 11.600 24.000 11.600 24.000 10.300 15.300 7
EREXP –– 19.700 28.000 19.700 28.000 19.700 28.000 19.300 22.300
S = 128 / D = 40 /
47.000 102.000 47.000 102.000 47.000 102.000 44.300 96.700
n=1 8
STRINS S D n
S = 128 / D = 40 /
70.100 134.000 70.100 134.000 70.100 134.000 58.800 112.000
n = 48
Application S = 128 / D = 40 /
46.400 93.600 46.400 93.600 46.400 93.600 39.000 78.100
Single S = -10 6.350 13.800 6.350 13.800 6.350 13.800 4.000 13.000
EXP S D
precision 6.350 13.800 6.350 13.800 6.350 13.800 4.000 13.000
S =1
App-77
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
Double S = -10 15.800 52.700 15.800 52.700 15.800 52.700 8.800 27.600
EXPD S D
precision 15.400 52.500 15.400 52.500 15.400 52.500 8.500 27.300
S =1
Single S1 = 12.3 E + 5
POW S1 S2 D 12.200 22.100 12.200 22.100 12.200 22.100 8.950 19.500
precision S2 = 3.45 E + 0
Double S1 = 12.3 E + 5
POWD S1 S2 D 27.300 61.000 27.300 61.000 27.300 61.000 19.400 55.200
precision S2 = 3.45 E + 0
LOG10 Single precision 8.200 16.500 8.200 16.500 8.200 16.500 5.950 14.800
LOG10D Double precision 15.100 48.000 15.100 48.000 15.100 48.000 12.400 46.500
LIMIT –– 5.350 5.500 5.350 5.500 5.350 5.500 5.200 5.400
DLIMIT –– 6.000 6.150 6.000 6.150 6.000 6.150 5.700 5.900
BAND –– 5.450 12.400 5.450 12.400 5.450 12.400 5.400 6.300
DBAND –– 6.050 11.900 6.050 11.900 6.050 11.900 5.800 6.900
ZONE –– 6.250 10.700 6.250 10.700 6.250 10.700 5.200 11.100
DZONE –– 6.000 11.900 6.000 11.900 6.000 11.900 5.700 10.800
App-78
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU 8
Min. Max. Min. Max. Min. Max. Min. Max.
Point No.1
< S1 < 14.900 50.100 14.900 50.100 14.900 50.100 14.700 48.000
8
SM750 Point No.2
= ON Point No.9
< S1 <
Point No.10
15.800 50.900 15.800 50.900 15.800 50.900 19.600 50.400
8
SCL S1 S2 D
Point No.1
< S1 < 13.900 53.100 13.900 53.100 13.900 53.100 13.700 51.000
SM750 Point No.2 8
= OFF Point No.9
< S1 < 16.600 56.600 16.600 56.600 16.600 56.600 20.400 56.200
Point No.10 A
Point No.1
< S1 < 13.400 52.400 13.400 52.400 13.400 52.400 12.800 50.300
SM750 Point No.2 6
= ON Point No.9
< S1 < 14.200 54.100 14.200 54.100 14.200 54.100 17.300 53.500
DSCL S1 S2 D
Point No.10
7
Point No.1
< S1 < 12.300 53.200 12.300 53.200 12.300 53.200 11.500 51.100
Point No.2
SM750
= OFF Point No.9
8
< S1 < 15.000 57.600 15.000 57.600 15.000 57.600 18.100 57.100
Application Point No.10
instruction Point No.1
14.200 53.300 14.200 53.300 14.200 53.300 13.200 51.200
< S1 < 14.900 55.000 14.900 55.000 14.900 55.000 18.000 54.500
Point No.10
SCL2 S1 S2 D
Point No.1
< S1 < 15.000 53.500 15.000 53.500 15.000 53.500 14.000 51.300
SM750 Point No.2
= OFF Point No.9
< S1 < 16.300 56.400 16.300 56.400 16.300 56.400 19.300 55.800
Point No.10
Point No.1
< S1 < 13.400 52.700 13.400 52.700 13.400 52.700 13.100 50.500
SM750 Point No.2
= ON Point No.9
< S1 < 14.200 54.300 14.200 54.300 14.200 54.300 18.100 53.700
Point No.10
DSCL2 S1 S2 D
Point No.1
< S1 < 12.300 53.200 12.300 53.200 12.300 53.200 12.100 51.000
SM750 Point No.2
= OFF Point No.9
< S1 < 15.000 57.600 15.000 57.600 15.000 57.600 18.900 57.100
Point No.10
App-79
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
Standard RAM 6.800 26.900 6.800 26.900 6.800 26.900 3.000 16.400
RSET
SRAM card –– –– –– –– –– –– 3.000 16.400
SRAM card to standard RAM –– –– –– –– –– –– 230.000 327.000
QDRSET
Standard RAM to SRAM card –– –– –– –– –– –– 997.000 1066.000
SRAM card to standard ROM –– –– –– –– –– –– 525.000 690.000
QCDSET
Standard ROM to SRAM card –– –– –– –– –– –– 490.000 655.000
DATERD –– 5.600 27.800 5.600 27.800 5.600 27.800 5.100 14.700
DATEWR –– 7.800 42.100 7.800 42.100 7.800 42.100 7.100 23.000
No digit increase 14.200 41.200 14.200 41.200 14.200 41.200 6.500 13.100
DATE +
Digit increase 14.200 41.200 14.200 41.200 14.200 41.200 5.700 21.200
No digit increase 15.100 41.200 15.100 41.200 15.100 41.200 6.500 11.500
DATE -
Digit increase 15.100 41.200 15.100 41.200 15.100 41.200 5.700 17.200
SECOND –– 5.800 20.500 5.800 20.500 5.800 20.500 2.600 5.900
HOUR –– 6.200 22.500 6.200 22.500 6.200 22.500 3.000 5.300
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.400
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 8.200 25.500
status
LDDT =
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
When not executed 0.480 0.320 0.240 0.160
Application
In conductive
instruction Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.200 23.400
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.200 23.400
ANDDT= status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.300
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.300
ORDT= status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.400
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.400
status
LDDT <>
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
App-80
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU 8
Min. Max. Min. Max. Min. Max. Min. Max.
When not executed 0.480 0.320 0.240 0.160
Comparison
In conductive
8.200 25.500 8.200 25.500 6.500 25.500 7.200 23.400 8
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.200 23.400
ANDDT<> status
In conductive
8
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
of current
In nonconductive
date
status
6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
8
When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.300
of specified
status A
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.300
ORDT<> status
Comparison
In conductive
status
6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000 6
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
In conductive 7
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.400
status
of specified
In nonconductive
date
LDDT>
status
8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.400
8
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
Application status
In conductive
Comparison 8.200 25.500 8.200 25.500 8.200 25.500 7.200 23.400
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 8.200 25.500 7.200 23.400
ANDDT> status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 8.200 25.500 7.400 23.300
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 8.200 25.500 7.400 23.300
ORDT> status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.400
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.400
status
LDDT<=
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
App-81
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.200 23.400
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.200 23.400
ANDDT<= status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.300
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.300
ORDT<= status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.400
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.400
status
LDDT<
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
Application status
instruction When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.200 23.400
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.200 23.400
ANDDT< status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.300
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.300
ORDT< status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.400
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.400
status
LDDT>=
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
App-82
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU 8
Min. Max. Min. Max. Min. Max. Min. Max.
When not executed 0.480 0.320 0.240 0.160
Comparison
In conductive
8.200 25.500 8.200 25.500 6.500 25.500 7.200 23.400 8
status
of specified
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.200 23.400
ANDDT>= status
In conductive
8
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
status
of current
In nonconductive
date
status
6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.200
8
When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.300
of specified
status A
In nonconductive
date 8.200 25.500 8.200 25.500 6.500 25.500 7.400 23.300
ORDT>= status
Comparison
In conductive
status
6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000 6
of current
In nonconductive
date 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
In conductive 7
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.300
status
of specified
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.300
LDTM=
status 8
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.100
status
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.100
Application status
App-83
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.000 23.000
status
of specified
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500 7.000 23.000
ANDTM<> status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.600 21.900
status
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100 5.600 21.900
status
When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.200
status
of specified
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.200
ORTM<> status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.300
status
of specified
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.300
status
LDTM>
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.100
status
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.100
Application status
instruction When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.000 23.000
status
of specified
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500 7.000 23.000
ANDTM> status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.600 21.900
status
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100 5.600 21.900
status
When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.200
status
of specified
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.200
ORTM> status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.300
status
of specified
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.300
status
LDTM<=
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.100
status
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.100
status
App-84
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU 8
Min. Max. Min. Max. Min. Max. Min. Max.
When not executed 0.480 0.320 0.240 0.160
Comparison
In conductive
8.200 25.500 8.200 25.500 6.500 25.500 7.000 23.000 8
status
of specified
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500 7.000 23.000
ANDTM<= status
In conductive
8
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.600 21.900
status
of current
In nonconductive
ciock
status
6.500 23.100 6.500 23.100 6.500 23.100 5.600 21.900
8
When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.200
of specified
status A
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.200
ORTM<= status
Comparison
In conductive
status
6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000 6
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.000
status
In conductive 7
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.300
status
of specified
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500 7.300 23.300
LDTM<
status 8
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.100
status
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.100
Application status
App-85
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.000 23.000
status
of specified
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500 7.000 23.000
ANDTM>= status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.600 21.900
status
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100 5.600 21.900
status
When not executed 0.480 0.320 0.240 0.160
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500 7.000 23.000
status
of specified
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500 7.000 23.000
ORTM>= status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.100
status
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100 5.900 22.100
status
Application
instruction S.DATERD –– 9.250 51.000 9.250 51.000 9.250 51.000 7.500 23.400
No digit increase 16.800 75.400 16.800 75.400 16.800 75.400 9.100 23.400
S.DATE +
Digit increase 16.800 75.400 16.800 75.400 16.800 75.400 8.900 22.200
No digit increase 17.600 75.300 17.600 75.300 17.600 75.300 9.000 22.200
S.DATE -
Digit increase 16.900 75.300 16.900 75.300 16.900 75.300 9.800 22.100
PSTOP –– 82.200 199.000 82.200 199.000 82.200 199.000 61.400 84.500
POFF –– 82.600 198.000 82.600 198.000 82.600 198.000 121.000 246.000
PSCAN –– 83.600 200.000 83.600 200.000 83.600 200.000 126.000 232.000
WDT –– 2.900 12.000 2.900 12.000 2.900 12.000 1.300 3.000
DUTY –– 7.700 27.500 7.700 27.500 7.700 27.500 4.900 24.300
TIMCHK –– 5.350 24.500 5.350 24.500 5.350 24.500 7.400 23.300
File register of standard RAM 4.100 4.200 4.100 4.200 4.100 4.200 2.400 2.600
ZRRDB
File register of SRAM card –– –– –– –– –– –– 2.500 2.800
File register of standard RAM 5.400 5.500 5.400 5.500 5.400 5.500 3.100 3.300
ZRWRB
File register of SRAM card –– –– –– –– –– –– 3.300 3.600
ADRSET –– 2.400 6.650 2.400 6.650 2.400 6.650 4.200 4.900
ZPUSH –– 9.200 20.500 9.200 20.500 9.200 20.500 6.900 14.000
ZPOP –– 9.000 15.500 9.000 15.500 9.000 15.500 7.500 12.500
App-86
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU 8
Min. Max. Min. Max. Min. Max. Min. Max.
When mounting CC-Link
module
(Master station side)
29.400 91.700 29.400 91.700 29.400 91.700 20.600 55.000
8
When mounting CC-Link
module 29.500 91.600 29.500 91.600 29.500 91.600 20.600 66.100
(Local station side) 8
When mounting
MELSECNET/H,
S.ZCOM
CC-Link IEcontroller 79.900 214.000 79.900 214.000 79.900 214.000 102.000 180.000 8
network module(Control
station side)
When mounting
MELSECNET/H,
A
CC-Link IEcontroller 79.900 214.000 79.900 214.000 79.900 214.000 29.800 102.000
network module(Normal
station side) 6
Application S.RTREAD –– 9.200 57.700 9.200 57.700 9.200 57.700 6.700 33.500
instruction S.RTWRITE –– 10.900 67.100 10.900 67.100 10.900 67.100 8.300 26.000
UNIRD n1 D n2
n2 = 1 6.000 33.100 6.000 33.100 6.000 33.100 4.000 29.100
7
n2 = 16 16.500 43.600 16.500 43.600 16.500 43.600 12.500 37.600
TYPERD 48.50 141.30 43.50 139.90 43.40 139.80 32.40 134.20
TRACE
TRACER
Start
––
174.000
5.100
174.000
15.500
174.000
5.100
174.000
15.500
174.000
5.100
174.000
15.500
96.600
3.800
103.000
13.600
8
1 point –– –– 12.200 34.900 12.200 34.900 9.400 31.300
When standard
1000
RAM is used –– –– 121.500 145.100 121.500 145.100 118.500 141.300
points
RBNOV S D n
1 point –– –– –– –– –– –– 9.400 31.400
App-87
Processing Time (µs)
Category Instruction Condition (Device) Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Min. Max. Min. Max. Min. Max. Min. Max.
Writing to host n4 = 1 64.600 78.100 64.600 78.100 64.600 78.100 64.600 78.100
TO n1 n2 S n3 CPU shared
n3 = 320 63.500 112.300 63.500 112.300 63.500 112.300 56.200 107.800
memory
Writing to host n3 = 1 13.500 62.300 13.500 62.300 13.500 62.300 8.600 58.300
Remark
For the instructions for which a rise execution instruction ( P) is not specified,
the processing time is the same as an ON execution instruction.
Example WORDP instruction and TOP instruction
App-88
(b) When using Q03UD(E)JCPU, Q04UD(E)HCPU, Q06UD(E)HCPU,
Q10UD(E)HCPU, Q13UD(E)HCPU, Q20UD(E)HCPU and Q26UD(E)HCPU
Processing Time (µs)
8
Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU Q04/Q06UD(E)HCPU
Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max. 8
ANB
ORB
MPS
MRD
–– 0.020 0.0095 0.0095
8
MPP
When not executed
INV
When executed
0.020 0.0095 0.0095 8
MEP When not executed
0.020 0.0095 0.0095
MEF When executed
EGP When not executed
A
0.020 0.0095 0.0095
EGF When executed
PLS –– 1.300 1.600 0.890 1.100 0.890 1.100
App-89
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
Single In conductive status 3.700 4.700 3.300 4.300 3.300 4.300
LDE=
precision In non-conductive status
3.800 5.000 3.400 4.500 3.400 4.500
When not executed
Single
ANDE= When In conductive status 0.060 0.0285 0.0285
precision
executed In non-conductive status 3.300 5.800 3.000 5.100 3.000 5.100
When not executed 3.500 5.600 3.000 5.200 3.000 5.200
Single
ORE= When In conductive status 0.060 0.0285
precision
executed In non-conductive status 3.600 4.500 3.200 4.200 0.0285
Single In conductive status 3.500 4.800 3.200 4.300
LDE< >
precision In non-conductive status 4.000 4.700 3.600 4.200
0.0285
When not executed 3.900 4.500 3.500 4.000
Single
ANDE< > When In conductive status 0.060 0.0285
precision
executed In non-conductive status 3.300 5.100 3.000 4.800 0.0285
When not executed 3.500 5.000 3.100 4.600
Single
ORE< > When In conductive status 0.060 0.0285
precision
executed In non-conductive status 3.600 6.000 3.300 5.500 0.0285
Single In conductive status 3.500 5.800 3.100 5.300
LDE>
precision In non-conductive status 3.800 5.000 3.300 4.600
0.0285
When not executed 3.700 4.900 3.300 4.400
Single
Basic ANDE> When In conductive status 0.060 0.0285
precision
instruction executed In non-conductive status 3.500 4.700 3.100 4.200 0.0285
When not executed 3.600 4.500 3.100 4.000
Single
ORE> When In conductive status 0.060 0.0285
precision
executed In non-conductive status 3.600 5.100 3.300 4.600 0.0285
Single In conductive status 3.500 4.800 3.200 4.500
LDE<=
precision In non-conductive status 3.800 5.600 3.400 5.200
0.0285
When not executed 3.800 5.600 3.400 5.100
Single
ANDE<= When In conductive status 0.060 0.0285
precision
executed In non-conductive status 3.200 4.600 2.800 4.200 0.0285
When not executed 3.500 5.000 3.100 4.500
Single
ORE<= When In conductive status 0.060 0.0285
precision
executed In non-conductive status 3.700 5.800 3.400 5.400 0.0285
Single In conductive status 3.800 5.700 3.300 5.300
LDE<
precision In non-conductive status 4.000 5.400 3.500 4.900
0.0285
When not executed 4.000 5.200 3.500 4.900
Single
ANDE< When In conductive status 0.060 0.0285
precision
executed In non-conductive status 3.400 4.600 3.000 4.200 0.0285
When not executed 3.500 4.900 3.100 4.400
Single
ORE< When In conductive status 0.060 0.0285
precision 0.0285
executed In non-conductive status 3.600 5.200 3.300 4.900
App-90
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU 8
Min. Max. Min. Max. Min. Max.
LDED<>
Double In conductive status 4.000 9.300 3.700 8.800 3.700 8.800 7
precision In non-conductive status 4.400 8.200 3.900 7.700 3.900 7.700
When not executed
4.100 7.900 3.500 7.500 3.500 7.500
Basic ANDED<>
Double
precision
When In conductive status 8
instruction executed In non-conductive status 0.060 0.0285 0.0285
When not executed 3.800 7.600 3.300 7.200 3.300 7.200
Double
ORED<> When In conductive status 3.800 7.700 3.400 7.300 3.400 7.300
precision
executed In non-conductive status 0.060 0.0285 0.0285
App-91
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
App-92
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU 8
Min. Max. Min. Max. Min. Max.
When not executed 0.060 0.0285 0.0285
OR$<= When In conductive status 4.700 7.700 4.400 7.200 4.400 7.200 8
executed In non-conductive status 4.600 7.600 4.400 7.100 4.400 7.100
In conductive status 4.800 8.100 4.500 7.500 4.500 7.500
LD$<
In non-conductive status 5.000 8.300 4.500 7.900 4.500 7.900 8
When not executed 0.060 0.0285 0.0285
AND$< When In conductive status 4.500 7.100 4.000 6.600 4.000 6.600
executed In non-conductive status 4.900 7.500 4.400 7.100 4.400 7.100 8
When not executed 0.060 0.0285 0.0285
OR$< When In conductive status 5.100 7.800 4.100 7.200 4.100 7.200
executed In non-conductive status 5.000 8.100 4.100 7.600 4.100 7.600 A
In conductive status 4.800 6.700 4.500 6.200 4.500 6.200
LD$>=
In non-conductive status 5.000 6.700 4.400 6.300 4.400 6.300
When not executed 0.060 0.0285 0.0285 6
AND$>= When In conductive status 4.400 6.800 4.100 6.300 4.100 6.300
executed In non-conductive status 4.500 7.000 4.200 6.600 4.200 6.600
When not executed 0.060 0.0285 0.0285 7
OR$>= When In conductive status 5.400 6.600 4.100 5.800 4.100 5.800
executed In non-conductive status 5.300 6.300 4.100 5.700 4.100 5.700
n=1 8.200 10.700 7.500 10.000 7.500 10.000 8
BKCMP = S1 S2 D n
n = 96 57.400 61.800 46.400 48.700 46.400 48.700
Basic
n=1 8.200 10.700 7.500 10.000 7.500 10.000
instruction BKCMP<> S1 S2 D n
n = 96 59.500 63.300 45.600 50.400 45.600 50.400
n=1 8.200 10.800 7.500 10.100 7.500 10.100
App-93
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
App-94
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU 8
Min. Max. Min. Max. Min. Max.
DBL When executed 2.700 3.400 2.300 2.700 2.300 2.700
WORD When executed 2.900 4.300 2.600 3.600 2.600 3.600 8
GRY When executed 2.700 3.900 2.300 3.400 2.300 3.400
DGRY When executed 2.900 3.500 2.500 3.000 2.500 3.000
GBIN When executed 4.000 4.800 3.800 4.300 3.800 4.300 8
DGBIN When executed 5.500 6.100 5.000 5.900 5.000 5.900
NEG When executed 2.400 3.900 2.000 3.300 2.000 3.300
DNEG When executed 2.500 3.700 2.500 3.300 2.500 3.300 8
Floating point = 0 2.500 3.300 2.300 2.800 2.300 2.800
ENEG
Floating point = -1.0 2.700 4.500 2.500 3.900 2.500 3.900
Floating point = 0 2.200 3.500 1.800 3.100 1.800 3.100 A
EDNEG
Floating point = -1.0 2.400 3.500 1.900 3.000 1.900 3.000
n=1 6.600 8.900 5.900 8.200 5.900 8.200
BKBCD S D n
n = 96 71.300 74.100 61.000 63.400 61.000 63.400 6
n=1 6.500 9.800 5.600 9.300 5.600 9.300
BKBIN S D n
n = 96 56.300 59.500 49.200 52.500 49.200 52.500
ECON –– 2.600 5.400 2.100 4.500 2.100 4.500 7
EDCON –– 2.800 5.400 2.500 5.400 2.500 5.400
EDMOV –– 2.300 5.500 1.700 5.000 1.700 5.000
Character string to be
4.000 6.300 3.400 5.600 3.400 5.600
8
transferred = 0
$MOV
Character string to be
Basic 14.600 16.500 11.400 13.300 11.400 13.300
transferred = 32
instruction
n=1 6.200 7.900 5.500 7.300 5.500 7.300
App-95
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
n=1 9.000 11.700 8.300 11.000 8.300 11.000
BKAND S1 S2 D n
n = 96 57.400 63.100 43.800 47.300 43.800 47.300
n=1 7.700 10.000 7.700 9.500 7.700 9.500
BKOR S1 S2 D n
n = 96 57.400 61.900 44.300 45.800 44.300 45.800
n=1 7.800 10.100 7.300 9.200 7.300 9.200
BKXOR S1 S2 D n
n = 96 57.300 61.500 43.800 45.800 43.800 45.800
n=1 7.800 9.600 7.600 8.900 7.600 8.900
BKXNR S1 S2 D n
n = 96 57.400 61.400 43.900 45.300 43.900 45.300
n=1 3.700 5.400 3.200 4.800 3.200 4.800
BSFR D n
n = 96 6.900 9.000 5.800 7.700 5.800 7.700
n=1 4.100 5.900 3.400 5.100 3.400 5.100
BSFL D n
n = 96 7.100 9.100 6.000 7.900 6.000 7.900
n1 = 16 / n2 = 1 7.950 17.500 7.600 16.900 7.600 16.900
SFTBR D n1 n2
n1 = 16 / n2 = 15 7.950 17.500 7.550 16.900 7.550 16.900
n1 = 16 / n2 = 1 7.950 17.900 7.500 17.400 7.500 17.400
SFTBL D n1 n2
n1 = 16 / n2 = 15 7.900 17.800 7.500 17.300 7.500 17.300
n1 = 16 / n2 = 1 5.950 10.600 4.600 8.700 4.600 8.700
SFTWR D n1 n2
n1 = 16 / n2 = 15 5.900 10.600 4.600 8.700 4.600 8.700
n1 = 16 / n2 = 1 5.950 10.700 4.550 8.700 4.550 8.700
SFTWL D n1 n2
n1 = 16 / n2 = 15 5.950 10.700 4.600 8.800 4.600 8.800
n=1 3.000 3.400 2.500 2.800 2.500 2.800
BSET D n
n = 15 3.000 3.500 2.500 2.800 2.500 2.800
Application
n=1 3.000 3.400 2.600 2.800 2.600 2.800
instruction
BRST D n
n = 15 3.000 3.400 2.500 2.800 2.500 2.800
TEST When executed 4.400 5.300 3.700 4.700 3.700 4.700
DTEST When executed 4.500 5.400 3.900 4.800 3.900 4.800
n=1 4.300 4.600 3.700 4.100 3.700 4.100
BKRST D n
n = 96 6.000 6.800 5.100 6.000 5.100 6.000
All match 4.900 5.300 4.200 4.600 4.200 4.600
n=1
None match 5.000 5.300 4.200 4.600 4.200 4.600
SER S1 S2 D n
n= All match 32.300 32.900 25.900 26.300 25.900 26.300
96 None match 32.400 32.900 25.900 26.300 25.900 26.300
All match 6.100 6.500 5.400 5.700 5.400 5.700
n=1
None match 6.200 6.600 5.500 5.900 5.500 5.900
DSER S1 S2 D n
n= All match 52.800 54.200 41.200 41.800 41.200 41.800
96 None match 52.800 54.200 41.200 41.800 41.200 41.800
App-96
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU 8
Min. Max. Min. Max. Min. Max.
n=1 4.400 5.300 3.800 4.600 3.800 4.600
DIS S D n
n=4 4.800 5.700 4.000 5.000 4.000 5.000 8
n=1 5.000 5.300 3.500 4.800 3.500 4.800
UNI S D n
n=4 5.600 6.000 4.000 5.100 4.000 5.100
NDIS When executed 11.000 13.100 11.000 13.200 11.000 13.200 8
NUNI When executed 10.600 12.700 7.300 13.200 7.300 13.200
n=1 5.000 6.500 4.400 5.800 4.400 5.800
WTOB S D n
n = 96 36.000 38.400 28.200 29.300 28.200 29.300 8
n=1 5.100 6.100 4.600 5.500 4.600 5.500
BTOW S D n
n = 96 29.900 32.000 22.800 23.800 22.800 23.800
n=1 4.300 6.900 4.000 6.100 4.000 6.100 A
MAX S D n
n = 96 31.200 33.500 24.700 27.000 24.700 27.000
n=1 4.400 6.800 4.000 6.000 4.000 6.000
MIN S D n
n = 96 30.300 34.800 26.500 28.300 26.500 28.300 6
n=1 4.800 9.100 4.800 8.100 4.800 8.100
DMAX S D n
n = 96 56.400 62.200 47.100 49.600 47.100 49.600
n=1 4.800 6.800 4.300 5.900 4.300 5.900 7
DMIN S D n
n = 96 55.400 60.200 45.400 47.400 45.400 47.400
n=1 6.200 9.300 5.600 8.800 5.600 8.800
SORT S1 n S2 D1 D2
n = 96 6.200 9.400 5.600 8.600 5.600 8.600 8
n=1 6.200 9.300 5.600 8.200 5.600 8.200
DSORT S1 n S2 D1 D2
n = 96 6.100 9.100 5.600 8.400 5.600 8.400
n=1 4.800 6.200 4.200 5.500 4.200 5.500
Application
WSUM S D n
instruction n = 96 26.900 28.700 21.300 22.300 21.300 22.300
ECALL * Pn
–– 70.300 82.300 65.900 77.600 65.900 77.600
*: Program name
ECALL * Pn S1 to S5
–– 101.000 114.000 91.800 105.000 91.800 105.000
*: Program name
EFCALL * Pn
–– 70.700 82.800 66.200 78.100 66.200 78.100
*: Program name
EFCALL * Pn S1 to S5
–– 86.500 107.000 78.800 91.600 78.800 91.600
*: Program name
XCALL –– 3.800 5.700 3.700 5.200 3.700 5.200
App-97
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
When selecting I/O refresh only 12.800 29.100 12.400 28.600 12.400 28.600
When selecting CC-Link refresh
16.000 39.500 15.500 39.100 15.500 39.100
only (Master station side)
When selecting CC-Link refresh
16.100 39.500 15.500 39.100 15.500 39.100
only (Local station side)
When selecting MELSECNET/H
34.700 70.400 34.400 69.800 34.400 69.800
refresh only (Control station side)
When selecting MELSECNET/H
34.700 70.400 34.400 69.800 34.400 69.800
refresh only (Normal station side)
When selecting intelli auto
12.800 33.200 12.800 33.200 12.800 33.200
COM refresh only
CCOM When selecting I/O outside the
7.900 21.100 7.700 20.700 7.700 20.700
group only (Input only)
When selecting I/O outside the
16.900 44.800 16.500 44.200 16.500 44.200
group only (Output only)
When selecting I/O outside the
22.600 52.600 22.400 52.600 22.400 52.600
group only (Both I/O)
When selecting refresh of multi-
ple CPU high speed transmission 13.000 33.800 12.700 33.200 12.700 33.200
area only
When selecting communication
7.250 18.800 7.100 18.500 7.100 18.500
with peripheral device
Number of data points = 0 3.700 5.300 3.200 4.600 3.200 4.600
FIFW
Number of data points = 96 3.800 4.400 3.300 3.800 3.300 3.800
Application Number of data points = 0 4.300 5.000 3.800 4.400 3.800 4.400
FIFR
instruction Number of data points = 96 33.500 35.500 24.800 25.700 24.800 25.700
Number of data points = 0 4.300 5.900 3.800 5.300 3.800 5.300
FPOP
Number of data points = 96 4.300 5.900 3.700 5.400 3.700 5.400
Number of data points = 0 4.800 5.900 3.700 5.300 3.700 5.300
FINS
Number of data points = 96 4.300 5.900 3.700 5.300 3.700 5.300
Number of data points = 0 4.900 6.500 4.200 5.800 4.200 5.800
FDEL
Number of data points = 96 34.200 35.900 25.400 25.900 25.400 25.900
n3 = 1 10.800 24.100 10.700 23.600 10.700 23.600
FROM n1 n2 D n3
n3 = 1000 392.600 413.300 390.900 410.200 390.900 410.200
n3 = 1 13.600 27.700 12.600 26.700 12.600 26.700
DFRO n1 n2 D n3
n3 = 500 392.600 413.300 390.900 410.200 390.900 410.200
n3 = 1 10.200 21.900 9.600 21.300 9.600 21.300
TO n1 n2 S n3
n3 = 1000 373.700 394.100 372.500 390.800 372.500 390.800
n3 = 1 13.000 26.700 12.000 25.700 12.000 25.700
DTO n1 n2 S n3
n3 = 500 373.700 394.100 372.500 390.800 372.500 390.800
No display no display 2.400 2.600 1.900 2.000 1.900 2.000
LEDR LED instruction execution no
28.100 39.400 24.400 35.800 24.400 35.800
display
App-98
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU 8
Min. Max. Min. Max. Min. Max.
App-99
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
Decimal point format
23.300 30.400 22.800 29.000 22.800 29.000
all 2-digit specification
EVAL
Exponent format
23.300 30.500 22.500 29.000 22.500 29.000
all 6-digit specification
n=1 5.600 9.000 5.400 8.300 5.400 8.300
ASC S D n
n = 96 28.700 32.100 25.200 28.400 25.200 28.400
n=1 6.000 9.700 5.400 9.000 5.400 9.000
HEX S D n
n = 96 35.600 39.800 31.300 35.000 31.300 35.000
n=1 7.600 9.400 7.300 6.600 7.300 6.600
RIGHT S D n
n = 96 36.300 40.000 29.200 31.600 29.200 31.600
n=1 6.500 8.900 5.900 8.200 5.900 8.200
LEFT S D n
n = 96 36.200 39.700 29.200 31.500 29.200 31.500
MIDR –– 9.500 12.100 8.100 10.300 8.100 10.300
MIDW –– 10.300 12.000 8.800 10.200 8.800 10.200
No match 19.300 21.800 16.600 18.400 16.600 18.400
INSTR Head 10.300 12.800 9.100 10.900 9.100 10.900
Match
End 51.100 54.200 42.700 44.900 42.700 44.900
EMOD –– 10.300 11.800 9.600 11.000 9.600 11.000
EREXP –– 19.300 21.000 18.800 20.100 18.800 20.100
S = 128 / D = 40 /
41.100 54.200 35.300 47.600 35.300 47.600
n=1
STRINS S D n
S = 128 / D = 40 /
56.700 81.400 48.600 61.700 48.600 61.700
Application n = 48
instruction
S = 128 / D = 40 /
39.000 49.500 34.800 44.600 34.800 44.600
n=1
STRDEL S D n
S = 128 / D = 40 /
36.000 45.200 29.200 38.100 29.200 38.100
n = 48
SIN Single precision 4.500 6.200 4.100 5.700 4.100 5.700
COS Single precision 4.300 6.000 4.000 5.600 4.000 5.600
TAN Single precision 5.100 7.200 5.100 6.700 5.100 6.700
ASIN Single precision 6.100 8.900 5.900 8.500 5.900 8.500
ACOS Single precision 6.800 9.300 6.700 8.900 6.700 8.900
ATAN Single precision 4.000 6.500 3.900 6.000 3.900 6.000
SIND Double precision 8.800 14.300 8.500 13.800 8.500 13.800
COSD Double precision 9.300 15.100 8.800 14.600 8.800 14.600
TAND Double precision 11.200 16.900 10.800 16.500 10.800 16.500
ASIND Double precision 12.000 17.100 11.600 16.600 11.600 16.600
ACOSD Double precision 11.700 16.500 11.200 16.200 11.200 16.200
ATAND Double precision 9.500 14.200 9.100 13.800 9.100 13.800
RAD Single precision 2.500 4.800 2.100 4.300 2.100 4.300
RADD Double precision 4.000 9.600 3.600 9.200 3.600 9.200
DEG Single precision 2.500 4.700 2.200 4.400 2.200 4.400
DEGD Double precision 4.300 9.000 3.800 9.000 3.800 9.000
SQR Single precision 3.000 4.600 2.600 4.300 2.600 4.300
SQRD Double precision 5.600 11.500 5.200 11.000 5.200 11.000
App-100
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU 8
Min. Max. Min. Max. Min. Max.
Single S1 = 12.3 E + 5
POW S1 S2 D
precision S2 = 3.45 E + 0
8.750 11.400 8.400 10.900 8.400 10.900
Double S1 = 12.3 E + 5
POWD S1 S2 D
precision S2 = 3.45 E + 0
LOG10 Single precision
18.600 27.200 18.200 26.500 18.200 26.500
LOG10D Double precision
LIMIT –– 5.900 8.550 5.700 8.050 5.700 8.050
DLIMIT –– 11.500 19.400 11.100 18.600 11.100 18.600
BAND –– 2.800 3.100 2.400 2.700 2.400 2.700
DBAND –– 3.200 3.500 2.800 3.000 2.800 3.000
ZONE –– 3.000 4.300 2.700 3.800 2.700 3.800
DZONE –– 3.600 5.100 3.300 4.600 3.300 4.600
App-101
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
Point No.1
App-102
Processing Time (µs)
RSET
Standard RAM 3.000 6.300 2.700 5.900 2.700 5.900
8
SRAM card 3.000 6.400 2.600 5.800 2.600 5.800
SRAM card to standard RAM 120.000 134.000 115.000 134.000 115.000 134.000
QDRSET
Standard RAM to SRAM card
SRAM card to standard ROM
533.000
306.000
560.000
346.000
520.000
305.000
553.000
346.000
520.000
305.000
553.000
346.000
8
QCDSET
Standard ROM to SRAM card 311.000 342.000 300.000 334.000 300.000 334.000
DATERD
DATEWR
––
––
3.200
4.900
5.000
9.700
2.500
4.100
4.200
8.900
2.500
4.100
4.200
8.900
8
No digit increase 5.100 8.000 4.700 6.600 4.700 6.600
DATE +
Digit increase 5.700 8.000 4.600 6.500 4.600 6.500
No digit increase 5.800 8.500 4.600 7.000 4.600 7.000
A
DATE -
Digit increase 5.700 7.400 4.600 6.500 4.600 6.500
SECOND –– 2.600 3.900 2.200 3.400 2.200 3.400
HOUR –– 2.900 4.800 2.400 4.300 2.400 4.300 6
In conductive
Comparison 7.400 11.400 6.800 10.900 6.800 10.900
status
of specified
date
In nonconductive
7.400 11.600 6.800 10.900 6.800 10.900
7
status
LDDT =
In conductive
Comparison 5.900 10.000 5.500 9.700 5.500 9.700
of current
status
8
In nonconductive
date 5.900 10.100 5.500 9.700 5.500 9.700
status
When not executed 0.008 0.038 0.038
Application
In conductive
instruction Comparison 7.200 11.400 6.500 10.700 6.500 10.700
status
App-103
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
When not executed 0.008 0.038 0.038
In conductive
Comparison 7.200 11.400 6.500 10.700 6.500 10.700
status
of specified
In nonconductive
date 7.200 11.400 6.500 10.700 6.500 10.700
ANDDT<> status
In conductive
Comparison 5.700 9.900 5.300 9.300 5.300 9.300
status
of current
In nonconductive
date 5.700 9.900 5.300 9.300 5.300 9.300
status
When not executed 0.008 0.038 0.038
In conductive
Comparison 7.400 11.500 6.700 10.800 6.700 10.800
status
of specified
In nonconductive
date 7.400 11.500 6.700 10.800 6.700 10.800
ORDT<> status
In conductive
Comparison 5.900 10.000 5.400 9.600 5.400 9.600
status
of current
In nonconductive
date 5.900 10.000 5.400 9.600 5.400 9.600
status
In conductive
Comparison 7.400 11.400 6.800 10.900 6.800 10.900
status
of specified
In nonconductive
date 7.400 11.600 6.800 10.900 6.800 10.900
Application status
LDDT>
instruction In conductive
Comparison 5.900 10.000 5.500 9.700 5.500 9.700
status
of current
In nonconductive
date 5.900 10.100 5.500 9.700 5.500 9.700
status
When not executed 0.008 0.038 0.038
In conductive
Comparison 7.200 11.400 6.500 10.700 6.500 10.700
status
of specified
In nonconductive
date 7.200 11.400 6.500 10.700 6.500 10.700
ANDDT> status
In conductive
Comparison 5.700 9.900 5.300 9.300 5.300 9.300
status
of current
In nonconductive
date 5.700 9.900 5.300 9.300 5.300 9.300
status
When not executed 0.008 0.038 0.038
In conductive
Comparison 7.400 11.500 6.700 10.800 6.700 10.800
status
of specified
In nonconductive
date 7.400 11.500 6.700 10.800 6.700 10.800
ORDT> status
In conductive
Comparison 5.900 10.000 5.400 9.600 5.400 9.600
status
of current
In nonconductive
date 5.900 10.000 5.400 9.600 5.400 9.600
status
App-104
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU 8
Min. Max. Min. Max. Min. Max.
In conductive
Comparison
of specified
status
7.400 11.400 6.800 10.900 6.800 10.900
8
In nonconductive
date 7.400 11.600 6.800 10.900 6.800 10.900
status
LDDT<=
Comparison
In conductive
5.900 10.000 5.500 9.700 5.500 9.700 8
status
of current
In nonconductive
date 5.900 10.100 5.500 9.700 5.500 9.700
status
When not executed 0.008 0.038 0.038
8
In conductive
Comparison 7.200 11.400 6.500 10.700 6.500 10.700
status
of specified
In nonconductive A
date 7.200 11.400 6.500 10.700 6.500 10.700
ANDDT<= status
In conductive
5.700 9.900 5.300 9.300 5.300 9.300
Comparison
of current
status 6
In nonconductive
date 5.700 9.900 5.300 9.300 5.300 9.300
status
When not executed 0.008 0.038 0.038
7
In conductive
Comparison 7.400 11.500 6.700 10.800 6.700 10.800
status
of specified
In nonconductive
ORDT<=
date
status
7.400 11.500 6.700 10.800 6.700 10.800 8
In conductive
Comparison 5.900 10.000 5.400 9.600 5.400 9.600
status
of current
In nonconductive
date 5.900 10.000 5.400 9.600 5.400 9.600
Application status
App-105
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
In conductive
Comparison 7.400 11.400 6.800 10.900 6.800 10.900
status
of specified
In nonconductive
date 7.400 11.600 6.800 10.900 6.800 10.900
status
LDDT>=
In conductive
Comparison 5.900 10.000 5.500 9.700 5.500 9.700
status
of current
In nonconductive
date 5.900 10.100 5.500 9.700 5.500 9.700
status
When not executed 0.008 0.038 0.038
In conductive
Comparison 7.200 11.400 6.500 10.700 6.500 10.700
status
of specified
In nonconductive
date 7.200 11.400 6.500 10.700 6.500 10.700
ANDDT>= status
In conductive
Comparison 5.700 9.900 5.300 9.300 5.300 9.300
status
of current
In nonconductive
date 5.700 9.900 5.300 9.300 5.300 9.300
status
When not executed 0.008 0.038 0.038
In conductive
Comparison 7.400 11.500 6.700 10.800 6.700 10.800
status
of specified
In nonconductive
date 7.400 11.500 6.700 10.800 6.700 10.800
ORDT>= status
In conductive
Comparison 5.900 10.000 5.400 9.600 5.400 9.600
status
of current
In nonconductive
Application date 5.900 10.000 5.400 9.600 5.400 9.600
status
instruction
In conductive
Comparison 7.300 11.500 6.700 10.800 6.700 10.800
status
of specified
In nonconductive
ciock 7.300 11.500 6.700 10.800 6.700 10.800
status
LDTM=
In conductive
Comparison 5.800 9.900 5.400 9.500 5.400 9.500
status
of current
In nonconductive
ciock 5.800 9.900 5.400 9.500 5.400 9.500
status
When not executed 0.008 0.038 0.038
In conductive
Comparison 7.000 11.500 6.300 10.800 6.300 10.800
status
of specified
In nonconductive
ciock 7.000 11.500 6.300 10.800 6.300 10.800
ANDTM= status
In conductive
Comparison 5.500 9.900 5.100 9.500 5.100 9.500
status
of current
In nonconductive
ciock 5.500 9.900 5.100 9.500 5.100 9.500
status
When not executed 0.008 0.038 0.038
In conductive
Comparison 7.300 11.500 6.600 10.800 6.600 10.800
status
of specified
In nonconductive
ORTM= ciock 7.300 11.500 6.600 10.800 6.600 10.800
status
Comparison
In conductive
of current 5.900 9.900 5.300 9.500 5.300 9.500
status
ciock
App-106
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU 8
Min. Max. Min. Max. Min. Max.
In conductive
Comparison
of specified
status
7.300 11.500 6.700 10.800 6.700 10.800
8
In nonconductive
ciock 7.300 11.500 6.700 10.800 6.700 10.800
status
LDTM<>
Comparison
In conductive
5.800 9.900 5.400 9.500 5.400 9.500 8
status
of current
In nonconductive
ciock 5.800 9.900 5.400 9.500 5.400 9.500
status
When not executed 0.008 0.038 0.038
8
In conductive
Comparison 7.000 11.500 6.300 10.800 6.300 10.800
status
of specified
In nonconductive A
ciock 7.000 11.500 6.300 10.800 6.300 10.800
ANDTM<> status
In conductive
5.500 9.900 5.100 9.500 5.100 9.500
Comparison
of current
status 6
In nonconductive
ciock 5.500 9.900 5.100 9.500 5.100 9.500
status
When not executed 0.008 0.038 0.038
7
In conductive
Comparison 7.300 11.500 6.600 10.800 6.600 10.800
status
of specified
In nonconductive
ORTM<>
ciock
status
7.300 11.500 6.600 10.800 6.600 10.800 8
In conductive
Comparison 5.900 9.900 5.300 9.500 5.300 9.500
status
of current
In nonconductive
ciock 5.900 9.900 5.300 9.500 5.300 9.500
Application status
App-107
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
In conductive
Comparison 7.300 11.500 6.700 10.800 6.700 10.800
status
of specified
In nonconductive
ciock 7.300 11.500 6.700 10.800 6.700 10.800
status
LDTM<=
In conductive
Comparison 5.800 9.900 5.400 9.500 5.400 9.500
status
of current
In nonconductive
ciock 5.800 9.900 5.400 9.500 5.400 9.500
status
When not executed 0.008 0.038 0.038
In conductive
Comparison 7.000 11.500 6.300 10.800 6.300 10.800
status
of specified
In nonconductive
ciock 7.000 11.500 6.300 10.800 6.300 10.800
ANDTM<= status
In conductive
Comparison 5.500 9.900 5.100 9.500 5.100 9.500
status
of current
In nonconductive
ciock 5.500 9.900 5.100 9.500 5.100 9.500
status
When not executed 0.008 0.038 0.038
In conductive
Comparison 7.300 11.500 6.600 10.800 6.600 10.800
status
of specified
In nonconductive
ciock 7.300 11.500 6.600 10.800 6.600 10.800
ORTM<= status
In conductive
Comparison 5.900 9.900 5.300 9.500 5.300 9.500
status
of current
In nonconductive
ciock 5.900 9.900 5.300 9.500 5.300 9.500
Application status
instruction In conductive
Comparison 7.300 11.500 6.700 10.800 6.700 10.800
status
of specified
In nonconductive
ciock 7.300 11.500 6.700 10.800 6.700 10.800
status
LDTM<
In conductive
Comparison 5.800 9.900 5.400 9.500 5.400 9.500
status
of current
In nonconductive
ciock 5.800 9.900 5.400 9.500 5.400 9.500
status
When not executed 0.480 0.320 0.240
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500
status
of specified
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500
ANDTM< status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100
status
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100
status
When not executed 0.480 0.320 0.240
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500
status
of specified
In nonconductive
ciock 8.200 25.500 8.200 25.500 6.500 25.500
ORTM< status
In conductive
Comparison 6.500 23.100 6.500 23.100 6.500 23.100
status
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100
status
App-108
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU 8
Min. Max. Min. Max. Min. Max.
In conductive
Comparison
of specified
status
7.300 11.500 6.700 10.800 6.700 10.800
8
In nonconductive
ciock 7.300 11.500 6.700 10.800 6.700 10.800
status
LDTM<
Comparison
In conductive
5.800 9.900 5.400 9.500 5.400 9.500 8
status
of current
In nonconductive
ciock 5.800 9.900 5.400 9.500 5.400 9.500
status
When not executed 0.480 0.320 0.240
8
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500
status
of specified
In nonconductive A
ciock 8.200 25.500 8.200 25.500 6.500 25.500
ANDTM< status
In conductive
6.500 23.100 6.500 23.100 6.500 23.100
Comparison
of current
status 6
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100
status
When not executed 0.480 0.320 0.240
7
In conductive
Comparison 8.200 25.500 8.200 25.500 6.500 25.500
status
of specified
In nonconductive
ORTM<
ciock
status
8.200 25.500 8.200 25.500 6.500 25.500 8
Application
In conductive
instruction Comparison 6.500 23.100 6.500 23.100 6.500 23.100
status
of current
In nonconductive
ciock 6.500 23.100 6.500 23.100 6.500 23.100
status
App-109
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU
Min. Max. Min. Max. Min. Max.
When mounting CC-Link
module 19.600 26.500 19.300 26.000 19.300 26.000
(Master station side)
When mounting CC-Link
module 19.600 26.500 19.100 26.200 19.100 26.200
(Local station side)
When mounting
MELSECNET/H,
S.ZCOM
CC-Link IEcontroller 53.500 73.500 53.000 72.700 53.000 72.700
network module(Control
station side)
When mounting
MELSECNET/H,
CC-Link IEcontroller 29.800 41.200 29.800 40.600 29.800 40.600
network module(Normal
station side)
App-110
Processing Time (µs)
Q04/ Q10/Q13/Q20/
Category Instruction Condition (Device) Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU 8
Min. Max. Min. Max. Min. Max.
Writing to host n4 = 1 34.700 34.900 33.500 34.400 33.500 34.400
TO n1 n2 S n3 CPU shared
memory
n3 = 320 57.500 76.200 47.100 64.500 47.100 64.500 8
Writing to host n3 = 1 5.300 23.800 5.800 23.300 5.800 23.300
CPU shared
DTO n1 n2 n3
8
S
n3 = 320 111.300 128.400 91.500 108.500 91.500 108.500
memory
Multiple Reading from n3 = 1 5.000 23.800 4.300 23.300 4.300 23.300
CPU host CPU shared
dedicated
instruction
memory
n3 = 320 51.400 65.600 44.400 60.700 44.400 60.700
A
FROM n1 n2 D n3 n3 = 1 11.600 17.700 10.600 13.900 10.600 13.900
Reading from
other CPU n3 = 320 142.000 160.000 142.000 149.000 142.000 149.000
shared memory n3 = 1000 431.000 463.000 422.000 448.000 422.000 448.000 6
Reading from n3 = 1 5.200 23.800 5.600 23.300 5.600 23.300
host CPU shared
n3 = 320 96.400 113.200 83.600 100.800 83.600 100.800
memory
DFRO n1 n2 D n3
Reading from n3 = 1 12.900 20.800 12.200 17.100 12.200 17.100
7
other CPU n3 = 320 277.000 299.000 274.000 291.000 274.000 291.000
shared memory n3 = 1000 838.000 860.000 835.000 857.000 835.000 857.000
n=1 34.700 34.900 33.500 34.400 33.500 34.400
8
D.DDWR n S1 S2 D1 D2 n=16 85.900 87.600 75.200 75.500 75.200 75.500
Remark
the instructions for which a rise execution instruction ( P) is not specified, the
processing time is the same as an ON execution instruction.
Example WORDP instruction and TOP instruction
App-111
(2) Table of the time to be added when file register, module access device or link direct device is used
(a) When using Q00UJCPU, Q00UCPUI, Q01UCPU and Q02UCPU
Device Specification Processing Time (µs)
Device name data
Location Q00UJCPU Q00UCPU Q01UCPU Q02UCPU
Source 0.100 0.100 0.100 0.100
Bit
Destination 0.100 0.100 0.100 0.100
When standard Source 0.100 0.100 0.100 0.100
Word
RAM is used Destination 0.100 0.100 0.100 0.100
Source 0.100 0.100 0.100 0.200
Double word
Destination 0.100 0.100 0.100 0.200
Source –– –– –– 0.220
Bit
When SRAM Destination –– –– –– 0.180
card is used Source –– –– –– 0.220
File register (R) Word
(Q2MEM-1MBS, Destination –– –– –– 0.180
Q2MEM-2MBS) Source –– –– –– 0.440
Double word
Destination –– –– –– 0.380
Source –– –– –– 0.160
Bit
When SRAM Destination –– –– –– 0.140
card is used Source –– –– –– 0.160
Word
(Q3MEM-4MBS, Destination –– –– –– 0.140
Q3MEM-8MBS) Source –– –– –– 0.320
Double word
Destination –– –– –– 0.300
Source 0.120 0.120 0.120 0.120
Bit
Destination 0.120 0.120 0.120 0.120
When standard Source 0.120 0.120 0.120 0.120
Word
RAM is used Destination 0.120 0.120 0.120 0.120
Source 0.120 0.120 0.120 0.220
Double word
Destination 0.120 0.120 0.120 0.220
Source –– –– –– 0.240
Bit
When SRAM Destination –– –– –– 0.200
card is used Source –– –– –– 0.240
File register (ZR) Word
(Q2MEM-1MBS, Destination –– –– –– 0.200
Q2MEM-2MBS) Source –– –– –– 0.460
Double word
Destination –– –– –– 0.400
Source –– –– –– 0.180
Bit
When SRAM Destination –– –– –– 0.160
card is used Source –– –– –– 0.180
Word
(Q3MEM-4MBS, Destination –– –– –– 0.160
Q3MEM-8MBS) Source –– –– –– 0.340
Double word
Destination –– –– –– 0.320
Source –– –– –– 12.000
Bit
Destination –– –– –– 17.300
Module access device Source –– –– –– 9.700
Word
(Un\G , U3En\G0 to G4095) Destination –– –– –– 33.000
Source –– –– –– 24.200
Double word
Destination –– –– –– 34.800
Source –– –– –– 32.900
Bit
Destination –– –– –– 67.300
Link direct device Source –– –– –– 37.200
Word
(Jn\ ) Destination –– –– –– 37.000
Source –– –– –– 39.500
Double word
Destination –– –– –– 41.900
App-112
(b) When using Q03UD(E)CPU, Q04UD(E)HCPU, Q06UD(E)HCPU, Q10UD(E)HCPU,
Q13UD(E)HCPU, Q20UD(E)HCPU and Q26UD(E)HCPU
8
Processing Time (µs)
Device Specification
Device name data Q04/ Q10/Q13/Q20/
Location Q03UD(E)CPU
Q06UD(E)HCPU Q26UD(E)HCPU
Source 0.100 0.048 0.048
8
Bit
Destination 0.100 0.038 0.038
When standard Source 0.100 0.048 0.048
Word
RAM is used Destination 0.100 0.038 0.038 8
Source 0.200 0.095 0.095
Double word
Destination 0.200 0.086 0.086
When SRAM
Bit
Source
Destination
0.220
0.180
0.200
0.162
0.200
0.162
8
card is used Source 0.220 0.200 0.200
File register (R) Word
(Q2MEM-1MBS, Destination 0.180 0.162 0.162
Q2MEM-2MBS)
Double word
Source 0.440 0.399 0.399 A
Destination 0.380 0.361 0.361
Source 0.160 0.152 0.152
Bit
When SRAM
card is used
Destination
Source
0.140
0.160
0.133
0.152
0.133
0.152
6
Word
(Q3MEM-4MBS, Destination 0.140 0.133 0.133
Q3MEM-8MBS) Source 0.320 0.304 0.304
Double word
Destination 0.300 0.295 0.295 7
Source 0.120 0.057 0.057
Bit
Destination 0.120 0.048 0.048
When standard
RAM is used
Word
Source
Destination
0.120
0.120
0.057
0.048
0.057
0.048
8
Source 0.220 0.105 0.105
Double word
Destination 0.220 0.095 0.095
Source 0.240 0.209 0.209
File rExtended Bit
When SRAM Destination 0.200 0.171 0.171
App-113
Appendix 2 CPU PERFORMANCE COMPARISON
App-114
*1 : The number of device points can be changed at the parameters.
*2 : QCPU uses V as an edge relay.
*3 : Instructions that used accumulators with the AnNCPU, AnACPU, and AnUCPU have different formats with
the QCPU.
8
*4 : Can only be used by the $MOV instruction with the Q00JCPU, Q00CPU, and Q01CPU.
*5 : The Q00JCPU does not have file registers.
*6 : Applicable to products with the first 5 digits of the serial number 04122 or higher
(Q00JCPU, Q00CPU, and QCPU).
8
*7 : Each 5 points of FX0 to FX4 and FY0 to FY4 can be used on the programs.
*8 : The number of points that can be used on the programs
*9 : The number of accessible points to actual I/O modules
*10 : The Q00UJCPU does not have file registers.%ParaEnd%
8
Direct mode –– –– –– *2
7
Symbol in table : Usable, ––: Unusable
*1 : The DOUT, DSET, and SRST instructions are direct output dedicated instructions. 8
There are no dedicated instructions for direct input.
*2 : Switching between the refresh mode and direct mode is conducted with an AnNCPU DIP switch.
App-115
Appendix 2.1.4 Timer comparison
Measurement
Same measurement unit as high speed timer
unit
High speed timer specification
High speed reten-
H K100 None
tive timer Designation ST0
method
App-116
Example
• For timers T0 to T2, the program is created in the order the timer operates later. 8
T1 K1
T2 T2 timer starts measurement from the next scan after turning the contact of T1 ON.
8
T0 K1
T1 T1 timer starts measurement from the next scan after turning the contact of T0 ON.
X0 K1
T0
8
T0 timer starts measurement when X0 is turned ON.
8
• For timers T0 to T2, the program is created in the order of timer operation.
X0 K1
T0 T0 timer starts measurement when X0 is turned ON.
A
T0 K1
T1
6
Contacts of T1 and T2 timers are turned ON when contact of T0 is turned ON.
T1 K1
T2
7
Appendix 2.1.5 Comparison of counters
8
TableApp.2.5 Comparison of Counters
Function QCPU AnUCPU AnACPU AnNCPU
K100 K100
Designation method
App-117
Appendix 2.1.7 Instructions whose designation format has been
changed (Except dedicated instructions for
AnACPU and AnUCPU)
Because the QCPU does not have accumulators (A0, A1), the format of AnUCPU, AnACPU and
AnNCPU instructions that used accumulators has been changed.
TableApp.2.7 Instructions Whose Expression Has Changed
QCPU AnUCPU/AnACPU/AnNCPU
Function
Instruction Format Remarks Instruction Format Remarks
• Rotation data are set
ROR D n • D : Rotation data ROR n
at A0.
16-bit • Rotation data are set
• D : Rotation data
rotation to right at A0.
RCR D n • SM700 is used for RCR n
• M9012 is used for
carry flag.
carry flag.
• Rotation data are set
ROL D n • D : Rotation data ROL n
at A0.
16-bit • Rotation data are set
• D : Rotation data
rotation to left at A0.
RCL D n • SM700 is used for RCL n
• M9012 is used for
carry flag.
carry flag.
• Rotation data are set
DROR D n • D : Rotation data DROR n
at A0 and A1.
32-bit • Rotation data are set
• D : Rotation data
rotation to right at A0 and A1.
DRCR D n • SM700 is used for DRCR n
• M9012 is used for
carry flag.
carry flag.
• Rotation data are set
DROL D n • D : Rotation data DROL n
at A0 and A1.
32-bit • Rotation data are set
• D : Rotation data
rotation to left at A0 and A1.
DRCL D n • SM700 is used for DRCL n
• M9012 is used for
carry flag.
carry flag.
• Search results are
• Search results are
16-bit data search SER S1 S2 D n stored at the D and SER S1 S2 n
stored at A0 and A1.
D+1 devices.
• Search results are
• Search results are
32-bit data search DSER S1 S2 D n stored at the D and DSER S1 S2 n
stored at A0 and A1.
D+1 devices.
• Check results are
16-bit • Check results are
SUM S D stored at the D SUM S
data bit check stored at A0.
device.
• Check results are
16-bit • Check results are
DSUM S D stored at the D DSUM S
data bit check stored at A0.
device.
• Dedicated • Only when M9052 is
Partial refresh RFS D n SEG D n
instruction is added. ON
• No dedicated
Carry flag set SET SM700 STC ––
instruction
• No dedicated
Carry flag reset RST SM700 CLC ––
instruction
• Dedicated • P255: END instruction
Jump to END instruction GOEND CJ P255
instruction is added. designation
CHKST CJ Pn
• The CHKST
CHK instruction*1 ––
instruction is added.
CHK P254 CHK
App-118
Appendix 2.1.8 AnACPU and AnUCPU dedicated instructions
8
(1) Method of expression of dedicated instructions
Dedicated instructions based on the LEDA, LEDB, LEDC, SUB, and LEDR instructions, that
are used with the AnACPU or AnUCPU have been changed for the same format as the 8
basic instructions and the application instructions for the QCPU.
The instructions that cannot be converted due to the absence of the corresponding
instructions in the QCPU are converted into OUT SM1255/OUT SM999 (for the Q00J/Q00/
Q01CPU).
8
The instructions that have been converted into OUT SM1255/OUT SM999 should be
replaced by other instructions or deleted.
8
TableApp.2.8 Method of Expression of Dedicated Instruction
QCPU AnUCPU/AnACPU
Command
A
LEDA(B) Instruction name
Command
LEDC/SUB S
6
LEDC/SUB D
Instruction name S D n
LEDC/SUB n
LEDR 7
: S, D, and n indicate data used by instructions.
8
(2) Dedicated instructions whose names have been changed
Dedicated instructions for the AnUCPU or AnACPU which have the same instruction name
as is used for basic instructions and application instructions have undergone name changes
App-119
Appendix 3 SPECIAL RELAY LIST
Special relays, SM, are internal relays whose applications are fixed in the Programmable
Controller.
For this reason, they cannot be used by sequence programs in the same way as the normal
internal relays.
However, they can be turned ON or OFF as needed in order to control the CPU module.
The heading descriptions in the following special relay lists are shown in 3.1.
POINT
Do not change the values of special relays set by the system with user program or
device test operations.
Doing so may result in system downtime or communication fault.
App-120
(1) Diagnostic Information
8
error is detected with CHK instruction) S (Error) New QnPH
• Remains ON even if the condition is restored to QnPRH
OFF : No error normal thereafter.
SM0 Diagnostic errors
ON : Error
• Turns ON if an error occurs as a result of diagnosis.
(Includes when an annunciator is ON) Q00J/Q00/Q01
S (Error) New
8
• Remains ON even if the condition is restored to QnU
normal thereafter.
• Turns ON if an error occurs as a result of diagnosis.
(Does not include when an annunciator is ON or Qn(H)
when an error is detected by the CHK instruction) S (Error) M9008 QnPH
A
OFF : No self-diagnosis • Remains ON even if the condition is restored to QnPRH
SM1 Self-diagnostic error errors normal thereafter.
ON : Self-diagnosis • Turns ON if an error occurs as a result of diagnosis.
(Does not include when an annunciator is ON) Q00J/Q00/Q01
S (Error) New
• Remains ON even if the condition is restored to QnU
8
normal thereafter.
OFF : No error common
Error common information • When SM0 is ON, turns ON if there is error common
SM5 S (Error) New
information ON : Error common information
information
SM16
Error individual
OFF : No error individual
information • When SM0 is ON, turns ON if there is error individual
S (Error) New
QCPU
7
information ON : Error individual information
information
SM50 Error reset OFF ON: Error reset • Conducts error reset operation U New
• Turns ON if battery voltage at CPU module or
memory card drops below rated value.
Qn(H) 8
QnPH
• Remains ON even if the battery voltage returns to S (Error) M9007
QnPRH
normal thereafter.
QnU
OFF : Normal • Synchronizes with the BAT. LED.
SM51 Battery low latch
ON : Battery low • Turns ON if battery voltage at CPU module drops
below rated value.
• Remains ON even if the battery voltage returns to S (Error) New Q00J/Q00/Q01
App-121
TableApp.3.2 Special relay
Corres-
Set by ponding Corresponding
Number Name Meaning Explanation
(When Set) ACPU CPU
M9
• ON when operation error is generated
OFF : Normal
SM56 Operation error • Remains ON if the condition is restored to normal S (Error) M9011
ON : Operation error
thereafter.
• Turns ON if there is at least one output module
whose fuse has blown.
OFF : Normal
• Remains ON if the condition is restored to normal
SM60 Blown fuse detection ON : Module with blown S (Error) M9000
thereafter.
fuse
• Blown fuse status is checked even for remote I/O
station output modules. QCPU
• Turns ON if the I/O module differs from the status
registered at power on.
OFF : Normal • Remains ON if the condition is restored to normal
SM61 I/O module verify error S (Error) M9002
ON : Error thereafter.
• I/O module verification is also conducted for remote
I/O station modules.
OFF : Not detected S (Instruction
SM62 Annunciator detection • Goes ON if even one annunciator (F) goes ON. M9009
ON : Detected execution)
• Goes ON if error is detected by CHK instruction. Qn(H)
OFF : Not detected S (Instruction
SM80 CHK detection • Remains ON if the condition is restored to normal New QnPH
ON : Detected execution)
thereafter. QnPRH
Corresponds
SM90 M9108
to SD90
Corresponds
SM91 M9109
to SD91
Corresponds
SM92 M9110
to SD92
Corresponds
SM93 M9111
to SD93
Corresponds • Goes ON when measurement of
SM94 Startup of monitoring OFF : Not started(monitoring M9112
to SD94 step transition monitoring timer is Qn(H)
timer for step transition timer reset)
commenced. U QnPH
(Enabled only when ON : Started(monitoring Corresponds
SM95 • Resets step transition monitoring M9113 QnPRH
SFC program exists) timer started) to SD95 timer when it goes OFF.
Corresponds
SM96 M9114
to SD96
Corresponds
SM97 New
to SD97
Corresponds
SM98 New
to SD98
Corresponds
SM99 New
to SD99
OFF : Serial communication
• Stores the setting of whether the serial
Serial communication function is not used. S (Power-ON or
SM100 communication function is used or not in the serial
function using flag ON : Serial communication reset)
communication setting parameter
function is used.
OFF : GX Developer • Stores whether the device that is communicating via
Communication S (RS232
SM101 ON : MC protocol the RS-232 interface is GX Developer or MC protocol
protocol status flag communication)
communication device communication device
• Turns ON when an abnormal protocol was used to
make communication in the serial communication
OFF : Normal
SM110 Protocol error function. S (Error)
ON : Abnormal
• Remains ON if the condition is restored to normal
thereafter Q00/Q01
Q00UJ
• Turns ON when the mode used to make
New Q00U
communication was different from the setting in the
OFF : Normal Q01U
SM111 Communication status serial communication function. S (Error)
ON : Abnormal Q02U*7
• Remains ON if the condition is restored to normal
thereafter.
• Turns ON when the error codes stored in SM110,
SM112 Error information clear ON : Cleared SM111, SD110 and SD111 are cleared. (Activated U
when turned from OFF to ON)
OFF : Normal • Turns ON when an overrun error occurred in the
SM113 Overrun error S (Error)
ON : Abnormal serial communication error.
OFF : Normal • Turns ON when a parity error occurred in the serial
SM114 Parity error S (Error)
ON : Abnormal communication error.
OFF : Normal • Turns ON when a framing error occurred in the serial
SM115 Framing error S (Error)
ON : Abnormal communication error.
• Turns ON when the data is written to the program
cache memory.
Program memory OFF : Completed • Turns OFF when the program memory batch transfer
S (When status
SM165 batch transfer ON : Not being executed or is completed. New QnU*6
changed)
execution status Not completed • Remains ON if the program memory batch transfer is
not executed after the data is written to the program
cache memory.
App-122
(2) System information
OFF : Ignored
• When this relay goes from OFF to ON and after END
instruction execution of subsequent scan, clock data QCPU
8
SM210 Clock data set request U M9025
ON : Set request stored in SD210 to SD213 are written to the CPU
module.
OFF : No error • ON when error is generated in clock data (SD210 to
SM211 Clock data error
SM220
CPU No.1 preparation
completed
uncompleted
ON : CPU No.1 preparation
module No.1 from the other CPU module at power-on
or reset operation. SM220 is used as interlock for QnU 8
accessing the CPU module No.1 when the multiple
completed
CPU synchronous setting is asynchronous.
Turned ON when access can be made to the CPU
OFF : CPU No.2 preparation
SM221
CPU No.2 preparation
completed
uncompleted
ON : CPU No.2 preparation
module No.2 from the other CPU module at power-on
or reset operation. SM221 is used as interlock for 7
accessing the CPU module No.2 when the multiple
completed
CPU synchronous setting is asynchronous. S (When status
New QnU*8
Turned ON when access can be made to the CPU changed)
OFF : CPU No.3 preparation
SM222
CPU No.3 preparation
completed
uncompleted
ON : CPU No.3 preparation
module No.3 from the other CPU module at power-on
or reset operation. SM222 is used as interlock for 8
accessing the CPU module No.3 when the multiple
completed
CPU synchronous setting is asynchronous.
Turned ON when access can be made to the CPU
OFF : CPU No.4 preparation
module No.4 from the other CPU module at power-on
CPU No.4 preparation uncompleted
SM223 or reset operation. SM223 is used as interlock for QnU*5
completed ON : CPU No.4 preparation
accessing the CPU module No.4 when the multiple
completed
*5: The Universal model QCPU except the Q00UJCPU, Q00UCPU, Q01UCPU, and Q02UCPU.
*6: The relevant modules are as follows:
• The Universal model QCPU whose serial number (first five digits) is "10012" or later.
• Q13UDHCPU, Q26UDHCPU
*8: The Universal model QCPU except the Q00UJCPU.
App-123
TableApp.3.3 Special relay
Corres-
Set by ponding Corresponding
Number Name Meaning Explanation
(When Set) ACPU CPU
M9
• Goes OFF when reset of the No. 1 CPU is canceled.
OFF : No. 1 CPU reset • Comes ON when the No. 1 CPU is resetting
SM240 No. 1 CPU reset flag cancel (including the case where the CPU module is
ON : No. 1 CPU resetting removed from the base).
The other CPUs are also put in reset status.
• Goes OFF when reset of the No. 2 CPU is canceled.
• Comes ON when the No. 2 CPU is resetting
OFF : No. 2 CPU reset Q00/Q01*1
(including the case where the CPU module is
SM241 No. 2 CPU reset flag cancel Qn(H)*1
removed from the base).
ON : No. 2 CPU resetting QnPH
The other CPUs result in "MULTI CPU DOWN" (error
code: 7000). QnU*8
App-124
TableApp.3.3 Special relay
Corres-
8
MELSECNET/H OFF : Reads • For refresh from link to CPU module (B, W, etc.)
SM261 U New
module 2 information ON : Does not read indicate whether to read from the link module.
OFF : Writes • For refresh from CPU module to link (B, W, etc.),
SM262 U New
ON : Does not write designate whether to write to the link module.
• Goes ON for standby network Qn(H)
OFF : Operative network
SM265
MELSECNET/10,
ON : Standby network
(If no designation has been made concerning active
or standby, active is assumed.)
S (Initial) New QnPH
QnPRH A
MELSECNET/H OFF : Reads • For refresh from link to CPU module (B, W, etc.)
SM266 U New
module 3 information ON : Does not read indicate whether to read from the link module.
OFF : Writes • For refresh from CPU module to link (B, W, etc.),
SM267 U New
ON : Does not write designate whether to write to the link module.
• Goes ON for standby network
8
OFF : Operative network
SM270 (If no designation has been made concerning active S (Initial) New
ON : Standby network
MELSECNET/10, or standby, active is assumed.)
MELSECNET/H OFF : Reads • For refresh from link to CPU module (B, W, etc.)
7
SM271 U New
module 4 information ON : Does not read indicate whether to read from the link module.
OFF : Writes • For refresh from CPU module to link (B, W, etc.),
SM272 U New
ON : Does not write designate whether to write to the link module.
• Goes ON when a CC-Link error is detected in any of
OFF : Normal
SM280 CC-Link error the installed CC-Link module. Goes OFF when S (Status change) New
ON : Error
normal operation is restored.
• This flag is enabled when the time reserved for
8
communication processing is set in SD315.
• Turns ON to delay the END processing by the time
set in SD315 in order to perform communication
Communication
OFF : Without delay processing.
SM315 reserved time delay U New Q00J/Q00/Q01
ON : With delay (The scan time increases by the period set in
enable/disable flag
SD315.)
App-125
TableApp.3.3 Special relay
Corres-
Set by ponding Corresponding
Number Name Meaning Explanation
(When Set) ACPU CPU
M9
• The SFC program starting mode in the SFC setting
of the PLC parameter dialog box is set as the initial
SFC program start OFF : Initial start M9102form
SM322 value. S (Initial)/U
status ON : Resume start at change
AT initial start: OFF
At continued start: ON
OFF : Continuous transition
Presence/absence of Set the presence/absence of continuous transition for
not effective
SM323 continuous transition the block where "Continuous transition bit" of the SFC U M9103
ON : Continuous transition
for entire block data device has not been set.
effective
• OFF during operation in the continuous transition S (Instruction
M9104 Q00J/Q00/Q01*1
OFF : When transition is mode or during continuous transition, and ON when execution)
Continuous transition Qn(H)
SM324 executed continuous transition is not executed.
prevention flag QnPH
ON : When no transition • Always ON during operation in the no continuous S (Status change) New
QnPRH
transition mode.
QnU
Select whether the coil outputs of the active steps are
held or not at the time of a block stop.
• As the initial value, the output mode at a block stop in
Output mode at block OFF : OFF
SM325 the parameter is OFF when the coil outputs are OFF, S (Initial)/U M9196
stop ON : Preserves
and ON when the coil outputs are held.
• All coil outputs go OFF when this relay is OFF.
• Coil outputs are preserved when this relay is ON.
Selects the device status when the stopped CPU is run
SFC device clear OFF : Clear device
SM326 after the sequence program or SFC program has been U New
mode ON : Preserves device
modified when the SFC program exists.
Qn(H)
OFF : Hold step output Select the device status at the time of switching from QnPH
Output during end step S (Initial)/U
SM327 turned OFF (cleared) STOP to program write to RUN.(All devices except the New QnPRH
execution QnU
ON : Hold step output held step relay)
U Q00J/Q00/Q01*1
Select whether clear processing will be performed or
not if active steps other than the ones being held exist
in the block when the end step is reached.?
OFF : Clear processing is • When this relay turns OFF, all active steps are
Clear processing
performed. forcibly terminated to terminate the block. Q00J/Q00/Q01*1
SM328 mode when end step U New
ON : Clear processing is not • When this relay is ON, the execution of the block is QnU
is reached
performed. continued as-is.
• If active steps other than the ones being held do not
exist when the end step is reached, the steps being
held are terminated to terminate the block.
Select whether the low speed execution type program
will be executed in the asynchronous mode or in the
synchronous mode.
• Asynchronous mode (this relay is turned OFF.)
Mode in which the operation of the low speed
Operation mode for
OFF : Asynchronous mode execution type program is performed continuously Qn(H)
SM330 low speed execution U New
ON : Synchronous mode within the excess time. QnPH
type program
• Synchronous mode (this relay is turned ON.)
Mode in which the operation of the low speed
execution type program is not performed
continuously and operation is performed from the
next scan if there is excess time.
• Indicates whether the normal SFC program is being
Normal SFC program OFF : Not executed executed or not.
SM331
execution status ON : Being executed • Used as an SFC control instruction execution
Qn(H)*3
interlock.
S (Status change) New QnPH*4
Program execution • Indicates whether the program execution
QnPRH
management SFC OFF : Not executed management SFC program is being executed or not.
SM332
program execution ON : Being executed • Used as an SFC control instruction execution
status interlock.
• The status of the intelligent function module access
ON indicates completion of instruction executed immediately before is stored. Qn(H)
SM390 Access execution flag intelligent function module (This data is overwritten when the intelligent function S (Status change) New QnPH
access module access instruction is executed again.) QnPRH
• Used by the user in a program as a completion bit.
GINT instruction Indicates execution status of the S(P).GINT instruction.
OFF : Not executed S (Instruction
SM391 execution completion • Turned OFF before the instruction is executed. New QnU
ON : Execution completed execution)
flag • Turned ON after the instruction is completed.
*1: This applies to the CPU of function version B or later.
*3: The module whose first 5 digits of serial No. is "04122" or later.
*4: The module whose first 5 digits of serial No. is "07032" or later.
App-126
(3) System clocks/counters
TableApp.3.4 Special relay 8
Corres-
Set by ponding Corresponding
Number Name Meaning Explanation
(When Set) ACPU CPU
M9 8
ON S (Every END
SM400 Always ON • Normally is ON M9036
OFF processing)
8
QCPU
ON S (Every END
SM401 Always OFF • Normally is OFF M9037
OFF processing)
8
• This connection can be used for scan execution type
programs only.
• When an initial execution type program is used, this Qn(H)
relay turns OFF at the END processing of the scan S (Every END QnPH
execution type program in the first scan after RUN. M9038
After RUN, ON for 1 ON processing) QnPRH
SM402 1 scan
A
scan only OFF ON QnU
Initial 1 scan of scan
OFF
execution execution type
type program program
S (Every END
• After RUN, ON for 1 scan only. New Q00J/Q00/Q01
App-127
TableApp.3.4 Special relay
Corres-
Set by ponding Corresponding
Number Name Meaning Explanation
(When Set) ACPU CPU
M9
• This relay alternates between ON and OFF at
intervals of the time (unit: ms) specified in SD415.
• When Programmable Controller power supply is Qn(H)
n(ms) turned ON or a CPU module reset is performed, QnPH
SM415 2n (ms) clock n(ms) S (Status change) New
goes from OFF to start. QnPRH
(Note that the ON-OFF status changes when the QnU
designated time has elapsed during the execution of
the program.)
SM420 User timing clock No.0 • Relay repeats ON/OFF switching at fixed scan M9020
SM421 User timing clock No.1 intervals. M9021
• When Programmable Controller power supply is
SM422 User timing clock No.2 M9022
turned ON or a CPU module reset is performed,
SM423 User timing clock No.3 goes from OFF to start. M9023
(For the redundant CPU, however, this relay is
S (Every END
always OFF after system switching.) QCPU
processing)
• The ON/OFF intervals are set with the DUTY
n2 scan n2 scan instruction
SM424 User timing clock No.4 M9024
DUTY n1 n2 SM420
n1 scan
n1: ON scan interval
n2: OFF scan interval
SM430 User timing clock No.5
SM431 User timing clock No.6
S (Every END Qn(H)
SM432 User timing clock No.7 • For use with SM420 to SM424 low speed programs New
processing) QnPH
SM433 User timing clock No.8
SM434 User timing clock No.9
App-128
(6) Memory cards
TableApp.3.7 Special relay
Corres-
8
Set by ponding Corresponding
Number Name Meaning Explanation
(When Set) ACPU CPU
8
Memory card in-use OFF : Not used QnPH
SM604 • Goes ON when memory card is in use S (Status change) New
flag ON : In use QnPRH
OFF : Remove/insert enabled QnU*1
Memory card remove/ • Goes ON when memory card cannot be inserted or
SM605 ON : Remove/insert U New
insert prohibit flag removed
prohibited
OFF : Remove/insert
• Turned ON by user to enable the removal/insertion
of memory card. A
Memory card remove/ • Turned OFF by the system after the memory card is
SM609 prohibited S/U New
insert enable flag removed.
ON : Remove/insert enabled
• This contact can be used only when SM604 and
SM605 are OFF.
OFF : Not used • Goes ON when the file within Drive 3 (standard
Qn(H)
QnPH
8
SM624 Drive 3/4 in-use flag S (Status change) New
ON : In use RAM) or Drive 4 (standard ROM) is used. QnPRH
QnU
Q00J/Q00/Q01
Qn(H)
OFF : File register not used
SM640 File register use • Goes ON when file register is in use S (Status change) New QnPH
ON : File register in use
QnPRH
*1: The Universal model QCPU except the Q00UJCPU, Q00UCPU, and Q01UCPU.
*2: The Universal model QCPU except the Q00UJCPU.
App-129
TableApp.3.7 Special relay
Corres-
Set by ponding Corresponding
Number Name Meaning Explanation
(When Set) ACPU CPU
M9
Qn(H)
OFF : File register not used QnPH
SM650 Comment use • Goes ON when comment file is in use S (Status change) New
ON : File register in use QnPRH
QnU
OFF : Internal memory
Qn(H)
execution • Goes ON while boot operation is in process
S (Status change) New QnPH
ON : Boot operation in • Goes OFF if boot designation switch is OFF
QnPRH
progress
SM660 Boot operation
OFF : Program memory
execution Q00J/Q00/Q01
• Goes ON while boot operation is in process S (Status change) New
ON : Boot operation in QnU*1
progress
• Turned ON when latch data backup to the standard
Latch data backup to
OFF : Not completed ROM is completed.
SM671 standard ROM S (Status change) New QnU
ON : Completed • Time when the latch data backup to the standard
completion flag
ROM was performed is stored in SD672 or later.
• Goes ON when access is made to area outside the
Memory card file Qn(H)
OFF : Within access range range of file register of memory card(Set within END
SM672 register access range S/U New QnPH
ON : Outside access range processing.)
flag QnPRH
• Reset at user program
• Turned ON when data cannot be backuped to the
Error completion of
OFF : No Error standard ROM by the latch data backup normally.
SM675 latch data backup to S New
ON : Error • Turned OFF when data is backuped to the standard
standard ROM
ROM by the latch data backup normally.
• If latch data backup is performed when SM676 is
ON, restore the data every time turning ON from
Specification of OFF the power supply from the next power-on.
OFF : Not specified
SM676 restration repeated • Delete the backuped latch data, or restore the data U New
ON : Specified
execution every time turning ON from OFF the power supply
until the latch data backup operation will be executed
again.
OFF : Write error • Turns ON if a write error is detected at writing to
Program memory write
SM680 ON : Write not executed/ program memory (flash ROM). S (At write) New
error
normal Turns OFF by the write direction.
• Turns ON when writing to the program memory (flash
Program memory OFF : During writing
SM681 ROM) is in progress, and turns OFF when writing is S (At write) New QnU
writing flag ON : Write not executed
completed.
OFF : Overwrite count is
Program memory
100,000 or more • Turns ON when the overwrite count of program
SM682 overwrite count error S (At write) New
ON : Overwrite count is less memory (flash ROM) reaches 100,000.
flag
than 100,000
OFF : Write error • Turns ON when write error is detected at writing to
Standard ROM write
SM685 ON : Write not executed/ standard ROM (flash ROM). S (At write) New
error
normal • Turns OFF by the write direction.
• Turns ON when writing to the standard ROM (flash
Standard ROM writing OFF : During overwriting
SM686 ROM) is in progress, and turns OFF when writing is S (At write) New
flag ON : Overwrite not executed
completed.
OFF : Overwrite count is
Standard ROM • Turns ON when the overwrite count of standard
100,000 or more
SM687 overwrite count error ROM (flash ROM) reaches 100,000. S (At write) New
ON : Overwrite count is less
flag (It is necessary to change CPU module.)
than 100,000
OFF : Backup start
preparation not
Backup start Turns on when the backup start preparation is
SM691 completed S (Status change) New
preparation status flag completed.
ON : Backup start
preparation completed QnU*3
*1: The Universal model QCPU except the Q00UJCPU, Q00UCPU, and Q01UCPU.
*3: The modules whose serial number (first five digits) is "10102" or later are the relevant models. (Except the Q00UJCPU, Q00UCPU, and Q01UCPU)
App-130
(7) Instruction-Related Special Relays
TableApp.3.8 Special relay
Set by
Corres-
ponding Corresponding
8
Number Name Meaning Explanation
(When Set) ACPU CPU
M9
8
descending order.
• Goes ON when all data conditions have been met for S (Instruction
New
OFF : Non-match found the BKCMP instruction. execution)
SM704 Block comparison
ON : All match • Goes ON when all data conditions have been met for S (Instruction
New
the DBKCMP instruction. execution)
SM709
DT/TM instruction
improper data
OFF : Improper data not
detected
Turns on when the data to be compared by the DT or
TM instruction is not recognized as date data or time S (Instruction
New
QnU*2 A
data, or the device (3 words) to be compared exceeds execution) or U
detection flag ON : Improper data detected
the specified device range.
Qn(H)
CHK instruction OFF : Conditions priority • Remains as originally set when OFF. S (Instruction
SM710
priority ranking flag ON : Pattern priority • CHK priorities updated when ON. execution)
New QnPH
QnPRH 8
OFF : During DI S (Instruction
SM715 EI flag • ON when EI instruction is being executed. New QCPU
ON : During EI execution)
Turns on when all data conditions are confirmed that
SM716
Block comparison
(Except an interrupt
OFF : Mismatch found
they are met by the DBKCMP instruction.
(Initial execution type program, scan execution type 7
ON : No mismatch program, stand-by type program executed from initial
program)
execution type program or scan execution type
program) QnU*2
*1: The module whose first 5 digits of serial No. is "09042" or later.
*2: The relevant modules are as follows:
• The Universal model QCPU whose serial number (first five digits) is "10102" or later.
• Q00UJCPU, Q00UCPU, Q01UCPU
*3: The relevant modules are as follows:
• The Universal model QCPU whose serial number (first five digits) is "10102" or later.
• Q00UCPU, Q01UCPU
App-131
TableApp.3.8 Special relay
Corres-
Set by ponding Corresponding
Number Name Meaning Explanation
(When Set) ACPU CPU
M9
OFF : Not executed by
• During OFF, XCALL instructions will not be executed
XCALL instruction execution condition
even if execution condition is risen.
SM734 execution condition risen
• During ON, XCALL instructions will be executed