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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS
Using the Gate–Bulk Interaction and a Fundamental
Current Injection to Attenuate IM3 and IM2
Currents in RF Transconductors
Meysam Asghari and Mohammad Yavari, Member, IEEE
Abstract— Two new linearization techniques to attenuate
the second-order intermodulation (IM2) and third-order
intermodulation (IM3) currents in transconductance stage of
CMOS active mixers are proposed. In the first technique,
the third-order Volterra kernel of the transconductance stage
output current is cancelled using the interaction between the
gate and bulk terminals of the input transistors. For this end,
a IM2 voltage, with an adjustable magnitude and phase, is
produced and applied to the bulk of these transistors. This
produces an interaction term in the IM3 current of the stage
and attenuates the total IM3 current. In the second technique, a
fundamental component is added to the current of the tail source
in the transconductance stage. This component produces an IM2
term in the drain current of the input transistors, caused by g’m
of the input transistors, with an equal magnitude and opposite
phase related to the intrinsic IM2 current of the stage, and
cancels the total IM2 current. Spectre-RF simulation results show
that the proposed techniques simultaneously improve the third-
order input intercept point and second-order input intercept
point by ∼14.1 and 16.4 dB, respectively, compared with the
conventional active mixer, while 1.66-mA extra current is drawn
from a single 1.2 V power supply.
Index Terms— CMOS active mixers, gate–bulk interaction,
Gilbert-cell, second-order input intercept point (IIP2), third-
order input intercept point (IIP3), linearity, second-order inter-
modulation (IM2), third-order intermodulation (IM3).
I. I NTRODUCTION
R ECENTLY, with the rapid development of modern
wireless communication systems, the demand for high-
data-rate systems, such as the orthogonal frequency division
multiplexing, has increased. In these kinds of systems, the
linearity is a critical requirement [1]. On the other hand,
with CMOS technology scaling, the supply voltage of the
circuits has decreased, resulting in the degraded linearity [2].
In a receiver chain, the linearity of the down-conversion
mixer often dominates the total linearity. The double-balanced
Gilbert-cell mixer, owing to its high port-to-port isolation and
high integration level, is widely used as the down-converter
block in the radio receivers [3], [4]. The second-order inter-
modulation (IM2) and third-order intermodulation (IM3) cur-
rents are the most important parts of the nonlinear current
Manuscript received May 11, 2014; revised October 23, 2014 and
January 6, 2015; accepted January 13, 2015.
The authors are with the Integrated Circuits Design Laboratory,
Department of Electrical Engineering, Amirkabir University of Technology,
Tehran 16846-13114, Iran (e-mail: meysamasghari@aut.ac.ir; myavari@
aut.ac.ir).
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TVLSI.2015.2394244
1063-8210 © 2015 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission.
See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
1
limiting the second-order input intercept point (IIP2) and third-
order input intercept point (IIP3) of the mixer, respectively.
The output nonlinear current of the transconductance stage
is the most important source of these intermodulations in
the low-noise amplifiers (LNAs) and active mixers. In a
perfectly balanced mixer, even-order nonlinearities generated
by the nonlinearity of the transconductance stage transistors
would not appear at the output. However, in practice, due to
the mismatch between the local oscillator (LO) signals, load
resistances, and switching transistors, even-order nonlinearities
appear at the signal [5]. Several linearization techniques to
cancel the IM3 and IM2 currents of the transconductance stage
are introduced in [2] and [5]–[24].
The derivative superposition scheme is one of the
most utilized techniques to cancel the IM3 current of the
transconductance stage in the recent years [2], [6]–[9]. In this
technique, an extra transistor is employed in parallel with
the main transistor and it is biased in a different region.
 ) of this
The second-order derivative transconductance (gm
transistor has an opposite sign of the main transistor, and
hence, can cancel the gm  of the main transistor.
The IM2 injection method is another approach to cancel
the IM3 current [10], [11]. The postdistortion technique
in [12] uses a diode-connected transistor at the output of the
transconductance stage to cancel the IM3 current. This
transistor injects an IM3 current with an equal magnitude but
an opposite phase related to the intrinsic IM3 current of the
transconductance stage to produce a zero total IM3 current.
In [13], the third-order kernel of the transconductance stage
output current is cancelled using the interaction between two
nonlinear systems. The IM3 current of transconductor along
with the switching stage is attenuated by producing a negative
impedance in [14]. This technique improves both the flicker
noise figure and conversion gain of the mixer as well.
In [2] and [6], due to the interaction between the input
signal and the IM2 signal at the output of the transconductance
stage, the IM3 cancellation is limited. This problem is
alleviated in [7] and [8] using an LC filter at the output of the
transconductance stage. This filter attenuates the IM2 signal,
and hence, the contribution of the interaction term is reduced.
However, in these papers, the gm  of the main transistors
cancels in a narrow bias point range of the extra transistor [9].
In [10] and [11], the injected IM2 signal to the transconduc-
tance stage increases the IM2 current of the stage, resulting
in a degraded IIP2. In addition, the diode-connected transistor
in [12] decreases the gain of the stage. Moreover, all of the
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2 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

introduced techniques in [2], [6]–[9], [12], and [13] increase

the noise figure.
The adaptive biasing technique based on the envelope
signal power detection in [15] is another method that not
only enhances the linearity but also reduces the dc power
in RF transconductors. The amplifier’s IIP3 is improved by
injecting both the IM2 signal and the second-order harmonics
of input tones in [16]. However, in these techniques, since the
injected signal is added at the input of the amplifier, it can be
leaked to the previous block like LNA, and hence, may affect
its performance. Fig. 1. Conventional double-balanced Gilbert-cell mixer.
Several calibration techniques are presented to cancel
the IM2 current in [17]–[20]. In [5], [21], and [22], the
IM2 current of the transconductance stage is significantly A. Proposed IM3 Cancellation Technique
attenuated by employing the feedback technique. However, the In an nMOS transistor with the bulk terminal connected
calibration techniques are often power hungry and complex. to the ground, by neglecting from the nonlinearity influence
In addition, the introduced technique in [21] is not appropriate  , g  , . . . ,) and higher
of the transistor conductance (gds , gds ds
for high channel bandwidth applications such as UMTS and order nonlinear coefficients of the transistor transconductance,
IEEE 802.11 as well as [5] and [22] are sensitive to the the small-signal drain current of the transistor, around the
device mismatch and are power hungry [18]. In [10] and [24], bias point, can be expressed by the Taylor series expansion
a feedforward method is employed to attenuate the as follows:
IM2 current. In this method, an IM2 current with equal
 2  3
magnitude and opposite phase with respect to the main i d (vg , vs ) = gm vgs + gm vgs + gm vgs + · · · (1)
IM2 term is generated by employing two auxiliary transistors  , and g  are the transconductance, first- and
with drains connected together. The very same current is where gm, gm m
subtracted from the output current of this stage, resulting in second-order derivatives of the transistor transconductance,
the IM2 current cancellation of the transconductor. respectively. In addition, vg and vs are the variations of the
In this paper, two new linearization techniques to attenuate gate and source voltages, respectively. In (1), the second and
the IM2 and IM3 currents of the transconductance stage are third terms are the sources of the IM2 and IM3 currents,
presented. In the first technique, the IM3 current is cancelled respectively. In (1), the drain current of the transistor is defined
using the interaction between the bulk and gate terminals of as a function of the gate and source voltages (vg and vs ). Now,
an MOS transistor. In the second technique, an IM2 current if a signal is applied to the bulk of the transistor, (1) cannot
with an equal magnitude and opposite phase is generated by completely express the drain current of the transistor. In this
injecting a fundamental current to the transconductance stage. case, to consider the body effect (vb ), the following relation
The very same current is subtracted from the output current of can be utilized [25]:
this stage resulting in the IM2 current cancellation of the stage.  2
i d (vg , vb , vs ) = gm vgs + gm  3
vgs + gm vgs + · · · gmb vbs
To investigate the cancellation mechanisms, a full Volterra  2  3
series analysis is employed. + gmb vbs + gmb vbs + · · · gb vgs vbs
 2 
This paper is organized as follows. The proposed + gbg vgs vbs + gbb vgs v2gs + · · · (2)
IM3 and IM2 cancellation techniques are explained  , and g  denote the bulk transconductance,
in Section II. Section III presents the linearized mixer using where gmb , gmb mb
the proposed techniques. Simulation results are provided the first- and second-order derivatives of the bulk transconduc-
 , and g  are the cross-modulation
tance, respectively. gb , gbg
in Section IV. Finally, the conclusions are drawn in Section V. bb
coefficients of the transistor, which can be obtained as follows:

II. P ROPOSED IM3 AND IM2 C ANCELLATION ∂ 2id  ∂ 3i d  ∂ 3i d

gb = gbg = 2 gbb = . (3)
T ECHNIQUES ∂vgs ∂vbs ∂vgs ∂vbs ∂vgs ∂vbs2

A conventional double-balanced Gilbert-cell mixer with a In (2), if the second-order nonlinearity component exists
fully differential transconductance stage is shown in Fig. 1. in the bulk signal (vb ) while the source of the transistor is
In this circuit, M1 –M2 with Mb , M3 –M6 , and R L with C L grounded, another IM3 term will appear at the drain current in
form the transconductance, switching, and load stages, addition to the intrinsic IM3 component arising from gm  . This

respectively. By assuming that the switching stage is ideal,
the nonlinear current of the transconductance stage is the most
dominant source of the distortion in the mixer. This nonlinear
current originates from the nonlinear I –V characteristic of the
utilized MOS transistors. In this section, two new techniques
are introduced to cancel the IM3 and IM2 currents of
the mixer.
term originates from gb by creating an interaction between
the gate and the bulk terminals of the transistor. In (2), if we
could adjust the magnitude and the phase of the second-order
component of the bulk voltage signal, the total IM3 current of
the transistor can be cancelled.
The proposed IM3-cancellation technique is based on
the interaction between the gate and the bulk terminals.
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ASGHARI AND YAVARI: GATE–BULK INTERACTION AND A FUNDAMENTAL CURRENT INJECTION TO ATTENUATE IM3 AND IM2 CURRENTS 3

Fig. 2. Realization of the proposed IM3 cancellation technique in the fully

differential transconductor.

Fig. 3. IM2 voltage generator.

For this purpose, an IM2 voltage with an adjustable magnitude
and phase is produced and applied to the bulk of the transistor.
Fig. 2 shows the realization of the proposed technique
in the fully differential transconductor. In this circuit, the
resistor (Rbulk ) defines the bias voltage of the bulk terminals
to the zero potential and the IM2 voltage is applied to the bulk
of M1 and M2 transistors by the capacitor C (an ac coupling
capacitor).
The output current of the transconductance stage in Fig. 2
can be considered as the differential and common-mode parts.
These two type of definitions of the output current in the
transconductance stage along with VIM2 can be expressed by
the Volterra series expansion as follows:
IDIFF = Id1 − Id2 = H1DIFF (ω) ◦
Vin + H2DIFF (ω1 , ω2 )
+ H3 (ω1 , ω2 , ω3 ) ◦ Vin3 + · · ·
DIFF
ICM = Id1 + Id2 = H1CM(ω) ◦ Vin + H2CM (ω1 , ω2 ) ◦ Vin2
+ H3CM(ω1 , ω2 , ω3 ) ◦ Vin3 + · · · (5)
VIM2 = B2 (ω1 , ω2 ) ◦ Vin2 + · · ·
where H1DIFF , H2DIFF , H3DIFF
and H1CM , H2CM ,
are H3CM
the differential and common-mode parts of first-, second-,
and third-order Volterra kernels of the transconductance stage
output current, respectively. B2 is the second-order Volterra
kernel of VIM2 . It will be proved that both the magnitude and
phase of B2 are adjustable.
The differential third-order and common-mode second-order
kernels are given by (7) and (8), respectively (the detailed
calculations are presented in Appendix A)
H3DIFF (±ω1 , ±ω1 , ∓ω2 )
 4   As mentioned above, in order to cancel the output
= 2gm1 − gm1 (2gm1 + gb1 )
3 IM3 current (H3DIFF ) of the fully differential transconductor,
× (2N(±ω1 ∓ ω2 ) + N(±2ω1 ))
4 bulk of M1 and M2 ) should be adjustable. For this, the circuit
+ (2B2 (±ω1 , ∓ω2 ) + B2 (±ω1 , ∓ω1 ))
9 shown in Fig. 3 is proposed. In this circuit, the transistors

× [(3/2)gb1 − gmb1 (2gm1 + gb1 )
× (2N(±ω1 ∓ ω2 ) + N(±2ω1 ))]
H2CM (±ω1 , ∓ω2 )

= [gm1 + gmb1 B2 (±ω1 , ∓ω2 )]
× (1 − 2(gm1 + gmb1 )N(±ω1 ∓ ω2 )).
In (7), the first term is the intrinsic third-order nonlinearity
of input transistors and the second term is the intrinsic inter-
action term of the fully differential structure that originates
from the second-order nonlinearity at the source of the input
transistors. Finally, the third term is the produced interaction
term by the applied IM2 voltage to the bulk of M1 and M2 .
As it is seen, this kernel can be attenuated by changing the
magnitude and phase of B2 , resulting in an enhancement in
the value of AIIP3 .
Equation (7) states that H3DIFF can be cancelled, provided
that the following condition is satisfied:
2B2 (±ω1 , ∓ω2 ) + B2 (±ω1 , ±ω1 )
2 
g (2g  +gb1)(2N(±ω1 ∓ ω2 )+ N(±2ω1 ))−gm1

= 3 m1 2 m1  +g )(2N(±ω ∓ ω )+ N(±2ω ))
.
gb1 − 3 gmb1 (2gm1 b1 1 2 1
(9)
As it is clear, the condition in (9) can be satisfied by
◦ Vin2 changing the magnitude and phase of B2 .
The common-mode second-order kernels are calculated
(4)
in (8). In this equation, the first term in the bracket is
the second-order nonlinearity of the input transistors and the
second term originates from the injected IM2 voltage to the
(6) bulk of these transistors. Although the circuit shown in Fig. 2
is introduced as the IM3 cancellation technique, it can also
be used as the IM2 cancellation technique as well. Suppose
the (8), regarding the positive sign of gm1 and gmb1 ; if the
sign of B2 is selected as negative then the IM2 current of
the transistor can be cancelled. Consequently, the proposed
technique is a multipurpose one. When this method is used as
the IM2 cancellation, the second-order kernel of ICM will be
cancelled if the following condition holds:

gm1
B2 (±ω1 , ∓ω2 ) = − . (10)
gmb1
the magnitude and phase of B2 (the applied IM2 voltage to the
(7) M1a and M2a are similar and they are used to convert the
input signal voltage to a nonlinear current. Since the drain of
these two transistors are connected together, the differential
components (odd-order terms) of their currents are removed
and the common-mode components (even-order terms) are
(8) summed up in the output current (i out ). This current then
appears at the output as a voltage (VIM2 ) while flowing from
the RC network (R D1 and C D ) ‘and being amplified by M3a .
Here, only the second-order Volterra kernel of this voltage is
considered and higher order kernels are neglected. By applying
the Kirchhoff’s law at the drain of M1a and M2a , we have
vd (t) dvd (t)
i d1a (t) + i d2a (t) + + CD = 0. (11)
R D1 dt
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4 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

By substituting (1) and (6) into the frequency domain

representation of (11), B2 is given by

2gm1a R D1 × gm3a R D2
B2 (±ω1 , ∓ω2 ) = . (12)
1 + j (±ω1 ∓ ω2 )R D1C D
As it is seen, the magnitude and phase of B2 can be changed
according to the values of R D1 , R D2 , and C D .

B. Proposed IM2 Cancellation Technique

In general, the magnitude of IIP2 in a circuit can be
calculated as follows:
A1 (ω)
AIIP2 = (13)
A2 (ω1 , ω2 )
where A1 and A2 are the first- and second-order kernels
of the output signal, respectively. In a perfectly balanced
differential topology, the second-order nonlinearities appear
as the common-mode at the output signal resulting in a Fig. 4. IM2 cancellation circuit.
zero A2 and an infinite AIIP2 . However, in practice, due to a
mismatch between the corresponding devices, the differential common-mode second-order kernels are given by (the detailed
IM2 signal appears at the output of the circuit, and this calculations are presented in Appendix B)
limits the IIP2. In a double-balanced Gilbert-cell mixer, the 
DIFF
H2,L (±ω1 , ∓ω2 ) = −2gm1 (D1 (±ω1 ) + D1 (∓ω2 )) (15)
differential IM2 signal appears at the output in two ways.
First, the mismatch between the corresponding transistors in
CM
H2,L (±ω1 , ∓ω2 ) = −2gm1 D2 (±ω1 , ∓ω2 )

the transconductance stage and in the switching pairs produces + 2gm1 (1 + D1 (±ω1 )D1 (∓ω2 )). (16)
a differential IM2 current (H2DIFF ) and this current is trans-
ferred to the output without any frequency translation. Second, As seen from (15), the differential second-order of the
the common-mode IM2 current (H2CM) is converted to the left-hand side is not equal to zero. However, the one in
differential current due to the mismatch between the switching the right-hand side will be in an opposite phase to that in
pairs and load resistors [26]. By considering these two limiting the left-hand side in Fig. 4, and hence, will cancel each
factors of IIP2, its magnitude in a down-conversion mixer can other, resulting in the total differential second-order kernel of
be calculated as the output current (H2DIFF ) to be zero (Appendix B). As a
result, if the right-side pair is not added, the total differential
2 H1DIFF second-order kernel of the output current (H2DIFF ) will not
AIIP2 =  
π 2  2   σ R 2  CM 2 be cancelled, and consequently, the IIP2 will be decreased
L2 H2DIFF + H2CM + RL H2
considerably according to the (14).
(14) The common-mode second-order kernel of the right-hand
side is the same as the one in the left-hand side, and con-
where L, R L , and σ R are the low-frequency leakage of the sequently, the total common-mode second-order kernel of the
switching pairs, the load resistor, and the standard deviation output current is twice the kernel obtained in (16). In this equa-
of the mismatch in the load resistors, respectively. As is seen tion, the first term is the intrinsic second-order nonlinearity of
from (14), an effective way to improve the IIP2 of the mixer the fully differential transconductance stage and the second
is to cancel the common-mode second-order kernel of the term arises from the proposed technique. It can be shown
transconductance stage output current (H2CM). that the total common-mode second-order kernel of the output
Here, by injecting a first-order component to the transcon- current will be cancelled if the following condition holds:
ductance stage, an IM2 current is produced and subtracted
from the output of the stage resulting in the total IM2 output F1 (±ω1 )F1 (∓ω2 )

current to be zero. The circuit implementation of this technique = (1 + 2gm1 RSS )2 + ω1 ω2 (RSS C p1 )2
is shown in Fig. 4. Although there are not any odd-order 
terms at the source voltage of the input transistors in a fully 1
+ j (±ω1 ∓ ω2 )RSS C p1 (1 + 2gm1 RSS ) × 2 (17)
differential structure, a first-order term has been created at RSS
the source voltage of M1 –M2 and M3 –M4 by injecting a where F1 will be obtained as follows:
fundamental current which is generated by the circuit shown
gm4a (gm6a + gm8a )R A
with blue color in Fig. 4. This term produces a second-order F1 (ω) = × (1 − j ω R A C A ). (18)
term with the same magnitude but an opposite phase at the 1 + (ω R A C A )2
drain currents of M1 –M2 and M3 –M4 . This term is caused by According to (18), the canceling condition in (17) can
gm of these transistors and cancels the second-order kernel of be satisfied by changing the values of R A and C A and
the transconductance stage output current. The differential and choosing a proper aspect ratio for M4a and M6a –M8a
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ASGHARI AND YAVARI: GATE–BULK INTERACTION AND A FUNDAMENTAL CURRENT INJECTION TO ATTENUATE IM3 AND IM2 CURRENTS 5

As it is clear, (22) can be met by changing the values

of R A and C A and choosing a proper aspect ratio for
M4a and M6a –M8a (M5a and M7a –M9a ) transistors according
to (18). On the other hand, (23) can be satisfied by changing
the magnitude and phase of the injected IM2 voltage
(by changing the values of R D1 and C D as well as the gain
of M3a ). In this circuit, due to the first-order component
existence in the source voltage of the right- and left-hand
side transistor pairs, the other cross-modulation coefficients
(gbb and gbg ) appear in the third-order kernel.
Since the output noise of IM2 voltage generator (shown
Fig. 5. IIP2 for different values of R A and aspect ratios of M4a (and M5a ). in Fig. 3) and the IM2 cancellation circuit (M4a , M6a –M8a and
M5a , M7a –M9a along with R A and C A ) as well as the injected
(M5a and M7a –M9a ), resulting in an enhancement in the fundamental currents (i ss,L and i ss,R ) appear as the common
magnitude of the IIP2 according to (14). Fig. 5 shows the IIP2 mode at the output of the mixer, the proposed techniques do
for different values of R A and aspect ratios of M4a (and M5a ). not have any effect on the noise figure and conversion gain.
Due to the increased number of transistors at the RF port,
III. P ROPOSED H IGH IIP2 AND IIP3 ACTIVE M IXER the total capacitance seen from this port is also increased.
The high IIP2 and IIP3 mixer using the introduced In addition, the proposed intermodulation distortion (IMD)
IM2 and IM3 cancellation techniques in Section II is shown cancellation techniques are based on a perfect phase opposition
in Fig. 6. The differential first- and third-order kernels and the of the original and compensating IMD products. As a result,
common-mode second-order kernel of the transconductance by considering (22) and (23), these techniques are frequency
stage are, respectively, given by (the detailed calculations are dependent and they will be satisfied for a narrow bandwidth
presented in Appendix C) of input frequency. So, these techniques are not appropriate
for ultrawideband applications.
H1DIFF (ω) = 4gm1 (19)
H2CM (±ω1 , ∓ω2 ) IV. S IMULATION R ESULTS
 
= 4D1 (±ω1 )D1 (∓ω2 )(gm1 + gmb1 + gb ) The complete schematic of the proposed mixer is shown
 in Fig. 6 and it has been simulated using a 90-nm RFCMOS
+ 4gmb1 B2 (±ω1 , ∓ω2 ) + 4gm1
process along with the conventional mixer shown in Fig. 1.
− 4D2 (±ω1 , ∓ω2 )(gm1 + gmb1 ) (20) It has been designed with input signal frequency and output
DIFF
H3 (±ω1 , ±ω1 , ∓ω2 ) signal bandwidth equal to 2.4 GHz and 10 MHz, respectively,
 4 with a single 1.2 power supply. An LO with 5-dBm power
= 4gm1 + gb1 (2B2 (±ω1 , ∓ω2 ) + B2 (±ω1 , ±ω1 ))
3 drives the switching transistors. The utilized bias voltages in
4  typical process corner case and room temperature and device
− (2gm1 +gb1) (2D2 (±ω1 , ∓ω2 )+ D2 (±ω1 , ±ω1 ))
3 parameters are also shown in Fig. 6. It is worth mentioning
4 that these bias voltages are generated using a proper biasing
+ (2D1 (±ω1 )D1 (∓ω2 ) + D1 (±ω1 )D1 (±ω1 ))
3 circuit, which is not shown in Fig. 6 for conciseness. The

× (3gm1 + 2gbg1 + gbb1). (21) layout of the proposed mixer is shown in Fig. 7 which occupies
378.8-μm × 328.8-μm die area. In this figure, the located
As seen from (19), the first-order kernel is the same as
area in the red box is the layout of the conventional
the conventional fully differential structure. The cancellation
mixer. The following results are related to the postlayout
conditions of the common-mode second-order and differential
simulations.
third-order kernels of the transconductance output current
The IIP3 simulations have been performed by applying a
are dependent together and make two equations with two
two-tone test with 10-MHz spacing. The simulated IIP3 of
unknowns. It can be observed that H2CM and H3DIFF will be
the mixers are shown in Fig. 8. This figure indicates that
cancelled if the following conditions are satisfied:
the proposed mixer has 15.7-dBm IIP3 which is improved
F1 (±ω1 )F1 (∓ω2 ) ∼14.1 dB compared with the conventional mixer. In order to
1 investigate the performance of the proposed IM3 cancellation
=
N(±ω1 )N(∓ω2 ) technique, IIP3 has been simulated versus the frequency spac-
 −g
gb1 gm1  ing and the results are shown in Fig. 9. As it is seen, IIP3 of
mb1 gm1
×  +2g   the proposed mixer varies for different frequency spacing
gmb1 (3gm1 bg1 + gbb1 )−gb1 (gmb1 + gm1 + gb1 )
(22) indicating that the IM3 cancellation depends on the frequency.
In addition, the IIP3 and IIP2 simulations versus the process
B2 (±ω1 , ∓ω2 ) variations have been done. In these simulations, an intentional
 (g + g   
gm1 b1 mb1 ) − gm1 (gbb1 + 2ggb1 + 2gm1 ) 1% mismatch was considered in resistors and for transistors,
=    .
gmb1 (3gm1 + 2gbg1 + gbb1)−gb1(gmb1 + gm1 + gb1 ) the random mismatch is given by the Gaussian distribution
(23) with a standard deviation of (W/W ) = 0.373/(W × L × M),
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6 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

Fig. 6. Complete schematic of the proposed mixer.

Fig. 9. Simulated IIP3 of the proposed mixer versus the frequency spacing.

Fig. 7. Layout of the proposed mixer.

Fig. 10. IIP3 Monte Carlo simulation results of the proposed and conventional
mixers.

performed by applying a two-tone test. The IIP3 and IIP2

Fig. 8. Simulated IIP3 of the proposed and conventional mixers.
where W , L, and M are the width, length, and number
of fingers in MOS transistors, respectively. Then, the
Monte Carlo simulations with 1000 iterations have been
Monte Carlo simulation results are shown in Figs. 10 and 11,
respectively.
According to Fig. 10, the minimum IIP3 of the proposed
mixer is higher than 13 dBm while the minimum IIP3 of the
conventional mixer is 1.54 dBm. In addition, Fig. 11 shows
16.4 dB improvement in IIP2 of the proposed mixer compared
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ASGHARI AND YAVARI: GATE–BULK INTERACTION AND A FUNDAMENTAL CURRENT INJECTION TO ATTENUATE IM3 AND IM2 CURRENTS
Fig. 11. IIP2 Monte Carlo simulation results of the proposed and conventional
mixers.
Fig. 12. (a) Simulated conversion gain. (b) Noise figure of the proposed
mixer.
TABLE I
C ORNER C ASES S IMULATION R ESULTS OF THE P ROPOSED M IXER
with the conventional one. The simulated conversion-gain and
noise figure of the proposed mixer in the output bandwidth is
shown in Fig. 12. As it is seen, the conversion-gain and noise
figure are equal to 9.8 and 15 dB, respectively, which have
not been changed in comparison with the conventional mixer.
The simulation results in different process corner cases and
temperature variations are summarized in Table I.
Table II summarizes the simulation results and compares
the proposed mixer with the conventional one and several
previously reported linearization works [10], [13], [14], [19],
[21], [27]–[35] using the following figure-of-merit [27]:
CG(dB) IIP3(dBm)−10
considering (2), the drain current of these transistors can be
10 20 × 10 20
FoM = 10 log NF(dB)
. (24)
10 10 × P(mW) × VDD (V )
As it is seen, the Figure of Merit (FoM) of [13], [21],
[29], and [32] are larger than that of the proposed mixer.
However, in [21], the mixer is merged with an LNA. In [29]
and [32], four and one inductors, respectively, are employed
that occupy a large silicon die area, and all of these works,
7
TABLE II
P ERFORMANCE C OMPARISON
except [32], have a low IIP2 in comparison with the proposed
mixer, while the IIP2 is not considered in the FoM relation
in (24). Compared with the other works, the proposed mixer
achieves an outstanding FoM that indicates the effectiveness
of the proposed IM3 cancellation technique. In addition, the
IM2 cancellation technique results in a high IIP2 for the mixer
while only the reported works in [10], [19], and [28] are
achieved a higher IIP2.
V. C ONCLUSION
In this paper, a linearized mixer along with its Volterra
series analysis has been presented. In order to improve the
linearity, two new linearization techniques are introduced.
In the first technique, using the interaction between the gate
and bulk terminals of the MOS transistor, a new term is
produced at the drain IM3 current. The second technique
is based on the cancellation of the second-order kernel of
the transconductance stage output current. In this technique,
an IM2 current with an equal magnitude and opposite
phase is generated by injecting a first-order current to
the transconductance stage. The very same current is sub-
tracted from the output current of this stage resulting in
the cancellation of IM2 current of the transconductance
stage.
A PPENDIX A
Assuming M1 and M2 in Fig. 2 are identical and
expressed as
 
Id1 = gm1 (Vin − Vs ) + gm1 (Vin − Vs )2 + gm1 (Vin − Vs )3
 
+ gmb1 (Vb − Vs ) + gmb1 (Vb − Vs )2 + gmb1 (Vb − Vs )3
+ gb1(Vin − Vs )(Vb − Vs ) + gbg1(Vin − Vs )2 (Vb − Vs )
+ gbb1(Vin − Vs )(Vb − Vs )2 + · · · (A.1)
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8 IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS

 
Id2 = gm1 (−Vin −Vs )+gm1 (−Vin − Vs )2 + gm1 (−Vin − Vs )3 (i ss,L and i ss,R ) can be expressed by the Volterra series as
  follows:
+ gmb1 (Vb − Vs ) + gmb1 (Vb
− Vs ) + gmb1 (Vb − Vs )3
2

+ gb2 (−Vin −Vs )(Vb −Vs )+gbg2(−Vin −Vs )2 (Vb − Vs ) VS,L = D1 (ω) ◦ Vin + D2 (ω1 , ω2 ) ◦ Vin2
+ gbb2 (−Vin − Vs )(Vb − Vs )2 + · · · (A.2) +D3 (ω1 , ω2 , ω3 ) ◦ Vin3 + · · · (B.1)
VS,R = −D1 (ω) ◦ Vin + D2 (ω1 , ω2 ) ◦ Vin2
The source voltage of the input transistors (M1 and M2 ) is
related to the input voltage signal and it can be defined based −D3 (ω1 , ω2 , ω3 ) ◦ Vin3 + · · · (B.2)
on the following Volterra series: Iss,L = −Iss,R = F1 (ω) ◦ Vin + F3 (ω1 , ω2 , ω3 ) ◦ Vin3 + · · ·
(B.3)
Vs = K 1 (ω) ◦ Vin + K 2 (ω1 , ω2 ) ◦ Vin2
where D1 , D2 , D3 and F1 , F3 are the first-, second-, and third-
+ K 3 (ω1 , ω2 , ω3 ) ◦ Vin3 + · · · (A.3)
order kernels of VS,L (and VS,R ) and the first- and third-order
where K 1 , K 2 , and K 3 are the first-, second-, and third-order kernels of i ss,L (and i ss,R ), respectively. In (B.3), since the
kernels of Vs related to the input voltage signal, respectively. output second-order nonlinearity of M6a –M8a and M9a –M10a
One the other hand, by applying the Kirchhoff’s current law are in the opposite phase related together, the total second-
(KCL) at the source of these transistors, we have order component of the i ss,L and i ss,R currents is very small,
and hence, the second-order kernel of these currents can be
dvs (t) vs (t) neglected. By applying the KCL at the source of M1 and M2
−i d1(t) − i d2 (t) + C P + = 0. (A.4)
dt RSS we have
v S,L (t) dv S,L (t)
In (A.4), C P and RSS denote the total parasitic capacitance −i d1,L (t) − i d1,R (t) + i ss,L (t) + + C p1 = 0.
at the source of the input transistors and the output impedance RSS dt
of the tail current source, respectively. By substituting (A.3) (B.4)
into the frequency domain representation of (A.4) and using Using (1) and substituting (B.1) and (B.3) into the frequency
(A.1) and (A.2), the kernels of Vs are given by domain representation of (B.4), the first-, second-, and third-
order kernels of VS,L are obtained as
K 1 (ω) = K 3 (±ω1 , ±ω1 , ∓ω2 ) = 0 (A.5)
 D1 (ω) = −F1 (ω) × N(ω) (B.5)
K 2 (±ω1 , ∓ω2 ) = 2N(±ω1 ,∓ω2 )(2gm1 +gmb1 B2 (±ω1 , ∓ω2 ))
D2 (±ω1 , ∓ω2 )
(A.6) 
= 2gm1 (1 + D1 (±ω1 )D1 (∓ω2 ))N(±ω1 ∓ ω2 ) (B.6)
where N(ω) is as follows: D3 (±ω1 , ±ω1 , ∓ω2 )

N(ω) =
RSS
. (A.7) = −N(±2ω1 ∓ ω2 ) F3 (±ω1 , ±ω1 , ∓ω2 )
1 + 2RSS (gm1 + gmb1 ) + j ω RSS C P
4  
Now, by substituting (A.3) into (A.1) and (A.2) as well − gm1 2D1 (±ω1 )D2 (±ω1 , ∓ω2 )
3 
as using (A.6) and (A.7), the kernels of the transconductance +D1 (∓ω2 )D2 (±ω1 , ±ω1 )
output current in (4) and (5) are obtained as follows: 

+ 2gm1 2D1 (±ω1 ) + D1 (∓ω2 )

H1DIFF (ω) = 2gm1 H3DIFF (±ω1 , ±ω1 , ∓ω2 ) 
+D12 (±ω1 )D1 (∓ω2 ) . (B.7)
 4  
= 2gm1 − gm1 (2gm1 + gb1 )
3 Using (B.5)–(B.7), and the frequency domain representation
×(2N(±ω1 ∓ ω2 ) + N(±2ω1 )) of (1), the differential and common-mode first-, second-,
4 and third-order kernels of the left-side output current can be
+ (2B2 (±ω1 , ∓ω2 ) + B2 (±ω1 , ∓ω1 ))
9 calculated as

× [(3/2)gb1 − gmb1 (2gm1 + gb1 ) DIFF
H1,L (ω)
× (2N(±ω1 ∓ ω2 ) + N(±2ω1 ))] (A.8)
= 2gm1 H2,L
DIFF
(±ω1 , ∓ω2 ) (B.8)
H2CM (±ω1 , ∓ω2 ) 
 = −2gm1 (D1 (±ω1 ) + D1 (∓ω2 )) (B.9)
= [gm1 + gmb1 B2 (±ω1 , ∓ω2 )]
H3,L (±ω1 , ±ω1 , ∓ω2 )
DIFF
×(1 − 2(gm1 + gmb1 )N(±ω1 ∓ ω2 )) (A.9)
 
= 2gm1 + 2gm1 (D12 (±ω1 ) + 2D1 (±ω1 )D1 (∓ω2 )) (B.10)
H1CM(ω) = H3 (±ω1 , ±ω1 , ∓ω2 ) = H2 (±ω1 , ∓ω2 ) = 0.
CM DIFF
4 
(A.10) − gm1 (2D2 (±ω1 , ∓ω2 ) + D2 (±ω1 , ±ω1 )) (B.11)
3
CM
H1,L (ω)
A PPENDIX B = −2gm1 D1 (ω)H2,L
CM
(±ω1 , ∓ω2 )

The source voltage of the right- and left-side transistor = −2gm1 D2 (±ω1 , ∓ω2 ) + 2gm1 (1+ D1 (±ω1 )D1 (∓ω2 ))
pairs in Fig. 4 (M1 and M2 ) as well as the injected currents (B.12)
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ASGHARI AND YAVARI: GATE–BULK INTERACTION AND A FUNDAMENTAL CURRENT INJECTION TO ATTENUATE IM3 AND IM2 CURRENTS 9

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Mohammad Yavari (S’01–M’08) received the
B.Sc., M.Sc., and Ph.D. degrees in electrical engi-
neering from the University of Tehran, Tehran, Iran,
in 1999, 2001, and 2006, respectively.
He spent several research periods with the Institute
of Microelectronics of Seville, Seville, Spain.
He was with Niktek from 2004 to 2005 and 2006
to 2007, as a Principal Design Engineer, where he
was involved in the design of high-resolution A/D
and D/A converters for professional digital audio
applications. He has been an Assistant Professor
with the Department of Electrical Engineering, Amirkabir University of Tech-
nology, Tehran, since 2006, where he founded the Integrated Circuits Design
Laboratory, in 2007. He has authored or co-authored over 100 peer-reviewed
papers in international and national journals, and conference proceedings in
analog integrated circuits. His current research interests include analog and
mixed-signal integrated circuits and signal processing, data converters, and
CMOS RFIC design for wireless communications.
Dr. Yavari was a recipient of the Best Student Research Award from
the University of Tehran in 2004. He has been an Associate Editor of the
International Journal of Circuit Theory and Applications since 2014.

Meysam Asghari was born in Iran in 1989.

He received the A.Sc. degree from the Technical
and Engineering College of Shiraz, Shiraz, Iran,
in 2008, the B.Sc. degree from Shahid Rajaee
Teacher Training University, Tehran, Iran, in 2011,
and the M.Sc. degree from the Amirkabir University
of Technology, Tehran, in 2013, all in electrical
engineering.
His current research interests include CMOS radio
frequency integrated circuit (RFIC) design for wire-
less communications, low-voltage and low-power IC
design for biomedical applications, mixed-signal circuits and systems, and data
converters.