FRAM MCUs For Dummies, Part 2: FRAM

characteristics and advantages

V.C. Kumar, Texas Instruments - August 27, 2012

Editor’s note: Demand for memory is insatiable at all levels of systems design. As
designers look to respond with larger memory stores and more complex memory
architectures, a greater understanding about a broad range of memory types becomes
more critical. This excerpt of Texas Instruments FRAM MCUs For Dummies by V.C.
Kumar offers a detailed look at FRAM technology and its characteristics. In part 1 of
this series, author Kumar reviewed the basics of FRAM technology. In this part 2,
Kumar discusses FRAM's characteristics and advantages.

Excerpted from Texas Instruments FRAM MCUs For Dummies®, © 2012 John Wiley & Sons, Inc.
Available exclusively from Mouser Electronics, Inc. To request your free copy, please visit
www.mouser.com/framfordummies.

Chapter 3. Seeing the Benefits of FRAM

● Understanding what’s behind FRAM adoption

● Looking at FRAM characteristics and advantages
● Getting a robust system with FRAM
● Reaping the benefits of production and reliability testing

Given the key macro technology trends driving innovation in microcontrollers today - ever-present
wireless connectivity, focus on ultra-low power consumption, and security - core technologies need
to keep pace meeting product needs. This chapter shows how FRAM memory technology is helping
to meet those needs.

Defining the Trends Driving FRAM Adoption

A number of trends are driving FRAM adoption - specifically, the demand for more information,
higher performance, and data processing capability at lower energy consumption, coupled with
business needs for faster time to market and lower total cost of ownership. Other important factors
include flexibility and efficiency in embedded product development and management. This
challenging set of requirements is what’s driving the need for new technologies.

In the last five years, step function innovation has taken place in most areas of microcontrollers. This
innovation covers the range from the core to analog peripherals. Conversely, embedded nonvolatile
memories have seen only incremental innovations. As a result, there are several nonvolatile memory
characteristics that can benefit a microcontroller user:

● Faster memory access speeds, especially for write operations. EEPROM (Electrically
Erasable Programmable Read-Only Memory) and flash have slow write operations. Also, flash
requires a complicated erase and program process at a block/segment level that drives the need
for significant overhead, such as redundant memory and a multistep write process.
● Lower power (energy) consumption, especially during write/update processes.
EEPROM/flash require 10 V–14 V (higher in some cases) to write.
● Higher write endurance (number of write cycles), especially in the nonvolatile memory
space. Higher endurance can help both in emerging remote sensor data logging applications as
well as enabling unified memory capability in some applications.
● Higher inherent security. Greater resistance to tampering and unauthorized manipulation.
Several of these needs were not requirements or considerations when the previous generation of
embedded nonvolatile memory technologies (flash, EEPROM) were developed in the 1980s. The
fact that today’s nonvolatile memory technologies do not exhibit these characteristics is not
surprising. To realize the complete vision and benefits of the technology trends, you need a next-
generation, embedded, nonvolatile technology that has the advanced features mentioned earlier.

FRAM Characteristics and Advantages

The use, performance, and capabilities of today’s embedded controllers are limited partly by the
type of embedded, non.volatile memory technology available. It is clear that the low-power market is
ready for a next-generation, more-capable nonvolatile memory technology.

The primary embedded memory technologies used today in microcontrollers are flash and EEPROM.
Note that flash memory is actually a variation of EEPROM that can be erased and reprogrammed in
units of memory called blocks rather than bytes. Like FRAM, both EEPROM and flash are nonvolatile
memory technologies, which means they don’t lose their data contents when power is removed.

FRAM, or Ferroelectric Random Access Memory, is at the forefront of these next-generation memory
technologies for ultra-low power applications; it is also the most proven technology, having been
used for the past several years in many applications from battery-backed SRAM replacement
devices, to automotive applications, to mass transit payment cards as standalone and embedded
memory.

significant progress

As we discuss in Chapter 1, the key performance targets and technology features for the FRAM
technology developed at Texas Instruments (TI) focused on ultra-low power consumption and cost-
efficient implementations. These choices have an impact on the characteristics of the technology
developed, but these characteristics don’t always represent limitations of the technology itself but
rather of the technology TI plans to embed in its products currently.

Note: Unlike the mature flash/EEPROM technologies that have been around since the 1980s,
embedded FRAM technology is in the early adoption phase of the technology life-cycle diagram, as
shown in Figure 3-1.
 Figure 3-1. Early adoption phase of embedded FRAM technology.

Although significant progress has been made in terms of manufacturability, memory density,
reliability, and so on, FRAM technology still offers many opportunities for innovators. Even as Texas
Instruments is continuing its tradition of innovation, we will distinguish between the characteristics
of FRAM technology and the implementation in embedded form with our first-generation embedded
FRAM microcontrollers (see Chapter 4).

To maximize FRAM adoption rate, TI needs to bring value today, addressing current customer
problems and needs while building up confidence in the technology. It is important to note that
while embedded FRAM microcontrollers bring significant differentiated value, they may not be
better in every product/ application, so embedded flash/EEPROM products will continue to be used
for the foreseeable future.

Fast write speeds

One of the limitations of traditional nonvolatile memories is their slow write speeds. A limitation of
flash memory requires a two-step write process in which you first erase the memory sector/block
and then program the new data. In contrast to the complex charge storage and data update
mechanism in EEPROM and flash, FRAM stores information through the use of a spontaneous,
stable, electric dipole found in the ferroelectric crystal. The orientation change of this electric dipole
is extremely fast, so it takes dramatically less time to write to FRAM devices than to those using
EEPROM and flash.

Current TI implementations of standalone FRAM memory can be written to in as little as 55

nanoseconds (ns), compared to flash or EEPROM technologies where typical write times are in the
order of hundreds of micro seconds and milliseconds (ms), making FRAM 1,000 to 10,000 times
faster. With current materials and architecture, TI expects to reach approximately 20 ns cycle times
in the future. FRAM also essentially eliminates the difference between read and write times, opening
the door for a universal memory capability in which the application and software can dynamically
partition the device memory into code space, data space, or RAM. This capability brings incredible
flexibility to software designers, product manufacturers, and so on (see Chapter 4).

Ultra-low write power consumption

EEPROM and flash use a floating gate charge storage architecture that works by moving electrons
onto a polysilicon float.ing gate isolated by an oxide insulator. To reliably write and store the data, a
thick oxide layer of 80 Å to 100 Å thickness is required, necessitating a high voltage of at least 10 V
to 14 V. To create the high voltage on the IC, additional expensive external power supplies or
internal power-hungry and space-hogging circuits are required on board the chip. Add the need to
erase before write/update (with flash), and you have power consumption levels that make it
impractical to store data in many power-constrained applications, even where such real-time data
storage and communication could help in a better, safer, faster operation.

In contrast to flash or EEPROM, TI’s FRAM core boasts very low memory access power
requirements needing just 1.5 V to read or write, compared to the over 10 V–14 V write for flash and
EEPROM. Lower voltage has the added benefit of enabling functional processing to occur in less
time because there is no need to wait for the charge pump to drive voltage up, thus supporting
battery-life savings in battery-operated devices. The secret behind this low-power operation is that a
high electric field is not required to switch the dipoles in FRAM, enabling the use of just 1.5 V to
write and read data.

Random data access capability

Random data access capability

One of the key disadvantages of flash memory is the two-step process of erasing and writing in
blocks. Unconstrained access to individual random addresses is not always possible. FRAM is, as the
name implies, random access memory. The write process is accomplished with a simple, single step.

Some types of flash memory allow the user to change a 1 to a 0 but not a 0 to a 1 without a
complete sector erase and pro.gram. The use of that functionality in practice is limited.

(Practically) unlimited write endurance

The programming process in flash and EEPROM memories in which data is written by putting a
charge onto the floating gate limits the write cycle endurance of these types of memories. FRAM, on
the other hand, can be accessed for more than 1000 trillion write/read cycles, or virtually an
inexhaustible amount of times in most low-power applications.

This longer write endurance supports cost-effective programming of devices, and also enables cost-
and power-effective data logging especially in applications that require a large number of write
cycles in excess of what can be supported by EEPROM and flash memories.

Higher intrinsic security

Traditional floating gate nonvolatile memories are charge based and have several deficiencies from a
security stand.point. These deficiencies include storage of data state (0 or 1) as a charge, the need
for high-voltage circuitry including charge pumps for the write process, long write times, and
inherent differences in power consumption between read and write processes. These deficiencies
are exploitable with today’s technology to access and possibly manipulate sensitive information on
the chip. Hackers today have access to and knowledge of nanoprobes, laser attacks, power analysis
attacks, and so on.

One vulnerability example occurs when the memory is in static mode with no energy coming in or
out of the floating gate. In this state, nanoprobes can be used to scan the memory in the floating
gate, and the electric fields can be measured to deter.mine the stored data. This vulnerability could
potentially reveal sensitive data, encryption keys, or privileges and access rights. Similarly, the
difference in read and write times as well as the difference in power consumption between a read
and a write in flash or EEPROM can be exploited by hackers. Finally, a charge pump on board can
be an important security vulnerability in light flash attacks.

While countermeasures exist that can be included to address all of these threats, these are time-
consuming, add overhead, and are often power hungry and expensive.

FRAM is based on dipole position rather than charge, is low power, has fast access times, and has
similar read and write process speed and power consumption. These characteristics could simplify
the countermeasures needed, making the countermeasures more cost-effective and easier to
implement.

FRAM is based on dipole position

Better radiation resistance

Because traditional floating gate technologies such as flash/ EEPROM have the data state stored as
charge, agitation by alpha or gamma particles can cause bits to flip to an opposite state (this is
called Soft Error Rate or SER).

FRAM devices exhibit a relatively high immunity to radiation effects since information is stored as
polarization and not as an electric charge. Switching the polarization requires local application of an
electric field to the capacitor, so an alpha (or other radiation) hit is very unlikely to cause a change
in the polarization of a given cell. FRAM’s terrestrial SER is below detection limits, which is very
advantageous in medical, security, and space-related applications.

Immunity to magnetic fields

Although “ferro” means iron, FRAM does not contain iron. The term “ferroelectric” refers to
similarity of the graph of charge plotted as a function of voltage to the hysteresis loop (BH curve) of
ferromagnetic materials. FRAM is not susceptible to magnetic fields.

As we discuss in Chapter 2, the state of the FRAM cell is changed by applying an electrical field over
the PZT capacitor. This field needs to be applied locally, directly to the bit line or the plate line.
External electrical fields need to be in the order of 15 kV to cause the same effect and would affect
other parts of the chip as well. In practice though, application of conductors above and below the
cell (metal layers for circuits, pads, and so on) will prevent the external fields from reaching the cell,
so FRAM chips are practically impervious to external electric fields.

Superior scaling with semi-conductor processes

The high-voltage and analog circuitry in flash and EEPROM does not easily scale to smaller IC
manufacturing process technologies (also called “process nodes”). Miniaturization and shrinking
process nodes can take better advantage of faster computing, decreased power consumption,
smaller die sizes, and lower cost structures. This miniaturization has long been the trajectory of all
semiconductor devices. EEPROM and flash memory require specially designed high-voltage
transistors, which are difficult and expensive (and sometimes technically infeasible) to further
reduce in size, putting limitations on their ability to scale quickly to smaller chip manufacturing
process technologies.

TI’s FRAM technology is fully compatible with CMOS processes with a 2-mask adder to the digital
process flow so that FRAM can be quickly migrated to smaller technology nodes. The FRAM bit cell
size also follows Moore’s Law, allowing for future density increases. TI has already successfully
designed arrays up to 32 Mb densities.

Excerpted from Texas Instruments FRAM MCUs For Dummies®, © 2012 John Wiley & Sons, Inc.
Available exclusively from Mouser Electronics, Inc. To request your free copy, please visit
www.mouser.com/framfordummies.