LM337

1.5 A, Adjustable Output,

Negative Voltage Regulator
The LM337 is an adjustable 3−terminal negative voltage regulator
capable of supplying in excess of 1.5 A over an output voltage range of
−1.2 V to − 37 V. This voltage regulator is exceptionally easy to use
and requires only two external resistors to set the output voltage. www.onsemi.com
Further, it employs internal current limiting, thermal shutdown and
safe area compensation, making it essentially blow−out proof.
The LM337 serves a wide variety of applications including local, on THREE−TERMINAL
card regulation. This device can also be used to make a programmable ADJUSTABLE NEGATIVE
output regulator, or by connecting a fixed resistor between the
adjustment and output, the LM337 can be used as a precision current VOLTAGE REGULATOR
regulator.
MARKING
Features
DIAGRAMS
• Output Current in Excess of 1.5 A
• Output Adjustable between −1.2 V and −37 V
• Internal Thermal Overload Protection LM
• Internal Short Circuit Current Limiting Constant with Temperature D2PAK 337yyyy
D2T SUFFIX
• Output Transistor Safe−Area Compensation CASE 936
AWLYWWG

• Floating Operation for High Voltage Applications

• Eliminates Stocking many Fixed Voltages
• Available in Surface Mount D2PAK and Standard 3−Lead Transistor Heatsink surface (shown as terminal 4 in
Package case outline drawing) is connected to Pin 2.
• These Devices are Pb−Free and are RoHS Compliant Pin 1. Adjust
2. Vin
3. Vout
IPROG

+ R2 +
Cin* CO**
1.0 mF R1 1.0 mF TO−220AB
120 T SUFFIX
CASE 221AB
IAdj LM
Heatsink surface 337xx
connected to Pin 2. AWLYWWG
Vin Vout
-Vin LM337 -Vout 1

*Cin is required if regulator is located more than 4 inches from power supply filter. xx = BT, T
*A 1.0 mF solid tantalum or 10 mF aluminum electrolytic is recommended. yyyy = BD2T, D2T
A = Assembly Location
**CO is necessary for stability. A 1.0 mF solid tantalum or 10 mF aluminum electrolytic
**is recommended. WL = Wafer Lot
Y = Year
ǒ R
V out + –1.25V 1 ) 2
R1
Ǔ WW
G
= Work Week
= Pb−Free Package

Figure 1. Standard Application

ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.

© Semiconductor Components Industries, LLC, 2015 1 Publication Order Number:

January, 2015 − Rev. 10 LM337/D
 LM337

MAXIMUM RATINGS (TA = +25°C, unless otherwise noted)

Rating Symbol Value Unit
Input−Output Voltage Differential VI−VO 40 Vdc
Power Dissipation
Case 221A
TA = +25°C PD Internally Limited W
Thermal Resistance, Junction−to−Ambient qJA 65 °C/W
Thermal Resistance, Junction−to−Case qJC 5.0 °C/W
Case 936 (D2PAK)
TA = +25°C PD Internally Limited W
Thermal Resistance, Junction−to−Ambient qJA 70 °C/W
Thermal Resistance, Junction−to−Case qJC 5.0 °C/W
Operating Junction Temperature Range TJ −40 to +125 °C
Storage Temperature Range Tstg −65 to +150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.

ELECTRICAL CHARACTERISTICS (|VI−VO| = 5.0 V; IO = 0.5 A for T package; TJ = Tlow to Thigh [Note 1]; Imax and Pmax [Note 2].)
Characteristics Figure Symbol Min Typ Max Unit
Line Regulation (Note 3), TA = +25°C, 3.0 V ≤ |VI−VO| ≤ 40 V 1 Regline − 0.01 0.04 %/V
Load Regulation (Note 3), TA = +25°C, 10 mA ≤ IO ≤ Imax 2 Regload
|VO| ≤ 5.0 V − 15 50 mV
|VO| ≥ 5.0 V − 0.3 1.0 % VO
Thermal Regulation, TA = +25°C (Note 5), 10 ms Pulse Regtherm − 0.003 0.04 % VO/W
Adjustment Pin Current 3 IAdj − 65 100 mA
Adjustment Pin Current Change, 2.5 V ≤ |VI−VO| ≤ 40 V, 1, 2 DIAdj − 2.0 5.0 mA
10 mA ≤ IL ≤ Imax, PD ≤ Pmax, TA = +25°C
Reference Voltage, TA = +25°C, 3.0 V ≤ |VI−VO| ≤ 40 V, 3 Vref −1.213 −1.250 −1.287 V
10 mA ≤ IO ≤ Imax, PD ≤ Pmax, TJ = Tlow to Thigh −1.20 −1.25 −1.30
Line Regulation (Note 3), 3.0 V ≤ |VI−VO| ≤ 40 V 1 Regline − 0.02 0.07 %/V
Load Regulation (Note 3), 10 mA ≤ IO ≤ Imax 2 Regload
|VO| ≤ 5.0 V − 20 70 mV
|VO| ≥ 5.0 V − 0.3 1.5 % VO
Temperature Stability (Tlow ≤ TJ ≤ Thigh) 3 TS − 0.6 − % VO
Minimum Load Current to Maintain Regulation 3 ILmin mA
(|VI−VO| ≤ 10 V) − 1.5 6.0
(|VI−VO| ≤ 40 V) − 2.5 10
Maximum Output Current 3 Imax A
|VI−VO| ≤ 15 V, PD ≤ Pmax, T Package − 1.5 2.2
|VI−VO| ≤ 40 V, PD ≤ Pmax, TJ = +25°C, T Package − 0.15 0.4
RMS Noise, % of VO, TA = +25°C, 10 Hz ≤ f ≤ 10 kHz N − 0.003 − % VO
Ripple Rejection, VO = −10 V, f = 120 Hz (Note 4) 4 RR dB
Without CAdj − 60 −
CAdj = 10 mF 66 77 −
Long−Term Stability, TJ = Thigh (Note 6), TA = +25°C for 3 S − 0.3 1.0 %/1.0 k
Endpoint Measurements Hrs.
Thermal Resistance, Junction−to−Case, T Package RqJC − 4.0 − °C/W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Tlow to Thigh = 0° to +125°C, for LM337T, D2T. Tlow to Thigh = − 40° to +125°C, for LM337BT, BD2T.
2. Imax = 1.5 A, Pmax = 20 W
3. Load and line regulation are specified at constant junction temperature. Change in VO because of heating effects is covered under the
Thermal Regulation specification. Pulse testing with a low duty cycle is used.
4. CAdj, when used, is connected between the adjustment pin and ground.
5. Power dissipation within an IC voltage regulator produces a temperature gradient on the die, affecting individual IC components on the die.
These effects can be minimized by proper integrated circuit design and layout techniques. Thermal Regulation is the effect of these
temperature gradients on the output voltage and is expressed in percentage of output change per watt of power change in a specified time.
6. Since Long Term Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average
stability from lot to lot.

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2
 LM337

Representative Schematic Diagram

Adjust
100 60
2.0k
2.5k

810
21k

Vout
10k 800

15pF 25pF
5.0k 220

75 60k 100k 800 15pF 2.0k

0

18k

4.0k

6.0k
100
1.0k

3.0k 2.2k 18k

9.6k 30k
270 2.0
100pF 5.0pF 240 pF 250
20k
8.0k 5.0k
0.2
600 100k
15
2.9k
4.0k 155
500 2.4k 15 500 0.05
Vin

This device contains 39 active transistors.

R2 1%

+
Cin 1.0 mF IAdj CO 1.0 mF

120
R1 1%
*Pulse testing required. Adjust RL
1% Duty Cycle
is suggested. Vin Vout
LM337
VIH VOH
VIL VOL
*
|V –V |
OL OH
VEE LineRegulation(%ńV) + x100
|V |
OH

Figure 1. Line Regulation and DIAdj/Line Test Circuit

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3
 LM337

*Pulse testing required.

R2 1% 1% Duty Cycle is suggested.
CO +
Cin 1.0 mF 1.0 mF
IAdj R1 120

Adjust * RL
(max
Vin Vout Load) -VO (min Load)
-VI LM337 IL -VO (max Load)

VO (min Load) - VO (max Load)

Load Regulation (mV) = VO (min Load) - VO (max Load) Load Regulation (% VO) = x 100
VO (min Load)

Figure 2. Load Regulation and DIAdj/Load Test Circuit

R2 1%

+
Cin 1.0 mF CO 1.0 mF
VI VO
RL

IAdj Vref

R1 120
Adjust
Vin Vout
LM337 IL

VO
To Calculate R2: R2 = -1 R1
Vref * Pulse testing required.
This assumes IAdj is negligible. * 1% Duty Cycle is suggested.

Figure 3. Standard Test Circuit

+
R2 1% CAdj 10mF
+
Cin 1.0 mF CO 1.0 mF VO
RL
Adjust D1* 1N4002
R1 120
Vin Vout
LM337
Vout = -1.25 V
14.3 V

4.3 V * D1 Discharges CAdj if output is shorted to Ground.

f = 120 Hz

Figure 4. Ripple Rejection Test Circuit

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4
 LM337

0.2 4.0
ΔV out , OUTPUT VOLTAGE CHANGE (%)
0
IL = 0.5 A

I out , OUTPUT CURRENT (A)

-0.2 3.0

-0.4

-0.6 2.0

-0.8 TJ = 25°C
Vin = -15 V IL = 1.5 A
-1.0 Vout = -10 V 1.0

-1.2

-1.4 0
-50 -25 0 25 50 75 100 125 150 0 10 20 30 40
TJ, JUNCTION TEMPERATURE (°C) Vin-Vout , INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc)

Figure 5. Load Regulation Figure 6. Current Limit

80 3.0

V in - Vout , INPUT-OUTPUT VOLTAGE

IAdj, ADJUSTMENT CURRENT (μA)

75 Vout = -5.0 V
DVO = 100 mV
70 2.5
DIFFERENTIAL (Vdc) IL = 1.5 A
65

60 2.0
1.0 A
55
50 1.5 500 mA

45 200 mA
20 mA
40 1.0
-50 -25 0 25 50 75 100 125 150 -50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C)

Figure 7. Adjustment Pin Current Figure 8. Dropout Voltage

1.27
1.8
I B , QUIESCENT CURRENT (mA)
V ref , REFERENCE VOLTAGE (V)

1.6
1.26
1.4
1.2
1.25 1.0 TJ = 25°C
0.8
0.6
1.24
0.4
0.2
1.23 0
-50 -25 0 25 50 75 100 125 150 0 10 20 30 40
TJ, JUNCTION TEMPERATURE (°C) Vin-Vout , INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc)

Figure 9. Temperature Stability Figure 10. Minimum Operating Current

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 LM337

100 100

RR, RIPPLE REJECTION (dB) CAdj = 10 mF CAdj = 10 mF

RR, RIPPLE REJECTION (dB)

80 80

Without CAdj
60 60
Without CAdj

40 40
Vin - Vout = 5.0 V Vin = -15 V
IL = 500 mA Vout = -10 V
20 20 f = 120 Hz
f = 120 Hz
TJ = 25°C TJ = 25°C
0 0
0 -5.0 -10 -15 -20 -25 -30 -35 -40 0.01 0.1 1.0 10
Vout, OUTPUT VOLTAGE (V) IO, OUTPUT CURRENT (A)

Figure 11. Ripple Rejection versus Output Voltage Figure 12. Ripple Rejection versus Output Current

100 101
Vin = -15 V Vin = -15 V
RR, RIPPLE REJECTION (dB)

Z O , OUTPUT IMPEDANCE ()

Vout = -10 V
Ω
80 Vout = -10 V
IL = 500 mA 100 IL = 500 mA
CAdj =10 mF TJ = 25°C CL = 1.0 mF
60 TJ = 25°C

10-1
Without CAdj
40 Without CAdj

10-2 CAdj = 10 mF
20

0 10-3
10 100 1.0 k 10 k 100 k 1.0 M 10 M 10 100 1.0 k 10 k 100 k 1.0 M
f, FREQUENCY (Hz) f, FREQUENCY (Hz)

Figure 13. Ripple Rejection versus Frequency Figure 14. Output Impedance
VOLTAGE CHANGE (V) VOLTAGE DEVIATION (V)

VOLTAGE DEVIATION (V)

0.6
ΔV out , OUTPUT
ΔV out , OUTPUT

0.8 0.4
0.6 0.2 Without CAdj

0.4 0
0.2 Without CAdj -0.2 CAdj = 10 mF
0 -0.4
-0.2 CAdj = 10 mF -0.6
-0.4 0 Vin = -15 V
CURRENT (A)
ΔV in, INPUT

Vout = -10 V Vout = -10 V

I L , LOAD

0 IL = 50 mA -0.5 IL = 50 mA
TJ = 25°C TJ = 25°C
-0.5 -1.0 CL = 1.0 mF
CL = 1.0 mF
-1.0 -1.5
0 10 20 30 40 0 10 20 30 40
t, TIME (ms) t, TIME (ms)

Figure 15. Line Transient Response Figure 16. Load Transient Response

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 LM337

APPLICATIONS INFORMATION
Basic Circuit Operation
The LM337 is a 3−terminal floating regulator. In External Capacitors
operation, the LM337 develops and maintains a nominal A 1.0 mF tantalum input bypass capacitor (Cin) is
−1.25 V reference (Vref) between its output and adjustment recommended to reduce the sensitivity to input line
terminals. This reference voltage is converted to a impedance.
programming current (IPROG) by R1 (see Figure 17), and this The adjustment terminal may be bypassed to ground to
constant current flows through R2 from ground. improve ripple rejection. This capacitor (CAdj) prevents
The regulated output voltage is given by: ripple from being amplified as the output voltage is

ǒ
R
Ǔ
V out + V  1 ) 2  ) I R 2
ref R1 Adj
increased. A 10 mF capacitor should improve ripple
rejection about 15 dB at 120 Hz in a 10 V application.
An output capacitance (CO) in the form of a 1.0 mF
Since the current into the adjustment terminal (IAdj) tantalum or 10 mF aluminum electrolytic capacitor is
represents an error term in the equation, the LM337 was required for stability. Using the classical tantalum or
designed to control IAdj to less than 100 mA and keep it aluminum electrolytic capacitor types with non−reduced
constant. To do this, all quiescent operating current is ESR (Equivalent Series Resistance) value is necessary.
returned to the output terminal. This imposes the Low−ESR or similar capacitor types with reduced ESR
requirement for a minimum load current. If the load current value and ceramic capacitors can cause instability or
is less than this minimum, the output voltage will rise. continuous oscillations in the application.
Since the LM337 is a floating regulator, it is only the Protection Diodes
voltage differential across the circuit which is important to When external capacitors are used with any IC regulator
performance, and operation at high voltages with respect to it is sometimes necessary to add protection diodes to prevent
ground is possible. the capacitors from discharging through low current points
+ Vout into the regulator.
Figure 18 shows the LM337 with the recommended
R2
IPROG protection diodes for output voltages in excess of −25 V or
IAdj high capacitance values (CO > 25 mF, CAdj > 10 mF). Diode
+
CO D1 prevents CO from discharging thru the IC during an input
R1
short circuit. Diode D2 protects against capacitor CAdj
Adjust Vref discharging through the IC during an output short circuit.
The combination of diodes D1 and D2 prevents CAdj from
Vin LM337 - Vout
Vout the discharging through the IC during an input short circuit.
+ Vout
Vref = -1.25 V Typical +
R2 CAdj
Figure 17. Basic Circuit Configuration
+ +
Load Regulation Cin CO
Adjust R1 D2
The LM337 is capable of providing extremely good load
1N4002
regulation, but a few precautions are needed to obtain -Vin LM337 - Vout
maximum performance. For best performance, the Vin Vout
programming resistor (R1) should be connected as close to
the regulator as possible to minimize line drops which D1
effectively appear in series with the reference, thereby 1N4002
degrading regulation. The ground end of R2 can be returned Figure 18. Voltage Regulator with Protection Diodes
near the load ground to provide remote ground sensing and
improve load regulation.

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 LM337

80 3.5

PD, MAXIMUM POWER DISSIPATION (W)

PD(max) for TA = +50°C

R θ JA, THERMAL RESISTANCE

70 Free Air 3.0

JUNCTION‐TO‐AIR (°C/W)
Mounted

ÎÎÎÎ
Vertically 2.0 oz. Copper
60 2.5

ÎÎÎÎ
L

ÎÎÎÎ
50 Minimum 2.0
Size Pad L

40
RqJA
ÎÎÎÎ 1.5

30 1.0
0 5.0 10 15 20 25 30
L, LENGTH OF COPPER (mm)
Figure 19. D2PAK Thermal Resistance and Maximum
Power Dissipation versus P.C.B. Copper Length

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8
 LM337

ORDERING INFORMATION
Device Operating Temperature Range Package Shipping†
LM337BD2TG D2PAK
50 Units / Rail
(Pb−Free)

LM337BD2TR4G D2PAK
TJ = − 40° to +125°C 800 / Tape & Reel
(Pb−Free)

LM337BTG TO−220AB
(Pb−Free)
50 Units / Rail
LM337D2TG D2PAK
(Pb−Free)

LM337D2TR4G D2PAK
TJ = 0° to +125°C 800 / Tape & Reel
(Pb−Free)

LM337TG TO−220AB
50 Units / Rail
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.

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9
 LM337

PACKAGE DIMENSIONS

D2PAK
CASE 936−03
ISSUE D
NOTES:
T T 1. DIMENSIONING AND TOLERANCING PER ANSI
TERMINAL 4 Y14.5M, 1982.
C C 2. CONTROLLING DIMENSION: INCHES.
K A U 3. TAB CONTOUR OPTIONAL WITHIN
OPTIONAL ED OPTIONAL ES DIMENSIONS A AND K.
CHAMFER CHAMFER
4. DIMENSIONS U AND V ESTABLISH A MINIMUM
S MOUNTING SURFACE FOR TERMINAL 4.
V 5. DIMENSIONS A AND B DO NOT INCLUDE
B DETAIL C DETAIL C
MOLD FLASH OR GATE PROTRUSIONS. MOLD
H FLASH AND GATE PROTRUSIONS NOT TO
1 2 3 EXCEED 0.025 (0.635) MAXIMUM.
6. SINGLE GAUGE DESIGN WILL BE SHIPPED
AFTER FPCN EXPIRATION IN OCTOBER 2011.
J INCHES MILLIMETERS
F SIDE VIEW BOTTOM VIEW SIDE VIEW DIM MIN MAX MIN MAX
DUAL GAUGE SINGLE GAUGE A 0.386 0.403 9.804 10.236
G CONSTRUCTION CONSTRUCTION B 0.356 0.368 9.042 9.347
2X D C 0.170 0.180 4.318 4.572

TOP VIEW 0.010 (0.254) M T D 0.026 0.036 0.660 0.914

ED 0.045 0.055 1.143 1.397
ES 0.018 0.026 0.457 0.660
F 0.051 REF 1.295 REF
G 0.100 BSC 2.540 BSC
H 0.539 0.579 13.691 14.707
J 0.125 MAX 3.175 MAX
N T
M K 0.050 REF 1.270 REF
L 0.000 0.010 0.000 0.254
M 0.088 0.102 2.235 2.591
SEATING N 0.018 0.026 0.457 0.660
L PLANE
P P 0.058 0.078 1.473 1.981
R 5 _ REF 5 _ REF
R DETAIL C BOTTOM VIEW S 0.116 REF 2.946 REF
OPTIONAL CONSTRUCTIONS U 0.200 MIN 5.080 MIN
V 0.250 MIN 6.350 MIN

SOLDERING FOOTPRINT*

10.49

8.38

16.155

2X
3.504
2X
1.016
5.080
PITCH
DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

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10
 LM337

PACKAGE DIMENSIONS

TO−220, SINGLE GAUGE

CASE 221AB
ISSUE A
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
SEATING 2. CONTROLLING DIMENSION: INCHES.
−T− PLANE 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND
LEAD IRREGULARITIES ARE ALLOWED.
B F C 4. PRODUCT SHIPPED PRIOR TO 2008 HAD DIMENSIONS
T S S = 0.045 - 0.055 INCHES (1.143 - 1.397 MM)

4 INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.570 0.620 14.48 15.75
Q A B 0.380 0.405 9.66 10.28
C 0.160 0.190 4.07 4.82
1 2 3 U D 0.025 0.035 0.64 0.88
H F 0.142 0.147 3.61 3.73
G 0.095 0.105 2.42 2.66
K H 0.110 0.155 2.80 3.93
Z J 0.018 0.025 0.46 0.64
K 0.500 0.562 12.70 14.27
L 0.045 0.060 1.15 1.52
N 0.190 0.210 4.83 5.33
L R Q 0.100 0.120 2.54 3.04
R 0.080 0.110 2.04 2.79
V J S 0.020 0.024 0.508 0.61
T 0.235 0.255 5.97 6.47
G U 0.000 0.050 0.00 1.27
D V 0.045 --- 1.15 ---
Z --- 0.080 --- 2.04
N

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SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
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or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
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and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
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