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A B C D E

COMPAL CONFIDENTIAL
MODEL NAME : NAL20
1 1

PCB NO : LA-5571P ( DA80000FP00)


BOM P/N : 43176531LXX

M10 Margaux UMA


rPGA Auburndale +
2
FCBGA PCH IBEXPEAK-M 2

2010-01-21
REV : 1.0(A00)
@ : Nopop Component
3 3
TCM TPM
MB Type BOM P/N BOM CONFIG
W(3@) W/O(4@) W(5@) W/O(6@)
TPM EN,TCM DIS 43176531L01 * * 4@,5@
ALL TPM DISABLE 43176531L02 * * 4@,6@
TCM EN,TPM DIS 43176531L03 * * 3@,6@

4 4

MB PCB
Part Number Description
DELL CONFIDENTIAL/PROPRIETARY
DA80000FP00 PCB 0AF LA-5571P REV0 M/B UMA
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Cover Sheet
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 1 of 60
A B C D E
A B C D E

Block Diagram Thermal CPU/PCH XDP Port Clock Generator


GUARDIAN III SLG8SP585
Compal confidential +1.05V_VCCP
page 8,15
EMC4002 +3.3V_RUN page6
Model: NAL20 Auburndale +3.3V_M page 23
eDP CONN DP Repeater eDP
+5V_ALW +PWR_SRC DP119 4MB (Socket G1) FAN
+3.3V_RUN
+3.3V_RUN page 24 PGA CPU R3P TPF3000
1
page 24 +VCC_CORE +FAN1_VOUT 1
page 23
+1.5V_MEM 988A pins
CRT CONN Memory BUS DDRIII-DIMM X2
Video Switch +1.05V_RUN_VTT
+5V_RUN page 27
+VCC_GFXCORE
(DDR3) +1.5V_MEM 800Mhz/1066MHz BANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8
PI3V712-AZLE page 7-12 page 13,14
VGA +3.3V_RUN +1.5V_MEM
page 27
FDI DMI +V_DDR_REF
Lane x 8 Lane x 4 USB[11]
VGA Camera Trough eDP Cable
+5V_RUN page 24
DPD INTEL
DP Repeater DPC SATA Repeater
PS8121
+3.3V_RUN DPB IBEXPEAK-M SN75LVCP412
SATA4
page 26 +3.3V_RUN E-SATA
page 37
1060pin BGA
USB[2,3] L SIDE USB2 : Left side pair top
+1.8V_RUN USB Ports X2
DP CONN +1.05V_RUN_VTT
+5V_ALW page 37 USB3 Rear Right pair bottom
+5V_RUN
page 26 On IO/B +1.05V_M page 15-22
2
48MHz USB0 : Right side pair top 2
+3.3V_ALW_ICH USB[0,10] R SIDE
DOCKING PCMCIA IEEE1394 USB Ports X2 USB1 : Right side pair bottom
+5V_ALW page 37
PORT SLOT page 33 On IO/B
page 368 +3.3V_RUN page 34
+1.05V_RUN_VTT /100MHz
DAI
SD/MMC CardBus PCIE
PCIE3
USB[8,9] CONN R5U242 HD Audio I/F
SATA5 +3.3V_RUN page 33
+3.3V_RUN page 33-34
DOCK LPC BUS

+1.05V_RUN_VTT /100MHz PCI Express BUS S-ATA 0/1/4/5 3GB/s Intel Hanksville
Option SPI 82577LM
PCIE5 PCIE2 PCIE1 +3.3V_LAN
SATA1 SATA0
EXPRESS SATA/PCIE Mini Card2 Mini Card 1 China TPM1.2 SATA Repeater +1.0V_LAN page 30
Card MUX PI2DBS212 WLAN WWAN SSX35BCB W25Q64VSSIG E-Module SN75LVCP412
+3.3V_RUN +3.3V_WLAN +3.3V_RUN_WWAN_PWR page 32 +3.3V_M page 15 +3.3V_RUN
+1.5V_RUN +5V_MOD page 28 LAN SWITCH
page 35 +1.5V_RUNpage 36 page 36 LPC BUS 64M 4K sector page 28
+3V_RUN
INT.Speaker PI3L720
3 Mini Card 3 USH TPM1.2
33MHz Azalia Codec +3.3V_LAN pg 30 3

USB[7] USB[4] USB[5] page 29


PCIE\BKT W25X64VSSIG 92HD81B1
+3.3V_RUN +3.3V_RUN
+1.5V_RUN
TDA8034HN BCM5882 +3.3V_M page 15
page 36 Smartpage
Card32 +5V_RUN
+3.3V_RUN
+2.5V_RUN 32M 4K sector S-HDD +5V_RUN page 29
+3.3V_RUN page 32 +1.2V_RUN page 31,32 +5V_HDD HeadPhone & RJ45
USB[13] +3.3V_HDD
page 28
MIC Jack
SATA Repeater RFID USB[1] SMSC KBC +3.3V_RUN
page 33
SN75LVCP412 USBH WiFi ON/OFF
+3.3V_RUN MEC5045 DOCK LPC BUS
page 35
SMBUS On IO/B
SATA2 +RTC_CELL
+3.3V_ALW page 40 BC BUS SMSC SIO MDC TI
Trough Cable TLV320AIC3004 DOCK
+VCC_GFXCORE BC BUS ECE5028 +3V_SUS +3.3V_RUN page 29
page 34
page 53 page 40 +3.3V_ALW page 39 On IO/B
ECE1077
Biometric Touch Pad Stick +3.3V_ALW Dig. MIC
+3.3V_RUN page 36
0.75V RJ11
page 49
4 Trough LVDS Cable 4
Int.KBD & Trough Cable
VCORE (IMVP-6) 3V/5V PWR SELECT Stick
1.1V DELL CONFIDENTIAL/PROPRIETARY
page 51 page 47 page 54 page 50
Compal Electronics, Inc.
Title

CHARGER 1.5V DC IN & BATT IN Power On/Off DC/DC Interface Block Diagram
page 52 page 48 page 46
SW & LED page 42 page 41
Size Document Number Rev
0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 2 of 60
A B C D E
5 4 3 2 1

POWER STATES USB PORT# DESTINATION


Signal SLP SLP SLP S4 SLP ALWAYS M SUS RUN CLOCKS
State S3# S4# S5# STATE# M# PLANE PLANE PLANE PLANE 0 JUSB1 (Ext Right Side Bottom)

D
S0 (Full ON) / M0 HIGH HIGH HIGH HIGH HIGH ON ON ON ON ON 1 JUSB1 (Ext Right Side Top) D

S3 (Suspend to RAM) / M1 LOW HIGH HIGH HIGH HIGH ON ON ON OFF OFF 2 JESA1 (Ext Left Side Top)

S4 (Suspend to DISK) / M1 LOW LOW HIGH LOW HIGH ON ON OFF OFF OFF 3 JESA1 (Ext Left Side Bottom)

S5 (SOFT OFF) / M1 LOW LOW LOW LOW HIGH ON ON OFF OFF OFF 4 WLAN
PCH
S3 (Suspend to RAM) / M-OFF LOW HIGH HIGH HIGH LOW ON OFF ON OFF OFF 5 WWAN

S4 (Suspend to DISK) / M-OFF LOW LOW HIGH LOW LOW ON OFF OFF OFF OFF 6 Bluetooth

S5 (SOFT OFF) / M-OFF LOW LOW LOW LOW LOW ON OFF OFF OFF OFF 7 USH->BIO

8 DOCKING

C
PM TABLE 9 DOCKING C

+15V_ALW +3.3V_SUS +5V_RUN +3.3V_M +3.3V_M


10 Express card
+5V_ALW +1.5V_MEM +3.3V_RUN +1.05V_M +1.05V_M
+3.3V_ALW_PCH +1.8V_RUN (M-OFF)
power 11 Camera
plane +3.3V_RTC_LDO +1.5V_RUN
+0.75V_DDR_VTT
12 NA
+VCC_CORE
+1.05V_RUN_VTT
13 WPAN/NVMHCI
+1.05V_RUN
State

S0 ON ON ON ON
ON PCI EXPRESS DESTINATION
S3 ON ON OFF ON OFF Lane 1 MINI CARD-1 WWAN
S5 S4/AC ON OFF OFF ON OFF
B Lane 2 MINI CARD-2 WLAN B

S5 S4/AC don't exist OFF OFF OFF OFF OFF


Lane 3 Card Bus

Lane 4 EXPRESS CARD

Lane 5 MINI CARD-3 PCIE/BKT

Lane 6 10/100/1G LAN

Lane 7 None

Lane 8 None

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Index and Config.
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 3 of 60
5 4 3 2 1
5 4 3 2 1

MODC_EN
HDDC_EN
EN_INVPWR FDC654P
+BL_PWR_SRC
Q17
TPS51316
(PU3)
ADAPTER

DDR_ON
D
GFX_VR_ON SI3456BDV SI3456BDV D
ISL62881
+VCC_GFXCORE (Q32) (Q29)
(PU15)

+1.5V_MEM
+PWR_SRC
BATTERY +5V_HDD +5V_MOD
TPS51100

RUN_ON
(PU7)

0.75V_DDR_VTT_ON
ALWON

NTMS4107
(Q151)
SN060898
CHARGER +0.75V_DDR_VTT
(PU2)
+1.5V_RUN
C +15V_ALW C

+5V_ALW RUN_ON

+3.3V_ALW

AUX_EN_WOWL
STS11NF30L
(Q55)

AUX_ON
PCH_ALW

SUS_ON

RUN_ON

M_ON
+5V_RUN
ISL8014 MAX17007 ISL8014
ISL62883
(PU6) (PU10) (PU9) SI3456BDV SI3456BDV STS11NF30L SI3456 NTMS4107 SI3456BDV
(PU11)
(Q47) (Q54) (Q60) (Q2) (Q61) (Q66)
H_VTTPWRGD

SIO_SLP_M#
IMVP_VR_ON

RUN_ON

Pop option
B B

+3.3V_WLAN +3.3V_ALW_PCH +3.3V_SUS +3.3V_LAN +3.3V_RUN +3.3V_M

+1.8V_RUN +1.05V_RUN_VTT +1.05V_M

REGCTL_PNP10
+VCC_CORE

Pop option
RUN_ON

+3.3V_M
DCP69
STS11NF30L (Q45)
(Q183)
Pop option

+1.05V_M
A A

Pop option
+1.0V_LAN
+1.05V_RUN DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Power Rail
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 4 of 60
5 4 3 2 1
5 4 3 2 1

2.2K

2.2K
+3.3V_ALW_PCH
H14 MEM_SMBCLK 202

C8 MEM_SMBDATA 200 DIMMA SMBUS Address [TBD]

2.2K
202
PCH
+3.3V_ALW_PCH 200 DIMMB
D
2.2K SMBUS Address [TBD] D

C6 LAN_SMBCLK 28

G8 LAN_SMBDATA 31 LOM SMBUS Address [C8]


G12 E10 53
XDP1 SMBUS Address [TBD]
51
SML1_SMBDATA 2.2K
+3.3V_ALW_PCH 2.2K
SML1_SMBCLK 2.2K
53
XDP2 2.2K
A5 B6 2.2K +3.3V_ALW 51 SMBUS Address [TBD]

3A 3A B4 127 2.2K
+3.3V_RUN
1A DOCK_SMB_CLK
129 DOCKING 2N7002
A3 DOCK_SMB_DAT 14
1A G Sensor
2.2K SMBUS Address [TBD] 2N7002 13 SMBUS Address [TBD]

2.2K +3.3V_ALW

B5 LCD_SMBCLK 21
1B LCD
C A4 20 C
LCD_SMDATA SMBUS Address [TBD]
1B (JeDP1)
2.2K

+3.3V_ALW
2.2K
100 ohm 7
1C A56 PBAT_SMBCLK
6 BATTERY SMBUS Address [TBD]
1C B59 PBAT_SMBDAT 100 ohm
KBC 2.2K
CONN

+3.3V_ALW 2.2K
2.2K
+3.3V_SUS
1E A50 USH_SMBCLK 27 2.2K
1E B53 USH_SMBDAT 29 USH SMBUS Address [TBD] EXP_SMBCLK 10
EXP_SMBDATA 11 Express card SMBUS Address [TBD]
2.2K

+3.3V_ALW
B
2.2K B

2B A49 CARD_SMBCLK
2B B52 CARD_SMBDAT

MEC 5035 2.2K


+3.3V_ALW
2.2K
B50 CHARGER_SMBCLK 10
1G
A47 CHARGER_SMBDAT 9 Charger
1G SMBUS Address [TBD]

2.2K
+3.3V_RUN 0 ohm 0 ohm
2.2K
B7 CKG_SMBDAT 32
2D
31 CLK GEN SMBUS Address [TBD]
A7 CKG_SMBCLK
2D
2.2K 2.2K
+3.3V_ALW +3.3V_RUN
A 2.2K 2.2K A
B49 DAI_SMBCLK_Q
2A 2N7002 8
B48
DAI_SMBDAT_Q 9
A/D,D/A SMBUS Address [TBD]
2A 2N7002 converter

Compal Electronics, Inc.


Title
DAI_GPU_R3P_SMBCLK 18
2N7002 SMBUS TOPOLOGY
DAI_GPU_R3P_SMBDAT 19 R3P SMBUS Address [TBD] Size Document Number Rev
2N7002 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 5 of 60
5 4 3 2 1
5 4 3 2 1

+CLK_VDD_IO CAN BE RANGE FROM 1.05V TO 3V +3.3V_RUN

+3.3V_RUN +CK_VDD_MAIN +CLK_VDD_IO


H_STP_CPU# 1 2
D L89 D
R92 10K_0402_5%~D
1 2 +1.05V_RUN 1 2
BLM18AG601SN1D_0603~D L2

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
1 1 1 1 1 1 BLM18AG601SN1D_0603~D CLKREF
1 1 1

C2

C3

C4

C5

C6

C7
1

C8

C10

C9
2 2 2 2 2 2 @C1707
@ C1707
2 2 2 10P_0402_50V8J~D
2

EMI

+CK_VDD_MAIN

+CLK_VDD_IO
U1

1 VDD_DOT CPU_0 23
5 VDD_27
CPU_0# 22
C C
15 VDDSRC_IO
18 VDDCPU_IO
20 BUF_BCLK 1 2 CLK_BUF_BCLK
CPU_1 CLK_BUF_BCLK 16
17 R11 0_0402_5%~D
VDDSRC_3.3 BUF_BCLK# CLK_BUF_BCLK#
24 VDDCPU_3.3 CPU_1# 19 1 2 CLK_BUF_BCLK# 16
29 R13 0_0402_5%~D
VDDREF_3.3
10 BUF_CKSSCD 1 2 CLK_BUF_CKSSCD CLK_BUF_CKSSCD 16
SRC_1/SATA R1181 0_0402_5%~D
11 BUF_CKSSCD# 1 2 CLK_BUF_CKSSCD# CLK_BUF_CKSSCD# 16
SRC_1/SATA# R1180 0_0402_5%~D

CKG_FFS_SMBDAT 31 13 BUF_EXP 1 2 CLK_BUF_EXP CLK_BUF_EXP 16


40 CKG_FFS_SMBDAT SDA SRC_2 R49 0_0402_5%~D
CKG_FFS_SMBCLK 32 14 BUF_EXP# 1 2 CLK_BUF_EXP# CLK_BUF_EXP# 16
40 CKG_FFS_SMBCLK SCL SRC_2# R52 0_0402_5%~D

3 DOT96 1 2 CLK_BUF_DOT96
DOT_96 CLK_BUF_DOT96 16
H_STP_CPU# 16 R37 0_0402_5%~D
CPU_STOP# DOT96# CLK_BUF_DOT96#
4 1 2 CLK_BUF_DOT96# 16
DOT_96# R38 0_0402_5%~D
+3.3V_RUN
CLK_PWRGD 25
X1 CKPWRGD/PD#
6
27MHz

1
2 1 14.318MHZ_16PF_7A14300083~D
C16 7 R132
27MHz_SS
1

27P_0402_50V8J~D 1K_0402_5%~D

C17 CLK_XTAL_IN 28

2
27P_0402_50V8J~D XTAL_IN R369
2

2 1 R17 1 2 0_0402_5%~D CLK_XTAL_OUT 27 100_0402_5%~D


XTAL_OUT CLK_PWRGD
1 2
B B
2
VSS_DOT
8
VSS_27

1
D
9
CLK_PCH_14M R33 CLKREF VSS_SATA Q136
16 CLK_PCH_14M 1 2 30 12 50,53 CLK_EN# 2
33_0402_5%~D REF_0/CPU_SEL VSS_SRC G SSM3K7002FU_SC70-3~D
21
VSS_CPU
26 S

3
VSS_REF
33
EP

SLG8SP585VTR_QFN32_5X5~D

+3.3V_RUN
+1.05V_RUN

1
1

@ U23
@ R41 @ C1392 NC7SZ04P5X_NL_SC70-5~D
4.7K_0402_5%~D 0.1U_0402_16V4Z~D

1
2 @ R372
REF_O/CPU_SEL 0_0402_5%~D

NC
2

2 4 1 2
CLKREF A Y
PIN 30 CPU0 CPU1

G
1(0.7~1.5v) 100MHz 100MHz

3
1

R23 0 (DEFULT) 133MHz 133MHz


10K_0402_5%~D
2

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Clock Generator
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 6 of 60
5 4 3 2 1
5 4 3 2 1

JCPUI

JCPUA K27
PEG_IRCOMP_R R1084 VSS161
PEG_ICOMPI B26 1 2 49.9_0402_1%~D K9 VSS162
PEG_ICOMPO A26 K6 VSS163
DMI_CRX_PTX_N0 A24 B27 K3
17 DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI_RX#[0] PEG_RCOMPO EXP_RBIAS VSS164
C23 A25 R1129 1 2 750_0402_1%~D J32
17 DMI_CRX_PTX_N1 DMI_RX#[1] PEG_RBIAS VSS165
DMI_CRX_PTX_N2 B22 J30
D 17 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI_RX#[2] VSS166 D
17 DMI_CRX_PTX_N3 A21 K35 J21
DMI_RX#[3] PEG_RX#[0] VSS167
J34 J19
DMI_CRX_PTX_P0 PEG_RX#[1] VSS168
17 DMI_CRX_PTX_P0 B24 J33 H35
DMI_CRX_PTX_P1 DMI_RX[0] PEG_RX#[2] VSS169
17 DMI_CRX_PTX_P1 D23 G35 H32
DMI_RX[1] PEG_RX#[3] VSS170

DMI
DMI_CRX_PTX_P2 B23 G32 H28
17 DMI_CRX_PTX_P2 DMI_CRX_PTX_P3 DMI_RX[2] PEG_RX#[4] VSS171
17 DMI_CRX_PTX_P3 A22 F34 H26
DMI_RX[3] PEG_RX#[5] VSS172
F31 H24
DMI_CTX_PRX_N0 PEG_RX#[6] VSS173
17 DMI_CTX_PRX_N0 D24 D35 H22
DMI_CTX_PRX_N1 DMI_TX#[0] PEG_RX#[7] VSS174
17 DMI_CTX_PRX_N1 G24 E33 H18
DMI_CTX_PRX_N2 DMI_TX#[1] PEG_RX#[8] VSS175
17 DMI_CTX_PRX_N2 F23 C33 H15
DMI_CTX_PRX_N3 DMI_TX#[2] PEG_RX#[9] VSS176
17 DMI_CTX_PRX_N3 H23 D32 H13
DMI_TX#[3] PEG_RX#[10] VSS177
PEG_RX#[11] B32 H11 VSS178
17 DMI_CTX_PRX_P0 DMI_CTX_PRX_P0 D25 C31 H8
DMI_CTX_PRX_P1 DMI_TX[0] PEG_RX#[12] VSS179
17 DMI_CTX_PRX_P1 F24 DMI_TX[1] PEG_RX#[13] B28 H5 VSS180
DMI_CTX_PRX_P2 EDP_CPU_AUX# 24
17 DMI_CTX_PRX_P2 E23 DMI_TX[2] PEG_RX#[14] B30 H2 VSS181
17 DMI_CTX_PRX_P3 DMI_CTX_PRX_P3 G23 A31 G34
DMI_TX[3] PEG_RX#[15] VSS182
G31 VSS183
PEG_RX[0] J35 G20 VSS184
PEG_RX[1] H34 G9 VSS185
PEG_RX[2] H33 G6 VSS186
17 FDI_CTX_PRX_N0 FDI_CTX_PRX_N0 E22 F35 G3
FDI_CTX_PRX_N1 FDI_TX#[0] PEG_RX[3] VSS187
17 FDI_CTX_PRX_N1 D21 FDI_TX#[1] PEG_RX[4] G33 F30 VSS188
17 FDI_CTX_PRX_N2 FDI_CTX_PRX_N2 D19 E34 F27
FDI_CTX_PRX_N3 FDI_TX#[2] PEG_RX[5] VSS189
17 FDI_CTX_PRX_N3 D18 FDI_TX#[3] PEG_RX[6] F32 F25 VSS190
17 FDI_CTX_PRX_N4 FDI_CTX_PRX_N4 G21 D34 F22
FDI_CTX_PRX_N5 FDI_TX#[4] PEG_RX[7] VSS191
17 FDI_CTX_PRX_N5 E19 FDI_TX#[5] PEG_RX[8] F33 F19 VSS192
17 FDI_CTX_PRX_N6 FDI_CTX_PRX_N6 F21 PCI EXPRESS -- GRAPHICS B33 F16
FDI_TX#[6] PEG_RX[9] VSS193
Intel(R) FDI
17 FDI_CTX_PRX_N7 FDI_CTX_PRX_N7 G18 D31 E35
FDI_TX#[7] PEG_RX[10] VSS194
A32 E32

17 FDI_CTX_PRX_P0 FDI_CTX_PRX_P0 D22 FDI_TX[0]


PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
C30
A28
EDP_HPD# 24
EDP_CPU_AUX 24
E29
E24
VSS195
VSS196
VSS197
VSS
17 FDI_CTX_PRX_P1 FDI_CTX_PRX_P1 C21 B29 E21
C FDI_CTX_PRX_P2 FDI_TX[1] PEG_RX[14] VSS198 C
17 FDI_CTX_PRX_P2 D20 FDI_TX[2] PEG_RX[15] A30 E18 VSS199
17 FDI_CTX_PRX_P3 FDI_CTX_PRX_P3 C18 E13
FDI_CTX_PRX_P4 FDI_TX[3] VSS200
17 FDI_CTX_PRX_P4 G22 FDI_TX[4] PEG_TX#[0] L33 E11 VSS201
17 FDI_CTX_PRX_P5 FDI_CTX_PRX_P5 E20 M35 E8
FDI_CTX_PRX_P6 FDI_TX[5] PEG_TX#[1] VSS202
17 FDI_CTX_PRX_P6 F20 FDI_TX[6] PEG_TX#[2] M33 E5 VSS203
17 FDI_CTX_PRX_P7 FDI_CTX_PRX_P7 G19 M30 E2 AT35
FDI_TX[7] PEG_TX#[3] VSS204 VSS_NCTF1
PEG_TX#[4] L31 D33 VSS205 VSS_NCTF2 AT1
FDI_FSYNC0 F17 K32 D30 AR34
17 FDI_FSYNC0 FDI_FSYNC1 FDI_FSYNC[0] PEG_TX#[5] VSS206 VSS_NCTF3
17 FDI_FSYNC1 E17 M29 D26 B34
FDI_FSYNC[1] PEG_TX#[6] VSS207 VSS_NCTF4
J31 D9 B2

NCTF
FDI_INT PEG_TX#[7] VSS208 VSS_NCTF5
17 FDI_INT C17 K29 D6 B1
FDI_INT PEG_TX#[8] VSS209 VSS_NCTF6
H30 D3 A35
FDI_LSYNC0 PEG_TX#[9] VSS210 VSS_NCTF7
17 FDI_LSYNC0 F18 H29 C34
FDI_LSYNC1 FDI_LSYNC[0] PEG_TX#[10] VSS211
17 FDI_LSYNC1 D17 F29 C32
FDI_LSYNC[1] PEG_TX#[11] VSS212
E28 C29
PEG_TX#[12] VSS213
D29 C28
PEG_TX#[13] VSS214
D27 C24
PEG_TX#[14] EDP_CPU_LANE_N1 24 VSS215
C26 C22
PEG_TX#[15] EDP_CPU_LANE_N0 24 VSS216
C20
VSS217
L34 C19
PEG_TX[0] VSS218
M34 C16
PEG_TX[1] VSS219
M32 B31
PEG_TX[2] VSS220
L30 B25
PEG_TX[3] VSS221
M31 B21
PEG_TX[4] VSS222
K31 B18
PEG_TX[5] VSS223
M28 B17
PEG_TX[6] VSS224
H31 B13
PEG_TX[7] VSS225
K28 B11
PEG_TX[8] VSS226
G30 B8
PEG_TX[9] VSS227
G29 B6
PEG_TX[10] VSS228
F28 B4
PEG_TX[11] VSS229
E27 A29
B PEG_TX[12] VSS230 B
D28 A27
PEG_TX[13] VSS231
C27 A23
PEG_TX[14] EDP_CPU_LANE_P1 24 VSS232
C25 A9
PEG_TX[15] EDP_CPU_LANE_P0 24 VSS233

REV1.0
TYCO_CALPELLA_AUBURNDALE

REV1.0
TYCO_CALPELLA_AUBURNDALE

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Auburndale (1/6)
Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 7 of 60
5 4 3 2 1
5 4 3 2 1

+1.05V_RUN_VTT
1.5V_PWRGD 42
+3.3V_ALW2 +3.3V_ALW2

+3.3V_ALW +1.05V_RUN_VTT +1.05V_RUN_VTT

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
1
1 1
R1481 @ @
C1879

C19

C20
10K_0402_5%~D +1.05V_RUN_VTT @JXDP1
@ JXDP1
R1482 1 2 1 2
100K_0402_5%~D 2 2 XDP_PREQ# GND0 GND1 CFG8
3 4 CFG8 10

2
XDP_PRDY# OBSFN_A0 OBSFN_C0 CFG9
0.1U_0402_16V4Z~D 5 OBSFN_A1 OBSFN_C1 6 CFG9 10

1
+1.5V_CPU_VDDQ 1.5V_PWRGD 7 8

2
R25 XDP_OBS0 GND2 GND3 CFG0
9 10 CFG0 10
U141 10K_0402_5%~D XDP_OBS1 OBSDATA_A0 OBSDATA_C0 CFG1
11 12 CFG1 10
1 OBSDATA_A1 OBSDATA_C1

5
D 74AHC1G08GW_SOT353-5~D
D 1.5V_CPU_VDDQ_PWRGD# 2
Place near JXDP1 XDP_OBS2
13
GND4 GND5
14
CFG2 D
R1483 Q207 1 15 16 CFG2 10

2
1K_0402_5%~D G BSS138_SOT23~D IN1 XDP_OBS3 OBSDATA_A2 OBSDATA_C2 CFG3
4 17 18 CFG3 10
O OBSDATA_A3 OBSDATA_C3
S 2 19 20

3
IN2 PM_EXTTS# 23 GND6 GND7

G
21 22 CFG10 CFG10 10
2

R1487 OBSFN_B0 OBSFN_D0

1
C 23 24 CFG11 CFG11 10

3
OBSFN_B1 OBSFN_D1

1
1.5V_CPU_VDDQ_PWRGD 1 2 1.5V_CPU_VDDQ_PWRGD_R 2 Q205 R879 25 26
B PMST3904_SOT323-3~D 1.5K_0402_1%~D @ R1145 XDP_OBS4 GND8 GND9 CFG4
27 28 CFG4 10
E 12.4K_0402_1%~D XDP_OBS5 OBSDATA_B0 OBSDATA_D0 CFG5
2 1.8K_0402_5%~D +1.5V_CPU_VDDQ 29 30 CFG5 10

3
OBSDATA_B1 OBSDATA_D1
31 32

2
C1877 XDP_OBS6 GND10 GND11 CFG6
33 34 CFG6 10

2
OBSDATA_B2 OBSDATA_D2
0.22U_0402_6.3V6K~D 1 2 PM_DRAM_PWRGD_R @ R6 XDP_OBS7 35
OBSDATA_B3 OBSDATA_D3
36 CFG7 CFG7 10
1 @ R1511 1K_0402_5%~D 37 38
1.1K_0402_1%~D H_CPUPWRGD H_CPUPWRGD_XDP GND12 GND13 CLK_CPU_ITP
1 2 39 PWRGOOD/HOOK0 ITPCLK/HOOK4 40

1
1 2 CFD_PWRBTN#_XDP 41 42 CLK_CPU_ITP#
15,17 SIO_PWRBTN#_R HOOK1 ITPCLK#/HOOK5
R880 @ R68 0_0402_5%~D 43 44
H_PWRGD_XDP VCC_OBS_AB VCC_OBS_CD
750_0402_1%~D 1 2 PWRGD_XDP_R 45 46 XDP_RST#_R 2 1 H_CPURST#
@ R19 0_0402_5%~D HOOK2 RESET#/HOOK6 XDP_DBRESET# @ R7
@R7
Refer to Intel S3 circuit 0_0402_5%~D
47
49
HOOK3 DBR#/HOOK7 48
50 1K_0402_5%~D

2
GND14 GND15
13,14,15,16,28 DDR_XDP_SMBDAT 1 2 DDR_XDP_SMBDAT_R1 51 SDA TD0 52 XDP_TDO
13,14,15,16,28 DDR_XDP_SMBCLK
@ R1536 1 2 DDR_XDP_SMBCLK_R1 53 SCL TRST# 54 XDP_TRST#
@ R1537 0_0402_5%~D 55 56 XDP_TDI
+1.05V_RUN_VTT XDP_TCLK TCK1 TDI XDP_TMS
57 TCK0 TMS 58
Disconnect to XDP trace, 59 GND16 GND17 60
Keep R1132, R1133, R1136-R119 add R1536/1537
1 2 H_THERMTRIP# SAMTE_BSH-030-01-L-D-A
R1285 56_0402_5%~D JCPUB for slew rate control.
1 2 H_CATERR# H_COMP3 AT23
R1232 49.9_0402_1%~D COMP3 CPU_BCLK R1132 1
BCLK A16 2 0_0402_5%~D CLK_CPU_BCLK 19

MISC
1 2 H_PROCHOT# H_COMP2 AT24 B16 CPU_BCLK# 1 2
COMP2 BCLK# CLK_CPU_BCLK# 19
R1233 68_0402_1%~D R1133 0_0402_5%~D
H_CPURST#_R H_COMP1 CLK_CPU_ITP

CLOCKS
1 2 G16 COMP1 BCLK_ITP AR30
@ R1234 68_0402_1%~D AT30 CLK_CPU_ITP#
C H_COMP0 BCLK_ITP# C
AT26 COMP0 For production stuffing,
E16 CPU_EXP R1136 1 2 0_0402_5%~D
PEG_CLK
D16 CPU_EXP# 1 2
CLK_CPU_EXP 16 Intel recommend stuffing R67 +3.3V_RUN
CPU_DETECT# PEG_CLK# CLK_CPU_EXP# 16
40 CPU_DETECT# AH24 R1137 0_0402_5%~D
SKTOCC# CPU_DPLL R1138 1 XDP_TCLK
DPLL_REF_SSCLK A18 2 0_0402_5%~D CLK_CPU_DPLL 16 1 2 2 1
A17 CPU_DPLL# 1 2 @ R1469 0_0402_5%~D @ R67 51_0402_1%~D XDP_DBRESET# 2 1
DPLL_REF_SSCLK# CLK_CPU_DPLL# 16 Q199
H_CATERR# AK14 R1139 0_0402_5%~D R60
39 H_CATERR# CATERR#
THERMAL
BSS138_SOT23~D 1K_0402_5%~D

D
F6 DDR3_DRAMRST#_CPU 3 1
H_PECI SM_DRAMRST# DDR3_DRAMRST# 13,14
19 H_PECI AT15
PECI SM_RCOMP0
AL1
SM_RCOMP[0]

2
SM_RCOMP1

G
AM1

2
SM_RCOMP[1] SM_RCOMP2 R1504 +1.05V_RUN_VTT
AN1
H_PROCHOT# SM_RCOMP[2] 100K_0402_5%~D
50 H_PROCHOT# AN26
PROCHOT# PM_EXTTS# XDP_TMS
AN15 DDR_HVREF_RST_GATE 40 2 1
PM_EXT_TS#[0] @R64 51_0402_1%~D
AP15
DDR3
MISC

1
PM_EXT_TS#[1] XDP_TDI_R 2 1
23 H_THERMTRIP# 1 2 H_THERMTRIP#_R AK15 1 @ R65 51_0402_1%~D
R1286 THERMTRIP# XDP_PREQ# 2 1
0_0402_5%~D C1888 @ R1149 51_0402_5%~D
XDP_PRDY# 0.1U_0402_16V4Z~D XDP_TDO
place R1286 56ohm near CPU PRDY#
AT28
AP27 XDP_PREQ# 2
2
@ R3
1
51_0402_1%~D
PREQ#
AN28 XDP_TCLK
H_CPURST# TCK
1 2 H_CPURST#_R AP26
RESET_OBS# TMS
AP28 XDP_TMS
PWR MANAGEMENT

R1088 0_0402_5%~D AT27 XDP_TRST#


TRST#
JTAG & BPM

17 H_PM_SYNC H_PM_SYNC AL15 AT29 XDP_TDI_R


PM_SYNC TDI XDP_TDO_R
39,50,53 IMVP_PWRGD 1 2 AR27
@R12
@ R12 0_0402_5%~D TDO XDP_TDI_M
AR29
TDI_M
1 2 VCCPWRGOOD_1_R AN14 AP29 XDP_TDO_M
B R1290 0_0402_5%~D VCCPWRGOOD_1 TDO_M B
AN25 XDP_DBRESET#_R 2 1 XDP_DBRESET# 15,17
DBR#
19 H_CPUPWRGD 1 2 VCCPWRGOOD_0_R AN27
VCCPWRGOOD_0
@ R1241
R1087 0_0402_5%~D 0_0402_5%~D
XDP_OBS0_R XDP_OBS0
1 2 PM_DRAM_PWRGD_R AK13
BPM#[0]
AJ22
AK22 XDP_OBS1_R @ R780 1
1 2
2 0_0402_5%~D XDP_OBS1 @ R1153
JTAG MAPPING
17 PM_DRAM_PWRGD SM_DRAMPWROK BPM#[1]
R878 0_0402_5%~D AK24 XDP_OBS2_R @ R781 1 2 0_0402_5%~D XDP_OBS2 0_0402_5%~D
BPM#[2] XDP_OBS3_R @ R782 1 0_0402_5%~D XDP_OBS3 XDP_TDI_R XDP_TDI XDP_TRST#
AJ24 2 1 2 2 1
H_VTTPWRGD BPM#[3] XDP_OBS4_R @ R783 1 0_0402_5%~D XDP_OBS4 @ R66
49 H_VTTPWRGD AM15 AJ25 2
VTTPWRGOOD BPM#[4] XDP_OBS5_R @ R784 1 0_0402_5%~D XDP_OBS5 @ R1154 51_0402_1%~D
AH22 2
BPM#[5] XDP_OBS6_R @ R785 1 0_0402_5%~D XDP_OBS6 0_0402_5%~D
AK23 2
H_PWRGD_XDP BPM#[6] XDP_OBS7_R @ R22 1 0_0402_5%~D XDP_OBS7 XDP_TDO_M XDP_TDO
AM26 AH23 2 1 2
TAPPWRGOOD BPM#[7] @ R24 0_0402_5%~D

1 2 PCH_PLTRST#_R AL14
For ESD concern, please put near CPU
18,32,34,36,39,40 PCH_PLTRST#_EC RSTIN#

1
R1144
1.5K_0402_1%~D @ R1157 Scan Chain Stuff -> R1153,R1156,R1157
REV1.0
2

0_0402_5%~D
Refer to CRB 1.51 R1143 TYCO_CALPELLA_AUBURNDALE (Default) No stuff -> R1154,R1155
750_0402_1%~D

2
@ R1155
0_0402_5%~D CPU Only Stuff -> R1153,R1154
1

XDP_TDI_M 1 2
No stuff -> R1154,R1155,R1157
@R1156
@ R1156
0_0402_5%~D
XDP_TDO_R 1 2 PCH Only Stuff -> R1155,R1156
No stuff -> R1153,R1154,R1157

H_COMP0 SM_RCOMP2
A H_COMP1 SM_RCOMP1 A
H_COMP2 SM_RCOMP0
H_COMP3
100_0402_1%~D

130_0402_1%~D
24.9_0402_1%~D

DELL CONFIDENTIAL/PROPRIETARY
1

1
20_0402_1%~D

20_0402_1%~D

49.9_0402_1%~D

49.9_0402_1%~D
1

R1140

R1141

R1142
R1235

R1093

R1094

R1095

Compal Electronics, Inc.


2

Title
2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Auburndale (2/6)
Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 8 of 60
5 4 3 2 1
5 4 3 2 1

JCPUC JCPUD

AA6 M_CLK_DDR0 W8 M_CLK_DDR2


D SA_CK[0] M_CLK_DDR#0 M_CLK_DDR0 13 14 DDR_B_D[0..63] SB_CK[0] M_CLK_DDR#2 M_CLK_DDR2 14 D
13 DDR_A_D[0..63] AA7 M_CLK_DDR#0 13 W9 M_CLK_DDR#2 14
SA_CK#[0] DDR_CKE0_DIMMA DDR_B_D0 SB_CK#[0] DDR_CKE2_DIMMB
P7 DDR_CKE0_DIMMA 13 B5 M3 DDR_CKE2_DIMMB 14
DDR_A_D0 SA_CKE[0] DDR_B_D1 SB_DQ[0] SB_CKE[0]
A10 A5
DDR_A_D1 SA_DQ[0] DDR_B_D2 SB_DQ[1]
C10 C3
DDR_A_D2 SA_DQ[1] DDR_B_D3 SB_DQ[2] M_CLK_DDR3
C7 B3 V7 M_CLK_DDR3 14
DDR_A_D3 SA_DQ[2] M_CLK_DDR1 DDR_B_D4 SB_DQ[3] SB_CK[1] M_CLK_DDR#3
A7 Y6 M_CLK_DDR1 13 E4 V6 M_CLK_DDR#3 14
DDR_A_D4 SA_DQ[3] SA_CK[1] M_CLK_DDR#1 DDR_B_D5 SB_DQ[4] SB_CK#[1] DDR_CKE3_DIMMB
B10 Y5 M_CLK_DDR#1 13 A6 M2 DDR_CKE3_DIMMB 14
DDR_A_D5 SA_DQ[4] SA_CK#[1] DDR_CKE1_DIMMA DDR_B_D6 SB_DQ[5] SB_CKE[1]
D10 P6 DDR_CKE1_DIMMA 13 A4
DDR_A_D6 SA_DQ[5] SA_CKE[1] DDR_B_D7 SB_DQ[6]
E10 C4
DDR_A_D7 SA_DQ[6] DDR_B_D8 SB_DQ[7]
A8 D1
DDR_A_D8 SA_DQ[7] DDR_B_D9 SB_DQ[8]
D8 D2
DDR_A_D9 SA_DQ[8] DDR_CS0_DIMMA# DDR_B_D10 SB_DQ[9] DDR_CS2_DIMMB#
F10 SA_DQ[9] SA_CS#[0] AE2 DDR_CS0_DIMMA# 13 F2 SB_DQ[10] SB_CS#[0] AB8 DDR_CS2_DIMMB# 14
DDR_A_D10 E6 AE8 DDR_CS1_DIMMA# DDR_B_D11 F1 AD6 DDR_CS3_DIMMB#
SA_DQ[10] SA_CS#[1] DDR_CS1_DIMMA# 13 SB_DQ[11] SB_CS#[1] DDR_CS3_DIMMB# 14
DDR_A_D11 F7 DDR_B_D12 C2
DDR_A_D12 SA_DQ[11] DDR_B_D13 SB_DQ[12]
E9 SA_DQ[12] F5 SB_DQ[13]
DDR_A_D13 B7 DDR_B_D14 F3
DDR_A_D14 SA_DQ[13] M_ODT0 DDR_B_D15 SB_DQ[14] M_ODT2
E7 SA_DQ[14] SA_ODT[0] AD8 M_ODT0 13 G4 SB_DQ[15] SB_ODT[0] AC7 M_ODT2 14
DDR_A_D15 C6 AF9 M_ODT1 DDR_B_D16 H6 AD1 M_ODT3
SA_DQ[15] SA_ODT[1] M_ODT1 13 SB_DQ[16] SB_ODT[1] M_ODT3 14
DDR_A_D16 H10 DDR_B_D17 G2
DDR_A_D17 SA_DQ[16] DDR_B_D18 SB_DQ[17]
G8 SA_DQ[17] J6 SB_DQ[18]
DDR_A_D18 K7 DDR_B_D19 J3
DDR_A_D19 SA_DQ[18] DDR_B_D20 SB_DQ[19] DDR_B_DM[0..7] 14
J8 SA_DQ[19] G1 SB_DQ[20]
DDR_A_D20 G7 DDR_B_D21 G5 D4 DDR_B_DM0
DDR_A_D21 SA_DQ[20] DDR_A_DM[0..7] 13 DDR_B_D22 SB_DQ[21] SB_DM[0] DDR_B_DM1
G10 SA_DQ[21] J2 SB_DQ[22] SB_DM[1] E1
DDR_A_D22 J7 B9 DDR_A_DM0 DDR_B_D23 J1 H3 DDR_B_DM2
DDR_A_D23 SA_DQ[22] SA_DM[0] DDR_A_DM1 DDR_B_D24 SB_DQ[23] SB_DM[2] DDR_B_DM3
J10 SA_DQ[23] SA_DM[1] D7 J5 SB_DQ[24] SB_DM[3] K1
DDR_A_D24 L7 H7 DDR_A_DM2 DDR_B_D25 K2 AH1 DDR_B_DM4
DDR_A_D25 SA_DQ[24] SA_DM[2] DDR_A_DM3 DDR_B_D26 SB_DQ[25] SB_DM[4] DDR_B_DM5
M6 SA_DQ[25] SA_DM[3] M7 L3 SB_DQ[26] SB_DM[5] AL2
DDR_A_D26 M8 AG6 DDR_A_DM4 DDR_B_D27 M1 AR4 DDR_B_DM6
DDR_A_D27 SA_DQ[26] SA_DM[4] DDR_A_DM5 DDR_B_D28 SB_DQ[27] SB_DM[6] DDR_B_DM7
L9 SA_DQ[27] SA_DM[5] AM7 K5 SB_DQ[28] SB_DM[7] AT8
DDR_A_D28 L6 AN10 DDR_A_DM6 DDR_B_D29 K4
DDR_A_D29 SA_DQ[28] SA_DM[6] DDR_A_DM7 DDR_B_D30 SB_DQ[29]
K8 SA_DQ[29] SA_DM[7] AN13 M4 SB_DQ[30]
C DDR_A_D30 DDR_B_D31 C
N8 SA_DQ[30] N5 SB_DQ[31]
DDR_A_D31 P9 DDR_B_D32 AF3
DDR_A_D32 SA_DQ[31] DDR_B_D33 SB_DQ[32]
AH5 SA_DQ[32] AG1 SB_DQ[33] DDR_B_DQS#[0..7] 14
DDR_A_D33 AF5 DDR_B_D34 AJ3 D5 DDR_B_DQS#0
DDR_A_D34 SA_DQ[33] DDR_A_DQS#0 DDR_A_DQS#[0..7] 13 DDR_B_D35 SB_DQ[34] SB_DQS#[0] DDR_B_DQS#1
AK6 SA_DQ[34] SA_DQS#[0] C9 AK1 SB_DQ[35] SB_DQS#[1] F4
DDR_A_D35 DDR_A_DQS#1 DDR_B_D36 DDR_B_DQS#2
DDR SYSTEM MEMORY A

AK7 SA_DQ[35] SA_DQS#[1] F8 AG4 SB_DQ[36] SB_DQS#[2] J4


DDR_A_D36 AF6 J9 DDR_A_DQS#2 DDR_B_D37 AG3 L4 DDR_B_DQS#3
DDR_A_D37 SA_DQ[36] SA_DQS#[2] DDR_A_DQS#3 DDR_B_D38 SB_DQ[37] SB_DQS#[3] DDR_B_DQS#4
AG5 N9 AJ4 AH2
DDR_A_D38 SA_DQ[37] SA_DQS#[3] DDR_A_DQS#4 DDR_B_D39 SB_DQ[38] SB_DQS#[4] DDR_B_DQS#5
AJ7 AH7 AH4 AL4

DDR SYSTEM MEMORY - B


DDR_A_D39 SA_DQ[38] SA_DQS#[4] DDR_A_DQS#5 DDR_B_D40 SB_DQ[39] SB_DQS#[5] DDR_B_DQS#6
AJ6 AK9 AK3 AR5
DDR_A_D40 SA_DQ[39] SA_DQS#[5] DDR_A_DQS#6 DDR_B_D41 SB_DQ[40] SB_DQS#[6] DDR_B_DQS#7
AJ10 AP11 AK4 AR8
DDR_A_D41 SA_DQ[40] SA_DQS#[6] DDR_A_DQS#7 DDR_B_D42 SB_DQ[41] SB_DQS#[7]
AJ9 AT13 AM6
DDR_A_D42 SA_DQ[41] SA_DQS#[7] DDR_B_D43 SB_DQ[42]
AL10 AN2
DDR_A_D43 SA_DQ[42] DDR_B_D44 SB_DQ[43]
AK12 AK5
DDR_A_D44 SA_DQ[43] DDR_B_D45 SB_DQ[44]
AK8 AK2
DDR_A_D45 SA_DQ[44] DDR_B_D46 SB_DQ[45]
AL7 DDR_A_DQS[0..7] 13 AM4
DDR_A_D46 SA_DQ[45] DDR_A_DQS0 DDR_B_D47 SB_DQ[46]
AK11 C8 AM3 DDR_B_DQS[0..7] 14
DDR_A_D47 SA_DQ[46] SA_DQS[0] DDR_A_DQS1 DDR_B_D48 SB_DQ[47] DDR_B_DQS0
AL8 F9 AP3 C5
DDR_A_D48 SA_DQ[47] SA_DQS[1] DDR_A_DQS2 DDR_B_D49 SB_DQ[48] SB_DQS[0] DDR_B_DQS1
AN8 H9 AN5 E3
DDR_A_D49 SA_DQ[48] SA_DQS[2] DDR_A_DQS3 DDR_B_D50 SB_DQ[49] SB_DQS[1] DDR_B_DQS2
AM10 M9 AT4 H4
DDR_A_D50 SA_DQ[49] SA_DQS[3] DDR_A_DQS4 DDR_B_D51 SB_DQ[50] SB_DQS[2] DDR_B_DQS3
AR11 AH8 AN6 M5
DDR_A_D51 SA_DQ[50] SA_DQS[4] DDR_A_DQS5 DDR_B_D52 SB_DQ[51] SB_DQS[3] DDR_B_DQS4
AL11 AK10 AN4 AG2
DDR_A_D52 SA_DQ[51] SA_DQS[5] DDR_A_DQS6 DDR_B_D53 SB_DQ[52] SB_DQS[4] DDR_B_DQS5
AM9 AN11 AN3 AL5
DDR_A_D53 SA_DQ[52] SA_DQS[6] DDR_A_DQS7 DDR_B_D54 SB_DQ[53] SB_DQS[5] DDR_B_DQS6
AN9 AR13 AT5 AP5
DDR_A_D54 SA_DQ[53] SA_DQS[7] DDR_B_D55 SB_DQ[54] SB_DQS[6] DDR_B_DQS7
AT11 AT6 AR7
DDR_A_D55 SA_DQ[54] DDR_B_D56 SB_DQ[55] SB_DQS[7]
AP12 AN7
DDR_A_D56 SA_DQ[55] DDR_B_D57 SB_DQ[56]
AM12 DDR_A_MA[0..15] 13 AP6
DDR_A_D57 SA_DQ[56] DDR_B_D58 SB_DQ[57]
AN12 AP8
DDR_A_D58 SA_DQ[57] DDR_A_MA0 DDR_B_D59 SB_DQ[58]
AM13 Y3 AT9
DDR_A_D59 SA_DQ[58] SA_MA[0] DDR_A_MA1 DDR_B_D60 SB_DQ[59]
AT14 W1 AT7
DDR_A_D60 SA_DQ[59] SA_MA[1] DDR_A_MA2 DDR_B_D61 SB_DQ[60]
AT12 AA8 AP9 DDR_B_MA[0..15] 14
DDR_A_D61 SA_DQ[60] SA_MA[2] DDR_A_MA3 DDR_B_D62 SB_DQ[61]
AL13 AA3 AR10
B DDR_A_D62 SA_DQ[61] SA_MA[3] DDR_A_MA4 DDR_B_D63 SB_DQ[62] DDR_B_MA0 B
AR14 V1 AT10 U5
DDR_A_D63 SA_DQ[62] SA_MA[4] DDR_A_MA5 SB_DQ[63] SB_MA[0] DDR_B_MA1
AP14 AA9 V2
SA_DQ[63] SA_MA[5] DDR_A_MA6 SB_MA[1] DDR_B_MA2
V8 T5
SA_MA[6] DDR_A_MA7 SB_MA[2] DDR_B_MA3
T1 V3
SA_MA[7] DDR_A_MA8 SB_MA[3] DDR_B_MA4
Y9 R1
DDR_A_BS0 SA_MA[8] DDR_A_MA9 DDR_B_BS0 SB_MA[4] DDR_B_MA5
13 DDR_A_BS0 AC3 U6 14 DDR_B_BS0 AB1 T8
DDR_A_BS1 SA_BS[0] SA_MA[9] DDR_A_MA10 DDR_B_BS1 SB_BS[0] SB_MA[5] DDR_B_MA6
13 DDR_A_BS1 AB2 AD4 14 DDR_B_BS1 W5 R2
DDR_A_BS2 SA_BS[1] SA_MA[10] DDR_A_MA11 DDR_B_BS2 SB_BS[1] SB_MA[6] DDR_B_MA7
13 DDR_A_BS2 U7 T2 14 DDR_B_BS2 R7 R6
SA_BS[2] SA_MA[11] DDR_A_MA12 SB_BS[2] SB_MA[7] DDR_B_MA8
U3 R4
SA_MA[12] DDR_A_MA13 SB_MA[8] DDR_B_MA9
AG8 R5
SA_MA[13] DDR_A_MA14 DDR_B_CAS# SB_MA[9] DDR_B_MA10
T3 14 DDR_B_CAS# AC5 AB5
DDR_A_CAS# SA_MA[14] DDR_A_MA15 DDR_B_RAS# SB_CAS# SB_MA[10] DDR_B_MA11
13 DDR_A_CAS# AE1 V9 14 DDR_B_RAS# Y7 P3
DDR_A_RAS# SA_CAS# SA_MA[15] DDR_B_WE# SB_RAS# SB_MA[11] DDR_B_MA12
13 DDR_A_RAS# AB3 14 DDR_B_WE# AC6 R3
DDR_A_WE# SA_RAS# SB_WE# SB_MA[12] DDR_B_MA13
13 DDR_A_WE# AE9 AF7
SA_WE# SB_MA[13] DDR_B_MA14
P5
SB_MA[14] DDR_B_MA15
N1
SB_MA[15]

REV1.0
TYCO_CALPELLA_AUBURNDALE

REV1.0
TYCO_CALPELLA_AUBURNDALE

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Auburndale (3/6)
Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 9 of 60
5 4 3 2 1
5 4 3 2 1

JCPUE

AJ13 PAD~D T31 @


RSVD32 PAD~D T32 @
AJ12
RSVD33
Populate R84,R86 for Intel DDR3 AP25
RSVD1
VREFDQ multiple methods M3 AL25 AH25
RSVD2 RSVD34 PAD~D T40 @
AL24 AK26
RSVD3 RSVD35
AL22
RSVD4 PAD~D T27 @
AJ33 AL26
RSVD5 RSVD36
AG9 AR2
@ R84 RSVD6 RSVD_NCTF_37 CFG0
M27
0_0402_5%~D RSVD7
L28 AJ26
RSVD8 RSVD38

1
D DIMM0_VREF 1 2 DIMM0_VREF_R J17 AJ27 D
13 DIMM0_VREF SA_DIMM_VREF RSVD39
DIMM1_VREF 1 2 DIMM1_VREF_R H17 R1107
14 DIMM1_VREF SB_DIMM_VREF
@R86
@ R86 G25 3.01K_0402_1%~D
0_0402_5%~D RSVD11
G17 @
RSVD12
E31 AP1

2
RSVD13 RSVD_NCTF_40 PAD~D T41 @
E30 AT2
RSVD14 RSVD_NCTF_41
AT3
RSVD_NCTF_42
AR1
RSVD_NCTF_43

RSVD45 AL28
CFG0 AM30 AL29 PCI-Express Configuration Select
8 CFG0 CFG[0] RSVD46
CFG1 AM28 AP30
8 CFG1 CFG[1] RSVD47
CFG2 AP31 AP32
8 CFG2 CFG[2] RSVD48
CFG3 AL32 AL27 1 : Single PEG
8 CFG3 CFG[3] RSVD49
CFG4 AL30 AT31 CFG0
8 CFG4 CFG[4] RSVD50
CFG5 AM31 AT32 0 : Bifurcation enable
8 CFG5 CFG[5] RSVD51
CFG6 AN29 AP33
8 CFG6 CFG[6] RSVD52
CFG7 AM32 AR33
8 CFG7 CFG[7] RSVD53
CFG8 AK32 AT33
8 CFG8 CFG[8] RSVD_NCTF_54
CFG9 AK31 AT34
8 CFG9

RESERVED
CFG10 CFG[9] RSVD_NCTF_55
8 CFG10 AK28 CFG[10] RSVD_NCTF_56 AP35
CFG11 AJ28 AR35
8 CFG11 CFG[11] RSVD_NCTF_57
@T18
@ T18 PAD~D CFG12 AN30 AR32
@T19
@ T19 PAD~D CFG13 CFG[12] RSVD58
AN32 CFG[13]
@T20
@ T20 PAD~D CFG14 AJ32
@T21
@ T21 PAD~D CFG15 CFG[14] CFG3
AJ29 CFG[15] RSVD_TP_59 E15
@T22
@ T22 PAD~D CFG16 AJ30 F15
CFG[16] RSVD_TP_60

1
@T23
@ T23 PAD~D CFG17 AK30 A2
@T24
@ T24 PAD~D CFG18 CFG[17] KEY R1108
H16 RSVD_TP_86 RSVD62 D15
C15 3.01K_0402_1%~D
RSVD63
RSVD64 AJ15 @
AH15

2
C RSVD65 C

B19 RSVD15
A19 RSVD16
H_RSVD17 A20
H_RSVD18 RSVD17
B20 RSVD18
RSVD_TP_66 AA5 PCI-Express Static Lane Reversal
U9 AA4
1

RSVD19 RSVD_TP_67
0_0402_5%~D

0_0402_5%~D

T9 R8
RSVD20 RSVD_TP_68
R830

R831

RSVD_TP_69
AD3 1 : Normal Operation
AC9
RSVD21 RSVD_TP_70
AD2 CFG3
@ @ AB9 AA2 0 : Lane Number Reversed
RSVD22 RSVD_TP_71
AA1
2

RSVD_TP_72
RSVD_TP_73
R9 15->0, 14->1 ...
AG7
RSVD_TP_74
C1 AE3
RSVD_NCTF_23 RSVD_TP_75
A3
RSVD_NCTF_24
V4
RSVD_TP_76
V5
RSVD_TP_77
N2
RSVD_TP_78
J29 AD5
RSVD26 RSVD_TP_79
J28 AD7
RSVD27 RSVD_TP_80
W3
RSVD_TP_81 CFG4
A34 W2
RSVD_NCTF_28 RSVD_TP_82
A33 N3
RSVD_NCTF_29 RSVD_TP_83

1
AE5
RSVD_TP_84 R1109
C35 AD9
RSVD_NCTF_30 RSVD_TP_85 3.3K_0402_1%~D
B35
RSVD_NCTF_31
AP34

2
VSS

B REV1.0 B
TYCO_CALPELLA_AUBURNDALE

Display Port Presence

1 : Disabled; No Physical Display Port


CFG4 attached to Embedded Display Port
0 : Enabled; An external Display Port device is
connected to the Embedded Display Port

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Auburndale (4/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 10 of 60
5 4 3 2 1
5 4 3 2 1

JCPUF

+VCC_CORE
+VCC_CORE +1.05V_RUN_VTT
18A
48AAG35 AH14
VCC1 VTT0_1
D 1 1 1 1 1 AG34 AH12 1 1 1 1 1 D
VCC2 VTT0_2
AG33 AH11
C24 C25 C26 C27 C28 VCC3 VTT0_3 C1196 C1204 C1197 C1198 C1199
AG32 AH10
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D VCC4 VTT0_4 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D
AG31 J14
2 2 2 2 2 VCC5 VTT0_5 2 2 2 2 2
AG30 J13
VCC6 VTT0_6
AG29 H14
VCC7 VTT0_7
AG28 H12
VCC8 VTT0_8
AG27 G14
VCC9 VTT0_9
AG26 G13 1
VCC10 VTT0_10
1 1 1 1 1 AF35 G12
VCC11 VTT0_11 C1200
AF34 G11
C29 C30 C31 C34 VCC12 VTT0_12 10U_0805_4VAM~D
C35 AF33 F14
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D 22U_0805_6.3VAM~D VCC13 VTT0_13 2
AF32 VCC14 VTT0_14 F13
2 2 2 2 2 AF31 F12
VCC15 VTT0_15
AF30 VCC16 VTT0_16 F11
AF29 VCC17 VTT0_17 E14
AF28 VCC18 VTT0_18 E12
AF27 VCC19 VTT0_19 D14

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D
1 1 AF26 VCC20 VTT0_20 D13

1.1V RAIL POWER


AD35 VCC21 VTT0_21 D12 1 1 1
C36 C37 AD34 D11
VCC22 VTT0_22

C1087

C1085
22U_0805_6.3VAM~D 22U_0805_6.3VAM~D AD33 C14 C1103
2 2 VCC23 VTT0_23 22U_0805_6.3V6M~D
AD32 VCC24 VTT0_24 C13
AD31 C12 2 2 2
VCC25 VTT0_25
AD30 VCC26 VTT0_26 C11
AD29 VCC27 VTT0_27 B14
AD28 VCC28 VTT0_28 B12
AD27 VCC29 VTT0_29 A14
AD26 VCC30 VTT0_30 A13
AC35 VCC31 VTT0_31 A12
AC34 VCC32 VTT0_32 A11
AC33 VCC33 +1.05V_RUN_VTT
AC32 VCC34
AC31 VCC35
C
AC30 VCC36 VTT0_33 AF10 C

22U_0805_6.3V6M~D
AC29 VCC37 VTT0_34 AE10
AC28 VCC38 VTT0_35 AC10 1 1

CPU CORE SUPPLY

C1082
AC27 AB10 C1083
+VCC_CORE VCC39 VTT0_36 22U_0805_6.3V6M~D
AC26 VCC40 VTT0_37 Y10
AA35 VCC41 VTT0_38 W10
2 2
AA34 VCC42 VTT0_39 U10
AA33 VCC43 VTT0_40 T10
1 1 1 1 1 1 AA32 J12
VCC44 VTT0_41
AA31 J11
C44 C45 C47 C48 @C59
@ C59 VCC45 VTT0_42
C46 AA30 J16
10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D VCC46 VTT0_43
AA29 J15
2 2 2 2 2 2 VCC47 VTT0_44
AA28
VCC48
AA27
VCC49
AA26
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
1 1 1 1 1 1 Y31
VCC55
Y30
@C50
@ C50 C51 @C52
@ C52 C53 C54 C49 VCC56
Y29
10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D VCC57
Y28
2 2 2 2 2 2 VCC58
Y27
VCC59
Y26
VCC60 H_PSI#
V35 AN33 H_PSI# 50
VCC61 PSI#
V34
VCC62

POWER
V33
VCC63 VID0
V32 AK35 VID0 50
VCC64 VID[0] VID1
1 1 1 1 V31 AK33 VID1 50
VCC65 VID[1] VID2
V30 AK34 VID2 50
C56 @ C57 C55 C58 VCC66 VID[2] VID3
V29 AL35 VID3 50
VCC67 VID[3]

CPU VIDS
10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D 10U_0805_4VAM~D V28 AL33 VID4
2 2 2 2 VCC68 VID[4] VID4 50
V27 AM33 VID5
VCC69 VID[5] VID5 50
V26 AM35 VID6
VCC70 VID[6] VID6 50
B U35 AM34 H_DPRSLPVR_R 1 2 H_DPRSLPVR 50 B
VCC71 PROC_DPRSLPVR R1115 0_0402_5%~D
U34
VCC72
U33
VCC73
U32
VCC74
VTT_SELECT = low, 1.1V
U31 G15
VCC75 VTT_SELECT
U30
VCC76
VTT_SELECT = high, 1.05V
U29
VCC77
U28
VCC78
U27
VCC79 +VCC_CORE
U26
VCC80
R35
VCC81
R34
VCC82

1
R33
VCC83 IMVP_IMON R1116
R32 AN35 IMVP_IMON 23,50
VCC84 ISENSE
R31 100_0402_1%~D
VCC85
R30
+VCC_CORE VCC86
R29

2
VCC87 VCCSENSE
SENSE LINES

R28 AJ34 VCCSENSE 50


VCC88 VCC_SENSE VSSSENSE
R27 AJ35 VSSSENSE 50
VCC89 VSS_SENSE
R26
VCC90
1 1 1 1 P35
VCC91

1
P34 B15 VTT_SENSE VTT_SENSE 49 Place R1116 and R1117 near CPU
+ C63 + C62 + C61 + C60 VCC92 VTT_SENSE R1236
P33 A15
270U_D_2VM_R4.5M~D 270U_D_2VM_R4.5M~D 270U_D_2VM_R4.5M~D 270U_D_2VM_R4.5M~D VCC93 VSS_SENSE_VTT
P32
VCC94 100_0402_1%~D Route VCCSENSE and VSSSENSE trace at
P31
2 3 2 3 2 3 2 3 VCC95 27.4 ohms, 7 mils spacing
P30

2
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100

+VCC_CORE

A A

1
+ @C66
1
+ @C64
REV1.0
TYCO_CALPELLA_AUBURNDALE
270U_D_2VM_R4.5M~D 470U_D2T_2VM~D

2 3 2 3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Auburndale (5/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 11 of 60
5 4 3 2 1
5 4 3 2 1

+1.5V_CPU_VDDQ Source
+1.5V_MEM Q200 +1.5V_CPU_VDDQ
+3.3V_ALW2 +15V_ALW AO4728L_SO8~D
8 1
7 2

20K_0402_5%~D
6 3 1

10U_0805_10V4Z~D
5

C1872

R1471
R1480
R1472 100K_0402_5%~D JCPUH

4
100K_0402_5%~D 2

2
RUN_ON_CPU1.5VS3 @ AT20 AE34
VSS1 VSS81
AT17 AE33

2
VSS2 VSS82

3
D D
AR31 AE32
VSS3 VSS83
AR28 AE31
Q201B VSS4 VSS84
1 AR26 AE30
RUN_ON_CPU1.5VS3# DMN66D0LDW-7_SOT363-6~D VSS5 VSS85
5 AR24 AE29
C1873 VSS6 VSS86
AR23 AE28
4700P_0402_25V7K~D VSS7 VSS87
AR20 AE27

4
2 VSS8 VSS88
AR17 AE26
VSS9 VSS89

6
AR15 AE6
VSS10 VSS90
AR12 AD10
@ R1473 Q201A VSS11 VSS91
AR9 AC8
DMN66D0LDW-7_SOT363-6~D VSS12 VSS92
34,39,42,47 RUN_ON 1 2 2 AR6 AC4
0_0402_5%~D VSS13 VSS93
AR3 VSS14 VSS94 AC2
R1474 AP20 AB35

1
VSS15 VSS95
40 CPU1.5V_S3_GATE 1 2 RUN_ON_CPU1.5VS3# 42 AP17 AB34
0_0402_5%~D VSS16 VSS96
AP13 VSS17 VSS97 AB33
AP10 VSS18 VSS98 AB32
AP7 VSS19 VSS99 AB31
+VCC_GFXCORE JCPUG AP4 AB30
VSS20 VSS100
AP2 AB29
22A AT21 AN34
VSS21 VSS101
AB28
VAXG1 VCC_AXG_SENSE VSS22 VSS102
AT19 VAXG2 VAXG_SENSE AR22 VCC_AXG_SENSE 53 AN31 VSS23 VSS103 AB27
@

VSS_AXG_SENSE

SENSE
LINES
AT18 VAXG3 VSSAXG_SENSE AT22 VSS_AXG_SENSE 53 AN23 VSS24 VSS104 AB26
22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

10U_0805_4VAM~D

10U_0805_4VAM~D

1 1 1 1 1 1 1 1 AT16 VAXG4 AN20 VSS25 VSS105 AB6


C1088

C1089

C1090

C1091

C1092

C1093

C1094

C1095

AR21 VAXG5 AN17 VSS26 VSS106 AA10


AR19 VAXG6 AM29 VSS27 VSS107 Y8
AR18 VAXG7 AM27 VSS28 VSS108 Y4
2 2 2 2 2 2 2 2 AR16 AM22 GFX_VID0 AM25 Y2
VAXG8 GFX_VID[0] GFX_VID0 53 VSS29 VSS109
AP21 AP22 GFX_VID1 GFX_VID1 53 C1874 2 1 0.1U_0402_10V7K~D AM20 W35
VAXG9 GFX_VID[1] VSS30 VSS110

GRAPHICS VIDs
AP19 AN22 GFX_VID2 GFX_VID2 53 AM17 W34
VAXG10 GFX_VID[2] GFX_VID3 VSS31 VSS111
AP18 VAXG11 GFX_VID[3] AP23 GFX_VID3 53 AM14 VSS32 VSS112 W33
AP16 AM23 GFX_VID4 GFX_VID4 53 C1875 2 1 0.1U_0402_10V7K~D AM11 W32
VAXG12 GFX_VID[4] GFX_VID5 VSS33 VSS113
AN21 VAXG13 GFX_VID[5] AP24 GFX_VID5 53 AM8 VSS34 VSS114 W31

GRAPHICS
C GFX_VID6 C
AN19 VAXG14 GFX_VID[6] AN24 GFX_VID6 53 AM5 VSS35 VSS115 W30
AN18 C1876 2 1 0.1U_0402_10V7K~D AM2 W29
VAXG15 VSS36 VSS116
AN16 AL34 W28
AM21
AM19
VAXG16
VAXG17
VAXG18
GFX_VR_EN
GFX_DPRSLPVR
AR25
AT25
GFX_VR_ON_R R1120
GFX_DPRSLPVR_R R1119
1
1
2 0_0402_5%~D
2 0_0402_5%~D
GFX_VR_ON 53
GFX_DPRSLPVR 53 C1878 2 1 0.1U_0402_10V7K~D
AL31
AL23
VSS37
VSS38
VSS39
VSS VSS117
VSS118
VSS119
W27
W26
AM18 AM24 GFX_IMON AL20 W6
VAXG19 GFX_IMON GFX_IMON 53 VSS40 VSS120
AM16 VAXG20 AL17 VSS41 VSS121 V10
AL21 @ PJP57 AL12 U8
VAXG21 VSS42 VSS122
AL19 1 2 AL9 U4
VAXG22 +1.5V_CPU_VDDQ VSS43 VSS123
AL18 AL6 U2
VAXG23 PAD-OPEN 4x4m VSS44 VSS124
AL16 AL3 T35
AK21
VAXG24
AJ1
3A +1.5V_MEM AK29
VSS45 VSS125
T34
VAXG25 VDDQ1 @ PJP58 VSS46 VSS126
AK19 AF1 AK27 T33
VAXG26 VDDQ2 VSS47 VSS127

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D
AK18 AE7 1 2 AK25 T32

- 1.5V RAILS
VAXG27 VDDQ3 VSS48 VSS128
AK16 AE4 1 1 1 1 1 1 AK20 T31
VAXG28 VDDQ4 PAD-OPEN 4x4m VSS49 VSS129
AJ21 AC1 AK17 T30
VAXG29 VDDQ5 VSS50 VSS130

C1096

C1097

C1098

C1099

C1100
AJ19 AB7 + C1165 AJ31 T29
VAXG30 VDDQ6 330U_D2_2VM_R6M~D VSS51 VSS131
AJ18 AB4 AJ23 T28
VAXG31 VDDQ7 2 2 2 2 2 VSS52 VSS132
AJ16 Y1 AJ20 T27
VAXG32 VDDQ8 2 VSS53 VSS133
AH21 W7 AJ17 T26
VAXG33 VDDQ9 VSS54 VSS134
AH19 W4 AJ14 T6
POWER

VAXG34 VDDQ10 VSS55 VSS135


AH18 U1 AJ11 R10
VAXG35 VDDQ11 VSS56 VSS136
AH16 T7 AJ8 P8
VAXG36 VDDQ12 VSS57 VSS137

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D
T4 AJ5 P4
VDDQ13 VSS58 VSS138

C1101

C1102
P1 1 1 AJ2 P2
VDDQ14 VSS59 VSS139
N7 AH35 N35
+1.05V_RUN_VTT VDDQ15 VSS60 VSS140
N4 AH34 N34
VDDQ16 VSS61 VSS141
DDR3

L1 AH33 N33
VDDQ17 2 2 VSS62 VSS142
J24 H1 AH32 N32
VTT1_45 VDDQ18 VSS63 VSS143
FDI

J23 AH31 N31


VTT1_46 VSS64 VSS144
H25 AH30 N30
VTT1_47 VSS65 VSS145
AH29 N29
B VSS66 VSS146 B
AH28 N28
VSS67 VSS147
P10 +1.05V_RUN_VTT AH27 N27
VTT0_59 VSS68 VSS148

10U_0805_4VAM~D

10U_0805_4VAM~D
N10 AH26 N26
VTT0_60 VSS69 VSS149
L10 1 1 AH20 N6
VTT0_61 VSS70 VSS150
C1107

C1108
K10 AH17 M10
VTT0_62 VSS71 VSS151
AH13 L35
VSS72 VSS152
AH9 L32
2 2 VSS73 VSS153
AH6 L29
VSS74 VSS154
AH3 L8
VSS75 VSS155
1.1V

J22 AG10 L5
VTT1_63 VSS76 VSS156
+1.05V_RUN_VTT K26 J20 AF8 L2
VTT1_48 VTT1_64 VSS77 VSS157
J27 J18 +1.05V_RUN_VTT AF4 K34
VTT1_49 VTT1_65 VSS78 VSS158
PEG & DMI

J26 H21 AF2 K33


VTT1_50 VTT1_66 VSS79 VSS159
22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

J25 H20 AE35 K30


VTT1_51 VTT1_67 VSS80 VSS160
C1111

C1112

H27 H19 1 1
VTT1_52 VTT1_68
G28
VTT1_53
G27
G26
VTT1_54
VTT1_55 2 2
REV1.0
F26 TYCO_CALPELLA_AUBURNDALE
E26
VTT1_56
L26
600mA
VTT1_57 VCCPLL1
1.8V

E25 L27
VTT1_58 VCCPLL2
M26 +1.8V_RUN
VCCPLL3
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2.2U_0603_6.3V6K~D

4.7U_0603_6.3V6M~D

22U_0805_6.3V6M~D

1 1 1 1 1
C1117
C1115

C1116

C67

C65

2 2 2 2 2
REV1.0
TYCO_CALPELLA_AUBURNDALE

GFX_VR_ON 1 2
A R358 470_0402_5%~D A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Auburndale (6/6)
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 12 of 60
5 4 3 2 1
5 4 3 2 1

R87 0_0402_5%~D +1.5V_MEM +1.5V_MEM


+V_DDR_REF 1 2 JDIMMA
10 DIMM0_VREF 1 VREF_DQ VSS 2
3 4 DDR_A_D4
VSS DQ4

2.2U_0603_6.3V6K~D

0.1U_0402_16V4Z~D
DDR_A_D0 5 6 DDR_A_D5
9 DDR_A_DQS#[0..7] DDR_A_D1 DQ0 DQ5
7 8
9 DDR_A_D[0..63] 1 1
DDR_A_DM0
9
11
DQ1
VSS
DM0
VSS
DQS0#
DQS0
10
12
DDR_A_DQS#0
DDR_A_DQS0
+1.5V_MEM
JDIMMA H=5.2

C1119

C1120
9 DDR_A_DM[0..7] Populate R87 for Intel DDR3 13 VSS VSS 14
DDR_A_D2 15 16 DDR_A_D6
VREFDQ multiple methods M1 DQ2 DQ6

1
2 2 DDR_A_D3 17 18 DDR_A_D7
9 DDR_A_DQS[0..7] DQ3 DQ7
19 20 R1476
DDR_A_D8 VSS VSS DDR_A_D12 1K_0402_5%~D
9 DDR_A_MA[0..15] 21 22
DDR_A_D9 DQ8 DQ12 DDR_A_D13
23 24
DQ9 DQ13
25 26

2
D DDR_A_DQS#1 VSS VSS DDR_A_DM1 D
27 28
DDR_A_DQS1 DQS1# DM1 DDR3_DRAMRST#
Note: 29
DQS1 RESET#
30 DDR3_DRAMRST# 8,14
31 32
Check voltage tolerance of DDR_A_D10 33
VSS VSS
34 DDR_A_D14
DDR_A_D11 DQ10 DQ14 DDR_A_D15
Layout Note: VREF_DQ at the DIMM socket 35
DQ11 DQ15
36
37 38
Place near JDIMMA DDR_A_D16 39
VSS VSS
40 DDR_A_D20
DDR_A_D17 DQ16 DQ20 DDR_A_D21
41 42
DQ17 DQ21
43 44
DDR_A_DQS#2 VSS VSS DDR_A_DM2
45 46
DDR_A_DQS2 DQS2# DM2
47 48
DQS2 VSS DDR_A_D22
49 VSS DQ22 50
+1.5V_MEM DDR_A_D18 51 52 DDR_A_D23
DDR_A_D19 DQ18 DQ23
53 DQ19 VSS 54
55 56 DDR_A_D28
DDR_A_D24 VSS DQ28 DDR_A_D29
57 DQ24 DQ29 58
0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D DDR_A_D25 59 DQ25 VSS 60


1 1 1 1 61 62 DDR_A_DQS#3
VSS DQS3#
C1121

C1122

C1123

C1124
DDR_A_DM3 63 64 DDR_A_DQS3
DM3 DQS3
65 VSS VSS 66
DDR_A_D26 67 68 DDR_A_D30
2 2 2 2 DDR_A_D27 DQ26 DQ30 DDR_A_D31
69 DQ27 DQ31 70
71 VSS VSS 72

DDR_CKE0_DIMMA 73 74 DDR_CKE1_DIMMA
9 DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA 9
75 VDD VDD 76
77 78 DDR_A_MA15
DDR_A_BS2 NC A15 DDR_A_MA14
9 DDR_A_BS2 79 BA2 A14 80
81 VDD VDD 82
+1.5V_MEM DDR_A_MA12 83 84 DDR_A_MA11
DDR_A_MA9 A12/BC# A11 DDR_A_MA7
85 A9 A7 86
C C
87 VDD VDD 88
DDR_A_MA8 89 90 DDR_A_MA6
A8 A6
10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

DDR_A_MA5 91 92 DDR_A_MA4
A5 A4
93 VDD VDD 94
330U_SX_2VY~D

1 DDR_A_MA3 95 96 DDR_A_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0
1 1 1 1 1 1 97 A1 A0 98
C1126

C1127

C1128

C1129

C1130

C1131

C1125

+ 99 100
M_CLK_DDR0 VDD VDD M_CLK_DDR1
9 M_CLK_DDR0 101 102 M_CLK_DDR1 9
M_CLK_DDR#0 CK0 CK1 M_CLK_DDR#1
9 M_CLK_DDR#0 103 104 M_CLK_DDR#1 9
2 2 2 2 2 2 2 CK0# CK1#
105 106
DDR_A_MA10 VDD VDD DDR_A_BS1
107 108 DDR_A_BS1 9
DDR_A_BS0 A10/AP BA1 DDR_A_RAS#
9 DDR_A_BS0 109 110
BA0 RAS# DDR_A_RAS# 9
111 112
DDR_A_WE# VDD VDD DDR_CS0_DIMMA#
9 DDR_A_WE# 113 114 DDR_CS0_DIMMA# 9
DDR_A_CAS# WE# S0# M_ODT0
9 DDR_A_CAS# 115 116 M_ODT0 9
CAS# ODT0
117 118
DDR_A_MA13 VDD VDD M_ODT1
119 120 M_ODT1 9
DDR_CS1_DIMMA# A13 ODT1
9 DDR_CS1_DIMMA# 121 122
S1# NC
123 124
VDD VDD
Layout Note: 125
TEST VREF_CA
126 +V_DDR_REF
127 128
Place near JDIMMA.203,204 VSS VSS

2.2U_0603_6.3V6K~D

0.1U_0402_16V4Z~D
DDR_A_D32 129 130 DDR_A_D36
DDR_A_D33 DQ32 DQ36 DDR_A_D37
131 132
DQ33 DQ37
133 134 1 1
DDR_A_DQS#4 VSS VSS DDR_A_DM4
135 136
DQS4# DM4

C1132

C1133
DDR_A_DQS4 137 138
DQS4 VSS DDR_A_D38
139 140
DDR_A_D34 VSS DQ38 DDR_A_D39 2 2
141 142
DDR_A_D35 DQ34 DQ39
143 144
+0.75V_DDR_VTT DQ35 VSS DDR_A_D44
145 146
DDR_A_D40 VSS DQ44 DDR_A_D45
147 148
DDR_A_D41 DQ40 DQ45
149 150
B DQ41 VSS DDR_A_DQS#5 B
151 152
DDR_A_DM5 VSS DQS5# DDR_A_DQS5
153 154
DM5 DQS5
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

155 156
DDR_A_D42 VSS VSS DDR_A_D46
1 1 1 1 1 157 158
DDR_A_D43 DQ42 DQ46 DDR_A_D47
159 160
DQ43 DQ47
C1134

C1135

C1136

C1137

C1138

161 162
DDR_A_D48 VSS VSS DDR_A_D52
163 164
2 2 2 2 2 DDR_A_D49 DQ48 DQ52 DDR_A_D53
165 166
DQ49 DQ53
167 168
DDR_A_DQS#6 VSS VSS DDR_A_DM6
169 170
DDR_A_DQS6 DQS6# DM6
171 172
DQS6 VSS DDR_A_D54
173 174
DDR_A_D50 VSS DQ54 DDR_A_D55
175 176
DDR_A_D51 DQ50 DQ55
177 178
DQ51 VSS DDR_A_D60
179 180
DDR_A_D56 VSS DQ60 DDR_A_D61
181 182
DDR_A_D57 DQ56 DQ61
183 184
DQ57 VSS DDR_A_DQS#7
185 186
DDR_A_DM7 VSS DQS7# DDR_A_DQS7
187 188
DM7 DQS7
189 190
DDR_A_D58 VSS VSS DDR_A_D62
191 192
DDR_A_D59 DQ58 DQ62 DDR_A_D63
193 194
DQ59 DQ63
195 196
VSS VSS
1 2 197 198
R1182 10K_0402_5%~D199 SA0 EVENT# DDR_XDP_SMBDAT
+3.3V_RUN 200 DDR_XDP_SMBDAT 8,14,15,16,28
VDDSPD SDA
0.1U_0402_16V4Z~D

2.2U_0603_6.3V6K~D

1 2 201 202 DDR_XDP_SMBCLK


SA1 SCL DDR_XDP_SMBCLK 8,14,15,16,28
1 1 R1183 10K_0402_5%~D203 204 +0.75V_DDR_VTT
VTT VTT
C1141

C1142

+0.75V_DDR_VTT
205 206
2 2 GND1 GND2
FOX_AS0A626-U4SN-7F
A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII-SODIMM SLOT1
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 13 of 60
5 4 3 2 1
5 4 3 2 1

R88 0_0402_5%~D
1 2 +1.5V_MEM +1.5V_MEM
+V_DDR_REF
JDIMMB
10 DIMM1_VREF 1 VREF_DQ VSS 2
3 4 DDR_B_D4
VSS DQ4
JDIMMB H=9.2

2.2U_0603_6.3V6K~D

0.1U_0402_16V4Z~D
DDR_B_D0 5 6 DDR_B_D5
DDR_B_D1 DQ0 DQ5
7 DQ1 VSS 8
1 1 9 10 DDR_B_DQS#0
9 DDR_B_DQS#[0..7] DDR_B_DM0 VSS DQS0# DDR_B_DQS0
11 DM0 DQS0 12

C1143

C1144
9 DDR_B_D[0..63] Populate R88 for Intel DDR3 13 VSS VSS 14
DDR_B_D2 15 16 DDR_B_D6
VREFDQ multiple methods M1 2 2 DDR_B_D3 17
DQ2 DQ6
18 DDR_B_D7
9 DDR_B_DM[0..7] DQ3 DQ7
19 20
DDR_B_D8 VSS VSS DDR_B_D12
9 DDR_B_DQS[0..7] 21 22
D DDR_B_D9 DQ8 DQ12 DDR_B_D13 D
23 24
DQ9 DQ13
9 DDR_B_MA[0..15] 25 26
DDR_B_DQS#1 VSS VSS DDR_B_DM1
27 28
DDR_B_DQS1 DQS1# DM1 DDR3_DRAMRST#
29 30 DDR3_DRAMRST# 8,13
DQS1 RESET#
Note: 31
VSS VSS
32
DDR_B_D10 33 34 DDR_B_D14
Check voltage tolerance of DDR_B_D11 35
DQ10 DQ14
36 DDR_B_D15
DQ11 DQ15
VREF_DQ at the DIMM socket 37
VSS VSS
38
DDR_B_D16 39 40 DDR_B_D20
DDR_B_D17 DQ16 DQ20 DDR_B_D21
41 42
DQ17 DQ21
43 44
DDR_B_DQS#2 VSS VSS DDR_B_DM2
45 DQS2# DM2 46
DDR_B_DQS2 47 48
DQS2 VSS DDR_B_D22
49 VSS DQ22 50
DDR_B_D18 51 52 DDR_B_D23
DDR_B_D19 DQ18 DQ23
53 DQ19 VSS 54
Layout Note: 55 56 DDR_B_D28
DDR_B_D24 VSS DQ28 DDR_B_D29
57 58
Place near JDIMMB DDR_B_D25 59
DQ24 DQ29
60
DQ25 VSS DDR_B_DQS#3
61 VSS DQS3# 62
DDR_B_DM3 63 64 DDR_B_DQS3
DM3 DQS3
65 VSS VSS 66
DDR_B_D26 67 68 DDR_B_D30
DDR_B_D27 DQ26 DQ30 DDR_B_D31
69 DQ27 DQ31 70
71 VSS VSS 72
+1.5V_MEM
DDR_CKE2_DIMMB 73 74 DDR_CKE3_DIMMB
9 DDR_CKE2_DIMMB CKE0 CKE1 DDR_CKE3_DIMMB 9
75 VDD VDD 76
77 78 DDR_B_MA15
NC A15
0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

DDR_B_BS2 79 80 DDR_B_MA14
9 DDR_B_BS2 BA2 A14
1 1 1 1 81 VDD VDD 82
C1145

C1146

C1147

C1148

C DDR_B_MA12 DDR_B_MA11 C
83 A12/BC# A11 84
DDR_B_MA9 85 86 DDR_B_MA7
A9 A7
87 VDD VDD 88
2 2 2 2 DDR_B_MA8 DDR_B_MA6
89 A8 A6 90
DDR_B_MA5 91 92 DDR_B_MA4
A5 A4
93 VDD VDD 94
DDR_B_MA3 95 96 DDR_B_MA2
DDR_B_MA1 A3 A2 DDR_B_MA0
97 98
A1 A0
99 100
M_CLK_DDR2 VDD VDD M_CLK_DDR3
9 M_CLK_DDR2 101 102 M_CLK_DDR3 9
M_CLK_DDR#2 CK0 CK1 M_CLK_DDR#3
9 M_CLK_DDR#2 103 104 M_CLK_DDR#3 9
+1.5V_MEM CK0# CK1#
105 106
DDR_B_MA10 VDD VDD DDR_B_BS1
107 108 DDR_B_BS1 9
DDR_B_BS0 A10/AP BA1 DDR_B_RAS#
9 DDR_B_BS0 109 110
BA0 RAS# DDR_B_RAS# 9
111 112
VDD VDD
10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

DDR_B_WE# 113 114 DDR_CS2_DIMMB#


9 DDR_B_WE# DDR_B_CAS# WE# S0# M_ODT2 DDR_CS2_DIMMB# 9
9 DDR_B_CAS# 115 116 M_ODT2 9
CAS# ODT0
330U_SX_2VY~D

1 117 118
DDR_B_MA13 VDD VDD M_ODT3
1 1 1 1 1 1 119 120 M_ODT3 9
A13 ODT1
C1150

C1151

C1152

C1153

C1154

C1155

C1149

+ DDR_CS3_DIMMB# 121 122


9 DDR_CS3_DIMMB# S1# NC
123 124
VDD VDD
125 126 +V_DDR_REF
2 2 2 2 2 2 2 TEST VREF_CA
127 128
VSS VSS

2.2U_0603_6.3V6K~D

0.1U_0402_16V4Z~D
DDR_B_D32 129 130 DDR_B_D36
DDR_B_D33 DQ32 DQ36 DDR_B_D37
131 132
DQ33 DQ37
133 134 1 1
DDR_B_DQS#4 VSS VSS DDR_B_DM4
135 136
DQS4# DM4

C1156

C1157
DDR_B_DQS4 137 138
DQS4 VSS DDR_B_D38
139 140
DDR_B_D34 VSS DQ38 DDR_B_D39 2 2
141 142
DDR_B_D35 DQ34 DQ39
143 144
DQ35 VSS DDR_B_D44
145 146
B DDR_B_D40 VSS DQ44 DDR_B_D45 B
147 148
DDR_B_D41 DQ40 DQ45
Layout Note: 149
DQ41 VSS
150
151 152 DDR_B_DQS#5
Place near JDIMMB.203,204 DDR_B_DM5 153
VSS DQS5#
154 DDR_B_DQS5
DM5 DQS5
155 156
DDR_B_D42 VSS VSS DDR_B_D46
157 158
DDR_B_D43 DQ42 DQ46 DDR_B_D47
159 160
DQ43 DQ47
161 162
DDR_B_D48 VSS VSS DDR_B_D52
163 164
DDR_B_D49 DQ48 DQ52 DDR_B_D53
165 166
DQ49 DQ53
167 168
+0.75V_DDR_VTT DDR_B_DQS#6 VSS VSS DDR_B_DM6
169 170
DDR_B_DQS6 DQS6# DM6
171 172
DQS6 VSS DDR_B_D54
173 174
DDR_B_D50 VSS DQ54 DDR_B_D55
175 176
DDR_B_D51 DQ50 DQ55
177 178
DQ51 VSS
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

179 180 DDR_B_D60


DDR_B_D56 VSS DQ60 DDR_B_D61
1 1 1 1 181 182
DDR_B_D57 DQ56 DQ61
183 184
DQ57 VSS
C1158

C1159

C1160

C1161

185 186 DDR_B_DQS#7


DDR_B_DM7 VSS DQS7# DDR_B_DQS7
187 188
2 2 2 2 DM7 DQS7
189 190
DDR_B_D58 VSS VSS DDR_B_D62
191 192
DDR_B_D59 DQ58 DQ62 DDR_B_D63
193 194
DQ59 DQ63
195 196
+3.3V_RUN VSS VSS
197 198
SA0 EVENT# DDR_XDP_SMBDAT
+3.3V_RUN 199 200 DDR_XDP_SMBDAT 8,13,15,16,28
VDDSPD SDA DDR_XDP_SMBCLK
2 1 201 202 DDR_XDP_SMBCLK 8,13,15,16,28
SA1 SCL
+0.75V_DDR_VTT 203 204 +0.75V_DDR_VTT
VTT VTT
1

0.1U_0402_16V4Z~D

2.2U_0603_6.3V6K~D

R1184
10K_0402_5%~D

10K_0402_5%~D
R1185

1 1 205 GND1 GND2 206


C1162

C1163

A A
FOX_AS0A626-U8SN-7F
2

2 2

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DDRIII-SODIMM SLOT2
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 14 of 60
5 4 3 2 1
5 4 3 2 1

CMOS_CLR1 CMOS setting +3.3V_ALW_PCH @ JXDP2


Shunt Clear CMOS USB_OC0#_R @ R78 1 2 33_0402_5%~D XDP_FN0 1 2
18 USB_OC0#_R USB_OC1#_R @ R91 33_0402_5%~D XDP_FN1 +3.3V_ALW_PCH GND0 GND1 XDP_FN16
1 2 3 OBSFN_A0 OBSFN_C0 4
18 USB_OC1#_R USB_OC2# @ R101 33_0402_5%~D XDP_FN2 XDP_FN17
Open Keep CMOS +3.3V_RUN 18 USB_OC2# USB_OC3#
1 2
XDP_FN3
5 OBSFN_A1 OBSFN_C1 6
@ R102 1 2 33_0402_5%~D 1 7 8
18 USB_OC3# USB_OC4# @ R103 33_0402_5%~D XDP_FN4 XDP_FN0 GND2 GND3 XDP_FN8
1 2 9 OBSDATA_A0 OBSDATA_C0 10
18 USB_OC4# USB_OC5# @ R104 33_0402_5%~D XDP_FN5 @ C1375 XDP_FN1 XDP_FN9
ME_CLR1 TPM setting 18 USB_OC5#
1 2 11 OBSDATA_A1 OBSDATA_C1 12

1
USB_OC6# @ R105 1 2 33_0402_5%~D XDP_FN6 0.1U_0402_16V4Z~D 13 14
@ R62 18 USB_OC6# USB_OC7# @ R106 33_0402_5%~D XDP_FN7 2 XDP_FN2 GND4 GND5 XDP_FN10
Shunt Clear ME RTC Registers 18 USB_OC7# PCMCLK_REQ#
1 2
XDP_FN8 XDP_FN3
15 OBSDATA_A2 OBSDATA_C2 16
XDP_FN11
10K_0402_5%~D @ R107 1 2 33_0402_5%~D 17 18
16,34 PCMCLK_REQ# LANCLK_REQ# @ R108 33_0402_5%~D XDP_FN9 OBSDATA_A3 OBSDATA_C3
Open Keep ME RTC Registers 16,30 LANCLK_REQ# HDD_DET#_R @ R109
1 2
33_0402_5%~D XDP_FN10
19 GND6 GND7 20
1 2 21 22

2
GPIO19 @ R110 33_0402_5%~D XDP_FN11 OBSFN_B0 OBSFN_D0
1 2 23
OBSFN_B1 OBSFN_D1
24
CONTACTLESS_DET# @ R111 1 2 33_0402_5%~D XDP_FN12 25 26
D +RTC_CELL PCH_AZ_SYNC 19,31 CONTACTLESS_DET# GPIO37 @ R112 33_0402_5%~D XDP_FN13 XDP_FN4 GND8 GND9 XDP_FN12 D
19 GPIO37 1 2 27
OBSDATA_B0 OBSDATA_D0
28
EN_ESATA_RPTR# @ R113 1 2 33_0402_5%~D XDP_FN14 XDP_FN5 29 30 XDP_FN13
19,37 EN_ESATA_RPTR# OBSDATA_B1 OBSDATA_D1

1
TEMP_ALERT# @ R114 1 2 33_0402_5%~D XDP_FN15 31 32
19,39 TEMP_ALERT# GND10 GND11
1

R120 ROUSH_PAID_TS_DET# @ R115 1 2 33_0402_5%~D XDP_FN16 XDP_FN6 33 34 XDP_FN14


R217 100K_0402_5%~D 19 ROUSH_PAID_TS_DET# SIO_EXT_SCI#_R @ R116 33_0402_5%~D XDP_FN17 XDP_FN7 OBSDATA_B2 OBSDATA_D2 XDP_FN15
1 2 35 36
330K_0402_1%~D 19 SIO_EXT_SCI#_R OBSDATA_B3 OBSDATA_D3
@ 37 38
RESET_OUT# GND12 GND13 +3.3V_ALW_PCH
39 40

2
17,40 RESET_OUT# PWRGOOD/HOOK0 ITPCLK/HOOK4
1 2 PCH_PWRBTN#_XDP 41 42
2

PCH_INTVRMEN 8,17 SIO_PWRBTN#_R HOOK1 ITPCLK#/HOOK5


@ R69 0_0402_5%~D 43 44
VCC_OBS_AB VCC_OBS_CD PLTRST1#_XDP
45 46
C296 HOOK2 RESET#/HOOK6 XDP_DBRESET#
47 48
12P_0402_50V8J~D 0_0402_5%~D HOOK3 DBR#/HOOK7 XDP_DBRESET# 8,17
INTVRMEN- Integrated SUS On Die PLL VR is supplied by 49 GND14 GND15 50
2 1 PCH_RTCX1 @ R1532 1 2 DDR_XDP_SMBDAT_R2 51 52 PCH_JTAG_TDO
1.1V VRM Enable 1.5V when sampled high, 1.8 V 8,13,14,16,28 DDR_XDP_SMBDAT SDA TD0
@ R1533 1 2 DDR_XDP_SMBCLK_R2 53 54 PCH_JTAG_RST#_R 1 2 PCH_JTAG_RST#
8,13,14,16,28 DDR_XDP_SMBCLK SCL TRST# PCH_JTAG_TDI
High - Enable Internal VRs when sampled low 0_0402_5%~D 55 TCK1 TDI 56 @ R117

1
Disconnect to XDP trace, PCH_JTAG_TCK 57 58 PCH_JTAG_TMS 0_0402_5%~D
TCK0 TMS

3
R222 59 60
add R1532/1533 GND16 GND17

NC NC
Y1 10M_0402_5%~D
32.768K_12.5PF_Q13MC30610018~D SAMTE_BSH-030-01-L-D-A
U73A

2
C297 R223 V1.5
12P_0402_50V8J~D 0_0402_5%~D B13 D33 LPC_LAD0
PCH_RTCX2 RTCX1 FWH0 / LAD0 LPC_LAD1 LPC_LAD0 31,32,39,40
2 1 1 2 D13 B33 LPC_LAD1 31,32,39,40
RTCX2 FWH1 / LAD1 LPC_LAD2
FWH2 / LAD2 C32 LPC_LAD2 31,32,39,40
A32 LPC_LAD3 @ R118
FWH3 / LAD3 LPC_LAD3 31,32,39,40
+RTC_CELL 1 2 PCH_RTCRST# C14 1K_0402_5%~D
R224 20K_0402_1%~D RTCRST# LPC_LFRAME# PLTRST1#_XDP 1
C34 2 PLTRST_XDP# 18
SRTCRST# FWH4 / LFRAME# LPC_LFRAME# 31,32,39,40
1 2 D17 SRTCRST#
R225 20K_0402_5%~D A34 LPC_LDRQ0#

LPC
RTC
INTRUDER# LDRQ0# LPC_LDRQ1# LPC_LDRQ0# 39
1 2 A16 F34
R226 1M_0402_5%~D INTRUDER# LDRQ1# / GPIO23 LPC_LDRQ1# 39
2 1 PCH_INTVRMEN A14 AB9 IRQ_SERIRQ +3.3V_RUN
C INTVRMEN SERIRQ IRQ_SERIRQ 31,32,39,40 C
C300 R265
27P_0402_50V8J~D R236 10K_0402_5%~D
1 2 1 2 33_0402_5%~D IRQ_SERIRQ 2 1
1 2 1 2 PCH_AZ_BITCLK
37 PCH_AZ_MDC_BITCLK 1 2 A30 HDA_BCLK
SATA0RXN AK7 PSATA_PRX_DTX_N0_C 28
1 2 PCH_AZ_SYNC D29 AK6
37 PCH_AZ_MDC_SYNC HDA_SYNC SATA0RXP PSATA_PRX_DTX_P0_C 28
@ @ R238 33_0402_5%~D AK11 HDD
ME1 SHORT PADS~D CMOS1 SHORT PADS~D SATA0TXN PSATA_PTX_DRX_N0_C 28
29 SPKR P1 AK9
SPKR SATA0TXP PSATA_PTX_DRX_P0_C 28
1 2 1 2
C298 1U_0402_6.3V6K~D C299 1U_0402_6.3V6K~D 1 2 PCH_AZ_RST# C30
37 PCH_AZ_MDC_RST# HDA_RST#
CMOS place near DIMM R240 33_0402_5%~D AH6
SATA1RXN SATA_ODD_PRX_DTX_N1_C 28
AH5 SATA_ODD_PRX_DTX_P1_C 28
PCH_AZ_CODEC_SDIN0 SATA1RXP
29 PCH_AZ_CODEC_SDIN0 G30
HDA_SDIN0 SATA1TXN
AH9
SATA_ODD_PTX_DRX_N1_C 28 ODD
AH8
SATA1TXP SATA_ODD_PTX_DRX_P1_C 28
29 PCH_AZ_CODEC_SDOUT 1 2 PCH_AZ_SDOUT 37 PCH_AZ_MDC_SDIN1
PCH_AZ_MDC_SDIN1 F30
HDA_SDIN1
R234 33_0402_5%~D AF11
SATA2RXN
29 PCH_AZ_CODEC_SYNC 1 2 PCH_AZ_SYNC E32 AF9

IHDA
R235 33_0402_5%~D HDA_SDIN2 SATA2RXP
AF7
SATA2TXN
29 PCH_AZ_CODEC_RST# 1 2 PCH_AZ_RST# F32
HDA_SDIN3 SATA2TXP
AF6
R239 33_0402_5%~D
29 PCH_AZ_CODEC_BITCLK 1 2 PCH_AZ_BITCLK SATA3RXN
AH3
1 R241 33_0402_5%~D 1 2 PCH_AZ_SDOUT B29 AH1
37 PCH_AZ_MDC_SDOUT HDA_SDO SATA3RXP
R242 33_0402_5%~D AF3
C302 +3.3V_ALW_PCH SATA3TXN
AF1
27P_0402_50V8J~D ME_FWP SATA3TXP
39 ME_FWP H32

SATA
2 HDA_DOCK_EN# / GPIO33
AD9 ESATA_PRX_DTX_N4_C 37
SATA4RXN
1

USB_MCARD3_DET# J30 AD8


36 USB_MCARD3_DET# HDA_DOCK_RST# / GPIO13 SATA4RXP ESATA_PRX_DTX_P4_C 37
R123 AD6 E-SATA
0_0603_5%~D SATA4TXN ESATA_PTX_DRX_N4_C 37
AD5
SATA4TXP ESATA_PTX_DRX_P4_C 37
Stuff R128,no stuff R123
51_0402_1%~D 2 1 R804 PCH_JTAG_TCK M3 AD3
2

when production JTAG_TCK SATA5RXN SATA_PRX_DKTX_N5_C 38


AD1 SATA_PRX_DKTX_P5_C 38
B 200_0402_5%~D 2 R807 PCH_JTAG_TMS SATA5RXP B
1 K3
JTAG_TMS SATA5TXN
AB3
SATA_PTX_DKRX_N5_C 38 DOCKED
AB1
200_0402_5%~D 2 R805 PCH_JTAG_TDI SATA5TXP SATA_PTX_DKRX_P5_C 38
1 K1
JTAG_TDI

JTAG
200_0402_5%~D 2 1 R806 PCH_JTAG_TDO J2 AF16 +1.05V_RUN
JTAG_TDO SATAICOMPO R1201
PAD~D T174 PCH_JTAG_RST# J4 AF15 SATA_COMP 1 2
TRST# SATAICOMPI
100_0402_5%~D

100_0402_5%~D

100_0402_5%~D

200 MIL SO8


1

37.4_0402_1%~D
+3.3V_RUN
R1281

R1282

R1315

+3.3V_M
64Mb Flash ROM C328 PCH_SPI_CLK BA2
SPI_CLK
For iAMT 1 2
1

1
PCH_SPI_CS0# AV3
2

SPI_CS0#
1

R298 0.1U_0402_16V4Z~D
3.3K_0402_5%~D R299 PCH_SPI_CS1# AY3 T3 SATA_ACT#_R R382
3.3K_0402_5%~D SPI_CS1# SATALED# SATA_ACT#_R 43 43K_0402_5%~D
U12 R131
2

2
PCH_SPI_CS0# 1 8 PCH_SPI_DO AY1 Y9 HDD_DET#_R 1 2
2

/CS VCC SPI_MOSI SATA0GP / GPIO21 HDD_DET# 28


0_0402_5%~D

SPI
PCH_SPI_DIN 2 7 PCH_SPI_DIN 1 2 PCH_SPI_DIN_R AV1 V1 GPIO19 2 1 +3.3V_RUN
DO /HOLD R1247 33_0402_5%~D SPI_MISO SATA1GP / GPIO19 R58
SPI_WP#_SEL 1 2 3 6 PCH_SPI_CLK 10K_0402_5%~D
@ R1246 0_0402_5%~D /WP CLK BD82QM57-SLGZQ-B3_FCBGA1071~D
4 5 PCH_SPI_DO +3.3V_RUN
SPI_WP#_SEL 39 GND DIO
PCH JTAG Enable PCH JTAG Disable Production @R264
@ R264
1K_0402_5%~D
W25Q64BVSSIG_SO8~D SPKR 2 1
PCH Pin Ref. ES1 ES2 ES1 ES2 All
+3.3V_M
C1205 R806 No Stuff 200 ohm No Stuff No Stuff No Stuff No Reboot Strap
1 2 TDO
R1315 No Stuff 100 ohm No Stuff No Stuff No Stuff Low = Default
1

A 0.1U_0402_16V4Z~D SPKR A
R1237 200 MIL SO8 R807 200 ohm 200 ohm No Stuff No Stuff No Stuff High = No Reboot
1

3.3K_0402_5%~D
32Mb Flash ROM TMS
R1238 R1281 100 ohm 100 ohm No Stuff No Stuff No Stuff
U13 3.3K_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
2

PCH_SPI_CS1# 1 8 R805 200 ohm 200 ohm 20K ohm No Stuff No Stuff
/CS VCC
TDI
2

PCH_SPI_DIN R1282 No Stuff No Stuff


2 DO /HOLD 7 100 ohm 100 ohm 10K ohm Compal Electronics, Inc.
SPI_WP#_SEL 1 2 3 6 PCH_SPI_CLK TCK R804 4.7K ohm 4.7K ohm 4.7K ohm 4.7K ohm No Stuff Title
/WP CLK
@ R1060 0_0402_5%~D
4 5 PCH_SPI_DO R808 20K ohm 20K ohm No Stuff No Stuff PCH (1/8)
GND DIO Size Document Number Rev
TRST#
R1316 10K ohm 10K ohm No Stuff No Stuff 0.1
W25Q32BVSSIG_SO8~D LA-5571P
Date: Thursday, January 21, 2010 Sheet 15 of 60
5 4 3 2 1
5 4 3 2 1

+3.3V_RUN

2
@ Q190A
DMN66D0LDW-7_SOT363-6~D
MEM_SMBCLK 6 1 DDR_XDP_SMBCLK
DDR_XDP_SMBCLK 8,13,14,15,28

5
D MEM_SMBDATA DDR_XDP_SMBDAT D
3 4 DDR_XDP_SMBDAT 8,13,14,15,28
@ Q190B
DMN66D0LDW-7_SOT363-6~D
U73B
1 2
V1.5 R51 0_0402_5%~D
PCIE_PRX_WANTX_N1 BG30 B9 PCH_SMB_ALERT#
36 PCIE_PRX_WANTX_N1 PCIE_PRX_WANTX_P1 BJ30 PERN1 SMBALERT# / GPIO11
36 PCIE_PRX_WANTX_P1 1 2
C317 1 PCIE_PTX_WANRX_N1 BF29 PERP1 MEM_SMBCLK
MiniWWAN (Mini Card 1)---> 2 0.1U_0402_10V7K~D PETN1 SMBCLK
H14 R54 0_0402_5%~D
36 PCIE_PTX_WANRX_N1_C C319 1 PCIE_PTX_WANRX_P1 BH29
36 PCIE_PTX_WANRX_P1_C 2 0.1U_0402_10V7K~D PETP1
C8 MEM_SMBDATA
PCIE_PRX_WLANTX_N2 AW30 SMBDATA
36 PCIE_PRX_WLANTX_N2 PERN2 +3.3V_ALW_PCH
PCIE_PRX_WLANTX_P2 BA30
36 PCIE_PRX_WLANTX_P2 PCIE_PTX_WLANRX_N2 BC30 PERP2
MiniWLAN (Mini Card 2)---> C320 1 2 0.1U_0402_10V7K~D J14
36 PCIE_PTX_WLANRX_N2_C C321 1 PCIE_PTX_WLANRX_P2 BD30 PETN2 SML0ALERT# / GPIO60
2 0.1U_0402_10V7K~D
36 PCIE_PTX_WLANRX_P2_C PETP2 LAN_SMBCLK SML1_SMBCLK
SML0CLK C6 LAN_SMBCLK 30 1 2
PCIE_PRX_PCMTX_N3 AU30 R1178 2.2K_0402_5%~D

SMBus
33 PCIE_PRX_PCMTX_N3 PERN3
PCIE_PRX_PCMTX_P3 AT30 G8 LAN_SMBDATA SML1_SMBDATA 1 2
33 PCIE_PRX_PCMTX_P3 PCIE_PTX_PCMRX_N3 PERP3 SML0DATA LAN_SMBDATA 30
PCMCIA---> C1373 1 2 0.1U_0402_10V7K~D AU32 R1179 2.2K_0402_5%~D
33 PCIE_PTX_PCMRX_N3_C C1374 1 PCIE_PTX_PCMRX_P3 PETN3
2 0.1U_0402_10V7K~D AV32
33 PCIE_PTX_PCMRX_P3_C PETP3
SML1ALERT# / GPIO74 M14
PCIE_PRX_EXPTX_N4 BA32
34 PCIE_PRX_EXPTX_N4 PCIE_PRX_EXPTX_P4 PERN4 SML1_SMBCLK
34 PCIE_PRX_EXPTX_P4 BB32 PERP4 SML1CLK / GPIO58 E10 SML1_SMBCLK 40
Express card---> C1008 1 2 0.1U_0402_10V7K~D PCIE_PTX_EXPRX_N4 BD32
34 PCIE_PTX_EXPRX_N4_C C1009 1 PCIE_PTX_EXPRX_P4 PETN4 SML1_SMBDATA +3.3V_ALW_PCH
34 PCIE_PTX_EXPRX_P4_C 2 0.1U_0402_10V7K~D BE32 PETP4 SML1DATA / GPIO75 G12 SML1_SMBDATA 40

PCI-E*
PCIE_PRX_WPANTX_N5 BF33
36 PCIE_PRX_WPANTX_N5 PCIE_PRX_WPANTX_P5 BH33 PERN5 PCH_CL_CLK1 MEM_SMBCLK
MiniPCIE/SATA 36 PCIE_PRX_WPANTX_P5 PERP5 CL_CLK1 T13 PCH_CL_CLK1 36 2 1

Controller
C1025 1 2 0.1U_0402_10V7K~D PCIE_PTX_WPANRX_N5 BG32 @ R252 2.2K_0402_5%~D
(Mini Card 3)---> 36 PCIE_PTX_WPANRX_N5_C C1024 1 2 0.1U_0402_10V7K~D PCIE_PTX_WPANRX_P5 BJ32 PETN5
T11 PCH_CL_DATA1 MEM_SMBDATA 2 1
36 PCIE_PTX_WPANRX_P5_C PETP5 CL_DATA1 PCH_CL_DATA1 36
@ R255 2.2K_0402_5%~D

Link
C PCIE_PRX_GLANTX_N6 PCH_CL_RST1# PCH_SMB_ALERT# 2 C
30 PCIE_PRX_GLANTX_N6 BA34 PERN6 CL_RST1# T9 1
PCIE_PRX_GLANTX_P6 PCH_CL_RST1# 36 R1175 10K_0402_5%~D
30 PCIE_PRX_GLANTX_P6 AW34 PERP6
10/100/1G LAN ---> C326 1 2 0.1U_0402_10V7K~D PCIE_PTX_GLANRX_N6 BC34 R1
30 PCIE_PTX_GLANRX_N6_C C327 1 PCIE_PTX_GLANRX_P6 PETN6 10K_0402_5%~D
30 PCIE_PTX_GLANRX_P6_C 2 0.1U_0402_10V7K~D BD34 PETP6
PEG_A_CLKRQ# / GPIO47 H1 1 2
AT34 PERN7
AU34 +3.3V_LAN
PERP7
AU36 AD43
PETN7 CLKOUT_PEG_A_N
AV36 AD45
PETP7 CLKOUT_PEG_A_P LAN_SMBCLK 2 1
BG34 AN4 CLK_CPU_EXP# R309 2.2K_0402_5%~D
PERN8 CLKOUT_DMI_N

PEG
CLK_CPU_EXP CLK_CPU_EXP# 8 LAN_SMBDATA
BJ34 AN2 2 1
PERP8 CLKOUT_DMI_P CLK_CPU_EXP 8 R377 2.2K_0402_5%~D
BG36
PETN8
BJ36
PETP8 CLK_CPU_DPLL#
AT1
CLKOUT_DP_N / CLKOUT_BCLK1_N CLK_CPU_DPLL CLK_CPU_DPLL# 8
AT3
CLKOUT_DP_P / CLKOUT_BCLK1_P CLK_CPU_DPLL 8
AK48
CLKOUT_PCIE0N
AK47
CLKOUT_PCIE0P

From CLK BUFFER


AW24 CLK_BUF_EXP#
PCIECLKREQ0# CLKIN_DMI_N CLK_BUF_EXP CLK_BUF_EXP# 6
+3.3V_ALW_PCH 1 2 P9 BA24 CLK_BUF_EXP 6
R122 10K_0402_5%~D PCIECLKRQ0# / GPIO73 CLKIN_DMI_P

R1198 1 2 0_0402_5%~D PCIE_LAN# AM43 AP3 CLK_BUF_BCLK#


30 CLK_PCIE_LAN# PCIE_LAN CLKOUT_PCIE1N CLKIN_BCLK_N CLK_BUF_BCLK CLK_BUF_BCLK# 6
R1199 1 2 0_0402_5%~D AM45 AP1
30 CLK_PCIE_LAN CLKOUT_PCIE1P CLKIN_BCLK_P CLK_BUF_BCLK 6
10/100/1G LAN --->
LANCLK_REQ# U4
15,30 LANCLK_REQ# PCIECLKRQ1# / GPIO18 CLK_BUF_DOT96#
F18 CLK_BUF_DOT96# 6
CLKIN_DOT_96N CLK_BUF_DOT96
E18 CLK_BUF_DOT96 6
R1293 PCIE_PCM# CLKIN_DOT_96P
33 CLK_PCIE_PCM# 2 1 0_0402_5%~D AM47
CLKOUT_PCIE2N
R1294 2 1 0_0402_5%~D PCIE_PCM AM48
33 CLK_PCIE_PCM CLKOUT_PCIE2P CLK_BUF_CKSSCD#
PCMCIA---> +3.3V_RUN 1 2 CLKIN_SATA_N / CKSSCD_N
AH13 CLK_BUF_CKSSCD# 6
R876 10K_0402_5%~D PCMCLK_REQ# N4 AH12 CLK_BUF_CKSSCD
B 15,34 PCMCLK_REQ# PCIECLKRQ2# / GPIO20 CLKIN_SATA_P / CKSSCD_P CLK_BUF_CKSSCD 6 B

R1297 2 1 0_0402_5%~D PCIE_MINI3# AH42 P41 CLK_PCH_14M


36 CLK_PCIE_MINI3# PCIE_MINI3 CLKOUT_PCIE3N REFCLK14IN CLK_PCH_14M 6
MiniWPAN (Mini Card 3)---> R1302 2 1 0_0402_5%~D AH41
36 CLK_PCIE_MINI3 CLKOUT_PCIE3P
+3.3V_ALW_PCH R61 2 1 10K_0402_5%~D
MINI3CLK_REQ# A8 J42 CLK_PCI_LOOPBACK
36 MINI3CLK_REQ# PCIECLKRQ3# / GPIO25 CLKIN_PCILOOPBACK CLK_PCI_LOOPBACK 18
R379
0_0402_5%~D
R1205 2 1 0_0402_5%~D PCIE_EXP# AM51 AH51 XTAL25_IN 2 1
34 CLK_PCIE_EXP# PCIE_EXP CLKOUT_PCIE4N XTAL25_IN XTAL25_OUT
Express card---> R1206 2 1 0_0402_5%~D AM53 AH53
34 CLK_PCIE_EXP CLKOUT_PCIE4P XTAL25_OUT

1
+3.3V_ALW_PCH R523 2 1 10K_0402_5%~D
EXPCLK_REQ# M9 AF38 1 2 +1.05V_RUN R685
34 EXPCLK_REQ# PCIECLKRQ4# / GPIO26 XCLK_RCOMP R686 90.9_0402_1%~D 1M_0402_5%~D
Y6
R1203 2 1 0_0402_5%~D PCIE_MINI2# AJ50 T45 SIO_14M R1223 2 1 22_0402_5%~D 25MHZ_12PF_X5H025000FC1H-H~D
36 CLK_PCIE_MINI2# CLK_SIO_14M 39

2
R1196 PCIE_MINI2 CLKOUT_PCIE5N CLKOUTFLEX0 / GPIO64
36 CLK_PCIE_MINI2 2 1 0_0402_5%~D AJ52 2 1
R45 CLKOUT_PCIE5P
MiniWLAN (Mini Card 2)---> +3.3V_ALW_PCH 2 1 10K_0402_5%~D

12P_0402_50V8J~D

12P_0402_50V8J~D
MINI2CLK_REQ# H6 P43 PCI_TCM 3@ R1220 2 1 22_0402_5%~D
Clock Flex

36 MINI2CLK_REQ# PCIECLKRQ5# / GPIO44 CLKOUTFLEX1 / GPIO65 CLK_PCI_TPM_CHA 32


2 2

C1168

C1169
R1195 2 1 0_0402_5%~D PCIE_MINI1# AK53 T42 PCI_TPM R1219 2 1 22_0402_5%~D
36 CLK_PCIE_MINI1# PCIE_MINI1 CLKOUT_PEG_B_N CLKOUTFLEX2 / GPIO66 CLK_PCI_TPM 31
R1202 2 1 0_0402_5%~D AK51
36 CLK_PCIE_MINI1 R40 CLKOUT_PEG_B_P 1 1
MiniWWAN (Mini Card 1)---> +3.3V_ALW_PCH 2 1 10K_0402_5%~D
MINI1CLK_REQ# P13 N50 JETWAY_14M @ R910 2 1 22_0402_5%~D
36 MINI1CLK_REQ# PEG_B_CLKRQ# / GPIO56 CLKOUTFLEX3 / GPIO67 JETWAY_CLK14M 32

BD82QM57-SLGZQ-B3_FCBGA1071~D

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (2/8)
Size Document Number Rev
0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 16 of 60
5 4 3 2 1
5 4 3 2 1

+3.3V_RUN
NO CONNECT FOR DISCRETE

1
R887 R890
2.2K_0402_5%~D 2.2K_0402_5%~D
1 2
@ R1526

2
0_0402_5%~D

G_CLK_DDC2 1 6 PCH_CRT_DDC_CLK
D PCH_CRT_DDC_CLK 27 D
Q217A
DMN66D0LDW-7_SOT363-6~D

2
+3.3V_ALW_PCH +3.3V_RUN

5
Q217B
+3.3V_RUN DMN66D0LDW-7_SOT363-6~D
G_DAT_DDC2 4 3 PCH_CRT_DDC_DAT
ME_SUS_PWR_ACK PCH_CRT_DDC_DAT 27
2 1
R269 10K_0402_5%~D CLKRUN# 2 1
R282 8.2K_0402_5%~D
PCH_PCIE_WAKE# 2 1 1 2
R268 10K_0402_5%~D @ R1527
0_0402_5%~D
SIO_SLP_LAN# 2 1
R380 10K_0402_5%~D

PCH_RI# 2 1
R267 10K_0402_5%~D

Intel request DDPB can not support eDP


U73C U73D
V1.5 BA18 FDI_CTX_PRX_N0
DMI_CTX_PRX_N0 FDI_RXN0 FDI_CTX_PRX_N1 FDI_CTX_PRX_N0 7 PANEL_BKEN_PCH V1.5
7 DMI_CTX_PRX_N0 BC24 DMI0RXN FDI_RXN1 BH17 FDI_CTX_PRX_N1 7 T48 L_BKLTEN SDVO_TVCLKINN BJ46
DMI_CTX_PRX_N1 FDI_CTX_PRX_N2 39 PANEL_BKEN_PCH ENVDD_PCH
7 DMI_CTX_PRX_N1 BJ22 DMI1RXN FDI_RXN2 BD16 FDI_CTX_PRX_N2 7 24,39 ENVDD_PCH T47 L_VDD_EN SDVO_TVCLKINP BG46
DMI_CTX_PRX_N2 AW20 BJ16 FDI_CTX_PRX_N3
7 DMI_CTX_PRX_N2 DMI2RXN FDI_RXN3 FDI_CTX_PRX_N3 7
DMI_CTX_PRX_N3 BJ20 BA16 FDI_CTX_PRX_N4 BIA_PWM_PCH Y48 BJ48
7 DMI_CTX_PRX_N3 DMI3RXN FDI_RXN4 FDI_CTX_PRX_N5 FDI_CTX_PRX_N4 7 24 BIA_PWM_PCH L_BKLTCTL SDVO_STALLN
FDI_RXN5 BE14 FDI_CTX_PRX_N5 7 SDVO_STALLP BG48
DMI_CTX_PRX_P0 BD24 BA14 FDI_CTX_PRX_N6 AB48
C 7 DMI_CTX_PRX_P0 DMI_CTX_PRX_P1 DMI0RXP FDI_RXN6 FDI_CTX_PRX_N7 FDI_CTX_PRX_N6 7 L_DDC_CLK C
7 DMI_CTX_PRX_P1 BG22 DMI1RXP FDI_RXN7 BC12 FDI_CTX_PRX_N7 7 Y45 L_DDC_DATA SDVO_INTN BF45
DMI_CTX_PRX_P2 BA20 BH45
7 DMI_CTX_PRX_P2 DMI2RXP SDVO_INTP
DMI_CTX_PRX_P3 BG20 BB18 FDI_CTX_PRX_P0 AB46
7 DMI_CTX_PRX_P3 DMI3RXP FDI_RXP0 FDI_CTX_PRX_P1 FDI_CTX_PRX_P0 7 L_CTRL_CLK
FDI_RXP1 BF17 FDI_CTX_PRX_P1 7 V48 L_CTRL_DATA
DMI_CRX_PTX_N0 BE22 BC16 FDI_CTX_PRX_P2
7 DMI_CRX_PTX_N0 DMI_CRX_PTX_N1 DMI0TXN FDI_RXP2 FDI_CTX_PRX_P3 FDI_CTX_PRX_P2 7
7 DMI_CRX_PTX_N1 BF21 DMI1TXN FDI_RXP3 BG16 FDI_CTX_PRX_P3 7 AP39 LVD_IBG SDVO_CTRLCLK T51 PCH_SDVO_CTRLCLK 26
DMI_CRX_PTX_N2 BD20 AW16 FDI_CTX_PRX_P4 AP41 T53
7 DMI_CRX_PTX_N2 DMI_CRX_PTX_N3 DMI2TXN FDI_RXP4 FDI_CTX_PRX_P5 FDI_CTX_PRX_P4 7 LVD_VBG SDVO_CTRLDATA PCH_SDVO_CTRLDATA 26
7 DMI_CRX_PTX_N3 BE18 BD14 FDI_CTX_PRX_P5 7
DMI3TXN FDI_RXP5 FDI_CTX_PRX_P6
BB14 FDI_CTX_PRX_P6 7 AT43
DMI_CRX_PTX_P0 FDI_RXP6 FDI_CTX_PRX_P7 LVD_VREFH
7 DMI_CRX_PTX_P0 BD22 BD12 FDI_CTX_PRX_P7 7 AT42 BG44
DMI_CRX_PTX_P1 DMI0TXP FDI_RXP7 LVD_VREFL DDPB_AUXN DPB_PCH_AUX# 26
7 DMI_CRX_PTX_P1 BH21 BJ44
DMI_CRX_PTX_P2 DMI1TXP DDPB_AUXP DPB_PCH_AUX 26
7 DMI_CRX_PTX_P2 BC20 AU38
DMI2TXP DDPB_HPD DPB_PCH_HPD 26

LVDS
DMI_CRX_PTX_P3 BD18 BJ14 FDI_INT AV53
7 DMI_CRX_PTX_P3 DMI3TXP FDI_INT FDI_INT 7 LVDSA_CLK#
AV51 BD42
DMI
FDI

+1.05V_RUN FDI_FSYNC0 LVDSA_CLK DDPB_0N DPB_PCH_LANE_N0 26


BF13 FDI_FSYNC0 7 BC42
FDI_FSYNC0 DDPB_0P DPB_PCH_LANE_P0 26
BH25 BB47 BJ42
R385 DMI_ZCOMP FDI_FSYNC1 LVDSA_DATA#0 DDPB_1N DPB_PCH_LANE_N1 26
BH13 BA52 BG42

Digital Display Interface


DMI_COMP_R FDI_FSYNC1 FDI_FSYNC1 7 LVDSA_DATA#1 DDPB_1P DPB_PCH_LANE_P1 26
1 2 BF25 AY48 BB40
DMI_IRCOMP FDI_LSYNC0 LVDSA_DATA#2 DDPB_2N DPB_PCH_LANE_N2 26
BJ12 FDI_LSYNC0 7 AV47 BA40
49.9_0402_1%~D FDI_LSYNC0 LVDSA_DATA#3 DDPB_2P DPB_PCH_LANE_P2 26
AW38
FDI_LSYNC1 DDPB_3N DPB_PCH_LANE_N3 26
BG14 FDI_LSYNC1 7 BB48 BA38
FDI_LSYNC1 LVDSA_DATA0 DDPB_3P DPB_PCH_LANE_P3 26
BA50
PCH_PWROK R48 LVDSA_DATA1
1 2 8.2K_0402_5%~D AY49
LVDSA_DATA2
AV48 Y49 PCH_DDPC_CTRLCLK 25
PCH_RSMRST# R260 1 LVDSA_DATA3 DDPC_CTRLCLK
2 10K_0402_5%~D AB49 PCH_DDPC_CTRLDATA 25
DDPC_CTRLDATA
AP48
LVDSB_CLK#
AP47 BE44
XDP_DBRESET# PCH_PCIE_WAKE# LVDSB_CLK DDPC_AUXN DPC_PCH_DOCK_AUX# 25
8,15 XDP_DBRESET# T6 J12 PCH_PCIE_WAKE# 39 BD44
SYS_RESET# WAKE# DDPC_AUXP DPC_PCH_DOCK_AUX 25
AY53 AV40
LVDSB_DATA#0 DDPC_HPD DPC_PCH_DOCK_HPD 38
AT49
SYS_PWROK CLKRUN# LVDSB_DATA#1
1 2 M6 Y1 CLKRUN# 32,39,40 AU52 BE40
B R253 0_0402_5%~D SYS_PWROK CLKRUN# / GPIO32 LVDSB_DATA#2 DDPC_0N DPC_PCH_LANE_N0 38 B
AT53 BD40
LVDSB_DATA#3 DDPC_0P DPC_PCH_LANE_P0 38
BF41
DDPC_1N DPC_PCH_LANE_N1 38
System Power Management

1 2 PCH_PWROK B17 AY51 BH41


15,40 RESET_OUT# PWROK LVDSB_DATA0 DDPC_1P DPC_PCH_LANE_P1 38
R254 0_0402_5%~D AT48 BD38
LVDSB_DATA1 DDPC_2N DPC_PCH_LANE_N2 38
AU50 BC38
PM_MEPWROK_R SUS_STAT#/LPCPD# T173 PAD~D LVDSB_DATA2 DDPC_2P DPC_PCH_LANE_P2 38
40 PM_MEPWROK 1 2 K5 P8 AT51 BB36
R256 0_0402_5%~D MEPWROK SUS_STAT# / GPIO61 LVDSB_DATA3 DDPC_3N DPC_PCH_LANE_N3 38
BA36
DDPC_3P DPC_PCH_LANE_P3 38
1 2 LAN_RST# A10 F3 SUSCLK T179 PAD~D
R257 0_0402_5%~D LAN_RST# SUSCLK / GPIO62 PCH_CRT_BLU
27 PCH_CRT_BLU AA52 U50 PCH_DDPD_CTRLCLK 25
T2 PAD~D PCH_CRT_GRN CRT_BLUE DDPD_CTRLCLK
27 PCH_CRT_GRN AB53 U52 PCH_DDPD_CTRLDATA 25
PM_DRAM_PWRGD SIO_SLP_S5# PCH_CRT_RED CRT_GREEN DDPD_CTRLDATA
8 PM_DRAM_PWRGD D9 E4 27 PCH_CRT_RED AD53
DRAMPWROK SLP_S5# / GPIO63 SIO_SLP_S5# 40 CRT_RED
T3 PAD~D BC46
PCH_RSMRST# SIO_SLP_S4# G_CLK_DDC2 DDPD_AUXN DPD_PCH_DOCK_AUX# 25
40 PCH_RSMRST# C16 H7 V51 BD46
RSMRST# SLP_S4# SIO_SLP_S4# 39 G_DAT_DDC2 CRT_DDC_CLK DDPD_AUXP DPD_PCH_DOCK_AUX 25
V53 AT38
T4 PAD~D CRT_DDC_DATA DDPD_HPD DPD_PCH_DOCK_HPD 38
ME_SUS_PWR_ACK M1 P12 SIO_SLP_S3# R480 20_0402_1%~D BJ40
40 ME_SUS_PWR_ACK SUS_PWR_DN_ACK / GPIO30 SLP_S3# SIO_SLP_S3# 39 DDPD_0N DPD_PCH_LANE_N0 38
8,15 SIO_PWRBTN#_R 27 PCH_CRT_HSYNC 1 2 HSYNC Y53
CRT_HSYNC DDPD_0P
BG40
DPD_PCH_LANE_P0 38
T5 PAD~D
27 PCH_CRT_VSYNC 1 2 VSYNC Y51 BJ38
SIO_PWRBTN#_R SIO_SLP_M# R673 20_0402_1%~D CRT_VSYNC DDPD_1N DPD_PCH_LANE_N1 38
40 SIO_PWRBTN# 1 2 P5 K8 BG38
PWRBTN# SLP_M# SIO_SLP_M# 39,48 DDPD_1P DPD_PCH_LANE_P1 38

CRT
R53 0_0402_5%~D BF37
CRT_IREF DDPD_2N DPD_PCH_LANE_N2 38
AD48 BH37
AC_PRESENT DAC_IREF DDPD_2P DPD_PCH_LANE_P2 38
40 AC_PRESENT P7 N2 AB51 BE36
ACPRESENT / GPIO31 TP23 CRT_IRTN DDPD_3N DPD_PCH_LANE_N3 38
BD36
DDPD_3P DPD_PCH_LANE_P3 38

1
T6 PAD~D
+3.3V_ALW_PCH 1 2 PCH_BATLOW# A6 BJ10 H_PM_SYNC
H_PM_SYNC 8
BD82QM57-SLGZQ-B3_FCBGA1071~D
R275 8.2K_0402_5%~D BATLOW# / GPIO72 PMSYNCH R672
1K_0402_0.5%~D
PCH_RI# F14 F6

2
RI# SLP_LAN# / GPIO29

A BD82QM57-SLGZQ-B3_FCBGA1071~D A
SIO_SLP_LAN# 1 2 PCH_CRT_BLU
SIO_SLP_LAN# 30,39 R679 150_0402_1%~D
1 2 PCH_CRT_GRN
R680 150_0402_1%~D
1
R681
2 PCH_CRT_RED
150_0402_1%~D
DELL CONFIDENTIAL/PROPRIETARY
1 2 ENVDD_PCH Compal Electronics, Inc.
R682 100K_0402_5%~D
Title
PCH (3/8)
Size Document Number Rev
0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 17 of 60
5 4 3 2 1
5 4 3 2 1

Stuff: R78,R89,R101~R116
+3.3V_RUN PCH XDP ENABLE
RP3 No Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
1 8 PCI_DEVSEL#
2 7 PCI_PIRQA#
3 6 PCI_PLOCK# Stuff: R71,R77,RP1,RP2,R45,R40,R131,R58,R1242,R1243,R1244,R1245,R74,R130
4 5 PCI_PERR# PCH XDP DISABLE
8.2K_1206_8P4R_5%~D No Stuff: R78,R89,R101~R116
RP4
1 8 PCI_TRDY# U73E
D PCI_FRAME# V1.5 D
2 7 H40
AD0 NV_CE#0
AY9
3 6 PCI_REQ1# N34 BD1
PCI_PIRQD# AD1 NV_CE#1
4 5 C44
AD2 NV_CE#2
AP15
A38 BD8
8.2K_1206_8P4R_5%~D AD3 NV_CE#3
C36
AD4 +VCCPNAND
J34 AV9
AD5 NV_DQS0
A40 BG8
AD6 NV_DQS1
D45
AD7

1
+3.3V_RUN E36 AP7
AD8 NV_DQ0 / NV_IO0 @ R872
H48 AP6
RP5 AD9 NV_DQ1 / NV_IO1 10K_0402_5%~D
E40 AT6
PCI_PIRQB# AD10 NV_DQ2 / NV_IO2
1 8 C40 AD11 NV_DQ3 / NV_IO3 AT9
2 7 PCI_REQ0# M48 BB1

2
AD12 NV_DQ4 / NV_IO4 NV_ALE
3 6 M45 AV6
PCI_SERR# AD13 NV_DQ5 / NV_IO5
4 5 F53 AD14 NV_DQ6 / NV_IO6 BB3
M40 AD15 NV_DQ7 / NV_IO7 BA4
8.2K_1206_8P4R_5%~D

NVRAM
M43 AD16 NV_DQ8 / NV_IO8 BE4
J36 AD17 NV_DQ9 / NV_IO9 BB6
RP6 K48 AD18 NV_DQ10 / NV_IO10 BD6 Danbury Technology Enabled
1 8 PCI_IRDY# F40 BB7
PCI_STOP# AD19 NV_DQ11 / NV_IO11
2 7 C42 BC8
LVDS_CBL_DET# AD20 NV_DQ12 / NV_IO12
3 6 K46 AD21 NV_DQ13 / NV_IO13 BJ8 High = Enabled (Default)
4 5 PCI_PIRQC# M51 BJ6 NV_ALE
AD22 NV_DQ14 / NV_IO14
J52 AD23 NV_DQ15 / NV_IO15 BG6 Low = Disabled
8.2K_1206_8P4R_5%~D K51 AD24 NV_ALE
L34 AD25 NV_ALE BD3
F42 AY6 NV_CLE
CAM_MIC_CBL_DET# AD26 NV_CLE
1 2 J40 AD27
R212 8.2K_0402_5%~D G46 AD28
F44 AD29 NV_RCOMP AU2
M47 AD30
BT_DET# +VCCPNAND

PCI
1 2 H36 AV7
C R590 8.2K_0402_5%~D AD31 NV_RB# C
J50 C/BE0# NV_WR#0_RE# AY8

1
1 2 SD_DET# G42 AY5
R786 8.2K_0402_5%~D C/BE1# NV_WR#1_RE# @R866
@R866
H47 C/BE2#
G34 AV11 1K_0402_5%~D
C/BE3# NV_WE#_CK0
NV_WE#_CK1 BF5
PCI_PIRQA# G38

2
PCI_PIRQB# PIRQA#
H51
PCI_GNT3# PCI_PIRQC# PIRQB# USBP0- NV_CLE
PCI_PIRQD#
B37
A44
PIRQC# USBP0N
H18
J18 USBP0+ USBP0- 37 ----->Right Side Bottom
PIRQD# USBP0P USBP1- USBP0+ 37
USBP1N
A18 USBP1- 37 ----->Right Side Top
1

PCI_REQ0# F51 C18 USBP1+


PCI_REQ1# REQ0# USBP1P USBP2- USBP1+ 37
R863
4.7K_0402_5%~D
A46
B45
REQ1# / GPIO50 USBP2N
N20
P20 USBP2+
USBP2- 37 ----->Left Side Top
36 PCIE_MCARD2_DET# BT_DET# REQ2# / GPIO52 USBP2P USBP3- USBP2+ 37
@ 41 BT_DET# M53
REQ3# / GPIO54 USBP3N
J20 USBP3- 37 ----->Left Side Bottom DMI Termination Voltage
L20 USBP3+
2

PCI_GNT0# USBP3P USBP4- USBP3+ 37


PCI_GNT1#
F48
K45
GNT0# USBP4N
F20
G20 USBP4+ USBP4- 36 ----->WLAN Set to Vss when LOW
GNT1# / GPIO51 USBP4P USBP4+ 36
PCIE_MCARD3_DET# USBP5- NV_CLE
36 PCIE_MCARD3_DET# PCI_GNT3#
F36
H53
GNT2# / GPIO53 USBP5N
A20
C20 USBP5+ USBP5- 36 ----->WWAN Set to Vcc when HIGH
GNT3# / GPIO55 USBP5P USBP6- USBP5+ 36
LVDS_CBL_DET# B41
USBP6N
M22
N22 USBP6+ USBP6- 41 ----->Blue Tooth
24 LVDS_CBL_DET# PIRQE# / GPIO2 USBP6P USBP6+ 41
SD_DET# USBP7-
A16 swap override Strap/Top-Block 33 SD_DET# CAM_MIC_CBL_DET#
K53
A36
PIRQF# / GPIO3 USBP7N
B21
D21 USBP7+ USBP7- 31 ----->BIO
24 CAM_MIC_CBL_DET# FFS_PCH_INT PIRQG# / GPIO4 USBP7P USBP8- USBP7+ 31
28,40 HDD_FALL_INT 1 2 A48 H22 USBP8- 38 ----->DOCK
PIRQH# / GPIO5 USBP8N USBP8+
Swap Override jumper R632 0_0402_5%~D
USBP8P
J22 USBP8+ 38

USB
@ R121 1 2 0_0402_5%~D PCH_PCIRST# K6 E22 USBP9-
USBP9- 38 ----->DOCK
PCIRST# USBP9N USBP9+
F22 USBP9+ 38
PCI_SERR# USBP9P USBP10- +3.3V_ALW_PCH
Low = A16 swap E44
SERR# USBP10N
A22 USBP10- 34 ----->Express Card
PCI_GNT#3 PCI_PERR# E50 C22 USBP10+
PERR# USBP10P USBP11- USBP10+ 34
High = Default USBP11N
G24 USBP11- 24 ----->Camera RP1
H24 USBP11+ USB_OC0# 4 5
B PCI_IRDY# USBP11P USBP11+ 24 USB_OC1# B
A42 L24 3 6
IRDY# USBP12N USB_OC3#
H44 M24 2 7
PCI_DEVSEL# PAR USBP12P USBP13- USB_OC4#
F46 A24 USBP13- 36 ----->PCIE/BKT 1 8
PCI_FRAME# DEVSEL# USBP13N USBP13+
C46 C24 USBP13+ 36
FRAME# USBP13P 10K_1206_8P4R_5%~D
PCI_PLOCK# D49 Within 500 mils RP2
PLOCK# USBRBIAS USB_OC5#
B25 1 2 4 5
PCI_STOP# USBRBIAS# R303 USB_OC6#
D41 3 6
PCI_TRDY# STOP# 22.6_0402_1%~D USB_OC7#
C48 D25 2 7
R100 0_0402_5%~D TRDY# USBRBIAS USB_OC2#
31 PLTRST_USH# 1 2 1 8
R97 1 2 0_0402_5%~D M7
33 PLTRST_R5U242# PME#
R94 1 2 0_0402_5%~D N16 USB_OC0#_R R71 1 2 0_0402_5%~D 10K_1206_8P4R_5%~D
15 PLTRST_XDP# PCH_PLTRST# OC0# / GPIO59 USB_OC1#_R USB_OC0# 37
R14 1 2 0_0402_5%~D D5 J16 R77 1 2 0_0402_5%~D
30 PLTRST_LAN# PLTRST# OC1# / GPIO40 USB_OC2# USB_OC1# 37
F16 USB_OC2# 15
R1216 PCI_5028 OC2# / GPIO41 USB_OC3#
39 CLK_PCI_5028 2 1 22_0402_5%~D N52
CLKOUT_PCI0 OC3# / GPIO42
L16 USB_OC3# 15
R1217 2 1 47_0402_5%~D PCI_MEC P53 E14 USB_OC4#
40 CLK_PCI_MEC PCI_DOCK CLKOUT_PCI1 OC4# / GPIO43 USB_OC5# USB_OC4# 15
R1215 1 2 22_0402_5%~D P46 G16
38 CLK_PCI_DOCK CLKOUT_PCI2 OC5# / GPIO9 USB_OC6# USB_OC5# 15
P51 F12 USB_OC6# 15
CLKOUT_PCI3 OC6# / GPIO10
16 CLK_PCI_LOOPBACK
R63 2 1 22_0402_5%~D PCI_LOOPBACKOUT P48
CLKOUT_PCI4 OC7# / GPIO14
T15 USB_OC7#
USB_OC7# 15

+3.3V_RUN USB_OC0#_R 15
BD82QM57-SLGZQ-B3_FCBGA1071~D
C40 USB_OC1#_R 15
1 2

0.1U_0402_16V4Z~D
5

U11
PCH_PLTRST# 1
P

B PCH_PLTRST#_EC
O
4 PCH_PLTRST#_EC 8,32,34,36,39,40 Boot BIOS Strap
2
G

A A PCI_GNT0# A
TC7SH08FU_SSOP5~D PCI_GNT#1 PCI_GNT#0 Boot BIOS Location
3

PCI_GNT1#

1K_0402_5%~D

1K_0402_5%~D
0 0 LPC
DELL CONFIDENTIAL/PROPRIETARY
1

1
R79

R93
0 1 Reserved (NAND) Compal Electronics, Inc.
@ @
Title
2

1 0 PCI 2 PCH (4/8)


Size Document Number Rev
1 1 SPI 0.1
* LA-5571P
Date: Thursday, January 21, 2010 Sheet 18 of 60
5 4 3 2 1
5 4 3 2 1

D D
R130 U73F
15 SIO_EXT_SCI#_R V1.5
0_0402_5%~D
SIO_EXT_SCI# 1 2 Y3 AH45
40 SIO_EXT_SCI# BMBUSY# / GPIO0 CLKOUT_PCIE6N
AH46
GPIO1 CLKOUT_PCIE6P
C38
TACH1 / GPIO1
GPIO6 D37
TACH2 / GPIO6 +3.3V_RUN
AF48
CLKOUT_PCIE7N

MISC
GPIO7 J32 AF47
TACH3 / GPIO7 CLKOUT_PCIE7P
1 2 SIO_EXT_SMI# SIO_EXT_SMI# F10 SIO_A20GATE 2 1
40 SIO_EXT_SMI# GPIO8 R230 8.2K_0402_5%~D
@R99
@ R99 1K_0402_5%~D PM_LANPHY_ENABLE K9 U2 SIO_A20GATE SIO_RCIN# 2 1
30 PM_LANPHY_ENABLE LAN_PHY_PWR_CTRL / GPIO12 A20GATE SIO_A20GATE 40
R231 10K_0402_5%~D
39 SIO_EXT_WAKE# T7 GPIO15
EN_ESATA_RPTR# AA2 AM3 CLK_CPU_BCLK# SIO_EXT_SCI# 1 2
15,37 EN_ESATA_RPTR# SATA4GP / GPIO16 CLKOUT_BCLK0_N / CLKOUT_PCIE8N CLK_CPU_BCLK# 8
R272 10K_0402_5%~D
SPEAKER_DET# F38 AM1 CLK_CPU_BCLK +1.05V_RUN_VTT
29 SPEAKER_DET# TACH0 / GPIO17 CLKOUT_BCLK0_P / CLKOUT_PCIE8P CLK_CPU_BCLK 8
@T26
@ T26 PAD~D GPIO22 Y7 BG10 H_PECI
SCLOCK / GPIO22 PECI H_PECI 8

1
GPIO
H10 T1 SIO_RCIN# R237
36 PCIE_MCARD1_DET# GPIO24 RCIN# SIO_RCIN# 40
56_0402_5%~D
TP_ONDIE_PLL_VR AB12 BE10 H_CPUPWRGD
GPIO27 PROCPWRGD H_CPUPWRGD 8

CPU

2
ROUSH_PAID_TS_DET# V13 BD10 PCH_THRMTRIP#_R
15 ROUSH_PAID_TS_DET# GPIO28 THRMTRIP#
@ T25 PAD~D GPIO34 M11 1
+3.3V_ALW_PCH STP_PCI# / GPIO34
Internal pull up GPIO27 to USB_MCARD1_DET# V6 C33
C 36 USB_MCARD1_DET# GPIO35 0.1U_0402_16V4Z~D C
enable VccVRM
1

CONTACTLESS_DET# 2
15,31 CONTACTLESS_DET# AB7 SATA2GP / GPIO36 TP1 BA22
R1284 +3.3V_ALW_PCH
8.2K_0402_5%~D GPIO37 AB13 AW22
15 GPIO37 SATA3GP / GPIO37 TP2
@
TPM_ID0 V3 BB22
2

TP_ONDIE_PLL_VR SLOAD / GPIO38 TP3


TPM_ID1 P3 AY45
SDATAOUT0 / GPIO39 TP4 ROUSH_PAID_TS_DET# 1 2
USB_MCARD2_DET# H3 AY46 R74 10K_0402_5%~D
36 USB_MCARD2_DET# PCIECLKRQ6# / GPIO45 TP5
GPIO46 F1 AV43 SIO_EXT_SMI# 1 2
PCIECLKRQ7# / GPIO46 TP6 R274 10K_0402_5%~D
FFS_INT2 AB6 AV45
28 FFS_INT2 SDATAOUT1 / GPIO48 TP7
TEMP_ALERT# AA4 AF13 IO_LOOP 2 1
15,39 TEMP_ALERT# SATA5GP / GPIO49 / TEMP_ALERT# TP8 R835 100K_0402_5%~D
+3.3V_ALW_PCH IO_LOOP F8 M18
37 IO_LOOP GPIO57 TP9
N18
TP10
1 2 SIO_EXT_WAKE# VSS_NCTF_1 A4
VSS_NCTF_1 TP11
AJ24
R1530 2.2K_0402_5%~D VSS_NCTF_2 A49

NCTF
VSS_NCTF_2

RSVD
1 2 GPIO46 VSS_NCTF_3 A5
VSS_NCTF_3 TP12
AK41
R1309 10K_0402_5%~D VSS_NCTF_4 A50
VSS_NCTF_5 VSS_NCTF_4
A52 AK42
VSS_NCTF_6 VSS_NCTF_5 TP13
A53
VSS_NCTF_7 VSS_NCTF_6
B2 M32
+3.3V_RUN VSS_NCTF_8 VSS_NCTF_7 TP14
All NCTF pins should have thick VSS_NCTF_9
B4
VSS_NCTF_8
B52 N32
CONTACTLESS_DET# traces at 45°from the pad. VSS_NCTF_10 VSS_NCTF_9 TP15
2 1 B53
R1242 10K_0402_5%~D VSS_NCTF_11 VSS_NCTF_10
BE1 M30
B GPIO37 VSS_NCTF_12 VSS_NCTF_11 TP16 B
2 1 BE53
R1243 10K_0402_5%~D VSS_NCTF_13 VSS_NCTF_12
BF1 N30
EN_ESATA_RPTR# VSS_NCTF_14 VSS_NCTF_13 TP17
2 1 BF53
R1244 10K_0402_5%~D VSS_NCTF_15 VSS_NCTF_14
BH1 H12
TEMP_ALERT# VSS_NCTF_16 VSS_NCTF_15 TP18
2 1 BH2
R1245 10K_0402_5%~D VSS_NCTF_17 VSS_NCTF_16
BH52 AA23
GPIO22 VSS_NCTF_18 VSS_NCTF_17 TP19
2 1 BH53
R1543 10K_0402_5%~D VSS_NCTF_19 VSS_NCTF_18
BJ1 AB45
GPIO34 VSS_NCTF_20 VSS_NCTF_19 NC_1
2 1 BJ2
R1544 10K_0402_5%~D VSS_NCTF_21 VSS_NCTF_20
BJ4 AB38
SPEAKER_DET# VSS_NCTF_22 VSS_NCTF_21 NC_2
1 2 BJ49
R95 8.2K_0402_5%~D VSS_NCTF_23 VSS_NCTF_22
BJ5 AB42
GPIO1 VSS_NCTF_24 VSS_NCTF_23 NC_3
1 2 BJ50
R1489 10K_0402_5%~D VSS_NCTF_25 VSS_NCTF_24
BJ52 AB41
GPIO6 VSS_NCTF_26 VSS_NCTF_25 NC_4
1 2 BJ53
R1490 10K_0402_5%~D VSS_NCTF_27 VSS_NCTF_26
D1 T39
GPIO7 VSS_NCTF_28 VSS_NCTF_27 NC_5
1 2 D2
R1491 10K_0402_5%~D VSS_NCTF_29 VSS_NCTF_28
D53
VSS_NCTF_30 VSS_NCTF_29 INIT3_3V# PAD~D T7 @
E1 P6
VSS_NCTF_31 VSS_NCTF_30 INIT3_3V#
E53
VSS_NCTF_31
C10
TP24
BD82QM57-SLGZQ-B3_FCBGA1071~D
+3.3V_RUN
+3.3V_RUN
10K_0402_5%~D

5@
2

4@ R787
R273

20K_0402_5%~D
A A
2
1

TPM_ID0 TPM_ID1 TPM_ID0 TPM_ID1


2

1
10K_0402_5%~D

6@ China TPM 0 0
3@ R339 DELL CONFIDENTIAL/PROPRIETARY
R922

2.2K_0402_5%~D No TPM, No China TPM 0 1


USH1.0 (For SSI) 1 0
Compal Electronics, Inc.
-----> will use MEMO control pop R339
1

Title
USH2.0 1 1 & de-pop R787 when USH1.0 enable PCH (5/8)
for SSI build only Size Document Number Rev
0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 19 of 60
5 4 3 2 1
5 4 3 2 1

PCH Power Rail Table


+1.05V_RUN +3.3V_RUN S0 Iccmax
Voltage Rail Voltage
U73G POWER L49
Current (A)
AB24 V1.5 AE50 +VCCADAC 2 1
VCCCORE[1] VCCADAC[1] BLM18PG181SN1_0603~D
AB26 VCCCORE[2]
V_CPU_IO 1.1/1.05 < 1 (mA)

10U_0805_4VAM~D

1U_0402_6.3V6K~D

0.01U_0402_16V7K~D

0.1U_0402_10V7K~D
1 1 AB28 VCCCORE[3] VCCADAC[2] AE52
AD26 1 1 1
VCCCORE[4]

C1139

C77

CRT
AD28
VCCCORE[5] VSSA_DAC[1]
AF53 V5REF 5 < 1 (mA)

C109

C87
AF26 C38
D 2 2 VCCCORE[6] 10U_0805_4VAM~D D

VCC CORE
AF28 AF51
VCCCORE[7] VSSA_DAC[2] 2 2 2
AF30
VCCCORE[8]
V5REF_Sus 5 < 1 (mA)
AF31
VCCCORE[9]
AH26
VCCCORE[10]
AH28
VCCCORE[11]
Vcc3_3 3.3 0.357
AH30
VCCCORE[12]
AH31 AH38
VCCCORE[13] VCCALVDS
AJ30
VCCCORE[14]
VccAClk 1.1 0.052
AJ31 AH39
VCCCORE[15] VSSA_LVDS
VccADAC 3.3 0.069
+1.05V_RUN AP43 +1.05V_RUN
VCCTX_LVDS[1]
VCCTX_LVDS[2] AP45
AT46 VccADPLLA 1.1 0.068

LVDS
VCCTX_LVDS[3]
AK24 VCCIO[24] VCCTX_LVDS[4] AT45

Place C78 Near BJ24 pin VccADPLLB 1.1 0.069


BJ24 VCCAPLLEXP
VCC3_3[2] AB34 1 1

1U_0402_6.3V6K~D
1 VccapllEXP 1.1 0.04
AN20 AB35 + @ C1166 + @ C1167
VCCIO[25] VCC3_3[3]

C78
AN22 330U_D2_2VM_R6M~D 330U_D2_2VM_R6M~D

HVCMOS
VCCIO[26]
AN23 VCCIO[27] VCC3_3[4] AD35 +3.3V_RUN VccCore 1.1 1.432
2 @ 2 2
AN24 VCCIO[28]
AN26 VCCIO[29] 1
AN28 VCCIO[30]
VccDMI 1.1 0.058
BJ26 C93
VCCIO[31]
BJ28 VCCIO[32] 0.1U_0402_10V7K~D
2 VccDMI 1.1 0.061
AT26 VCCIO[33]
AT28 VCCIO[34]
+1.05V_RUN AU26 VCCIO[35] +1.5V_1.8V_RUN_VCCADMI_VRM
AU28 VCCIO[36]
VccFDIPLL 1.1 0.037
C C
AV26 VCCIO[37]
AV28 AT24 1 2 +1.05V_+1.5V_1.8V_RUN
VCCIO[38] VCCVRM[2] R391
AW26 VCCIO[39]
VccIO 1.1 3.062
10U_0805_4VAM~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1 1 1 1 1 AW28 0_0603_5%~D
VCCIO[40]

DMI
BA26 VCCIO[41] VCCDMI[1] AT16
C80

C81

C82

C83

C84

BA28 VCCIO[42]
C1140 near pin AT16 VccLAN 1.1 0.32
BB26 VCCIO[43] VCCDMI[2] AU16 +1.05V_RUN_VTT
2 2 2 2 2
BB28 1
VCCIO[44]
BC26
VCCIO[45]
VccME 1.1 1.849

PCI E*
BC28 C1140
VCCIO[46] 1U_0402_6.3V6K~D
BD26
VCCIO[47] 2
BD28
VCCIO[48]
VccME3_3 3.3 0.085
BE26 AM16 +VCCPNAND @ R489
+3.3V_RUN VCCIO[49] VCCPNAND[1] 0_0805_5%~D
BE28 AK16
VCCIO[50] VCCPNAND[2]
BG26
VCCIO[51] VCCPNAND[3]
AK20 1 2 +3.3V_RUN VccpNAND 1.8 0.156
BG28 AK19
VCCIO[52] VCCPNAND[4]
0.1U_0402_10V7K~D

0.1U_0402_10V7K~D
BH27 AK15
VCCIO[53] VCCPNAND[5]
1 VCCPNAND[6]
AK13 1 1 2 +1.8V_RUN VccRTC 3.3 2 (mA)
AN30 AM12
VCCIO[54] VCCPNAND[7]
C85

C94
R495
NAND / SPI
AN31 AM13
VCCIO[55] VCCPNAND[8] 0_0805_5%~D
VCCPNAND[9]
AM15 VccSATAPLL 1.1 0.031
2 2
AN35
VCC3_3[1]
VccSus3_3 3.3 0.163
+VCCAFDI_VRM AT22
VCCVRM[1]
Place C22 Near BJ18 pin VccSusHDA 3.3 0.006
BJ18 AM8 +3.3V_M
VCCFDIPLL VCCME3_3[1]
AM9
VCCME3_3[2]
1U_0402_6.3V6K~D

FDI

1 +1.05V_RUN AM23
VCCIO[1] VCCME3_3[3]
AP11 1 VccVRM 1.8 / 1.5 0.196
AP9
VCCME3_3[4]
C22

C95
B 0.1U_0402_10V7K~D VccVRM 1.05 < 1 (mA) B
2 @ 2
BD82QM57-SLGZQ-B3_FCBGA1071~D
VccALVDS 3.3 < 1 (mA)

VccTX_LVDS 1.8 0.059


+1.05V_+1.5V_1.8V_RUN

R390
0_0603_5%~D
1 2 +VCCAFDI_VRM

+1.5V_RUN +1.05V_+1.5V_1.8V_RUN

@ R96
2 1 +1.05V_+1.5V_1.8V_RUN

+1.8V_RUN 0_0603_5%~D

2 1
R387
+1.05V_RUN 0_0603_5%~D

2 1
@ R80
@R80
0_0603_5%~D
A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (6/8)
Size Document Number Rev
0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 20 of 60
5 4 3 2 1
5 4 3 2 1

Place C39 Near AP51 pin


+VCCACLK
+5V_ALW +5V_ALW_PCH

1U_0402_6.3V6K~D
R651
1 U73J POWER
V1.5
R499 0_0603_5%~D
0_0603_5%~D

S
2 1 1 3

C39

0.1U_0402_10V7K~D
AP51 V24 +1.05V_RUN_VCCUSBCORE 2 1
VCCACLK[1] VCCIO[5] +1.05V_RUN

20K_0402_5%~D
V26 Q10
VCCIO[6]

1
2 @ AP53 Y24 SSM3K7002FU_SC70-3~D
1 1

G
2
+1.05V_M VCCACLK[2] VCCIO[7]

R57
Y26
VCCIO[8]

C18
D C96 D
1 2 +1.05V_M_VCCAUX AF23 V28 1U_0402_6.3V6K~D
VCCLAN[1] VCCSUS3_3[1] 2 42 ALW_ENABLE 2

1U_0402_6.3V6K~D
R669 1 U28

2
0_0603_5%~D VCCSUS3_3[2]
AF24 U26
VCCLAN[2] VCCSUS3_3[3]

C100
U24
VCCSUS3_3[4]
P28
2 +TP_PCH_VCCDSW Y20 VCCSUS3_3[5]
P26
DCPSUSBYP VCCSUS3_3[6] R500
1 N28
VCCSUS3_3[7] 0_0603_5%~D
N26
C110 VCCSUS3_3[8] +3.3V_ALW_VCCPUSB
AD38 M28 2 1 +3.3V_ALW_PCH
0.1U_0402_10V7K~D VCCME[1] VCCSUS3_3[9] +5V_ALW_PCH +3.3V_ALW_PCH
M26
+1.05V_M 2 VCCSUS3_3[10]

0.1U_0402_10V7K~D
R674 AD39 L28

USB
VCCME[2] VCCSUS3_3[11]
0_0805_5%~D Place C116 Near AD38 pin VCCSUS3_3[12] L26 1

2
1 2 +1.05V_M_VCCEPW AD41 J28
VCCME[3] VCCSUS3_3[13]

C97
22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1U_0402_6.3V6K~D
1 1 1 J26 R313 D16
VCCSUS3_3[14] 100_0402_5%~D
AF43 VCCME[4] VCCSUS3_3[15] H28 RB751S40T1_SOD523-2~D
2

C116

C112

C101
VCCSUS3_3[16] H26
AF41 G28

1
2 2 @ 2 VCCME[5] VCCSUS3_3[17] +PCH_V5REF_SUS
VCCSUS3_3[18] G26
AF42 VCCME[6] VCCSUS3_3[19] F28 1
VCCSUS3_3[20] F26
V39 E28 C342
VCCME[7] VCCSUS3_3[21] 1U_0603_10V6K~D
E26

Clock and Miscellaneous


VCCSUS3_3[22] +3.3V_ALW_VCCPUSB 2

0.1U_0402_10V7K~D
V41 VCCME[8] VCCSUS3_3[23] C28

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1U_0402_6.3V6K~D
1 1 1 VCCSUS3_3[24] C26 1
Place C117 Near V39 pin V42 VCCME[9] VCCSUS3_3[25] B27 Follow DG 1.11

C99
C117

C111

C102
VCCSUS3_3[26] A28
Y39 VCCME[10] VCCSUS3_3[27] A26
2 2 @ 2 2
Y41 U23 +5V_RUN +3.3V_RUN
VCCME[11] VCCSUS3_3[28]
Y42 VCCME[12] VCCIO[56] V23 +1.05V_RUN

2
C C
F24 +PCH_V5REF_SUS R311 D15
V5REF_SUS 100_0402_5%~D RB751S40T1_SOD523-2~D
+VCCRTCEXT V9 DCPRTC
1

1
+PCH_V5REF_RUN
C103 K49 +PCH_V5REF_RUN 1
0.1U_0402_10V7K~D V5REF R517 +3.3V_RUN
+1.05V_+1.5V_1.8V_RUN AU24

PCI/GPIO/LPC
2 VCCVRM[3] 0_0805_5%~D C335
J38 +3.3V_RUN_VCCPPCI 2 1 1U_0603_10V6K~D
+1.05V_RUN_VCCA_A_DPL VCC3_3[8] 2
BB51
VCCADPLLA[1]
BB53 L38 1
VCCADPLLA[2] VCC3_3[9]
M36 C356
+1.05V_RUN_VCCA_B_DPL VCC3_3[10] 0.1U_0402_10V7K~D
BD51
+1.05V_RUN VCCADPLLB[1] 2
BD53 N36
VCCADPLLB[2] VCC3_3[11] +3.3V_RUN
AH23 P36
VCCIO[21] VCC3_3[12]
AJ35
VCCIO[22]
1U_0402_6.3V6K~D

1 1 AH35 U35 1
VCCIO[23] VCC3_3[13]
1
C1893 C138 AF34 C1203
VCCIO[2]
C108

1U_0402_6.3V6K~D 1U_0402_6.3V6K~D AD13 0.1U_0402_10V7K~D


2 2 VCC3_3[14] 2
AH34
2 VCCIO[3]
AF32
VCCIO[4]
AK3
VCCSATAPLL[1]
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D
pinAJ35, AH35 & pinAF34, AH34, AF32 +VCCSST V12 AK1 +VCCSATAPLL
DCPSST VCCSATAPLL[2]
need to route 700mil then connect to 1 1 Place C610 Near AK3 pin
0.1U_0402_10V7K~D

+1.05V_RUN, C138 & C139 near BGA pin, 1


C139

C610
C1893 near BGA pin at least 700mil and
C217

0.1U_0402_10V7K~D

+DCPSUS Y22
B 2 DCPSUS 2 @ B
place different side from PCH 1 VCCIO[9]
AH22
2
C677

P18 AT20 +1.05V_+1.5V_1.8V_RUN


2 VCCSUS3_3[29] VCCVRM[4]
+3.3V_ALW_PCH R690 U19
SATA
VCCSUS3_3[30]
0.1U_0402_10V7K~D

0_0805_5%~D R557
PCI/GPIO/LPC

AH19
+3.3V_ALW_VCCPSUS VCCIO[10] 0_0805_5%~D
1 2 U20
VCCSUS3_3[31] +VCCIO
1 AD20 2 1 +1.05V_RUN
VCCIO[11]
U22
VCCSUS3_3[32]
C759

1U_0402_6.3V6K~D
AF22 1
VCCIO[12]
2

C611
AD19
+3.3V_RUN R691 VCCIO[13]
V15 AF20
0_0805_5%~D VCC3_3[5] VCCIO[14] 2
AF19
+3.3_RUN_VCCPCORE VCCIO[15]
1 2 V16 AH20
VCC3_3[6] VCCIO[16]
1
Y16 AB19
C760 VCC3_3[7] VCCIO[17]
AB20
0.1U_0402_10V7K~D VCCIO[18] +1.05V_M
AB22
+1.05V_RUN_VTT R692 2 VCCIO[19]
AD22
0_0603_5%~D VCCIO[20]
AT18
V_CPU_IO[1]
0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2 +V_CPU_IO AA34 +VCCME_13 R559 2 1 0_0603_5%~D


CPU

VCCME[13] +VCCME_14 R573 0_0603_5%~D


1 1 1 Y34 2 1
VCCME[14] +VCCME_15 R591 0_0603_5%~D
AU18 Y35 2 1
V_CPU_IO[2] VCCME[15]
C777

C113

C763 AA35 +VCCME_16 R592 1 2 0_0603_5%~D


4.7U_0603_6.3V6K~D +RTC_CELL VCCME[16]
2 2 2
RTC

A12 L30 +VCCSUSHDA 2 1


VCCRTC VCCSUSHDA +3.3V_ALW_PCH
0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

HDA

R650
1 1 1 0_0603_5%~D
L97 BD82QM57-SLGZQ-B3_FCBGA1071~D
C781

C783

A 10UH_LBR2012T100M_20%~D C672 A
1 2 +1.05V_RUN_VCCA_A_DPL 1U_0402_6.3V6K~D
+1.05V_RUN 2 2 2
220U_B2_2.5VM_R35M~D

1 2 +VCCA_DPLL_L 1 2 +1.05V_RUN_VCCA_B_DPL
DELL CONFIDENTIAL/PROPRIETARY
220U_B2_2.5VM_R35M~D

R1488 L98
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10UH_LBR2012T100M_20%~D 1 1
0_0805_5%~D
<BOM Structure>
1 1 Compal Electronics, Inc.
C1880

C1882

+ +
C1881

C1883

Title
2 2 2 2 PCH (7/8)
@ @ Size Document Number Rev
0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 21 of 60
5 4 3 2 1
5 4 3 2 1

U73I
AY7 V1.5 H49
VSS[159] VSS[259]
B11 VSS[160] VSS[260] H5
B15 J24
VSS[161] VSS[261]
B19 K11
VSS[162] VSS[262]
B23 K43
D U73H VSS[163] VSS[263] D
B31 K47
V1.5 VSS[164] VSS[264]
AB16 B35 K7
VSS[0] VSS[165] VSS[265]
B39 L14
VSS[166] VSS[266]
AA19 AK30 B43 L18
VSS[1] VSS[80] VSS[167] VSS[267]
AA20 AK31 B47 L2
VSS[2] VSS[81] VSS[168] VSS[268]
AA22 AK32 B7 L22
VSS[3] VSS[82] VSS[169] VSS[269]
AM19 AK34 BG12 L32
VSS[4] VSS[83] VSS[170] VSS[270]
AA24 AK35 BB12 L36
VSS[5] VSS[84] VSS[171] VSS[271]
AA26 AK38 BB16 L40
VSS[6] VSS[85] VSS[172] VSS[272]
AA28 AK43 BB20 L52
VSS[7] VSS[86] VSS[173] VSS[273]
AA30 AK46 BB24 M12
VSS[8] VSS[87] VSS[174] VSS[274]
AA31 VSS[9] VSS[88] AK49 BB30 VSS[175] VSS[275] M16
AA32 VSS[10] VSS[89] AK5 BB34 VSS[176] VSS[276] M20
AB11 VSS[11] VSS[90] AK8 BB38 VSS[177] VSS[277] N38
AB15 VSS[12] VSS[91] AL2 BB42 VSS[178] VSS[278] M34
AB23 VSS[13] VSS[92] AL52 BB49 VSS[179] VSS[279] M38
AB30 VSS[14] VSS[93] AM11 BB5 VSS[180] VSS[280] M42
AB31 VSS[15] VSS[94] BB44 BC10 VSS[181] VSS[281] M46
AB32 VSS[16] VSS[95] AD24 BC14 VSS[182] VSS[282] M49
AB39 VSS[17] VSS[96] AM20 BC18 VSS[183] VSS[283] M5
AB43 VSS[18] VSS[97] AM22 BC2 VSS[184] VSS[284] M8
AB47 VSS[19] VSS[98] AM24 BC22 VSS[185] VSS[285] N24
AB5 VSS[20] VSS[99] AM26 BC32 VSS[186] VSS[286] P11
AB8 VSS[21] VSS[100] AM28 BC36 VSS[187] VSS[287] AD15
AC2 VSS[22] VSS[101] BA42 BC40 VSS[188] VSS[288] P22
AC52 VSS[23] VSS[102] AM30 BC44 VSS[189] VSS[289] P30
AD11 VSS[24] VSS[103] AM31 BC52 VSS[190] VSS[290] P32
AD12 VSS[25] VSS[104] AM32 BH9 VSS[191] VSS[291] P34
AD16 VSS[26] VSS[105] AM34 BD48 VSS[192] VSS[292] P42
AD23 VSS[27] VSS[106] AM35 BD49 VSS[193] VSS[293] P45
AD30 VSS[28] VSS[107] AM38 BD5 VSS[194] VSS[294] P47
AD31 VSS[29] VSS[108] AM39 BE12 VSS[195] VSS[295] R2
C C
AD32 VSS[30] VSS[109] AM42 BE16 VSS[196] VSS[296] R52
AD34 VSS[31] VSS[110] AU20 BE20 VSS[197] VSS[297] T12
AU22 VSS[32] VSS[111] AM46 BE24 VSS[198] VSS[298] T41
AD42 VSS[33] VSS[112] AV22 BE30 VSS[199] VSS[299] T46
AD46 VSS[34] VSS[113] AM49 BE34 VSS[200] VSS[300] T49
AD49 VSS[35] VSS[114] AM7 BE38 VSS[201] VSS[301] T5
AD7 VSS[36] VSS[115] AA50 BE42 VSS[202] VSS[302] T8
AE2 BB10 BE46 U30
VSS[37] VSS[116] VSS[203] VSS[303]
AE4 AN32 BE48 U31
VSS[38] VSS[117] VSS[204] VSS[304]
AF12 AN50 BE50 U32
VSS[39] VSS[118] VSS[205] VSS[305]
Y13 AN52 BE6 U34
VSS[40] VSS[119] VSS[206] VSS[306]
AH49 AP12 BE8 P38
VSS[41] VSS[120] VSS[207] VSS[307]
AU4 AP42 BF3 V11
VSS[42] VSS[121] VSS[208] VSS[308]
AF35 AP46 BF49 P16
VSS[43] VSS[122] VSS[209] VSS[309]
AP13 AP49 BF51 V19
VSS[44] VSS[123] VSS[210] VSS[310]
AN34 AP5 BG18 V20
VSS[45] VSS[124] VSS[211] VSS[311]
AF45 AP8 BG24 V22
VSS[46] VSS[125] VSS[212] VSS[312]
AF46 AR2 BG4 V30
VSS[47] VSS[126] VSS[213] VSS[313]
AF49 AR52 BG50 V31
VSS[48] VSS[127] VSS[214] VSS[314]
AF5 AT11 BH11 V32
VSS[49] VSS[128] VSS[215] VSS[315]
AF8 BA12 BH15 V34
VSS[50] VSS[129] VSS[216] VSS[316]
AG2 AH48 BH19 V35
VSS[51] VSS[130] VSS[217] VSS[317]
AG52 AT32 BH23 V38
VSS[52] VSS[131] VSS[218] VSS[318]
AH11 AT36 BH31 V43
VSS[53] VSS[132] VSS[219] VSS[319]
AH15 AT41 BH35 V45
VSS[54] VSS[133] VSS[220] VSS[320]
AH16 AT47 BH39 V46
VSS[55] VSS[134] VSS[221] VSS[321]
AH24 AT7 BH43 V47
VSS[56] VSS[135] VSS[222] VSS[322]
AH32 AV12 BH47 V49
VSS[57] VSS[136] VSS[223] VSS[323]
AV18 AV16 BH7 V5
VSS[58] VSS[137] VSS[224] VSS[324]
AH43 AV20 C12 V7
VSS[59] VSS[138] VSS[225] VSS[325]
AH47 AV24 C50 V8
VSS[60] VSS[139] VSS[226] VSS[326]
AH7 AV30 D51 W2
B VSS[61] VSS[140] VSS[227] VSS[327] B
AJ19 AV34 E12 W52
VSS[62] VSS[141] VSS[228] VSS[328]
AJ2 AV38 E16 Y11
VSS[63] VSS[142] VSS[229] VSS[329]
AJ20 AV42 E20 Y12
VSS[64] VSS[143] VSS[230] VSS[330]
AJ22 AV46 E24 Y15
VSS[65] VSS[144] VSS[231] VSS[331]
AJ23 AV49 E30 Y19
VSS[66] VSS[145] VSS[232] VSS[332]
AJ26 AV5 E34 Y23
VSS[67] VSS[146] VSS[233] VSS[333]
AJ28 AV8 E38 Y28
VSS[68] VSS[147] VSS[234] VSS[334]
AJ32 AW14 E42 Y30
VSS[69] VSS[148] VSS[235] VSS[335]
AJ34 AW18 E46 Y31
VSS[70] VSS[149] VSS[236] VSS[336]
AT5 AW2 E48 Y32
VSS[71] VSS[150] VSS[237] VSS[337]
AJ4 BF9 E6 Y38
VSS[72] VSS[151] VSS[238] VSS[338]
AK12 AW32 E8 Y43
VSS[73] VSS[152] VSS[239] VSS[339]
AM41 AW36 F49 Y46
VSS[74] VSS[153] VSS[240] VSS[340]
AN19 AW40 F5 P49
VSS[75] VSS[154] VSS[241] VSS[341]
AK26 AW52 G10 Y5
VSS[76] VSS[155] VSS[242] VSS[342]
AK22 AY11 G14 Y6
VSS[77] VSS[156] VSS[243] VSS[343]
AK23 AY43 G18 Y8
VSS[78] VSS[157] VSS[244] VSS[344]
AK28 AY47 G2 P24
VSS[79] VSS[158] VSS[245] VSS[345]
G22 T43
BD82QM57-SLGZQ-B3_FCBGA1071~D VSS[246] VSS[346]
G32 AD51
VSS[247] VSS[347]
G36 AT8
VSS[248] VSS[348]
G40 AD47
VSS[249] VSS[349]
G44 Y47
VSS[250] VSS[350]
G52 AT12
VSS[251] VSS[351]
AF39 AM6
VSS[252] VSS[352]
H16 AT13
VSS[253] VSS[353]
H20 AM5
VSS[254] VSS[354]
H30 AK45
VSS[255] VSS[355]
H34 AK39
VSS[256] VSS[356]
H38 AV14
VSS[257] VSS[366]
H42
VSS[258]
A A

BD82QM57-SLGZQ-B3_FCBGA1071~D

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PCH (8/8)
Size Document Number Rev
0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 22 of 60
5 4 3 2 1
5 4 3 2 1

+5V_RUN +3.3V_M

1
+5V_RUN +5V_RUN

1
@ R136

4.7U_0603_10V6K~D

4.7U_0603_10V6K~D
10K_0402_5%~D R142
0.01U_0402_16V7K~D

0.01U_0402_16V7K~D
1 1 1 1 10K_0402_5%~D

2
@ @ @ @

2
C391

C72

C406

C73
+5V_RUN @ U140 @ R156
1 FAN1_TACH_FB 10K_0402_5%~D +FAN1_VOUT
2 2 2 2 TACH FAN_OK FAN1_TACH_FB
11 VDD FAN_OKAY 2 2 1 +3.3V_RUN

RB751S40T1_SOD523-2~D

22U_0805_6.3VAM~D
17
VDD

1
7 @ C434 1 2 1U_0402_6.3V6K~D 1
C_FILT

D2

C219
16
D PARAM_SEL1 D
3 9 @ R1463 1 2 0.27_1210_1%~D JFAN1
PARAM_SEL2 I_RET

0_0402_5%~D
4 FAN1_DET# R5071 2 0_0402_5%~D PHASE_U 1
PARAM_SEL3 1

1
2

27K_0402_5%~D
R1457
Close to U140 pin 11 Close to U140 pin 17 5 12 PHASE_W_R @ R531
@R531 1 2 0_0805_5%~D PHASE_W +FAN1_VOUT R5161 2 0_0805_5%~D PHASE_V 2

2
PARAM_SEL4 PHASE_W 2

15K_0402_5%~D
R138
@ R536 13 PHASE_V_R @R534
@ R534 1 2 0_0805_5%~D PHASE_V FAN1_TACH_FB R5191 2 0_0402_5%~D PHASE_W 3 5
PHASE_V 3 G1

15K_0402_5%~D
MOT_COM 1 2 MOT_COM_R 10 14 PHASE_U_R @R535
@ R535 1 2 0_0805_5%~D PHASE_U R5291 2 0_0805_5%~D MOT_COM 4 6
MOT_COM PHASE_U 4 G2

1
+3.3V_M

R1458
@ @ 0_0805_5%~D

R1462
29,40 DAI_GPU_R3P_SMBCLK 18 8 MOLEX_53398-0471~D

2
SMCLK GND
29,40 DAI_GPU_R3P_SMBDAT 19 15
1
@ SMDATA GND
21

2
R134 @ PWM GND
20

2
8.2K_0402_5%~D PWM
6 IMVP_IMON 11,50
N/C R998
TPF3000-BP-TR_QFN20_4X4~D 1 2 MAX8731_IINP 51
2

+1.05V_RUN_VTT THERMATRIP1#
R135 4.7K_0402_5%~D
1

2.2K_0402_5%~D C 1
1 2 2
B C218
Q5 E 0.1U_0402_16V4Z~D
3

PMST3904_SOT323-3~D 2
8 H_THERMTRIP# 40 BC_DAT_EMC4002
Place under CPU
Place C223 close to the Q8 as possible 40 BC_CLK_EMC4002
Diode circuit at DP2/DN2 is used Place C224, close to the Guardian pins as possible

1
for skin temp sensor (placed R1408

1
optimally 2 C 2 0_0402_5%~D
between CPU, MCH and MEM). @ C223 2 C224
100P_0402_50V8K~D B 2200P_0402_50V7K~D

2
E Q8
3

1 MMBT3904WT1G_SC70-3~D 1
C U3 C

BC_DAT_EMC4002 10 SMDATA/BC-LINK_DATA
1

1 C 1 BC_CLK_EMC4002 11 39
Place C221 close to the SMCLK/BC-LINK_CLK VIN1
2 VCP1 48
C222 @ Q7 B C221 Guardian pins as possible. 45
100P_0402_50V8K~D MMBT3904WT1G_SC70-3~D E VCP2
3

2 2200P_0402_50V7K~D 2 REM_DIODE1_P 36 44
REM_DIODE1_N DP1/VREF_T DP4/DN8
Place C222 close to Q7 as 35 43
DN1/THERM DN4/DP8
possible.
REM_DIODE2_P 38 47
REM_DIODE2_N DP2 DP5/DN9
37 46
DN2 DN5/DP9
Q9 Place near DIMM 1 1
1

C C228 REM_DIODE3_P 41 1
@ C227
@C227 2200P_0402_50V7K~D REM_DIODE3_N DP3/DN7 DP6/VREF_T2
Place C227 close 2 40
DN3/DP7 DN6/VIN2
2
100P_0402_50V8K~D B
to Q9 2 Q9 E 2
3

MMBT3904WT1G_SC70-3~D 2 1 +3.3V_M
+3.3V_M R1218 1 2 22_0402_5%~D +VCC_4002 4 R141 10K_0402_5%~D
VDD
12 BC_INT#_EMC4002 40
ATF_INT#/BC-LINK_IRQ# POWER_SW#
1 +RTC_CELL 21 26
RTC_PWR3V POWER_SW#
1U_0402_6.3V6K~D

1 27 ACAV_IN 40,51,52
C229 +3.3V_M ACAVAIL_CLR PWM
20 2 1 +3.3V_M
THERMTRIP_SIO/PWM1/GPIO5
C230

0.1U_0402_16V4Z~D 25 R145 10K_0402_5%~D THERM_STP# 45


2 SYS_SHDN#
1 2 18 1 2 +RTC_CELL
+3.3V_M 2 R146 1 VDD_PWRGD
40 PCH_PWRGD# 2 10K_0402_5%~D 17 3V_PWROK#
@ R147 47K_0402_1%~D
R148 1K_0402_5%~D
THERMATRIP1# 22
THERMATRIP2# THERMTRIP1#
23
THERMTRIP2#
1

THERMATRIP3# 24 19 2 1
R137 THERMTRIP3# LDO_SHDN# R211 10K_0402_5%~D
8.2K_0402_5%~D VSET 42 34
B VSET LDO_POK B
1

1 +VCC_4002 2 1 3 33 LDO_SET
2

R151 +5V_RUN R150 4.7K_0402_5%~D ADDR_MODE/XEN LDO_SET


THERMATRIP2# C231 953_0402_1%~D

1
0.1U_0402_16V4Z~D 6 32
2 VDDH1 VDDH2
10U_0805_10V4Z~D
0.1U_0402_16V4Z~D

1 5 31 R154
2

+3.3V_RUN VDDH1 VDDH2


C220 1 1 9 28 1K_0402_5%~D
VDDL1 VDDL2
C235

0.1U_0402_16V4Z~D

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

2
2
C234

Rset=953,Tp=88degree +FAN1_VOUT 7 29 +3.3V_M


1 1 FAN_OUT1 LDO_OUT/FAN_OUT2
8 30
2 2 FAN_OUT1 LDO_OUT/FAN_OUT2
C236

C237

FAN1_TACH_FB 15 16 FAN1_DET# @ R594 1 2 0_0402_5%~D FAN_OK


2 2 TACH1/GPIO3 TACH2/GPIO4
14 13 PM_EXTTS# 8
CLK_IN/GPIO2 PWM2/GPIO1
FAN1_DET# 2 1

VSS
R1498 10K_0402_5%~D
EC_32KHZ_OUT
+3.3V_M 40 EC_32KHZ_OUT
EMC4002-HZH C_QFN48_7X7~D
49
1

R157 +RTC_CELL C1050


8.2K_0402_5%~D 0.1U_0402_16V4Z~D
1 2
Pull-up Resistor For Remote1 SMBUS
2

5
U68
THERMATRIP3# on ADDR_MODE/XEN mode Address TC7SH08FU_SSOP5~D 1

P
B DOCK_PWR_SW# 40
POWER_SW# 4 O
1 * <= 4.7K +/- 5% 2N3904 2F(r/w) A
2 POWER_SW_IN# 40

G
A C243 A
10K 2N3904 2E(r/w)

3
0.1U_0402_16V4Z~D
2
18K Thermistor 2F(r/w)
>= 33K Thermistor 2E(r/w)
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, FAN & Thermal Sensor
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 23 of 60
5 4 3 2 1
5 4 3 2 1

JEDP1 LCD Power Q12


45 44 LVDS_CBL_DET# SI3456BDV-T1-E3_TSOP6~D
MGND1 CONNTST LVDS_CBL_DET# 18 +15V_ALW +LCDVDD +3.3V_ALW
46 43

D
MGND2 GND EDP_LANE_N1

S
47 MGND3 LANE1_N 42 6
48 41 EDP_LANE_P1 +LCDVDD +15V_ALW 4 5
MGND4 LANE1_P

1
49 40 +LCDVDD 2
MGND5 GND EDP_LANE_N0
50 MGND6 LANE0_N 39 1

1
0.1U_0402_16V4Z~D

130_0402_5%~D

100K_0402_5%~D
EDP_LANE_P0 R158

G
51 MGND7 LANE0_P 38 1

1
R161
52 37 100K_0402_5%~D

3
MGND8 GND

R162
53 36 MB_EDP_AUX C295 1 2 0.1U_0402_10V7K~D EDP_CPU_AUX 1 C241

2
MGND9 AUX_CH_P EDP_CPU_AUX 7
54 35 MB_EDP_AUX# C314 1 2 0.1U_0402_10V7K~D EDP_CPU_AUX# 0.1U_0402_16V4Z~D
MGND10 AUX_CH_N EDP_CPU_AUX# 7 2

C244

DMN66D0LDW-7_SOT363-6~D
55 34

6 2
MGND11 GND

0.1U_0402_25V4Z~D
56 33

2
MGND12 LCD_VCC

3
57 32 2
MGND13 LCD_VCC +LCDVDD 1
31
LCD_VCC

Q13B

C242
D LCD_TST Q13A D
30 1 2 LCD_TST 39
TEST R667 1K_0402_5%~D DMN66D0LDW-7_SOT363-6~D
GND
29 Close to JEDP1.18,19 2 5
2
28 EDP_HPD
HPD

1
27 +3.3V_RUN

4
BL_GND D3
26
BL_GND
25 +BL_PWR_SRC
BL_PWR

1
24 39 LCD_VCC_TEST_EN 2
BL_PWR C246 1 0.1U_0603_50V4Z~D @ R165 EN_LCDPWR
23 2 1 2
BL_PWR 10K_0402_5%~D
22
BL_PWR L99 Q15
21 17,39 ENVDD_PCH 3
BL_GND BLM18BB221SN1D_2P~D PDTC124EU_SC70-3~D
20

2
BL_GND
19 1 2

3
BL_PWM LCD_SMBCLK BIA_PWM_PCH 17
18 BAT54CW_SOT323-3~D
SMBUS_CLK LCD_SMBCLK 40
17 LCD_SMBDAT 1
SMBUS_DATA LCD_SMBDAT 40
ALS_VCC 16 +3.3V_RUN
15 ALS_INT# @C1900
@ C1900
ALS_INT# ALS_INT# 39
14 0.1U_0603_50V4Z~D
GND CAM_MIC_CBL_DET# 2
CAM_MIC_CBL_DET# 13 CAM_MIC_CBL_DET# 18
12 USBP11_D+
USB+ USBP11_D-
USB- 11
USB_VCC 10 +CAMERA_VDD Q17
9 DMIC_CLK
MIC_CLK DMIC_CLK 29 FDC654P_SSOT6~D
8 +PWR_SRC
MIC_GND
7 DMIC0 40mil
40mil

D
MIC_DAT DMIC0 29

S
6 2 1 +LCDVDD 6 +BL_PWR_SRC
GND BREATH_BLUE_LED R180 0_0402_5%~D
PWR_LED 5 BREATH_BLUE_LED 43 4 5
4 BATT_YELLOW_LED LCD_SMBCLK 2 1 2 1 2
BATT2_LED BATT_YELLOW_LED 43 +3.3V_RUN

1000P_0402_50V7K~D
SD05.TCT_SOD323-2~D
SD05.TCT_SOD323-2~D
3 BATT_BLUE_LED R548 2.2K_0402_5%~D @
@R181
R181 0_0402_5%~D 1
BATT1_LED BATT_BLUE_LED 43

G
2 LCD_SMBDAT 2 1 1
GND

1
D49
1 R549 2.2K_0402_5%~D 1

3
CONNTST

D48
R167 C247

C248
@ +1.05V_RUN_VTT 100K_0402_5%~D 0.1U_0603_50V4Z~D
C I-PEX_20505-044E-011G @ 2 C

2
2

2
1
PWR_SRC_ON
R1470
7.5K_0402_5%~D Q18
SSM3K7002FU_SC70-3~D

2
@ L59 EDP_HPD#

S
EDP_HPD# 7 1 2 1 3
DLW21SN121SQ2L_4P~D R168 47K_0402_5%~D
USBP11+ 1 USBP11_D+
18 USBP11+ 1 2 2

1
D

G
2
EDP_HPD 2 Q3
USBP11- 4 3 USBP11_D- G BSS138_SOT23~D
18 USBP11- 4 3

2
S

3
R1028 FDC654P: P CHANNAL
1 2 110K_0402_1%~D EN_INVPWR
40 EN_INVPWR
R457 0_0402_5%~D
Panel backlight power control by EC

1
1 2
R513 0_0402_5%~D

+3.3V_RUN
X1EDP & DP119 co-lay circuit: (Defult DP119)
X1EDP->R356,R1031,R336,R279,R1029==>POP
@ U50 R328,R338==>De-POP
1 GND 4 R361 1 2 20K_0402_5%~D DP119_EN DP119->R356,R1031,R336,R279,R1029==>De-POP

USBP11_D-
VCC

USBP11_D+
+CAMERA_VDD
R328
@R336
@ R336
1
1
2
2
20K_0402_5%~D
20K_0402_5%~D
VOD_CTL
VOD_CTL0
EQ_CTL
R328,R338==>POP eDP Repeater
2 3 R338 1 2 20K_0402_5%~D
IO1 IO2 R357 20K_0402_5%~D PRECTL U46 +3.3V_RUN
1 2
PRTR5V0U2X_SOT143-4~D @R356
@ R356 1 2 4.99K_0402_1%~D PUP5K
B C265 1 EDP_CPU_LANE_P0_C B
2 0.1U_0402_10V7K~D 2
IN 0(p) VCC
4
7 EDP_CPU_LANE_P0 C351 1 EDP_CPU_LANE_N0_C
2 0.1U_0402_10V7K~D 3 24
DP119_EN 7 EDP_CPU_LANE_N0 IN 0(n) VCC

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
@ R360 1
@R360 2 20K_0402_5%~D 1 1
@R279
@ R279 1 2 20K_0402_5%~D VOD_CTL C350 1 2 0.1U_0402_10V7K~D EDP_CPU_LANE_P1_C 5
@R1027
@ R1027 1 20K_0402_5%~D VOD_CTL0 7 EDP_CPU_LANE_P1 C266 1 EDP_CPU_LANE_N1_C IN 1(p)
2 2 0.1U_0402_10V7K~D 6
IN 1(n)
7 EDP_CPU_LANE_N1

C200

C196
@R1029
@ R1029 1 2 20K_0402_5%~D EQ_CTL
For Webcam @
R995
@R1030
@ R1030 1 2 20K_0402_5%~D PRECTL EDP_LANE_P0 C271 2 1 0.1U_0402_10V7K~D EDP_CPU_LANE_P0_RP 26
OUT 0(p) NC
8
2 2
@R1031
@ R1031 1 2 4.99K_0402_1%~D PDN5K EDP_LANE_N0 C358 2 1 0.1U_0402_10V7K~D EDP_CPU_LANE_N0_RP 25 9
OUT 0(n) NC
1 2 10
EDP_LANE_P1 C359 2 EDP_CPU_LANE_P1_RP 23 NC
1 0.1U_0402_10V7K~D OUT1 (p) NC
11
0_0603_5%~D EDP_LANE_N1 C225 2 1 0.1U_0402_10V7K~D EDP_CPU_LANE_N1_RP 22 12
OUT1 (n) NC
13
+CAMERA_VDD NC
16
R997 DP119_EN NC
14 17
0_0603_5%~D EQ_CTL EN NC
15 18
Refer to SN75DP119RHHR rev. 0P35 EQ_CTL NC
S

2 1 +CAMERA_VDD_R 3 1 +3.3V_RUN 19
VOD_CTL NC
31 20
VOD_CTL NC
0.1U_0402_16V4Z~D

10U_1206_16V4Z~D

Q132 VOD (mV) PRE (dB) PRECTL VOD_CTL PRECTL 33 27 VOD_CTL0


PMV45EN_SOT23-3~D PRECTL NC
EQ gain (dB) EQ_CTL
G

1 1 28
2

NC
2.5 0 0 1
GND NC
29
C249

C250

0 0 7
GND NC
30
PUP5K
2 2 300 6 VCC/2 0 21
GND NC
34
PDN5K
3 VCC/2 32
GND NC
35
+15V_ALW
8.5 1 0 37
Thermal Pad(GND) NC
36
1 * 6 1
0 0 VCC/2 SN75DP119RHHR_QFN36_6X6~D
C1043
1

0.1U_0402_16V4Z~D
R169 2 400 3.5 VCC/2 VCC/2
100K_0402_5%~D 5.5 1 VCC/2 MODE DP119_EN
0 0 1 PWR Down 0
2

A A
600
Webcam PWR CTRL 2 VCC/2 1 OUT2 DIS VCC/2
1

D
SSM3K7002FU_SC70-3~D

CCD_OFF
* 800 0 1 1 * OUT1 OUT2 EN 1
2
39 CCD_OFF 1
DELL CONFIDENTIAL/PROPRIETARY
Q133

G
S C1044
3

2
0.1U_0402_25V4Z~D Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
eDP & CAM Conn
Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 24 of 60
5 4 3 2 1
5 4 3 2 1

+3.3V_RUN
AUX/DDC SW for DPC to E-DOCK 2 1

C337
0.1U_0402_16V4Z~D

C272 U86
0.1U_0402_10V7K~D 1 14
D DPC_AUX_C BE0 VCC D
17 DPC_PCH_DOCK_AUX 2 1 2
A0 BE3 13
DPC_DOCK_AUX 3 12
38 DPC_DOCK_AUX B0 A3 PCH_DDPC_CTRLCLK 17
4 11
DPC_AUX#_C BE1 B3
17 DPC_PCH_DOCK_AUX# 2 1 5 10
C274 0.1U_0402_10V7K~D A1 BE2
DPC_DOCK_AUX# 6 9
38 DPC_DOCK_AUX# B1 A2 PCH_DDPC_CTRLDATA 17
7 8
GND B2
PI3C3125LEX_TSSOP14~D

+5V_RUN

2 1

C277

1
5
0.1U_0402_16V4Z~D

NC
P
DPC_CA_DET 2 4 DPC_CA_DET#
38 DPC_CA_DET A Y

G
U8
NC7SZ04P5X_NL_SC70-5~D

3
C C

+3.3V_RUN +3.3V_RUN
AUX/DDC SW for DPD to E-DOCK 2 1

C368 1 2 PCH_DDPC_CTRLCLK
0.1U_0402_16V4Z~D R885 2.2K_0402_5%~D Intel WW18 Strapping option
1 2 PCH_DDPC_CTRLDATA
C369 U88 R886 2.2K_0402_5%~D
0.1U_0402_10V7K~D 1 14 1 2 PCH_DDPD_CTRLCLK
DPD_AUX_C BE0 VCC R900 2.2K_0402_5%~D
17 DPD_PCH_DOCK_AUX 2 1 2
A0 BE3
13
PCH_DDPD_CTRLDATA
Intel WW18 Strapping option
1 2
DPD_DOCK_AUX 3 12 R891 2.2K_0402_5%~D
38 DPD_DOCK_AUX B0 A3 PCH_DDPD_CTRLCLK 17
4 11
DPD_AUX#_C BE1 B3
17 DPD_PCH_DOCK_AUX# 2 1 5 10
C370 0.1U_0402_10V7K~D A1 BE2 DPD_CA_DET
1 2
DPD_DOCK_AUX# 6 9 R1010 1M_0402_5%~D
38 DPD_DOCK_AUX# B1 A2 PCH_DDPD_CTRLDATA 17
1 2 DPC_CA_DET
7 8 R996 1M_0402_5%~D
GND B2
PI3C3125LEX_TSSOP14~D
B B

+5V_RUN

2 1

C445
5

0.1U_0402_16V4Z~D
P

NC

DPD_CA_DET 2 4 DPD_CA_DET#
38 DPD_CA_DET A Y
G

U18
NC7SZ04P5X_NL_SC70-5~D
3

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, DPC DPD SW for DOCK
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 25 of 60
5 4 3 2 1
2 1

+3.3V_RUN
AUX/DDC SW MB DPB 2 1

C367
0.1U_0402_16V4Z~D Display port Dip Connector
C294 U87 +3.3V_RUN
0.1U_0402_10V7K~D 1 14
DPB_AUX_C BE0 VCC
17 DPB_PCH_AUX 2 1 2
A0 BE3 13

DPB_MB_AUX 3 12
B0 A3 PCH_SDVO_CTRLCLK 17
4 BE1 B3
11
2 1 DPB_AUX#_C 5 10
17 DPB_PCH_AUX# A1 BE2
C365 0.1U_0402_10V7K~D
DPB_MB_AUX# 6 9
B1 A2 PCH_SDVO_CTRLDATA 17

2
0_1206_5%~D
7 8 F1 @
GND B2

R184
1.5A_6V_1206L150PR~D
PI3C3125LEX_TSSOP14~D

1
+VDISPLAY_VCC

10U_0805_10V4Z~D
0.1U_0402_10V7K~D
B +5V_RUN B
1 1

C1075
C275
2 1

C366 2 2
5

0.1U_0402_16V4Z~D 1
P

NC
DPB_MB_CA_DET 2 4 DPB_MB_CA_DET#
A Y
G

U14
NC7SZ04P5X_NL_SC70-5~D +3.3V_RUN JDP1
3

20 DP_PWR
19 RTN
1 2 PCH_SDVO_CTRLCLK DPB_MB_HPD 18
R888 2.2K_0402_5%~D DPB_MB_AUX# HP_DET
17 AUX_CH-
Intel WW18 Strapping option 1 2 PCH_SDVO_CTRLDATA 16
R889 2.2K_0402_5%~D DPB_MB_AUX GND
15 AUX_CH+
1 2 DPB_MB_AUX# DPB_MB_P14 14
R278 100K_0402_5%~D DPB_MB_CA_DET GND
13 CA_DET
MBDP_LANE_N3 12 LAN3-
11 LAN3_shield GND 21
+3.3V_RUN 1 2 DPB_MB_AUX MBDP_LANE_P3 10 22

PS_I2C_CTL_EN#_DPB
DPB Repeater for MB DP R1024
1 2
100K_0402_5%~D
DPB_MB_CA_DET
MBDP_LANE_N2

MBDP_LANE_P2
9
8
LAN3+
LAN2-
LAN2_shield
GND
GND
GND
23
24
R362 4.7K_0402_5%~D R185 1M_0402_5%~D 7
PS_PC0_DPB LAN2+
@ R330 4.7K_0402_5%~D 1 2 DPB_MB_HPD MBDP_LANE_N1 6
LAN1-
@ R337 4.7K_0402_5%~D PS_PC1_DPB +3.3V_RUN R186 110K_0402_1%~D 5
LAN1_shield
1 2 DPB_MB_P14 MBDP_LANE_P1 4
LAN1+
R797 5.1M_0603_1%~D MBDP_LANE_N0 3
LAN0-
2
LAN0_shield

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
U47 1 1 1 1 MBDP_LANE_P0 1
LAN0+
36
VCC
17 DPB_PCH_LANE_P0
C396 2 1 0.1U_0402_10V7K~D DPB_PCH_LANE_P0_C 38
IN1p VCC/NC
32 MOLEX_105088-0001

C201

C197

C198

C199
17 DPB_PCH_LANE_N0
C395 2 1 0.1U_0402_10V7K~D DPB_PCH_LANE_N0_C 39 46
IN1n VCC 2 2 2 2
40
VCC
17 DPB_PCH_LANE_P1
C372 2 1 0.1U_0402_10V7K~D DPB_PCH_LANE_P1_C 41 33
IN2p VCC
17 DPB_PCH_LANE_N1
C371 2 1 0.1U_0402_10V7K~D DPB_PCH_LANE_N1_C 42
IN2n VCC
21
15
VCC
17 DPB_PCH_LANE_P2
C373 2 1 0.1U_0402_10V7K~D DPB_PCH_LANE_P2_C 44 11
IN3p VCC
17 DPB_PCH_LANE_N2
C407 2 1 0.1U_0402_10V7K~D DPB_PCH_LANE_N2_C 45
IN3n
23 DPB_PCH_LANE_P0_RP C441 2 1 0.1U_0402_10V7K~D MBDP_LANE_P0
OUT1p
17 DPB_PCH_LANE_P3
C419 2 1 0.1U_0402_10V7K~D DPB_PCH_LANE_P3_C 47
IN4p OUT1n
22 DPB_PCH_LANE_N0_RP C439 2 1 0.1U_0402_10V7K~D MBDP_LANE_N0
17 DPB_PCH_LANE_N3
C418 2 1 0.1U_0402_10V7K~D DPB_PCH_LANE_N3_C 48
IN4n DPB_PCH_LANE_P1_RP C438 MBDP_LANE_P1
OUT2p
20 2 1 0.1U_0402_10V7K~D
DPB_MB_AUX C115 2 1 0.1U_0402_10V7K~D DPB_PCH_AUX_C 8 19 DPB_PCH_LANE_N1_RP C437 2 1 0.1U_0402_10V7K~D MBDP_LANE_N1
DPB_MB_AUX# C114 2 DPB_PCH_AUX#_C AUX+ OUT2n
1 0.1U_0402_10V7K~D 9
AUX-
17 DPB_PCH_LANE_P2_RP C440 2 1 0.1U_0402_10V7K~D MBDP_LANE_P2
+3.3V_RUN OUT3p DPB_PCH_LANE_N2_RP C442 MBDP_LANE_N2
29 16 2 1 0.1U_0402_10V7K~D
NC OUT3n
28
R281 1 NC DPB_PCH_LANE_P3_RP MBDP_LANE_P3
2 100K_0402_5%~D 14 C444 2 1 0.1U_0402_10V7K~D
R283 1 OUT4p DPB_PCH_LANE_N3_RP MBDP_LANE_N3
2 100K_0402_5%~D OUT4n
13 C443 2 1 0.1U_0402_10V7K~D
PS_I2C_CTL_EN#_DPB 26
DPB_MB_HPD I2C_CTL_EN#
30
PS_OE# HPD_SINK DPB_PCH_HPD
25 7
PS_PC0_DPB OE# HPD DPB_PCH_HPD 17
3
+3.3V_RUN PS_PC1_DPB PC0/I2C_ADDR0
4 5
PS_REXT_DPB PC1/I2C_ADDR1 GND
6 12
REXT GND
35 18
NC/SCL_CTL GND
34 24
NC/SDA_CTL GND
1

2 31
R700 PS_CEXT_DPB NC GND
10 37
10K_0402_5%~D DPB_MB_CA_DET CEXT GND
27 43
CA_DET/NC GND
1 49
2

A NC VSS A

PS_OE# PS8121EDQFN48G_QFN48_7X7~D
1U_0402_6.3V6K~D

2
1

D
C604

DPB_MB_HPD 2
G R363 1 2 1K_0402_5%~D PS_REXT_DPB
S 1
Q36
3

SSM3K7002FU_SC70-3~D C422 1 2 2.2U_0603_10V6K~D PS_CEXT_DPB

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Display port
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 26 of 60
2 1
2 1

DA204U_SOT323-3~D

DA204U_SOT323-3~D

DA204U_SOT323-3~D
+5V_RUN

2
3
@ @ @

D5

D6

D7
+3.3V_RUN

NC
D8
BAT1000-7-F_SOT23-3~D

1
+5V_RUN_CRT
RED_CRT 1 2
L61
BLM18BB100SN1D_2P~D
GREEN_CRT 1 2
L62 +CRT_VCC
BLM18BB100SN1D_2P~D

1U_0402_6.3V6K~D
5A_125V_R451005.MRL~D
BLUE_CRT 1 2
L63

2
3.3P_0402_50V8C~D

3.3P_0402_50V8C~D

3.3P_0402_50V8C~D

0_1206_5%~D
BLM18BB100SN1D_2P~D 1

2
150_0402_1%~D

150_0402_1%~D

150_0402_1%~D

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

@ F2
1 1 1

R171

C254
@ @ @ 1 1 1

C390

C518

C996
R172

R173

R174
2

C251

C252

C253

1
2 2 2

1
2 2 2 JCRT1
6
11
R 1
+5V_RUN_SYNC 7
12
G 2
B B
8 16

2.2K_0402_5%~D

2.2K_0402_5%~D

1K_0402_5%~D

1K_0402_5%~D
JVGA_HS 13 17

1
B 3

R794

R793

@ R175

@ R176
+CRT_VCC 9
JVGA_VS 14
M_ID2# 4
10

2
15
5
DAT_DDC2_CRT
CLK_DDC2_CRT SUYIN_070546FR015H358ZR~D

1
L11 C258
BLM18AG121SN1D_0603~D
HSYNC_CRT 2
1 2 HSYNC_L2 1 2 0.1U_0402_16V4Z~D
R177 0_0402_5%~D

VSYNC_CRT 1 2 VSYNC_L2 1 2
R178 0_0402_5%~D L12
BLM18AG121SN1D_0603~D

VGA SW for MB/DOCK


+3.3V_RUN
U131

22P_0402_50V8J~D

22P_0402_50V8J~D
PCH_CRT_VSYNC 1 4 1 1
17 PCH_CRT_VSYNC A0 VDD

@ C267

@ C268
PCH_CRT_HSYNC 2 16
17 PCH_CRT_HSYNC PCH_CRT_RED A1 VDD
17 PCH_CRT_RED 5 23
PCH_CRT_GRN A2 VDD
17 PCH_CRT_GRN 6 29
PCH_CRT_BLU A3 VDD 2 2
17 PCH_CRT_BLU 7 32
A4 VDD
8 27 VSYNC_BUF
SEL1 0B1 HSYNC_BUF
25
1B1 RED_CRT
22
PCH_CRT_DDC_DAT 2B1 GREEN_CRT
17 PCH_CRT_DDC_DAT 9 20
PCH_CRT_DDC_CLK A5 3B1 BLUE_CRT
17 PCH_CRT_DDC_CLK 10 18
A6 4B1 DAT_DDC2_CRT
12
CRT_SWITCH 5B1 CLK_DDC2_CRT
39 CRT_SWITCH 30 14
SEL2 6B1 +5V_RUN

26 VSYNC_DOCK
0B2 VSYNC_DOCK 38

2
24 HSYNC_DOCK
1B2 RED_DOCK HSYNC_DOCK 38
3 21
GND 2B2 GREEN_DOCK RED_DOCK 38 D9
11 19
GND 3B2 BLUE_DOCK GREEN_DOCK 38 SDM10U45-7_SOD523-2~D
28 17
GND 4B2 DAT_DDC2_DOCK BLUE_DOCK 38
31 13

1
GND 5B2 CLK_DDC2_DOCK DAT_DDC2_DOCK 38
33 15
GPAD 6B2 CLK_DDC2_DOCK 38 +5V_RUN_SYNC
1 2 1 2
PI3V712-AZLEX_TQFN32_6X3~D R179 1K_0402_5%~D
C269

1
+3.3V_RUN 0.1U_0402_16V4Z~D

OE#
HSYNC_BUF 2 4 HSYNC_CRT
A Y
SEL1/SEL2 Chanel Source

G
10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

U5
0 A=B1 MB 74AHCT1G125GW_SOT353-5~D

3
A A
1 1 1 1 1 1
1 A=B2 APR/SPR 1 2
C259

C260

C261

C262

C263

C264

1
C270
2 2 2 2 2 2 0.1U_0402_16V4Z~D

OE#
P
VSYNC_BUF 2 4 VSYNC_CRT
A Y

G
U6
74AHCT1G125GW_SOT353-5~D

3
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, CRT/Video switch
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 27 of 60
2 1
5 4 3 2 1

For ODD +5VMOD Source


+15V_ALW +5V_ALW

JSATA1

1
1 +3.3V_ALW2
+5V_MOD C311 2 SATA_ODD_PTX_DRX_P1 GND
15 SATA_ODD_PTX_DRX_P1_C 1 0.01U_0402_16V7K~D 2 RX+
R316
C310 2 1 0.01U_0402_16V7K~D SATA_ODD_PTX_DRX_N1 3 100K_0402_5%~D
15 SATA_ODD_PTX_DRX_N1_C RX-

1
2
5
6
4 GND
1000P_0402_50V7K~D

0.1U_0402_16V4Z~D

D C374 2 1 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_N1 5 R317 D D

2
15 SATA_ODD_PRX_DTX_N1_C TX- 100K_0402_5%~D G Q29
1 1 6 TX+
C375 2 1 0.01U_0402_16V7K~D SATA_ODD_PRX_DTX_P1 7 2 MOD_EN 3 SI3456BDV-T1-E3_TSOP6~D
15 SATA_ODD_PRX_DTX_P1_C GND
C376

C377

3
DMN66D0LDW-7_SOT363-6~D
ODD_DET# 8 +5V_MOD +5V_RUN

4
2 2 40 ODD_DET# DP

0.1U_0603_50V4Z~D
+5V_MOD 9 PJP15
+5V

Q31B
10 +5V 1 2

10U_0805_10V4Z~D

100K_0402_5%~D
+3.3V_RUN 1 2 11 MD 5 1

1
R1239 10K_0402_5%~D 12 14 1 @ PAD-OPEN 4x4m
GND GND1

C378
13 15 Q31A

4
GND GND2

C379

R318
DMN66D0LDW-7_SOT363-6~D
TYCO_2-1759838-8 2
2 2

2
39 MODC_EN
Pleace near ODD CONN

1
Main SATA +5V Default R319
100K_0402_5%~D

2
+3.3V_RUN

0.01U_0402_16V7K~D

0.1U_0402_16V4Z~D

R1308

R1305
HDD Repeater

2
1 1

C1383

C1384

0_0402_5%~D

0_0402_5%~D
2 2

1
U96
7 6
PSATA_PTX_DRX_P0_C PSATA_PTX_DRX_P0 EN VCC
15 PSATA_PTX_DRX_P0_C 2 1 10
C323 0.01U_0402_16V7K~D VCC
C 1 16 C
PSATA_PTX_DRX_N0_C PSATA_PTX_DRX_N0 RX_1P VCC
15 PSATA_PTX_DRX_N0_C 2 1 2 20
C324 0.01U_0402_16V7K~D RX_1N VCC
PSATA_PRX_DTX_P0_C 2 1 PSATA_PRX_DTX_P0 5 9
15 PSATA_PRX_DTX_P0_C C1382 0.01U_0402_16V7K~D TX_2P PE1
4 8
PSATA_PRX_DTX_N0_C TX_2N PE2
2 1 PSATA_PRX_DTX_N0
15 PSATA_PRX_DTX_N0_C C1385 0.01U_0402_16V7K~D PSATA_PTX_DRX_P0_RP
3 15
GND TX_1P PSATA_PTX_DRX_N0_RP
13 14
GND TX_1N
17
GND PSATA_PRX_DTX_N0_RP
18 12
GND RX_2N PSATA_PRX_DTX_P0_RP
19 11
GND RX_2P
21
PAD

1
1
SN75LVCP412ARTJR_QFN20_4X4~D

0_0402_5%~D
R1304

R1303
0_0402_5%~D

2
2
@
+3.3V_RUN
Free Fall Sensor HDD PWR
+5V_ALW
+15V_ALW
10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

1 1 +3.3V_ALW2

1
U139
C435

C436

DE351DLTR R320

1
2
5
6
100K_0402_5%~D

1
2 2 1 D
VDD_IO G Q32
6 2

2
VDD GND R321 HDD_EN_5V SI3456BDV-T1-E3_TSOP6~D
4 3
HDD_FALL_INT GND 100K_0402_5%~D S
8 5
18,40 HDD_FALL_INT FFS_INT2 INT 1 GND +5V_HDD +5V_RUN
9 10

4
INT 2 GND

3
DMN66D0LDW-7_SOT363-6~D
PJP16

0.1U_0603_50V4Z~D
12 1 2
SDO

Q34B

10U_0805_10V4Z~D
HDD_SMBDAT 13
40 HDD_SMBDAT SDA / SDI / SDO

100K_0402_5%~D
B HDD_SMBCLK 14 5 1 1 @ PAD-OPEN 4x4m B
40 HDD_SMBCLK SCL / SPC

1
RSVD
3 +3.3V_RUN Open

C382

C383

R322
1 2 7 11 Q34A

4
3,14,15,16 DDR_XDP_SMBDAT CS RSVD
R1528 0_0402_5%~D DMN66D0LDW-7_SOT363-6~D
1 2 2 2
,13,14,15,16 DDR_XDP_SMBCLK
R1529 0_0402_5%~D DE351DLTR8_LGA14_3X5~D 2

2
39 HDDC_EN
+3.3V_RUN
For HDD Temp.

1
1
R323
1 2 HDD_SMBDAT 100K_0402_5%~D +5V_HDD Source
R445 2.2K_0402_5%~D JSATA2
1 2 HDD_SMBCLK 1

2
R463 2.2K_0402_5%~D PSATA_PTX_DRX_P0_RP C308 2 SATA_PTX_DRX_P0 GND
1 0.01U_0402_16V7K~D 2
PSATA_PTX_DRX_N0_RP C307 2 SATA_PTX_DRX_N0 RX+
1 0.01U_0402_16V7K~D 3
RX-
4
PSATA_PRX_DTX_N0_RP SATA_PRX_DTX_N0 GND
2 1 5
TX-
PSATA_PRX_DTX_P0_RP C380 2 1 0.01U_0402_16V7K~D SATA_PRX_DTX_P0 6
+3.3V_RUN +5V_HDD C381 0.01U_0402_16V7K~D TX+
7
GND
8
3.3V
9
3.3V
1

10
3.3V
11
@ R329 HDD_DET# GND
12
100K_0402_5%~D 15 HDD_DET# GND
13
GND
2
G

+5V_HDD 14
2

5V
15
FFS_INT2 FFS_INT2_Q 5V
19 FFS_INT2
3 1 1 2 16
5V
S

17
FFS_INT2_Q GND
18 23
D10 Reserved GND1
19 24
Q118 SDM10U45-7_SOD523-2~D +5V_HDD GND GND2
20
SSM3K7002FU_SC70-3~D 12V
21
12V
22
12V
1000P_0402_50V7K~D

0.1U_0402_16V4Z~D

FOX_LD2122H-S4SL6_RV
A 1 1 A
C384

C385

Main SATA +5V Default


2 2

DELL CONFIDENTIAL/PROPRIETARY
Pleace near HDD CONN Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT ODD/HDD CONNECTOR
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 28 of 60
5 4 3 2 1
2 1

Speaker Connector
15 mils trace JSPK1 +3.3V_RUN +3.3V_RUN
1
INT_SPK_L+ 1
2 2

1
INT_SPK_L- 3 Close pin 24 Close pin 18 Close pin 25
INT_SPK_R+ 3 R365
4 2 1
4

0.1U_0402_10V7K~D

1U_0603_10V6K~D

10U_0805_10V6K~D

0.1U_0402_10V7K~D

1U_0603_10V6K~D

0.1U_0402_10V7K~D

1U_0603_10V6K~D
INT_SPK_R- 5 100K_0402_5%~D L70
5 47UH_CBMF1608T470K_10%~D
19 SPEAKER_DET# 6
6
1 1 1 1 1 1 1

2
7
GND

C429

C458

C428

C398

C397

C431

C463
8 PCH_AZ_CODEC_RST# 1 2 RST#
GND @R50
@ R50 U15
2 2 2 2 2 2 2

100P_0402_50V8J~D

100P_0402_50V8J~D

100P_0402_50V8J~D

100P_0402_50V8J~D

0.1U_0402_10V7K~D
TYCO_1775765-6~D 33_0402_5%~D 1
+3.3V_RUN_I2S_VDD 25 5 I2S_DO
AVDD DOUT

C433
27 AUD_DOCK_MIC_IN_L_R
LEFT_LO AUD_DOCK_MIC_IN_R_R
1 1 1 1 18 29
2 DRVDD RIGHT_LO

@ C423

@ C424

@ C425

@ C426
Place close to JSPK1 24
DRVDD
@D1
@ D1 L18 +1.8V_RUN 32 20
2 2 2 2 INT_SPK_R+ INT_SPK_L+ BLM18EG601SN1D_2P~D DVDD NC
1 6 19
V I/O V I/O +3.3V_RUN_IOVDD NC
+3.3V_RUN 1 2 7 22
IOVDD NC
2 5 +5V_RUN 23
Ground V BUS NC

0.1U_0402_10V7K~D

1U_0603_10V6K~D
I2S_BCLK 2 28
INT_SPK_R- INT_SPK_L- I2S_DI# BCLK NC
3 4 1 1 4 11
V I/O V I/O XTALI_12MHZ DIN NC
1 13
MCLK NC

C392

C393
IP4223CZ6_SO6~D 14
AUD_DOCK_HP_L_C NC
10 16
+5V_RUN 2 2 AUD_DOCK_HP_R_C LINEL NC
12 LINER NC 15
L77 30
+3.3V_RUN +3.3V_RUN +CODEC_DVDD_CORE BLM21PG600SN1D_0805~D RST# NC
1 1 31 RESET#

4700P_0402_25V7K~D
+VDDA_AVDD 1 2 @ @ 17
AVSS1

10U_0805_10V6K~D

4700P_0402_25V7K~D
C1066

C1067
0.1U_0402_10V7K~D

1U_0603_10V6K~D
DAI_GPU_R3P_SMBCLK 8 26
SCL AVSS2
1U_0603_10V6K~D

B 1 B
2 2
0.1U_0402_10V7K~D

0.1U_0402_10V7K~D L3 DAI_GPU_R3P_SMBDAT 9
1 1 SDA DRVSS 21

C403
1 1 1 +VDDA_PVDD 1 2
U16

C399

C454
BLM21PG600SN1D_0805~D I2S_LRCLK 3 6
2 WCLK DVSS

0.1U_0402_10V7K~D

10U_0805_10V6K~D
C405

C402

C404

2 2

1U_0603_10V6K~D
2 2 2
1 DVDD_CORE AVDD 27 GPAD 33 Close pin 32
AVDD 38 1 1 1
9 +1.8V_RUN
DVDD

C401

C456

C400
39 +3.3V_RUN TLV320AIC3004IRHBR_QFN32_5X5~D
PVDD
3 DVDD_IO PVDD 45
2 2 2

0.1U_0402_10V7K~D

1U_0603_10V6K~D
13 AUD_SENSE_A 1 1
PCH_AZ_CODEC_BITCLK SENSE_A AUD_SENSE_B
15 PCH_AZ_CODEC_BITCLK 6 HDA_BITCLK SENSE_B 14

C430

C459
R18
PCH_AC_SDIN0_R 0_0402_5%~D X4
15 PCH_AZ_CODEC_SDIN0 1 2 8 HDA_SDI
R332 33_0402_5%~D 28 1 2 4 1 2 2
HP0_PORT_A_L AUD_EXT_MIC_L 37 VDD ST/OE

0.1U_0402_10V7K~D
PCH_AZ_CODEC_SDOUT 5 29
15 PCH_AZ_CODEC_SDOUT HDA_SDO HP0_PORT_A_R AUD_EXT_MIC_R 37
23 +VREFOUT XTALI_12MHZ 3 2
VREFOUT_A_or_F OUT GND
15 PCH_AZ_CODEC_SYNC 10 HDA_SYNC 1

C432
31 12MHZ_15PF_SIT8102ACL3333E12T~D
HP1_PORT_B_L AUD_HP_OUT_L 37
PCH_AZ_CODEC_RST# 11 32
15 PCH_AZ_CODEC_RST# HDA_RST# HP1_PORT_B_R AUD_HP_OUT_R 37
2
PORT_C_L 19
L4 20
BLM18BB221SN1D_2P~D PORT_C_R DAI_GPU_R3P_SMBCLK
VREFOUT_C 24 DAI_GPU_R3P_SMBCLK 23,40
1 2 DMIC_CLK_R 2
24 DMIC_CLK DMIC_CLK/GPIO1
4 40 INT_SPK_L+ C1894 1 2 1000P_0402_50V7K~D
24 DMIC0 DMIC0/GPIO2 SPKR_PORT_D_L+
150P_0402_50V8J~D

41 INT_SPK_L-
SPKR_PORT_D_L- C1895 1
1 1 46
DMIC1/GPIO0/SPDIF_OUT_1 2 1000P_0402_50V7K~D
C676 @ 43 INT_SPK_R- 2 1 DAI_GPU_R3P_SMBDAT
SPKR_PORT_D_R- DAI_GPU_R3P_SMBDAT 23,40
C679

150P_0402_50V8J~D 48 44 INT_SPK_R+ @ R1090 10M_0402_5%~D


SPDIF_OUT_0 SPKR_PORT_D_R+ R340 2K_0402_1%~D C410 1U_0603_10V6K~D
+3.3V_RUN 1 2
2 2 R1296 10K_0402_5%~D 47 15 AUD_DOCK_HP_OUT_L 1 2 AUD_DOCK_HP_L_R 1 2 AUD_DOCK_HP_L_C
39 AUD_NB_MUTE EAPD PORT_E_L
16 AUD_DOCK_HP_OUT_R 1 2 AUD_DOCK_HP_R_R 1 2 AUD_DOCK_HP_R_C
PORT_E_R R342 2K_0402_1%~D C411 1U_0603_10V6K~D
17 AUD_DOCK_MIC_IN_L 2 1
PORT_F_L AUD_DOCK_MIC_IN_R @ R1089 10M_0402_5%~D
35 18
CAP- PORT_F_R
1 12 C408 1 2 1U_0603_10V6K~D DOCK_MIC_IN_L_C R1091 1 2 2K_0402_1%~D AUD_DOCK_MIC_IN_L_R
PC_BEEP C409 1
36
CAP+ 2 1U_0603_10V6K~D DOCK_MIC_IN_R_C R1092 1 2 2K_0402_1%~D AUD_DOCK_MIC_IN_R_R
C453 25
4.7U_0603_6.3V6M~D MONO_OUT C1896 1 2 1000P_0402_50V7K~D
2 7 C1897 1 2 1000P_0402_50V7K~D
DVSS AUD_PC_BEEP
33 22 CAP2 2 1 2 1
AVSS CAP2 SPKR 15
30 C389 0.1U_0402_16V4Z~D R327 510K_0402_5%~D
AVSS VREFFILT
26 21 2 1 2 1 BEEP 40
AVSS VREFFILT C394 0.1U_0402_16V4Z~D R828 510K_0402_5%~D
42 34
PVSS V-
Close to U16 pin5 Close to U16 pin6
49
DAP VREG
37 Resistor SENSE_A SENSE_B
PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_BITCLK
92HD81B1B5NLGXUAX8_QFN48_7X7~D 39.2K PORT A (HP0) PORT E
1

10U_0805_10V6K~D

1U_0603_10V6K~D
4.7U_0603_6.3V6M~D

@ R344
@R344 @ R343
@R343 4.7U_0603_6.3V6M~D +3.3V_RUN +3.3V_RUN
47_0402_5%~D 10_0402_5%~D 1 1 1 1 20K PORT B (HP1) PORT F
C455

C414

C415

0.1U_0402_16V7K~D
C457
2

1 1 2 2 2 2
10K PORT C DMIC0

2
DA204U_SOT323-3~D

DA204U_SOT323-3~D

DA204U_SOT323-3~D

DA204U_SOT323-3~D
@C416
@C416 @ C412
@C412 2

C413
0.1U_0402_10V7K~D 10P_0402_50V8J~D 5.11K SPDIFOUT0 SPDIFOUT1 (DMIC0) @ @ @ @
2 2

D17

D18

D19

D55
2.49K Pull-up to AVDD 1 U17
16

1
VCC
I2S_BCLK 2 3
+VDDA_AVDD 1A 1Y# DAI_BCLK# 38
A A
Place closely to Pin 34 I2S_LRCLK 4 5
R346 +VDDA_AVDD 2A 2Y# DAI_LRCK# 38
Place closely to Pin 13. 2.49K_0402_1%~D R347 I2S_DO 6 7 DAI_DO# 38
AUD_SENSE_A 2.49K_0402_1%~D 3A 3Y#
2 1
AUD_SENSE_B 2 1 XTALI_12MHZ 10 9
+3.3V_RUN 4A 4Y# DAI_12MHZ# 38
1000P_0402_50V7K~D

1000P_0402_50V7K~D

+3.3V_RUN
39.2K_0402_1%~D

20K_0402_1%~D

1 1 12 11
5A 5Y#
1

20K_0402_1%~D
39.2K_0402_1%~D

+3.3V_RUN
1

+3.3V_RUN
R348

R349

C417

C420

14 13 I2S_DI#
+3.3V_RUN 6A 6Y#
R352

R350
1

2 2
R351

100K_0402_5%~D 1
39 EN_I2S_NB_CODEC# OE1#
1

2
100K_0402_5%~D

R355 2 1 15 8
2

OE2# GND
1

100K_0402_5%~D R345 D20


2

2
R353

R354 1K_0402_5%~D @ DA204U_SOT323-3~D


6

100K_0402_5%~D CD74HC366M96_SO16~D
2

1
37 AUD_MIC_SWITCH 2 5 AUD_HP_NB_SENSE 37,39
Q38A Q38B DAI_DI 38
39 DOCK_HP_DET 2 5 DOCK_MIC_DET 39
1

DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
Q40A Q40B
1

DMN66D0LDW-7_SOT363-6~D DMN66D0LDW-7_SOT363-6~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
Azalia (HD) Codec
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.
LA-5571P
Date: Thursday, January 21, 2010 Sheet 29 of 60
2 1
5 4 3 2 1

+3.3V_LAN +3.3V_LAN

+3.3V_RUN R370
0_1210_5%~D

10U_0805_6.3V6M~D
0.1U_0402_10V7K~D
1 2 TP_LAN_JTAG_TMS +1.05V_M for VC10 not the 1 2 1 1

1
@R75
@ R75 10K_0402_5%~D
correct or complete

C804

C805
1 2 TP_LAN_JTAG_TCK R699

1
implementation to connect to

0_1210_5%~D
@R76
@ R76 10K_0402_5%~D 10K_0402_5%~D
2 2
+1.05V SVR.

R371
2
U79

0.01U_0402_16V7K~D

2
1
LANCLK_REQ# 48 13 LAN_TX0+ 1
15,16 LANCLK_REQ# CLK_REQ_N MDI_PLUS0 LAN_TX0- R72 +3.3V_LAN_R
18 PLTRST_LAN# 36 14
PE_RST_N MDI_MINUS0

4.7U_0603_6.3V6M~D
4.7U_0603_6.3V6M~D
C1118
D 4.99K_0402_1%~D D
CLK_PCIE_LAN 44 17 LAN_TX1+
16 CLK_PCIE_LAN CLK_PCIE_LAN# PE_CLKP MDI_PLUS1 LAN_TX1- 2 Trace=12mil
45 18 1 1

2
16 CLK_PCIE_LAN#

PCIE
PE_CLKN MDI_MINUS1

MDI

C466
C465
16 PCIE_PRX_GLANTX_P6 2 1 PCIE_PRX_GLANTX_P6_C 38 20 LAN_TX2+
C451 0.1U_0402_10V7K~D PETp MDI_PLUS2 LAN_TX2-
39 21
PETn MDI_MINUS2

3
2 1 PCIE_PRX_GLANTX_N6_C Trace=12mil 2 2
+3.3V_LAN 16 PCIE_PRX_GLANTX_N6 LAN_TX3+
C452 0.1U_0402_10V7K~D 41 23
16 PCIE_PTX_GLANRX_P6_C PERp MDI_PLUS3 LAN_TX3- REGCTL_PNP10
16 PCIE_PTX_GLANRX_N6_C 42 24 1 2 1
PERn MDI_MINUS3 R73
1

0_0402_5%~D Q45
R44 LAN_SMBCLK 28 6 DCP69A-13_SOT223-3~D

2
4
16 LAN_SMBCLK SMB_CLK VCT

SMBUS
10K_0402_5%~D LAN_SMBDATA 31 +1.05V_M
16 LAN_SMBDATA SMB_DATA +1.0V_LAN
1 +RSVD_VCC3P3_1 R70 2 1 3.01K_0402_1%~D +3.3V_LAN @ R119
RSVD_VCC3P3_1 +RSVD_VCC3P3_2
SMBus Device Address 0xC8 2 2 1 0_0805_5%~D
2

RSVD_VCC3P3_2 R1291 3.01K_0402_1%~D


5 1 2
VDD3P3_IN

10U_0805_10V4Z~D

0.1U_0402_10V7K~D
1 2 LAN_DISABLE#_R 3
19 PM_LANPHY_ENABLE LAN_DISABLE_N +3.3V_LAN_OUT
R42 4 1 1
VDD3P3_OUT

C474
0_0402_5%~D
39 LAN_DISABLE#_R

C806
15 +3.3V_LAN_OUT_R 2 1 1
VDD3P3_15
1

LOM_ACTLED_YEL# 26 19 R693
@ R56 LOM_SPD100LED_ORG# LED0 VDD3P3_19 0_0603_5%~D C786 2 2
27 LED1 VDD3P3_29 29

LED
10K_0402_5%~D LOM_SPD10LED_GRN# 25 1U_0603_10V6K~D
LED2 2
47 R694 +1.0V_LAN +1.0V_LAN
2

VDD1P0_47 0_0603_5%~D
VDD1P0_46 46
PAD~D @ TP_LAN_JTAG_TDI 32 37 +1.0V_LAN_4 2 1
T176 JTAG_TDI VDD1P0_37

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D
PAD~D @ TP_LAN_JTAG_TDO 34
T177 JTAG_TDO

JTAG
TP_LAN_JTAG_TMS 33 43 +1.0V_LAN_3 R695 2 1 0_0603_5%~D
TP_LAN_JTAG_TCK JTAG_TMS VDD1P0_43
35 JTAG_TCK 1 1 1 1
C427 11 +1.0V_LAN_2 R696 2 1 0_0603_5%~D
VDD1P0_11

C800

C801

C802

C803
10P_0402_50V8J~D
C XTALO C
1 2 9 XTAL_OUT VDD1P0_40 40
XTALI 2 2 2 2
10 XTAL_IN VDD1P0_22 22
Y2 16
25MHZ_18PF_1Y725000CE1A~D VDD1P0_16
VDD1P0_8 8
1 2 LAN_TEST_EN 30 TEST_EN
33P_0402_50V8J~D

33P_0402_50V8J~D

RES_BIAS 12 7 REGCTL_PNP10
RBIAS CTRL_1P0
2 2
3.01K_0402_1%~D

49 +1.0V_LAN_2 +1.0V_LAN_3 +1.0V_LAN_4


1

VSS_EPAD
C475

C476

1K_0402_5%~D

R1200
R59

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D
WG82577LM-SLGWR-A3_QFN48_6X6~D
1 1

0.1U_0402_10V7K~D
1 1 1 1

C477

C478

C479

C480
2

2 2 2 2
Need to verify A3 silicon drive R1200 Resistor Value:
power before removing C427 3.01 kohm for Hanksville-M LOM +3.3V_M
KDS crystal vender verify 2.37 kohm for Hanksville-D LOM
driving level in A3

2
@ R373
+3.3V_LAN 0_1210_5%~D
0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1
2 2 2
Q2
C460

C461

C462

+3.3V_ALW +3.3V_LAN
LAN ANALOG SI3456BDV-T1-E3_TSOP6~D
B 1 1 1 +15V_ALW B
SWITCH

D
6

S
+3.3V_ALW2
39
30
21
14

5 4
8
4
1

1
U25 2

10U_0805_6.3V6M~D

0.1U_0402_10V7K~D
R1310 1 1 1
VDD
VDD
VDD
VDD
VDD
VDD
VDD

38 SW_LAN_TX0+ 100K_0402_5%~D

G
B0+ SW_LAN_TX0+ 37

C482

C481
37 SW_LAN_TX0-

3
B0- SW_LAN_TX0- 37

1
LAN_TX0+ 1 2 LAN_TX0+R 2

2
L20 22NH_0603CS-220EJTS_5%~D A0+ SW_LAN_TX1+ R1311 ENAB_3VLAN 2 2
34 SW_LAN_TX1+ 37
LAN_TX0- LAN_TX0-R B1+ SW_LAN_TX1- 100K_0402_5%~D
1 2 3 33 SW_LAN_TX1- 37
A0- B1-

3
DMN66D0LDW-7_SOT363-6~D

2200P_0402_50V7K~D
L21 22NH_0603CS-220EJTS_5%~D

Q184B
29 SW_LAN_TX2+

2
LAN_TX1+ 1 LAN_TX1+R B2+ SW_LAN_TX2- SW_LAN_TX2+ 37
2 6 28 1
L22 22NH_0603CS-220EJTS_5%~D A1+ B2- SW_LAN_TX2- 37
5

C1414
LAN_TX1- 1 2 LAN_TX1-R 7 25 SW_LAN_TX3+
A1- B3+ SW_LAN_TX3+ 37

6
DMN66D0LDW-7_SOT363-6~D
L23 22NH_0603CS-220EJTS_5%~D 24 SW_LAN_TX3-

4
B3- SW_LAN_TX3- 37 2

Q184A
R2
LAN_TX2+ 1 2 LAN_TX2+R 9 17 LAN_ACTLED_YEL# 0_0402_5%~D
A2+ LEDB0 LED_100_ORG# LAN_ACTLED_YEL# 37
L24 22NH_0603CS-220EJTS_5%~D 18 1 2 2
LAN_TX2- LAN_TX2-R LEDB1 LED_10_GRN# LED_100_ORG# 37 40 AUX_ON
1 2 10 41 LED_10_GRN# 37
L25 22NH_0603CS-220EJTS_5%~D A2- LEDB2

1
36 DOCK_LOM_TRD0+ 1 2
LAN_TX3+ 1 LAN_TX3+R C0+ DOCK_LOM_TRD0- DOCK_LOM_TRD0+ 38 17,39 SIO_SLP_LAN#
2 11 35 @R47
@ R47
A3+ C0- DOCK_LOM_TRD0- 38
L26 22NH_0603CS-220EJTS_5%~D 0_0402_5%~D
LAN_TX3- 1 2 LAN_TX3-R 12 32 DOCK_LOM_TRD1+
A3- C1+ DOCK_LOM_TRD1- DOCK_LOM_TRD1+ 38
L27 22NH_0603CS-220EJTS_5%~D 31
C1- DOCK_LOM_TRD1- 38
DOCKED 13 27 DOCK_LOM_TRD2+
39 DOCKED SEL C2+ DOCK_LOM_TRD2- DOCK_LOM_TRD2+ 38 +3.3V_LAN
26
C2- DOCK_LOM_TRD2- 38
LOM_ACTLED_YEL# 15 23 DOCK_LOM_TRD3+
LEDA0 C3+ DOCK_LOM_TRD3+ 38
LOM_SPD100LED_ORG# 16 22 DOCK_LOM_TRD3-
A LOM_SPD10LED_GRN# LEDA1 C3- DOCK_LOM_TRD3- 38 A
Layout Notice : Place bead as 42 LEDA2

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D
19 DOCK_LOM_ACTLED_YEL#
close PI3L500 as possible LEDC0 DOCK_LOM_ACTLED_YEL# 38

1
5 20 DOCK_LOM_SPD100LED_ORG#
PD LEDC1 DOCK_LOM_SPD10LED_GRN# DOCK_LOM_SPD100LED_ORG# 38
40 @ @ @
LEDC2 DOCK_LOM_SPD10LED_GRN# 38

R392

R393

R394
43 PAD_GND DELL CONFIDENTIAL/PROPRIETARY
1: TO DOCK 2

2
FROM NIC DOCKED
0: TO RJ45 TO
Compal Electronics, Inc.
PI3L720ZHEX_TQFN42_9X3P5~D Title
DOCK LOM_ACTLED_YEL#
LOM_SPD10LED_GRN# Intel Intel 82577/82578 (Hanksville) / LAN SW
LOM_SPD100LED_ORG# Size Document Number Rev
0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 30 of 60
5 4 3 2 1
5 4 3 2 1

Q208 +3.3V_ALW_PCH
USB_GPIO27 1 2 SI2301BDS-T1-E3_SOT23-3~D +3.3V_ALW
@ R1503 0_0402_5%~D
USBP7+ 2 RST_N

S
1 2 1 3 1
R470 1.5K_0402_5%~D R810 4.7K_0402_5%~D U32D

2
+3.3V_ALW 1 2 OVSTB
R1496 R484 4.7K_0402_5%~D BCM5882

G
2
1 2 PLTRST1#_USH 4.7K_0402_5%~D 1 2 FP_RESET# REF_XIN G14 REFCLK_XTALIN UART_TX_GPIO_1 D4 UART_TX/GPIO1
@ R1059 10K_0402_5%~D R1034 4.7K_0402_5%~D REF_XOUT F14 C4 UART_RX/GPIO0
REFCLK_XTALOUT UART_RX_GPIO_0
2 USH_LPCEN

UART
1 B3

1
5@ R841 4.7K_0402_5%~D Q209 U32A UART_CTS_GPIO_2 CLKDIV1 FP_RESET# 37
UART_RTS_GPIO_3 A3

CLK
1 2 LPD# SSM3K7002FU_SC70-3~D R468 RST_N G1
BCM5882 RST_N

1
@ R474 4.7K_0402_5%~D D 0_0402_5%~D
1 2 IRQ_SERIRQ_R 2USB_GPIO27
18 USBP7- 1 2 USBP7-_R P5 USBD_DN USBH_DN_0 P7 FP_USBD-
FP_USBD- 37
JTAG_CLK_USH

@
R843 4.7K_0402_5%~D G 1 2 USBP7+_R P6 P8 FP_USBD+ R895 L14
D 18 USBP7+ USBD_UP USBH_UP_0 FP_USBD+ 37 NC D
1 2 USH_SMBCLK S R469 USB_GPIO27 N7 P9 USBH_OC0# 2 1 +3.3V_ALW 0_0402_5%~D

3
R490 2.2K_0402_5%~D 0_0402_5%~D USBD_ATTACH_GPIO_27 USBH_OC_0 R844 4.7K_0402_5%~D JTAG_CLK_USH
1 2 L1 JTAG_TCK
1 2 USH_SMBDAT P11 JTAG_TDI_USH M1 J1 CONTACTLESS_DET#
R626 2.2K_0402_5%~D USBH_DN_1 JTAG_TDI_USH JTAG_TDO_USH JTAG_TDI GPIO_4 SCC_CMDVCC_N_R
P12 N1 D2

JTAG
USBH_UP_1 JTAG_TDO GPIO_14
1 2 BCM5882_ALERT# 16 CLK_PCI_TPM
CLK_PCI_TPM P2 LCLK USBH_OC_1 P10 USBH_OC1 JTAG_TMS_USH N2 JTAG_TMS GPIO_15 C2 BCM5882_GPIO15
R629 2.2K_0402_5%~D LPC_LAD0 R615 1 2 0_0402_5%~D N3 JTAG_RST#_USH L3 B1 CLKDIV2
15,32,39,40 LPC_LAD0 LAD0_GPIO_20 JTAG_TRSTN GPIO_16
1 2 USH_PWR_STATE# 15,32,39,40 LPC_LAD1
LPC_LAD1 R618 1 2 0_0402_5%~D M4 LAD1_GPIO_21
JTAG_TDO_USH JTCE_USH L2 JTCE

@
R630 4.7K_0402_5%~D LPC_LAD2 R619 1 2 0_0402_5%~D K5 R896
15,32,39,40 LPC_LAD2 LAD2_GPIO_22
1 2 USBH_OC1 LPC_LAD3 R620 1 2 0_0402_5%~D N4 G3 SPI_CLK 0_0402_5%~D D3 CLKOUT

@
15,32,39,40 LPC_LAD3 LAD3_GPIO_23 SSP_CLK0_GPIO_6 CLKOUT T154 PAD~D

2
0_0402_5%~D
R637 4.7K_0402_5%~D LPC_LFRAME# R621 1 2 0_0402_5%~D K4 G2 SPI_CS 1 2
@ OVSTB E1
15,32,39,40 LPC_LFRAME# LFRAME_N_GPIO_18 SSP_FSS0_GPIO_7 OVSTB

R899
@ R842 1 2 0_0402_5%~D IRQ_SERIRQ_R L4 H1 SPI_RXD
15,32,39,40 IRQ_SERIRQ LSERIRQ_GPIO_19 SSP_RXD0_GPIO_8
H2 SPI_TXD JTAG_TMS_USH C1 SPI_RST
CLK_PCI_TPM PLTRST_USH# R1048 1 SSP_TXD0_GPIO_9 RSTOUT_N
2 0_0402_5%~D PLTRST1#_USH M3 SCANACCMODE E3

@
18 PLTRST_USH# LRESET_N_GPIO_17 PAD~D T158 SCANACCMODE

SPI
USH_LPCEN M5 C3 BCMGPIO_10

@@@@
T145PAD~D

LPC

1
LPCEN SSP_CLK1_GPIO_10
1
10_0402_5%~D

LPD# N6 B2 BCMGPIO_11 T148PAD~D JTAG_RST#_USH


LPCPD_N_GPIO_24 SSP_FSS1_GPIO_11
R744

@
A2 BCMGPIO_12 R897 SBOOT E2 J13 POR_MONITOR

@
SSP_RXD1_GPIO_12 T149PAD~D SECURE_BOOT POR_MONITOR T156PAD~D
R466 1 2 0_0402_5%~D A1 BCMGPIO_13 T150PAD~D 0_0402_5%~D
32,39 SP_TPM_LPC_EN SSP_TXD1_GPIO_13
USH_SMBCLK M9 1 2
40 USH_SMBCLK SMBCLK
USH_SMBDAT L9 USH_TESTMODE D1 K11 SWV

@
40 USH_SMBDAT T155PAD~D
2

BCM5882_ALERT# SMBDAT JTCE_USH TESTMODE SWV


39 BCM5882_ALERT# K9 SMBALERT_N

Smard Card
SC_DET R1460 1 2 150_0402_5%~D R472 0_0402_5%~D BCM5882_SCCLK
PCI_TPM_TERM

M7 M11 2 1

1K_0402_5%~D
SMB_GPIO_0 SC_CLK

2
SMB_GPIO1 N8 M12 R533 2 1 0_0402_5%~D AUX1UC POR_EXTR J14 C13 PLL_TESTOUT

@
PAD~D T147 SMB_GPIO_1 SC_FCB POR_EXTR PLL_TESTOUT T157 PAD~D

@R1501
@
F2 R767 2 1 0_0402_5%~D BCM5882_GPIO25 UART_RX/GPIO0 HF_RX_TEST2
SC_SEL5V_GPIO_25

R1501
4.7P_0402_50V8C~D

@
1 2 JTAG_RST#_USH SC_SEL18V_GPIO_26 F1 R766 2 1 0_0402_5%~D BCM5882_GPIO26 R894 HF_RX_TEST0 R908

@
R737 1K_0402_5%~D 2 USH_PWR_STATE#_R R774 0_0402_5%~D BCM5882_SCDET 0_0402_5%~D R907 0_0402_5%~D

SM BUS
39 USH_PWR_STATE# 1 L7 WAKEUP_N SC_DET M2 2 1
1 2 USH_LPCEN R1049 0_0402_5%~D L11 R608 2 1 0_0402_5%~D BCM5882_IO 1 2 0_0402_5%~D BCM5882KFBG-ES-B0_FBGA196~D 1 2

1
6@ R483 4.7K_0402_5%~D SC_IO R771 0_0402_5%~D BCM5882_SCRST
1 2 K1 IDDQ_EN SC_RST M10 2 1 1 2
2 R738 1K_0402_5%~D N14 +SC_PWR UART_TX/GPIO1 HF_RX_TEST3
SC_PWR_N14 R775 HF_RX_TEST1
1 2 P1 CORE_PWRDN SC_PWR_P14 P14
C589

R739 1K_0402_5%~D L10 SC_TEST 2 1 SCC_CMDVCC_N U32C


SC_VCC 0_0402_5%~D
1 2 E12
C
1 R481
0_0402_5%~D
R743 1K_0402_5%~D ALDO_PWRDN
R497 1 2 0_0402_5%~D RFTAG_VRXP A6
BCM5882 A8 RFREADER_TXP1 C
HF_RFIDTAG_VRX_P HF_TX_P
1 2 REF_XOUT R496 1 2 0_0402_5%~D RFTAG_VRXN B6 HF_RFIDTAG_VRX_N HF_TX_N B8 RFREADER_TXN1

C5 A10 RFREADER_RXP
REF_XIN BCM5882KFBG-ES-B0_FBGA196~D +1.2V_ALW_AVDD +2.5V_ALW_AVDD HF_RFIDTAG_VTX HF_RX_P RFREADER_RXN
1 2 All XTAL components and traces should be C595 should be placed HF_RX_N B10
@

R486 10M_0402_5%~D
placed/layout on top layer. The gnd/pwr closer to pin A5
layer below will provide shielding from +3.3V_ALW

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

4.7U_0603_6.3V6M~D
Y3 1 2 A5 B9 HF_RX_TEST0
XI XO C595 0.01U_0402_25V7K~D HF_RFIDTAG_VREF HF_RX_TEST0 HF_RX_TEST1
1 IN OUT 3 27.12Mhz interference which might affect HF_RX_TEST1 C9
2 2 1 2 2 1 1 +1.2V_ALW_AVDD B4 C10 HF_RX_TEST2
cellular certification. HF_RFIDTAG_DVDD1P2 HF_RX_TEST2

C1176

C1177
2 4 E9 HF_RX_TEST3
GND GND HF_RX_TEST3

5.1M_0402_5%~D
4.7K_0402_5%~D

C601

C602

C605

C606

C1021
1 1

2
27.12MHZ_12PF_1N227120CC0B~D +2.5V_ALW_AVDD C6 D7 +RFID_AVDD1P2
1 1 2 1 1 2 2 HF_RFIDTAG_AVDD2P5_C6 HF_TX_AVDD1P2

R485
C608 C609 E6 F8
HF_RFIDTAG_AVDD2P5_E6 HF_RX_AVDD1P2

R476
12P_0402_50V8J~D 15P_0402_50V8J~D D10
2 2 HF_RX_ADC_AVDD1P2
F9 +RFID_AVDD2P5

1
HF_RX_AVDD2P5
D6 HF_RFIDTAG_AVSS_D6 HF_TX_AVDD2P5 A7
B5
Smart Card +3.3V_ALW
SBOOT
POR_EXTR A4
HF_RFIDTAG_AVSS_B5

HF_RFIDTAG_DVSS
HF_TX_AVDD3P3_D8
HF_TX_AVDD3P3_B7
D8
B7
+RFID_AVDD3P3

+3.3V_ALW

2
0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

10U_0805_10V6M~D

1 2 PORADJ HF_TX_AVSS_C7 C7
1 2 PORADJ @ R538 4.7K_0402_5%~D 1 1 1 R488
HF_TX_AVSS_C8 C8
C622

C620

R537 4.7K_0402_5%~D 1 2 CLKDIV2 +5V_ALW 3.3M_0402_5%~D E7


HF_TX_AVSS_E7

1
C706

1 2 CLKDIV1 R553 4.7K_0402_5%~D


R532 4.7K_0402_5%~D R555 A9
1
2 2 2 HF_RX_AVSS_A9
0.1U_0402_16V4Z~D

10U_0805_10V6M~D

15K_0402_1%~D B11
C639 HF_RX_AVSS_B11
2 1
U33 1U_0603_10V7K~D E8

2
HF_RX_ADC_AVSS1
C1014

C709

1 RFREADER_RXP 1 2 RFREADER_RXP_C D9
B PORADJ VDD(intf) L71 HF_RX_ADC_AVSS2 B
18 PORadj VDD 17
CLKDIV1 1 2 150NH_LLQ1608-FR15G_2%~D
6 CLKDIV1
CLKDIV2 7 16 +3.3V_ALW 3 RFREADER_TXP1 1 2 BCM5882KFBG-ES-B0_FBGA196~D
SCC_CMDVCC_N_R CLKDIV2 VDDP
1
BCM5882_SCRST 3 15 +SC_VCC 2 1 1
RSTIN VCC
2 1SCC_CMDVCC_N 5 CMDVCCN +3.3V_ALW
@ R776 BCM5882_GPIO25 2 14 R773 1 2 0_0402_5%~D SC_RST @ D31 3 C1070 C1887
0_0402_5%~D BCM5882_GPIO26 EN_5V/3VN RST R772 22_0402_5%~D SC_CLK DA204U_SOT323-3~D 390P_0603_50V8G~D 390P_0603_50V8G~D
4 13 1 2 +3.3V_ALW 1

AUX1UC
AUX2UC
21
EN_1.8VN

AUX1UC
CLK
I/O
AUX1
9
10
R491
R493
R492
1
1
2
2
100_0402_5%~D
0_0402_5%~D
0_0402_5%~D
SC_IO
SC_C4
SC_C8
3
1
2

@ D32
2 2
RFID
22 11 1 2 2
@

PAD~D T143 AUX2UC AUX2


BCM5882_IO 20 8 R1459 1 2 0_0402_5%~D SC_DET @ D33 C643 DA204U_SOT323-3~D
BCM5882_SCDET I/OUC PRESN DA204U_SOT323-3~D 1U_0603_10V7K~D JCS1
19 OFFN RFREADER_RXN 1 2 RFREADER_RXN_C 1
BCM5882_SCCLK RFREADER_TXN1_PI 1
23 XTAL1 XTAL2 24 2 2
+SC_VCC
10P_0402_50V8J~D

10P_0402_50V8J~D

2 2 3 3

1
25 GPAD GND 12 4 4
.47U_0402_6.3V6-K~D

C633

C1015

RFID MODE R633 RFREADER_TXP1_PI 5 7


15K_0402_1%~D 5 G1
TDA8034HN_HVQFN24_4X4~D 2 15,19 CONTACTLESS_DET# 6 6 G2 8
1 1
Component VOLTAGE CURRENT
C718

TYCO_2041084-6~D

2
SC_VCC should be 3X wide as R494,R498 NOPOP 3K L72
1 150NH_LLQ1608-FR15G_2%~D
+SC_VCC regular SC trace width to carry R555,R633 3K NOPOP RFREADER_TXN1 1 2
~60mA max. current per ISO spec
C1031 and C646 should be p +3.3V_ALW R634 3K NOPOP 1 1
0.22U_0402_6.3V6K~D
10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

laced very close to SC cage pin +3.3V_ALW 3


1 2 Place C718 close C641,C647 NOPOP 150P 1 C1071 C1886
@ C1031

to U33 pin15 +3.3V_ALW 1 2 390P_0603_50V8G~D 390P_0603_50V8G~D Hardware enable for USH TPM:Populate R841,
C646

2 2
C644

D28,D29 NOPOP POP


@ D34 No Stuff R483.
2 1 JSC1 1 2 SPI_RST D31-D34 POP NOPOP DA204U_SOT323-3~D Hardware disable for USH TPM:No Stuff
A +3.3V_ALW R1510 4.7K_0402_5%~D 2 A
1 1
SC_RST 2 @ U19 R841, Populate R483
SC_CLK 2 SPI_CS U34
3 3 1 /CS VCC 8
SC_C4 4 SPI_TXD 1 8 SPI_RXD +3.3V_ALW +2.5V_ALW_AVDD +1.2V_ALW_AVDD
4 SPI_RXD SPI_RST SPI_CLK D Q BLM18BB100SN1D_2P~D BLM18BB100SN1D_2P~D BLM18BB100SN1D_2P~D
5 2 7 2 7

SC_IO
6
5
6 BCM5882_GPIO15
DO /HOLD
SPI_CLK
SPI_RST
SPI_CS
3
C
RESET#
VSS
VCC 6
BCM5882_GPIO15
2
L38
1 +RFID_AVDD3P3 2
L36
1 +RFID_AVDD2P5 2
L37
1 +RFID_AVDD1P2 DELL CONFIDENTIAL/PROPRIETARY
7 7 3 /WP CLK 6 4 S# W# 5
1U_0603_10V6K~D

1U_0603_10V6K~D

1U_0603_10V6K~D
3.3U_0603_10V6K~D

0.1U_0402_16V4Z~D

1U_0603_10V6K~D

1U_0603_10V6K~D

0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D
SC_C8
SC_DET
8
9
8
4 5 SPI_TXD M45PE16-VMW6TG_SO8W8~D 1 2 1 2 2 1 1 1 1
Compal Electronics, Inc.
9 GND DIO

C626
1 2 10 Title
10
C631

C624

C625
C630

C632

C627

C628

C629
R1468 11 GND
W25X32VSSIG_SO8~D BCM5882_GPIO15 1 2 USH BCM5882 (1/2)
1.5K_0402_5%~D R341 4.7K_0402_5%~D 2 1 2 1 1 2 2 2 2 Size Document Number Rev
12 GND 0.1
FCI_10089709-010010LF~D LA-5571P
Date: Thursday, January 21, 2010 Sheet 31 of 60
5 4 3 2 1
5 4 3 2 1

+3.3V_ALW +1.2V_ALW_PLL

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D
U32B
1 1 1
BCM5882

C1178
2 2 2 2 2 2 2 1

C1179

C592

C593
+1.2V_ALW_PLL H14 AVDD_1P2I_REF

C613

C614

C615

C616

C617

C618

C619
+1.2V_ALW_AVDD A11 AVDD_1P2O_A11
2 2 2 A12 C11
1 1 1 1 1 1 1 2 AVDD_1P2O_A12 AVSS_LDO12
+2.5V_ALW_AVDD
H13 B13
AVDD_2P5I AVSS_LDO25_B13
E10 C12
D +3.3V_ALW AVDD_2P5O_E10 AVSS_LDO25_C12 D
E11
AVDD_2P5O_E11
B14
AVSS_PLL

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D
A13
AVDD25_LDO12_A13

4.7U_0603_6.3V6M~D
B12 F13
AVDD25_LDO12_B12 AVSS_REF
2 2 2 2 2 2 2
1 D12
PLL_AVSS

C621

C635

C636

C637

C638

C875

C612
A14
AVDD25_PLL_A14

C1017
E13
1 1 1 1 1 1 1 PLL_DVSS
2
D11
AVDD33_LDO25

POR_AVSS G13
+SC_PWR P13 OTP_PWR

2 +1.2V_ALW_PLL D14 PLL_AVDD_1P2I


C1027 E14
0.1U_0402_16V4Z~D PLL_AVDD_1P2O
USH BCM5882 and China TCM Z8H172T Option C14 PLL_DVDD_1P2I VSSC_F4 F4
VSSC_F5 F5
1
PART/PIN Ref Des TCM Enable TPM Enable ALL TPM/TCM Disable +VDDC_5882
D13 VDDC_D13 VSSC_F6 F6
F3 VDDC_F3 VSSC_F7 F7
TCM circuit All 3@ POP @ @ J4 VDDC_J4 VSSC_F10 F10
J5 VDDC_J5 VSSC_F11 F11
USH_LPCEN PU R841 @ POP @ J6 VDDC_J6 VSSC_F12 F12
J7 VDDC_J7 VSSC_G5 G5
PD R483 POP @ @ J8 VDDC_J8 VSSC_G6 G6
J10 VDDC_J10 VSSC_G7 G7
SIO 5028 ->SP_TPM_LPC_EN PU R788 @ @ @ J11 VDDC_J11 VSSC_G8 G8
K7 VDDC_K7 VSSC_G9 G9
+3.3V_ALW K8 G10
VDDC_K8 VSSC_G10
C
PCH GPIO39 ->TPM_ID1 PU R787 @ @ POP VSSC_G11 G11
C
E4 VDDO_33_E4 VSSC_G12 G12
PD R339 POP POP @ J2 VDDO_33_J2 VSSC_H5 H5
K3 VDDO_33_K3 VSSC_H6 H6
L8 VDDO_33_L8 VSSC_H7 H7
PCH GPIO38 ->TPM_ID0 PU R273 POP POP @ +VDDC_5882 N10 H8
VDDO_33_N10 VSSC_H8
VSSC_H9 H9
PD R922 @ @ POP G4 VDDO_33CORE_G4 VSSC_H10 H10

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D
H3 H11
VDDO_33CORE_H3 VSSC_H11
H4 H12
VDDO_33CORE_H4 VSSC_H12
2 2 2 2 J3 J9
VDDO_33CORE_J3 VSSC_J9
J12
VSSC_J12

C596

C597

C598

C599
M13 K2
VDDO_33SC_M13 VSSC_K2
N13 K6
1 1 1 1 VDDO_33SC_N13 VSSC_K6
K13
VSSC_K13
L6 K14
VDDO_LPC_L6 VSSC_K14
M6 L5
VDDO_LPC_M6 VSSC_L5
M8
VSSC_M8
M14
VSSC_M14
K10 N9
VDDO_SC_K10 VSSC_N9

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D
K12 N11
VDDO_SC_K12 VSSC_N11
L12 N12
VDDO_SC_L12 VSSC_N12
2 2 1 L13 P3
VDDO_SC_L13 VSSC_P3

C1180
P4
VSSC_P4

C873

C877
LOW:Power Down Mode D5
E5
VDDO_VAR_D5
1 1 2 VDDO_VAR_E5
High:Working Mode
China TCM: NationZ & Jetway co-lay N5
VESD

+3.3V_RUN BCM5882KFBG-ES-B0_FBGA196~D

3@ U24
B B
10
VDD_0

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

10U_0603_6.3V6M~D
19
VDD_1
24
VDD_2
2 2 2 1
3@ 3@ 3@ 3@
C1171

C1172

C1173

C1174
3@ R893 1 2 0_0402_5%~D C_TPM_LPC_EN 28
31,39 SP_TPM_LPC_EN LPC_LAD0_R LPCPD#
3@ R901 1 2 0_0402_5%~D 26 11
15,31,39,40 LPC_LAD0 LPC_LAD1_R LAD0 GND_11 1 1 1 2
3@ R902 1 2 0_0402_5%~D 23 18
15,31,39,40 LPC_LAD1 LPC_LAD2_R LAD1 GND_18
3@ R903 1 2 0_0402_5%~D 20 25
15,31,39,40 LPC_LAD2 LPC_LAD3_R LAD2 GND_25
3@ R904 1 2 0_0402_5%~D 17 4
15,31,39,40 LPC_LAD3 LAD3 GND_4

21 5 JETWAY_PIN5
16 CLK_PCI_TPM_CHA LCLK NC_5
3@ R905 1 2 0_0402_5%~D LPC_LFRAME#_R 22 12
15,31,39,40 LPC_LFRAME# PCI_RST#_R LFRAME# NC_12 JETWAY_CLK14M
3@ R906 1 2 0_0402_5%~D 16 13
8,18,34,36,39,40 PCH_PLTRST#_EC LRESET# NC_13 JETWAY_CLK14M 16
+3.3V_RUN 27
15,31,39,40 IRQ_SERIRQ CLKRUN#_R SERIRQ
3@ R909 1 2 0_0402_5%~D 15 1 +3.3V_RUN
17,39,40 CLKRUN# CLKRUN# NC_1
1 2 7 2
@R1210
@ R1210 4.7K_0402_5%~D TCM_BA1 PP NC_2
3 6
TCM_BA0 BA_1 NC_6
9 8
BA_0 NC_8 1

1
1U_0402_6.3V6K~D

10K_0402_5%~D

10K_0402_5%~D
14
NC_P @
R1022
@

R1025
1 3@
C23

JETWAY_PIN5 SSX44-B_TSSOP28~D 2 TCM_BA0


TCM_BA1
2
@ C1175
1K_0402_5%~D
1K_0402_5%~D

A 0.1U_0402_16V4Z~D A
TCM Vender POP
1

3@ 3@
1
NationZ R1026, R1023, C23, C1174
R1026
R1023

Jetway C1175, R910 DELL CONFIDENTIAL/PROPRIETARY


2

Compal Electronics, Inc.


Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT USH BCM5882 (2/2)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 32 of 60
5 4 3 2 1
5 4 3 2 1

+3.3V_RUN

+CBS_VCC

1U_0402_6.3V6K~D
1

C495

0.1U_0402_16V4Z~D

10U_0805_10V4Z~D
2 @
1 1
+5V_RUN

C496

C497
U27
2 2

1U_0402_6.3V6K~D
11 9
VCC3IN VCCOUT
1 14
D VCCOUT D
12
VCCOUT

C498
13
2 VCC5IN
15
VCC5IN +CBS_VPP
C645,Close to U94.C10
VPPEN0 3 8
34 VPPEN0 EN0 VPPOUT

0.1U_0402_16V4Z~D

0.01U_0402_16V7K~D
C603,Close to U94.J4/K3 VPPEN1 4
34 VPPEN1 EN1
1 2 @
Crystal close to U94 C695,Close to U94.M13

C499

C500
VCC3EN# 2
2 1
C697,Close to U94.M11/N11 34 VCC3EN# VCC5EN# 1
VCC3_EN
C698,Close to U94.J3 34 VCC5EN# VCC5_EN 2 1
C514 C699,Close to U94.C8

2
15P_0402_50V8J~D +3.3V_RUN 5 7
X3 U94A FLG NC
16 GND NC 6
24.576MHZ_12PF_X5H024576FC1H~D NC 10

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
1
R5U241_XI A8 C10 1 1
R5U241_XO XI VCC_3V0 R5531V002-E2-FA_SSOP16~D
2 1 2 1 B8 XO VCC_3V1 J4

C603

C645
R421 0_0402_5%~D K3
C515 TPAP0 VCC_3V2
A5 TPAP0
15P_0402_50V8J~D TPAN0 B5 2 2 +3.3V_RUN_CARD
+3.3V_RUN TPBIAS0 TPAN0
C7 TPBIAS0
TPBP0 A6 TPBP0 +PCIE_PHY SD Conn.

47U_0805_6.3V6M~D

0.1U_0402_16V4Z~D
TPBN0 B6 TPBN0

1
1 2 CPS D4 1 1
CPS
Pitch=0.5

C21
R1146 C8 R1464
PCIE_VOUT0

C767
0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
0_0402_5%~D J3 150K_0402_5%~D
PCIE_VOUT1
16 CLK_PCIE_PCM N8 REFCLKP 1 1 1 1 1 2 2 JSD1
M8

2
16 CLK_PCIE_PCM# REFCLKN

C695

C697

C698

C699
M13 C700 SD_DET# 1
C PCIE_PRX_PCMTX_P3_C N12 PCIE_VIN0 10U_0805_10V4Z~D 18 SD_DET# SDWP 1 C
C710,C713 as close 16 PCIE_PRX_PCMTX_P3
C710 1 2 0.1U_0402_10V7K~D TXP PCIE_VIN1 M11
2 2 2 2 2
2 2
C713 1 2 0.1U_0402_10V7K~D PCIE_PRX_PCMTX_N3_C N13 N11 SDCD#/MMCCD# 3
as possible to U94 16 PCIE_PRX_PCMTX_N3 TXN PCIE_VIN2 SDDAT1/MMCDAT1 3
Place close to 4 4
SDDAT0/MMCDAT0 5
N10
JSD1.9 MMCDAT7 6
5
16 PCIE_PTX_PCMRX_P3_C RXP C21 need to change MMCDAT6 6
16 PCIE_PTX_PCMRX_N3_C M10 RXN PCIe / Power / 7 7
1394 / MultiCard 47uF for R5U242 8 8
D7 SDCLK/MMC_CLK 9
AVCC_3V +3.3V_RUN 9

1U_0402_6.3V6K~D
0.1U_0402_16V4Z~D
10
PLTRST_R5U242# 10
18 PLTRST_R5U242# M12 1 1 +3.3V_RUN_CARD 11
RXC PERST# MMCDAT5 11
L9 +3.3V_RUN_CARD 12
RXC 12

10P_0402_50V8J~D
C701

C702
CPO L10 SDCMD/MMCCMD 13
RREF CPO MMCDAT4 13
L11 1 14
RREF 2 2 14

C491
0.1U_0402_16V4Z~D
D13 SDDAT3/MMCDAT3 15
MF_VOUT SDDAT2/MMCDAT2 15
1 16
16
0.022U_0402_16V7K~D

SDWP H13
MFIO00
1

2
1500P_0402_7K~D

C703
1 1 SDDAT1/MMCDAT1 R36 1 2 0_0402_5%~D SDDAT1/MMCDAT1_RH12
SDDAT0/MMCDAT0 R35 MFIO01
R1148 1 2 0_0402_5%~D SDDAT0/MMCDAT0_RG13 D8 C701,C702 Close to U94.D7 17
MFIO02 SD18C 2 G1
C707

C705

5.1K_0402_1%~D MMCDAT7 G12 18


MMCDAT6 MFIO03 G2
F13 K11
2 2 SDCLK/MMC_CLK MFIO04 AGND0
R8 Close to U94 R8 1 2 22_0402_5%~D SDCLK/MMC_CLK_R F12 L12 1 C703,Close to U94.D13
2

MFIO05 AGND1 C1889


SDCLK/MMC_CLK D12 A7
MMCDAT5 MFIO06 GND0 1U_0402_6.3V6K~D
D10 B7
need shield GND SDCMD/MMCCMD R34 MFIO07 GND1
1 2 0_0402_5%~D SDCMD/MMCCMD_R C13 MFIO08 GND2
C6 HRS_FH12-16S-0P5SH(55)~D
MMCDAT4 C12 D11 2
SDDAT3/MMCDAT3 R32 MFIO09 GND3
1 2 0_0402_5%~D SDDAT3/MMCDAT3_RB13 MFIO10 GND4
E12
C707,C705,R1148 as close SDDAT2/MMCDAT2 R31 1 2 0_0402_5%~D SDDAT2/MMCDAT2_RC11 E13 R46: only for MMC/SD
MFIO11 GND5
as possible to U94 A13 K4 For R5U241 should be 0 ohm,
MFIO12 GND8
B12 L8
MFIO13 GND9 R5U242 should be 1uF
A12 M9
MFIO14 GND10
GND11
N9 2A Current Capacity Required

0.33U_0603_10V7K~D
SDCD#/MMCCD# F11 L5 TPBIAS0
MFCD0# GND12 between R5U242 and SD Card Slot

54.9_0402_1%~D

54.9_0402_1%~D
B B
G11 1
MFCD1#

1
G10
MFCD2#

R398

R399

C493
H1
USBDP 2
H2
USBDM

2
R5U242-ES3-CSP144P_CSP144~D
TPAP0
TPAN0 TPAP0 37
MFIO Pin Assignment Table TPBP0 TPAN0 37
TPBN0 TPBP0 37
TPBN0 37
MFIO SD8 XD MS8

1
00 WP D7 BS

1
R401
01 D1 D6 - R403 54.9_0402_1%~D
54.9_0402_1%~D
02 D0 D5 D1

2
03 D7 D4 -

2
Z3008
04 D6 D3 D5

2
05 CLK D2 D0 2
R407
06 - D1 - C494 5.1K_0402_1%~D
07 D5 D0 D4 270P_0402_50V7K~D
1
08 CMD WP# D2

1
Close to U94
09 D4 WE# D6
10 D3 ALE D3
11 D2 CLE -
12 - CE# -
A A
13 - RE# D7
14 - R/B# CLK

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT R5U242 (1/2)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 33 of 60
5 4 3 2 1
5 4 3 2 1

+1.5V_CARD

+1.5V_RUN

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

10U_0805_6.3V6M~D
U94B +3.3V_SUS +3.3V_RUN

0.1U_0402_16V4Z~D
1 1 1 1 +3.3V_CARD
L2 CBS_CAD19
CADR25

C997

C999

C1000

C1012
C9 K2 CBS_CAD17
GND CADR24

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
A10 H4 CBS_CFRAME# 1 1
GND CADR23 2 U52 2 2 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

10U_0805_6.3V6M~D
A9 J1 CBS_CTRDY#
GND CADR22

C134

C135
+3.3V_RUN B9 G3 CBS_CDEVSEL# 12 11
GND CADR21 CBS_CSTOP# 1.5Vin 1.5Vout
B11 F3 14 13 1 1 1
GND CADR20 CBS_CBLOCK# 2 2 1.5Vin 1.5Vout
A11 G2
GND CADR19
1

C1001

C1002

C1003
D CBS_DATA18 D
CADR18
F2 R410 Close to U94, CBS_CCLK need shield GND
E2 CBS_CAD16 2 3
R1151 CADR17 CBS_CCLK_R CBS_CCLK 3.3Vin 3.3Vout 2 2 2
H10 H3 2 1 4 5
47K_0402_5%~D NC CADR16 CBS_CIRDY# R410 3.3Vin 3.3Vout
B10 J2
R81 GND CADR15 CBS_CPERR# 0_0402_5%~D
G1 17 15 +3.3V_CARDAUX
2

0_0402_5%~D CADR14 CBS_CPAR AUX_IN AUX_OUT


K13 F1
UDIO0 CADR13

0.1U_0402_16V4Z~D

10U_0805_6.3V6M~D
1 2 K12 K1 CBS_CC/BE2# PCH_PLTRST#_EC 6 19
15,16 PCMCLK_REQ# UDIO1 CADR12 8,18,32,36,39,40 PCH_PLTRST#_EC SYSRST# OC#
J13 C2 CBS_CAD12
UDIO2 CADR11 CBS_CAD9
J12 C3 20 8 1 1
UDIO3 CADR10 SHDN# PERST#

C1006

C1016
J11 D2 CBS_CAD14 R684 1 2 0_0402_5%~D
UDIO4 CADR9 CBS_CC/BE1# 12,39,42,47 RUN_ON EXPRCRD_STBY_R#
H11 E3 @ R683 1 2 0_0402_5%~D 1 16
SPKROUT UDIO5 CADR8 CBS_CAD18 39 EXPRCRD_STDBY# STBY# NC
J10 SPKROUT CADR7 L1
L13 M1 CBS_CAD20 @ R687 1 2 0_0402_5%~D EXPRCRD_CPPE# 10 7 2 2
PWR_ON_RST WAKE# CADR6 CBS_CAD21 39 EXPRCRD_PWREN# CPPE# GND
K9 GBRST# CADR5 M2
SROM: SPKROUT L3 CBS_CAD22 CPUSB# 9
CADR4 CBS_CAD23 CPUSB#
Pull-Hi: Disable K10 TEST CADR3 M3
N3 CBS_CAD24 +3.3V_SUS 18

CARDBUS / MEDIA CARD / SD Card


Pull-Lo: Enable (Default) CADR2
N4 CBS_CAD25 RCLKEN
CADR1
1

M4 CBS_CAD26 TPS2231MRGPR-1_QFN20_4X4~D CARD_RESET#


+3.3V_RUN CADR0

2.2K_0402_5%~D

2.2K_0402_5%~D
@ R1152 B1 CBS_CAD8
CDATA15

1
47K_0402_5%~D B2 CBS_DATA14
CDATA14
1

B3 CBS_CAD6
2

CDATA13

R126

R127
R1150 C4 CBS_CAD4
47K_0402_1%~D CDATA12 CBS_CAD2
CDATA11 B4
M7 CBS_CAD31

2
CDATA10 CBS_CAD30
M6
2

PWR_ON_RST CDATA9 CBS_CAD28 CARD_SMBDAT


CDATA8 M5 40 CARD_SMBDAT
A1 CBS_CAD7
CDATA7 CBS_CAD5
1 A2

C
C708
1U_0603_25V6-K~D
CDATA6
CDATA5
CDATA4
A3
A4
CBS_CAD3
CBS_CAD1
CBS_CAD0
40 CARD_SMBCLK
CARD_SMBCLK
Express Card BTB Conn. C
CDATA3 C5
2 CBS_DATA2
CDATA2 N7
N6 CBS_CAD29
CDATA1 CBS_CAD27
CDATA0 N5 +1.5V_CARD: Max. 650mA, Average 500mA
CBS_CAD11
OE# C1
CBS_CGNT# +3.3V_CARD: Max. 1300mA, Average 1000mA
Power-On-Reset: GBRST# WE# F4
CBS_CAD10
D3
(Global Reset) CE2# CBS_CC/BE0#
D5
CE1# CBS_CC/BE3#
Note: De-asserted BEFORE L4
REG# CBS_CRST# +3.3V_ALW
N1
RESET
PERST# de-assertion WAIT#
N2 CBS_CSERR# +1.5V_CARD
L7 CBS_CCLKRUN#
WP#/IOIS16#

0.1U_0402_16V4Z~D
G4 CBS_CINT#
RDY/IREQ#

2
L6 CBS_CAUDIO
BVD2 CBS_CSTSCHNG
K7 1 2 1
BVD1 CBS_CVS2 @ R791 0_0402_5%~D R947
K5
VS2#

C1007
E4 CBS_CVS1 100K_0402_5%~D
VPPEN1 VS1# CBS_CCD2#
D9 K8

1
33 VPPEN1 VPPEN0 VPPEN1 CD2# CBS_CCD1# 2
E10 D6 1 2
33 VPPEN0 VCC3EN# VPPEN0 CD1# CBS_CREQ# @ R792 0_0402_5%~D JEXP1
F10 K6
33 VCC3EN# VCC5EN# VCC3EN# INPACK# CBS_CAD13
E11 D1 4 4
3 3
18 USBP10- 1 2 +3.3V_CARDAUX
33 VCC5EN# VCC5EN# IORD# CBS_CAD15 39 EXPRCRD_DET# 1 2 CARD_RESET#
E1 3 4
IOWR# 3 4

0.1U_0402_16V4Z~D
USBP10_D- 5 6
USBP10_D+ 5 6
18 USBP10+ 1 2 7 8 1
1 2 7 8 EXPCLK_REQ# 16

C1004
R5U242-ES3-CSP144P_CSP144~D CPUSB# 9 10 EXPRCRD_CPPE#
L64 9 10
11 12
DLW21SN900SQ2_0805~D CARD_SMBCLK 11 12
13 14 CLK_PCIE_EXP# 16
CARD_SMBDAT 13 14 2
15 16 CLK_PCIE_EXP 16
15 16
17 18
17 18
19 20 PCIE_PRX_EXPTX_N4 16
19 20
21 22 PCIE_PRX_EXPTX_P4 16
B JCBUS1 PCIE_WAKE# 21 22 B
23 24
36,39 PCIE_WAKE# 23 24
1 35 +3.3V_CARD 25 26 PCIE_PTX_EXPRX_N4_C 16
CBS_CAD0 GND1 GND3 CBS_CCD1# 25 26
2 36 27 28 PCIE_PTX_EXPRX_P4_C 16
CBS_CAD1 CAD0 CCD1# CBS_CAD2 27 28
3 37 29 30
CBS_CAD3 CAD1 CAD2 CBS_CAD4 +CBS_VPP 29 30
4 38
CAD3 CAD4
0.1U_0402_10V7K~D
CBS_CAD5 5 39 CBS_CAD6 31 32
CAD5 CAD6 G1 G2

0.1U_0402_16V4Z~D
CBS_CAD7 6 40 CBS_DATA14
CBS_CC/BE0# CAD7 CB_D14 CBS_CAD8 LOTES_YEA-BTB-020-130K13
7 41 1
CBS_CAD9 CCBE0# CAD8 CBS_CAD10
8 42 1
CAD9 CAD10
C769

CBS_CAD11 9 43 CBS_CVS1
CAD11 CVS1

C1005
CBS_CAD12 10 44 CBS_CAD13
CBS_CAD14 CAD12 CAD13 CBS_CAD15 2
11 45
CBS_CC/BE1# CAD14 CAD15 CBS_CAD16 2
12 46
CBS_CPAR CCBE1# CAD16 CBS_DATA18
13 47
CBS_CPERR# CPAR CB_D18 CBS_CBLOCK#
14 48
CBS_CGNT# CPERR# CBLOCK# CBS_CSTOP#
15 49
CBS_CINT# CGNT# CSTOP# CBS_CDEVSEL#
16 50
CINT# CDEVSEL# Close to JCBUS1 Pin18/52
+CBS_VCC 17 51 +CBS_VCC
VCC VCC
+CBS_VPP 18 52 +CBS_VPP
CBS_CCLK VPP1 VPP2 CBS_CTRDY#
19 53
CBS_CIRDY# CCLK CTRDY# CBS_CFRAME#
20 54
CBS_CC/BE2# CIRDY# CFRAME# CBS_CAD17
21 55
CBS_CAD18 CCBE2# CAD17 CBS_CAD19 +CBS_VCC
22 56
CBS_CAD20 CAD18 CAD19 CBS_CVS2
23 57
CBS_CAD21 CAD20 CVS2 CBS_CRST#
24 58
CBS_CAD22 CAD21 CRST# CBS_CSERR#
25 59
CAD22 CSERR#
0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

10U_0805_10V4Z~D

CBS_CAD23 26 60 CBS_CREQ#
CBS_CAD24 CAD23 CREQ# CBS_CC/BE3#
27 61
CBS_CAD25 CAD24 CCBE3# CBS_CAUDIO
28 62 1 1 1
CAD25 CAUDIO
C541

C542

C543

CBS_CAD26 29 63 CBS_CSTSCHNG
CBS_CAD27 CAD26 CSTSCHG CBS_CAD28
30 64
CBS_CAD29 CAD27 CAD28 CBS_CAD30
31 CAD29 CAD30 65
A CBS_DATA2 32 66 CBS_CAD31 2 2 2 A
CBS_CCLKRUN# CB_D2 CAD31 CBS_CCD2#
33 CCLKRUN# CCD2# 67
34 GND2 GND4 68
Close to JCBUS1 pin23,63
69 GND5 GND7 71 DELL CONFIDENTIAL/PROPRIETARY
70 GND6 GND8 72
Compal Electronics, Inc.
MOLEX_48315-0013_RT Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT R5U242 (2/2)
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 34 of 60
5 4 3 2 1
5 4 3 2 1

D D

C C

Power Control for Mini card2


Power Control for Mini card1 +15V_ALW +3.3V_ALW +3.3V_WLAN Power Control for Mini card3

100K_0402_5%~D

D
6

S
1
100K_0402_5%~D
5 4 +15V_ALW +3.3V_ALW +3.3V_PCIE_BKT

R432
+15V_ALW +3.3V_ALW +3.3V_PCIE_SATA_WAN +3.3V_RUN 2

100K_0402_5%~D
1 Q47

D
R431
100K_0402_5%~D

20K_0402_5%~D
@ R504 SI3456BDV-T1-E3_TSOP6~D 6

S
1

1
D

100K_0402_5%~D
6 0_0805_5%~D 5 4
S

3
1

20K_0402_5%~D
100K_0402_5%~D

R436
R1524
B B
5 4 1 2 2

2
1

1
R453

2 1 Q50

4700P_0402_25V7K~D
DMN66D0LDW-7_SOT363-6~D

R435

R1525
1 Q51 SI3456BDV-T1-E3_TSOP6~D

G
R451

Q53B
SI3456BDV-T1-E3_TSOP6~D 1
G

3
20K_0402_5%~D
2

2
1

C551
5
2

2
3
DMN66D0LDW-7_SOT363-6~D

4700P_0402_25V7K~D
R1523
3

6
2
4700P_0402_25V7K~D
DMN66D0LDW-7_SOT363-6~D

Q192B
1

4
Q193B

1 Q53A

C553
DMN66D0LDW-7_SOT363-6~D 5
2
C571

5 39 AUX_EN_WOWL 2

6
2

4
6

2 Q192A
4

Q193A R437 1 DMN66D0LDW-7_SOT363-6~D


DMN66D0LDW-7_SOT363-6~D 100K_0402_5%~D 2
39 MCARD_PCIE_BKT_PWREN
39 MCARD_WWAN_PWREN 2

1
2

1
1

R450
1

R452 100K_0402_5%~D
100K_0402_5%~D

2
2

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT PCIE PWR
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 35 of 60
5 4 3 2 1
5 4 3 2 1

+3.3V_RUN 1 2 +3.3V_ALW_PCH
@R428
@ R428 0_0402_5%~D
PCIE_MCARD1_DET# 1 2
+3.3V_ALW_PCH 1 2 WLAN_RADIO_DIS#_R R443 100K_0402_5%~D
PCIE_MCARD2_DET# 1 39 WLAN_RADIO_DIS#
2
R449 100K_0402_5%~D D21
RB751S40T1_SOD523-2~D
USB_MCARD2_DET# 2 1
R447 100K_0402_5%~D

USB_MCARD2_DET# 1 2 PCIE_MCARD2_DET#
@ R740 0_0402_5%~D
D D

Mini WWAN H=5.2 Mini WLAN H=4


+3.3V_PCIE_SATA_WAN +3.3V_PCIE_SATA_WAN
JMINI1 USB_MCARD1_DET# 1 2PCIE_MCARD1_DET# +3.3V_RUN
1 1 2 @ R741 0_0402_5%~D
2 +3.3V_WLAN +3.3V_WLAN
3 3 4
4
5 5 6 +1.5V_RUN
MINI1CLK_REQ# 6 JMINI2 +1.5V_RUN PCIE_MCARD1_DET# 1
7 7 8 +SIM_PWR 2
16 MINI1CLK_REQ# 8 UIM_DATA 34,39 PCIE_WAKE# PCIE_WAKE# @ R439 100K_0402_5%~D
9 9 10 10 1 1 2 2
CLK_PCIE_MINI1# 11 11 12 UIM_CLK COEX2_WLAN_ACTIVE R440 1 2 0_0402_5%~D 3 4 USB_MCARD1_DET# 1 2
16 CLK_PCIE_MINI1# CLK_PCIE_MINI1 12 UIM_RESET 41 COEX2_WLAN_ACTIVE COEX1_BT_ACTIVE R441 3 4
13 13 14 1 2 0_0402_5%~D 5 6 R438 100K_0402_5%~D
16 CLK_PCIE_MINI1 14 UIM_VPP 41 COEX1_BT_ACTIVE 5 6
15 15 16 16 7 7 8 8
16 MINI2CLK_REQ#
17 17 18 9 10 1 2
18 WWAN_RADIO_DIS# 9 10
19 19 20 20 WWAN_RADIO_DIS# 39 11 11 12 12
16 CLK_PCIE_MINI2# C1705 4700P_0402_25V7K~D
21 21 22 1 2 PCH_PLTRST#_EC 8,18,32,34,39,40 13 14
PCIE_PRX_WANTX_N1 22 R442 0_0402_5%~D 16 CLK_PCIE_MINI2 13 14
23 23 24 24 15 15 16 16 HOST_DEBUG_TX 40
16 PCIE_PRX_WANTX_N1 PCIE_PRX_WANTX_P1 25 25 26 26 17 17 18 18
16 PCIE_PRX_WANTX_P1 40 HOST_DEBUG_RX WLAN_RADIO_DIS#_R
27 27 28 28 40 MSCLK 19 19 20 20
29 29 30 30 21 21 22 22 2 1 PCH_PLTRST#_EC
PCIE_PTX_WANRX_N1_C 31 31 32 PCIE_PRX_WLANTX_N2 23 24 R444 0_0402_5%~D
16 PCIE_PTX_WANRX_N1_C PCIE_PTX_WANRX_P1_C 32 16 PCIE_PRX_WLANTX_N2 PCIE_PRX_WLANTX_P2 23 24
16 PCIE_PTX_WANRX_P1_C 33 33 34 34 25 25 26 26
USBP5- 16 PCIE_PRX_WLANTX_P2
35 35 36 36 USBP5- 18 27 27 28 28
PCIE_MCARD2_DET# 37 37 38 USBP5+ 29 30
18 PCIE_MCARD2_DET# 38 USB_MCARD2_DET# USBP5+ 18 PCIE_PTX_WLANRX_N2_C 29 30
39 39 40 40 USB_MCARD2_DET# 19 16 PCIE_PTX_WLANRX_N2_C 31 31 32 32
41 41 42 LED_WWAN_OUT# COEX2_WLAN_ACTIVE PCIE_PTX_WLANRX_P2_C 33 34
+1.5V_RUN 42 LED_WWAN_OUT# 43 16 PCIE_PTX_WLANRX_P2_C 33 34 USBP4-
43 43 44 44 35 35 36 36 USBP4- 18
45 45 46 1 2 WIMAX_LED# 1 PCIE_MCARD1_DET# 37 38 USBP4+
46 19 PCIE_MCARD1_DET# 37 38 USB_MCARD1_DET# USBP4+ 18
47 47 48 R840 0_0402_5%~D 39 40
48 39 40 WIMAX_LED# USB_MCARD1_DET# 19
49 49 50 For WIMAX LED debug @ C552 41 42
50 41 42
33P_0402_50V8J~D

0.047U_0402_16V4Z~D

C 33P_0402_50V8J~D LED_WLAN_OUT# C
51 51 52 52 43 43 44 44 LED_WLAN_OUT# 43
2
16 PCH_CL_CLK1 45 45 46 46
1 1 53 GND1 GND2 54 16 PCH_CL_DATA1 47 47 48 48 1 2 MSDATA 40
1 2 49 50 @ R1409 0_0402_5%~D
16 PCH_CL_RST1# 49 50
C569

C570

R448 0_0402_5%~D 51 52
TYCO_1775861-1~D 51 52
2 2
53 GND1 GND2 54
+1.5V_RUN +3.3V_WLAN

330U_D2E_6.3VM_R25~D
TYCO_1775861-1~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

4.7U_0603_6.3V6M~D
+3.3V_PCIE_SATA_WAN
Primary Power Aux Power 1
PWR Voltage 1 1 1 1 1 1 1 1 @

C554
0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

33P_0402_50V8J~D

22U_0805_6.3VAM~D

33P_0402_50V8J~D

330U_D2E_6.3VM_R25~D

@ +
Rail Tolerance

C555

C556

C557

C558

C559

C560

C561

C562
1 Peak Normal Normal
1 1 1 1 1 2 2 2 2 2 2 2 2 2
+
C564

C565

C566

C567

C568

C563

+3.3V +-9% 1000 750


2 2 2 2 2 2
250 (Wake enable)
+3.3Vaux +-9% 330 250 5 (Not wake enable)

+1.5V +-5% 500 375 NA USB_MCARD3_DET# 1 2 PCIE_MCARD3_DET# WPAN Noise


@ R742 0_0402_5%~D
USB_MCARD3_DET#
PCIE/BKT Card H=4 1

+SIM_PWR SIM Card Push-Push +3.3V_PCIE_BKT +3.3V_PCIE_BKT


2
C572
4700P_0402_25V7K~D
JMINI3
B JSIM1 PCIE_WAKE# B
1 2
COEX2_WLAN_ACTIVE R454 1 1 2
1 5 2 0_0402_5%~D 3 4
UIM_RESET VCC GND UIM_VPP 3 4
2 6 5 6 +1.5V_RUN
UIM_CLK RST VPP UIM_DATA MINI3CLK_REQ# 5 6
3 7 16 MINI3CLK_REQ# 7 8
CLK I/O 7 8
4
NC NC
8 9
9 10
10 Confirm with DELL about UWB
9 CLK_PCIE_MINI3# 11 12
GND 16 CLK_PCIE_MINI3# 11 12
1U_0402_6.3V6K~D

10 CLK_PCIE_MINI3 13 14
GND 16 CLK_PCIE_MINI3 13 14
1 15 16
MOLEX_475531001 15 16
17 18
17 18
C573

19 20 UWB_RADIO_DIS#
19 20 UWB_RADIO_DIS# 39
21 22 2 1 PCH_PLTRST#_EC
2 PCIE_PRX_WPANTX_N5 21 22 R456 0_0402_5%~D
23 24
16 PCIE_PRX_WPANTX_N5 PCIE_PRX_WPANTX_P5 23 24
25 26
16 PCIE_PRX_WPANTX_P5 25 26
27 28
27 28
29 30
PCIE_PTX_WPANRX_N5_C 29 30
16 PCIE_PTX_WPANRX_N5_C 31 32
U31 PCIE_PTX_WPANRX_P5_C 31 32
16 PCIE_PTX_WPANRX_P5_C 33 34
33 34 USBP13-
35 36 USBP13- 18
PCIE_MCARD3_DET# 35 36 USBP13+
37 38 USBP13+ 18
UIM_RESET UIM_VPP 18 PCIE_MCARD3_DET# 37 38 USB_MCARD3_DET#
1 6 39 40 USB_MCARD3_DET# 15
39 40
+3.3V_RUN 1 2 41 42
R458 100K_0402_5%~D 41 42
43 44 2 1 +3.3V_ALW_PCH
43 44 R266 100K_0402_5%~D
2 5 +SIM_PWR 45 46
45 46
47 48
47 48
49 50
UIM_CLK UIM_DATA +1.5V_RUN +3.3V_PCIE_BKT 49 50
3 4 51 52
51 52
33P_0402_50V8J~D

33P_0402_50V8J~D

33P_0402_50V8J~D

33P_0402_50V8J~D

53 54
GND1 GND2
0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

4.7U_0603_6.3V6M~D
1 @ 1 @ 1 @ 1 @
SRV05-4.TCT_SOT23-6~D
C574

C575

C576

C577

1 1 1 1 1 1 1 1 TYCO_1775861-1~D
@
2 2 2 2
C578

C579

C580

C581

C582

C583

C584

C585
A A

2 2 2 2 2 2 2 2

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Mini Card
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 36 of 60
5 4 3 2 1
5 4 3 2 1

@ L29
DLW21SN121SQ2L_4P~D +5V_ESATA/USB3 +5V_ESATA/USB2
1 FP_USB_D+
31 FP_USBD+ 1 2 2
+5V_ALW PJP23
4 3 FP_USB_D- JUMP_43X79 U53
31 FP_USBD- 4 3 USB_OC1#
2 2 1 1 1 GND FAULT1# 10 USB_OC1# 18
1 2 +5V_ALW_USB 2 9 +3.3V_RUN
IN OUT1

0.1U_0402_16V4Z~D

10U_1206_16V4Z~D
R422 0_0402_5%~D +5V_RUN Place close to 3 IN OUT2 8
1 2 4 7 R28 1 2
JBIO1.6
R423 0_0402_5%~D 1 1
39 ESATA_USB_PWR_EN#
5
EN1# ILIM
EN2# FAULT#2
6 24.9K_0402_1%~D
ESATA Repeater @

C546

C547

0.01U_0402_16V7K~D

0.1U_0402_16V4Z~D

R1298

R1299
11
T-PAD

2
D Fingerprint CONN. 105 degree
+3.3V_RUN 2 2
TPS2560DRCR-PG1.1_SON10_3X3~D R1494
1 1
D

C1378

C1379
2 1

0_0402_5%~D

0_0402_5%~D
JBIO1 @ R1497
2 2

0.1U_0402_16V4Z~D
1 0_0402_5%~D 0_0402_5%~D

1
1 +3.3V_RUN
2 39 EN_ESATA_RPTR EN_ESATA_RPTR 1 2 ESATA_PWRSAVE
2 FP_USB_D- U95
3 1
3 FP_USB_D+
4 7 6
4 EN VCC

C770
5 ESATA_PTX_DRX_P4_C 2 1 ESATA_PTX_DRX_P4 10
5 FP_RESET# 31 15 ESATA_PTX_DRX_P4_C VCC
6 C304 0.01U_0402_16V7K~D 1 16
6 2 ESATA_PTX_DRX_N4_C 2 ESATA_PTX_DRX_N4 RX_1P VCC
7 15 ESATA_PTX_DRX_N4_C 1 2 20
GND C303 0.01U_0402_16V7K~D RX_1N VCC
8
GND ESATA_PRX_DTX_P4_C 2 1 ESATA_PRX_DTX_P4 5 TX_2P PE1 9
15 ESATA_PRX_DTX_P4_C C1380 0.01U_0402_16V7K~D
TYCO_2041070-6~D 4 TX_2N PE2 8
+3.3V_RUN Place close to ESATA_PRX_DTX_N4_C 2 1 ESATA_PRX_DTX_N4
@R1513
@ R1513 15 ESATA_PRX_DTX_N4_C C1381 0.01U_0402_16V7K~D ESATA_PTX_DRX_P4_RP
JBIO1.1 3 GND TX_1P 15
0_0402_5%~D 13 14 ESATA_PTX_DRX_N4_RP
GND TX_1N
1 2 EN_ESATA_RPTR# EN_ESATA_RPTR# 15,19 17 GND
U51 18 12 ESATA_PRX_DTX_N4_RP
+5V_ESATA/USB3 GND RX_2N ESATA_PRX_DTX_P4_RP
1 GND VCC 4 +3.3V_RUN 19 GND RX_2P 11
21 PAD

1
D

1
1
150U_D2_6.3VY_R15M~D
FP_USB_D- 2 3 FP_USB_D+ ESATA_PWRSAVE 2 @ Q210 SN75LVCP412ARTJR_QFN20_4X4~D
IO1 IO2

0.1U_0402_16V4Z~D

0_0402_5%~D
G SSM3K7002FU_SC70-3~D R1301

R1300
PRTR5V0U2X_SOT143-4~D S 1 0_0402_5%~D

3
1
+

2
2
C544

C545
@
2 2

L30 L31 JESA1


C HCMC0805-900MFS_4P~D HCMC0805-900MFS_4P~D C
1 A_VBUS
USBP2+ 4 4 USBP2_D+ USBP3+ USBP3_D+ USBP3_D-
18 USBP2+ 3 3 18 USBP3+ 4 4 3 3 USBP3_D+
2 A_D-
3 A_D+
+5V_ESATA/USB2 4
USBP2- USBP2_D- USBP3- USBP3_D- A_GND
18 USBP2- 1 1 2 2 18 USBP3- 1 1 2 2
5 USB
B_VBUS

150U_D2_6.3VY_R15M~D

0.1U_0402_16V4Z~D
USBP2_D- 6
USBP2_D+ B_D-
1 2 1 2 1 7
@ R424 0_0402_5%~D @ R426 0_0402_5%~D B_D+
1 8
+ B_GND

C588

C548
1 2 1 2 ESATA_PTX_DRX_P4_RP 1 2 SATA_PTX_DRX_P4 9
@ R425 0_0402_5%~D @ R427 0_0402_5%~D C1376 0.01U_0402_16V7K~D GND
10
2 2 ESATA_PTX_DRX_N4_RP A+
1 2 SATA_PTX_DRX_N4 11
A-
ESATA
C1377 0.01U_0402_16V7K~D 12
ESATA_PRX_DTX_N4_RP GND
1 2 SATA_PRX_DTX_N4 13
B-
C549 0.01U_0402_16V7K~D 14
ESATA_PRX_DTX_P4_RP B+
1 2 SATA_PRX_DTX_P4 15
I/O board 60 pin CONN. C550 0.01U_0402_16V7K~D GND
16
JIO1 G1
17
DETECT_GND G2
30 SW_LAN_TX3+ 1 2 18
1 2 G3
30 SW_LAN_TX3- 3 4 19
3 4 AUD_EXT_MIC_L 29 G4
5 6
5 6 AUD_EXT_MIC_R 29 FCI_10100446-003RLF
30 SW_LAN_TX2- 7 8
7 8
30 SW_LAN_TX2+ 9 10 +VREFOUT
9 10
11 12
11 12 AUD_MIC_SWITCH 29 PCH_AZ_MDC_RST1#

S
30 SW_LAN_TX1+ 13 14 LAN_ACTLED_YEL# 30 15 PCH_AZ_MDC_RST# 1 3
13 14
30 SW_LAN_TX1- 15 16 LED_10_GRN# 30
15 16 +5V_ALW
17 18 LED_100_ORG# 30
17 18

100K_0402_5%~D
19 20 LID_CL# Q35

G
2
30 SW_LAN_TX0- 19 20 LID_CL# 39,43

1
10K_0402_5%~D
21 22 +LOM_VCT_IO @ D4 SSM3K7002FU_SC70-3~D
30 SW_LAN_TX0+ 21 22

R325
23 24 USBP2_D- 1 6 USBP2_D+
23 24 USB_SIDE_EN# 39 V I/O V I/O

1
B B
+3.3V_LAN 25 26
25 26 USB_OC0# 18

R326
27 28 2 5 +5V_ALW_USB
27 28 WIRELESS_ON#/OFF Ground V BUS
29 30

2
18 USBP0+ 29 30 LAT_ON_SW_BTN# WIRELESS_ON#/OFF 39 USBP3_D+ USBP3_D-
18 USBP0- 31 32 LAT_ON_SW_BTN# 40 3 4
31 32 V I/O V I/O
33 34

2
33 34 AUD_HP_NB_SENSE 29,39 IP4223CZ6_SO6~D
18 USBP1+ 35 36 39 MDC_RST_DIS#
35 36
18 USBP1- 37 38 AUD_HP_OUT_L 29
37 38
39 40 AUD_HP_OUT_R 29
39 40
41 42
41 42 TPAP0
43 44 TPAP0 33
43 44 TPAN0
45 46
+5V_ALW 47
45
47
46
48
48
TPAN0 33 MDC CONN. H=5.5, Pitch=0.8
BREATH_BLUE_LED_SNIFF 49 50 TPBP0
43 BREATH_BLUE_LED_SNIFF POWER_SW#_MB 49 50 TPBN0 TPBP0 33 JMDC1
51 52 TPBN0 33
40,41 POWER_SW#_MB 51 52 +3.3V_ALW_PCH
1 +3.3V_ALW 53 54
C623 53 54
55 56 1 2
0.1U_0402_16V4Z~D 57
55
57
56
58
58 15 PCH_AZ_MDC_SDOUT
PCH_AZ_MDC_SDOUT 3
GND1
IAC_SDATA_OUT
RES0
RES1
4 W=20 mil
59 60 5 6
2 19 IO_LOOP 59 60 PCH_AZ_MDC_SYNC GND2 3.3V
15 PCH_AZ_MDC_SYNC 7 8
PCH_AZ_MDC_SDIN1 IAC_SYNC GND3
61 62 15 PCH_AZ_MDC_SDIN1 1 2 MDC_SDIN 9 10
G1 G2 IAC_SDATA_IN GND4

0.1U_0402_16V4Z~D
R10 PCH_AZ_MDC_RST1# 11 12 PCH_AZ_MDC_BITCLK PCH_AZ_MDC_BITCLK 15
IAC_RESET# IAC_BITCLK

4.7U_0603_6.3V6M~D
33_0402_5%~D 1 1
LOTES_YEA-BTB-018-160K12

C12

C13
GND
GND
GND
GND
GND
GND
2 2
TYCO_1-1775149-2~D

13
14
15
16
17
18
+3.3V_LAN +VREFOUT +LOM_VCT_IO LID_CL#
0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1U_0402_6.3V6K~D

1 1 1 Connector for MDC Rev1.5


@ C712

2 R15 C15
C768

C634

10_0402_5%~D 10P_0402_50V8J~D
C685

A PCH_AZ_MDC_BITCLK 2 A
1 BITCLK_TERM 1 2
2 2 2
1 PCH_AZ_MDC_SDOUT 2 SDOUT_TERM
1 1 2

@ R16 @ C32
10_0402_5%~D 10P_0402_50V8J~D DELL CONFIDENTIAL/PROPRIETARY
Place close Place close Place close
to JIO1.13 to JIO1.30 to JIO1.36 Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT USB 2.0 PORT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 37 of 60
5 4 3 2 1
2 1

JDOCK1

DOCK_DET_1 1 2 DOCK_AC_OFF
1 2 DOCK_AC_OFF 39,52
3 3 4 4
30 DOCK_LOM_SPD10LED_GRN# DPD_CA_DET DPC_CA_DET DOCK_LOM_SPD100LED_ORG# 30
5 5 6 6
25 DPD_CA_DET DPC_CA_DET 25
7 7 8 8
C473 2 1 0.1U_0402_10V7K~D DPD_DOCK_LANE_P0 9 10 DPC_DOCK_LANE_P0 C361 2 1 0.1U_0402_10V7K~D
17 DPD_PCH_LANE_P0 DPD_DOCK_LANE_N0 9 10 DPC_DOCK_LANE_N0 DPC_PCH_LANE_P0 17
C446 2 1 0.1U_0402_10V7K~D 11 12 C357 2 1 0.1U_0402_10V7K~D
17 DPD_PCH_LANE_N0 11 12 DPC_PCH_LANE_N0 17
13 14
C472 DPD_DOCK_LANE_P1 13 14 DPC_DOCK_LANE_P1
17 DPD_PCH_LANE_P1 2 1 0.1U_0402_10V7K~D 15 16 C355 2 1 0.1U_0402_10V7K~D
C483 DPD_DOCK_LANE_N1 15 16 DPC_DOCK_LANE_N1 DPC_PCH_LANE_P1 17
17 DPD_PCH_LANE_N1 2 1 0.1U_0402_10V7K~D 17
17 18
18 C313 2 1 0.1U_0402_10V7K~D DPC_PCH_LANE_N1 17
19 20
C468 DPD_DOCK_LANE_P2 19 20 DPC_DOCK_LANE_P2
17 DPD_PCH_LANE_P2 2 1 0.1U_0402_10V7K~D 21
21 22
22 C360 2 1 0.1U_0402_10V7K~D
C470 DPD_DOCK_LANE_N2 DPC_DOCK_LANE_N2 DPC_PCH_LANE_P2 17
17 DPD_PCH_LANE_N2 2 1 0.1U_0402_10V7K~D 23 24 C362 2 1 0.1U_0402_10V7K~D
23 24 DPC_PCH_LANE_N2 17
25 26
C469 DPD_DOCK_LANE_P3 25 26 DPC_DOCK_LANE_P3
17 DPD_PCH_LANE_P3 2 1 0.1U_0402_10V7K~D 27
27 28
28 C364 2 1 0.1U_0402_10V7K~D DPC_PCH_LANE_P3 17
C471 2 1 0.1U_0402_10V7K~D DPD_DOCK_LANE_N3 29 30 DPC_DOCK_LANE_N3 C363 2 1 0.1U_0402_10V7K~D
17 DPD_PCH_LANE_N3 29 30 DPC_PCH_LANE_N3 17
31 32
DPD_DOCK_AUX 31 32 DPC_DOCK_AUX
25 DPD_DOCK_AUX 33 34
DPD_DOCK_AUX# 33 34 DPC_DOCK_AUX# DPC_DOCK_AUX 25
25 DPD_DOCK_AUX# 35 36
35 36 DPC_DOCK_AUX# 25
37 38
DPD_PCH_DOCK_HPD 37 38 DPC_PCH_DOCK_HPD
17 DPD_PCH_DOCK_HPD 39 39 40 40 DPC_PCH_DOCK_HPD 17
+NBDOCK_DC_IN_SS 41 41 42 42 ACAV_DOCK_SRC# 52
1 43 43 44 44 1
BLUE_DOCK 45 46
27 BLUE_DOCK 45 46 DAT_DDC2_DOCK 27
C985 47 48 C986
B 47 48 CLK_DDC2_DOCK 27 B
0.033U_0402_16V7K~D 49 50 0.033U_0402_16V7K~D
2 49 50 2
Close to DOCK 51 51 52 52
RED_DOCK 53 54 SATA_PRX_DKTX_P5 2 1
Its for Enhance ESD on dock issue. 27 RED_DOCK 53 54 SATA_PRX_DKTX_N5 SATA_PRX_DKTX_P5_C 15
55 55 56 56 C586 2 1 0.01U_0402_16V7K~D SATA_PRX_DKTX_N5_C 15 Close to DOCK
57 58 C587 0.01U_0402_16V7K~D
GREEN_DOCK 59
57 58
60 SATA_PTX_DKRX_P5 1 2
Its for Enhance ESD on dock issue.
27 GREEN_DOCK 59 60 SATA_PTX_DKRX_N5 SATA_PTX_DKRX_P5_C 15
61 62 C306 1 2 0.01U_0402_16V7K~D
61 62 C305 0.01U_0402_16V7K~D SATA_PTX_DKRX_N5_C 15
63 63 64 64
27 HSYNC_DOCK 65 65 66 66 USBP8+ 18
27 VSYNC_DOCK 67 67 68 68 USBP8- 18
69 69 70 70
40 CLK_MSE 71 71 72 72 USBP9+ 18
40 DAT_MSE 73 73 74 74 USBP9- 18
75 75 76 76
29 DAI_BCLK# 77 77 78 78 CLK_KBD 40
29 DAI_LRCK# 79 79 80 80 DAT_KBD 40
81 81 82 82
29 DAI_DI 83 83 84 84
29 DAI_DO# 85 85 86 86
87 87 88 88
29 DAI_12MHZ# 89 89 90 90
91 91 92 92
93 93 94 94
95 96
95 96
39 D_LAD0 97 98
97 98 BREATH_LED# 40,43
39 D_LAD1 99 100
99 100 DOCK_LOM_ACTLED_YEL# 30
101 102
101 102
39 D_LAD2 103 104
103 104 DOCK_LOM_TRD0+ 30
39 D_LAD3 105 106
105 106 DOCK_LOM_TRD0- 30
107 108
107 108 +3.3V_ALW
39 D_LFRAME# 109 110
109 110 DOCK_LOM_TRD1+ 30 +LOM_VCT R1038
39 D_CLKRUN# 111 112
111 112 DOCK_LOM_TRD1- 30 100K_0402_5%~D
113 114
113 114 DOCK_DET#
39 D_SERIRQ 115 116 1 1 2
115 116
39 D_DLDRQ1# 117 118 +LOM_VCT
117 118 C42
119 120
119 120 1U_0402_6.3V6K~D
18 CLK_PCI_DOCK 121 122 DOCK_LOM_TRD2+ 30
121 122 2
123 124 DOCK_LOM_TRD2- 30
123 124
125 126
125 126
40 DOCK_SMB_CLK 127 128 DOCK_LOM_TRD3+ 30
127 128
40 DOCK_SMB_DAT 129 130 DOCK_LOM_TRD3- 30
129 130
131 132
131 132
40,44 DOCK_SMB_ALERT# 133 134 DOCK_DCIN_IS+ 51
133 134
44 DOCK_PSID 135 136 DOCK_DCIN_IS- 51
135 136
137 138
137 138 D71
40 DOCK_PWR_BTN# 139 140 DOCK_POR_RST# 40
139 140 RB751S40T1_SOD523-2~D
141 142
SLICE_BAT_PRES# 141 142 DOCK_DET_R#
39,44,52 SLICE_BAT_PRES# 143 144 1 2 DOCK_DET# 39
143 144
145 149 +DOCK_PWR_BAR CLK_PCI_DOCK
GND1 PWR2
+DOCK_PWR_BAR 146 150
PWR1 PWR2

1
4.7U_0805_25V6K~D
147 151
PWR1 PWR2
3

2
4.7U_0805_25V6K~D

148 152 @ R462


PWR1 GND2
SM24.TCT_SOT23-3~D

0.1U_0603_50V4Z~D
C1033
0.1U_0603_50V4Z~D

D64

1 1 10_0402_5%~D
C1034

C1899
@ C1898

1 1 153 159
@ Shield_G Shield_G
154 160

2
Shield_G Shield_G
155 161 1
Shield_G Shield_G 2 2
156 162
1

2 2 Shield_G Shield_G @C590


@C590
157 163
Shield_G Shield_G 4.7P_0402_50V8C~D
158 164
Shield_G Shield_G 2

JAE_WD2F144WB1
Reserve for EMI test DPD_PCH_DOCK_HPD DPC_PCH_DOCK_HPD
A A

2
R798 R796
110K_0402_1%~D 110K_0402_1%~D

1
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT DOCKING CONN
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 38 of 60
2 1
5 4 3 2 1

+3.3V_ALW

1 2 PCIE_WAKE#
R501 10K_0402_5%~D
1 2 SLICE_BAT_PRES#
R503 100K_0402_5%~D +3.3V_ALW
1 2 DCIN_CBL_DET#
R862 100K_0402_5%~D

1 1 1 1
1
C1072 C648 C649 C650
10U_0805_10V4Z~D 0.1U_0402_16V4Z~D C652 0.1U_0402_10V7K~D 0.1U_0402_16V4Z~D
2 2 0.1U_0402_16V4Z~D 2 2
2
D D

A17
B30
A43
A54
U35
+3.3V_ALW2 B68 +3.3V_ALW

VCC1
VCC1
VCC1
VCC1
NC
B35
PBAT_PRES# NC +3.3V_ALW
44 PBAT_PRES# B52 B34
USB_SIDE_EN# GPIOA[0] NC
1 2 A49 B1
R502 10K_0402_5%~D 43 SCRL_LED# GPIOA[1] NC
B53 B5
43 NUM_LED# GPIOA[2] VCC1

0.1U_0402_16V4Z~D
1 2 ESATA_USB_PWR_EN# DCIN_CBL_DET# A50 B8 DOCK_MIC_DET
44 DCIN_CBL_DET# PBATT_OFF GPIOA[3] GPIOJ[7] TEMP_ALERT# DOCK_MIC_DET 29 TP_DET#
R923 10K_0402_5%~D 52 PBATT_OFF B54 B11 2 1
MDC_RST_DIS# GPIOA[4] GPIOK[4] TEMP_ALERT# 15,19
A51 R756 100K_0402_5%~D
37 MDC_RST_DIS#
34,36 PCIE_WAKE#
PCIE_WAKE# B55
GPIOA[5]
GPIOA[6]
ECE5028-LZY GPIOI[1] B63 SIO_SLP_M#
SIO_SLP_M# 17,48
1

C653
A52 GPIOA[7]
A5 SIO_SLP_LAN#
WIRELESS_ON#/OFF GPIOJ[2] SIO_SLP_LAN# 17,30 2
+3.3V_RUN B13 B6 +3.3V_RUN
37 WIRELESS_ON#/OFF BT_RADIO_DIS# GPIOH[0] GPIOJ[3] DOCK_HP_DET
41 BT_RADIO_DIS# A13 GPIOH[1] GPIOJ[6] A7 DOCK_HP_DET 29
EXPRCRD_PWREN# B14 B7 CRT_SWITCH
34 EXPRCRD_PWREN# GPIOH[4] GPIOJ[5] CRT_SWITCH 27
EXPRCRD_STDBY# A14 A8 ME_FWP ME_FWP 15
34 EXPRCRD_STDBY# BC_INT#_ECE5028 GPIOH[5] GPIOK[0] ME_FWP
40 BC_INT#_ECE5028 A29 BC_INT# GPIOK[1] B9 2 1
1 2 WIRELESS_ON#/OFF BC_DAT_ECE5028 B31 A10 R1531 10K_0402_5%~D
40 BC_DAT_ECE5028 BC_CLK_ECE5028 BC_DAT GPIOK[3] D_CLKRUN#
R874 100K_0402_5%~D A30 B10 2 1
1 2 SP_TPM_LPC_EN 40 BC_CLK_ECE5028 BC_CLK GPIO GPIOK[2]
GPIOK[5] A11 RUN_ON 1.8V_RUN_PWRGD 47
RUN_ON 12,34,42,47
R510 100K_0402_5%~D
@ R788 10K_0402_5%~D A1 B12 CPU_CATERR# D_SERIRQ 2 1
LCD_TST GPIOE[0]/RXD GPIOK[6] R511 100K_0402_5%~D
1 2 B2
R816 100K_0402_5%~D GPIOE[1]/TXD D_DLDRQ1#
A2 GPIOE[2]/RTS# GPIOI[6] B66 1 2 IMVP_VR_ON 50 2 1
2 1 PANEL_BKEN_PCH B3 A62 R509 0_0402_5%~D R512 100K_0402_5%~D
R530 100K_0402_5%~D EXPRCRD_DET# GPIOE[3]/DSR# GPIOI[5] 0.75V_DDR_VTT_ON IMVP_PWRGD 8,50,53
34 EXPRCRD_DET# A3 GPIOE[4]/CTS# GPIOI[2] A60
SYS_LED_MASK# 0.75V_DDR_VTT_ON 47
1 2 B45 GPIOE[5]/DTR# CAP_LDO B46 +CAP_LDO 8mil
R658 10K_0402_5%~D A42 B67 C1051
GPIOE[6]/RI# GPIOJ[0] AUX_EN_WOWL 35 +3.3V_ALW 0.1U_0402_16V4Z~D RUN_ON
B4 GPIOE[7]/DCD# 2 1
1 2 R515 100K_0402_5%~D
C USB_SIDE_EN# C
37 USB_SIDE_EN# A33 GPIOB[0]/INIT#
EN_I2S_NB_CODEC# B36 CPU_VTT_ON 2 1
29 EN_I2S_NB_CODEC# GPIOB[1]/SLCTIN# ACAV_IN_NB 40,51,52
USH_PWR_STATE# A34 B19 2 1 R518 100K_0402_5%~D
31 USH_PWR_STATE# GPIOC[2]/SLCT TEST_PIN

5
EN_DOCK_PWR_BAR B37 R514
52 EN_DOCK_PWR_BAR
PANEL_BKEN_PCH A35
GPIOC[3]/PE TEST 1K_0402_5%~D ACAV_IN_NB 1 0.75V_DDR_VTT_ON 2 1
GPIO

P
17 PANEL_BKEN_PCH ENVDD_PCH GPIOC[4]/BUSY B
B38 4 2 1 R520 100K_0402_5%~D
17,24 ENVDD_PCH GPIOC[5]/ACK# O DOCK_AC_OFF 38,52
LCD_TST A36 2 D65 PBATT_OFF 2 1
24 LCD_TST GPIOC[6]/ERROR# A

G
PSID_DISABLE# A37 A63 DOCK_AC_OFF_EC RB751S40T1_SOD523-2~D R521 100K_0402_5%~D
44 PSID_DISABLE# GPIOC[7]/ALF# GPIOI[7]

1
B40 B65 U69

3
DOCKED GPIOD[0]/STROBE# GPIOI[4] SIO_SLP_S3# 17
A38 A61 TC7SH08FU_SSOP5~D R1078
30 DOCKED DOCK_DET# GPIOC[1]/PD7 GPIOI[3] SIO_SLP_S4# 17
B41 33K_0402_5%~D
38 DOCK_DET# GPIOC[0]/PD6 DOCK_AC_OFF_EC 52
AUD_NB_MUTE A39
29 AUD_NB_MUTE MCARD_WWAN_PWREN GPIOB[7]/PD5
B42 LPC_LAD[0..3] 15,31,32,40

2
35 MCARD_WWAN_PWREN LCD_VCC_TEST_EN GPIOB[6]/PD4 LPC_LAD0
24 LCD_VCC_TEST_EN A40 A27
CCD_OFF GPIOB[5]/PD3 LAD0 LPC_LAD1
24 CCD_OFF B43 A26
AUD_HP_NB_SENSE GPIOB[4]/PD2 LAD1 LPC_LAD2
29,37 AUD_HP_NB_SENSE A41 B26
ESATA_USB_PWR_EN# GPIOB[3]/PD1 LAD2 LPC_LAD3
37 ESATA_USB_PWR_EN# B44 B25
GPIOB[2]/PD0 LAD3 LPC_LFRAME#
A21 LPC_LFRAME# 15,31,32,40
LID_CL_SIO# LFRAME# PCH_PLTRST#_EC
B32 B22
+3.3V_RUN
49 CPU_VTT_ON
CPU_VTT_ON A31
GPIOD[1]
GPIOD[2]
LPC LRESET#
PCICLK
A28 CLK_PCI_5028 PCH_PLTRST#_EC 8,18,32,34,36,40
CLK_PCI_5028 18
B20 CLKRUN#
CLKRUN# LPC_LDRQ0# CLKRUN# 17,32,40
B33 A23 LPC_LDRQ0# 15
GPIOD[3]/VBUS_DET LDRQ0# LPC_LDRQ1#
B15 A22 LPC_LDRQ1# 15
MCARD_PCIE_BKT_PWREN GPIOD[4]/OCS1_N LDRQ1# IRQ_SERIRQ
35 MCARD_PCIE_BKT_PWREN A15 B21 IRQ_SERIRQ 15,31,32,40
ALS_INT# HDDC_EN GPIOD[5]/OCS2_N SER_IRQ
1 2 28 HDDC_EN B16
R258 2.2K_0402_5%~D MODC_EN GPIOD[6]/OCS3_N CLK_SIO_14M
28 MODC_EN A16 A32 CLK_SIO_14M 16
GPIOD[7]/OCS4_N CLKI (14.318 MHz) CLK_SIO_14M CLK_PCI_5028
+3.3V_ALW SLICE_BAT_PRES# B17 B51
38,44,52 SLICE_BAT_PRES# GPIOH[6] VSS
B18
GPIOH[7]

1
B29 D_LAD0
VGA_ID_DISC LAN_DISABLE#_R DLAD0 D_LAD1 D_LAD0 38 ME_FWP @R506
@ R506 R527
1 2 30 LAN_DISABLE#_R B47 B28
@ R875 100K_0402_5%~D GPIOG[0] DLAD1 D_LAD2 D_LAD1 38 10_0402_5%~D 10_0402_5%~D
A45 A25
43 CAP_LED# GPIOG[1] DLAD2 D_LAD2 38

2
B VGA_ID_UMA SYS_LED_MASK# D_LAD3 B
1 2 B48 A24
R881 100K_0402_5%~D
43 SYS_LED_MASK#
ALS_INT# A46
GPIOG[2] DLPC DLAD3
B23 D_LFRAME# D_LAD3 38 @ R649

2
24 ALS_INT# GPIOG[3] DLFRAME# D_CLKRUN# D_LFRAME# 38
19 SIO_EXT_WAKE# R526 1 2 0_0402_5%~D B49 A19 1K_0402_5%~D
EN_ESATA_RPTR GPIOG[4] DCLK_RUN# D_DLDRQ1# D_CLKRUN# 38
37 EN_ESATA_RPTR A47 B24 D_DLDRQ1# 38 1 1
PCH_PCIE_WAKE# GPIOG[5] DLDRQ1# D_SERIRQ
B50 A20

1
VGA_ID_DISC 17 PCH_PCIE_WAKE# WLAN_RADIO_DIS# GPIOG[6] DSER_IRQ D_SERIRQ 38
1 2 A48 @C654
@C654 C656
36 WLAN_RADIO_DIS# GPIOG[7] 4.7P_0402_50V8C~D
R522 100K_0402_5%~D 4.7P_0402_50V8C~D
VGA_ID_UMA 1 2 WWAN_RADIO_DIS# A53 R1130 2 2
36 WWAN_RADIO_DIS# SYSOPT1/GPIOH[2]
@R558
@ R558 100K_0402_5%~D B57 10K_0402_5%~D
SYSOPT0/GPIOH[3] RUNPWROK_R1
A4 2 1 +3.3V_RUN
PWRGD
B58
VGA_ID_UMA GPIOF[7] SP_TPM_LPC_EN
A55 B56 SP_TPM_LPC_EN 31,32
VGA_ID_DISC GPIOF[6] OUT65
B59
UWB_RADIO_DIS# GPIOF[5]
VGA_ID_UMA VGA_ID_DISC 36 UWB_RADIO_DIS# A56
GPIOF[4]
R528 A6
10K_0402_5%~D GPIOJ[4] GPIO_PSID_SELECT 44 +3.3V_ALW
Discrete 0 1 B60
IRTX VSS
A9
2 1 A57 A12
IRRX GPIOK[7] SPI_WP#_SEL 15
UMA 1 0 VSS
A18 1
B61 B27
GPIOF[3]/IRMODE/IRRX3B VSS

1
SG 1 1 A58 B39 C657
BCM5882_ALERT# GPIOF[2]/IRTX2 VSS 4.7U_0603_6.3V6M~D R524
31 BCM5882_ALERT# B62 A44
GPIOF[1]/IRRX2 VSS 2 +3.3V_RUN
A59 B64 100K_0402_5%~D
GPIOF[0]/IRMODE/IRRX3A VSS
A64
GPIOJ[1] R525
EP

2
1
10_0402_5%~D
TP_DET# 41 LID_CL_SIO# LID_CL#
ECE5028-LZY_DQFN132_11X11~D R1288 2 1
C1

LID_CL# 37,43
8.2K_0402_5%~D
1

2
+1.05V_RUN_VTT CPU_CATERR# C655
R1289 0.047U_0402_16V4Z~D

1
2.2K_0402_5%~D C 2
1
A A
1 2 2
B C1372
Q182 E 0.1U_0402_16V4Z~D

3
PMST3904_SOT323-3~D 2
8 H_CATERR# DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, ECE5028
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 39 of 60
5 4 3 2 1
5 4 3 2 1

+RTC_CELL

1
R539
100K_0402_5%~D 1 2

+3.3V_ALW @ C658

2
1U_0402_6.3V6K~D
POWER_SW_IN# 1 2
23 POWER_SW_IN# POWER_SW#_MB 37,41
1 2 BC_DAT_ECE5028 1 R541 10K_0402_5%~D
R543 100K_0402_5%~D
2 1 BC_DAT_EMC4002 C659
R545 100K_0402_5%~D +RTC_CELL +3.3V_ALW 1U_0402_6.3V6K~D
2 1 BC_DAT_ECE1077 2
<BOM Structure>
R546 100K_0402_5%~D 1 2 +RTC_CELL_VBAT

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

10U_0805_10V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D
2 1 DOCK_SMB_ALERT# R544 1
D R547 10K_0402_5%~D 0_0402_5%~D D
C660 +RTC_CELL
1 1 1 1 1 1 1 1 1

C661
0.1U_0402_16V4Z~D
2

C662

C663

C664

C665

C666

C667

C668
C651

1
0.1U_0402_16V4Z~D
1 2 PBAT_SMBDAT 2 2 2 2 2 2 2 2 2
R551 2.2K_0402_5%~D 1 2

B64

A11
A22
B35
A41
A58
A52

A26
PBAT_SMBCLK R550

B3
1 2
R552 2.2K_0402_5%~D U36 100K_0402_5%~D @ C669

2
2 1 LPC_LDRQ#_MEC +3.3V_RUN 1U_0402_6.3V6K~D

VTR[1]
VTR[2]
VTR[3]
VTR[4]
VTR[5]
VTR[6]
VTR[7]
VTR[8]
VBAT
@ R837 100K_0402_5%~D R1131 DOCK_PWR_SW# 1 2
23 DOCK_PWR_SW# DOCK_PWR_BTN# 38
10K_0402_5%~D 1 R554 10K_0402_5%~D
RUNPWROK 2 1
PS/2 INTERFACE MISC INTERFACE
SML1_SMBDATA A5 A10 SYSTEM_ID
16 SML1_SMBDATA GPIO007/I2C1D_DATA/PS2_CLK0B/I2C3A_DATA GPIO021/RC_ID1 2 C670
SML1_SMBCLK B6 B10 BOARD_ID +3.3V_ALW
16 SML1_SMBCLK GPIO010/I2C1D_CLK/PS2_DAT0B/I2C3A_CLK GPIO020/RC_ID2
CLK_TP_SIO A37 B14 DDR_ON 1U_0402_6.3V6K~D
41 CLK_TP_SIO GPIO110/PS2_CLK2/GPTP-IN6 GPIO025/UART_CLK DDR_ON 46,47
1 2 CHARGER_SMBDAT DAT_TP_SIO B40 B44 HOST_DEBUG_TX CHIPSET_ID for BID
41 DAT_TP_SIO GPIO111/PS2_DAT2/GPTP-OUT6 GPIO120/UART_TX HOST_DEBUG_TX 36

2
R29 2.2K_0402_5%~D CLK_KBD A38 B46 HOST_DEBUG_RX
38 CLK_KBD GPIO112/PS2_CLK1A GPIO124/GPTP-OUT5/UART_RX HOST_DEBUG_RX 36 function
1 2 CHARGER_SMBCLK DAT_KBD B41 B26 RUNPWROK R85
38 DAT_KBD GPIO113/PS2_DAT1A VCC_PRWGD
R30 2.2K_0402_5%~D CLK_MSE A39 A25 EN_INVPWR 1K_0402_5%~D
38 CLK_MSE GPIO114/PS2_CLK0A GPIO060/KBRST EN_INVPWR 24
DAT_MSE B42 B36
38 DAT_MSE GPIO115/PS2_DAT0A GPIO101/ECGP_SCLK
+3.3V_RUN PBAT_SMBDAT B59 B37
44 PBAT_SMBDAT

1
PBAT_SMBCLK GPIO154/I2C1C_DATA/PS2_CLK1B GPIO103/ECGP_SIN SYSTEM_ID
44 PBAT_SMBCLK A56 B38
GPIO155/I2C1C_CLK/PS2_DAT1B GPIO105/ECGP_SOUT

4700P_0402_25V7K~D
A34 DDR_HVREF_RST_GATE
DAI_GPU_R3P_SMBDAT GPIO102/HSPI_SCLK DDR_HVREF_RST_GATE 8
1 2 A35
R26 2.2K_0402_5%~D GPIO104/HSPI_MISO CPU1.5V_S3_GATE
A36 1
DAI_GPU_R3P_SMBCLK GPIO106/HSPI_MOSI MSDATA CPU1.5V_S3_GATE 12
1 2 JTAG INTERFACE GPIO116/MSDATA
A40 MSDATA 36

C918
R27 2.2K_0402_5%~D JTAG_TDI A51 B43 MSCLK
GPIO145/JTAG_TDI GPIO117/MSCLK MSCLK 36
JTAG_TDO B55 A45 SIO_A20GATE
GPIO146/I2C1K_CLK/JTAG_TDO GPIO127/A20M SIO_A20GATE 19 2
2 1 MSDATA JTAG_CLK B56 A55 PS_ID
GPIO147/I2C1J_DATA/I2C2C_DATA/JTAG_CLK GPIO153/LED3 PS_ID 44
R589 10K_0402_5%~D JTAG_TMS A53 A57 BAT1_LED# Bat2 = Amber LED +3.3V_ALW_PCH
GPIO150/I2C1J_CLK/I2C2C_CLK/JTAG_TMS GPIO156/LED1 BAT1_LED# 43
2 1 M_ON JTAG_RST# B57 B61 BAT2_LED#
JTAG_RST# GPIO157/LED2 BAT2_LED# 43 Bat1 = Blue LED
R561 100K_0402_5%~D C1053 B65 FWP#
AUX_ON 0.1U_0402_16V4Z~D nFWP 20mA drive pins AC_PRESENT
1 2 1 2
R563 2.7K_0402_5%~D 1 2 R1231 10K_0402_5%~D
1 2 DDR_ON FAN PWM & TACH
C R564 100K_0402_5%~D DOCK_POR_RST# B22 C
38 DOCK_POR_RST# GPIO050/FAN_TACH1
1 2 SUS_ON SUS_ON A21 GENERAL PURPOSE I/O
42 SUS_ON GPIO051/FAN_TACH2
R566 100K_0402_5%~D AUX_ON B23 +3.3V_ALW
30 AUX_ON GPIO052/FAN_TACH3
1 2 PCH_ALW_ON BREATH_LED# B24 B2
38,43 BREATH_LED# GPIO053/PWM0 GPIO001/ECSPI_CS1
R568 100K_0402_5%~D PCH_ALW_ON A23 A2 DOCK_SMB_ALERT# CPU_DETECT# 2 1
42 PCH_ALW_ON GPIO054/PWM1 GPIO002/ECSPI_CS2
1 2 DOCK_POR_RST# KYBRD_BKLT_PWM B25 B8 FFS_INT1 @ R635 2 DOCK_SMB_ALERT#
1
38,44 R1512 100K_0402_5%~D
41 KYBRD_BKLT_PWM GPIO055/PWM2 GPIO014/GPTP-IN7/HSPI_CS1 HDD_FALL_INT 18,28
R1046 100K_0402_5%~D A24 B18 CPU_DETECT# 0_0402_5%~D DOCK_SMB_DAT 2 1
GPIO056/PWM3 GPIO040/GPTP-OUT3/HSPI_CS2 CPU_DETECT# 8
1 2 EN_INVPWR A8 ME_SUS_PWR_ACK R565 2.2K_0402_5%~D
GPIO015/GPTP-OUT7 ME_SUS_PWR_ACK 17
R595 100K_0402_5%~D B9 1.5V_SUS_PWRGD DOCK_SMB_CLK 2 1
GPIO016/GPTP-IN8 1.5V_SUS_PWRGD 46
BC-LINK A9 PM_MEPWROK R567 2.2K_0402_5%~D
GPIO017/GPTP-OUT8 PM_MEPWROK 17
BC_CLK_ECE5028 A43 A14 1.05V_M_PWRGD
39 BC_CLK_ECE5028 GPIO123/BCM_A_CLK GPIO26/GPTP-IN1 1.05V_M_PWRGD 48
BC_DAT_ECE5028 B45 B15 ALW_PWRGD_3V_5V
39 BC_DAT_ECE5028 GPIO122/BCM_A_DAT GPIO27/GPTP-OUT1 ALW_PWRGD_3V_5V 45
BC_INT#_ECE5028 A42 A17 ODD_DET#
+3.3V_ALW 39 BC_INT#_ECE5028 GPIO121/BCM_A_INT# GPIO041 ODD_DET# 28
BC_CLK_EMC4002 A12 B39 RESET_OUT# RESET_OUT# 2 1
23 BC_CLK_EMC4002 GPIO022/BCM_B_CLK GPIO107/nRESET_OUT RESET_OUT# 15,17
23 BC_DAT_EMC4002 BC_DAT_EMC4002 B13 A44 M_ON @ R5 8.2K_0402_5%~D
GPIO023/BCM_B_DAT GPIO125/GPTP-IN5 M_ON 42,48
23 BC_INT#_EMC4002 BC_INT#_EMC4002 A13 B47 PCH_RSMRST#
GPIO024/BCM_B_INT# GPIO126 PCH_RSMRST# 17
10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

100K_0402_5%~D

B20 A54 AC_PRESENT


GPIO044/BCM_C_CLK GPIO151/GPTP-IN4 AC_PRESENT 17
1

A18 B58 SIO_PWRBTN#


GPIO043/BCM_C_DAT GPIO152/GPTP-OUT4 SIO_PWRBTN# 17
@ B19 +5V_RUN
GPIO042/BCM_C_INT#
R576

R1410

R575

R574

BC_CLK_ECE1077 A20
41 BC_CLK_ECE1077 BC_DAT_ECE1077 GPIO047/LSBCM_D_CLK CLK_KBD
41 BC_DAT_ECE1077 B21 2 1
BC_INT#_ECE1077 GPIO046/LSBCM_D_DAT R569 4.7K_0402_5%~D
41 BC_INT#_ECE1077 A19
2

@ JDEG1 BEEP GPIO045/LSBCM_D_INT# DAT_KBD


29 BEEP A16
GPIO032/GPTP-IN3/BCM_E_CLK SMBUS INTERFACE 2 1
1 SIO_SLP_S5# B16 A3 DOCK_SMB_DAT R570 4.7K_0402_5%~D
1 17 SIO_SLP_S5# GPIO31/GPTP-OUT2/BCM_E_DAT GPIO003/I2C1A_DATA DOCK_SMB_DAT 38
2 MSCLK ACAV_IN_NB A15 B4 DOCK_SMB_CLK CLK_MSE 2 1
2 39,51,52 ACAV_IN_NB GPIO30/GPTP-IN2/BCM_E_INT# GPIO004/I2C1A_CLK DOCK_SMB_CLK 38
7 3 MSDATA A4 LCD_SMBDAT R571 4.7K_0402_5%~D
G1 3 GPIO005/I2C1B_DATA LCD_SMBDAT 24
8 4 1 2 HOST_DEBUG_TX HOST INTERFACE B5 LCD_SMBCLK DAT_MSE 2 1
G2 4 GPIO006/I2C1B_CLK LCD_SMBCLK 24
5 R593 1 2 0_0402_5%~D HOST_DEBUG_RX SIO_EXT_SMI# A6 B7 CKG_FFS_SMBDAT R572 4.7K_0402_5%~D
5 19 SIO_EXT_SMI# GPIO011/nSMI GPIO012/I2C1H_DATA/I2C2D_DATA CKG_FFS_SMBDAT 6
6 R577 0_0402_5%~D SIO_RCIN# A27 A7 CKG_FFS_SMBCLK +3.3V_ALW
6 19 SIO_RCIN# GPIO061/LPCPD# GPIO013/I2C1H_CLK/I2C2D_CLK CKG_FFS_SMBCLK 6
LPC_LDRQ#_MEC B29 B48 DAI_GPU_R3P_SMBDAT
LDRQ# GPIO130/I2C2A_DATA DAI_GPU_R3P_SMBDAT 23,29
ACES_85204-06001~D IRQ_SERIRQ A28 B49 DAI_GPU_R3P_SMBCLK +3.3V_RUN
15,31,32,39 IRQ_SERIRQ SER_IRQ GPIO131/I2C2A_CLK DAI_GPU_R3P_SMBCLK 23,29
PCH_PLTRST#_EC B30 A47 CHARGER_SMBDAT
8,18,32,34,36,39 PCH_PLTRST#_EC LRESET# GPIO132/I2C1G_DATA CHARGER_SMBDAT 51

2
+3.3V_ALW CLK_PCI_MEC A29 B50 CHARGER_SMBCLK CKG_FFS_SMBDAT 2 1
18 CLK_PCI_MEC PCI_CLK GPIO140/I2C1G_CLK CHARGER_SMBCLK 51
LPC_LFRAME# B31 B52 CARD_SMBDAT R578 R540 2.2K_0402_5%~D
15,31,32,39 LPC_LFRAME# LFRAME# GPIO141/I2C1F_DATA/I2C2B_DATA CARD_SMBDAT 34
LPC_LAD0 A30 A49 CARD_SMBCLK 10K_0402_5%~D CKG_FFS_SMBCLK 2 1
15,31,32,39 LPC_LAD0 LAD0 GPIO142/I2C1F_CLK/I2C2B_CLK CARD_SMBCLK 34
LPC_LAD1 B32 B53 USH_SMBDAT R542 2.2K_0402_5%~D
15,31,32,39 LPC_LAD1 LAD1 GPIO143/I2C1E_DATA USH_SMBDAT 31
10K_0402_5%~D
49.9_0402_1%~D

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

LPC_LAD2 A31 A50 USH_SMBCLK

1
15,31,32,39 LPC_LAD2 LAD2 GPIO144/I2C1E_CLK USH_SMBCLK 31
1

B LPC_LAD3 B33 B
15,31,32,39 LPC_LAD3 LAD3
R580

R581

R582

R583

CLKRUN# FWP# 1=JTAG interface Reset disabled


R584

17,32,39 CLKRUN# A32 2 1 HDD_SMBDAT 28


SIO_EXT_SCI# CLKRUN# @ R446 2
19 SIO_EXT_SCI# A33
GPIO100/nEC_SCI 1 0_0402_5%~D HDD_SMBCLK 28 0=Reset JTAG interface
DELL PWR SW INF @ R508 0_0402_5%~D

2
A59
2

@ JP2 BGPO0 LAT_ON_SW# @ R586


B63
VCI_IN2# ALWON 10K_0402_5%~D
1
1 MASTER CLOCK VCI_OUT
A60 ALWON 45
2 JTAG_TDI MEC_XTAL1 A61 A63 VCI_IN1# +RTC_CELL
2 JTAG_TMS MEC_XTAL2 XTAL1 VCI_IN1# POWER_SW_IN#
7 3 2 1 A62 B67

1
G1 3 JTAG_CLK R587 0_0402_5%~D XTAL2 VCI_IN0# ACAV_IN
8 4 B62 B1 ACAV_IN 23,51,52
G2 4 JTAG_TDO GPIO160/32KHZ_OUT VCI_OVRD_IN DOCK_PWR_SW#
5 23 EC_32KHZ_OUT A1
5 VCI_IN3#
VR_CAP[1]

6 +RTC_CELL
6
VSS_RO

VCI_IN1# 2 1
VSS[2]
VSS[5]
VSS[7]
VSS[8]
AGND

ACES_85204-06001~D R657 100K_0402_5%~D


NC1
NC2
NC3
NC4
NC5
NC6
NC7

1
EP

R560
MEC5045-LZY_DQFN132_11X11~D 100K_0402_5%~D 1 2
B17
B34
A46
A48
B51
A64
B68

B66

B27
B60
B11
B28

B12

B54

C1

+3.3V_ALW
@ C1884

10K_0402_5%~D
Place closely pin A29 1U_0402_6.3V6K~D
32 KHz Clock

1
LAT_ON_SW# 1 2 LAT_ON_SW_BTN# 37
Same as Laguna CLK_PCI_MEC 1 R1492 10K_0402_5%~D

R579
15mil
1

MEC_XTAL1 C1885
4.7U_0603_6.3V6M~D
8mil

R588 1 1U_0402_6.3V6K~D

2
2
C671

Y4
10_0402_5%~D R98 C919 REV JTAG_RST#
32.768K_12.5PF_Q13MC30610018~D
240K 4700p X00
2

0.1U_0402_16V4Z~D
1

1
1

C1040
MEC_XTAL2 1 4 +3.3V_ALW
130K 4700p X01 1

100_0402_1%~D
C673 @

1
R585
2 3 1 4.7P_0402_50V8C~D
33K 4700p X02
2

NC NC 2
1
C675 R98 2 JTAG1
4.3K 4700p X03

2
C674 33P_0402_50V8J~D 1K_0402_5%~D @SHORT PADS~D
33P_0402_50V8J~D 2 +3.3V_M @
2 2K 4700p
1

2
BOARD_ID
A
1K 4700p A00 A
1

4700P_0402_25V7K~D

2
R640
100K_0402_5%~D 1 4700p
4700p
C919
2

PCH_PWRGD# PCH_PWRGD# 23 2 DELL CONFIDENTIAL/PROPRIETARY


1

D
RESET_OUT# 2
G
Q189
SSM3K7002FU_SC70-3~D
Compal Electronics, Inc.
S PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
3

TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, EMC5045
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 40 of 60
5 4 3 2 1
5 4 3 2 1

D
BlueTooth +3.3V_RUN
C1703
D
1 2

Touch Pad 0.1U_0402_16V4Z~D

JBT
+3.3V_ALW 1 1
2 2
18 BT_DET# COEX1_BT_ACTIVE
36 COEX1_BT_ACTIVE 3 3
4 4

4.7K_0402_5%~D

4.7K_0402_5%~D
5 5

1
6 6
43 BT_ACTIVE

R613

R614
39 BT_RADIO_DIS# 7 7
COEX2_WLAN_ACTIVE 8 @ FAN
36 COEX2_WLAN_ACTIVE 8
9 9 Part Number Description
10

2
10
18 USBP6- 11 11 DC28A000800 FAN SET DAQ20 DC5V AB7405HB-HB3 ADDA
TP_DATA R1545 1 2 100_0603_5%~D DAT_TP_SIO 12
DAT_TP_SIO 40 18 USBP6+ 12
13 @ Speak
TP_CLK R1546 1 CLK_TP_SIO G1
2 100_0603_5%~D CLK_TP_SIO 40 14 G2 Part Number Description
C C
10P_0402_50V8J~D

10P_0402_50V8J~D

E&T_3703-E12N-03R PK230003Q0L SPK PACK ZJX 2.0W 4 OHM FG


10P_0402_50V8J~D

10P_0402_50V8J~D
1 1 1 1

100P_0402_50V8J~D
@SM CARD BODY
C680

C681

C682

C683

33P_0402_50V8J~D

10K_0402_5%~D
Part Number Description

@ C1334
2 2 2 2 1 1

C1704

R1407
SP070007V0L S SOCKET TYCO 1770551-1
10P H5.9 SMART

2 2 @PCMCIA BODY

2
Part Number Description
PCMCIA TYCO
Touch Pad Conn. Pitch=0.5 DC000001Q0L
1759096-1

JTP1 @ MDC wire set cable


+3.3V_ALW 1 1
+5V_RUN Power Switch for debug Part Number Description
2 2

0.1U_0402_16V4Z~D
0.1U_0402_16V4Z~D

3 3 DC02000CS0L H-CONN SET ZGX


40 BC_CLK_ECE1077 4 4 1 MB-MDC
1 40 BC_DAT_ECE1077 5 5

C678
6 @ T/P wire set cable
40 BC_INT#_ECE1077 6
C771

+3.3V_ALW 7 POWER_SW#_MB 1 2 Part Number Description


7 2 37,40 POWER_SW#_MB 1 2
B +3.3V_RUN 8 8 B
2 TP_CLK H-CONN SET ZJX
9 9 1 DC02000840L
TP_DATA 10 MB-B/T-TP-FP
10 @ C684
+5V_RUN 11 11
12 100P_0402_50V8J~D PWRSW1 @ LVDS cable
+5V_ALW 12 2
Place close to KYBRD_BKLT_PWM 13 @SHORT PADS~D Part Number Description
40 KYBRD_BKLT_PWM 13
JTP1.5,6 14 14 @ Place on Top
15 DC020003Y0L H-CONN SET ZJX MB-LCD
TP_DET# 15 +5V_ALW 14 WXGA+(-1ch)
16 16
39 TP_DET#
0.1U_0402_16V4Z~D

@ LVDS cable
17 G1 1 Part Number Description
18 G2
C1413

1 2 DC02000870L H-CONN SET ZJX


1 2 MB-LCD 14 WXGA+(-2ch)
2
@ RTC BATT
HRS_FH12-16S-0P5SH(55)~D Part Number Description
TP_CLK PWRSW2
TP_DATA @SHORT PADS~D GC20323MX00 BATT CR2032 3V
SD05.TCT_SOD323-2~D

SD05.TCT_SOD323-2~D

Place on Bottom
@ 220MAH MAXELL
1

@ @
A A
DELL CONFIDENTIAL/PROPRIETARY
D53

D54
2

Compal Electronics, Inc.


PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
Place close to JTP1 connector BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Touch PAD/Int KB/LID
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 41 of 60
5 4 3 2 1
5 4 3 2 1

DC/DC Interface +3.3V_ALW_PCH Source


+15V_ALW +3.3V_ALW Q54 +3.3V_ALW_PCH +5VRUN Source
SI3456BDV-T1-E3_TSOP6~D
+3.3V_ALW2 +15V_ALW +5V_ALW Q55

D
+3.3V_ALW2 6 SI4164DY-T1-GE3_SO8~D +5V_RUN

S
1
5 4 8 1

1
10U_0805_10V4Z~D
R598 2 7 2

10U_0805_10V4Z~D
100K_0402_5%~D 1 1 R597 6 3

1
100K_0402_5%~D 5 1

C687
R602 R601 R599 R600

C686
100K_0402_5%~D ALW_ENABLE 20K_0402_5%~D 100K_0402_5%~D 20K_0402_5%~D

4
21 ALW_ENABLE 2 5V_RUN_ENABLE

2
3
D 2 D
2

2
3
Q57B

2200P_0402_50V7K~D
DMN66D0LDW-7_SOT363-6~D 1 Q56B
ALW_ON_3.3V# 5 DMN66D0LDW-7_SOT363-6~D
C688 RUN_ON_ENABLE# 5 1
6

3300P_0402_50V7K~D

4
2

C689
Q57A

4
DMN66D0LDW-7_SOT363-6~D

6
2 2
40 PCH_ALW_ON
Q56A
DMN66D0LDW-7_SOT363-6~D
1

2
+15V_ALW +3.3V_SUS Source 12,34,39,47 RUN_ON
+3.3V_ALW Q60

1
SI3456BDV-T1-E3_TSOP6~D +3.3V_SUS

1 +3.3V_RUN Source

D
R603 6

S
+3.3V_ALW2 100K_0402_5%~D 5 4 +3.3V_ALW Q61 +3.3V_RUN
2 +15V_ALW NTMS4107NR2G_SO8~D

1
20K_0402_5%~D
1 1 8 1
2

R1484

10U_0805_10V4Z~D

R605
7 2

G
1

1
C690

20K_0402_5%~D
1 2 6 3 1

3
8 1.5V_PWRGD 0.75V_VR_EN 47

10U_0805_10V4Z~D

R607
R604 SUS_ENABLE 5
2

C691
100K_0402_5%~D 100K_0402_5%~D R606

2
3

100K_0402_5%~D @

4
Q62B 2
2

2
DMN66D0LDW-7_SOT363-6~D
SUS_ON_3.3V# 5 1 3.3V_RUN_ENABLE
Q206
6

C692 R1499 BSS138_SOT23~D


4

1
Q62A 4700P_0402_25V7K~D 0_0402_5%~D D D
2 1
DMN66D0LDW-7_SOT363-6~D RUN_ON_ENABLE# 1 2 2 2
C G G Q64 C693 C
40 SUS_ON 2
S S SSM3K7002FU_SC70-3~D 470P_0402_50V7K~D

3
@ R1500 2
1

0_0402_5%~D
RUN_ON_CPU1.5VS3# 1 2

+3.3VM Source Discharg Circuit


+3.3V_ALW Q66 +1.5V_RUN Source
+15V_ALW SI3456BDV-T1-E3_TSOP6~D +3.3V_M +3.3V_M Q151
100K_0402_5%~D

+3.3V_ALW2 +1.5V_MEM SI3456BDV-T1-E3_TSOP6~D


D

6 +15V_ALW +1.5V_RUN
S
1

D
5 4 6

S
R610

10U_0805_10V4Z~D
2 R616 5 4
1

1
20K_0402_5%~D

10U_0805_10V4Z~D
1 1 @ 39_0603_5%~D 2

1
R612

20K_0402_5%~D
C1190
R611 1 1
G

C694

R1225
100K_0402_5%~D R1224

G
2

2
M_ENABLE

+3.3V_M_CHG
100K_0402_5%~D

3
2
2

2
3

2
SSM3K7002FU_SC70-3~D
Q68B 1.5V_RUN_ENABLE
DMN66D0LDW-7_SOT363-6~D
M_ON_3.3V# 5 1

1
D
1
6

1
D

Q72
C696 M_ON_3.3V# 2
4

Q68A 4700P_0402_25V7K~D G 2 Q152 C1191


DMN66D0LDW-7_SOT363-6~D 2 S G SSM3K7002FU_SC70-3~D 4700P_0402_25V7K~D

3
B 2 B
2 S

3
40,48 M_ON
1

Discharg Circuit +1.05V_RUN Source


+5V_RUN +1.5V_RUN +3.3V_RUN +1.05V_RUN +1.5V_CPU_VDDQ +0.75V_DDR_VTT +15V_ALW +1.05V_RUN_VTT Q183
+3.3V_SUS +3.3V_ALW_PCH SI4164DY-T1-GE3_SO8~D +1.05V_RUN
8 1
1

1
1K_0402_5%~D

1K_0402_5%~D

1K_0402_5%~D

1K_0402_5%~D

39_0402_5%~D

7 2
1

10U_0805_10V4Z~D
@ R622

@ R623

@ R636

R625 R1479 R1306 6 3

1
@ R627

@ R628

39_0603_5%~D 220_0402_5%~D R624 100K_0402_5%~D 5 1


22_0603_5%~D R1307

C1411
20K_0402_5%~D
2

4
1.05V_RUN_ENABLE
+5V_RUN_CHG

+1.5V_RUN_CHG

+3.3V_RUN_CHG

+1.05V_RUN_CHG

+1.5V_CPU_VDDQ_CHG
2

2
+3.3V_ALWPCH_CHG

2
+DDR_CHG
+3.3V_SUS_CHG

1
D

2200P_0402_50V7K~D
2 Q1
G SSM3K7002FU_SC70-3~D 1
S

3
12 RUN_ON_CPU1.5VS3#

C1412
1

1
D D D D D 2
SSM3K7002FU_SC70-3~D
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D
@ @ @
1

D D
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

Q76

Q77

Q79

Q80

Q78
@ @ RUN_ON_ENABLE# 2 2 2 2 2
1

D
Q81

Q82

SUS_ON_3.3V# 2 ALW_ON_3.3V# 2 G G G G G
Q204

G G S S S S 2 S
3

3
A G A
S S
3

S
3

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, POWER CONTROL
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 42 of 60
5 4 3 2 1
5 4 3 2 1

+3.3V_RUN @ H1 @ H3 @ H4 @ H5 @ H6 Fiducial Mark


HDD LED solution for Blue LED H_2P8 H_2P8 H_2P8 H_2P8 H_3P2 @ H14 @ H15 @ H16 @ H17 EMI CLIP @ FD1
H_3P2 H_3P2 H_3P2 H_3P2 1

1
+5V_RUN CLIP1
R654 EMI_CLIP FIDUCIAL MARK~D

1
10K_0402_5%~D

1
1 @ FD2
@ H23 @ H24 @ H25 GND
1

3
H_6P1 H_2P5X3P1 H_2P5X3P1
@ H7 @ H8 @ H9 @ H10 @ H19 @ H20 @ H21 @ H22 FIDUCIAL MARK~D
H_3P0 H_3P0 H_3P0 H_3P0 H_5P0 H_5P0 H_5P3 H_5P3 CLIP2

D
3 1 SATA_ACT# 2 EMI_CLIP @ FD3
15 SATA_ACT#_R

1
1
Q93 Q92 1

1
PDTA114EU_SC70-3~D GND FIDUCIAL MARK~D

G
SSM3K7002FU_SC70-3~D

2
D D
MASK_BASE_LEDS# @ FD4

1
1
1 2 SATA_LED 2 1
R659 1K_0402_5%~D +5V_ALW FIDUCIAL MARK~D
D42
LTST-C191ZBKT-Q_BLUE~D

3
+3.3V_WLAN 2
39 CAP_LED#
+5V_RUN Q120
Keyboard Status LED

3
PDTA114EU_SC70-3~D
1

1
3
R662 D67 2 1 2 R_CAP_LED# 2 1
39 NUM_LED#
100K_0402_5%~D SDM10U45-7_SOD523-2~D R556 1K_0402_5%~D
Q121 D57
2

3
PDTA114EU_SC70-3~D
S

3 1 1 2 2 LTST-C191ZBKT-Q_BLUE~D
36 LED_WLAN_OUT#
Q98 Q97

1
SSM3K7002FU_SC70-3~D PDTA114EU_SC70-3~D R_NUM_LED#
G

2 1 2 2 1
2

39 SCRL_LED#
R596 1K_0402_5%~D
MASK_BASE_LEDS# Q122 D58
1

PDTA114EU_SC70-3~D LTST-C191ZBKT-Q_BLUE~D

1
1 2 R_SCRL_LED# 2 1
R655 1K_0402_5%~D
D45 +5V_ALW D59
LTST-C191ZBKT-Q_BLUE~D

1
D
1 2 WLAN_LED 2 1 R1006

3
R663 1K_0402_5%~D 100K_0402_5%~D MASK_BASE_LEDS# 2
LTST-C191ZBKT-Q_BLUE~D +5V_ALW 1 2 G
+3.3V_ALW Q150 S

3
2 SSM3K7002FU_SC70-3~D
C WLAN LED solution for Blue LED Q144A C

6
DMN66D0LDW-7_SOT363-6~D Q99
C1058
PDTA114EU_SC70-3~D Battery LED

1
D46
+3.3V_RUN R89 1 2 2 +5V_ALW BLUE

1
47K_0402_5%~D 1 2 BATT_BLUE 2 1
+5V_RUN <BOM Structure> R665 1K_0402_5%~D

1
1

1
5

1
0.1U_0402_16V4Z~D

2
R1004 +5V_ALW BATT_YELLOW 4 3

NC
P
R206 BAT2_LED# 2 4 BAT2_LED 100K_0402_5%~D
40 BAT2_LED#
3

100K_0402_5%~D A Y YEL

3
G
Q142

SSM3K7002FU_SC70-3~D
U63 LTST-C155TBJSKT_Blue/YEL~D
2

2
NC7SZ04P5X_NL_SC70-5~D SSM3K7002FU_SC70-3~D

1
D
S

36 LED_WWAN_OUT# 3 1 2

Q141
5 Q144B 3 1 2 MASK_BASE_LEDS# 2
Q116 Q115 DMN66D0LDW-7_SOT363-6~D G
SSM3K7002FU_SC70-3~D PDTA114EU_SC70-3~D Q139
G

S
2

3
PDTA114EU_SC70-3~D

G
2
MASK_BASE_LEDS#
1

39 SYS_LED_MASK#
1 2 WWAN_LED 2 1

1
R125 1K_0402_5%~D +3.3V_ALW
D61
LTST-C191ZBKT-Q_BLUE~D R1007

3
100K_0402_5%~D
WWAN LED solution for Blue LED +3.3V_ALW 1 2

+3.3V_ALW 2
Q145A

6
DMN66D0LDW-7_SOT363-6~D Q101
+3.3V_RUN PDTA114EU_SC70-3~D
C1059

1
+5V_RUN R666
C1337 R82 1 2 2 +3.3V_ALW 150_0402_5%~D

1
1 2 47K_0402_5%~D 1 2
<BOM Structure>

1
3

1
5

1
0.1U_0402_16V4Z~D U117 0.1U_0402_16V4Z~D

2
5

NC7SZ04P5X_NL_SC70-5~D R1005 +3.3V_ALW

NC
P
BAT1_LED# 2 4 BAT1_LED 100K_0402_5%~D
NC
P

40 BAT1_LED# A Y
S

41 BT_ACTIVE BT_ACTIVE 2 4 3 1 2

3
G
B A Y U64 Q143 B

2
G
10K_0402_5%~D

Q95 Q94 NC7SZ04P5X_NL_SC70-5~D SSM3K7002FU_SC70-3~D R1002

3
1

SSM3K7002FU_SC70-3~D PDTA114EU_SC70-3~D 1K_0402_5%~D


G
3

D
<BOM Structure> 5 3 1 2 1 2 BATT_BLUE_LED 24
R748

MASK_BASE_LEDS# Q145B
1

<BOM Structure> DMN66D0LDW-7_SOT363-6~D Q140

4
D43 PDTA114EU_SC70-3~D

G
2

2
1 2 WPAN_LED 2 1 R1003
R661 1K_0402_5%~D 150_0402_5%~D

1
39 SYS_LED_MASK#
LTST-C191ZBKT-Q_BLUE~D 1 2 BATT_YELLOW_LED 24
WPAN LED solution for Blue LED +5V_ALW

100K_0402_5%~D
1
+5V_ALW

R999
LED Circuit Control Table

3
Q134B

2
DMN66D0LDW-7_SOT363-6~D
SYS_LED_MASK# LID_CL# 4 3 2
+3.3V_ALW

DMN66D0LDW-7_SOT363-6~D
6
Q137
PDTA114EU_SC70-3~D

Q134A
Mask All LEDs (Sniffer Function) 0 X

5
C1060 +5V_ALW
Mask Base MB LEDs (Lid Closed) 1 0 2

1
1

1 2 1 2 BREATH_BLUE_LED BREATH_BLUE_LED 24
39 SYS_LED_MASK#
R90 R664 1K_0402_5%~D
Do not Mask LEDs (Lid Opened) 1 1

100K_0402_5%~D
1

1
47K_0402_5%~D +5V_ALW
0.1U_0402_16V4Z~D

R1000
<BOM Structure>
5

1
2

3
NC
P

BREATH_LED#_R Q135B
2 4

2
38,40 BREATH_LED# A Y DMN66D0LDW-7_SOT363-6~D
G

U42 4 3 2
NC7SZ04P5X_NL_SC70-5~D DMN66D0LDW-7_SOT363-6~D
3

+3.3V_ALW Q138
PDTA114EU_SC70-3~D
Q135A

A A

5
C1061
1 2 2

1
MASK_BASE_LEDS#
1 2 BREATH_BLUE_LED_SNIFF BREATH_BLUE_LED_SNIFF 37
1
5

U65 0.1U_0402_16V4Z~D R1001 150_0402_5%~D


SYS_LED_MASK# 1
P

39 SYS_LED_MASK# B
4 MASK_BASE_LEDS#
37,39 LID_CL#
LID_CL# 2
O DELL CONFIDENTIAL/PROPRIETARY
G

A
TC7SH08FU_SSOP5~D
Compal Electronics, Inc.
3

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, PAD and Standoff
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 43 of 60
5 4 3 2 1
5 4 3 2 1

+COINCELL
COIN RTC Battery

1
PR1
1K_0402_5%~D

+3.3V_RTC_LDO

2
JRTC1
1

Z4012
+COINCELL 1
2 4
2 G1
3 5
+3.3V_ALW 3 G2
D D
MOLEX_53398-0371~D

3
+RTC_CELL
ESD Diodes

PD1

DA204U_SOT323~D

DA204U_SOT323~D

DA204U_SOT323~D

1
3

2
PD2

PD3

PD4
RB715F_SOT323~D 1
PL1 +3.3V_ALW PC1
@ @ @ FBMA-L18-453215-900LMA90T_1812~D 1U_0603_10V4Z~D
1 2
2
Primary Battery Connector

1
Move to power schematic

1
PJP1

10K_0402_1%~D
PBATT+_C 1 2 PBATT+

PR2
11

0.1U_0603_25V7K~D
GND

1
10 PAD-OPEN 4x4m
GND

PC2
9 PR4

2
9 100_0402_5%~D PR3
8

2
8 Z4304 100_0402_5%~D PR5
7 1 2 PBAT_SMBCLK 40
2200P_0402_50V7K~D

7 Z4305 100_0402_5%~D
6 1 2 PBAT_SMBDAT 40
6 Z4306
5 1 2 PBAT_PRES# 39
1

5
PC3

4
4 PQ1
3
3
2
2

2 FDN338P_NL_SOT23-3~D
1
1 PD6

3
1 2 1 3 DOCK_SMB_ALERT# 38,40
PBATT1
SUYIN_200275MR009G50PZR RB751V-40_SOD323-2~D

2
2
PR7
GND 1 2
38,39,52 SLICE_BAT_PRES#
0_0402_5%~D
C C

1
PC4
1500P_0402_7K~D

2
+5V_ALW
+3.3V_ALW

DA204U_SOT323~D
3

2
PD7
@ PR8 PU1

2.2K_0402_5%~D
2
1 2 GND 38 DOCK_PSID 1 6 GPIO_PSID_SELECT 39
0_0402_5%~D NO IN

PR9
2 5 +5V_ALW
PL2 PR10 GND V+

1
BLM18BD102SN1D_0603~D 33_0402_5%~D
NB_PSID NB_PSID_TS5A63157

S
2 1 1 3 1 2 3 4 PS_ID 40
NC COM
100K_0402_1%~D PQ2 TS5A63157DCKR_SC70-6~D
2 FDV301N_NL_SOT23-3~D +5V_ALW

G
2
PR11

+5V_ALW
+5V_ALW

DA204U_SOT323~D
2

2
10K_0402_1%~D
DA204U_SOT323~D

1
C

PD9
PR12
2 PQ3
3

B MMST3904-7-F_SOT323~D
PD10

E @
15K_0402_1%~D

3
2

@
1

1
@ PD8
PR13

SM24_SOT23 PR14
GND 1 2
1

PSID_DISABLE# 39
1

PR15 @ 10K_0402_5%~D
0_0402_5%~D
1 2 DCIN_CBL_DET# 39
.47U_0402_6.3V6-K~D

B B
DC_IN+ Source
2
PC5

@ +DC_IN +DC_IN_SS
PQ4
FDS6679AZ_SO8~D
1 8
PL3 S D
2 7
FBMJ4516HS720NT_1806~D S D
3 6
+DC_IN S D
1 2 4 5
G D
1

1M_0402_5%~D
VZ0603M260APT_0603

2
0.022U_0805_50V7K~D

4.7K_0805_5%~D

10U_1206_25V6M~D
1

1
0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D
PC6

PR16

1
PD11

1
1

PC7

PC8
PC10

PR17

PC11
2

2
1
0.1U_0603_25V7K~D

PJPDC1 PR20
4.7K_0805_5%~D

2
1

1 @ 1 2
2

SOFT_START_GC 52
1
0.1U_0603_25V7K~D

1
PC9

2
2

2 -DCIN_JACK 10K_0402_5%~D
@ PR18

3
1M_0402_5%~D
1

3 2
PC12

4
2

4 +DCIN_JACK
PR19

5
2

5
6
6 @
7
7
2

MOLEX_87438-0743 PL4
FBMJ4516HS720NT_1806~D
1 2
1
0.1U_0603_25V7K~D
PC13

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D +DCIN
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Size Document Number Rev
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. 0.1
LA-5772P
Date: Thursday, January 21, 2010 Sheet 44 of 60
5 4 3 2 1
5 4 3 2 1

+3.3V_ALWP/ +5V_ALWP/ +5V_ALW2 / +15V_ALWP/ +3.3V_RTC_LDO

+DC1_PWR_SRC

PJP2
+PWR_SRC 1 2

PAD-OPEN 4x4m

2
PJP3 +5V_VCC1

0_0805_5%~D

0_0805_5%~D
D D
+5V_ALW2 1 2

0.1U_0805_50V7M~D
2200P_0402_50V7K~D
PR22

PR23

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D
0.1U_0805_50V7M~D
2200P_0402_50V7K~D
@ PR24

1
PAD-OPEN1x1m 10_0603_5%~D

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

1
1

PC20

PC21

PC22

PC23

PC24
2 1

4.7U_0805_6.3V6K~D
PC15

PC16

@ PC17

PC18

PC19

2
2

1
@

PC25
+3.3V_ALW2

2
0.1U_0603_25V7K~D
1
PC26

1U_0603_10V6K~D
@ PR26

0_0402_5%~D

1U_0603_10V6K~D
1

1
0_0402_5%~D

PC27
2

1
PR25

PC28
1 2

2
@ PR27

2
0_0402_5%~D
5 Volt +/-5%

2
1 2
5V_3V_REF
Thermal Design Current:5.196A

+5V_ALW2P
+3.3V_RTC_LDO PC29

EN_3V_5V
+3.3V_ALW2
Peak Current:7.423A 0.1U_0603_25V7K~D

1
GNDA_3V5V 1 2 GNDA_3V5V PR29
OCP_MIN:8.165 A 0_0402_5%~D

VIN
LDOREFIN 1 2
3.3 Volt +/-5%

0.1U_0402_10V7K~D
@ PR28

2
PR30
5

0.1U_0402_10V7K~D
SI4134DY-T1-GE3_SO8~D

PC31
0_0603_5%~D @
Thermal Design Current: 3.971A

8
7
6

5
6
7
8
3
2
5
4

1
PQ7

GNDA_3V5V PU2 1 2

1
+5V_ALWP 0_0402_5%~D PQ8 Peak current: 5.674A

PC30

LDOREFIN

VIN
LDO

TONSEL
VREF3

VREF2
V5FILT
EN_LDO

REFIN2
@ SI4800BDY-T1-E3_SO8~D

2
OCP_MIN:6.808 A

2
4 @ PR31
9 32 232K_0402_1%~D 4
+5V_ALWP PR32 VSW REFIN2 GNDA_3V5V
10 31 1 2
215K_0402_1%~D +5V_FB1 VOUT1 TRIP2 +3.3V_OUT2
11 30
VFB1 VOUT2
C GNDA_3V5V 1 2 12 29 2 PR33 0_0402_5%~D
1 +3.3V_ALWP C
1
2
3

PL5 POK1 TRIP1 SKIPSEL POK2 PL6


13 28

3
2
1
EN_3V_5V PGOOD1 PGOOD2 EN_3V_5V
14 27
3.3UH_FDVE1040-H-3R3M=P3_11.3A_20%~D +5V_ALW_UGATE EN1 EN2 +3.3V_ALW_UGATE 4.7UH_FDVE1040-H-4R7M=P3_10A_20%~D
15 26
+5V_ALWP +5V_ALW_PHASE DRVH1 DRVH2 +3.3V_ALW_PHASE +3.3V_ALWP
1 2 16 25 2 1
LL1 LL2

SECFB
V5DRV
VBST1
DRVL1

DRVL2
VBST2

0.1U_0603_25V7K~D
1000P_0603_50V7K~D
1

1
3

PGND
GNDA_3V5V

GND
0_0402_5%~D

0_0402_5%~D
PAD

1
0.1U_0603_25V7K~D

3
FDMS7692_POWER56-8~D
PC32

PC33
D
330U_D3L_6.3VM_R25~D

330U_D3L_6.3VM_R25~D
SI4134DY-T1-GE3_SO8~D
1000P_0603_50V7K~D
PR34

PR35
D
2

2
0.1U_0402_10V7K~D

0.1U_0402_10V7K~D
PQ9

1
SN0608098_QFN32_5X5~D

PC36

PC37
1 1

33

17
18
19
20
21
22
23
24

PQ10
2
1

1
+ @ +
PC34

PC35

PC38

PC39
2

2
G

SECFB
GNDA_3V5V 2
2

2
PR37 PR38 G PR39
2

2
S

2 @ 1_0603_5%~D 1_0603_5%~D 2.2_1206_1%~D @ 2


PR36
2.2_1206_1%~D

S
1 2+5V_ALW_BOOT +3.3V_ALW_BOOT 1 2

0_0402_5%~D
1
1

1
@
0_0402_5%~D

1
+3.3V_ALW_LGATE

PR41
1

1
PR40

2
+5V_ALW_LGATE
GNDA_3V5V

GNDA_3V5V
GNDA_3V5V PC40 PJP4

1
4.7U_0603_6.3V6K~D
+5V_ALWP 2 0.1U_0603_25V7K~D 1 2
+3.3V_ALWP +3.3V_ALWP

PC41
VOUT2=5V 1 1 2
3

+5V_ALW2

2
0.1U_0603_25V7K~D

L=3.3uF PAD-OPEN1x1m
Fsw=400KHz
1

PD12 GNDA_3V5V VOUT2=3.3V

100K_0402_1%~D

100K_0402_1%~D
D=0.253
PC42

BAT54SW-7-F_SOT323-3~D

2
Input Ripple Current=TDC*(D*(1-D))^0.5=2.27A L=3.3uF
2

PC43

PR42

PR43
Output Ripple Current=(19-5)*0.263/3u/400K=2.81A Fsw=300KHz
2 0.1U_0603_25V7K~D PD14
1

Output Ripple Voltage=3.1*18m=56.75mV 1 1 2 BAT54CW_SOT323~D D=0.169


B B
3 @ Input Ripple Current=TDC*(D*(1-D))^0.5=1.95A

1
PR44 PD13 POK2 Output ripple current=(19-3.3)*0.173/3u/300K=1.944A
2K_0402_5%~D Output ripple Voltage=1.96*18=48.6mV
2 1 BAT54SW-7-F_SOT323-3~D
3

40 ALWON

0_0402_5%~D
1
200K_0402_5%~D
2

PR45
PR46
0_0402_5%~D
PR47

23 THERM_STP# 2 1

2
1

POK1
PJP5 ALW_PWRGD_3V_5V 40
1 2

PAD-OPEN 4x4m PR48


PJP6 PJP7 200K_0402_1%~D
+5V_ALWP 1 2 +15V_ALW 2 1 +15V_ALWP 2 1
+5V_ALW
PAD-OPEN 4x4m
0.1U_0603_25V7K~D

PAD-OPEN1x1m
2

(100mA,20mils ,Via NO.=1)


1

PR49
PC44

PJP8 39K_0402_5%~D
1 2
2

+3.3V_ALWP +3.3V_ALW
1

PAD-OPEN 4x4m
PJP9
1 2

PAD-OPEN 4x4m
GNDA_3V5V

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL DC/DC +3V/ +5V
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
LA-5772P
Date: Thursday, January 21, 2010 Sheet 45 of 60
5 4 3 2 1
5 4 3 2 1

+1.5V_SUS_P(TPS51318)

1U_0402_6.3V6K~D
DC_5V_ALW1

2
+3.3V_ALW

PC45
+1.5V_VX

17

16

2
PU3
PC47

VIN

VIN
1
GNDA_TPS_1.5V 0.22U_0603_10V7K~D

1
D PR377 D
PC46 100P_0402_50V8J~D 3.3_0603_1%~D
2 1 TPS51318_VCCA 1 15 TPS51318_BST 1 2
VCCA VBST
2 14 1.5V_SUS_PWRGD
PR50 5.6K_0402_5%~D PC48 680P_0402_50V7K~D GND PGOOD 1.5 Volt +/-5%
TPS51318_COMP 3 13 DDR_EN
2 1 2 1
COMP EN 22.1K_0402_1%~D @
Thermal Design Current: 7.876A
TPS51318_VFB 4 12 TPS51318_FSET 2
PR52 2K_0402_5%~D VFB FSET PR51
1 Peak current: 11.251A
2 1 +1.5V_SUS_P 5 11 TPS51318_MODE OCP_MIN:12.376A
VOUT MODE

2
+1.5V_SUS_P

22.1K_0402_1%~D
2 1 1 2 TPS51318_SS 6 10 TPS51318_IMON
SS IMON

2200P_0402_50V7K~D

PR54
1

1
0_0402_5%~D

1.33K_0402_1%~D

PGND

PGND
PC50
1200P_0402_50V7K~D

SW
PR53 PC49

1
PR55

9
2
SN0905030RUWR_QFN17_3P5X3P5~D

PJP10

+1.5V_VX
GNDA_TPS_1.5V GNDA_TPS_1.5V 1 2

1.33K_0402_1%~D
PAD-OPEN1x1m

@ PR56
GNDA_TPS_1.5V
@ PR410 0_0402_5%~D

2
2 1

C C

+1.5V_SUS_P(VT356)
@ PL7
FBMJ4516HS720NT_1806~D
DC_5V_ALW1 1 2 +5V_ALW
2

10U_1206_25V6M~D

10U_1206_25V6M~D
10U_1206_25V6M~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D
PC53

PC54
PR57 @ PJP11

1
10_0402_1%~D 1 2

PC51

PC52
@ PC326
PAD-OPEN 4x4m
1

2
AVDD1
0.22U_0402_10V6K~D
1
PC55

D5

D4
E3

E2

E1
E5

E4

PU4 @

VX

VX
GND

GND

GND
VDD

VDD
2

@
BIAS A1 D3
BIAS VX
+1.5V_R_SEL/LOAD A2 D2
GNDA_1.5V R_SEL/ILOAD VX
+1.5V_VDES A3 D1 PL8
VDES VX 0.42UH_MPC0740LR42C_20A_20%~D
PR58 VSENSE1 A4 C5 +1.5V_VX 2 1
0_0402_5%~D VSENSE+ VDD
40,47 DDR_ON 1 2 DDR_EN A5 C4
OE VDD

1
B @ B
B1 C3 PC56 +1.5V_SUS_P
AGND GND
AVDD

TEMP

STAT

0.1U_0603_25V7K~D
IRIPL

GND

GND

2
2200P_0402_50V7K~D

287K_0402_1%

68.1K_0402_1%~D

3.74K_0402_1%~D
1

44.2K_0402_1%

VT357FCX-ADJ_CSP25~D
B2

B3

B4

B5

C1

C2
1

PR61

PR62

2
PC57

PR59

PR60

@ PR63
1.5V_SUS_PWRGD
2

24k_0402_1%~D

@ @ @ @ 4.7_0805_5%~D
2

1
@
AVDD1

10U_1206_25V6M~D

10U_1206_25V6M~D
PR64

PC66

PC67
22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D
1

1
@ PR65

PC58

@ PC59

PC60

PC61

@ PC62

@ PC63

@ PC64

PC65
@ 0_0402_5%~D
2

2
2

PJP12 VSENSE1
PR66 @ 1 2

1
PR70//PR60=55.04K 0_0402_5%~D
PAD-OPEN1x1m @ PR67
1

0_0402_5%~D
GNDA_1.5V

2
+3.3V_ALW PJP13
1 2

PAD-OPEN 4x4m
100K_0402_1%~D

PJP14
1

+1.5V_SUS_P 1 2 +1.5V_MEM
A A
PR68

PAD-OPEN 4x4m
2

DELL CONFIDENTIAL/PROPRIETARY
1.5V_SUS_PWRGD 40
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.5V_MEM
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
LA-5772P
Date: Thursday, January 21, 2010 Sheet 46 of 60
5 4 3 2 1
5 4 3 2 1

+1.8V_RUNP
+3.3V_ALW PJP18
1 2 +1.8V_PWR_SRC
1.8 Volt +/-5%
PAD-OPEN 4x4m
Thermal Design Current: 0.99 A

1
10U_0805_6.3V6M~D

22U_0805_6.3V4Z~D

0.1U_0603_25V7K~D
PR380
Peak current: 1.415 A

PC83
0_0603_5%~D

1
PC81

PC82
D D
PC317 100P_0402_50V8J~D
OCP_MIN: 1.698 A

2
2 1

2
@

@ @

1
GNDA_1.8V
PR379
0_0402_5%~D

2
2 1

0_0402_5%~D

PR381

1
4
PU6
GNDA_1.8V

VDD
SYNCH

VIN

VIN
1 2 5 EN TPAD 17
12,34,39,42 RUN_ON
PR77
24k_0402_1%~D 16
NC PL11
6 NC 2UH_#A915AY-H-2R0M=P3_3.3A_20%~D
LX 15 2 1 +1.8V_RUNP
ISL8014IRZ-T_QFN16_4X4~D
7 PG
LX 14
C C

150P_0402_50V8F~D
680P_0603_50V8J~D
8 VFB NC 13

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

47P_0402_50V8J~D
39 1.8V_RUN_PWRGD

SGND

SGND

PGND

PGND

124K_0402_1%~D
PC84
1

1
2

1
PR79

PC85

PC86

PC87
PC324
10K_0402_5%~D @

10

11

12

2
PR78

2
2
1

PR80
4.7_0805_5%~D

100K_0402_1%~D
GNDA_1.8V

1
@ PJP19 +3.3V_RUN

PR81
1 2
@

PAD-OPEN1x1m

2
GNDA_1.8V

GNDA_1.8V

@ PJP20
+1.8V_RUNP 1 2 +1.8V_RUN
PAD-OPEN 4x4m

B B

VOUT=1.8V
+0.75V_DDR_VTT L=3.3uF
Fsw=290KHz
DDR3 Termination D=0.092
Input Ripple Current=TDC*(D*(1-D))^0.5=0.884A
+5V_ALW
Output Ripple Current=1.707A
Output Ripple Voltage=1.707*15m=20.5mV

+0.75V_P
PC88
2 1
+V_DDR_REF
4.7U_0805_10V4Z~D 0.75Volt +/-5%
PU7
10 3
Thermal Design Current: 0.7A
PJP21 VIN VTT
+1.5V_MEM 2 1 DC_1+0.75V_VTT_PWR_SRC 2 5
Peak current: 1A
VLDOIN VTTSNS
10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

PAD-OPEN 2x2m~D 1 6
VDDQSNS VTTREF
0.1U_0603_25V7K~D

@ PR82 0_0402_5%~D
1 2 7 4
S3 PGND
2

39 0.75V_DDR_VTT_ON
PC90

PC91

8
GND
2
PC89
10U_0805_6.3V6M~D

0.1U_0603_25V7K~D

1 2 9 11
PR428 S5 BP PJP22
1

0_0402_5%~D PR83 0_0402_5%~D TPS51100DGQRG4_MSOP10~D 2 1


1

+0.75V_DDR_VTT
2

1
PC92

2 1 +0.75V_P
42 0.75V_VR_EN
PC93

A PAD-OPEN 2x2m~D A
1

40,46 DDR_ON DELL CONFIDENTIAL/PROPRIETARY


Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT +0.75V_DDR_VT/+1.8V_RUN
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5772P
Date: Thursday, January 21, 2010 Sheet 47 of 60
5 4 3 2 1
5 4 3 2 1

D D

+1.05V_M_P 1.05 Volt +/-5%


Thermal Design Current: 1.518A
Peack current: 2.169A
+3.3V_ALW PJP26 OCP_MIN: 4.3A
1 2 +1.05V_PWR_SRC
1 2

@ JUMP_43X79

10U_0805_6.3V6M~D

22U_0805_6.3V4Z~D

0.1U_0603_25V7K~D

1
PC117
2

1
PC115

@ PC116
PR383
1 0_0603_5%~D

2
PC318 100P_0402_50V8J~D

2
2 1

1
GNDA_1.05VM @
PR382
0_0402_5%~D

2
C C
2 1

0_0402_5%~D
PR95
0_0402_5%~D PR384

1
1 2 PU9
40,42 M_ON GNDA_1.05VM

SYNCH

VDD

VIN

VIN
@ PR96
0_0402_5%~D
1 2 1.05V_VM_EN 5 17
17,39 SIO_SLP_M# EN TPAD

16
NC PL14
6
NC 1.1UH_#A915AY-H-1R1M=P3_4.07A_20%~D
15 2 1 +1.05V_VM_P
ISL8014IRZ-T_QFN16_4X4~D LX
7
PG
14
LX

150P_0402_50V8F~D
680P_0603_50V8J~D
8 13
VFB NC

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

47P_0402_50V8J~D
40 1.05V_M_PWRGD

SGND

SGND

PGND

PGND

124K_0402_1%~D
PC118
1

1
2

1
PR98
PC325

PC119

PC120

PC121
10K_0402_5%~D @

10

11

12

2
PR97

2
2
1

PR99
4.7_0805_5%~D
B B

392K_0402_1%~D
GNDA_1.05VM

1
+3.3V_ALW

PR100
@
@ PJP27
1 2

2
PAD-OPEN1x1m

GNDA_1.05VM GNDA_1.05VM

PJP28
+1.05V_VM_P 1 2 +1.05V_M
1 2

@ JUMP_43X79

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +1.05VM
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
LA-5772P
Date: Thursday, January 21, 2010 Sheet 48 of 60
5 4 3 2 1
5 4 3 2 1

PR101
1 2 +5V_ALW

1
10_0603_5% PC122
2.2U_0603_10V6K~D

1U_0603_6.3V6M~D

2
1

PC123
2
D
PL15
1.1 Volt +/-5% D

FBMJ4516HS720NT_1806~D
VTT_B+ 2 1
Thermal Design Current: 12.641A
+PWR_SRC

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D
Peack current: 18.059A

10U_1206_25VAK

10U_1206_25VAK

10U_1206_25VAK
2

1
PU10
@ PJP30 OCP_MIN: 21.67A

PC124

PC125

PC126
PC127

PC128
18
1 2

2
PAD-OPEN 4x4m

VCC

VDD
1 2 1 2 1.05 Volt +/-5%
PR105
PR103 PR104 6 2 200K_0402_1%~D
1 Thermal Design Current: 18.72A

5
0_0402_5%~D 0_0402_5% TON1
16
GND
@
7
PR106
2 200K_0402_1%~D
1
Peack current: 26.75A
TON2

SIR472DP_DFN~D
+5V_ALW
GNDA_VTT
2 PR107
OCP_MIN: 32.096A
ILIM1 PC129

PQ15
2.2_0603_1%~D 4
15 1 2 2 1
PC130 BST1 PL16
2

0.22U_0603_10V7K~D 0.56UH_MPC1040LR56C_23A_+-20%~D
0_0402_5%

+VTTP UG_VTT1
@ PR108

2 1 3 13

3
2
1
ILIM2 DH1
4 1

680P_0402_50V7K~D
5
220P_0402_50V8J~D 14 PHASE_VTT1 3 2
1

1
LX1

PC131

10_0402_1%~D
1

2
1 2 5

FDMS7660_DFN~D
SKIP LG_VTT1 PR110

PR386
17

11
2
DL1

VTT_SENSE
PR109 3.01K_0402_1%~D
2

PQ16
0_0402_5% PR111 @ PR395 4

4.7_0805_1%
2
0_0402_5% 0_0402_5%~D

1
PR112
39 CPU_VTT_ON 1 2 11 20 1 2 1 2
EN1 PGND

0.15U_0402_10V6K~D
PR113 PR114
1

3
2
1
10 4.99K_0402_1%~D 0_0402_5% +VTTP

1
1000P_0402_50V7K~D
2
CSH1

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D
1
PC132
C 1 1 1 C
GNDA_VTT 25 9 PR385

21
EN2 CSL1 + + +

PC134

PC135

PC136
0_0402_5%~D

PC133
PR115

2
PC137 1 2 2 2 2
2200P_0402_50V7K~D GNDA_VTT 10_0402_1%~D
GNDA_VTT 2 1 1 21 1 2 2 1

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D
REF BST2 PR116 2.2_0603_1%~D VTT_B+
VTT_FB2 PC138

10U_1206_25VAK

10U_1206_25VAK

10U_1206_25VAK
1

2
0.22U_0603_10V7K~D
1

PC139

PC140

PC141

PC142

PC143
23
@ PR117 DH2

1
8.87K_0402_1%~D 8
REFIN1

SIR472DP_DFN~D
22
LX2
2

PQ17
+5V_ALW 2 1 UG_VTT2 4
19
1

PR118 DL2 PL17


0_0402_5% @ PR119 0.56UH_MPC1040LR56C_23A_+-20%~D
11K_0402_1%~D 12

3
2
1
PGOOD1 PHASE_VTT2
26 4 1
2
CSH2
2

680P_0402_50V7K~D
PC144

PC146
3 2

1
24 27 0.15U_0402_10V6K~D

10_0402_1%~D
2 1

2
PGOOD2 CSL2
PR120

PR434
PR110 PR120

2
FDMS7660_DFN~D
GNDA_VTT PC145 3.01K_0402_1%~D
28 1000P_0402_50V7K~D Margaux UMA and SG 3.01K
GND_T

4.7_0805_1%
1

2
FB2

PQ18
+5V_ALW LG_VTT2 4

1
GNDA_VTT Margaux DSC and ASICS 1.58K

PR121
1 2 1 2
MAX17007AGTI+_TQFN28_4X4~D
29
1

1
PR122 PR123 PR113 PR122

0_0402_5%~D
3
2
1

1
PR124 4.99K_0402_1%~D 0_0402_5%

PR433
9.31K_0402_1%~D 2 1 Margaux UMA and SG 4.99K
Margaux DSC and ASICS 6.98K
2

@ PR125
PR126
0_0402_5%
2

2
B B
0_0402_5%
1
@ PR127
0_0402_5%

8 H_VTTPWRGD
GNDA_VTT
1
1

11
VTT_SENSE
1 2
PR128
2

2.74K_0402_1%~D VTT_FB2 PR129


PJP31
<BOM Structure> +5V_ALW 10_0402_1%~D
2 1
2

@ PJP32
PAD-OPEN1x1m 1 2

GNDA_VTT GNDA_VTT PAD-OPEN 43X118

@ PJP33
1 2

PAD-OPEN 43X118
+VTTP +1.05V_RUN_VTT
@ PJP34
1 2

PAD-OPEN 43X118

@ PJP35
1 2

PAD-OPEN 43X118

A A

Title
<Title>

Size Document Number Rev


C LA-5772P 1A

Date: Thursday, January 21, 2010 Sheet 49 of 60


5 4 3 2 1
8 7 6 5 4 3 2 1

+1.05V_RUN_VTT +CPU_PWR_SRC
@ @ @ @ @
PJP37

PR130

PR131

PR132

PR133

PR134

PR135

PR136
1 2 +PWR_SRC

1
PAD-OPEN 4x4m
OCP calculation: Assume DCR=0.88mOhm

1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D

100U_25V_M~D

100U_25V_M~D

100U_25V_M~D
10U_1206_25VAK~D

10U_1206_25VAK~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
G1=Rn/(Rn+Rsum/3), 1 1 1

PC151

PC152

PC153
2

1
11 VID0 where Rn=PR137//(PR134+PH2); Rsum=PR105,PR218,PR142 + + +

PC147

PC149

PC150
H H

PC148
11 VID1 DROOP=2*(DCR/3)*G1*Rdroop/Ri=1.91mOhm

2
2 2 2
where Rdroop=PR126;Ri=PR140

5
11 VID2
Iocp=60u*Rdroop/DROOP=~75A.

SIR472DP-T1-GE3_SO8~D
11 VID3 @

PR137

PR138

PR139
1

1
11 VID4

PQ19
4
Iccmax= 48A
11 VID5
I_TDC=33.6A

1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D
@ PR144
11 VID6
OCP=57.6 A, Intel spec=TDB

2
PR143

PR145

PR146

3
2
1
1

1
39 IMVP_VR_ON 1 2 PR142 PC154
PR141 0_0402_5%~D 0_0603_5%~D 0.22U_0603_10V7K~D
+1.05V_RUN_VTT 1 2 BOOT2 2 1 BOOT2_2 1 2

1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D

1K_0402_1%~D
PR140 1K_0402_1%~D PL18
11 H_DPRSLPVR 1 2 UGATE2 0.45UH_MPC1040LR45CP_24A_20%~D

2
G PR147 100_0402_5%~D G
PHASE2 4 1 +VCC_CORE
1 2

470P_0603_50V8J~D
5

5
@ PR148 1K_0402_1%~D 3 2V2N

1
@ PQ21
PQ20 PR149

AON6704L_DFN8-5
AON6704L_DFN8-5
51K_0402_1%~D PR150 @

PC155
6,53 CLK_EN# ISEN2 1 2 0_0402_5%~D

2
PR151 1.91K_0402_1%~D 2 1 ISEN1
+3.3V_RUN 1 2 CLK_EN# 4 4
PR154 PR155 @
1

1
3.65K_0603_1%~D 0_0402_5%~D

2.2_1206_1%~D
VSUM+ 2 1 ISEN3

PR153
1 2
PR152

3
2
1

3
2
1
PR156 1.91K_0402_1%~D
0_0402_5%~D LGATE2 PR157
2

2
8,39,53 IMVP_PWRGD 1 2 1_0402_5%~D
1

@ PR158 VSUM- 1 2
1K_0402_5%~D PR205
+1.05V_RUN_VTT 1 2 0_0402_5%~D
F F
PR159 0_0402_5%~D +CPU_PWR_SRC
2

1 2
11 H_PSI#
PR161 1K_0402_1%~D
PR160 1 2
147K_0402_1%~D

2200P_0402_50V7K~D
5

0.1U_0603_25V7K~D
1 2 PC156 +5V_ALW
GNDA_VCORE

10U_1206_25VAK~D

10U_1206_25VAK~D
SIR472DP-T1-GE3_SO8~D
1U_0603_10V6K~D
39

37
36
35
34
33
32
31
40

38

1
PR162 68_0402_5%~D PU11

PC157
1 2

PC158

PC159

PC160
1 2
DPRSLPVR

VID6
VID5
VID4
VID3
VID2
VID1
VID0
CLK_EN#

VR_ON

+1.05V_RUN_VTT

1U_0603_10V6K~D

PQ22

2
1
PR164 0_0402_5%~D PR163 PC161

PC162
30 4
BOOT2 PU12 0_0603_5%~D 0.22U_0603_10V7K~D
1 2 29
8 H_PROCHOT# UGATE2 BOOT3 1 BOOT3_31
1 28 5 1 2 2

2
@ PC163 56P_0402_50VNPO~D PGOOD PHASE2 VCC BOOT
2 27
PSI# VSSP2 UGATE3
1 2 3 26 6 8

3
2
1
VR_TT# RBIAS LGATE2 FCCM UGATE PL19
4 25 +5V_ALW
@ PR165 VR_TT# VCCP PHASE3 0.45UH_MPC1040LR45CP_24A_20%~D
E 5 24 2 7 E
NTC PWM3 PWM PHASE
GNDA_VCORE 1 2 2 1 6 23
4.02K_0402_1%~D VW LGATE1 LGATE3
7 22 3 4 4 1 +VCC_CORE
@ PH1 COMP VSSP1 GND LGATE
8 21

470P_0603_50V8J~D
5

5
GNDA_VCORE FB PHASE1
470K_0402_5%_ERTJ0EV474J~D 1 2 9 ISL6208CRZ-T_QFN8~D 3 2V3N

1
ISEN3
UGATE1

@ PQ24
10 ISL62883HRZ-T_QFN40_5X5~D PQ23
BOOT1
ISUM+

AON6704L_DFN8-5
AON6704L_DFN8-5
ISEN2
ISEN1

ISUM-
VSEN

IMON

@ PC164 PR167

PC165
1 2
VDD
249K_0402_1%~D

8.06K_0402_1%~D

RTN

1U_0603_10V6K~D
1000P_0402_50V7K~D

VIN

22P_0402_50V8J~D 41 51K_0402_1%~D

2
1

AGND
PR169 @

0_0402_5%~D ISEN3 1 PR168 @


PC166

PC167

2
@ PR166 0_0402_5%~D
PR170

4 4
11
12
13
14
15
16
17
18
19
20

2 1 ISEN1
2

PR171 PC168 GNDA_VCORE

1
1 2 1 2 PR172 PR174 @

2.2_1206_1%~D
2

3.65K_0603_1%~D 0_0402_5%~D

PR173
3
2
1

3
2
1
562_0402_1%~D 390PF_0402_50V7K~D VSUM+ 2 1 2 1 ISEN2
PC169 PR175 PR176 0_0402_5%~D
1 2 1 2 1 2 IMVP_IMON 11,23

2
PR179
33P_0402_50V8J~D 2.21K_0402_1%~D PR177 0_0402_5%~D 1_0402_5%~D
D 1 2 +CPU_PWR_SRC VSUM- 1 2 D
1 2 1 2
.047U_0402_16V7K~D

PC170 PR178
150P_0402_50V8J~D 324K_0402_1%~D PR181 1_0402_5%~D
1 2 +CPU_PWR_SRC
+5V_ALW
ISEN3 1 2
1

PR180 0_0402_5%~D
PC172

PC173

PC171
1U_0603_10V6K~D

0.22U_0603_25V7K~D

ISEN2 1 2
PR182 0_0402_5%~D PR184
2

2
0.22U_0402_10V6K~D

0.22U_0402_10V6K~D

0.22U_0402_10V6K~D

ISEN1 8.25K_0402_1%~D
BOOT1

1 2

10U_1206_25VAK~D
2200P_0402_50V7K~D
5

0.1U_0603_25V7K~D
PR183 0_0402_5%~D
2

10U_1206_25VAK~D
SIR472DP-T1-GE3_SO8~D

1
VSSSENSE 11

PC177
PQ25

PC178

PC179

PC180
1

GNDA_VCORE
PC174

PC175

PC176

2
UGATE1 4
2

PR185 PC181
C VSUM- 0_0603_5%~D 0.22U_0603_10V7K~D C

3
2
1
VSUM+ 2 1 BOOT1_1 1 2
Catch resistors R1116 R1236 PL20
82.5_0402_1%~D

0.45UH_MPC1040LR45CP_24A_20%~D
1

PHASE1 4 1 +VCC_CORE
1
0.022U_0402_50V7~D
PR187

GNDA_VCORE 1 2
2.61K_0402_1%~D

1
0.33U_0603_10V7K~D

0.047U_0603_25V7M~D

2V1N
PR189

470P_0603_50V8J~D
@ PQ27
PR203 @ 27.4_0402_1%~D PQ26

PC182
AON6704L_DFN8-5
1

AON6704L_DFN8-5
0.01U_0402_25V7K~D

11 VCCSENSE VCCS PR190


PC183

PC184

PC185

1 2
2

2
51K_0402_1%~D
2

PR188 0_0402_5%~D ISEN1 2 1


2

2
1

@ 4 4 PR192 @
1

1
PC186 0_0402_5%~D
330P_0402_50V7K~D PR193 1 ISEN2
PC187

2.2_1206_1%~D
2

3.65K_0603_1%~D

PR191
2

VSUM+ 2 1 PR194 @

3
2
1

3
2
1
GNDA_VCORE 0_0402_5%~D

2
LGATE1 2 1 ISEN3
330P_0402_50V7K~D

B PR195 B
11K_0402_1%~D
1

PC188 768_0402_1% PH2


PC189

PR197
0_0402_5%~D

1000P_0402_50V7K~D 1 2 PR199
PR198 0_0402_5%~D 10K_0402_1%_ERTJ0EG103FA~D 1_0402_5%~D
PR196
2

11 VSSSENSE 1 2 VSUM- 1 2
2

2
2

UMA&SG 1H/1L
PR201
100_0402_5%~D
DSC&ASICS 1H/2L
1 2 1 2 VSUM-

PC190
1200P_0402_50V7K~D
.1U_0402_16V7K~D

GNDA_VCORE 1 2 VSSS
1

PR204 @ 27.4_0402_1%~D
PC191

DELL CONFIDENTIAL/PROPRIETARY
2

A
PJP38 A
1 2 Compal Electronics, Inc.
Title
PAD-OPEN1x1m
GNDA_VCORE GNDA_VCORE THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL +VCORE
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-5772P
Date: Thursday, January 21, 2010 Sheet 50 of 60
8 7 6 5 4 3 2 1
5 4 3 2 1

PD15
B540C-13-F_SMC2~D
2 1 @ PL27
FBMJ4516HS720NT_1806~D
2 1
PQ28 PR202
SI4835DDY-T1-E3_SO8~D +SDC_IN 0.01_1206_1%~D +PWR_SRC CHAGER_SRC
8 1 PJP39
7 2 4 1 1 2
+DC_IN_SS

0.1U_0603_25V7K~D
6 3

0.1U_0603_25V7K~D
5 3 2 PAD-OPEN 4x4m

47P_0402_50V8J~D
@

1
PC194

PC192
4

PC193
PR281

2
1
D PR391 @ D
1 2 DC_BLOCK_GC 52 D
1 2 2 PQ31
52 CSS_GC
0_0402_5%~D G NTR4502PT1G_SOT23-3~D

1
0_0402_5%~D D S

3
2 PQ33A
G NTGD4161PT1G_TSOP6~D
PQ32 S

S
NTR4502PT1G_SOT23-3~D

D
5 6 DOCK_DCIN_IS+ 38
E2 AC_OK=17.7 Volt

CSSN_1
CSSP_1

G
1
PR218 PQ33B
@ PR209 NTGD4161PT1G_TSOP6~D
TI bq24745 = 316K 10K_0402_5%~D

100K_0402_1%~D
Intersil ISL88731 = 226K

D
2 1 2 4 DOCK_DCIN_IS- 38
Maxim = 383K

100K_0402_1%~D
1

1
PR213

G
3
+SDC_IN

PR214
MAX8731A_LDO MAX8731_REF PC196 PC197
10K_0402_1%~D

10K_0402_5%~D

PR392 0.1U_0603_25V7K~D 0.1U_0603_25V7K~D PR217

2
52 +CHGR_DC_IN 1 2 1 2 1 2 0_0402_5%~D

2
1

1
316K_0402_1%~D

1 2 DK_CSS_GC 52
PR215

PR216

1_0805_5%~D
2

0_0402_5%~D
PR218

PR212
@ PC198
1U_0603_10V6K~D

28

27
1
@ PC199 GNDA_CHG PU13 VCC 1 2 GNDA_CHG
2

0.1U_0805_50V7M~D

ICREF

CSSP

CSSN
PR219 2 1 DCIN 22 26
1

DCIN ICOUT

2200P_0402_50V7K~D

10U_1206_25V6M~D

10U_1206_25V6M~D
0.1U_0603_25V7K~D
49.9K_0402_1%~D PR220

BAT54HT1G_SOD323-2~D
2 1 2 2.2_0603_1%~D PR221 @
PR222 ACIN BOOT BOOT_D 33_0603_1%~D
25 1 2
BOOT

1
PC202

PC203

PC204

PC205
15.8K_0402_1%~D

C C
PC200 1 2 13 ACOK
23,40,52 ACAV_IN

1
PC201
0.1U_0603_25V7K~D
0_0402_5%~D

1
1

1
2 1 11

2
VDDSMB

5
6
7
8

5
6
7
8
PD17
PR223

SI4800BDY-T1-E3_SO8~D

SI4800BDY-T1-E3_SO8~D
0.01U_0402_25V7K~D 10 PC206

D
D
D
D

D
D
D
D
2
SCL 1U_0603_10V6K~D

PQ34

PQ35
GNDA_CHG +5V_ALW @ 9 21 MAX8731A_LDO 1 2
2

SDA VDDP

GNDA_CHG 14 4 4
NC CHG_UGATE G G
24
MAX8731_IINP UGATE
8
VICM
1

S
S
S

S
S
S
23 2 PR224 1 +VCHGR_B
PHASE

3300P_0402_50V7K~D
PC207 6

3
2
1

3
2
1
FBO

1
0.1U_0402_10V7K~D 1_0603_1%~D
2

1 2 5 @ PC208 PL21
EAI 220P_0402_50V7K~D 5.6UH_HMU1356B-5R6-F_8A_20%~D

1
4.7K_0402_5%~D

GNDA_CHG PR225 1 2 1 2 4 20 CHG_LGATE


EAO LGATE
56P_0402_50V8~D

+VCHGR

PC210
40 CHARGER_SMBCLK 200K_0402_5%~D PC209 PR226 PR228
1

3
2200P_0402_50V7K~D 7.5K_0402_5%~D 0.01_1206_1%~D

2
PR227

40 CHARGER_SMBDAT
2
PC211

MAX8731_REF 3 19 @ 2 1 +VCHGR_L
4 1
VREF PGND
18
CSOP

1.8K_1206_5%~D
PC212 PR229 3 2
2

23 MAX8731_IINP

1
10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D
0.1U_0603_25V7K~D
120P_0402_50VNPO~D 1 2 7 17
CE CSON

5
6
7
8

0_0402_5%~D
220P_0402_50V8J~D

PR232
8.45K_0402_1%~D

1 2 10K_0402_5%~D
1

1
0.1U_0402_10V7K~D

15 VFB

SI4812BDY-T1-E3_SO8~D
1 PR231 2 PBATT+ PC214

2
VFB
1

1
PR230

PC213

1U_0603_10V6K~D
0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

12 1000P_0603_50V7K~D
GND
1

PR233

PC220

PC221

PC222

PC223
16 100_0402_5%~D @

2
NC
1

PQ36
PC215

PC216

PC217

PC218

PC219

29
2

2
TP

2
@ 4 PR234
2

2
4.7_1206_5%~D
2

@ @ @ @ BQ24747RHDR_QFN28_5X5~D PC224
B PJP40 0.1U_0603_25V7K~D PC225 B

1
D
1 2 1 2 1 2

3
2
1

1
2
0.1U_0603_25V7K~D G
PAD-OPEN1x1m S

3
GNDA_CHG
GNDA_CHG GNDA_CHG
Maximum charging current is 6.3A ACAV_IN @
PQ37
MAX8731_REF RHU002N06_SOT323-3~D
+3.3V_ALW
+DC_IN MAX8731_REF

10K_0402_1%~D
PR235

232K_0402_1%~D

47K_0402_1%~D
1M_0402_1%~D

1
100K_0402_1%~D
1 2

1
PR237

PR238

PR241
+5V_ALW

PR240
2

2
2
8
PU14B @
5 PR245

P
+
7 1 2
O ACAV_IN_NB 39,40,52
100P_0402_50V8J~D

22.6K_0402_1%~D

41.2K_0402_1%~D
6 0_0402_5%~D
-

G
4

LM393DR_SO8~D

100P_0402_50V8J~D
42.2K_0402_1%~D
1

1
2 LM393DR_SO8~D
G

4
-
1

1
PC226

PR246

PC227

PR250
1
O

PR247
3
+
P

2
PU14A @
8

2
2
100P_0402_50V8J~D

0.01U_0402_25V7K~D

A A
1

1
PC233

PC234

DELL CONFIDENTIAL/PROPRIETARY
2

@ @
+5V_ALW
Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL Charger
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-5772P
Date: Thursday, January 21, 2010 Sheet 51 of 60
5 4 3 2 1
5 4 3 2 1

PD19
B540C-13-F_SMC2~D

2 1

PQ45

+DOCK_PWR_BAR 8 D S 1

0.47U_0805_25V7K~D
7 D S 2
6 3
D S
5 4
D G

PC235
D D

1
FDS6679AZ_SO8~D

2
PR253
330K_0402_5%~D PR279
1 2 STSTART_DCBLOCK_GC

2
0_0402_5%~D

PD20
2
1
PR265 3
330K_0402_5%~D
PDS5100H-13_POWERDI5-3~D
PBATT+ 1 2
PQ49 PQ50 PQ51
SI4835DDY-T1-E3_SO8~D FDS6679AZ_SO8~D 8 1
D S
8 1 1 S D 8 PBATT_IN_SS
7 D S 2
+VCHGR 7 2 2 S D 7 6 D S 3 +PWR_SRC

2200P_0402_50V7K~D

0.1U_0603_25V7K~D
6 3 3 S
C D 6 5 D G 4
C
5 4 G D 5 FDS6679AZ_SO8~D

1
PC236

PC237
4

1
1K_1206_5%~D
PR277

PR252
0_0402_5%~D PR278

2
1 2 1 2

1U_0603_25V6-K~D
0_0402_5%~D

1U_0603_25V6-K~D
1

PC321

PC320
2

2
2

+DOCK_PWR_BAR
PR315
0_0402_5%~D
DSCHRG_MOSFET_GC

+DC_IN_SS

2
1

PR280
51 +CHGR_DC_IN
0_0402_5%~D

+DC_IN 1 2 CD3301_DCIN

1
PR262 47_0805_5%~D
1

PC323

0.1U_0603_50V4Z~D
2

P50ALW +5V_ALW
34

28
32

30
29
36

31
35

33

1 2
PU18 PR271 0_0402_5%~D
44 SOFT_START_GC
1 2
'W/K/ŶƉƵƚĨƌŽŵE
PBatt+
DC_IN_SS

BLK_MOSFET_GC
GND

DSCHRG_MOSFET_GC
NC

NC
CHARGERVR_DCIN

DK_PWRBAR

B +3.3V_ALW2 B
CD_PBATT_OFF 1 2 PBATT_OFF 39
PR409 100K_0402_5%~D PR272 0_0402_5%~D
38 ACAV_DOCK_SRC# 1 2 ACAVDK_SRC
1 2
ŵďĞĚĚĞĚŽŶƚƌŽůůĞƌ
DOCK_AC_OFF 38,39
PR261 0_0402_5%~D 1 27 PR273 0_0402_5%~D
DC_IN P50ALW
2 26
ERC1 SS_GC PBATT_OFF DK_AC_OFF
+SDC_IN 1 2 3 25 1 2
ERC1 DK_AC_OFF_EN
PR263 0_0402_5%~D 4
ACAVDK_SRC ACAV_IN_NB
24 1 2 3301_ACAV_IN_NB ACAV_IN_NB 39,40,51
5 23 PR276 0_0402_5%~D 1M_0402_5%~D
CD3301_SDC_IN GND GND DK_AC_OFF_EN PR431
6 22 1 2 DOCK_AC_OFF_EC 39
SDC_IN DK_AC_OFF_EN SL_BAT_PRES# PR275 0_0402_5%~D
7 21
51 DC_BLOCK_GC ACAVIN 8 DC_BLK_GC SL_BAT_PRES# BLKNG_MOSFET_GC
20
P33ALW2 9 ACAV_IN BLKNG_MOSFET_GC
19
P33ALW2 NBDK_DCINSS
EN_DK_PWRBAR

23,40,51 ACAV_IN 1 2
SS_DCBLK_GC

PR264 0_0402_5%~D
DK_CSS_GC

1 2 1 2 SLICE_BAT_PRES# 38,39,44
PWR_SRC

PR430 0_0402_5%~D PR274 0_0402_5%~D


CSS_GC

P33ALW

PD21 37
TP
ERC3
ERC2

2 1 1 2
GND

+3.3V_ALW2 +NBDOCK_DC_IN_SS
PR270 0_0402_5%~D
@ RB751S40T1_SOD523-2~D
CD3301RHHR_QFN36_6X6~D
10
11
12
13
14
15
16
17
18
1

0.1U_0603_25V7K~D

@ PR427 51 CSS_GC P33ALW 1 2


ERC2

51 DK_CSS_GC +3.3V_ALW
180_0402_1%~D PR269 0_0402_5%~D
1
PC238

ERC3
2

0.047U_0603_25V7K~D

EN_DK_PWRBAR 1 2
2

EN_DOCK_PWR_BAR 39
0.1U_0402_25V4Z~D

PR268 0_0402_5%~D
1 2
PC239

1
PC319

A STSTART_DCBLOCK_GC 1M_0402_5%~D A
@ PR429
2

@ 3301_PWRSRC 1 2 +PWR_SRC
PR267 0_0402_5%~D
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT Selector
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5772P
Date: Thursday, January 21, 2010 Sheet 52 of 60
5 4 3 2 1
5 4 3 2 1

PR282
0_0402_5%~D
2 1 GFX_VID6 12
PR283
0_0402_5%~D
2 1
GPU_CORE
GFX_VID5 12
PR284
Thermal Design Current:12A
0_0402_5%~D
2 1
Peak current: 22A
GFX_VID4 12
PR285
OCP min: 25A
0_0402_5%~D
D 12 GFX_VR_ON 2 1 GFX_VID3 12 D

PR286
0_0402_5%~D
12 GFX_DPRSLPVR 2 1 GFX_VID2 12
PR287
0_0402_5%~D
2 1 GFX_VID1 12
6,50 CLK_EN# PR288 PL28
0_0402_5%~D BLM18SG121TN1D_0603~D
2 1 GFX_VID0 12 2 1
+3.3V_ALW
@ PJP41
+5V_ALW +GPU_PWR_SRC 1 2 +PWR_SRC
PAD-OPEN 43X118

10U_1206_25VAK~D

10U_1206_25VAK~D

10U_1206_25VAK~D
2200P_0402_50V7K~D
0.1U_0603_25V7K~D
2

1
PC243
1

PC240

PC241

PC242

PC322
PR207 PR289

2
0_0402_5%~D 1
0_0603_5%~D
10K_0402_5%~D
1

1 2
8,39,50 IMVP_PWRGD PR291 @
PR290

2
28

26

25

24

23

22
27
1.91K_0402_1%~D

5
@

DPRSLPVR

VID6

VID5

VID4

VID3

VID2
VR_ON

1U_0603_10V6K~D
2

SIR472DP-T1-GE3_SO8~D
PQ55

PQ56
1

SIR472DP-T1-GE3_SO8~D
@ PR206

PC244
0_0402_5%~D
1000P_0402_50V7K~D

1 2 1 21 @
10K_0402_1%~D

2
CLK_EN# VID1
4 4
1

PR292 2 20
1

47K_0402_1%~D PGOOD VID0


PR293

PC245

GNDA_UMA 1 2 3 19
RBIAS VCCP GNDA_UMA
2

3
2
1

3
2
1
C 4 18 C
2

VW LGATE PL22
5 17 0.56UH_MPC1040LR56C_23A_20%~D
COMP PU15 VSSP
8.06K_0402_1%~D

6 16 1 4 +VGFX_COREP
FB PHASE
1

ISL62881HRZ-T_QFN28_4X4

330U_D2_2VM_R6M~D

2200P_0402_50V7K~D
@ PR294

7 15 2 3

330U_D2_2VM_R6M~D
0.1U_0402_10V7K~D
VSEN UGATE
1 1

1
ISUM+ PC246

1
AGND

BOOT
IMON
PC248 + +
ISUM

PC252

PC249

PC247
VDD
RTN
2

VIN
100P_0402_50V8J~D

BSC882N03MS_POWER56-8_5P~D

BSC882N03MS_POWER56-8_5P~D
1000P_0603_50V7K~D

PC251
1 2

2
1 2 1 2 1 2

2
2 2

PQ58

PQ57
29

10

11

12

13

14
GNDA_UMA PC250 PR295 PR296
15P_0402_50V8J~D 17.8K_0402_1%~D 4 4 2.2_1206_1%~D
@
PR297 PC253

2
1 2 1 2 1 2 2.2_0603_1%~D 0.22U_0603_10V7K~D
2 1 1 2

3
2
1

3
2
1
PC254 PR298 PR299 GNDA_UMA
100P_0402_50V8J~D 825K_0402_1% 9.53K_0402_1%~D

GFX_IMON 12
0.015U_0402_16V6K~D
18.7K_0402_1%~D
1

1
PR300

PC255
2
2

VSS_AXG_SENSE 12
PR301 PR302
10_0402_5%~D 0_0402_5%~D
+VGFX_COREP 1 2 1 2 +GPU_PWR_SRC
PC256
B B
PR303 330P_0402_50V7K~D PR304
0_0402_5%~D 1 2 1_0402_5%~D
330P_0402_50V7K~D

12 VCC_AXG_SENSE 1 2 1 2 +5V_ALW
1U_0603_10V6K~D
1

PC257

PR305
1

0_0402_5%~D PC258
PC259

PC260
2

0.22U_0603_25V7K~D

12 VSS_AXG_SENSE 1 2 1000P_0402_50V7K~D
GNDA_UMA 1 2
2

PR306
10_0402_5%~D
GNDA_UMA 1 2
GNDA_UMA
GNDA_UMA
PR307
2K_0603_1%~D

1 2
82.5_0402_1%~D

0.1U_0603_25V7K~D
0.15U_0402_10V6K~D

1
2.61K_0402_1%~D
1

1
0.047U_0603_25V7M~D

PC261

PC262

PR309
PR308

1
11K_0402_1%~D
2

2
1
0.01U_0402_25V7K~D

PC263

PR310

2
2

1
0_0402_5%~D

2
1

PH3
PC264

PR311

10K_0402_1%_ERTJ0EG103FA~D
2

1 2
.1U_0402_16V7K~D

@ PJP42 PR312
1

2.87K_0402_1%
PC265

1 2

PAD-OPEN 43X118 @ PR313


2

442_0402_1%~D
@ PJP43 1 2 1 2
A +VGFX_COREP 1 2 +VCC_GFXCORE A
@ PC266 GNDA_UMA
PAD-OPEN 43X118 180P_0402_50V8J~D

@ PJP44
PJP45
1 2 @
2 1
PAD-OPEN 43X118 DELL CONFIDENTIAL/PROPRIETARY
PAD-OPEN1x1m
Compal Electronics, Inc.
GNDA_UMA Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL ISL62881 GPU core
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 0.1
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC. LA-5772P
Date: Thursday, January 21, 2010 Sheet 53 of 60
5 4 3 2 1
5 4 3 2 1

CPU GFX_VR_ON SIO_PWRBTN#


PM_DRAM_PWRGD +1.05V_RUN_VTT PCH PWRBTN#
ISL62881 +VCC_GFXCORE
15 SM_DRAMPWROK
VAXG
VCCDMI
V_CPU_IO RSMRST#
PCH_RSMRST#

+1.05V_RUN_VTT SIO_SLP_S5#
4
H_CPUPWRGD +1.05V_M SLP_S5#
16 VCCPWRGD_0/1 VTT
VCCME SIO_SLP_S4#
SLP_S4#
PCH_PLTRST#_R +VCC_CORE SIO_SLP_S3#
+1.05V_RUN
D
17 RSTIN# VCC
VCCIO
SLP_S3#
SIO_SLP_M#
5
D

+1.5V_MEM SLP_M#
VDDQ +3.3V_M SIO_SLP_LAN#
SLP_LAN#
VCCME3_3
VTTPWRGOOD
H_VTTPWRGD
12
+3.3V_ALW_PCH PM_MEPWROK
Power Button VCCSUS MEPWROK 10
2BAT +15V_ALW +3.3V_RUN PWROK
RESET_OUT#
VCC3_3
1BAT 2AC BAT54
14
1AC PCH_PLTRST# DRAMPWROK
PM_DRAM_PWRGD

ADAPTER 17 PLTRST#
15
ALWON +5V_ALW
EC 5045 SN0608098 H_CPUPWRGD
PROCPWRGD
+3.3V_ALW 16
ALW_PWRGD_3V_5V
+0.75V_DDR_VTT
C +5V_ALW 7 VTT DDR C

BATTERY DDR_ON
+1.5V_MEM VDDQ
VT357FCX

1.5V_SUS_PWRGD
11
+3.3V_LAN
+5V_ALW
REGCTL_PNP10 RUN_ON
PCH_RSMRST# 82577 +5V_RUN
4 M_ON +3.3V_ALW CTRL_1P0 SIO_SLP_S3# SIO 5028 FDS8878
SIO_SLP_S4# +1.5V_MEM
SIO_SLP_LAN# SI3456BD +3.3V_M +3.3V_LAN
DCP69 +1.0V_LAN 5 SIO_SLP_M#

+3.3V_ALW
6 SI3456BD +1.5V_RUN
PM_MEPWROK SIO_SLP_LAN#
10 +1.05V_RUN_VTT
PCH_ALW_ON
SI3456BD +3.3V_ALW_PCH
3
+5V_ALW
FDS8878 +1.05V_RUN
RESET_OUT# +3.3V_ALW
7 TPS51100
DDR_ON

B
14 SUS_ON
+0.75V_DDR_VTT 0.75V_DDR_VTT_ON
B
+3.3V_ALW
SI3456BD +3.3V_SUS
SIO_SLP_S5#
9 +5V_ALW
NTMS4107 +3.3V_RUN
5 12
+3.3V_ALW
+1.05V_RUN_VTT CPU_VTT_ON
MAX17007
ISL8014 +1.8V_RUN
+3.3V_ALW 1.8V_RUN_PWRGD
1.8VRUNPWROK
M_ON
ISL8014 +1.05V_M H_VTTPWRGD
6 IMVP_VR_ON
1.05V_M_PWRGD
ISL62883 +VCC_CORE 13
+3.3V_ALW IMVP_PWRGD
AUX_EN_WOWL
8 +3.3V_WLAN
SI3456BD
+3.3V_RUN
RUNPWROK
A BC BUS 11 A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL Title
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Power Sequence
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD Size Document Number Rev
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. 0.1
LA-5571P
Date: Thursday, January 21, 2010 Sheet 54 of 60
5 4 3 2 1
5 4 3 2 1

V ersion Change L ist ( P. I. R . L ist )


R equest
Item Page# Title D ate O w ner Issue D escription Solution D escription R ev.
D D
1 21 HW 5/19/2009 Intel Remove R689 R689 is only required is power measurements are planned X01
2 28 HW 5/19/2009 DELL Remove AGND Remove the AGND plane and leave everything as DGND. After discussing
X01
with IDT there is no value having AGND plane if there is no AGND plane
on the IO board and all along the analog signal path.
3 40 HW 5/19/2009 COMPAL Board ID R98 change to 130k ohm X01
4 31 HW 5/21/2009 DELL 5882 support M25 ROM part Add U19 X01
5 15 HW 5/27/2009 Intel ES2 deos not need PU/PD for TRST# Remove R808 & R1316, add test point X01
6 31 HW 6/01/2009 Broadcom Reserve SC_TEST & SCC_CMDVCC_N pad Add @R775 & R776 X01
7 40 HW 6/02/2009 DELL to prefent Q18 to glitch Add R595 100K PD at EN_INVPWR X01
8 34 HW 6/02/2009 DELL for U52-STBY to both EXPRCRD_STBY# Add R684, @R687, depop R683
(Depop 0ohm res) and RUN_ON (Pop 0ohm res) X01
for U52-CPPE to both EXPRCRD_PWREN#
(Depop 0ohm res) and Card JEXP1 CPPE# pin 17
9 15 HW 6/03/2009 Intel Follow DPDG & ES2 request R804 change from 47k to 51 ohm, pop R806 & R1315 X01
10 23 HW 6/03/2009 DELL Fan solution change to M09 design POP R507, R516, R519, R529, depop R531, R534, R535, D94-D96 X01
C 11 23 HW 7/01/2009 SMSC Fan solution change by SMSC request Change R1463 from 0.56 to 0.27 X01 C

12 42 HW 7/01/2009 COMPAL Cost concern & Rdson concern by ADC Change Q61 to AO4456 & Q55/Q183 to SI4164 X01
13 43 HW 7/01/2009 COMPAL for derating concern Change R1001 from 82 to 150 ohm X01
14 8 HW 7/01/2009 Intel Follow CRB by Intel request R1286 needs to change to 0-ohm X01
15 40 HW 7/01/2009 COMPAL Board ID Change R98 to 62K ohm. X02
16 8,12,13, HW 7/13/2009 Intel Intel S3 reduction circuit. Add R1469, R1471-R1474, R1476, R1479-R1484, R1487, C1872-C1879, Q199- X02
42 Q201, Q204-Q207, U141, PJP57, PJP58, PR428, change R624 to 22 ohm, R879
to 1.5K, R880 to 750, pop Q78, add net DDR_HVREF_RST_GATE from U36.A34,
CPU1.5V_S3_GATE from U36.A36, change CPU VDDQ net name to +1.5V_CPU_VDDQ
connect RUN_ON_CPU1.5VS3# to Q78.2 Q204.2,
17 30 HW 7/13/2009 COMPAL +3.3V_LAN enable control follow M09 De-pop R47 X02
18 8,15 HW 7/14/2009 COMPAL Depop all related components where are Depop JXDP1, JXDP2, JDEG1, JP2 circuit X02
located at 0 Z-hight area
19 21 HW 7/14/2009 Intel Add filter for PCH VCCADPLLA/B Add L97,L98,R1488,C1880-C1883, Remove C105, C106 X02
20 19 HW 7/14/2009 Intel GPIO1,6,7 PU if not being used Add R1489-R1491 X02
21 24 HW 7/14/2009 COMPAL Camera need to be changed from 7 to 8 pin Change JEDP1 pin definition X02
B 22 37 HW 7/16/2009 COMPAL JTP1, JBIO1 power gnd pins redefined Change JTP1, JBIO1 pin definition X02 B

23 37,40 HW 7/16/2009 SMSC LAT_ON_SW# needs to be added a 1uF cap Add @C1884, C1885, R1492, change R560 to 100K, JIO.32 change to X02
LAT_ON_SW_BTN#
24 23 HW 7/16/2009 SMSC R594 has to be a group with R3P circuit De-pop R594 for M09 fan solution X02
25 23 HW 7/16/2009 SMSC Request by SMSC R3P Remove D94-D96 X02
26 31 HW 7/17/2009 Braodcom Found both PD R898 and PU R485 pop depopulate R898 for normal operation X02
27 31 HW 7/17/2009 Braodcom RFID disable circuit remove Remove R1062-R1065 X02
28 16 HW 7/17/2009 Intel Intel requires the use of the 25Mhz crystal Populate Y6, C1168(18pF), R379, R685, R381 change to C1169(18pF). X02
on UMA and SG platforms
29 31 HW 7/17/2009 Braodcom +SC_VCC Capacitor (C718) Value Change Broadcom has recommneded changing the value of C718 from .47uF to 220nF X02
30 42 HW 7/17/2009 COMPAL Backdrive EA Failure on Margaux/ASICS Pop R625 and Q79 X02
31 24 HW 7/17/2009 DELL eDP repeater change to SN75DP119. update U46 circuit for eDP repeater X02
32 29 HW 7/17/2009 COMPAL EMI solution C676 to 150pF and R1295 to L4 (220 ohm), R1217 change to 47 ohm, pop X02
C673 & R588
33 23 HW 7/17/2009 COMPAL R3P circuit by SMSC request R536 depop for 3P FAN, R1457 change to 0 ohm, R138 change to 27K ohm X02
34 36,39 HW 7/22/2009 DELL Reconnect the signal UWB_RADIO_DIS# connect UWB_RADIO_DIS# from EC5028.A56 to MINI3.20 X02
A 35 23 HW 7/22/2009 DELL Change FAN solution to M09 De-pop R3P circuit component & pop M09 solution X02 A

36 42 HW 7/23/2009 COMPAL de-rating result fail Change Q61 from AO4456 to NTMS4107 X02
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE-PIR
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 55 of 60
5 4 3 2 1
5 4 3 2 1

V ersion Change L ist ( P. I. R . L ist )


R equest
Item Page# Title D ate O w ner Issue D escription Solution D escription R ev.
D 37 24 HW 7/23/2009 TI eDP repeater DP119 vender review request reserve pop option for X1EDP & DP119, change PU/PD to 20K. X02 D

38 28 HW 7/23/2009 DELL We will never disable the power to HDD Remove R1493 & delete SATA_PWRSAVE X02
redriver, go back connected in SSI
39 18,28,40 HW 7/23/2009 DELL There has been some confusion due to the change net name HDD_FALL_INT1# to HDD_FALL_INT to show correct polarity X02
net name showing active low
40 29 HW 7/24/2009 DELL use the SiTimes part due to the cost savings change X4 from TXC to SiTimes. X02
41 31 HW 7/24/2009 Braodcom connect pin-L10 of U32 to pin-5 of U33, pop R775, de-pop R776 X02
and disconnect pin-D2 from pin-5 of U33
42 33 HW 7/24/2009 COMPAL fixed SD/MMC Clock overshoot and undershoot Changing R8 dumping from 0-ohm to 10-ohm X02
43 31 HW 7/24/2009 Braodcom BCM5880 Leakage Issue on Margaux Add Q208,Q209,R1496 circuit to fix. X02
44 37,39 HW 7/27/2009 DELL ESATA repeater power saving Add a 0 ohm jumper between EN pin and VDD, but no-pop it. Then connect X02
the EN pin to 5028.A47 with a 0 ohm jumper that is popped.
45 39 HW 7/27/2009 DELL Sometimes VGA_ID_DISC and VGA_ID_UMA both Change R875 and R881 to +3.3V_ALW rail. X02
read as low
46 26 HW 7/27/2009 Parade new DP PHY test requirement change R363 value from 499ohm to 1k ohm X02
47 23 HW 7/27/2009 SMSC SMSC review feedback The pull-up source of the R150 should be changed to +VCC_4002 X02
C 48 31 HW 7/27/2009 NXP Better for decoupling noise Change C1015 ,C633 to 10pf X02 C

49 33 HW 7/27/2009 TXC EA result C514, C515 have to change to 22pF X02


50 36 HW 7/27/2009 DELL For PCH GPIOs rail. PCIE_MCARD3_DET# & USB_MCARD1_DET# pull-ups (R458 & R438) need to change X02
from +3.3V_ALW_PCH rail to +3.3V_RUN rail
51 23,40 HW 7/29/2009 SMSC per SMSC 5045 AN 19.6, 4002 AN 16.11 R541, R554, R1492 should be 10K, R147 should be populate, Add R1498 X02
52 35 HW 7/29/2009 DELL Braidwood has been removed from Ibex Peak De-pop JBW1 & R1453 X02
platforms
53 15,40 HW 7/29/2009 KDS KDS crystal EA result change UMA C296 & C297 to 12pF, C674, C675 to 27pF X02
54 39 HW 7/29/2009 DELL GPIO MAP update change net name from RESERVED FOR ESATA to EN_ESATA_RPTR X02
55 42 HW 7/29/2009 Compal By Intel S3 timing concern reserve R1500 & @R1499 0 ohm for Q206.2 from RUN_ON_CPU1.5VS3# X02
& RUN_ON_ENABLE#
56 13,14 HW 7/30/2009 Compal EMI concern POP C1121-C1124, C1145-C1148 X02
57 37 HW 7/30/2009 Intel Intel continues to recommend that all Add @L30, @L31, R424-R427 X02
pre-production and production motherboards
include common mode choke footprints to
enable a stuffing option in case a choke is
B
required to pass EMI testing B

58 31 HW 7/30/2009 Broadcom Broadcom schematic review request pop R537; Remove C647, C641,R634, R498, R898; Add @C1886 & @C1887; X02
Remove L73, R631, C1026, R494, Short net RFREADER_TXN1_PI_R to
RFREADER_RXP_C; Remove C642, C640, change R487, R496 to 0 ohm;
Add @R1501; de-pop R496 & R497; JCS1 pin2 & pin3 and pin4 & pin5
should be short to carry higher current.
59 31 HW 7/30/2009 Compal Solve smart card cage vender reverse pin Reverse JSC1 pin definition X02
definition.
60 27 HW 7/31/2009 Compal CRB EA result C390, C518, C996, C251-C253 to 4.7pF; L61-L63 to 5-Ohm Bead X02
61 31 HW 7/31/2009 Broadcom Broadcom schematic review request The pin1 of R497 and R496 should be connected to GND X02
62 8,15 HW 7/31/2009 Intel For XDP debug concern Populate all the resistors and leave out the connector X02
63 27 HW 8/03/2009 Compal CRB EA result C251-C253 to 3.3pF; L61-L63 to 10-Ohm Bead ; De-pop C996, C518, C390 X02
64 23 HW 8/03/2009 Compal If populate R147 PU resistor for THERM_STP#, De-pop R147 X02
it will impact ALWON signal at MEC 5045
65 30,33 HW 8/04/2009 KDS KDS crystal EA result change UMA C427 change to 200 ohm, C514, C515 back to 15P and change X3 X02
from CL=16pF to CL=12pF
A 66 8 HW 8/05/2009 DELL fix the Intel S3 power up timing change C1877 from 0.01uF to 0.22uF 0402 cap. X02 A

67 21 HW 8/05/2009 Intel WW30 Calpella MoW Intel request change L97 & L98 to 10uH, DCR=0.36 ohm X02
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE-PIR
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 56 of 60
5 4 3 2 1
5 4 3 2 1

V ersion Change L ist ( P. I. R . L ist )


R equest
Item Page# Title D ate O w ner Issue D escription Solution D escription R ev.
D 68 28,37 HW 8/06/2009 Compal Per ESATA/SATA EA result pop R1301, R1304, de-pop R1298, R1308 X02 D

69 10,26,38 HW 8/06/2009 Intel Per Intel check list rev1.6 change R186, R796, R798 from 100k to 110k ohm, R1109 to 3.3K ohm X02
70 28 HW 8/06/2009 Compal ODD_DET# PU from +5V_MOD to +3.3V_RUN connect R1239.1 to +3.3V_RUN & pop R1239 X02
71 42 HW 8/06/2009 SMSC Watch dog timer may not be resetED when Pop R616 to 39 & pop Q72 X02
4002 VDD_PWRGD is not completely at Logic Low
72 30 HW 8/10/2009 Intel Remove the VCT trace Remove @R562, @C41 X02
73 35 HW 8/10/2009 DELL Braidwood Removal on RAM Remove @JBW1, @C1851, @R1452, @R1453, @C1852, R1411 X02
74 31 HW 8/11/2009 Broadcom Broadcom review request Remove @R1061, Change C718 value to 470pF, change C646 value to 220pF. X02
pin2 of R470 should have a 0ohm but de-pop resistor to USB_GPIO27 net.
75 8 HW 8/11/2009 Intel Intel review request add @R1504 for DDR3_DRAMRST#_CPU PD & add C1888 for PM_DRAMRST# to slow X02
down gate of FET
76 33 HW 8/11/2009 Richo Change pop option for R5U242 Change C21 from 10U to 47U, change R46 to C1889 (1uF) X02
77 24 HW 8/12/2009 DELL EDP_HPD signal may too low to turn on FET. Change Q3 to BSS138 X02
78 21 HW 8/12/2009 Intel Follow CRB rev 1.6 schematic No stuff C111 and C112 X02
79 31 HW 8/12/2009 Broadcom Per Broadcom request pop R496 & R497 (0 ohm) X02
80 31 HW 8/12/2009 Compal Smart card EA result change R772 to 47 Ohm for resolving SC_CLK Rise/Fail timing issue X02
C 81 8 HW 8/12/2009 Intel Follow Intel S3 white paper rev0.9 pop R1504 & change C1888 to 470pF X02 C

82 37 HW 8/12/2009 Compal disconnect IO & DOCK VCT rename IO VCT to +LOM_VCT_IO & reserve C712 pad for test. X02
83 31 HW 8/13/2009 Broadcom Per Broadcom request need to have 4.7K pull-up to 3.3V_ALW for BCM5882 pin-C1 "RSTOUT_N" X02
84 8 HW 8/13/2009 DELL Avoid a glitch for DDR_HVREF_RST_GATE, change C1888 to 0.1u, add @R1511 for PM_DRAM_PWRGD_R X02
please add a 1.1K 1% no-stuff pull-up to
+1.5V_CPU_VDDQ rail on the PM_DRAM_PWRGD_R
signal for a back-up option
85 8,45 HW 8/13/2009 DELL CPU detection since the edge diode has been Add R1512 for CPU_DETECT# and connect JCPU.AH24 to U36.B18 X02
removed from M'09
86 37 HW 8/14/2009 DELL Invert the EN_ESATA_RPTR signal and connect Add @R1513 & @Q210, pop R1494 and de-pop R1497, change net name from X02
this to SATAGP4/GPIO16 GPIO16 to EN_ESATA_RPTR#
87 33 HW 8/14/2009 Compal Solve 1394 impedance issue Change R399, R400, R401, R403 to 54.9 ohm. X02
88 37 HW 8/14/2009 Compal EMI solution pop L30 & L31, de-pop R424-R427 X02
89 11,12 HW 9/11/2009 Compal Per PWR EA result De-pop C66, pop C1090, C1091 X02
90 16 HW 9/11/2009 KDS crystal EA result Y6 change to CL=12pF & change C1168 & C1169 to 12pF. X02
91 33,34 HW 9/11/2009 COMPAL EMI solution for SD CLOCK & EXP card USB R8 change to 22 ohm, pop L64 & depop R791, R792 X02
B 92 21 HW 9/11/2009 Intel Intel request de-pop C39, C610 X02 B

93 31 HW 9/11/2009 Broadcom Broadcom review feedback change C718 from 470p to .47u, C646 from 220p to .22u X02
94 30 HW 9/11/2009 Intel Follow Intel document request change R1502 to C427 10pF, C475, C476 to 33pF X02
95 12 HW 9/11/2009 DELL Intel S3 circuitry issue on Margaux UMA change C1873 from 4700p to 0.01uF X02
96 21 HW 10/15/2009 Intel Isolate pins AF32, AF34 and AH34 of PCH Add C1893. X02
97 35 HW 10/23/2009 Compal Add PD 10k for Minicard PWR Add R1523-R1525 X03
98 31 HW 10/23/2009 Compal Smart card connector DFM issue change JSC1 type (the same with Rothschild) X03
99 40 HW 10/23/2009 COMPAL Board ID Change R98 to 4.3K ohm. X03
100 17,21 HW 10/23/2009 Intel Intel schematic check list 2.0 request R268 change from 1k ohm to 10k ohm, de-pop C1881 & C1883 X03
101 40 HW 10/23/2009 SMSC SMSC review feed back R561 and R1046 are too large it is recommend that no PU/PD be larger X03
than 100K
102 12,42 HW 10/23/2009 COMPAL avoid double bleed off +3.3V_M, +3.3V_RUN, +1.5V_CPU_VDDQ power plane discharge circuit have X03
been pop, de-pop R612, R607, R1471.
103 36 HW 10/23/2009 DELL support WiMax LED status Need to populate R840 X03
104 40 HW 10/25/2009 KDS KDS Crystal EA result change C674, C675 from 27pF to 33pF X03
105 16,32 HW 10/25/2009 COMPAL Change R910 placement Please put R910 close to PCH not TCM chip X03
A 106 41 HW 10/25/2009 COMPAL Touch Pad PU need to move from 5V to 3V R613, R614 change power rail from +5V_ALW to +3.3V_ALW X03 A

107 31 HW 10/28/2009 Broadcom For 5882-B0 request L71, L72 68nH, 2%, 400mA; C1070, C1071 1500pF, 2%, 50V; C1886, C1887 X03
150pF, 2%, 50V
DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE-PIR
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 57 of 60
5 4 3 2 1
5 4 3 2 1

V ersion Change L ist ( P. I. R . L ist )


R equest
Item Page# Title D ate O w ner Issue D escription Solution D escription R ev.
D 108 29 HW 10/28/2009 IDT create a low pass filter with the pole set de-pop C1066 & C1067, R1090, R1089 ; R340 & R342, R1091 & R1092 change X03 D

at 36kHz to filter out of band noise to 2k, add C1894-C1897 1000pF.


109 24 HW 10/28/2009 COMPAL EMI concern add 220 ohm bead for BIA_PWM_PCH X03
110 29 HW 10/28/2009 COMPAL ME request for JSPK1 swap JSPK1 Pin 2 and pin 4 swap, pin 3 and pin 5 swap X03
111 17 HW 10/29/2009 COMPAL PCH CRT DDC pin up to 3.8V add CRT DDC level shift, Q217, @R1526, @R1527 X03
112 8,12,13, HW 10/29/2009 DELL MEM SMBus design needs to change Move Q190 connection, add R1528,R1529, add net name DDR_XDP_CLK/DAT X03
15,16,28
113 31 HW 10/29/2009 DELL smart card clock resistor Change R772 from 47 ohm to 22 ohm X03
114 37 HW 10/29/2009 COMPAL EMI concern pop R15 with 10 ohm and C15 with 10pF X03
115 36 HW 10/29/2009 COMPAL USB_MCARD2_DET# change to +3.3V_ALW_PCH R447 pull up should change to +3.3V_ALW_PCH X03
116 40 HW 10/29/2009 COMPAL avoid RESET_OUT# double PD de-pop R5 X03
117 15 HW 11/02/2009 COMPAL EMI, RF team concern pop C300, C302 X03
118 24 HW 11/04/2009 COMPAL LCD power sequencing issue change R161 from 470 to 130 ohm . X03
119 37 HW 11/05/2009 COMPAL EMI concern Change choke vender from Murata to Delta on L30,L31 X03
120 29 HW 11/05/2009 COMPAL RF team concern X4 change from Sitime to TXC X03
121 15 HW 11/05/2009 COMPAL RTC issue Y1 & Y4 change from 30ppm to 10ppm. X03
C 122 15 HW 11/05/2009 COMPAL For flash ROM EOL issue U13 change from W25X32 to W25Q32 X03 C

123 19 HW 11/09/2009 DELL PCH driving the siganl low at GPIO15 initial add R1530 2.2K PU resistor to +3.3V_ALW_PCH on the SIO_EXT_WAKE# signal. X03
124 39 HW 11/10/2009 DELL add a 10K 5% PU to +3.3V_RUN on ME_FWP Add R1531 X03
125 12 HW 11/11/2009 COMPAL Surge voltage found at UMA GFX core R358 changed from 4.7k ohm to 470 ohm X03
126 8,15 HW 11/13/2009 COMPAL To cut redundant trace for SMBUS Add @R1532/R1533/R1536/R1537 X03
127 19 HW 11/17/2009 Intel By Intel check list request Add R1543 & R1544 for PCH GPIO22/34 X03
128 41 HW 12/24/2009 Compal To solve touch pad ESD issue Change L41 and L42 to R1545 & R1546 with 100 ohm. X03
129 29 HW 12/24/2009 Compal RF noise issue concern change Sitime 12MHz oscillator X4 to driver strength 1x X03
130 15 HW 12/24/2009 Intel Follow Intel check list rev2.0 Change R224 to tolerance from 5% to 1% X03
131 36 HW 12/24/2009 DELL Wimax LED abnormal operation. de-pop R1409 X03
132 38 HW 12/24/2009 Compal Simplo battery slice EMI issue Add C1899 and C1898(Depop,reserve for EMI test) A00
133 31 HW 12/24/2009 Braodcom By Broadcom request Change L71,L72 from 68nH to 150nH, C1070,C1071 from 1500pF to A00
390pF.C1887, C1888 from 150pF to 390pF.
134 40 HW 12/30/2009 DELL Board ID Change R98 from 4.3K to 1K for A00 A00
135 33,34 HW 12/30/2009 COMPAL Change R5U242 to rev ES3 Change U94 from ES2 to ES3 A00
136 8,15 HW 12/30/2009 Intel De-pop XDP & JTAG resistor de-pop C19,C20,R6,R7,R68,R19,R3,R1153,R1156,R1157,R66,R1241,R780-R785, A00
B R22,R24,R78,R91,R101-R116,C1375,R69,R118,R123,R804,R807,R805,R806,R1281, B

R1282,R1315
137 24 HW 01/14/2010 COMPAL RF team concern reserve C1900 for PWM A00
138 28,37 HW 01/15/2010 COMPAL Change Esata repeater for power save Change U95 U96 from 412 to 412A A00
139 11 HW 01/18/2010 COMPAL No stuff MLCC caps to fix Acoustic noise de-pop C50, C52, C57, C59 A00
140 15 HW 01/21/2010 COMPAL For factory to do JTAG test Pop R123, R804-R807, R1281, R1282, R1315 A00

A A

DELL CONFIDENTIAL/PROPRIETARY
Compal Electronics, Inc.
Title
PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT EE-PIR
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION, Size Document Number Rev
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD 0.1
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT. LA-5571P
Date: Thursday, January 21, 2010 Sheet 58 of 60
5 4 3 2 1
5 4 3 2 1

V ersion Change L ist ( P. I. R . L ist )


R equest
Item P age# T itle D ate Issue D escription Solution D escription R ev.
O w ner
1 52 Selector 6/1 Compal CD3301 burn issue Change PR262 to 47_ohm, add PC323 0.1uF.
D Add PR409 pull up to +3.3V_ALW2. D

Delete PR266, add PD21 RB751.


2 49 +1.05VTT 6/1 Compal ADC Change high side MOS to power pak Change PQ15 PQ17 to Power pak SIR472DP.
Guangyong

3 47 +0.75_DDR_VT/ 6/1 Compal ADC Add type 3 cap Add PC324 150pF
+1.8V_RUN Guangyong

4 48 +1.05V_VM_UMA 6/1 Compal ADC Add type 3 cap Add PC325 150pF
Guangyong

5 46 1.5V_MEM_UMA 6/1 Compal ADC Add droop resistor and input cap. Add PR410 PC326
Guangyong

change PR78 to 10K_ohm


6 47 +0.75_DDR_VT/ 6/1 Compal ADC optimize ISL8014 change PC81 PC85 PC86 to 10uH unpop PC82
C
+1.8V_RUN Guangyong unpop PR379 pop PR381
C

Compal ADC change PR97 to 10K_ohm


6/1
48 Guangyong optimize ISL8014 change PC115 PC119 PC120 to 10uH unpop PC116
7 +1.05V_VM_UMA unpop PR382 pop PR384

8 50 +VCORE 6/8 Intersil Change Isen resistor to 11K Change PR149 PR167 PR190 to 11K_ohm SD03411028L

9 46 +1.5V_MEM_UMA 6/11 Compal / TI +1.5V_MEM_UMA output voltage over 2V unpop PR56

10 44 +DCIN 6/3 Dell remove PBAT_ALARM# (6/3 Youssef_Daou) delete DP5 PR6

11 50 +VCORE 7/14 Dell / change Cisense GND to VSUM- PC174 PC175 PC176 pin2 connect to VSUM-
intersil
change PL5 from SH00000H90L to SH00000FN0L
Compal ADC change PL6 from SH00000HB0L to SH00000HR0L
12 45 +5V/+3.3V 7/14 change 7*7 & 5*5 choke for cost down
Guangyong change PL11 from SH00000HE0L to SH00000HO0L
B B
change PL14 from SH00000HE0L to SH00000HY0L
13 52 Selector 7/14 TI CSS GC logic wrong issue Add PR427 180_ohm to GND

14 53 ISL62881_UMA 7/16 intersil change Rbias to 47K_ohm change PR292 to 47K_ohm

Add 1M_ohm pull down to fix ACAV_IN_NB


15 52 Selector 7/16 Compal Add PR429
oscillation when battery mode S5

16 50 +VCORE 7/16 intersil change Isense resister to 51K_ohm change PR149 PR167 PR190 to 51K_ohm
17 52 Selector 7/22 TI new version CD3301 (PG2.1) dont need PD21 un-pop PD21 add PR430

18 52 Selector 7/22 TI DOCK_AC_OFF_EC floating issue add PR431

19 53 ISL62881_UMA 7/22 Intersil change frequency to 300K change PR293 to 10K

20 53 ISL62881_UMA 7/22 Intersil change Rsum to 0603 package improve Vout change PR307 from SD03436518L to SD01436518L
accuracy
A
+VCORE / change thermistor from 0603 to 0402 package Change PH2 PH3 from SL200000B0L to SL20000100L A

21 50 / 53 ISL62881_UMA 8/10 Compal for cost down

Title
<Title>

Size Document Number Rev


C <Doc> 3.0

Date: Thursday, January 21, 2010 Sheet 59 of 60


5 4 3 2 1
5 4 3 2 1

V ersion Change L ist ( P. I. R . L ist )


R equest
Item P age# T itle D ate Issue D escription Solution D escription R ev.
O w ner
45 / 49 +5V/+3.3V 8/11 Compal solve EMI issue pop PC32 PC33 PR36 PR39 PL15 PC155 PC165 PC182 PR153 PR173 PR191
D 24 50 / 51 +1.05VTT add PL27 PL28 D

+Vcore
charger

25 50 +Vcore 8/11 intersil / FAE suggestion (8/5) PR175 change to 2.21K_ohm


Gary depop PC190 PR201
26 50 +Vcore 8/11 Compal adjust Vimon change PC171 to 47nF

27 53 ISL62881_UMA 8/13 Intersil FAE suggestion (Kidwell gary) PR307 change to 2k,PR312 change to 2.87k,PR299 change to 10.5k,
(maill from AJ 0813) PC262 change to 0.12uF, PC255 change to 0.015uF,PC266 PR313 depop.

28 45 +5V/+3.3V 8/17 TI/Compal adjust OCP setting Change PR31 from 243K to 232K, PR32 from 232K to 215K

29 44 +DCIN 10/23 TI/Compal slow soft star to fast issue Change PR20 from 0_ohm to 10K.

Change PR124 from 28.7K to 9.31K.


30 49 +1.05VTT 10/23 Intel VTT power good voltage level change
Change PR128 from 10K to 2.74K.

C
pop PC214 1000pF, PR234 4.7_ohm C

31 51 Charger 10/23 Compal EMI EMI solution

ILIM = 30mV, un-pop PR104, PR103=0_ohm,


PR110, PR120=3.01K_ohm ; PR113, PR122=4.99K_ohm ; PR114, PR123=0_ohm
32 49 +1.05VTT 10/23 Maxim fix VTT drop issue Ceq PC132,PC144 =0.15uF ; Filter PC133, PC145=un-pop ; PR115, PR129=0_ohm
REF capacitor PC137 change to 2.2nF
Add PR432, PR433 for dual remote sense

33 51 Charger 10/23 TI Reduce CD3301 pin34 pin 35 peak current Change PR392 to 0805 size.

34 51 Charger 11/10 Compal ACAV_IN_NB level adjust. (10/29) Change PR246 from 21.5K to 22.6K

35 50 +Vcore 11/17 Compal pop PC190 PR201 for improve 2nd source pop PC190 PR201
FDIM
36 53 ISL62881_UMA 11/17 Compal adjust Load Line for 2nd source change PR299 from 10.5K to 9.53K.

37 49 +1.05VTT 01/20 Maxim fix dual palse issue pop filter PC133, PC145=1000p ; PR115, PR129=10_ohm
B B

38 51 Charger 01/20 Compal reduce surge current. (for CD3301) Change PR392 form 0_ohm to 1ohm
change PC199 from 1uF to 0.1uF
39 51 Charger 01/20 Compal EMI can pass without this bead. un-pop PL27
remove for cost saving.

A A

Title
<Title>

Size Document Number Rev


C <Doc> 3.0

Date: Thursday, January 21, 2010 Sheet 60 of 60

5 4 3 2 1

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