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ZS8 LPDDR3 BDW ULT SYSTEM BLOCK DIAGRAM
D

nti a
Memory Down(Channel A/B)

LPDDR3 CH-A Memory Down eDP (4 Lane) eDP redriver 13.3"LVDS


D

e
(FHD/WQHD)
X32 X32 X32 X32 LPDDR3 CH-B Memory Down Parade PS8330B
P21
P14,15 X16 P21

d
USB 3.0 Port 1 HDMI

i
MB USB3.0 Connector USB2.0 Port 0
P24 USB Charger
P23

f
MB USB3.0 Connector Port 1
P24
USB3.0 Port 2
Intel SATA1/PCI-E 5 (4 Lane)
NGFF Connector
P24

n
P22
C C

Touch Screen PORT5 Broadwell U SATA3/PCI-E 6 (4 Lane)


NGFF Connector

o
P25
(15W) P22

CAMERA
P25
PORT6
+ PCI-E 4
NGFF Connector WLan

C
P20
BT
P20 NGFF Connector
PORT4
USB 2.0
PCH-LP
HD-AUDIO Audio CODEC
USB Board PORT3 Realtek ALC283

a
USB2.0 Connector P2~13
P25 P18

t
PORT7

Headset\Mic
Card Reader
GENESYS GL834L BGA1168

DMIC
Speaker
B B

n
(40mm X 24mm)
Micro SD P25

SPI

I2C0
LPC

a
TPM SPI ROM P19 P19 P19

u
8MB
Nuvoton P9
NPCT650 P17
I2C1

PCB STACK UP 8L P25 PS2


EC LED Board USB Board
Touch Pad connector
P25 ITE8380 Power LED Power Bottom
LAYER 1 : TOP

Q
Keyboard connector
P25
Battery LED
LAYER 2 : GND
I2C P25 Hall Sensor
LAYER 3 : IN1
LAYER 4 : IN2 P25
P16 Hall Sensor
A
LAYER 5 : VCC Ambient Light eCompass G & Gyro P21 A

LAYER 6 : IN3 Capella AKM Invensense


CM32180 AK9911 MPU-6500
LAYER 7 : GND
LAYER 8 : BOT Sensor Board
Quanta Computer Inc.
PROJECT : ZS8
Size Document Number Rev

www.vinafix.vn
1A
BLOCK DIAGRAM
Date: Wednesday, August 13, 2014 Sheet 1 of 35
5 4 3 2 1
5 4 3 2 1

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U6A

i a
[23] HDMI_TXN2 HDMI_TXN2 C54 C45 EDP_TXN0 EDP_TXN0 [21]
HDMI_TXP2 C55 DDI1_TXN0 EDP_TXN0 B46 EDP_TXP0

t
[23] HDMI_TXP2 DDI1_TXP0 EDP_TXP0 EDP_TXP0 [21]
[23] HDMI_TXN1 HDMI_TXN1 B58 A47 EDP_TXN1 EDP_TXN1 [21]
D
HDMI_TXP1 C58 DDI1_TXN1 EDP_TXN1 B47 EDP_TXP1 D
[23] HDMI_TXP1 DDI1_TXP1 EDP_TXP1 EDP_TXP1 [21]
[23] HDMI_TXN0 HDMI_TXN0 B55
DDI1_TXN2

n
[23] HDMI_TXP0 HDMI_TXP0 A55 C47 EDP_TXN2 EDP_TXN2 [21]
HDMI_CLKN A57 DDI1_TXP2 EDP_TXN2 C46 EDP_TXP2
[23] HDMI_CLKN DDI1_TXN3 EDP_TXP2 EDP_TXP2 [21]
[23] HDMI_CLKP HDMI_CLKP B57 A49 EDP_TXN3 EDP_TXN3 [21]
DDI1_TXP3 EDP_TXN3

e
B49 EDP_TXP3 EDP_TXP3 [21]
C51 EDP_TXP3
C50 DDI2_TXN0 A45 EDP_AUXN
DDI2_TXP0 EDP_AUXN EDP_AUXN [21]
C53 B45 EDP_AUXP EDP_AUXP [21]

d
B54 DDI2_TXN1 EDP_AUXP
C49 DDI2_TXP1 D20 EDP_RCOMP

i
B50 DDI2_TXN2 EDP_RCOMP A43 DP_UTIL R35 *0_4 EDP_BKLTCL
A53 DDI2_TXP2 EDP_DISP_UTIL R34 *0_4

f
B53 DDI2_TXN3
DDI2_TXP3
+3V3
+VCCIOA_OUT

n
DDI EDP
C R375 10K_4 PCI_PIRQA# C
R74 10K_4 PCI_PIRQB# 1 OF 19 EDP_RCOMP R358 24.9/F_4
R369 10K_4 PCI_PIRQC#

o
R64 10K_4 PCI_PIRQD#
R368 10K_4 TPD_INT#_C
R62 10K_4 GPIO52
U6I BDW_ULT_LPDDR3

B
[21]
[21]
[21]
EDP_BKLTCL
EDP_BKLEN
EDP_VDDEN

ta C EDP_BKLTCL
EDP_BKLEN
EDP_VDDEN

PCI_PIRQA#
B8
A9
C6

U6
EDP_BKLCTL
EDP_BKLEN
EDP_VDDEN

PIRQA/GPIO77
eDP SIDEBAND
DDPB_CTRLCLK
DDPB_CTRLDATA
DDPC_CTRLCLK
DDPC_CTRLDATA
B9

D9
D11
HDMI_DDCCLK
C9 HDMI_DDCDAT
HDMI_DDCCLK
HDMI_DDCDAT
[23]
[23]

n
PCI_PIRQB# P4 C5
PCI_PIRQC# N4 PIRQB/GPIO78 DISPLAY DDPB_AUXN B6
PCI_PIRQD# N2 PIRQC/GPIO79 DDPC_AUXN B5
AD4 PIRQD/GPIO80 DDPB_AUXP A6

a
PME DDPC_AUXP
TPD_INT#_C U7
GPIO52 L1 GPIO55
GPIO52

u
[11] BOARD_ID4 BOARD_ID4 L3 GPIO C8 HDMI_HPD HDMI_HPD [23]
BOARD_ID1 R5 GPIO54 DDPB_HPD A8
[11] BOARD_ID1 GPIO51 DDPC_HPD
[11] BOARD_ID2 BOARD_ID2 L4 D6 EDP_HPD EDP_HPD [21]
GPIO53 EDP_HPD

Q
EDP_HPD R335 100K_4

9 OF 19
+3V3
A
Quanta Computer Inc. A
2

Q20 2N7002K
PROJECT :ZS8
[16,25] TPD_INT# TPD_INT# 3 1 TPD_INT#_C Size Document Number Rev
1A
BDW Processor (DISPLAY)
5 4
www.vinafix.vn 3
Date: Wednesday, August 13, 2014
2
Sheet 2
1
of 35
5 4 3 2 1

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[14]

ti
MA_DQ[0:63]

alMA_DQ[0:63]
MA_DQ0
MA_DQ1
MA_DQ2
MA_DQ3
MA_DQ4
MA_DQ5
MA_DQ6
AH63
AH62
AK63
AK62
AH61
AH60
AK61
U6C

SA_DQ0
SA_DQ1
SA_DQ2
SA_DQ3
SA_DQ4
SA_DQ5
SA_DQ6
BDW_ULT_LPDDR3

SA_CLK#0
SA_CLK0
SA_CLK#1
SA_CLK1

SA_CKE0
SA_CKE1
AU37
AV37
AW36
AY36

AU43
AW43
MA_CLKN0
MA_CLKP0
MA_CLKN1
MA_CLKP1

MA_CKE0
MA_CKE1
MA_CKE[0:3]
MA_CLKN0
MA_CLKP0
MA_CLKN1
MA_CLKP1
MA_CKE[0:3]
[14]
[14]
[14]
[14]
[14]
D

n
MA_DQ7 AK60 AY42 MA_CKE2
MA_DQ8 AM63 SA_DQ7 SA_CKE2 AY43 MA_CKE3
MA_DQ9 AM62 SA_DQ8 SA_CKE3 MA_CS#[0:1]
SA_DQ9 MA_CS#[0:1] [14]
MA_DQ10 AP63 AP33 MA_CS#0
MA_DQ11 AP62 SA_DQ10 SA_CS#0 AR32 MA_CS#1

e
MA_DQ12 AM61 SA_DQ11 SA_CS#1
MA_DQ13 AM60 SA_DQ12 AP32 MA_ODT
SA_DQ13 SA_ODT0 MA_ODT [14]
MA_DQ14 AP61
MA_DQ15 AP60 SA_DQ14
MA_DQ16 AP58 SA_DQ15 AP36
SA_DQ16 LPDDR3_RSVD1

d
MA_DQ17 AR58 AU39
MA_DQ18 AM57 SA_DQ17 LPDDR3_RSVD2 MA_AMA[0:9]
SA_DQ18 MA_AMA[0:9] [14]
MA_DQ19 AK57 AR36 MA_AMA0
SA_DQ19 SA_CAA0

i
MA_DQ20 AL58 AU40 MA_AMA1
MA_DQ21 AK58 SA_DQ20 SA_CAA1 AV40 MA_AMA2
MA_DQ22 AR57 SA_DQ21 SA_CAA2 AY39 MA_AMA3

f
MA_DQ23 AN57 SA_DQ22 SA_CAA3 AW39 MA_AMA4
MA_DQ24 AP55 SA_DQ23 SA_CAA4 AY41 MA_AMA5
MA_DQ25 AR55 SA_DQ24 SA_CAA5 AU41 MA_AMA6
C SA_DQ25 SA_CAA6 C
MA_DQ26 AM54 AW41 MA_AMA7
MA_DQ27 AK54 SA_DQ26 SA_CAA7 AU42 MA_AMA8
SA_DQ27 SA_CAA8

n
MA_DQ28 AL55 AV42 MA_AMA9
MA_DQ29 AK55 SA_DQ28 SA_CAA9 MA_BMA[0:9]
SA_DQ29 MA_BMA[0:9] [14]
MA_DQ30 AR54 AR35 MA_BMA0
MA_DQ31 AN54 SA_DQ30 SA_CAB0 AU34 MA_BMA1
MA_DQ32 AY58 SA_DQ31 SA_CAB1 AW34 MA_BMA2
MA_DQ33 AW58 SA_DQ32 SA_CAB2 AY34 MA_BMA3

o
MA_DQ34 AY56 SA_DQ33 SA_CAB3 AU35 MA_BMA4
MA_DQ35 AW56 SA_DQ34 SA_CAB4 AR38 MA_BMA5
MA_DQ36 AV58 SA_DQ35 SA_CAB5 AV35 MA_BMA6
MA_DQ37 AU58 SA_DQ36 SA_CAB6 AP35 MA_BMA7
MA_DQ38 AV56 SA_DQ37 SA_CAB7 AY37 MA_BMA8
MA_DQ39 AU56 SA_DQ38 SA_CAB8 AU36 MA_BMA9
MA_DQ40 AY54 SA_DQ39 SA_CAB9

C
MA_DQ41 AW54 SA_DQ40 LPDDR3 CHANNEL A
MA_DQ42 AY52 SA_DQ41
MA_DQ43 AW52 SA_DQ42 MA_DQSN[0:7]
SA_DQ43 MA_DQSN[0:7] [14]
MA_DQ44 AV54 AJ61 MA_DQSN0
MA_DQ45 AU54 SA_DQ44 SA_DQSN0 AN62 MA_DQSN1
MA_DQ46 AV52 SA_DQ45 SA_DQSN1 AM58 MA_DQSN2
MA_DQ47 AU52 SA_DQ46 SA_DQSN2 AM55 MA_DQSN3
MA_DQ48 AK40 SA_DQ47 SA_DQSN3 AV57 MA_DQSN4

a
MA_DQ49 AK42 SA_DQ48 SA_DQSN4 AV53 MA_DQSN5
B B
MA_DQ50 AM43 SA_DQ49 SA_DQSN5 AL43 MA_DQSN6
AM45 SA_DQ50 SA_DQSN6 AL48

t
MA_DQ51 MA_DQSN7
MA_DQ52 AK45 SA_DQ51 SA_DQSN7 MA_DQSP[0:7]
SA_DQ52 MA_DQSP[0:7] [14]
MA_DQ53 AK43 AJ62 MA_DQSP0
MA_DQ54 AM40 SA_DQ53 SA_DQSP0 AN61 MA_DQSP1
MA_DQ55 AM42 SA_DQ54 SA_DQSP1 AN58 MA_DQSP2
MA_DQ56 AM46 SA_DQ55 SA_DQSP2 AN55 MA_DQSP3

n
MA_DQ57 AK46 SA_DQ56 SA_DQSP3 AW57 MA_DQSP4
MA_DQ58 AM49 SA_DQ57 SA_DQSP4 AW53 MA_DQSP5
MA_DQ59 AK49 SA_DQ58 SA_DQSP5 AL42 MA_DQSP6
MA_DQ60 AM48 SA_DQ59 SA_DQSP6 AL49 MA_DQSP7 +M_VREF_CA
MA_DQ61 AK48 SA_DQ60 SA_DQSP7 +M_VREF_DQ0

a
MA_DQ62 AM51 SA_DQ61 AP49 +M_VREF_DQ1
MA_DQ63 AK51 SA_DQ62 SM_VREF_CA AR51
SA_DQ63 SM_VREF_DQ0 AP51
SM_VREF_DQ1

u
3 OF 19

A A

Q
Quanta Computer Inc.
PROJECT : ZS8
Size Document Number Rev
1A
BDW Processor (LPDDR3 CHA)
Date: Wednesday, August 13, 2014 Sheet 3 of 35
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

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U6D

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BDW_ULT_LPDDR3

i
MB_DQ[0:63]
[15] MB_DQ[0:63]
MB_DQ0 AY31 AM38 MB_CLKN0 MB_CLKN0 [15]
MB_DQ1 AW31 SB_DQ0 SB_CK#0 AN38 MB_CLKP0 MB_CLKP0 [15]

t
D MB_DQ2 AY29 SB_DQ1 SB_CK0 AK38 MB_CLKN1 D
SB_DQ2 SB_CK#1 MB_CLKN1 [15]
MB_DQ3 AW29 AL38 MB_CLKP1
SB_DQ3 SB_CK1 MB_CLKP1 [15]
MB_DQ4 AV31 MB_CKE[0:3]
SB_DQ4 MB_CKE[0:3] [15]
MB_DQ5 AU31 AY49 MB_CKE0
MB_DQ6 AV29 SB_DQ5 SB_CKE0 AU50 MB_CKE1
SB_DQ6 SB_CKE1

n
MB_DQ7 AU29 AW49 MB_CKE2
MB_DQ8 AY27 SB_DQ7 SB_CKE2 AV50 MB_CKE3
MB_DQ9 AW27 SB_DQ8 SB_CKE3 MB_CS#[0:1]
SB_DQ9 MB_CS#[0:1] [15]
MB_DQ10 AY25 AM32 MB_CS#0
MB_DQ11 AW25 SB_DQ10 SB_CS#0 AK32 MB_CS#1

e
MB_DQ12 AV27 SB_DQ11 SB_CS#1
MB_DQ13 AU27 SB_DQ12 AL32 MB_ODT
SB_DQ13 SB_ODT0 MB_ODT [15]
MB_DQ14 AV25 MB_AMA[0:9]
SB_DQ14 MB_AMA[0:9] [15]
MB_DQ15 AU25 AP45 MB_AMA0
MB_DQ16 AM29 SB_DQ15 SB_CAA0 AU46 MB_AMA1
SB_DQ16 SB_CAA1

d
MB_DQ17 AK29 AW46 MB_AMA2
MB_DQ18 AL28 SB_DQ17 SB_CAA2 AY47 MB_AMA3
MB_DQ19 AK28 SB_DQ18 SB_CAA3 AY46 MB_AMA4
SB_DQ19 SB_CAA4

i
MB_DQ20 AR29 AU49 MB_AMA5
MB_DQ21 AN29 SB_DQ20 SB_CAA5 AU47 MB_AMA6
MB_DQ22 AR28 SB_DQ21 SB_CAA6 AV47 MB_AMA7

f
MB_DQ23 AP28 SB_DQ22 SB_CAA7 AP46 MB_AMA8
MB_DQ24 AN26 SB_DQ23 SB_CAA8 AR46 MB_AMA9
MB_DQ25 AR26 SB_DQ24 SB_CAA9 MB_BMA[0:9]
C SB_DQ25 MB_BMA[0:9] [15] C
MB_DQ26 AR25 AK33 MB_BMA0
MB_DQ27 AP25 SB_DQ26 SB_CAB0 AM33 MB_BMA1
SB_DQ27 SB_CAB1

n
MB_DQ28 AK26 AK35 MB_BMA2
MB_DQ29 AM26 SB_DQ28 SB_CAB2 AM35 MB_BMA3
MB_DQ30 AK25 SB_DQ29 SB_CAB3 AL35 MB_BMA4
MB_DQ31 AL25 SB_DQ30 SB_CAB4 AP42 MB_BMA5
MB_DQ32 AY23 SB_DQ31 SB_CAB5 AM36 MB_BMA6
MB_DQ33 AW23 SB_DQ32 SB_CAB6 AK36 MB_BMA7

o
MB_DQ34 AY21 SB_DQ33 SB_CAB7 AR40 MB_BMA8
MB_DQ35 AW21 SB_DQ34 SB_CAB8 AP40 MB_BMA9
MB_DQ36 AV23 SB_DQ35 SB_CAB9
MB_DQ37 AU23 SB_DQ36
MB_DQ38 AV21 SB_DQ37 LPDDR3 CHANNEL B
MB_DQ39 AU21 SB_DQ38 MB_DQSN[0:7]
SB_DQ39 MB_DQSN[0:7] [15]
MB_DQ40 AY19 AW30 MB_DQSN0

C
MB_DQ41 AW19 SB_DQ40 SB_DQSN0 AV26 MB_DQSN1
MB_DQ42 AY17 SB_DQ41 SB_DQSN1 AN28 MB_DQSN2
MB_DQ43 AW17 SB_DQ42 SB_DQSN2 AN25 MB_DQSN3
MB_DQ44 AV19 SB_DQ43 SB_DQSN3 AW22 MB_DQSN4
MB_DQ45 AU19 SB_DQ44 SB_DQSN4 AV18 MB_DQSN5
MB_DQ46 AV17 SB_DQ45 SB_DQSN5 AN21 MB_DQSN6
MB_DQ47 AU17 SB_DQ46 SB_DQSN6 AN18 MB_DQSN7
MB_DQ48 AR21 SB_DQ47 SB_DQSN7 MB_DQSP[0:7]

a
SB_DQ48 MB_DQSP[0:7] [15]
B MB_DQ49 AR22 AV30 MB_DQSP0 B
MB_DQ50 AL21 SB_DQ49 SB_DQSP0 AW26 MB_DQSP1
AM22 SB_DQ50 SB_DQSP1 AM28

t
MB_DQ51 MB_DQSP2
MB_DQ52 AN22 SB_DQ51 SB_DQSP2 AM25 MB_DQSP3
MB_DQ53 AP21 SB_DQ52 SB_DQSP3 AV22 MB_DQSP4
MB_DQ54 AK21 SB_DQ53 SB_DQSP4 AW18 MB_DQSP5
MB_DQ55 AK22 SB_DQ54 SB_DQSP5 AM21 MB_DQSP6
MB_DQ56 AN20 SB_DQ55 SB_DQSP6 AM18 MB_DQSP7

n
MB_DQ57 AR20 SB_DQ56 SB_DQSP7
MB_DQ58 AK18 SB_DQ57 AR42
MB_DQ59 AL18 SB_DQ58 LPDDR3_RSVD3 AR45
MB_DQ60 AK20 SB_DQ59 LPDDR3_RSVD4
MB_DQ61 AM20 SB_DQ60

a
MB_DQ62 AR18 SB_DQ61
MB_DQ63 AP18 SB_DQ62
SB_DQ63

Qu 4
4 OF 19

3 2
Size

Date:
Document Number
Quanta Computer Inc.
PROJECT : ZS8
BDW Processor (LPDDR3 CHB)
Wednesday, August 13, 2014 Sheet
1
4 of
Rev

35
1A
A

www.vinafix.vn
5 4 3 2 1

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U6B

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BDW_ULT_LPDDR3

i
PROC_DETECT# D61
TP5 PROC_DETECT
CATERR# K61
TP10 N62 CATERR MISC J62
[16] H_PECI H_PECI XDP_PRDY# XDP_PRDY# [26]

t
D PECI PRDY K62 XDP_PREQ# D
PREQ XDP_PREQ# [26]
E60 XDP_TCK_CPU
PROC_TCK XDP_TCK_CPU [9,26]
E61 XDP_TMS_CPU
PROC_TMS XDP_TMS_CPU [26]
[16,27,31] H_PROCHOT# H_PROCHOT# R68 56_4 H_PROCHOT#_R K63 E59 XDP_TRST# XDP_TRST# [9,26]
PROCHOT THERMAL PROC_TRST F63 XDP_TDI_CPU
PROC_TDI XDP_TDI_CPU [26]

n
F62 XDP_TDO_CPU XDP_TDO_CPU [26]
PROC_TDO
H_PWRGOOD C61
PROCPWRGD PWR JTAG
J60 XDP_BPM#0 XDP_BPM#0 [26]

e
BPM#0 H60 XDP_BPM#1
BPM#1 XDP_BPM#1 [26]
H61 XDP_BPM#2
BPM#2 H62 TP7
XDP_BPM#3
BPM#3 TP8
SM_RCOMP_0 AU60 K59 XDP_BPM#4
AV60 SM_RCOMP0 BPM#4 H63 TP11
SM_RCOMP_1 DDR3 XDP_BPM#5
SM_RCOMP1 BPM#5 TP6

d
SM_RCOMP_2 AU61 K60 XDP_BPM#6
AV15 SM_RCOMP2 BPM#6 J61 TP12
CPU_DRAMRST# XDP_BPM#7
TP23 AV61 SM_DRAMRST BPM#7 TP9
DDR_PG_CTRL
SM_PG_CNTL1

fi
2 OF 19

C C

n
DRAM COMP XDP PU/PD

o
+3V3_SUS
+1V2_SUS U7

C58 0.1u/10V_4 5 1

C
VCC NC
R779 +5V_S5
*220K/F_4 2 DDR_PG_CTRL
R142 220K/F_4 A
R439 200/F_4 SM_RCOMP_0
R438 120/F_4 SM_RCOMP_1 DDR_VTTT_PG_CTRL 4 3
[29] DDR_VTTT_PG_CTRL Y GND
R440 100/F_4 SM_RCOMP_2

a
B 74AUP1G07GW B
R782 +1V05_VCCST

t
*2M/F_4
XDP_TDO_CPU R30 51_4

XDP_TCK_CPU R117 51_4

XDP_TRST# R147 *51_4

n
PU/PD of CPU

A
+1V05_VCCST

R69

R28
62_4

10K_4

ua
H_PROCHOT#

H_PWRGOOD
A

Q
Quanta Computer Inc.
PROJECT : ZS8
Size Document Number Rev
1A
BDW Processor (SIDEBAND)
Date: Wednesday, August 13, 2014 Sheet 5 of 35
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

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U6L BDW_ULT_LPDDR3 +VCCIN
32A
L59 C36 C198 22u/6.3V_8
+1V2_SUS +1V2_SUS_VDDQ J58 RSVD VCC C40 C208 22u/6.3V_8
RSVD VCC

a
C44 C203 22u/6.3V_8
R462 *short_8 AH26 VCC C48 C172 22u/6.3V_8
1.1A R461 *short_8 C244 2.2u/10V_4 C252 10u/6.3V_6 AJ31 VDDQ VCC C52 C185 22u/6.3V_8

i
C253 2.2u/10V_4 C223 10u/6.3V_6 AJ33 VDDQ VCC C56 C197 22u/6.3V_8
C227 2.2u/10V_4 C225 10u/6.3V_6 AJ37 VDDQ VCC E23 C199 22u/6.3V_8
C232 2.2u/10V_4 C246 10u/6.3V_6 AN33 VDDQ VCC E25 C200 22u/6.3V_8

t
D C224 10u/6.3V_6 AP43 VDDQ VCC E27 C171 22u/6.3V_8 D
C226 10u/6.3V_6 AR48 VDDQ VCC E29 C170 22u/6.3V_8
AY35 VDDQ VCC E31 C215 22u/6.3V_8
AY40 VDDQ VCC E33 C214 22u/6.3V_8
AY44 VDDQ VCC E35 C217 22u/6.3V_8
VDDQ VCC

n
+VCCIN AY50 E37 C184 22u/6.3V_8
VDDQ VCC E39 C186 22u/6.3V_8
R38 100/F_4 VCC E41 C188 22u/6.3V_8
N58 VCC E43 C169 22u/6.3V_8
VCC_SENSE AC58 RSVD VCC E45 C189 22u/6.3V_8
SVID [31] VCC_SENSE

e
RSVD VCC E47 C190 22u/6.3V_8
+VCCIO_OUT E63 VCC E49 C191 22u/6.3V_8
+VCCIOA_OUT AB23 VCC_SENSE VCC E51 C204 22u/6.3V_8
A59 RSVD VCC E53 C182 22u/6.3V_8
+1V05_VCCST E20 VCCIO_OUT VCC E55 C181 22u/6.3V_8
VCCIOA_OUT VCC

d
AD23 E57 C183 22u/6.3V_8
R84 75_4 AA23 RSVD VCC F24 C201 *22u/6.3V_8
VR_SVID_ALERT# R83 43_4 H_CPU_SVIDART# AE59 RSVD VCC F28 C168 *22u/6.3V_8
[31] VR_SVID_ALERT# RSVD VCC

i
F32 C167 *22u/6.3V_8
VR_SVID_CLK R91 *short_4 H_CPU_SVIDCLK H_CPU_SVIDART# L62 VCC F36 C209 *22u/6.3V_8
[31] VR_SVID_CLK VIDALERT VCC
H_CPU_SVIDCLK N63 F40 C216 *22u/6.3V_8

f
+1V05_VCCST H_CPU_SVIDDAT L63 VIDSCLK VCC F44 C202 *22u/6.3V_8
VCCST_PWRGD B59 VIDSOUT HSW ULT POWER VCC F48
[26] VCCST_PWRGD VCCST_PWRGD VCC
R78 130/F_4 [31] VRON_CPU VRON_CPU F60 F52
C VR_EN VCC C
VR_SVID_DATA R77 *short_4 H_CPU_SVIDDAT IMVP_PWRGD C59 F56
[31] VR_SVID_DATA [11,31] IMVP_PWRGD VR_READY VCC F59
VCC

n
D63 G23
PWR_DEBUG R31 *short_4PWR_DEBUG_R H59 VSS VCC G25
+1V05_VCCST [26] PWR_DEBUG PWR_DEBUG VCC
P62 G27
+1V05_VCCST P60 VSS VCC G29
R17 *10K_4 VRON_CPU P61 RSVD_TP VCC G31
R42 150_4 N59 RSVD_TP VCC G33

o
R37 N61 RSVD_TP VCC G35
T59 RSVD_TP VCC G37
AD60 RSVD VCC G39
10K_4 AD59 RSVD VCC G41
AA59 RSVD VCC G43
IMVP_PWRGD AE60 RSVD VCC G45
AC59 RSVD VCC G47

C
AG58 RSVD VCC G49
100mA U59 RSVD
RSVD
VCC
VCC
G51
V59 G53
RSVD VCC G55
+1V05 +VCCIO_OUT +1V05 +1V05_VCCST +1V05_VCCST AC22 VCC G57
AE22 VCCST VCC H23
R36 *0_4 R1 *short_8 AE23 VCCST VCC J23
VCCST VCC K23

a
C207 +VCCIN AB57 VCC K57
B B
AD57 VCC VCC L22
AG57 VCC VCC M23

t
*4.7u/6.3V_6 C24 VCC VCC M57
C28 VCC VCC P57
C32 VCC VCC U57
VCCST PWRGD VCC VCC
VCC
W57

n
12 OF 19

+3V3_S5 U3

a
C2 0.1u/10V_4 5 1
VCC NC R16 *0_4 HWPG_1.05V_S5
+1V05_VCCST HWPG_1.05V_S5 [16,26,30]
2 VCCST_PWRGD_EN R9 *0_4 APWORK APWORK [8,16]
R8 10K_4 A

u
R13 0_4 PCH_PWROK PCH_PWROK [8,16]
VCCST_PWRGD R7 VCCST_PWRGD_R
*short_4 4 3
Y GND
C20 *0.1u/10V_4
74AUP1G07GW

A A

Q
Quanta Computer Inc.
PROJECT : ZS8
Size Document Number Rev
1A
BDW Processor (POWER)
Date: Wednesday, August 13, 2014 Sheet 6 of 35
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

l
U6S BDW_ULT_LPDDR3

i a
[26] CFG0 CFG0 AC60 AV63
CFG1 AC62 CFG0 RSVD_TP AU63
[26] CFG1

t
D CFG2 AC63 CFG1 RSVD_TP D
[26] CFG2 CFG2
CFG3 AA63
[26] CFG3 CFG3
CFG4 AA60 C63
[9,26] CFG4 CFG4 RSVD_TP
[26] CFG5 CFG5 Y62 C62
CFG6 Y61 CFG5 RSVD_TP B43
[26] CFG6 CFG6 RSVD

n
[26] CFG7 CFG7 Y60
CFG8 V62 CFG7 A51
[26] CFG8 CFG8 RSVD_TP
CFG9 V61 B51
[26] CFG9 CFG9 RSVD_TP
[26] CFG10 CFG10 V60
CFG11 U60 CFG10 L60
[26] CFG11

e
CFG12 T63 CFG11 RSVD_TP
[26] CFG12 CFG12
CFG13 T62 RESERVED N60
[26] CFG13 CFG13 RSVD
CFG14 T61
[26] CFG14 CFG14
[26] CFG15 CFG15 T60 W23
CFG15 RSVD Y22
RSVD

d
NOA_STBN_0 AA62 AY15 OPI_COMP1 R187 49.9/F_4
[26] NOA_STBN_0 U63 CFG16 PROC_OPI_RCOMP
NOA_STBN_1
[26] NOA_STBN_1 AA61 CFG18 AV62
NOA_STBP_0
[26] NOA_STBP_0 CFG17 RSVD

i
NOA_STBP_1 U62 D58
[26] NOA_STBP_1 CFG19 RSVD
R111 49.9/F_4 CFG_RCOMP V63 P22

f
CFG_RCOMP VSS N21
A5 VSS
RSVD P20
C RSVD C
E1 R20
D1 RSVD RSVD
RSVD

n
J20
H18 RSVD
R338 8.2K_4 TD_IREF B12 RSVD
TD_IREF
19 OF 19

Processor Strapping
CFG0

Co
EAR-STALL/NOT STALL RESET SEQUENCE
AFTER PCU PLL IS LOCKED
CFG1
PCH/ PCH LESS MODE SELECTION
(DEFAULT) NORMAL OPERATION; NO STALL

(DEFAULT) NORMAL OPERATION


1

STALL

PCH-LESS MODE
0

CFG0

CFG1
R106

R105
*1K_4

*1K_4

a
B B

t
CFG3 DISABLED ENABLED CFG3 R104 *1K_4
PHYSICAL_DEBUG_ENABLED (DFX PRIVACY) NO PHYSICAL DISPLAY PORT ATTACHED AN EXTERNAL DISPLAY PORT DEVICE IS
TO CONNECTED
EMBEDDED DISPLAY PORT TO THE EMBEDDED DISPLAY PORT

n
CFG 8 DISABLED(DEFAULT); IN THIS CASE, NOA ENABLED; NOA WILL BE AVAILABLE
ALLOW THE USE OF NOA ON LOCKED UNITS WILL BE DISABLED IN LOCKED UNITS AND REGARDLESS OF THE LOCKING OF THE UNIT CFG8 R100 *1K_4
ENABLED IN UN-LOCKED UNITS

a
CFG9 NO VR SUPPORTING SVID IS PRESENT. THE

u
VRS SUPPORTING SVID PROTOCOL ARE CFG9 R112 *1K_4
NO SVID PROTOCOL CAPABLE VR CHIP WILL NOT GENERATE (OR RESPOND TO)
CONNECTED PRESENT SVID ACTIVITY

A A
CFG10 POWER FEATURES ACTIVATED POWER FEATURES (ESPECIALLY CLOCK

Q
CFG10 R96 *1K_4
SAFE MODE BOOT DURING RESET GATINE ARE NOT ACTIVATED
Quanta Computer Inc.
PROJECT : ZS8
Size Document Number Rev
1A
BDW Processor (CFG)
Date: Wednesday, August 13, 2014 Sheet 7 of 35
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

D
[16]

[26]
PCH_SUSACK#

SYS_RESET#
PCH_SUSACK#

SYS_RESET#
SYS_PWROK

EC_PWROK

t
PCI_PLTRST#

i
PCH_SUSPWRACK

al
R108
R115
R109
0_4
*0_4
*0_4
Deep Sx
R119
R120

R183
R393
*0_4
*0_4

*0_4
*0_4
SUSACK#_R

SYS_PWROK_R
EC_PWROK_R
APWROK_R
AK2
AC3
AG2
AY7
AB5
AG7
U6H

SUSACK
SYS_RESET
SYS_PWROK
PCH_PWROK
APWROK
PLTRST
BDW_ULT_LPDDR3

SYSTEM POWER MANAGEMENT

DSWVRMEN
DPWROK
WAKE

CLKRUN/GPIO32
AW7 DSWVREN
AV5 DPWROK_R
AJ5 PCIE_WAKE_WLAN#

V5 CLKRUN#
R190
Deep Sx
*0_4 DPWROK
DSWVREN [9]
DPWROK [16]
PCIE_WAKE_WLAN#

CLKRUN# [16,17]
[20]
D

n
AG4 PCH_STAT
SUS_STAT/GPIO61 AE6 TP21
PCH_SUSCLK
SUSCLK/GPIO62 AP5 TP20
PCH_SLP_S5# PCH_SLP_S5# [26]
RSMRST# R182 *short_4 PCH_RSMRST# AW6 SLP_S5/GPIO63
[16] RSMRST# RSMRST
[16] PCH_SUSPWARN# PCH_SUSPWARN# R166 *0_4 PCH_SUSPWRACK AV4

e
DNBSWON# R464 *short_4 PCH_PWRBTN# AL7 SUSWARN/SUSPWRDNACK/GPIO30 AJ6 SUSC#
[16] DNBSWON# PWRBTN SLP_S4 SUSC# [16,26]
ACPRESENT R416 *short_4 PCH_ACPRESENT AJ8 AT4 SUSB#
[27] ACPRESENT ACPRESENT/GPIO31 SLP_S3 SUSB# [16,26]
PCH_BATLOW# AN4 AL5 PCH_SLP_A#
BATLOW/GPIO72 SLP_A PCH_SLP_A# [26]
[26] PCH_SLP_S0# PCH_SLP_S0# AF3 AP4 PCH_SLP_SUS# PCH_SLP_SUS# [16]
PCH_SLP_WLAN# AM5 SLP_S0 SLP_SUS AJ7
TP22 SLP_WLAN/GPIO29 SLP_LAN

i d
8 OF 19

f
C C

Power Sequence PCH PM PU/PD

n
+3V3
PCH_PWROK R184 0_4 EC_PWROK_R APWORK R394 0_4 APWROK_R
[6,16] PCH_PWROK
R191 100K_4
[6,16] APWORK
R395 10K_4 Speed up 250ms to boot up SYS_RESET# R485 10K_4
for EC power on 250 ms CLKRUN# R371 8.2K_4

o
EC_PWROK R107 *0_4 SYS_PWROK_R
C47 *1u/6.3V_4 RSMRST# R181 0_4 DPWROK_R
PCH_RSMRST# R172 10K_4
Non Deep Sx SYS_PWROK R192 *10K_4
DPWROK_R R169 100K_4

C
Deep Sx Circuit PLTRST# Buffer
+3V3_S5

PCH_SUSPWRACK R167 10K_4

a
B
+3V3 B
Non Deep Sx

t
C71 0.1u/10V_4
DSW PU

5
R458 0_6 U18 +3V3_S5
2
+3V3_S5 Q13 +3V3_S5_DEEP 4 PLTRST# PCH_ACPRESENT R418 10K_4
PLTRST# [16,17,20,22,26]
PCI_PLTRST# 1 PCH_BATLOW# R429 8.2K_4

n
1 3 PCIE_WAKE_WLAN# R410 1K_4
TC7SH08FU R189 100K_4 PCH_PWRBTN# R445 *10K_4

3
C248 R450 *AO3413 +3V3_PCU
2

a
R417 *10K_4
*0.1u/10V_4 *100K_4 R428 *8.2K_4
R409 *1K_4
R455 *10K_4
3

+3V3_S5

u
Q14
C73 *0.1u/10V_4
PCH_SLP_SUS# 2 5
U20
IMVP_PWRGD_3V 2
[11] IMVP_PWRGD_3V
*2N7002K Deep Sx 4 SYS_PWROK SYS_PWROK [26]
A EC_PWROK 1 A
[16] EC_PWROK
1

R484 10K_4

Q
TC7SH08FU R193
3

*0_4
Quanta Computer Inc.
IMVP_PWRGD_3V
PROJECT : ZS8
Size Document Number Rev
1A
BDW PCH (PM)
Date: Wednesday, August 13, 2014 Sheet 8 of 35
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

l
U6E BDW_ULT_LPDDR3

+3V3_RTC RTC_X1 AW5


RTC_X2 AY5 RTCX1
R465 1M_4 SM_INTRUDER# AU6 RTCX2 J5 PEG_RXN6_L3

a
INTRUDER SATA_RN0/PERN6_L3 PEG_RXN6_L3 [22]
PCH_INTVRMEN AV7 H5 PEG_RXP6_L3
AV6 INTVRMEN RTC SATA_RP0/PERP6_L3 B15 PEG_RXP6_L3 [22]
SRTC_RST# PEG_TXN6_L3
SRTCRST SATA_TN0/PETN6_L3 PEG_TXN6_L3 [22]
RTC_RST# AU7 A15 PEG_TXP6_L3
[26] RTC_RST# RTCRST SATA_TP0/PETP6_L3 PEG_TXP6_L3 [22]

i
J8 SATA_RXN1/PEG_RXN6_L2 U6G BDW_ULT_LPDDR3
SATA_RN1/PERN6_L2 SATA_RXN1/PEG_RXN6_L2 [22]
H8 SATA_RXP1/PEG_RXP6_L2
SATA_RP1/PERP6_L2 A17 SATA_RXP1/PEG_RXP6_L2 [22] AU14 AN2
SATA_TXN1/PEG_TXN6_L2 [16,17,20] LPC_LAD0 LPC_LAD0 SMBALERT#
SATA_TN1/PETN6_L2 SATA_TXN1/PEG_TXN6_L2 [22] LAD0 SMBALERT/GPIO11
B17 SATA_TXP1/PEG_TXP6_L2 [16,17,20] LPC_LAD1 LPC_LAD1 AW12 AP2 SMB_PCH_CLK
SATA_TP1/PETP6_L2 SATA_TXP1/PEG_TXP6_L2 [22] LAD1 SMBCLK

t
LPC_LAD2 AY12 LPC AH1 SMB_PCH_DAT
[16,17,20] LPC_LAD2 LAD2 SMBDATA
HDA_BCLK_R AW8 J6 PEG_RXN6_L1 [16,17,20] LPC_LAD3 LPC_LAD3 AW11 AL2 SMB0ALERT#
D HDA_BCLK/I2S0_SCLK SATA_RN2/PERN6_L1 PEG_RXN6_L1 [22] LAD3 SML0ALERT/GPIO60 D
HDA_SYNC_R AV11 H6 PEG_RXP6_L1 LPC_LFRAME# AV12 SMBUS AN1 SMBCLK0
HDA_SYNC/I2S0_SFRM SATA_RP2/PERP6_L1 PEG_RXP6_L1 [22] [16,17,20] LPC_LFRAME# LFRAME SML0CLK
HDA_RST#_R AU8 B14 PEG_TXN6_L1 AK1 SMBDATA0
HDA_RST/I2S_MCLK SATA_TN2/PETN6_L1 PEG_TXN6_L1 [22] SML0DATA
[18] PCH_AZ_CODEC_SDIN0 PCH_AZ_CODEC_SDIN0 AY10 C15 PEG_TXP6_L1 AU4 SMB1ALERT#
AU12 HDA_SDI0/I2S0_RXD SATA_TP2/PETP6_L1 PEG_TXP6_L1 [22] SML1ALERT/PCHHOT/GPIO73 AU3 SMB_ME1_CLK
HDA_SDO_R AU11 HDA_SDI1/I2S1_RXD AUDIO SATA F5 SATA_RXN3/PEG_RXN6_L0 SML1CLK/GPIO75 AH3 SMB_ME1_DAT
HDA_SDO/I2S0_TXD SATA_RN3/PERN6_L0 SATA_RXN3/PEG_RXN6_L0 [22] SML1DATA/GPIO74
AW10 E5 SATA_RXP3/PEG_RXP6_L0 PCH_SPI_CLK AA3

n
AV10 HDA_DOCK_EN/I2S1_TXD SATA_RP3/PERP6_L0 C17 SATA_RXP3/PEG_RXP6_L0 [22] Y7 SPI_CLK AF2
SATA_TXN3/PEG_TXN6_L0 PCH_SPI_CS0#
HDA_DOCK_RST/I2S1_SFRM SATA_TN3/PETN6_L0 SATA_TXN3/PEG_TXN6_L0 [22] SPI_CS0 CL_CLK
AY8 D17 SATA_TXP3/PEG_TXP6_L0 Y4 AD2
I2S1_SCLK SATA_TP3/PETP6_L0 SATA_TXP3/PEG_TXP6_L0 [22] AC2 SPI_CS1 CL_DATA AF4
SPI C-LINK
PCH_SPI_SI AA2 SPI_CS2 CL_RST
V1 NGFF0_DET_C R86 *0_4 PCH_SPI_SO AA4 SPI_MOSI
SATA0GP/GPIO34 U1 NGFF1_DET_C R85 *0_4 PCH_SPI_IO2 Y6 SPI_MISO
SATA1GP/GPIO35 SPI_IO2

e
V6 NGFF2_DET_C R376 0_4 PCH_SPI_IO3 AF1
SATA2GP/GPIO36 AC1 NGFF3_DET_C R229 0_4 NGFF3_DET SPI_IO3
SATA3GP/GPIO37 NGFF3_DET [22]
[5,26] XDP_TRST# XDP_TRST# AU62
XDP_TCK_PCH AE62 PCH_TRST A12 SATA_IREF R337 *short_4
[26] XDP_TCK_PCH PCH_TCK SATA_IREF +1V05_ASATA3PLL
XDP_TDI_PCH AD61 L11
[26] XDP_TDI_PCH PCH_TDI RSVD +3V3
[26] XDP_TDO_PCH XDP_TDO_PCH AE61 K10
XDP_TMS_PCH AD62 PCH_TDO JTAG RSVD C12 SATA_RCOMP R336 3.01K/F_4
[26] XDP_TMS_PCH 7 OF 19
AL11 PCH_TMS SATA_RCOMP U3 SATA_LED# R82 10K_4

d
AC4 RSVD SATALED
XDP_TCK_CPU AE63 RSVD
[5,26] XDP_TCK_CPU JTAGX
AV2
RSVD_AV2

fi
5 OF 19

PCH_AZ_CODEC_RST# R457 33_4 HDA_RST#_R


RTC Clock 32.768KHz HDA [18] PCH_AZ_CODEC_RST#
SMBus

n
[18] PCH_AZ_CODEC_SDOUT PCH_AZ_CODEC_SDOUT R470 33_4 HDA_SDO_R

C [18] PCH_AZ_CODEC_BITCLK PCH_AZ_CODEC_BITCLK R180 33_4 HDA_BCLK_R C


C70 *10p/50V_4
C65 15p/50V_4 RTC_X1 +3V3
1

Y2 R173 PCH_AZ_CODEC_SYNC R185 33_4 HDA_SYNC_R

o
[18] PCH_AZ_CODEC_SYNC
C69 *10p/50V_4 R131 R121
Q10
32.768KHZ 10M_4 5
*4.7K_4 *4.7K_4
SMB_PCH_CLK 3 4 CLK_SCLK CLK_SCLK [14,26]
2

C66 15p/50V_4 RTC_X2


Pull Up/Down PCH JTAG
2

SMB_PCH_DAT 6 1 CLK_SDATA

C
+3V3 CLK_SDATA [14,26]

NGFF2_DET_C R377 ST@10K_4 *2N7002DW


RTC Circuitry (RTC) NGFF0_DET_C R87 ST@10K_4 PCH LPDDR3/Debug
NGFF3_DET_C R97 *ST@10K_4
NGFF1_DET_C R80 ST@10K_4

+3V3_PCU +1V05_S5
+3V3_RTC
+VCC_RTC R492 *short_4 VRTC1 D7 XDP_TMS_PCH R122 51_4

a
R459 20K/F_4 RTC_RST# XDP_TDI_PCH R123 51_4 +3V3_S5
R501 1K_4 VRTC2 XDP_TDO_PCH R124 51_4
1

BAT54C C249 J2 XDP_TCK_CPU R125 *1K_4


SMBus
1

BT1

t
+3V3_S5 XDP_TCK_PCH R118 *51_4 R134 R140
1u/6.3V_4 *JUMP Q11
2

BAT_CONN SMB0ALERT# R127 10K_4 5


2

SMB1ALERT# R164 10K_4 JTAG_TCK,JTAG_TMS *2.2K_4 *2.2K_4


SMBALERT# R141 10K_4 2ND_MBCLK 3 4 SMB_ME1_CLK
R174 20K/F_4 SRTC_RST#
Trace Length < 9000mils [16,25] 2ND_MBCLK

B B

n
C264 C67 2
SMB_PCH_CLK R130 2.2K_4
SMB_PCH_DAT R126 2.2K_4 [16,25] 2ND_MBDATA 2ND_MBDATA 6 1 SMB_ME1_DAT
1u/6.3V_4 1u/6.3V_4 SMBDATA0 R116 2.2K_4
SMBCLK0 R145 2.2K_4
EC (S5) *2N7002DW PCH (S5)

a
R139 0_4
R135 0_4

ULT Strapping Table


Pin Name Strap description Sampled Configuration Pull Up/Down

u
PCH Quad SPI ROM(8M) (CPU)
+3V3
No reboot on TCO Timer 0 = Default enable (iPD 20K)
GPIO81(SPKR) expiration PWROK R88 *1K_4 SPKR
1 =Disable No-Reboot mode SPKR [11,18] +3V3_S5_SPI

R482 10K_4 +3V3_S5_SPI +3V3_S5


Flash Descriptor Security 0 = Default can program ME (iPD 20K) HDA_SDO_R ME_WR# SPI_CS0#_UR_ME PCH_SPI_CS0#
HDA_SDO PWROK R456 *short_4 R487 *short_4
Override / Intel ME Debug Mode ME_WR# [16] [16] SPI_CS0#_UR_ME
U19 R463 *short_4
1 =can't program ME PCH_SPI_CS0# 1 8 C254 0.1u/10V_4

Q
PCH_SPI_CLK_R 6 CE# VDD
+3V3_RTC PCH_SPI_SO_EC R489 *short_4 PCH_SPI_SI_R 5 SCK
[16] PCH_SPI_SO_EC SI
INTVRMEN Integrated 1.05V VRM enable ALWAYS 1=Should be always pull-up PCH_SPI_SO R486 15_4 PCH_SPI_SO_R PCH_SPI_SO_R 2 7 SPI_HOLD_IO3_ME
R179 330K_4 PCH_INTVRMEN SO HOLD#
+3V3_S5_SPI SPI_WP_IO2_ME 3 4
WP# VSS
+3V3 R478 *1K_4 W25Q64FV -- 8MB
0 = Default disable (iPD 20K) PCH_SPI_IO2 R475 15_4 SPI_WP_IO2_ME
GPIO66 Top-Block Swap override R20 *1K_4 GPIO66
1 = Enable TBS function GPIO66 [11]

[16] PCH_SPI_SI_EC PCH_SPI_SI_EC R447 *short_4 Vendor Vendor P/N Quanta P/N
+3V3 PCH_SPI_SI R175 15_4 PCH_SPI_SI_R Winbond W25Q64FVSSIQ AKE3EFP0N07
A 0 = Default SPI (iPD 20K) A
GPIO86 Boot BIOS Strap Bit EON EN25QH64-104HIP AKE3EZN0Q01
1 =LPC R345 *1K_4 GPIO86 GPIO86 [11] GD GD25B64BSIGR AKE3EGN0Q01
[16] PCH_SPI_CLK_EC PCH_SPI_CLK_EC R448 *short_4
0 = Default enable w/o confidentiality PCH_SPI_CLK R176 15_4 PCH_SPI_CLK_R
+3V3_S5 C68 *22p/50V_4
(iPD 20K)
GPIO15 TLS(Transport layer security) R403 8.2K_4 GPIO15
1 =Default enable with confidentiality GPIO15 [11]
+3V3_S5_SPI
0 = Enable an external display R103 1K_4 CFG4
CFG4 DP presence strap port is connected to the eDP CFG4 [7,26]
PCH_SPI_IO3
R177
R449
*1K_4
15_4 SPI_HOLD_IO3_ME
Quanta Computer Inc.
1 =disable
PROJECT : ZS8
Deep Sx well on die VR enable +3V3_RTC Size Document Number Rev
DSWVREN 1=Should be always pull-up

www.vinafix.vn
1A
R178 330K_4 DSWVREN BDW PCH(RTC/HDA/SATA/SPI)
DSWVREN [8]
Date: Wednesday, August 13, 2014 Sheet 9 of 35
5 4 3 2 1
5 4 3 2 1

l
U6K BDW_ULT_LPDDR3

a
F10 AN8
PEG_RXN5_L0 USB2N0
MB USB3.0

i
[22] PEG_RXN5_L0 PERN5_L0 USB2N0 USB2N0 [24]
[22] PEG_RXP5_L0 PEG_RXP5_L0 E10 AM8 USB2P0 USB2P0 [24]
PERP5_L0 USB2P0
C23 AR7
[22] PEG_TXN5_L0 PEG_TXN5_L0 USB2N1 USB2N1 [24]
MB USB3.0

t
PEG_TXP5_L0 C22 PETN5_L0 USB2N1 AT7 USB2P1
[22] PEG_TXP5_L0 PETP5_L0 USB2P1 USB2P1 [24]
D D
[22] PEG_RXN5_L1 PEG_RXN5_L1 F8 AR8
PEG_RXP5_L1 E8 PERN5_L1 USB2N2 AP8
[22] PEG_RXP5_L1 PERP5_L1 USB2P2
B23 AR10
PEG_TXN5_L1 USB2N3
DB USB2.0

n
[22] PEG_TXN5_L1 PETN5_L1 USB2N3 USB2N3 [25]
A23 AT10
NGFF [22] PEG_TXP5_L1 PEG_TXP5_L1

H10
PETP5_L1 USB2P3
AM15
USB2P3 USB2P3 [25]

SSD0 [22]
[22]
PEG_RXN5_L2
PEG_RXP5_L2
PEG_RXN5_L2
PEG_RXP5_L2 G10 PERN5_L2
PERP5_L2
USB2N4
USB2P4
AL15
USB2N4
USB2P4
USB2N4
USB2P4
[20]
[20] BlueTooth

e
B21 AM13
[22]
[22]
PEG_TXN5_L2
PEG_TXP5_L2
PEG_TXN5_L2
PEG_TXP5_L2 C21 PETN5_L2
PETP5_L2
USB2N5
USB2P5
AN13
USB2N5
USB2P5
USB2N5
USB2P5
[25]
[25] Touch Screen
E6 AP11
[22]
[22]
PEG_RXN5_L3
PEG_RXP5_L3
PEG_RXN5_L3
PEG_RXP5_L3 F6 PERN5_L3
PERP5_L3
USB2N6
USB2P6
AN11
USB2N6
USB2P6
USB2N6
USB2P6
[25]
[25] CCD

d
B22 AR13
[22]
[22]
PEG_TXN5_L3
PEG_TXP5_L3
PEG_TXN5_L3
PEG_TXP5_L3 A21 PETN5_L3
PETP5_L3
USB2N7
USB2P7
AP13
USB2N7
USB2P7
USB2N7
USB2P7
[25]
[25] Card Reader

i
G11
F11 PERN3 G20 USB3_RXN1
PERP3 USB3RN1 USB3_RXN1 [24]
H20 USB3_RXP1 USB3_RXP1 [24]

f
C29 USB3RP1
B30 PETN3
PETP3
PCIE USB
USB3TN1
C33
B34
USB3_TXN1
USB3_TXP1
USB3_TXN1 [24] MB USB3.0
USB3TP1 USB3_TXP1 [24]
[20] PEG_RXN4 PEG_RXN4 F13
PEG_RXP4 G13 PERN4 E18 USB3_RXN2
[20] PEG_RXP4 PERP4 USB3RN2 USB3_RXN2 [24]
F18
WLan USB3_RXP2

n
USB3RP2 USB3_RXP2 [24]
B29
C [20]
[20]
PEG_TXN4
PEG_TXP4
PEG_TXN4
PEG_TXP4
C19
C18
0.1u/10V_4
0.1u/10V_4
R_PEG_TXN4
R_PEG_TXP4 A29 PETN4
PETP4 USB3TN2
B33
A33
USB3_TXN2
USB3_TXP2
USB3_TXN2 [24] MB USB3.0 C

USB3TP2 USB3_TXP2 [24]


G17
F17 PERN1/USB3RN3
PERP1/USB3RP3

o
C30
C31 PETN1/USB3TN3 AJ10 USBCOMP R437 22.6/F_4
PETP1/USB3TP3 USBRBIAS AJ11
F15 USBRBIAS AN10
G15 PERN2/USB3RN4 RSVD AM10
PERP2/USB3RP4 RSVD
B31 +3V3_S5

C
A31 PETN2/USB3TN4
PETP2/USB3TP4 AL3 USB_OC0# USB_OC0# R132 10K_4
OC0/GPIO40 USB_OC0# [24]
AT1 USB_OC1# USB_OC1# [25] USB_OC1# R153 10K_4
OC1/GPIO41 AH2 USB_OC2# USB_OC2# R114 10K_4
+1V05_AUSB3PLL E15 OC2/GPIO41 AV3 USB_OC3# USB_OC3# R155 10K_4
E13 RSVD OC3/GPIO43
R43 3.01K/F_4 PCIE_RCOMP A27 RSVD
R44 *short_4 PCIE_IREF B27 PCIE_RCOMP
PCIE_IREF

ta
11 OF 19 XTAL24_IN C17 12p/50V_4

3
4
R41 Y1
B B

n
1M_4 24MHz

1
2
XTAL24_OUT C16 12p/50V_4
U6F

a
BDW_ULT_LPDDR3

R188 TPM@22_4 CLK_PCI_TPM CLK_PCI_TPM [17]


+3V3 C43 A25 XTAL24_IN C72 *18p/50V_4

u
C42 CLKOUT_PCIE_N0 XTAL24_IN B25 XTAL24_OUT
R76 10K_4 CLK_PCIE_REQ0# CLK_PCIE_REQ0# U2 CLKOUT_PCIE_P0 XTAL24_OUT
R93 10K_4 CLK_PCIE_REQ1# PCIECLKRQ0/GPIO18 K21 +1V05_AXCK_LCPLL CLK_PCH_PCI3 R454 22_4 CLK_PCI_LPC
RSVD CLK_PCI_LPC [16,20]
R99 10K_4 CLK_PCIE_REQ2# B41 M21 C257 *18p/50V_4
R65 10K_4 PCIE_CLKREQ_W LAN# A41 CLKOUT_PCIE_N1 RSVD C26 ICLK_BIAS R342 3.01K/F_4
R370 10K_4 PCIE_CLKREQ_NGFF0# CLK_PCIE_REQ1# Y5 CLKOUT_PCIE_P1 DIFFCLK_BIASREF
R210 10K_4 PCIE_CLKREQ_NGFF1# PCIECLKRQ1/GPIO19 C35 TESTLOW _C35
C41 CLOCK TESTLOW_C35 C34 TESTLOW _C34 CLK_PCH_PCI4 R460 22_4 CLK_PCI_EC
CLKOUT_PCIE_N2 TESTLOW_C34 CLK_PCI_EC [16]

Q
B42 AK8 TESTLOW _AK8 C258 *18p/50V_4
CLK_PCIE_REQ2# AD1 CLKOUT_PCIE_P2 SIGNALS TESTLOW_AK8 AL8 TESTLOW _AL8
PCIECLKRQ2/GPIO20 TESTLOW_AL8
[20] CLK_PCIE_W LAN_N CLK_PCIE_W LAN_N B38 AN15 CLK_PCH_PCI3
CLK_PCIE_W LAN_P C37 CLKOUT_PCIE_N3 CLKOUT_LPC_0 AP15 CLK_PCH_PCI4 TESTLOW _C35 R33 10K_4
[20] CLK_PCIE_W LAN_P CLKOUT_PCIE_P3 CLKOUT_LPC_1
[20] PCIE_CLKREQ_W LAN# PCIE_CLKREQ_W LAN# N1 TESTLOW _C34 R32 10K_4
PCIECLKRQ3/GPIO21 B35 TESTLOW _AK8 R436 10K_4
CLKOUT_ITPXDP CLK_PCIE_XDPN [26]
[22] CLK_PCIE_NGFF0_N CLK_PCIE_NGFF0_N A39 A35 CLK_PCIE_XDPP [26] TESTLOW _AL8 R444 10K_4
A
CLK_PCIE_NGFF0_P B39 CLKOUT_PCIE_N4 CLKOUT_ITPXDP_P A
[22] CLK_PCIE_NGFF0_P CLKOUT_PCIE_P4
[22] PCIE_CLKREQ_NGFF0# PCIE_CLKREQ_NGFF0# R367 *short_4
PCIE_CLKREQ_NGFF0#_C U5
PCIECLKRQ4/GPIO22

[22] CLK_PCIE_NGFF1_N CLK_PCIE_NGFF1_N B37


CLK_PCIE_NGFF1_P A37 CLKOUT_PCIE_N5
[22] CLK_PCIE_NGFF1_P CLKOUT_PCIE_P5
PCIE_CLKREQ_NGFF1# R75 *short_4
PCIE_CLKREQ_NGFF1#_C T2
[22] PCIE_CLKREQ_NGFF1# PCIECLKRQ5/GPIO23 Quanta Computer Inc.
6 OF 19
PROJECT : ZS8
Size Document Number Rev
1A
BDW PCH(PCIE/USB/CLK)

www.vinafix.vn
Date: W ednesday, August 13, 2014 Sheet 10 of 35
5 4 3 2 1
5 4 3 2 1

l
U6J BDW_ULT_LPDDR3 PCH GPIO PU/PD

a
BOARD_ID0 P1 D60 THRMTRIP# +3V3
GPIO8 AU2 BMBUSY/GPIO76 THERMTRIP V4 SIO_RCIN#

i
GPIO8 RCIN/GPIO82 SIO_RCIN# [16]
GPIO12 AM7 T4 IRQ_SERIRQ IRQ_SERIRQ [16,17] IRQ_SERIRQ R372 10K_4
GPIO15 AD6 LAN_PHY_PWR_CTRL/GPIO12 SERIRQ AW15 OPI_COMP2 DEVSLP0 R365 10K_4
[9] GPIO15 GPIO15 PCH_OPI_RCOMP
SKU_ID0 Y1 CPU/ AF20 DEVSLP1 R61 10K_4

t
GPIO17 T3 GPIO16 MISC RSVD AB21 SIO_RCIN# R384 10K_4
GPIO24 AD5 GPIO17 RSVD SIO_EXT_SMI# R353 10K_4
D D
GPIO27 AN5 GPIO24 SIO_EXT_SCI# R352 10K_4
GPIO28 AD7 GPIO27 TS_INT_PCH R378 10K_4
GPIO26 AN3 GPIO28 GPIO84 R344 10K_4
GPIO26 R6 TS_INT_PCH GPIO85 R356 10K_4

n
GSPI0_CS/GPIO83 TS_INT_PCH [25]
GPIO56 AG6 L6 GPIO84 GPIO87 R361 10K_4
GPIO57 AP1 GPIO56 GSPI0_CLK/GPIO84 N6 GPIO85 GPIO88 R351 10K_4
GPIO58 AL4 GPIO57 GSPI0_MISO/GPIO85 L8 GPIO86 GPIO89 R355 10K_4
GPIO58 GSPI0_MOSI/GPIO86 GPIO86 [9]
GPIO59 AT5 R7 GPIO87 GPIO90 R46 10K_4
GPIO44 AK4 GPIO59 GPIO GSPI1_CS/GPIO87 L5 GPIO88 GPIO91 R49 10K_4

e
GPIO47 AB6 GPIO44 GSPI1_CLK/GPIO88 N7 GPIO89 GPIO92 R357 10K_4
GPIO48 U4 GPIO47 GSPI1_MISO/GPIO89 K2 GPIO90 GPIO93 R50 10K_4
GPIO49 Y3 GPIO48 GSPI_MOSI/GPIO90 J1 GPIO91 GPIO94 R51 10K_4
GPIO50 P3 GPIO49 UART0_RXD/GPIO91 K3 GPIO92 GPIO2 R48 10K_4
MODPHY_EN Y2 GPIO50 UART0_TXD/GPIO92 J2 GPIO93 GPIO3 R47 10K_4
[30] MODPHY_EN HSIOPC/GPIO71 UART0_RTS/GPIO93
RAM_ID0 AT3 SERIAL IO G1 GPIO94 SENSOR_PCH_DAT R347 2.2K_4

d
RAM_ID3 AH4 GPIO13 UART0_CTS/GPIO94 K4 SIO_EXT_SMI# SENSOR_PCH_CLK R346 2.2K_4
GPIO14 UART1_RXD/GPIO0 SIO_EXT_SMI# [16]
GPIO25 AM4 G2 SIO_EXT_SCI# SIO_EXT_SCI# [16] PCH_I2C1_DAT R25 2.2K_4
SENSOR_INT AG5 GPIO25 UART1_TXD/GPIO1 J3 GPIO2 PCH_I2C1_CLK R24 2.2K_4

i
[16] SENSOR_INT GPIO45 UART1_RST/GPIO02
GPIO46 AG3 J4 GPIO3 GPIO64 R19 10K_4
GPIO46 UART1_CTS/GPIO03 F2 SENSOR_PCH_DAT GPIO65 R334 10K_4
I2C0_SDA/GPIO4 SENSOR_PCH_DAT [16]
RAM_ID1 AM3 F3 SENSOR_PCH_CLK SENSOR_PCH_CLK [16] GPIO67 R330 10K_4

f
RAM_ID2 AM2 GPIO9 I2C0_SCL/GPIO5 G4 PCH_I2C1_DAT GPIO68 R21 10K_4
GPIO10 I2C1_SDA/GPIO6 PCH_I2C1_DAT [25]
[22] DEVSLP0 DEVSLP0 P2 F1 PCH_I2C1_CLK PCH_I2C1_CLK [25] GPIO69 R18 10K_4
BOARD_ID3 C4 DEVSLP0/GPIO33 I2C1_SCL/GPIO7 E3 GPIO64
DEVSLP1 L2 SDIO_POWER_EN/GPIO70 SDIO_CLK/GPIO64 F4 GPIO65 GPIO49 R95 10K_4
[22] DEVSLP1 DEVSLP1/GPIO38 SDIO_CMD/GPIO65
SKU_ID1 N5 D3 GPIO66 GPIO66 [9] GPIO48 R81 10K_4
SPKR V2 DEVSLP2/GPIO39 SDIO_D0/GPIO66 E4 GPIO67 GPIO50 R72 10K_4

n
[9,18] SPKR SPKR/GPIO81 SDIO_D1/GPIO67 C3 GPIO68 GPIO17 R374 10K_4
C SDIO_D2/GPIO68 E2 GPIO69 C
SDIO_D3/GPIO69

10 OF 19

o
+3V3_S5

Board ID U2 +1V05_VCCST
GPIO28
GPIO26
R391
R144
10K_4
10K_4
GPIO56 R406 10K_4

C
+3V3 1 5 C11 0.1u/10V_4 GPIO57 R146 10K_4
NC VCC GPIO58 R425 10K_4
BOARD_ID0 R70 *10K_4 +3V3 GPIO59 R451 10K_4
R71 10K_4 [6,31] IMVP_PW RGD IMVP_PW RGD 2 GPIO44 R113 10K_4
A R2 10K_4 GPIO47 R383 10K_4
GPIO8 R156 10K_4
3 4 IMVP_PW RGD_3V IMVP_PW RGD_3V [8] SENSOR_INT R390 10K_4
+3V3 GND Y GPIO46 R98 10K_4
GPIO24 R399 10K_4

a
[2] BOARD_ID1 BOARD_ID1 R362 *10K_4 74AUP1G07GW GPIO12 R777 10K_4
R364 10K_4 GPIO25 R778 10K_4
GPIO27 R776 10K_4

t
+3V3

B BOARD_ID2 R63 *10K_4 B


[2] BOARD_ID2
R66 10K_4 +3V3_S5
RAM ID CPU thermal trip +3V3_PCU

n
RAM_ID3 R412 *10K_4 GPIO12 R452 *10K_4
R413 10K_4 +1V05_VCCST GPIO25 R136 *10K_4
+3V3 GPIO27 R427 *10K_4

3
a
BOARD_ID3 R22 10K_4
R23 *10K_4 +3V3_S5 Q1

RAM_ID2 R151 *10K_4 IMVP_PW RGD_3V 2


R152 10K_4
+3V3

u
+1V05_VCCST FDV301N
[2] BOARD_ID4 BOARD_ID4 R60 *10K_4

1
R58 10K_4 +3V3_S5
R12 R3
RAM_ID1 R160 *10K_4
R161 10K_4
1K_4 1K_4 OPI_COMP2 R186 49.9/F_4

Q
Q2
+3V3_S5
THRMTRIP# 1 3 SYS_SHDN#
SYS_SHDN# [25,28,33]
Low High RAM_ID0 R148 *10K_4 MMBT3904-7-F
R149 10K_4
Reserved
BOARD_ID0 (Default) Reserved
A A
Reserved
BOARD_ID1 (Default) Reserved Vender RAM_ID0 RAM_ID1 RAM_ID2 RAM_ID3
SKU_ID0 R94 10K_4
SKU ID
Reserved Hynix 4G 0 0 0 0 SKU_ID1 R360 10K_4
BOARD_ID2 (Default) Reserved
Hynix 8G 0 0 0 1
Quanta Computer Inc.
BOARD_ID3 N/A(internal TPM) external TPM Samsung 4G 0 0 1 0
SKU_ID1 SKU_ID0 VGA H/W Setup
Reserved Samsung 8G 0 0 1 1 Signal Menu PROJECT : ZS8
BOARD_ID4 Reserved Size Document Number Rev
(Default) UMA Only 0 0 UMA Hidden UMA boot 1A
BDW PCH(GPIO/LPIO/MISC)

www.vinafix.vn
Date: W ednesday, August 13, 2014 Sheet 11 of 35
5 4 3 2 1
5 4 3 2 1

l
PCH HDA Power
11mA

i a
+3V3_S5 +3V3_S5_HDA

R453 *SHORT_6

t
D C245 0.1u/10V_4 D

n
+3V3_S5_DEEP

+1V05DX_MODPHY U6M BDW_ULT_LPDDR3 C210 1u/6.3V_4

C180 1u/6.3V_4
1.838A K9 +3V3_RTC VCCAPLL power
1mA

e
+1V05 C173 1u/6.3V_4 L10 VCCHSIO
C192 1u/6.3V_4 M9 VCCHSIO C255 1u/6.3V_4
R10 *short_8 +1V05_AIDLE N8 VCCHSIO AH11 C250 0.1u/10V_4
57mA
C194 1u/6.3V_4 P9 VCC1_05 HSIO RTC VCCSUS3 AG10 C247 0.1u/10V_4 +1V05 +1V05_APLLOPI
B18 VCC1_05 VCCRTC AE7 +VCCRTCEXT C218 0.1u/10V_4
VCCUSB3PLL DCPRTC

d
+1V05_AUSB3PLL B11 +3V3_S5 L4 2.2uH/210mA_8
+1V05_ASATA3PLL VCCSATA3PLL C4 *47u/6.3V_8
R381 *SHORT_6
18mA C3 *47u/6.3V_8

i
Y20 SPI Y8 +3v3_S5_PSPI C206 0.1u/10V_4 C205 1u/6.3V_4
AA21 RSVD OPI VCCSPI +1V05
+1V05_S5 +1V05_APLLOPI W21 VCCAPLL

f
VCCAPLL AG14 +1V05_VCCASW_1 R405 *SHORT_6
R329 *0_6 VCCASW AG13 +1V05_VCCASW_2 R404 *SHORT_6
10mA C166 10u/6.3V_6 VCCASW +1V05
C C
C175 1u/6.3V_4 +1V05_DCPSUS3 J13 USB3
2.063A 31mA
DCPSUS3 J11 +1V05_CORE_PCH R11 *short_8
+3V3_S5_HDA VCC1_05

n
H11 C165 10u/6.3V_6 +1V05 +1V05_AXCK_LCPLL
AH14 HDA VCC1_05 H15 C174 1u/6.3V_4
+1V05_S5 VCCHDA VCC1_05 AE8 C221 1u/6.3V_4 L3 2.2uH/210mA_8
VCC1_05 AF22 C10 47u/6.3V_8
25mA R401 *0_6 +1V05_DCPSUS2 AH13 VRM VCC1_05 AG19 +PCH_VCCDSW C228 1u/6.3V_4 +1V05 C15 47u/6.3V_8
C220 1u/6.3V_4 DCPSUS2 CORE DCPSUSBYP AG20 C21 1u/6.3V_4
658mA

o
+3V3_S5_DEEP DCPSUSBYP AE9 +1V05_VCCASW R434 *short_8
VCCASW AF9 C242 22u/6.3V_8
C213 22u/6.3V_8 AC9 VCCASW AG8 C243 1u/6.3V_4 +1V05_S5
AA9 VCCSUS3 VCCASW AD10
+3V3 C230 1u/6.3V_4 +VCCPDSW AH10 VCCSUS3 GPIO/LPC DCPSUS1 AD8 +1V05_DCPSUS1 R392 *0_6
109mA
V8 VCCDSW3_3 DCPSUS1 C212 1u/6.3V_4 +1V5
R382 *SHORT_6 +3V3_VCCPCORE W9 VCC3 +3V3 185mA
41mA 3mA

C
C195 22u/6.3V_8 VCC3 J15 +1V5_VCCATS R333 *SHORT_6 +1V05 +1V05_AXCK_DCB
+1V05_AXCK_DCB THERMAL SENSOR VCCTS1_5 K14 +3V3_VCCPTS R332 *SHORT_6
VCC3 K16 C179 1u/6.3V_4
41mA L5 2.2uH/210mA_8
+1V05_AXCK_LCPLL VCC3 C6 47u/6.3V_8
+3V3 C5 47u/6.3V_8
+1V05 +1V05_VCCCLK1 J18 C187 1u/6.3V_4
K19 VCCCLK SERIAL IO U8 +3V3_VCCSDIO R396 *SHORT_6
R339 *SHORT_6 A20 VCCCLK VCCSDIO T9 C196 1u/6.3V_4
17mA

a
185mA C178 1u/6.3V_4 J17 VCCACLKPLL VCCSDIO
B B
R21 VCCCLK +1V05_S5
+1V05_VCCCLK2 T21 VCCCLK ICC
1mA

t
K18 VCCCLK SUS OSCILLATOR AB8 +1V05_DCPSUS4 R386 *0_6 PCH VCCHSIO Power
R366 *SHORT_6 +3V3_S5_DEEP M20 RSVD DCPSUS4 C211 1u/6.3V_4
C193 1u/6.3V_4 V21 RSVD 41mA
AE20 RSVD AC20 +1V05_VCCUSBCORE +1V05 +1V05DX_MODPHY +1V05_AUSB3PLL
AE21 VCCSUS3 RSVD AG16
65mA

n
VCCSUS3 USB2 VCC1_05 AG17 R402 *SHORT_6 L2 2.2uH/210mA_8
LPT LP POWER VCC1_05 C222 1u/6.3V_4 C9 47u/6.3V_8
C14 47u/6.3V_8
C23 1u/6.3V_4

a
13 OF 19
+3V3_PCU Deep Sx
R408 *0_6 +VCCPDSW
42mA
119mA +1V05DX_MODPHY +1V05_ASATA3PLL

u
+3V3_S5
L1 2.2uH/210mA_8
R407 0_6 C13 47u/6.3V_8
C8 47u/6.3V_8
Non Deep Sx C22 1u/6.3V_4

A A
WW15 4/10 Intel VCCDSW3

Q
G3 can't boot issue.
+VCCPDSW C231 0.47u/25V_6 +PCH_VCCDSW
Quanta Computer Inc.
PROJECT : ZS8
Size Document Number Rev
1A
BDW PCH(POWER)
Date: Wednesday, August 13, 2014 Sheet 12 of 35
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

l
U6N BDW_ULT_LPDDR3
U6O BDW_ULT_LPDDR3
U6P BDW_ULT_LPDDR3
A11 AJ35 AP22 AV59 H17
A14 VSS VSS AJ39 AP23 VSS VSS AV8 D33 VSS H57
VSS VSS VSS VSS VSS VSS

a
A18 AJ41 AP26 AW16 D34 J10
A24 VSS VSS AJ43 AP29 VSS VSS AW24 D35 VSS VSS J22
A28 VSS VSS AJ45 AP3 VSS VSS AW33 D37 VSS VSS J59

i
A32 VSS VSS AJ47 AP31 VSS VSS AW35 D38 VSS VSS J63
A36 VSS VSS AJ50 AP38 VSS VSS AW37 D39 VSS VSS K1
A40 VSS VSS AJ52 AP39 VSS VSS AW4 D41 VSS VSS K12

t
D A44 VSS VSS AJ54 AP48 VSS VSS AW40 D42 VSS VSS L13 D
A48 VSS VSS AJ56 AP52 VSS VSS AW42 D43 VSS VSS L15
A52 VSS VSS AJ58 AP54 VSS VSS AW44 D45 VSS VSS L17
A56 VSS VSS AJ60 AP57 VSS VSS AW47 D46 VSS VSS L18
AA1 VSS VSS AJ63 AR11 VSS VSS AW50 D47 VSS VSS L20
VSS VSS VSS VSS VSS VSS

n
AA58 AK23 AR15 AW51 D49 L58
AB10 VSS VSS AK3 AR17 VSS VSS AW59 D5 VSS VSS L61
AB20 VSS VSS AK52 AR23 VSS VSS AW60 D50 VSS VSS L7
AB22 VSS VSS AL10 AR31 VSS VSS AY11 D51 VSS VSS M22
AB7 VSS VSS AL13 AR33 VSS VSS AY16 D53 VSS VSS N10

e
AC61 VSS VSS AL17 AR39 VSS VSS AY18 D54 VSS VSS N3
AD21 VSS VSS AL20 AR43 VSS VSS AY22 D55 VSS VSS P59
AD3 VSS VSS AL22 AR49 VSS VSS AY24 D57 VSS VSS VSS P63
AD63 VSS VSS AL23 AR5 VSS VSS AY26 D59 VSS VSS R10
AE10 VSS VSS AL26 AR52 VSS VSS AY30 D62 VSS VSS R22
VSS VSS VSS VSS VSS VSS

d
AE5 AL29 AT13 AY33 D8 R8
AE58 VSS VSS AL31 AT35 VSS VSS AY4 E11 VSS VSS T1
AF11 VSS VSS AL33 AT37 VSS VSS AY51 E17 VSS VSS T58
VSS VSS VSS VSS VSS VSS

i
AF12 AL36 AT40 AY53 F20 U20
AF14 VSS VSS AL39 AT42 VSS VSS AY57 F26 VSS VSS U22
AF15 VSS VSS AL40 AT43 VSS VSS AY59 F30 VSS VSS U61

f
AF17 VSS VSS AL45 AT46 VSS VSS AY6 F34 VSS VSS U9
AF18 VSS VSS AL46 AT49 VSS VSS B20 F38 VSS VSS V10
AG1 VSS VSS AL51 AT61 VSS VSS VSS B24 F42 VSS VSS V3
C VSS VSS VSS VSS VSS VSS C
AG11 VSS AL52 AT62 B26 F46 V7
AG21 VSS VSS AL54 AT63 VSS VSS B28 F50 VSS VSS W20
VSS VSS VSS VSS VSS VSS

n
AG23 AL57 AU1 B32 F54 W22
AG60 VSS VSS AL60 AU16 VSS VSS B36 F58 VSS VSS Y10
AG61 VSS VSS AL61 AU18 VSS VSS B4 F61 VSS VSS Y59
AG62 VSS VSS AM1 AU20 VSS VSS B40 G18 VSS VSS Y63
AG63 VSS VSS AM17 AU22 VSS VSS B44 G22 VSS VSS
AH17 VSS VSS AM23 AU24 VSS VSS B48 G3 VSS

o
AH19 VSS VSS AM31 AU26 VSS VSS B52 G5 VSS V58
AH20 VSS VSS AM52 AU28 VSS VSS B56 G6 VSS VSS AH46
AH22 VSS VSS AN17 AU30 VSS VSS B60 G8 VSS VSS V23
AH24 VSS VSS AN23 AU33 VSS VSS C11 H13 VSS VSS E62 VSS_SENSE_R R26 *short_4 VSS_SENSE
VSS VSS VSS VSS VSS VSS_SENSE VSS_SENSE [31]
AH28 AN31 AU51 C14 AH16 R39 100/F_4
AH30 VSS VSS AN32 AU53 VSS VSS C18 VSS
AH32 VSS VSS AN35 AU55 VSS VSS C20 16 OF 19

C
AH34 VSS VSS AN36 AU57 VSS VSS C25
AH36 VSS VSS AN39 AU59 VSS VSS C27
AH38 VSS VSS AN40 AV14 VSS VSS C38
AH40 VSS VSS AN42 AV16 VSS VSS C39 U6R BDW_ULT_LPDDR3
AH42 VSS VSS AN43 AV20 VSS VSS C57
AH44 VSS VSS AN45 AV24 VSS VSS D12
AH49 VSS VSS AN46 AV28 VSS VSS D14 N23
AH51 VSS VSS AN48 AV33 VSS VSS D18 RSVD R23

a
AH53 VSS VSS AN49 AV34 VSS VSS D2 AT2 RSVD T23
B B
AH55 VSS VSS AN51 AV36 VSS VSS D21 AU44 RSVD RSVD U10
AH57 VSS VSS AN52 AV39 VSS VSS D23 AV44 RSVD RSVD

t
AJ13 VSS VSS AN60 AV41 VSS VSS D25 D15 RSVD
AJ14 VSS VSS AN63 AV43 VSS VSS D26 RSVD AL1
AJ23 VSS VSS AN7 AV46 VSS VSS D27 RSVD AM11
AJ25 VSS VSS AP10 AV49 VSS VSS D29 F22 RSVD AP7
AJ27 VSS VSS AP17 AV51 VSS VSS D30 H22 RSVD RSVD AU10

n
AJ29 VSS VSS AP20 AV55 VSS VSS D31 J21 RSVD RSVD AU15
VSS VSS VSS VSS RSVD RSVD AW14
RSVD AY14
15 OF 19
RSVD

a
14 OF 19
18 OF 19
U6Q BDW_ULT_LPDDR3

u
DC_TEST_AY2_AW2 AY2 A3 DC_TEST_A3_B3
DC_TEST_AY3_AW3 AY3 DAISY_CHAIN_NCTF_AY2 DAISY_CHAIN_NCTF_A3 A4 TP_DC_TEST_A4
DAISY_CHAIN_NCTF_AY3 DAISY_CHAIN_NCTF_A4 TP4
TP_DC_TEST_AY60 AY60
TP15 AY61 DAISY_CHAIN_NCTF_AY60 A60
DC_TEST_AY61_AW61 TP_DC_TEST_A60
DAISY_CHAIN_NCTF_AY61 DAISY_CHAIN_NCTF_A60 TP1
DC_TEST_AY62_AW62 AY62 A61 DC_TEST_A61_B61
A TP_DC_TEST_B2 B2 DAISY_CHAIN_NCTF_AY62 DAISY_CHAIN_NCTF_A61 A62 TP_DC_TEST_A62 A
TP3 B3 DAISY_CHAIN_NCTF_B2 DAISY_CHAIN_NCTF_A62 AV1 TP2
DC_TEST_A3_B3 TP_DC_TEST_AV1

Q
DAISY_CHAIN_NCTF_B3 DAISY_CHAIN_NCTF_AV1 TP14
DC_TEST_A61_B61 B61 AW1 TP_DC_TEST_AW1
B62 DAISY_CHAIN_NCTF_B61 DAISY_CHAIN_NCTF_AW1 AW2 TP13
DC_TEST_B62_B63 DC_TEST_AY2_AW2

DC_TEST_C1_C2
B63
C1
DAISY_CHAIN_NCTF_B62
DAISY_CHAIN_NCTF_B63
DAISY_CHAIN_NCTF_AW2
DAISY_CHAIN_NCTF_AW3
AW3
AW61
DC_TEST_AY3_AW3
DC_TEST_AY61_AW61
Quanta Computer Inc.
C2 DAISY_CHAIN_NCTF_C1 DAISY_CHAIN_NCTF_AW61 AW62 DC_TEST_AY62_AW62
DAISY_CHAIN_NCTF_C2 DAISY_CHAIN_NCTF_AW62 AW63 TP_DC_TEST_AW63 PROJECT : ZS8
DAISY_CHAIN_NCTF_AW63 TP16
Size Document Number Rev
1A
17 OF 19 BDW PCH(GND/DAISY/RSVD)
Date: Wednesday, August 13, 2014 Sheet 13 of 35
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

l
LPDDR3 Chanel A (OBM)
U14A U14B
L8 MA_DQ[0:31]
DM0 MA_DQ[0:31] [3] +1V8_SUS +1V8_SUS +DDR_VTT_RUN +1V2_SUS
G8 LPDDR3 P9 MA_DQ13 LPDDR3
P8 DM1 DQ0 N9 MA_DQ9
D8 DM2 DQ1 N10 MA_DQ15 B2 A3 C335 10u/6.3V_6 C119 10u/6.3V_6 C274 10u/6.3V_6

a
MA_AMA[0:9] DM3 DQ2 N11 MA_DQ10 B5 VSS1 VDD1-1 A4 C95 1u/6.3V_4 C113 1u/6.3V_4 C78 10u/6.3V_6
[3] MA_AMA[0:9] DQ3 VSS2 VDD1-2
R2 M8 C5 A5
MA_AMA0
MA_AMA1 P2 CA0 DQ4 M9
MA_DQ8
MA_DQ12
Byte 1 E4 VSS3 VDD1-3 A6
C352 1u/6.3V_4 C112
C126
1u/6.3V_4
0.1u/10V_4
C271
C323
10u/6.3V_6
10u/6.3V_6
MA_AMA2 N2 CA1 DQ5 M10 MA_DQ14 E5 VSS4 VDD1-4 A10 C355 10u/6.3V_6 C307 10u/6.3V_6

i
MA_AMA3 N3 CA2 DQ6 M11 MA_DQ11 F5 VSS5 VDD1-5 U3 C91 1u/6.3V_4 C110 10u/6.3V_6 C276 10u/6.3V_6
MA_AMA4 M3 CA3 DQ7 F11 MA_DQ19 H2 VSS6 VDD1-6 U5 C98 1u/6.3V_4 C111 1u/6.3V_4 C81 10u/6.3V_6
MA_AMA5 F3 CA4 DQ8 F10 MA_DQ18 J12 VSS7 VDD1-7 U4 C102 1u/6.3V_4 C332 1u/6.3V_4
MA_AMA6 E3 CA5 DQ9 F9 MA_DQ22 K2 VSS8 VDD1-8 U6 C125 0.1u/10V_4 C89 1u/6.3V_4
CA6 DQ10 VSS9 VDD1-9

t
MA_AMA7 E2 F8 MA_DQ23 L6 U10 +1V2_SUS C308 1u/6.3V_4
CA7 DQ11 VSS10 VDD1-10
D
MA_AMA8
MA_AMA9
D2
C2 CA8 DQ12
E11
E10
MA_DQ21
MA_DQ20
Byte 2 M5
N4 VSS11 A8
C329
C330
1u/6.3V_4
1u/6.3V_4
D
MA_CKE[0:1] CA9 DQ13 E9 MA_DQ16 N5 VSS12 VDD2-1 A9 C285 1u/6.3V_4
[3] MA_CKE[0:1] DQ14 VSS13 VDD2-2 +SM_VREF_DQA
MA_CKE0 K3 D9 MA_DQ17 R4 D4 C309 1u/6.3V_4
MA_CKE1 K4 CKE0 DQ15 T8 MA_DQ1 R5 VSS14 VDD2-3 D5 C77 1u/6.3V_4
CKE1 DQ16 T9 MA_DQ5 T2 VSS15 VDD2-4 D6 C297 0.1u/10V_4 C334 1u/6.3V_4
MA_CLKP0 J3 DQ17 T10 MA_DQ2 T3 VSS16 VDD2-5 G5 C287 0.047u/25V_4 C82 1u/6.3V_4

n
[3] MA_CLKP0 CK DQ18 VSS17 VDD2-6
MA_CLKN0 J2 T11 MA_DQ3 T4 H5 C79 1u/6.3V_4
[3] MA_CLKN0 CK# DQ19 VSS18 VDD2-7
MA_AZQ0 B3 DQ20
R8
R9
MA_DQ4
MA_DQ0
Byte 0 T5
VSS19 VDD2-8
H6
H12
C298
C288
0.1u/10V_4
0.047u/25V_4
C328
C300
1u/6.3V_4
1u/6.3V_4
MA_AZQ1 B4 ZQ0 DQ21 R10 MA_DQ6 VDD2-9 J5 C333 1u/6.3V_4
ZQ1 DQ22 R11 MA_DQ7 B6 VDD2-10 J6 C290 1u/6.3V_4
U12 DQ23 C11 MA_DQ29 B12 VSSQ1 VDD2-11 K5 C284 1u/6.3V_4
DNU1 DQ24 VSSQ2 VDD2-12

e
U1 C10 MA_DQ25 C6 K6 +SM_VREF_CA C277 1u/6.3V_4
T1 DNU2 DQ25 C9 MA_DQ31 D12 VSSQ3 VDD2-13 K12 C292 1u/6.3V_4
B1 DNU3 DQ26 C8 MA_DQ27 E6 VSSQ4 VDD2-14 L5 C94 0.1u/10V_4 C350 1u/6.3V_4
A12 DNU4 DQ27 B11 F6 VSSQ5 VDD2-15 P4
A1 DNU5 DQ28 B10
MA_DQ28
MA_DQ24
Byte 3 F12 VSSQ6 VDD2-16 P5
C104 0.047u/25V_4 C351
C315
1u/6.3V_4
1u/6.3V_4
A2 DNU6 DQ29 B9 MA_DQ30 G6 VSSQ7 VDD2-17 P6 C105 0.1u/10V_4 C342 1u/6.3V_4
A13 DNU7 DQ30 B8 MA_DQ26 G9 VSSQ8 VDD2-18 U9 C97 0.047u/25V_4 C354 1u/6.3V_4
B13 DNU8 DQ31 MA_DQSP[0:3] H10 VSSQ9 VDD2-19 U8 C339 1u/6.3V_4

d
DNU9 MA_DQSP[0:3] [3] VSSQ10 VDD2-20
T13 L10 MA_DQSP1 K10 C343 0.1u/10V_4
U2 DNU10 DQS0 G10 MA_DQSP2 L9 VSSQ11 F2 C357 0.1u/10V_4
U13 DNU11 DQS1 P10 MA_DQSP0 M6 VSSQ12 VDDCA1 G2 C344 0.1u/10V_4
MA_CS#[0:1] DNU12 DQS2 D10 MA_DQSP3 M12 VSSQ13 VDDCA2 H3 C358 0.1u/10V_4

i
[3] MA_CS#[0:1] DSQ3 VSSQ14 VDDCA3
MA_CS#0 L3 MA_DQSN[0:3] N6 L2
CS0# MA_DQSN[0:3] [3] VSSQ15 VDDCA4
MA_CS#1 L4 L11 MA_DQSN1 P12 M2
CS1# DQS0# G11 MA_DQSN2 R6 VSSQ16 VDDCA5
MA_ODT J8 DQS1# P11 MA_DQSN0 T6 VSSQ17 A11

f
[3] MA_ODT ODT DQS2# VSSQ18 VDDQ1
D11 MA_DQSN3 T12 C12
DQS3# VSSQ19 VDDQ2 E8
C4 VDDQ3 E12 +1V2_SUS
K9 NC1 C3 VDDQ4 G12
R3 NC2 D3 VSSCA1 VDDQ5 H8
NC3 FBGA-178pin F4 VSSCA2 VDDQ6 H9 R479
G3 VSSCA3 VDDQ7 H11
VSSCA4 VDDQ8

n
LPDDR3_FPGA G4 J9 +M_VREF_DQ0 +SM_VREF_DQA
J4 VSSCA5 VDDQ9 J10 8.2K/F_4
M4 VSSCA6 VDDQ10 K8 R472 10/F_4
C C
P3 VSSCA7 VDDQ11 K11
VSSCA8 VDDQ12 L12 C260 R480
VDDQ13 N8 C262
VDDQ14 N12
VDDQ15 R12 0.022u/16V_4 8.2K/F_4 0.1u/10V_4

o
VDDQ16 U11
VDDQ17 +SM_VREF_CA
+SM_VREF_DQA R471
H4
VREF_CA J11
VREF_DQ 24.9/F_4
FBGA-178pin

LPDDR3_FPGA

C
+1V2_SUS

R524
U13A
L8 MA_DQ[32:63] +M_VREF_CA +SM_VREF_CA
DM0 MA_DQ[32:63] [3]
G8 LPDDR3 P9 MA_DQ44 U13B 8.2K/F_4
P8 DM1 DQ0 N9 MA_DQ41 R521 5.11/F_4
D8 DM2 DQ1 N10 MA_DQ42 LPDDR3 +1V8_SUS
MA_BMA[0:9] DM3 DQ2 N11 MA_DQ43 C304 R523
[3] MA_BMA[0:9] DQ3
R2 M8 B2 A3
MA_BMA0 MA_DQ45
Byte 5 C316

a
MA_BMA1 P2 CA0 DQ4 M9 MA_DQ40 B5 VSS1 VDD1-1 A4
MA_BMA2 N2 CA1 DQ5 M10 MA_DQ46 C5 VSS2 VDD1-2 A5 0.022u/16V_4 8.2K/F_4 0.1u/10V_4
MA_BMA3 N3 CA2 DQ6 M11 MA_DQ47 E4 VSS3 VDD1-3 A6
MA_BMA4 M3 CA3 DQ7 F11 MA_DQ60 E5 VSS4 VDD1-4 A10

t
MA_BMA5 F3 CA4 DQ8 F10 MA_DQ57 F5 VSS5 VDD1-5 U3 R520
MA_BMA6 E3 CA5 DQ9 F9 MA_DQ59 H2 VSS6 VDD1-6 U5
MA_BMA7 E2 CA6 DQ10 F8 MA_DQ63 J12 VSS7 VDD1-7 U4
D2 CA7 DQ11 E11 K2 VSS8 VDD1-8 U6
MA_BMA8
MA_BMA9 C2 CA8 DQ12 E10
MA_DQ56
MA_DQ61
Byte 7 L6 VSS9 VDD1-9 U10 +1V2_SUS
24.9/F_4

MA_CKE[2:3] CA9 DQ13 E9 MA_DQ58 M5 VSS10 VDD1-10


[3] MA_CKE[2:3] DQ14 VSS11
MA_CKE2 K3 D9 MA_DQ62 N4 A8
B CKE0 DQ15 VSS12 VDD2-1 B

n
MA_CKE3 K4 T8 MA_DQ33 N5 A9
CKE1 DQ16 T9 MA_DQ37 R4 VSS13 VDD2-2 D4
MA_CLKP1 J3 DQ17 T10 MA_DQ35 R5 VSS14 VDD2-3 D5
[3] MA_CLKP1 CK DQ18 VSS15 VDD2-4
MA_CLKN1 J2 T11 MA_DQ34 T2 D6
[3] MA_CLKN1 CK# DQ19 VSS16 VDD2-5
MA_BZQ0 B3 DQ20
R8
R9
MA_DQ36
MA_DQ32
Byte 4 T3
T4 VSS17 VDD2-6
G5
H5
MA_BZQ1 B4 ZQ0 DQ21 R10 MA_DQ39 T5 VSS18 VDD2-7 H6
ZQ1 DQ22 R11 MA_DQ38 VSS19 VDD2-8 H12

a
U12 DQ23 C11 MA_DQ52 VDD2-9 J5
U1 DNU1 DQ24 C10 MA_DQ50 B6 VDD2-10 J6
T1 DNU2 DQ25 C9 MA_DQ54 B12 VSSQ1 VDD2-11 K5
B1 DNU3 DQ26 C8 MA_DQ48 C6 VSSQ2 VDD2-12 K6
DNU4 DQ27 VSSQ3 VDD2-13 +DDR_VTT_RUN +DDR_VTT_RUN
A12
A1 DNU5 DQ28
B11
B10
MA_DQ51
MA_DQ53
Byte 6 D12
E6 VSSQ4 VDD2-14
K12
L5
A2 DNU6 DQ29 B9 MA_DQ55 F6 VSSQ5 VDD2-15 P4 MA_AMA0 R258 54.9/F_4 MA_BMA0 R244 54.9/F_4

u
A13 DNU7 DQ30 B8 MA_DQ49 F12 VSSQ6 VDD2-16 P5 MA_AMA1 R257 54.9/F_4 MA_BMA1 R243 54.9/F_4
B13 DNU8 DQ31 MA_DQSP[4:7] G6 VSSQ7 VDD2-17 P6 MA_AMA2 R255 54.9/F_4 MA_BMA2 R241 54.9/F_4
DNU9 MA_DQSP[4:7] [3] VSSQ8 VDD2-18
T13 L10 MA_DQSP5 G9 U9 MA_AMA3 R256 54.9/F_4 MA_BMA3 R242 54.9/F_4
U2 DNU10 DQS0 G10 MA_DQSP7 H10 VSSQ9 VDD2-19 U8 MA_AMA4 R254 54.9/F_4 MA_BMA4 R240 54.9/F_4
U13 DNU11 DQS1 P10 MA_DQSP4 K10 VSSQ10 VDD2-20 MA_AMA5 R249 54.9/F_4 MA_BMA5 R235 54.9/F_4
DNU12 DQS2 D10 MA_DQSP6 L9 VSSQ11 F2 MA_AMA6 R247 54.9/F_4 MA_BMA6 R233 54.9/F_4
MA_CS#0 L3 DSQ3 MA_DQSN[4:7] M6 VSSQ12 VDDCA1 G2 MA_AMA7 R248 54.9/F_4 MA_BMA7 R234 54.9/F_4
CS0# MA_DQSN[4:7] [3] VSSQ13 VDDCA2
MA_CS#1 L4 L11 MA_DQSN5 M12 H3 MA_AMA8 R246 54.9/F_4 MA_BMA8 R232 54.9/F_4
CS1# DQS0# G11 MA_DQSN7 N6 VSSQ14 VDDCA3 L2 MA_AMA9 R245 54.9/F_4 MA_BMA9 R231 54.9/F_4
MA_ODT J8 DQS1# P11 MA_DQSN4 P12 VSSQ15 VDDCA4 M2
ODT DQS2# D11 MA_DQSN6 R6 VSSQ16 VDDCA5 MA_CLKP0 R250 37.4/F_4 MA_CLKP1 R236 37.4/F_4

Q
DQS3# T6 VSSQ17 A11 MA_CLKN0 R251 37.4/F_4 MA_CLKN1 R237 37.4/F_4
C4 T12 VSSQ18 VDDQ1 C12
K9 NC1 VSSQ19 VDDQ2 E8 MA_CKE0 R253 80.6/F_4 MA_CKE2 R238 80.6/F_4
R3 NC2 VDDQ3 E12 MA_CKE1 R252 80.6/F_4 MA_CKE3 R239 80.6/F_4
NC3 FBGA-178pin C3 VDDQ4 G12
D3 VSSCA1 VDDQ5 H8 MA_CS#0 R215 80.6/F_4
LPDDR3_FPGA F4 VSSCA2 VDDQ6 H9 MA_CS#1 R211 80.6/F_4
G3 VSSCA3 VDDQ7 H11
G4 VSSCA4 VDDQ8 J9 MA_ODT R207 80.6/F_4
+3V3 J4 VSSCA5 VDDQ9 J10

A
SPD SPD_A0 R430 *1K_4
M4
P3
VSSCA6
VSSCA7
VDDQ10
VDDQ11
K8
K11 MA_AZQ0 R218 240/F_4 MA_BZQ0 R222 240/F_4 A
R441 *1K_4 VSSCA8 VDDQ12 L12 MA_AZQ1 R204 240/F_4 MA_BZQ1 R217 240/F_4
VDDQ13 N8
VDDQ14 N12
U9 VDDQ15 R12
CLK_SCLK R422 *0_4 SPD_CLK 6 1 SPD_A0 +3V3 VDDQ16 U11
[9,26] CLK_SCLK SCL A0 VDDQ17 +SM_VREF_CA
CLK_SDATA R423 *0_4 SPD_DAT 5 2 SPD_A1
[9,26] CLK_SDATA +3V3 SDA A1 +3V3 +SM_VREF_DQA
3 SPD_A2 SPD_A1 R431 *1K_4
A2 R442 *1K_4 H4
R420 *1K_4 SPD_WP 7 8 VREF_CA J11
R421 *1K_4 WP VCC 4 C233 *0.1u/10V_4 VREF_DQ
GND
*M24C02-WMN6TP +3V3
FBGA-178pin Quanta Computer Inc.
SPD_A2 R432 *1K_4 LPDDR3_FPGA PROJECT : ZS8
R443 *1K_4 Size Document Number Rev

www.vinafix.vn
1A
LPDDR3 MEMORY DOWN CHA
Date: Wednesday, August 13, 2014 Sheet 14 of 35
5 4 3 2 1
5 4 3 2 1

l
LPDDR3 Chanel B (OBM)
U12A U12B
L8 MB_DQ[0:31]
DM0 MB_DQ[0:31] [4] +1V8_SUS +1V8_SUS +DDR_VTT_RUN +1V2_SUS
G8 LPDDR3 P9 MB_DQ25 LPDDR3
P8 DM1 DQ0 N9 MB_DQ24
D8 DM2 DQ1 N10 MB_DQ26 B2 A3 C346 10u/6.3V_6 C118 10u/6.3V_6 C84 10u/6.3V_6

a
MB_AMA[0:9] DM3 DQ2 N11 MB_DQ31 B5 VSS1 VDD1-1 A4 C92 1u/6.3V_4 C115 1u/6.3V_4 C273 10u/6.3V_6
[4] MB_AMA[0:9] DQ3 VSS2 VDD1-2
R2 M8 C5 A5
MB_AMA0
MB_AMA1 P2 CA0 DQ4 M9
MB_DQ28
MB_DQ29
Byte 3 E4 VSS3 VDD1-3 A6
C101 1u/6.3V_4 C117
C128
1u/6.3V_4
0.1u/10V_4
C306
C270
10u/6.3V_6
10u/6.3V_6
MB_AMA2 N2 CA1 DQ5 M10 MB_DQ27 E5 VSS4 VDD1-4 A10 C356 10u/6.3V_6 C318 10u/6.3V_6

i
MB_AMA3 N3 CA2 DQ6 M11 MB_DQ30 F5 VSS5 VDD1-5 U3 C336 1u/6.3V_4 C129 10u/6.3V_6 C272 10u/6.3V_6
MB_AMA4 M3 CA3 DQ7 F11 MB_DQ22 H2 VSS6 VDD1-6 U5 C90 1u/6.3V_4 C107 1u/6.3V_4 C301 10u/6.3V_6
MB_AMA5 F3 CA4 DQ8 F10 MB_DQ19 J12 VSS7 VDD1-7 U4 C116 1u/6.3V_4 C279 1u/6.3V_4
MB_AMA6 E3 CA5 DQ9 F9 MB_DQ21 K2 VSS8 VDD1-8 U6 C127 0.1u/10V_4 C88 1u/6.3V_4
CA6 DQ10 VSS9 VDD1-9

t
MB_AMA7 E2 F8 MB_DQ17 L6 U10 +1V2_SUS C325 1u/6.3V_4
CA7 DQ11 VSS10 VDD1-10
D
MB_AMA8
MB_AMA9
D2
C2 CA8 DQ12
E11
E10
MB_DQ23
MB_DQ18
Byte 2 M5
N4 VSS11 A8
C278
C282
1u/6.3V_4
1u/6.3V_4
D
MB_CKE[0:1] CA9 DQ13 E9 MB_DQ20 N5 VSS12 VDD2-1 A9 C289 1u/6.3V_4
[4] MB_CKE[0:1] DQ14 VSS13 VDD2-2
MB_CKE0 K3 D9 MB_DQ16 R4 D4 C348 1u/6.3V_4
MB_CKE1 K4 CKE0 DQ15 T8 MB_DQ1 R5 VSS14 VDD2-3 D5 C359 1u/6.3V_4
CKE1 DQ16 T9 MB_DQ5 T2 VSS15 VDD2-4 D6 +SM_VREF_DQB C331 1u/6.3V_4
MB_CLKP0 J3 DQ17 T10 MB_DQ2 T3 VSS16 VDD2-5 G5 C341 1u/6.3V_4

n
[4] MB_CLKP0 CK DQ18 VSS17 VDD2-6
MB_CLKN0 J2 T11 MB_DQ3 T4 H5 C281 0.1u/10V_4 C313 1u/6.3V_4
[4] MB_CLKN0 CK# DQ19 VSS18 VDD2-7
MB_AZQ0 B3 DQ20
R8
R9
MB_DQ4
MB_DQ0
Byte 0 T5
VSS19 VDD2-8
H6
H12
C295 0.047u/25V_4 C319
C320
1u/6.3V_4
1u/6.3V_4
MB_AZQ1 B4 ZQ0 DQ21 R10 MB_DQ6 VDD2-9 J5 C296 0.1u/10V_4 C326 1u/6.3V_4
ZQ1 DQ22 R11 MB_DQ7 B6 VDD2-10 J6 C283 0.047u/25V_4 C321 1u/6.3V_4
U12 DQ23 C11 MB_DQ8 B12 VSSQ1 VDD2-11 K5 C327 1u/6.3V_4
DNU1 DQ24 VSSQ2 VDD2-12

e
U1 C10 MB_DQ13 C6 K6 C280 1u/6.3V_4
T1 DNU2 DQ25 C9 MB_DQ10 D12 VSSQ3 VDD2-13 K12 C311 1u/6.3V_4
B1 DNU3 DQ26 C8 MB_DQ15 E6 VSSQ4 VDD2-14 L5 +SM_VREF_CA C294 1u/6.3V_4
A12 DNU4 DQ27 B11 F6 VSSQ5 VDD2-15 P4
A1 DNU5 DQ28 B10
MB_DQ9
MB_DQ12
Byte 1 F12 VSSQ6 VDD2-16 P5 C109 0.1u/10V_4
C322
C338
1u/6.3V_4
1u/6.3V_4
A2 DNU6 DQ29 B9 MB_DQ14 G6 VSSQ7 VDD2-17 P6 C106 0.047u/25V_4 C353 1u/6.3V_4
A13 DNU7 DQ30 B8 MB_DQ11 G9 VSSQ8 VDD2-18 U9 C345 1u/6.3V_4
B13 DNU8 DQ31 MB_DQSP[0:3] H10 VSSQ9 VDD2-19 U8 C349 0.1u/10V_4 C324 1u/6.3V_4

d
DNU9 MB_DQSP[0:3] [4] VSSQ10 VDD2-20
T13 L10 MB_DQSP3 K10 C340 0.047u/25V_4 C303 0.1u/10V_4
U2 DNU10 DQS0 G10 MB_DQSP2 L9 VSSQ11 F2 C302 0.1u/10V_4
U13 DNU11 DQS1 P10 MB_DQSP0 M6 VSSQ12 VDDCA1 G2 C305 0.1u/10V_4
MB_CS#[0:1] DNU12 DQS2 D10 MB_DQSP1 M12 VSSQ13 VDDCA2 H3 C360 0.1u/10V_4

i
[4] MB_CS#[0:1] DSQ3 VSSQ14 VDDCA3
MB_CS#0 L3 MB_DQSN[0:3] N6 L2
CS0# MB_DQSN[0:3] [4] VSSQ15 VDDCA4
MB_CS#1 L4 L11 MB_DQSN3 P12 M2
CS1# DQS0# G11 MB_DQSN2 R6 VSSQ16 VDDCA5
MB_ODT J8 DQS1# P11 MB_DQSN0 T6 VSSQ17 A11

f
[4] MB_ODT ODT DQS2# VSSQ18 VDDQ1
D11 MB_DQSN1 T12 C12
DQS3# VSSQ19 VDDQ2 E8
C4 VDDQ3 E12
K9 NC1 C3 VDDQ4 G12
R3 NC2 D3 VSSCA1 VDDQ5 H8
NC3 FBGA-178pin F4 VSSCA2 VDDQ6 H9
G3 VSSCA3 VDDQ7 H11
VSSCA4 VDDQ8

n
LPDDR3_FPGA G4 J9
J4 VSSCA5 VDDQ9 J10
M4 VSSCA6 VDDQ10 K8
C C
P3 VSSCA7 VDDQ11 K11
VSSCA8 VDDQ12 L12
VDDQ13 N8
VDDQ14 N12
VDDQ15 R12

o
VDDQ16 U11 +1V2_SUS
VDDQ17 +SM_VREF_CA
+SM_VREF_DQB
H4 R476
VREF_CA J11
VREF_DQ +M_VREF_DQ1 +SM_VREF_DQB
FBGA-178pin 8.2K/F_4
R468 10/F_4

LPDDR3_FPGA C256 R477

C
C261

0.022u/16V_4 8.2K/F_4 0.1u/10V_4

U11A
L8 MB_DQ[32:63] R467
DM0 MB_DQ[32:63] [4]
G8 LPDDR3 P9 MB_DQ45 U11B
P8 DM1 DQ0 N9 MB_DQ44
D8 DM2 DQ1 N10 MB_DQ43 LPDDR3 +1V8_SUS 24.9/F_4
MB_BMA[0:9] DM3 DQ2 N11 MB_DQ47
[4] MB_BMA[0:9] DQ3
R2 M8 B2 A3
MB_BMA0 MB_DQ40
Byte 5

a
MB_BMA1 P2 CA0 DQ4 M9 MB_DQ41 B5 VSS1 VDD1-1 A4
MB_BMA2 N2 CA1 DQ5 M10 MB_DQ42 C5 VSS2 VDD1-2 A5
MB_BMA3 N3 CA2 DQ6 M11 MB_DQ46 E4 VSS3 VDD1-3 A6
MB_BMA4 M3 CA3 DQ7 F11 MB_DQ48 E5 VSS4 VDD1-4 A10

t
MB_BMA5 F3 CA4 DQ8 F10 MB_DQ50 F5 VSS5 VDD1-5 U3
MB_BMA6 E3 CA5 DQ9 F9 MB_DQ52 H2 VSS6 VDD1-6 U5
MB_BMA7 E2 CA6 DQ10 F8 MB_DQ55 J12 VSS7 VDD1-7 U4
D2 CA7 DQ11 E11 K2 VSS8 VDD1-8 U6
MB_BMA8
MB_BMA9 C2 CA8 DQ12 E10
MB_DQ53
MB_DQ54
Byte 6 L6 VSS9 VDD1-9 U10 +1V2_SUS
MB_CKE[2:3] CA9 DQ13 E9 MB_DQ49 M5 VSS10 VDD1-10
[4] MB_CKE[2:3] DQ14 VSS11
MB_CKE2 K3 D9 MB_DQ51 N4 A8
B CKE0 DQ15 VSS12 VDD2-1 B

n
MB_CKE3 K4 T8 MB_DQ33 N5 A9
CKE1 DQ16 T9 MB_DQ37 R4 VSS13 VDD2-2 D4
MB_CLKP1 J3 DQ17 T10 MB_DQ34 R5 VSS14 VDD2-3 D5
[4] MB_CLKP1 CK DQ18 VSS15 VDD2-4
MB_CLKN1 J2 T11 MB_DQ35 T2 D6
[4] MB_CLKN1 CK# DQ19 VSS16 VDD2-5
MB_BZQ0 B3 DQ20
R8
R9
MB_DQ32
MB_DQ36
Byte 4 T3
T4 VSS17 VDD2-6
G5
H5
MB_BZQ1 B4 ZQ0 DQ21 R10 MB_DQ38 T5 VSS18 VDD2-7 H6
ZQ1 DQ22 R11 MB_DQ39 VSS19 VDD2-8 H12

a
U12 DQ23 C11 MB_DQ60 VDD2-9 J5
U1 DNU1 DQ24 C10 MB_DQ57 B6 VDD2-10 J6
T1 DNU2 DQ25 C9 MB_DQ63 B12 VSSQ1 VDD2-11 K5
B1 DNU3 DQ26 C8 MB_DQ58 C6 VSSQ2 VDD2-12 K6
DNU4 DQ27 VSSQ3 VDD2-13 +DDR_VTT_RUN +DDR_VTT_RUN
A12
A1 DNU5 DQ28
B11
B10
MB_DQ61
MB_DQ56
Byte 7 D12
E6 VSSQ4 VDD2-14
K12
L5
A2 DNU6 DQ29 B9 MB_DQ62 F6 VSSQ5 VDD2-15 P4 MB_AMA0 R286 54.9/F_4 MB_BMA0 R272 54.9/F_4

u
A13 DNU7 DQ30 B8 MB_DQ59 F12 VSSQ6 VDD2-16 P5 MB_AMA1 R285 54.9/F_4 MB_BMA1 R271 54.9/F_4
B13 DNU8 DQ31 MB_DQSP[4:7] G6 VSSQ7 VDD2-17 P6 MB_AMA2 R283 54.9/F_4 MB_BMA2 R269 54.9/F_4
DNU9 MB_DQSP[4:7] [4] VSSQ8 VDD2-18
T13 L10 MB_DQSP5 G9 U9 MB_AMA3 R284 54.9/F_4 MB_BMA3 R270 54.9/F_4
U2 DNU10 DQS0 G10 MB_DQSP6 H10 VSSQ9 VDD2-19 U8 MB_AMA4 R282 54.9/F_4 MB_BMA4 R268 54.9/F_4
U13 DNU11 DQS1 P10 MB_DQSP4 K10 VSSQ10 VDD2-20 MB_AMA5 R277 54.9/F_4 MB_BMA5 R263 54.9/F_4
DNU12 DQS2 D10 MB_DQSP7 L9 VSSQ11 F2 MB_AMA6 R275 54.9/F_4 MB_BMA6 R261 54.9/F_4
MB_CS#0 L3 DSQ3 MB_DQSN[4:7] M6 VSSQ12 VDDCA1 G2 MB_AMA7 R276 54.9/F_4 MB_BMA7 R262 54.9/F_4
CS0# MB_DQSN[4:7] [4] VSSQ13 VDDCA2
MB_CS#1 L4 L11 MB_DQSN5 M12 H3 MB_AMA8 R274 54.9/F_4 MB_BMA8 R260 54.9/F_4
CS1# DQS0# G11 MB_DQSN6 N6 VSSQ14 VDDCA3 L2 MB_AMA9 R273 54.9/F_4 MB_BMA9 R259 54.9/F_4
MB_ODT J8 DQS1# P11 MB_DQSN4 P12 VSSQ15 VDDCA4 M2
ODT DQS2# D11 MB_DQSN7 R6 VSSQ16 VDDCA5 MB_CLKP0 R278 37.4/F_4 MB_CLKP1 R264 37.4/F_4

Q
DQS3# T6 VSSQ17 A11 MB_CLKN0 R279 37.4/F_4 MB_CLKN1 R265 37.4/F_4
C4 T12 VSSQ18 VDDQ1 C12
K9 NC1 VSSQ19 VDDQ2 E8 MB_CKE0 R281 80.6/F_4 MB_CKE2 R266 80.6/F_4
R3 NC2 VDDQ3 E12 MB_CKE1 R280 80.6/F_4 MB_CKE3 R267 80.6/F_4
NC3 FBGA-178pin C3 VDDQ4 G12
D3 VSSCA1 VDDQ5 H8 MB_CS#0 R216 80.6/F_4
LPDDR3_FPGA F4 VSSCA2 VDDQ6 H9 MB_CS#1 R212 80.6/F_4
G3 VSSCA3 VDDQ7 H11
G4 VSSCA4 VDDQ8 J9 MB_ODT R209 80.6/F_4
J4 VSSCA5 VDDQ9 J10
M4 VSSCA6 VDDQ10 K8
P3 VSSCA7 VDDQ11 K11 MB_AZQ0 R221 240/F_4 MB_BZQ0 R223 240/F_4
A A
VSSCA8 VDDQ12 L12 MB_AZQ1 R206 240/F_4 MB_BZQ1 R219 240/F_4
VDDQ13 N8
VDDQ14 N12
VDDQ15 R12
VDDQ16 U11
VDDQ17 +SM_VREF_CA
+SM_VREF_DQB
H4
VREF_CA J11
VREF_DQ
FBGA-178pin Quanta Computer Inc.
LPDDR3_FPGA PROJECT : ZS8
Size Document Number Rev

www.vinafix.vn
1A
LPDDR3 MEMORY DOWN CHB
Date: Wednesday, August 13, 2014 Sheet 15 of 35
5 4 3 2 1
5 4 3 2 1

l
EC IT8380 (KBC) Pull Up
+3V3_PCU +3V3_PCU_EC +3V3_PCU_ECAVCC +3V3_PCU_ECPLL +3V3_PCU_EC

R203 2.2_6 L19 120_0.5A_4 L14 120_0.5A_4 +3V3_PCU


C124 0.1u/10V_4 C370 0.1u/10V_4 C293 0.1u/10V_4

a
C83 0.1u/10V_4 S5ON R506 10K_4
C96 0.1u/10V_4 +3V3_PCU_ECVBAT
C86 0.1u/10V_4 ECAGND MAINON R531 100K_4

i
C87 0.1u/10V_4
C138 0.1u/10V_4 R208 *short_4 HWPG SUSON R514 100K_4
C93 0.1u/10V_4 SUSC# SUSC# [8,26]
SUSB# VRON R543 100K_4

t
SUSB# [8,26]
D TP25 PCH_SPI_SI_EC R507 *10K_4 D
TP26 PCH_SPI_SO_EC R508 *10K_4

+3V3 +3V3_EC PCH_SUSPWARN# R515 *short_4


PTP_PWR_EN# [25]

n
R228 *short_4 LID2# LID2# [25]
C100 0.1u/10V_4 USB_BC_ON USB_BC_ON [24]
CLKRUN# CLKRUN# [8,17]
+3V3_PCU

114
121

127
11
26
50
92

74

84
83
82

19
20

99
98
97
96
93
e
3
U23 MBCLK R509 4.7K_4
LPC_LAD0 10 110 MBCLK MBDATA R510 4.7K_4

L80HLAT/BAO/WUI24/GPE0(Dn)
L80LLAT/WUI7/GPE7(Up)
EGCLK/WUI27/GPE3(Dn)
EGCS#/WUI26/GPE2(Dn)
EGAD/WUI25/GPE1(Dn)

WUI42/GPH6/ID6(Dn)
WUI41/GPH5/ID5(Dn)
WUI40/GPH4/ID4(Dn)
WUI19/GPH3/ID3(Dn)
CLKRUN#/WUI16/GPH0/ID0(Dn)
VBAT
VSTBY
VSTBY
VSTBY
VSTBY
VSTBY

VSTBY
VCC

AVCC
[9,17,20] LPC_LAD0 LAD0/GPM0(X) SMCLK0/GPB3(X) MBCLK [27]
LPC_LAD1 9 111 MBDATA
[9,17,20] LPC_LAD1 LAD1/GPM1(X) SMDAT0/GPB4(X) MBDATA [27]
LPC_LAD2 8 115 2ND_MBCLK
[9,17,20] LPC_LAD2 LAD2/GPM2(X) SMCLK1/GPC1(X) 2ND_MBCLK [9,25] +3V3_S5
LPC_LAD3 7 116 2ND_MBDATA
[9,17,20] LPC_LAD3 LAD3/GPM3(X) SMDAT1/GPC2(X) 2ND_MBDATA [9,25]
[8,17,20,22,26] PLTRST# PLTRST# 22 117 PECI R513 43_4 H_PECI H_PECI [5]
+3V3_PCU 13 LPCRST#/WUI4/GPD2(Up) PECI/SMCLK2/WUI22/GPF6(Up) 118

d
CLK_PCI_EC EC_FPBACK# 2ND_MBCLK R511 4.7K_4

SM BUS
[10] CLK_PCI_EC LPCCLK/GPM4(X) SMDAT2/WUI23/GPF7(Up) EC_FPBACK# [21]
LPC_LFRAME# 6 2ND_MBDATA R512 4.7K_4
[9,17,20] LPC_LFRAME# LFRAME#/GPM5(X) 85
PS2CLK0/TMB0/CEC/GPF0(Up) AC_Protect [27]
PROCHOT_EC 17 86 LID1# LID1# [21]

i
LPCPD#/WUI6/GPE6(Dn) PS2DAT0/TMB1/GPF1(Up)
1

R517 D32 89 TPCLK TPCLK [25]


126 PS2CLK2/WUI20/GPF4(Up) 90
[25] SENSOR_EN
SENSOR_EN
GA20/GPB5(X) PS2DAT2/WUI21/GPF5(Up)
TPDATA TPDATA [25] 6/19 add
IRQ_SERIRQ 5

PS/2
[11,17] IRQ_SERIRQ SERIRQ/GPM6(X)
100K_4 SDMK0340L-7-F SIO_EXT_SMI# 15

f
[11] SIO_EXT_SMI# ECSMI#/GPD4(Up)
23
ECSCI#/GPD3(Up) LPC
[11] SIO_EXT_SCI# SIO_EXT_SCI#
2

WRST# WRST# 14 GPIO +3V3


SIO_RCIN# 4 WRST#
[11] SIO_RCIN# KBRST#/GPB6(X)
C312 16 SENSOR_SCL R527 *2.2K_4
PWUREQ#/BBO/SMCLK2ALT/GPC7(Up)/SMCLK2ALT SENSOR_SDA R525 *2.2K_4
24 PWRLED#

IT8380 PWM0/GPA0(Up) PWRLED# [25]

n
1u/6.3V_4 [2,25] TPD_INT# TPD_INT# R532 *short_4TPD_INT#_EC 25 BATLED1# BATLED1# [25]
PWM1/GPA1(Up) 28 SUSLED#
C PWM2/GPA2(Up) SUSLED# [25] C
EDP_BKLEN_EC 119 29 BATLED0#
[21] EDP_BKLEN_EC
SUSON 123 CRX0/GPC0(Dn)
CIR PWM3/GPA3(Up) 30 SENSOR_PCH_CLK_E R539 SENSOR_PCH_CLK
*short_4
BATLED0# [25] SM BUS ARRANGEMENT TABLE
[28,29,32] SUSON CTX0/TMA0/GPB2(Dn) PWM4/GPA4(Up) SENSOR_PCH_CLK [11]
31 SENSOR_PCH_DAT_E R542 SENSOR_PCH_DAT
*short_4
PWM5/GPA5(Up) SENSOR_PCH_DAT [11]
SM Bus 1 Battery
CLK_PCI_EC PWM

o
MAINON 80
[29,32] MAINON DAC4/DCD0#/GPJ4(X)
R530 BT_EN 104 47 FANSIG SM Bus 2 PCH/LVDS Converter
[20] BT_EN DSR0#/GPG6(X) TACH0A/GPD6(Dn) FANSIG [25]
EC_PWROK 33 48
[8] EC_PWROK GINT/CTS0#/GPD5(Up) TACH1A/TMA1/GPD7(Dn)
88
*22_4 SENSOR_INT 81 PS2DAT1/RTS0#/GPF3(Up) 120 DNBSWON#
[11] SENSOR_INT DAC5/RIG0#/GPJ5(X) TMRI0/WUI2/GPC4(Dn) DNBSWON# [8]
TPD_EN 87 124 DPWROK
[25] TPD_EN PS2CLK1/DTR0#/GPF2(Up) TMRI1/WUI3/GPC6(Dn) DPWROK [8]
C362 109
AMP_MUTE# 108 TXD/SOUT0/GPB1(Up)
[18] AMP_MUTE# RXD/SIN0/GPB0(Up)

C
*10p/50V_4 PCH_SLP_SUS# 71 125 NBSWON#
[8] PCH_SLP_SUS#
[27] ACIN
[27] TEMP_MBAT
ACIN
TEMP_MBAT
72
73
ADC5/DCD1#/WUI29/GPI5(X)
ADC6/DSR1#/WUI30/GPI6(X)
ADC7/CTS1#/WUI31/GPI7(X)
UART port PWRSW/GPE4(Up)
RI1#/WUI0/GPD0(Up)
RI2#/WUI1/GPD1(Up)
18
21 SB_ACDC
NBSWON#

SB_ACDC
[25,26]

[27]
DEBUG
TS_RST# 35 WAKE UP
[25] TS_RST# PCBEEP_EC 34 RTS1#/WUI5/GPE5(Dn)
[18] PCBEEP_EC PWM7/RIG1#/GPA7(Up)
D/C# 107 112 RSMRST# RSMRST# [8]
[27] D/C# DTR1#/SBUSY/GPG1/ID7(Dn) RING#/PWRFAIL#/CK32KOUT/LPCRST#/GPB7(Dn)
SENSOR_SDA 95
[25] SENSOR_SDA CTX1/WUI18/SOUT1/GPH2/SMDAT3/ID2(Dn)
SENSOR_SCL 94
[25] SENSOR_SCL CRX1/WUI17/SIN1/SMCLK3/GPH1/ID1(Dn) ICMNT C130 10u/6.3V_4

a
[9] PCH_SPI_CLK_EC PCH_SPI_CLK_EC 105 SW2
SPI_CS0#_UR_ME 101 FSCK/GPG7
[9] SPI_CS0#_UR_ME FSCE#/GPG3
PCH_SPI_SI_EC 102 EXTERNAL SERIAL FLASH ECAGND NBSWON# 2 3
[9] PCH_SPI_SI_EC FMOSI/GPG4
PCH_SPI_SO_EC 103 66 RF_EN 4 1

t
[9] PCH_SPI_SO_EC FMISO/GPG5 ADC0/GPI0(X) RF_EN [20]
67 ICMNT 5
ADC1/GPI1(X) ICMNT [27]
56 68 APWORK APWORK [6,8] 6
57 KSO16/SMOSI/GPC3(Dn) ADC2/GPI2(X) 69 VRON
KSO17/SMISO/GPC5(Dn) ADC3/GPI3(X) VRON [31]
FAN_PWM 32 70 *Power Switch
[25] FAN_PWM PWM6/SSCK/GPA6(Up) ADC4/WUI28/GPI4(X)
B S5ON 100 A/D D/A B
[28,30,33] S5ON

n
SSCE0#/GPG2(X)
[9] ME_WR# ME_WR# 106
SSCE1#/GPG0(X) SPI ENABLE
76 USB_CHARGE_ON USB_CHARGE_ON [24]
MY0 36 TACH2/GPJ0(X) 77
[25] MY0 KSO0/PD0 GPJ1(X)
MY1 37 78 PCH_PWROK
[25] MY1 KSO1/PD1 DAC2/TACH0B/GPJ2(X) PCH_PWROK [6,8]
MY2 38 79 USBON#
[25] MY2 KSO2/PD2 DAC3/TACH1B/GPJ3(X) USBON# [24,25]
[25] MY3 MY3 39
KSO3/PD3

a
[25] MY4 MY4 40 KBMX
MY5 41 KSO4/PD4
[25] MY5 KSO5/PD5
MY6 42
[25] MY6 KSO6/PD6
MY7 43
[25] MY7 KSO7/PD7
[25] MY8 MY8 44
MY9 45 KSO8/ACK#
[25] MY9 KSO9/BUSY
MY10 46

u
[25] MY10 KSO10/PE
MY11 51 2 PCH_SUSACK#
[25] MY11 PCH_SUSACK# [8]
KSI3/SLIN#

KSO11/ERR# CK32KE/GPJ7
KSI1/AFD#
KSI0/STB#

KSI2/INIT#

MY12 52 128 PCH_SUSPWARN#


[25] MY12 KSO12/SLCT CK32K/GPJ6 PCH_SUSPWARN# [8]
MY13 53
VCORE

[25] MY13 KSO13


AVSS

MY14 54 CLOCK
KSI4
KSI5
KSI6
KSI7

[25] MY14
VSS

VSS
VSS
VSS
VSS
VSS

MY15 55 KSO14
[25] MY15 KSO15
IT8380E-192/CX
58
59
60
61
62
63
64
65

27
49
91
113
122

75

12

Q
[25] MX0 MX0
[25] MX1 MX1 C361 0.1u/10V_4 CN14
MX2 LPC_LFRAME# 1
[25] MX2
[25] MX3 MX3 L18 120_0.5A_4 LPC_LAD3 2
[25] MX4 MX4 LPC_LAD2 3
MX5 LPC_LAD1 4
[25] MX5
MX6 ECAGND LPC_LAD0 5
[25] MX6
MX7 CLK_PCI_LPC 6
[25] MX7 [10,20] CLK_PCI_LPC
PLTRST# 7
+3V3 8
A A
H_PROCHOT# 9 11
H_PROCHOT# [5,27,31] +3V3 HWPG 10 12
3

Q24 R529 10K_4 *Debug

PROCHOT_EC 2 HWPG_1.2V D24 RB500V-40 HWPG


[29] HWPG_1.2V
HWPG_1.05V_S5 D28 RB500V-40
R535 2N7002K
[6,26,30] HWPG_1.05V_S5
SYS_HWPG
Quanta Computer Inc.
[28] SYS_HWPG D26 RB500V-40
1

[32] HWPG_1.8V HWPG_1.8V D25 *RB500V-40 PROJECT :ZS8


100K_4 Size Document Number Rev
HWPG_1.5V D27 *RB500V-40 1A
EC IT8380

www.vinafix.vn
[32] HWPG_1.5V
Date: Wednesday, August 13, 2014 Sheet 16 of 35
5 4 3 2 1
5 4 3 2 1

l
TPM NPCT650 (TPM)

nti a D

e
+3V3 +3V3_TPM +3V3_TPM_VSB
+3V3_S5

d
R294 *SHORT_6 +3V3_SUS
C378 TPM@10u/6.3V_6 R298 TPM@0_6

i
C367 TPM@0.1u/10V_4 R303 *TPM@0_6
C376 TPM@0.1u/10V_4 C380 TPM@10u/6.3V_6

f
C366 TPM@0.1u/10V_4 C375 TPM@0.1u/10V_4

n
24
19
10

5
C U15 C

VDD3
VDD2
VDD1

VSB
o
+3V3_TPM

[9,16,20] LPC_LAD3 LPC_LAD3 17 7 TPM_PP R299 *TPM@4.7K_4


LPC_LAD2 20 LAD3 PP 6 R300 *TPM@0_4
[9,16,20] LPC_LAD2 LAD2/SPI_IRQ GPX/GPIO2
LPC_LAD1 23 2

C
[9,16,20] LPC_LAD1 LAD1/MOSI GPIO1
[9,16,20] LPC_LAD0 LPC_LAD0 26
LPC_LFRAME# 22 LAD0/MISO 1
[9,16,20] LPC_LFRAME# LFRAME/SCS GPIO0/XOR_OUT
[11,16] IRQ_SERIRQ IRQ_SERIRQ 27 9 TPM_BADD R301 *TPM@10K_4
CLK_PCI_TPM 21 SERIRQ GPIO3/BADD 8
[10] CLK_PCI_TPM LCLK/SCLK TEST

a
CLKRUN# R225 *short_4 TPM_CLKRUN# 15 3 BADD SELECTION
[8,16] CLKRUN# CLKRUN/GPIO04 NC1
PLTRST# R224 *short_4 TPM_LRESET# 16 12 0 EEh - EFh

t
[8,16,20,22,26] PLTRST# LRESET/SPI_RST NC2 1 7Eh - 7Fh
28 13
LPCPD NC3 14
NC4
B B

n GND1
GND2
GND3
GND4
'1' - pin is left open.
'0' - pin is pulled down.

TPM@NPCT650

a
4
11
18
25

Qu Size Document Number


NPCT650
Quanta Computer Inc.
PROJECT :ZS8
Rev
1A
A

5 4
www.vinafix.vn 3
Date: Wednesday, August 13, 2014
2
Sheet 17
1
of 35
5 4 3 2 1

l
CODEC ALC 283 (ADO) +3V3 +3V3_ADO
HP_IC_R
R557 *SHORT_6
HP_IC_L

a
LINE1L-VREFO
+5V +5V_ADO_AVDD

i
LINE1R-VREFO
L17 22_6A_8 INT_AMIC-VREFO MIC2-VREFO
MIC2-VREFO R546 R553

t
D D
CODEC_VREF C382 2.2u/10V_4
100K_4 *100K_4
INT_AMIC-VREFO C373 10u/6.3V_6

n
C145 1u/10V_4
AGND_ADO AGND_ADO
AGND_ADO

C392 1u/10V_4

e
+5V_ADO_AVDD Place close to pin 26
+3V3_ADO ANALOG
C374 10u/6.3V_6 LINE1L-VREFO R302 4.7K_4
C385 10u/6.3V_6 C379 0.1u/10V_4

LINE1R-VREFO R297 4.7K_4

d
AGND_ADO AGND_ADO

36

35

34

33

32

31

30

29

28

27

26

25
U16
DIGITAL HP_IC_L R305 56/F_4 HP_L

i
HP-OUT-L

LINE1-VREFO-L

AVDD1

AVSS1
MIC2-VREFO
CPVDD

CBN

HP-OUT-R

LINE1-VREFO-R
CPVEE

LDO1-CAP
VREF
+1V5 +1V5_ADO_AVDD2 HP_L [19]
HP_IC_R R309 56/F_4 HP_R HP_R [19]
R317 *SHORT_6

f
C398 10u/6.3V_6 37 24 LINE2-L
CBP LINE2-L TP18
C396 0.1u/10V_4 LINE1R_R C122 4.7u/6.3V_6
38 23 LINE2-R
AVSS2 LINE2-R TP17
AGND_ADO C147 10u/6.3V_6 39 22 LINE1L_R LINE1L_R C121 4.7u/6.3V_6
LDO2-CAP LINE1-L
AGND_ADO ANALOG

n
+5V +5V_ADO_PVDD1 40 21 LINE1R_R
C AVDD2 LINE1-R R537 2.2K_4 C
C151 10u/6.3V_6 R313 *SHORT_6 41 20 MIC2-VREFO
C154 0.1u/10V_4 C388 10u/6.3V_6 PVDD1 NC C123 10u/6.3V_6 R538 2.2K_4
C393 0.1u/10V_4 [19] L_SPK+ L_SPK+ 42 19
SPK-L+ MIC1-CAP

o
[19] L_SPK- L_SPK- 43
SPK-L-
ALC283 MIC2-R/SLEEVE
18 SLEEVE AGND_ADO SLEEVE [19]

[19] R_SPK- R_SPK- 44 17 RING2 RING2 [19]


SPK-R- MIC2-L/RING2
+5V +5V_ADO_PVDD2 R_SPK+ 45 16
[19] R_SPK+ SPK-R+ MONO-OUT
C152 10u/6.3V_6 R314 *SHORT_6 46 15 R292 20K/F_4

C
C155 0.1u/10V_4 C389 10u/6.3V_6 PVDD2 JDREF

GPIO0/DMIC-DATA

GPIO1/DMIC-CLK
C394 0.1u/10V_4 PD# 47 14
PDB Sense B AGND_ADO
48 13 CODEC_SENSEA R293 39.2K/F_4 HPOUT_JD

SDATA-OUT
TP19 SPDIFO/GPIO2 Sense A HPOUT_JD [19]

LDO3-CAP

SDATA-IN

DVDD-IO

PCBEEP
RESETB
BIT-CLK
DVDD

SYNC
DVSS
DIGITAL 49
DGND ANALOG
+3V3_ADO

a 1

10

11

12
R310 *10K_4
+3V3_ADO DIGITAL

t
[16] AMP_MUTE# AMP_MUTE# D15 RB500V-40 PD#
SPKR [9,11]
C386 10u/6.3V_6 PCBEEP C136 1u/16V_6 PCBEEP_R R287 47K_4 PC_BEEP D8 RB500V-40
C390 0.1u/10V_4 R291 4.7K_4
PCBEEP_EC [16]
PCH_AZ_CODEC_RST# D14 RB500V-40 C134 100p/50V_4 D9 RB500V-40
B B
Place close to pin 1

n
PCH_AZ_CODEC_RST#
PCH_AZ_CODEC_RST# [9]
C140 *100p/50V_4

[19] DMIC_DATA DMIC_DATA


PCH_AZ_CODEC_SYNC
PCH_AZ_CODEC_SYNC [9]

a
[19] DMIC_CLK DMIC_CLK
+3V3_ADO

C383 10u/6.3V_6
C381 0.1u/10V_4 Place close to pin 9

u
PCH_AZ_CODEC_SDIN0_C R549 33_4
PCH_AZ_CODEC_SDIN0 [9]
Grounding circuit(ADO) C142 10u/6.3V_6

+3V3_PCU PCH_AZ_CODEC_BITCLK
PCH_AZ_CODEC_BITCLK [9]

Q
C143 *22p/50V_4
Q23
R214
PCH_AZ_CODEC_SDOUT
PCH_AZ_CODEC_SDOUT [9]
1 6 SLEEVE
100K_4 +3V3
2
A A
R226 R321 *short_4
3

4 3 RING2 R289 *short_4


R316 *short_4
5 Q15 *100K_4 R320 *short_4
2 R295 10K_4 PCH_AZ_CODEC_RST# R230 *short_4
AGND_ADO R288 *short_4
2N7002DW 2N7002K C103
C108 1000p/50V_4
Quanta Computer Inc.
PIN1, PIN4, PIN3, PIN6 are ANALOG C133 1000p/50V_4
PROJECT : ZS8
1

*1u/10V_4
Size Document Number Rev
AGND_ADO 1A
Codec ALC283

www.vinafix.vn
Date: W ednesday, August 13, 2014 Sheet 18 of 35
5 4 3 2 1
5 4 3 2 1

l
Universal Audio Jack (ADO)

[18] SLEEVE
[18] HP_L
SLEEVE
HP_L

nti a L9
L7
0_6
0_6
SLEEVE_R
HPL_SYS
4
1

5
CN6 D

e
[18] HPOUT_JD HPOUT_JD 6
[18] HP_R HP_R L8 0_6 HPR_SYS 2
[18] RING2 RING2 L6 0_6 RING2_R 3 7

d
R304 R296 C141 C144 C146 C135 TSH-5746DT1R2-H3-105-G6
AGND_ADO AGND_ADO

i
*1K_4 *1K_4 100P/50V_4 100P/50V_4 *100P/50V_4 *100P/50V_4 D13 *14V/38V/100P_4

f
SLEEVE_R 1 2
D12 *14V/38V/100P_4
HPR_SYS 1 2

n
AGND_ADO D11 *14V/38V/100P_4
C HPL_SYS 1 2 C
D10 *14V/38V/100P_4
RING2_R 1 2

o
AGND_ADO

C
Speaker (ADO) DMIC (ADO)

a
+3V3 +3V3_DMIC

t
R574 *SHORT_6
C404 0.1u/10V_4
B B

n
+3V3_DMIC
CN19 CN17

a
[18] R_SPK+ R_SPK+ R328 0_6 SPK_R+ 4 120_0.3A_4 1
R_SPK- R327 0_6 SPK_R- 3 R+ DMIC_DATA R577 DMIC_DATA_C 2 1
[18] R_SPK- R- 5 [18] DMIC_DATA 2 6
[18] L_SPK- L_SPK- R326 0_6 SPK_L- 2 [18] DMIC_CLK DMIC_CLK R578 DMIC_CLK_C 3
L- 6 3 5

u
[18] L_SPK+ L_SPK+ R322 0_6 SPK_L+ 1 120_0.3A_4 4
L+ 4
C164 *68p/50V_4 SPEAKER DMIC
C163 *68p/50V_4
C161 *68p/50V_4

Q
C158 *68p/50V_4

A
Quanta Computer Inc. A

PROJECT :ZS8
Size Document Number Rev
1A
Audio Jack/Speaker/DMIC
5 4
www.vinafix.vn 3
Date: Wednesday, August 13, 2014
2
Sheet 19
1
of 35
5 4 3 2 1

l
NGFF WiFi & BT (NGF)
CN9

a
+3V3_WLAN +3V3_WLAN +3V3
NGFF

i
1 2 R435 *SHORT_6
USB2P4 3 GND 3.3Vaux 4 C236 10u/6.3V_6

t
[10] USB2P4 USB_D+ 3.3Vaux
[10] USB2N4 USB2N4 5 6 C238 0.1u/10V_4
D
7 USB_D- LED#1 8 C241 0.1u/10V_4 D
9 GND PCM_CLK 10 C62 0.1u/10V_4
SDIO CLK(O) PCM_SYNC

n
11 12 C63 0.1u/10V_4
13 SDIO CMDIO) PCM_IN 14
15 SDIO DAT0(IO) PCM_OUT 16
SDIO DAT1(IO) LED#2

e
17 18
19 SDIO DAT2(IO) GND 20
21 SDIO DAT3(IO) UART Wake 22
23 SDIO Wake(I) UART Rx 24

d
25 SDIO Reset Key 5 26
27 KEY1 Key 6 28

i
29 KEY2 Key 7 30
31 KEY3 Key 8 32

f
33 KEY4 UART Tx 34
PEG_TXP4 35 GND UART CTS 36
[10] PEG_TXP4 PETp0 UART RTS
[10] PEG_TXN4 PEG_TXN4 37 38
PETn0 Clink RESET

n
39 40
PEG_RXP4 41 GND CLink DATA 42
C [10] PEG_RXP4 C
PEG_RXN4 43 PERp0 CLink CLK 44
[10] PEG_RXN4 PERn0 COEX3
45 46

o
CLK_PCIE_WLAN_P 47 GND COEX2 48
[10] CLK_PCIE_WLAN_P REFCLKP0 COEX1
[10] CLK_PCIE_WLAN_N CLK_PCIE_WLAN_N 49 50
51 REFCLKN0 SUSCLK(32KHz) 52 WLAN_RST# R154 *short_4
PLTRST#
GND PERST0# PLTRST# [8,16,17,22,26]
WLAN_CLKREQ# 53 54 BT_EN BT_EN [16]
WLAN_WAKE# 55 CLKREQ0# W_DISABLE#2 56 RF_EN

C
PEWake0# W_DISABLE#1 RF_EN [16]
57 58
59 GND NFC I2C SM DATA 60
61 PETp1 NFC I2C SM CLK 62
63 PETn1 NFC I2C IRQ 64 LPC_LAD0_C R562 *0_4 LPC_LAD0
GND NFC Reset# LPC_LAD0 [9,16,17]
65 66 LPC_LAD1_C R563 *0_4 LPC_LAD1

a
PERp1 RESERVED3 LPC_LAD1 [9,16,17]
67 68 LPC_LAD2_C R564 *0_4 LPC_LAD2 LPC_LAD2 [9,16,17]
69 PERn1 RESERVED4 70 LPC_LAD3_C R565 *0_4 LPC_LAD3

t
GND RESERVED5 LPC_LAD3 [9,16,17]
[10,16] CLK_PCI_LPC CLK_PCI_LPC R561 *0_4 CLK_PCI_LPC_C 71 72
LPC_LFRAME# R566 *0_4 LPC_LFRAME#_C 73 Reserved1 3.3Vaux 74 +3V3_WLAN
[9,16,17] LPC_LFRAME# Reserved2 3.3Vaux
75
B GND B

n
WLAN_NGFF CONN(Type 2230)

ua
[10] PCIE_CLKREQ_WLAN# PCIE_CLKREQ_WLAN#R473 *short_4

+3V3_WLAN
WLAN_CLKREQ#

Q
R474
2

*2N7002K Q22 *10K_4


A

PCIE_WAKE_WLAN# 3 1 WLAN_WAKE#
Quanta Computer Inc. A

[8] PCIE_WAKE_WLAN#
PROJECT :ZS8
Size Document Number Rev
1A
NGFF WiFi & BT
5 4
www.vinafix.vn 3
Date: Wednesday, August 13, 2014
2
Sheet 20
1
of 35
5 4 3 2 1

l
eDP Connector (LDS)
+3V3

a
R129 *100K_4
R138 100K_4 EDP_AUXP_C

i
+3V3

t
D D
R128 100K_4
R137 *100K_4 EDP_AUXN_C

n
VIN LCD_VIN

e
R143 *short_8 LCD_VIN
R150 *short_8 CN8
4.7u/25V_8 1
C59 2 1
C57 1000p/50V_4 3 2
3

d
4
5 4
EDP_BKLTCL 6 5
[2] EDP_BKLTCL 6

i
LCD_BL_ON 7
8 7
EDP_TXP0 C42 0.1u/10V_4 EDP_TXP0_C 9 8
[2] EDP_TXP0

f
EDP_TXN0 C41 0.1u/10V_4 EDP_TXN0_C EDP_HPD 10 9
[2] EDP_TXN0 [2] EDP_HPD 10
11
EDP_TXP1 C40 0.1u/10V_4 EDP_TXP1_C 12 11
C [2] EDP_TXP1 12 C
EDP_TXN1 C39 0.1u/10V_4 EDP_TXN1_C 13
[2] EDP_TXN1 LCD_VCC 13
14
14

n
EDP_TXP2 C38 0.1u/10V_4 EDP_TXP2_C 15
[2] EDP_TXP2 15
EDP_TXN2 C37 0.1u/10V_4 EDP_TXN2_C 16
[2] EDP_TXN2 16
EDP_AUXN_C 17
EDP_TXP3 C36 0.1u/10V_4 EDP_TXP3_C EDP_AUXP_C 18 17
[2] EDP_TXP3 18
[2] EDP_TXN3 EDP_TXN3 C35 0.1u/10V_4 EDP_TXN3_C 19
EDP_TXP0_C 20 19

o
EDP_AUXPC54 0.1u/10V_4 EDP_AUXP_C EDP_TXN0_C 21 20
[2] EDP_AUXP 21
[2] EDP_AUXN EDP_AUXNC53 0.1u/10V_4 EDP_AUXN_C 22
EDP_TXP1_C 23 22
EDP_TXN1_C 24 23
25 24
EDP_TXP2_C 26 25
EDP_TXN2_C 27 26 34

C
28 27 34 33
EDP_TXP3_C 29 28 33 32
EDP_TXN3_C 30 29 32 31
30 31
eDP

a
B B
+3V3_PCU +3V3 LID1#
Backlight Control (LDS)

t
1

R40 R14 D4 Hall Sensor (HSR)


+3V3_PCU
EDP_BKLEN_EC R341 0_4 10K_4 10K_4 RB500V-40

n
[16] EDP_BKLEN_EC
2

C24 0.1u/10V_4
[2] EDP_BKLEN EDP_BKLEN R340 0_4 BKLEN BL# LCD_BL_ON D6 *0.2pF/5V_4
R45
5

R331 Q5 Q4

a
1
2 EC_FPBACK# EC_FPBACK# [16] HE1 100K_4
100K_4
2 LID1# LID1# [16]
2N7002DW DTC144EU
1

u
EM-6781-T3 D5
4

3
*0.2pF/5V_4

A
eDP Power (LDS) +3V3 U5 LCD_VCC_S LCD_VCC A

Q
C25 1u/6.3V_4 6 1 R102 *short_8
IN OUT
4
IN GND
2 C45 C33 C52 C55 C56 Quanta Computer Inc.
EDP_VDDEN 3 5
[2] EDP_VDDEN ON/OFF GND 2.2u/10V_4 0.1u/10V_4 22u/6.3V_8 0.1u/10V_4 0.01u/25V_4 PROJECT : ZS8
R89 100K_4 Size Document Number Rev
G5243AT11U 1A
eDP/redriver/Hall
Date: Wednesday, August 13, 2014 Sheet 21 of 35
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

l
NGFF SATA1/PEG5 (NGF) CN13
+3V3_SATA_N0 +3V3_SATA_N0 +3V3

1
NGFF 2 C409 *150u/6.3V_3528 R579 *short_8 C405 10u/6.3V_6

a
3 GND 3.3V 4 + C406 0.1u/10V_4
PEG_RXN5_L3 R536 *0_4 PEG_RXN5_L3_N 5 GND 3.3V 6 C410 10u/6.3V_6
[10] PEG_RXN5_L3 PERn3 NC +3V3_SATA_N0_N +3V3_SATA_N0
PEG_RXP5_L3 R541 *0_4 PEG_RXP5_L3_N 7 8 C132 0.1u/10V_4

i
[10] PEG_RXP5_L3 PERp3 NC
9 10 C131 0.1u/10V_4
PEG_TXN5_L3 C372 *0.1u/10V_4 PEG_TXN5_L3_N 11 GND DAS 12 R308 *short_8 C156 0.1u/10V_4
[10] PEG_TXN5_L3 PETn3 NOTCH/3.3V
[10] PEG_TXP5_L3 PEG_TXP5_L3 C377 *0.1u/10V_4 PEG_TXP5_L3_N 13 14 C157 0.1u/10V_4

t
15 PETp3/NOTCH NOTCH/3.3V 16
PEG_RXN5_L2 R548 *0_4 PEG_RXN5_L2_N 17 GND/NOTCH NOTCH/3.3V 18
D [10] PEG_RXN5_L2 D
PEG_RXP5_L2 R551 *0_4 PEG_RXP5_L2_N 19 PERn2/NOTCH NOTCH/3.3V 20
[10] PEG_RXP5_L2 PERp2/NOTCH NC
21 22
PEG_TXN5_L2 C384 *0.1u/10V_4 PEG_TXN5_L2_N 23 GND/CONFIG_0 NC 24
[10] PEG_TXN5_L2 PETn2 NC
PEG_TXP5_L2 C387 *0.1u/10V_4 PEG_TXP5_L2_N 25 26

n
[10] PEG_TXP5_L2 PETp2 NC
27 28
PEG_RXN5_L1 R556 *0_4 PEG_RXN5_L1_N 29 GND NC 30
[10] PEG_RXN5_L1 PERn1 NC
[10] PEG_RXP5_L1 PEG_RXP5_L1 R560 *0_4 PEG_RXP5_L1_N 31 32
33 PERp1 NC 34
PEG_TXN5_L1 C391 *0.1u/10V_4 PEG_TXN5_L1_N 35 GND NC 36

e
[10] PEG_TXN5_L1 PETn1 NC
[10] PEG_TXP5_L1 PEG_TXP5_L1 C395 *0.1u/10V_4 PEG_TXP5_L1_N 37 38 DEVSLP_N0 R319 *short_4
DEVSLP1 DEVSLP1 [11]
39 PETp1 DEVSLP 40 R318 *10K_4
PEG_RXN5_L0 R567 *0_4 SATA_RXP1/PEG_RXN5_L0_N 41 GND NC 42
[10] PEG_RXN5_L0 PERn0/SATA-B+ NC
[10] PEG_RXP5_L0 PEG_RXP5_L0 R570 *0_4 SATA_RXN1/PEG_RXP5_L0_N 43 44
45 PERp0/SATA-B- NC 46
PEG_TXN5_L0 C400 *0.1u/10V_4 SATA_TXN1/PEG_TXN5_L0_N 47 GND NC 48

d
[10] PEG_TXN5_L0 PETn0/SATA-A- NC
[10] PEG_TXP5_L0 PEG_TXP5_L0 C402 *0.1u/10V_4 SATA_TXP1/PEG_TXP5_L0_N 49 50 NGFF1_RST# R315 *short_4
PLTRST# PLTRST# [8,16,17,20,26]
51 PETp0/SATA-A+ PERST# 52 PCIE_CLKREQ_NGFF0#
GND CLKREQ# PCIE_CLKREQ_NGFF0# [10]
CLK_PCIE_NGFF0_N 53 54

i
[10] CLK_PCIE_NGFF0_N REFCLKn PEWake#
[10] CLK_PCIE_NGFF0_P CLK_PCIE_NGFF0_P 55 56
57 REFCLKp N/C 58
59 GND N/C 60

f
61 NOTCH NOTCH 62
63 NOTCH NOTCH 64
65 NOTCH NOTCH 66 +3V3_SATA_N0
67 NOTCH NOTCH 68
NGFF0_PEDET 69 NC SUSCLK(32KHz) 70
TP24 PEDET 3.3V
71 72

n
73 GND 3.3V 74
C
75 GND 3.3V C

GND
GND
GND

NGFF_SSD

76
77
o
SATA_RXN1/PEG_RXN6_L2 C399 0.01u/16V_4 SATA_RXN1/PEG_RXP5_L0_N
SATA_RXP1/PEG_RXP6_L2 C397 0.01u/16V_4 SATA_RXP1/PEG_RXN5_L0_N

SATA_TXN1/PEG_TXN6_L2 C401 0.01u/16V_4 SATA_TXN1/PEG_TXN5_L0_N


SATA_TXP1/PEG_TXP6_L2 C403 0.01u/16V_4 SATA_TXP1/PEG_TXP5_L0_N

C
NGFF SATA3/PEG6 (NGF)
CN10

a
+3V3_SATA_N1 +3V3_SATA_N1 +3V3

1
NGFF 2 C347 *150u/6.3V_3528 R290 *short_8 C139 10u/6.3V_6

t
3 GND 3.3V 4 + C137 0.1u/10V_4
PEG_RXN6_L3 R488 *0_4 PEG_RXN6_L3_N 5 GND 3.3V 6 C368 10u/6.3V_6
[9] PEG_RXN6_L3 PERn3 NC +3V3_SATA_N1_N +3V3_SATA_N1
[9] PEG_RXP6_L3 PEG_RXP6_L3 R491 *0_4 PEG_RXP6_L3_N 7 8 C75 0.1u/10V_4
9 PERp3 NC 10 C74 0.1u/10V_4
PEG_TXN6_L3 C266 *0.1u/10V_4 PEG_TXN6_L3_N 11 GND DAS 12 R483 *short_8 C263 0.1u/10V_4
B [9] PEG_TXN6_L3 B
PEG_TXP6_L3 C267 *0.1u/10V_4 PEG_TXP6_L3_N 13 PETn3 NOTCH/3.3V 14 C365 0.1u/10V_4

n
[9] PEG_TXP6_L3 PETp3/NOTCH NOTCH/3.3V
15 16
SATA_RXN1/PEG_RXN6_L2 R312 *0_4 PEG_RXN6_L2_N 17 GND/NOTCH NOTCH/3.3V 18
[9] SATA_RXN1/PEG_RXN6_L2 PERn2/NOTCH NOTCH/3.3V
[9] SATA_RXP1/PEG_RXP6_L2 SATA_RXP1/PEG_RXP6_L2 R311 *0_4 PEG_RXP6_L2_N 19 20
21 PERp2/NOTCH NC 22
SATA_TXN1/PEG_TXN6_L2 C148 *0.1u/10V_4 PEG_TXN6_L2_N 23 GND/CONFIG_0 NC 24
[9] SATA_TXN1/PEG_TXN6_L2 PETn2 NC

a
[9] SATA_TXP1/PEG_TXP6_L2 SATA_TXP1/PEG_TXP6_L2 C149 *0.1u/10V_4 PEG_TXP6_L2_N 25 26
27 PETp2 NC 28
PEG_RXN6_L1 R503 0_4 PEG_RXN6_L1_N 29 GND NC 30
[9] PEG_RXN6_L1 PERn1 NC
[9] PEG_RXP6_L1 PEG_RXP6_L1 R505 0_4 PEG_RXP6_L1_N 31 32
33 PERp1 NC 34
PEG_TXN6_L1 C291 0.1u/10V_4 PEG_TXN6_L1_N 35 GND NC 36
[9] PEG_TXN6_L1

u
PEG_TXP6_L1 C299 0.1u/10V_4 PEG_TXP6_L1_N 37 PETn1 NC 38 DEVSLP_N1 R199 *short_4DEVSLP0
[9] PEG_TXP6_L1 PETp1 DEVSLP DEVSLP0 [11]
39 40 R201 *10K_4
SATA_RXP3/PEG_RXP6_L0 R516 0_4 SATA_RXP3/PEG_RXP6_L0_N 41 GND NC 42
[9] SATA_RXP3/PEG_RXP6_L0 PERn0/SATA-B+ NC
[9] SATA_RXN3/PEG_RXN6_L0 SATA_RXN3/PEG_RXN6_L0 R519 0_4 SATA_RXN3/PEG_RXN6_L0_N 43 44
45 PERp0/SATA-B- NC 46
SATA_TXN3/PEG_TXN6_L0 C310 0.1u/10V_4 SATA_TXN3/PEG_TXN6_L0_N 47 GND NC 48
[9] SATA_TXN3/PEG_TXN6_L0 PETn0/SATA-A- NC
[9] SATA_TXP3/PEG_TXP6_L0 SATA_TXP3/PEG_TXP6_L0 C314 0.1u/10V_4 SATA_TXP3/PEG_TXP6_L0_N 49 50 NGFF1_RST# R205 *short_4
PLTRST#
51 PETp0/SATA-A+ PERST# 52 PCIE_CLKREQ_NGFF1#
GND CLKREQ# PCIE_CLKREQ_NGFF1# [10]

Q
[10] CLK_PCIE_NGFF1_N CLK_PCIE_NGFF1_N 53 54
CLK_PCIE_NGFF1_P 55 REFCLKn PEWake# 56
[10] CLK_PCIE_NGFF1_P REFCLKp N/C
57 58
NGFF3_DET 59 GND N/C 60
[9] NGFF3_DET +3V3_SATA_N1 NOTCH NOTCH
61 62
NOTCH NOTCH
3

63 64
Q16 R227 1M_4 65 NOTCH NOTCH 66 +3V3_SATA_N1
67 NOTCH NOTCH 68
A
2 NGFF3_PEDET 69 NC SUSCLK(32KHz) 70 A
71 PEDET 3.3V 72
73 GND 3.3V 74
2N7002K 75 GND 3.3V
GND
GND

GND
1

NGFF_SSD Quanta Computer Inc.


76
77

PROJECT : ZS8
Size Document Number Rev
1A
NGFF SSD

www.vinafix.vn
Date: W ednesday, August 13, 2014 Sheet 22 of 35
5 4 3 2 1
5 4 3 2 1

l
HDMI Cost Reduced level shift (HDM) HDMI connector (HDM)

a
CN2
20

i
CN_HDMI_TXP2 1 SHELL1 22
HDMI_TXN2C34 0.1u/10V_4 CN_HDMI_TXN2 2 D2+ SHELL3

t
[2] HDMI_TXN2 D2 Shield
[2] HDMI_TXP2 HDMI_TXP2C46 0.1u/10V_4 CN_HDMI_TXP2 CN_HDMI_TXN2 3
D
CN_HDMI_TXP1 4 D2- D
HDMI_TXN1C48 0.1u/10V_4 CN_HDMI_TXN1 5 D1+
[2] HDMI_TXN1 D1 Shield

n
[2] HDMI_TXP1 HDMI_TXP1C51 0.1u/10V_4 CN_HDMI_TXP1 CN_HDMI_TXN1 6
CN_HDMI_TXP0 7 D1-
HDMI_TXN0C29 0.1u/10V_4 CN_HDMI_TXN0 8 D0+
[2] HDMI_TXN0 D0 Shield

e
[2] HDMI_TXP0 HDMI_TXP0C30 0.1u/10V_4 CN_HDMI_TXP0 CN_HDMI_TXN0 9
CN_HDMI_CLKP 10 D0-
HDMI_CLKNC26 0.1u/10V_4 CN_HDMI_CLKN 11 CK+
[2] HDMI_CLKN CK Shield
[2] HDMI_CLKP HDMI_CLKPC28 0.1u/10V_4 CN_HDMI_CLKP CN_HDMI_CLKN 12

d
C177 *1000p/50V_4 13 CK-
C27 *1000p/50V_4 14 CE Remote

i
R354 470_4 HDMI_DDCCLK_CN 15 NC
R350 470_4 +5V +5V_HDMI HDMI_DDCDAT_CN 16 DDC CLK

f
+3V3 R363 470_4 Q3 17 DDC DATA
R359 470_4 3 1 18 GND
R389 470_4 IN OUT 2 C7 0.1u/10V_4 19 +5V 23
GND HP DET SHELL4
2

n
R385 470_4 D1 *14V/100p_4 21
Q9 R380 470_4 AP2331SA-7 SHELL2
C C
1 3 R373 470_4 HDMI
HDMI_HPD_CN

o
2N7002K
8/6 change footprint

C
HDMI DDC (HDM) +3V3
D2
+5V +3V3
D3
+5V

R52 R27 RB500V-40 R53 R29 RB500V-40

a
2

2
t
2.2K_4 Q6 2.2K_4 2.2K_4 Q7 2.2K_4
[2] HDMI_DDCDAT HDMI_DDCDAT 1 3 HDMI_DDCDAT_CN [2] HDMI_DDCCLK HDMI_DDCCLK 1 3 HDMI_DDCCLK_CN
B B

n
BSN20 BSN20

HDMI-detect (HDM)

a
+3V3 +3V3

R343 1M_4
2

u
Q18
[2] HDMI_HPD HDMI_HPD 1 3 HDMI_HPD_CN_R R348 *short_4
HDMI_HPD_CN

2N7002K R349 20K_4

Q
D17 *0.2pF/5V_4

A EMI (EMC)
CN_HDMI_TXP2 CN_HDMI_TXP1 CN_HDMI_TXP0 CN_HDMI_CLKP Quanta Computer Inc. A

R92 R110 R73 R59


PROJECT :ZS8
Size Document Number Rev
*100/F_4 *100/F_4 *100/F_4 *100/F_4 1A
CN_HDMI_TXN2 CN_HDMI_TXN1 CN_HDMI_TXN0 CN_HDMI_CLKN HDMI
5 4
www.vinafix.vn 3
Date: Wednesday, August 13, 2014
2
Sheet 23
1
of 35
5 4 3 2 1

l
USB 3.0 Port0 (UB3)
+5V_PCU +5V_PCU_USB3_P0

a
U8 +
C64 1u/6.3V_4 2 8 C60 150u/6.3V_3528
+5V_PCU_USB3_P0 3 IN1 OUT3 7 C61 1000p/50V_4

i
CN4 IN2 OUT2 6
L11 MCM2012B900GBE/0.4A/90 1 USB_BC_EN R168 *short_4 4 OUT1
4 3 USB2N0_USB3 2 1 VBUS 1 EN#
[10] USB2N0 USB2N0 R171 *0_4 USB2N0_R

t
D 2 D- GND D
[10] USB2P0 USB2P0 R163 *0_4 USB2P0_R 1 2 USB2P0_USB3 3 5 R133 0_4 USB_OC0#
4 3 D+ OC# USB_OC0# [10]
USB3_RXN1 R469 15_4 USB3_RXN1_USB3 5 4 GND APL3510BXI
[10] USB3_RXN1 5 SSRX-
[10] USB3_RXP1 USB3_RXP1 R466 15_4 USB3_RXP1_USB3 6
7 6 SSRX+
7 GND

n
[10] USB3_TXN1 USB3_TXN1 C237 0.1u/10V_4 USB3_TXN1_R R426 15_4 USB3_TXN1_USB3 8
USB3_TXP1 C235 0.1u/10V_4 USB3_TXP1_R R424 15_4 USB3_TXP1_USB3 9 8 SSTX-
[10] USB3_TXP1 9 SSTX+

13
12
11
10
C251 *1.6P/50V_4 C234 *1.6P/50V_4
C259 *1.6P/50V_4 C239 *1.6P/50V_4 USB3.0 CONN USB2P0_USB3 D20 *0.2pF/5V_4

e
13
12
11
10
USB2N0_USB3 D21 *0.2pF/5V_4

USB3_RXN1_USB3 D23 *0.2pF/5V_4


USB3_RXP1_USB3 D22 *0.2pF/5V_4

d
USB3_TXN1_USB3 D19 *0.2pF/5V_4
USB3_TXP1_USB3 D18 *0.2pF/5V_4

i
8/6 Del L10,L12

f
C C

USB 3.0 Port1 (UB3)

n
+5V_S5 +5V_S5_USB3_P1
U10 +
C99 1u/6.3V_4 2 8 C85 150u/6.3V_3528

o
+5V_S5_USB3_P1 3 IN1 OUT3 7 C76 1000p/50V_4
CN5 IN2 OUT2 6
L15 MCM2012B900GBE/0.4A/90 1 USBON# R220 *short_4 4 OUT1
1 VBUS [16,25] USBON# EN#
[10] USB2N1 USB2N1 1 2 USB2N1_USB3 2 1
4 3 3 2 D- GND 5
[10] USB2P1 USB2P1 USB2P1_USB3 R200 USB_OC0#
*short_4
4 3 D+ OC#
USB3_RXN2 R528 15_4 USB3_RXN2_USB3 5 4 GND APL3510BXI

C
[10] USB3_RXN2 5 SSRX-
USB3_RXP2 R526 15_4 USB3_RXP2_USB3 6
[10] USB3_RXP2 6 SSRX+
7
USB3_TXN2 C275 0.1u/10V_4 USB3_TXN2_R R504 15_4 USB3_TXN2_USB3 8 7 GND
[10] USB3_TXN2 8 SSTX-
USB3_TXP2 C269 0.1u/10V_4 USB3_TXP2_R R502 15_4 USB3_TXP2_USB3 9
[10] USB3_TXP2 9 SSTX+

13
12
11
10
C317 *1.6P/50V_4 C268 *1.6P/50V_4
C337 *1.6P/50V_4 C286 *1.6P/50V_4 USB3.0 CONN USB2P1_USB3 D31 *0.2pF/5V_4

13
12
11
10
USB2N1_USB3 D33 *0.2pF/5V_4

a
B B
USB3_RXN2_USB3 D35 *0.2pF/5V_4

t
USB3_RXP2_USB3 D34 *0.2pF/5V_4

USB3_TXN2_USB3 D30 *0.2pF/5V_4


USB3_TXP2_USB3 D29 *0.2pF/5V_4

n
8/6 del L13,L16

a
CB SELCDP Funcion
USB Charger for USB3.0 Port0 (UBC) +3V3_PCU +3V3_PCU 0 X DCP autodetect with mouse/keyboard wakeup

u
C265 0.1u/10V_4 R490 47K_4 1 0 S0 charging with SDP only

5
U21 1 1 S0 charging with CDP or SDP only (depending on external device)
U17 2 BC_CEN
USB_CHARGE_ON R446 USB_CR_ON
*short_4 8 1 BC_CEN USB_BC_EN 4
[16] USB_CHARGE_ON CB1 CEN
USB2N0 7 2 USB2N0_R 1 USB_BC_ON USB_BC_ON [16]
A USB2P0 6 TDM DM 3 USB2P0_R A
5 TDP DP 4 TC7SH08FU

Q
3
9 VDD SELCDP
Thermal Pad
+5V_PCU SLG55584A R481 *0_4 Quanta Computer Inc.
C240 0.1u/10V_4 R433 10K_4
PROJECT : ZS8
Size Document Number Rev
1A
USB3.0/FAN
Date: Wednesday, August 13, 2014 Sheet 24 of 35
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

l
Sersor Board Connector (UIF) +3V3 +3V3_CCD +5V +5V_TS
Touch Pad Connector (TPD)
R90 *SHORT_6 R101 *SHORT_6
C44 C43 C50 C49
+3V3_SUS
+3V3 +3V3_SER *0_6 R323 +TPVDD

a
1u/6.3V_4 0.1u/10V_4 1u/6.3V_4 0.1u/10V_4 +3V3 VIN +TPVDD +3V3_S5
R67 *0_8
R325 *short_41 3 +TPVDD
+3V3_S5 Q19 AO3413

i
6/26 add R785 R784
+
1 3 R783 *1M_6 *22_8 R775 Q53 C160

2
*10K_4 AO3413 C712 0.1u/10V_4

PTP_PWR_EN#
+3V3_SER 0.22u/25V_6

t
D R79 C32 C31 +3V3_SER 100K_4 D

3
SENSOR_SCL R787 2.2K_4 [16] PTP_PWR_EN# R781 *short_4

3
SENSOR_SDA R788 2.2K_4 +3V3_CCD CN7
100K_4 1u/6.3V_4 0.1u/10V_4 1
SENSOR_EN R780 *short_4 C219 C229 +5V_TS 2 1 2 2 2 C713
[16] SENSOR_EN 3 2
3 *1000p/50V_4
4 R786 Q56

n
C714 *10p/50V_4 *10p/50V_4 5 4 *1M_6 *2N7002K

1
TS_INT 6 5 Q54 Q55
*1000p/50V_4

1
TS_RST# 7 6 *DTC144EU *DTC144EU +TPVDD
[16] TS_RST# 8 7
9 8 +TPVDD
Touch Screen I2C_TS_SDA
I2C_TS_SCL 10 9
R568
R569
10K_4
10K_4 CN15

e
11 10 1
SENSOR_SCL 12 11 TPCLK R573 *short_4 TPCLK_R 2
[16] SENSOR_SCL 12 [16] TPCLK
[16] SENSOR_SDA SENSOR_SDA 13 [16] TPDATA TPDATA R572 *short_4 TPDATA_R 3
14 13 4
USB2P5 R411 *short_4
USB2P5_C 15 14 C407 *0.1u/10V_4 I2C_TP_SDA 5
[10] USB2P5 15
+3V3 CCD [10] USB2N5 USB2N5 R414 *short_4
USB2N5_C 16
17 16 24
C408 *0.1u/10V_4 I2C_TP_SCL
TPD_INT#
6
7 9

d
17 24 [2,16] TPD_INT#
[10] USB2P6 USB2P6 R415 *short_4
USB2P6_C 18 23 [16] TPD_EN TPD_EN 8 10
19 18 23 22
R387 *10K_4 TS_RST#
Touch Screen [10] USB2N6 USB2N6 R419 USB2N6_C
*short_4
20 19
20
22
21
21 +TPVDD TP

i
Sensor DB R580 10K_4 TPD_EN +TPVDD
+3V3 +3V3 +3V3
+3V3 Q25 R575 2.2K_4
Q8 R398 *2.2K_4 5 R576 2.2K_4

f
2

Q21 5 R388 *2.2K_4


[11] PCH_I2C1_DAT PCH_I2C1_DAT 4 3 I2C_TP_SDA
[11] TS_INT_PCH TS_INT_PCH 3 1 TS_INT PCH_I2C1_DAT 4 3 I2C_TS_SDA

2
C C
2N7002K 2

n
R379 *0_4 [11] PCH_I2C1_CLK PCH_I2C1_CLK 1 6 I2C_TP_SCL
PCH_I2C1_CLK 1 6 I2C_TS_SCL

2N7002DW
*2N7002DW
R571 *0_4
R400 0_4 R581 *0_4

o
R397 0_4

USB Board Connector (UB2) Keyboard Connector (KBC) LED Board Connector (UIF)
CP1 *100p/50Vx4
7 8 MX5
+5V_S5 +5V_S5_USB2 5 6 MX6 +3V3_PCU

C
U22 3 4 MX7 CN16
C80 1u/6.3V_4 2 8 C363 10u/6.3V_6 1 2 MX4 MX7 24 25
IN1 OUT3 [16] MX7 +3V3_S5 +3V3_PCU
3 7 C364 0.1u/10V_4 CP2 *100p/50Vx4 RP1 10K_10P8R MX6 23 26
IN2 OUT2 [16] MX6
6 7 8 MX0 10 1 MX0 MX5 22
OUT1 [16] MX5
USBON# R202 *short_4 4 5 6 MX1 MX7 9 2 MX1 MY0 21
[16,24] USBON# EN# [16] MY0
1 3 4 MX2 MX6 8 3 MX2 MY1 20 C162 C159 C153 C150
GND [16] MY1
5 R213 *short_4
USB_OC1# 1 2 MX3 MX5 7 4 MX3 MY2 19
OC# USB_OC1# [10] [16] MY2
CP3 *100p/50Vx4 MX4 6 5 MX4 18
+3V3 [16] MX4
APL3510BXI 7 8 MY3 MY3 17 1u/6.3V_4 0.1u/10V_4 1u/6.3V_4 0.1u/10V_4
+5V [16] MY3
5 6 MY2 MY4 16

a
[16] MY4
3 4 MY1 MY5 15
[16] MY5
C120 C371 1 2 MY0 MY6 14
[16] MY6
C114 C369 CP4 *100p/50Vx4 MY7 13
[16] MY7
7 8 MY7 MY8 12

t
[16] MY8
B 1u/6.3V_4 0.1u/10V_4 5 6 MY6 MX3 11 B
[16] MX3 +3V3_PCU
1u/6.3V_4 0.1u/10V_4 3 4 MY5 MY9 10
[16] MY9 +3V3_S5
1 2 MY4 MX2 9 CN18
+3V3 [16] MX2
CP5 *100p/50Vx4 MX1 8 1
[16] MX1
7 8 7 2
3/14 modify 5 6
MY11
MY10
[16] MY10
MY10
MY11 6 LID2# 3
[16] MY11 [16] LID2#
3 4 MY9 MX0 5 PWRLED# 4

n
[16] MX0 [16] PWRLED#
1 2 MY8 MY12 4 [16] SUSLED# SUSLED# 5
+5V_S5_USB2 [16] MY12
Q17 R552 10K_4 +3V3 CP6 *100p/50Vx4 MY13 3 [16] BATLED0# BATLED0# 6
[16] MY13
5 R559 10K_4 CN12 7 8 MY15 MY14 2 [16] BATLED1# BATLED1# 7 9
[16] MY14
1 5 6 MY14 MY15 1 8 10
[16] MY15
2ND_MBCLK 3 4 EL_SCL_C 2 3 4 MY13
3 1 2 MY12 KB LED DB
4

a
2 +5V 5
+3V3 6 8/6 change footprint
2ND_MBDATA 6 1 EL_SDA_C 7
8
9
2N7002DW 10
11

u
12
13
CPU FAN (THM) Reset SW (FSW)
[16,26] NBSWON# NBSWON# 14
15

DB USB2.0 [10]
[10]
USB2N3
USB2P3
USB2N3
USB2P3
R540
R544
*short_4
USB2N3_C
USB2P3_C
*short_4
16
17
18 2
SW1
Reset Switch
3
+5V +5V_FAN
Card Reader [10]
[10]
USB2N7
USB2P7
USB2N7
USB2P7
R545
R547
*short_4
USB2N7_C
*short_4
USB2P7_C
19
20 CN3
4 1 SYS_SHDN#
SYS_SHDN# [11,28,33]

1
Q
21 R159 *short_8 1 C176 D16

6
2ND_MBCLK R554 *0_4 EL_SCL_C 22 2 1
[9,16] 2ND_MBCLK +3V3 2 6
[9,16] 2ND_MBDATA 2ND_MBDATA R555 *0_4 EL_SDA_C 23 3
A
24 4 3 5 0.1u/10V_4 *14V/100p_4 A

2
R157 10K_4 4
USB DB [16] FANSIG FANSIG FAN
+5V

R158 10K_4
Q12 MMBT3904
[16] FAN_PWM
FAN_PWM 1 3 Quanta Computer Inc.
+3V3
PROJECT : ZS8
2

R165 1K_4 Size Document Number Rev


1A
KB/TP/DB/FAN/Reset SW
Date: Wednesday, August 13, 2014 Sheet 25 of 35
5 4 3 2 1

www.vinafix.vn
5 4 3 2 1

l
CN1

[5] XDP_PREQ#
XDP_PREQ#
31
32 31
32
30
29
30
29 NOA_STBP_0
NOA_STBP_0 [7]
+3V3_S5 XDP/ APS (CPU)
XDP_PRDY# 33 28 NOA_STBN_0 H_SYS_PWROK_XDP R5 *1K_4
[5] XDP_PRDY# 34 33 28 27 NOA_STBN_0 [7]

a
CFG0 35 34 27 26 CFG8 +3V3
[7] CFG0 CFG1 36 35 26 25 CFG9 CFG8 [7]
[7] CFG1 36 25 CFG9 [7]

i
37 24 XDP_DBRESET_N R56 *1K_4
CFG2 38 37 24 23 CFG10
[7] CFG2 CFG3 39 38 23 22 CFG11 CFG10 [7] +1V05_S5

t
[7] CFG3 40 39 22 21 CFG11 [7]
D XDP_BPM#0 41 40 21 20 NOA_STBP_1 XDP_TDO_PCH R54 *51_4 D
[5] XDP_BPM#0 XDP_BPM#1 42 41 20 19 NOA_STBN_1 NOA_STBP_1 [7]
[5] XDP_BPM#1 43 42 19 18 NOA_STBN_1 [7] XDP_RST_R_N R57 *1K_4 PLTRST#
43 18 PLTRST# [8,16,17,20,22]
CFG4 44 17 CFG12

n
[7,9] CFG4 CFG5 45 44 17 16 CFG13 CFG12 [7] XDP_DBRESET_N R55 *0_4 SYS_RESET#
[7] CFG5 46 45 16 15 CFG13 [7]
CFG6 47 46 15 14 CFG14
[7] CFG6 CFG7 48 47 14 13 CFG15 CFG14 [7]

e
[7] CFG7 49 48 13 12 CFG15 [7] VCCST_PWRGD_XDP R6 *1K_4 HWPG_1.05V_S5
49 12 HWPG_1.05V_S5 [6,16,30]
VCCST_PWRGD_XDP 50 11 CLK_PCIE_XDPP CLK_PCIE_XDPP [10]
NBSWON# 51 50 11 10 CLK_PCIE_XDPN H_SYS_PWROK_XDP R4 *0_4 SYS_PWROK
51 10 CLK_PCIE_XDPN [10] SYS_PWROK [8]
52 9
PWR_DEBUG 53 52 9 8 XDP_RST_R_N

d
[6] PWR_DEBUG 53 8
H_SYS_PWROK_XDP 54 7 XDP_DBRESET_N
55 54 7 6
CLK_SDATA 56 55 6 5 XDP_TDO_PCH

i
[9,14] CLK_SDATA 56 5
[9,14] CLK_SCLK CLK_SCLK 57 4 XDP_TRST_N
XDP_TCK_PCH 58 57 4 3 XDP_TDI_PCH +3V3
[9] XDP_TCK_PCH 58 3

f
[5,9] XDP_TCK_CPU XDP_TCK_CPU 59 2 XDP_TMS_PCH
60 59 2 1 C12 *0.1u/10V_4
60 1 U4
*XDP 14
VCC

n
[9] XDP_TDO_PCH XDP_TDO_PCH 2 3 XDP_TDO_CPU XDP_TDO_CPU [5]
C 1A 1B C

1
+3V3_S5_DEEP +3V3_PCU 1OE
XDP_TDI_PCH 5 6 XDP_TDI_CPU

o
[9] XDP_TDI_PCH 2A 2B XDP_TDI_CPU [5]
APS1 R195 *0_6 APS3 R194 *0_6
4
2OE
APS7 R196 *0_6 [9] XDP_TMS_PCH XDP_TMS_PCH 9 8 XDP_TMS_CPU XDP_TMS_CPU [5]
3A 3B
10
3OE

C
APS1 R198 *0_6 APS3 R197 *0_6 APS7
XDP_TRST_N 12 11 XDP_TRST# XDP_TRST# [5,9]
CN11 4A 4B
1 APS1 13
1 2 APS2 R500 *0_4 SUSB# 4OE 15
2 3 APS3 SUSB# [8,16] DPAD
3 4 APS4 R499 *0_4 PCH_SLP_S5# 7
4 5 APS5 R498 *0_4 SUSC# PCH_SLP_S5# [8] GND

a
5 6 APS6 R497 *0_4 PCH_SLP_A# SUSC# [8,16] *74CBTLV3126
6 7 APS7 PCH_SLP_A# [8]
7

t
8
8 9 APS9 R496 *0_4 RTC_RST# +1V05 U1
9 10 RTC_RST# [9]
10 11 APS11 R495 *0_4 NBSWON# C1 *0.1u/10V_4 5 1
B B
11 12 NBSWON# [16,25] VCC NC

n
12 13 APS13 R494 *0_4 SYS_RESET#
13 14 SYS_RESET# [8] +3V3 2 VCCST_PWRGD
14 CLIP13 A VCCST_PWRGD [6]
15 APS15 R493 *0_4 PCH_SLP_S0#
15 16 PCH_SLP_S0# [8] R15 *10K_4
16 17 1 4 3

a
17 18 PAD Y GND
18
*APS *74AUP1G07GW
emipad63x56

u
HOLE9
CLIP1 CLIP3 CLIP2
HOLE11 HOLE2 HOLE1 HOLE5 HOLE10 HOLE7 HOLE3 HOLE16
Holes (OTH)
CLIP4
2

SUL-12A2M *SUL-12A2M SUL-12A2M 3 2 CLIP8


*H-C150D150N

Q
1

3
HOLE4 *SUL-12A2M

3
*H-C236D102P2 *H-TC236BC197D102P2 *H-C236D102P2 *H-C236D102P2 *H-C150D150N *SUL-12A2M
1

1
HOLE6
CLIP5 CLIP6 CLIP10 *H-C150D150N *H-O98X79D98X79N *h-c87d87n

A HOLE14 HOLE13 HOLE12 HOLE8 MBZS8001010 A


2

*SUL-12A2M SUL-12A2M SUL-12A2M HOLE15


*H-C150D150N
1

CLIP11 CLIP9 CLIP7 *H-C236D102P2 *H-C236D102P2 *H-C236D102P2 *H-C236D102P2


CLIP12
HOLE18 Quanta Computer Inc.
1

1 FBAJ2003010
PROJECT : ZS8

1
PAD
2

*SUL-12A2M *SUL-12A2M SUL-12A2M Size Document Number Rev


*H-O98X79D98X79N 1A
XDP/ APS /Holes
1

emipad63x56
Date: Wednesday, August 13, 2014 Sheet 26 of 35

www.vinafix.vn
5 4 3 2 1
5 4 3 2 1

30

l
VA2 PR150
VA1 PQ35 PD3 0.01/F_0612 PQ36
DC-IN Change pin define 0114 PL7 AOL1413 SBR1045SP5-13 VIN AOL1413
4 HCB2012VF-800T50 1 1 1
4 3 VA 2 5 3 1 2 2 5
5 3

a
2 3 2 3
6 2 1 PR151
1

1
*Short_4
PJ1 PC55 PC56 PR49 24737_ACN PC119 PC120 PR154

4
0.1u/50V_6 0.1u/50V_6 220K_4 0.1u/50V_6 2200p/50V_6 33K/F_4
PL6 PD4
HCB2012VF-800T50 SMAJ20A 24737_ACP

2
t
D D
PC96 PC100 PR146
0.1u/50V_6 2200p/50V_6 1 6 *Short_4

PD1 PR33 2 5 PR63


D/C# [16]
1N4148WS 220K_4 10K_4
recommend 200mA at least. 3 4 PR34

n
*Short_4
PQ8

3
IMD2AT108

e
2
24737_ACP
PQ14
2N7002K
24737_ACN

1
d
PC66 PC67 PC65
0.1u/50V_6 0.1u/50V_6 0.1u/50V_6
PR74

i
*Short_6 PR73
+3V3_PCU 63.4K/F_4

1
VIN

f
PR72 PC132

ACP

ACN
10K/F_4 1u/16V_6
C 24737_ACDET 6 16 24737_REGN C
ACDET REGN
PR166 PR155 PR160 PC126
*10K_4 100K_4 100K_4 0.1u/25V_4 PD8

n
24737_VCC 20 RB500V-40
VCC PR163 PC130 PC131
PR67 PC127 *Short_6 2200p/50V_6 4.7u/25V_8
20_1206 0.47u/25V_6 17 24737_BST
[16] ACIN BTST

5
PC129

o
47n/50V_6
[8] ACPRESENT
PQ38
PR161 18 24737_DH 4 MDV1528
HIDRV
6

*0_4 5
[16] SB_ACDC ACOK#
PR165 19 24707_LX
PHASE

3
2
1
*Short_4 PR159
0.01/F_0612

C
MBDATA 8 PU11 PL10
PQ37 SDA BQ24737RGRR 6.8uH_7X7X1.8
2N7002DW PR162 15 24737_DL 1 2 BAT-V
1

*Short_4 LCDRV
PC121 MBCLK 9
SCL

5
0.1u/50V_6
+3V3_PCU PR164
PR170 *Short_4 14 PR75
PC122 PL8 10K_4 PGND *4.7_6
*100p/50V_4 24737_BM# 11 4 PR173 PR174

a
HCB2012VF-800T50 BM# PQ39 *Short_4
B *Short_4 B
PR156 PC134 MDV1528
PL9 10K_4 24737_CMPOUT 3 PR171 10_6 0.1u/25V_4
CMPOUT

3
2
1
t
BAT-V 13 24737_SRP 24737_SRP PC123 PC124 PC125
HCB2012VF-800T50 SRP PC70 2200p/50V_6 10U/25V_8 10U/25V_8
24737_ILIM 10 PC136 *680p/50V_6 24737_SRN
C114F3-108A1-L_Batt_Conn

PJ2 ILIM 0.1u/25V_4


PR65 *Short_4 PR167 PR172 7.5_6
9 8 316K/F_4 24737_CMPIN 4 12 24737_SRN
7 CMPIN SRN

n
6 PR66 100_4 TEMP_MBAT

IOUT

GND
GND
GND
GND
GND
5 TEMP_MBAT [16]
PC135
4 0.1u/25V_4
3 PR169 PR158
+3V3_PCU

21
22
23
24
25
2 PR69 1M_4
10 1 100K/F_4
*100K_4

a
PC69 PC68
*47p/50V_4 *47p/50V_4 +3V3

PR168 PC133
100K/F_4 0.01u/25V_4
REGN MAX voltage 6.5V

u
3

PR64
PR71
100_4
PR70
100_4 PR68
*100K_4 V_ILIM=20*(VSRP-VSRN)=20*Ichg*Rsr
24737_BM# 2
MBCLK [16]
57.6K/F_4 PR157
*0_4
=0.793V for 3.965A current limit
H_PROCHOT# [5,16,31]
PQ16

3
A MBDATA [16]
*2N7002K
[16] ICMNT Pin10 ILIM=0.793V A
Rsr = 0.01ohm
1

Q
PU6 24737_CMPOUT 2
*CM1293A-04SO
1 6 MBDATA PC128 PQ15
CH1 CH4 100p/50V_4 2N7002K
2
VN VP
5
+3V3_PCU Quanta Computer Inc.
1
TEMP_MBAT 3 4 MBCLK PR176
CH2 CH3 *Short_4 PROJECT : ZS8
Add ESD diode base on EC FAE suggestion
[16] AC_Protect Limit set on 45W/2.36A Size Document Number Rev
1A
7/2 Populate these parts for AC protect function Charger(BQ24707A)
Date: Wednesday, August 13, 2014 Sheet 27 of 35
5 4 3 2 1

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5 4 3 2 1

l
SYS_SHDN#

31
SYS_SHDN# [11,25,33]
MAIND
MAIND [30,32]

JP5
*Short_3720

a
SYS_SHDN#
3VPCU_VIN 1 2 VIN
VIN +3V3_SUS +15V VIN +3V3_PCU

2200p/50V_6
i
4.7u/25V_8

4.7u/25V_8

4.7u/25V_8

4.7u/25V_8
PR37
*Short_4
D PR45 PR30 PR46 PR53 PR55 D

t
*499K/F_4 PR20 1M_6 22_8 1M_6 *1M_6

3
1/F_6
670_BST 670_BST1
+3V3_PCU

PC61

PC53
PC102

PC106

PC103
2
PC50

3
*0.1U/10V_4

10
1
PR44 PC42 +3V3_PCU PQ12
2014/1/21 Choke change to 7X7X3 +3V3_PCU

n
100K/F_4 0.1u/50V_6 PL4 2 AO3404

VIN

BST

1
[16,29,32] SUSON
670_EN 13 8 670_SW
2.2uH_7X7X3
1 2
3.3 Volt +/- 5% 2 2
EN SW1 TDC : 4.7A PR29 PQ7 PQ10
+3V3_SUS

1
SYS_HWPG PR40 *Short_4670PG 4 9
[16] SYS_HWPG PG SW2 PEAK : 6.3A PQ3
DTC144EU
1M_6 2N7002K 2N7002K
PC64

0.1u/50V_6

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

*22u/6.3V_8

1
3 15 JP8 Width : 200mil *2.2n/50V_4

e
+3V_LDO LP# PU3 SW3 PR138 *Short_3720
PR35 *0_4 670_ENLDO 12 NB670GQ-Z 16 *4.7_6
ENLDO SW4
SYS_SHDN# 6 7
LDO VOUT
PR31 10K/F_4 14 2
PC97 AGND PGND PC94

PC24

PC88

PC90

PC20

PC26

PC21
VCC
CLK

d
10u/6.3V_6 PC28 *680p/50V_6
*0.1u/16V_4

11
LDO(MAX)=100mA

i
670_CLK

PC45

f
1u/6.3V_4
C C
PC108 PC109 PC110
0.1u/50V_6 0.1u/50V_6 0.1u/50V_6

VIN +3V3_S5 +5V_S5 +15V VIN +5V_PCU +3V3_PCU


PD5 PD6 PD7
3

3
1PS302 1PS302 1PS302

n
PR142 PR52 PR54 PR50 PR38 PR47

5
1M_6 22_8 22_8 1M_6 *1M_6

3
1

*Short_6
+15V
S5D 4 S5D 2
PQ30

o
3

3
PR145 PC113 PC111 PC112 MDV1528Q
22_8 0.1u/50V_6 0.1u/50V_6 0.1u/50V_6 PQ27

3
2
1
2 AO3404
[16,30,33] S5ON

1
2 2 2
+5V_S5 +3V3_S5
PR48 PQ11 PQ9 PQ6

1
PQ13 1M_6 2N7002K 2N7002K 2N7002K
DTC144EU PC47
TDC : 2.81A TDC : 0.153A

1
JP4 *2.2n/50V_4
*Short_3720 PEAK : 3.74A PEAK : 0.204A

C
Width : 120mil Width : 20mil
5VPCU_VIN 1 2 VIN
2200p/50V_6

4.7u/25V_8

4.7u/25V_8

4.7u/25V_8

4.7u/25V_8

15u/25V_7343
B + +5V_PCU +3V3_PCU B

PC107
PR41 PR21
*499K/F_4 1/F_6

2
671_BST 671_BST1

a
PC57

PC51

PC98
PC105

PC101

5
3
10
1

+5V_PCU

t
PC41
0.1u/50V_6 PL3 2014/1/21 Choke change to 7X7X3 MAIND 2 MAIND 4
VIN

BST

2.2uH_7X7X3 PQ25
671_EN 13 8 671_SW 1 2 MDV1528Q
PR22 *Short_4 EN SW1 PQ31

3
2
1
SYS_HWPG 671PG 4 4/23 modify 9 AO3404

1
PG SW2
0.1u/50V_6

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

*22u/6.3V_8
3 15 JP7
+5V_PCU

n
LP# SW3 +5V +3V3
PR32 *Short_4 PU2 PR135 *Short_3720
SYS_SHDN# 5
NC1
NB671GQ-Z
SW4
16 *4.7_6 5 Volt +/- 5%
6 7 TDC : 4.7A TDC : 0.33A TDC : 4A
NC2 VOUT
PC99 PR26 14 2 PEAK : 6.3A PEAK : 0.44A PEAK : 5.32A
*0.1U/10V_4 *Short_4 AGND PGND PC93 Width : 200mil Width : 20mil Width : 160mil
PC25

PC18

PC89

PC87

PC27

PC19
VCC

PC43 *680p/50V_6

a
FB

0.1u/16V_4
11

12

VL

u
PC44 671_FB
A A
1u/6.3V_4
VREF=0.604V PR137
82K/F_4
PR139
11K/F_4 PR140

*Short_6
Quanta Computer Inc.

Q
PROJECT : ZS8
Size Document Number Rev
1A
SYSTEM 3V/5V (NB670/671)
Date: Wednesday, August 13, 2014 Sheet 28 of 35
5 4 3 2 1

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5 4 3 2 1

l
TDC : 0.75A
PEAK : 1A
Width : 40mil
+DDR_VTT_RUN

32

i a
PC59 PC60
10u/6.3V_6 10u/6.3V_6
TDC : 0.53A

t
D D

PEAK : 0.7A DDR_VTTREF

Width : 40mil
Close to IC

n
Greater than or equal 40mil
PC54
0.22u/10V_4

e
+5V_PCU

+3V3 JP3
*Short_3720

d
PC58

22

21
10u/6.3V_6

2
PR42 PC40 51716_VIN 1 2
VIN

i
100K/F_4 1u/10V_4

PAD

PAD

VTTGND

VLDOIN
VTTSNS
VTTREF

VTT
+1.2V_SUS

f
5
20 12
1.2 Volt +/- 5%
C
[16] HWPG_1.2V PGOOD V5IN PC34 PC33 PC91 TDC : 3.6A C

PR36 51216_S3 17 14 51216_DRVH 4


2200p/50V_4 4.7u/25V_8 0.1u/50V_6
PEAK : 4.8A
[16,32] MAINON S3 DRVH
OCP : 6A

n
*0_4 PR18 PC39
2/F_6 0.1u/50V_6 PQ2 JP2
[16,28,32] SUSON
PR23 51216_S5 16 15 51216_VBST MDV1528 *Short_3720 Width : 150mil

3
2
1
*Short_4 S5 PU4 VBST PL2
TPS51716RUKR 1uH_7X7X3
PR39 51216_MODE 19 13 51216_SW +1.2VSUS_SRC 1 2 +1V2_SUS

o
12K/F_4 MODE SW

5
18 11

0.1u/50V_6

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8

22u/6.3V_8
51216_TRIP 51216_DRVL

*22u/6.3V_8

*22u/6.3V_8
PR28
TRIP DRVL +1V2_SUS [5,6,14,15]
60.4K/F_4
VDDQSNS

PR16
26 10 4 *4.7_6
PAD PGND
REFIN

C
GND
PAD

PAD

PAD
REF

PQ1
MDV1595S

3
2
1
VREF=1.8V PC22
6

25

24

23

PC38

PC37

PC30

PC36

PC31

PC29

PC35
*680p/50V_6
51216_REF
51216_REFIN

PC48 PR43

a
B 0.1u/10V_4 *Short_6 B
RDSon=14mohm

t
PR19
51216_S3 PR25 51216_S5 10K/F_4 Close to output cap
*0_4

51216_S3 PR27

n
DDR_VTTT_PG_CTRL [5]
*Short_4

PR24 PC46

a
20K/F_4 0.01u/25V_4 Mode Frequency Discharge mode

12K 670K Tracking Discharge

u
OCP=6A 1K 500K Tracking Discharge
L ripple current
=(19-1.2)*1.2/(1u*670k*19)
=1.678A
A A
Vtrip=6-(1.678/2)*14mohm S3 S5 +1.35VSUS REF VTT

Q
=72.254mV
Rlimit=72.254mV/10uA*8=57.8Kohm S0 1 1 ON ON ON Quanta Computer Inc.
S3 (mainon off) 0 1 ON ON OFF PROJECT : ZS8
Size Document Number Rev
1A
S4/S5 0 0 OFF OFF OFF LPDDR 1.2V (TPS51716)
Date: Wednesday, August 13, 2014 Sheet 29 of 35
5 4 3 2 1

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5 4 3 2 1

l 33
JP6

a
*Short_3720

i
+1V05_VIN 1 2 VIN
D D

t
+5V_PCU

+3V3

n
PC63 PC49 PC52
1u/10V_4 2200p/50V_6 4.7u/25V_8

5
PR56
*100K/F_4

7
PQ4

e
MDV1528

V5IN
51211V_DRVH 4
1 9 PR51 PC62 +1V05_S5
[6,16,26] HWPG_1.05V_S5 PGOOD DRVH 2014/1/21 Choke change to 7X7X3 +1V05_S5
*Short_6 0.1u/50V_6
51211V_EN 3 10 51211V_VBST PL5 1.05 Volt +/- 5%

d
[16,28,33] S5ON

3
2
1
PR147 *Short_4 EN VBST 2.2uH_7X7X3
51211V_TRIP 2 PU5
TRIP TPS51211DSCR SW
8 51211V_SW +1V05_SRC 1 2 TDC : 3.9A
PR57 69.8K/F_4
PEAK : 5.2A

i
51211V_TST 5 6 51211V_DRVL
TST DRVL
PR59 464K/F_4 OCP : 7A

5
12 11 JP9

f
C PR58 GND GND PR136 PR149 *Short_3720 Width : 160mil C

GND

GND

GND

GND
*100K/F_4 *4.7_6 5.1K/F_4

FB
4 +

13

14

15

16

4
PC32 PC23

n
51211V_FB 0.1u/50V_6 330u/2V_7343
PQ5 PC95

3
2
1
MDV1595S *680p/50V_6 PR148
10K/F_4
OCP=7A

o
L ripple current
=(19-1.05)*1.05/(2.2u*290k*19)
=1.555A
Vtrip=7-(1.555/2)*14mohm
=87.115mV VFB=0.7V

C
Rlimit=87.115mV/10uA*8=69.69Kohm +1V05_S5

B B

5
a
12/27 Sequence Modify
MAIND 4 PQ28

t
[28,32] MAIND
MDV1528Q

+3V3 VIN +1V05DX_MODPHY +15V +1V05_S5

3
2
1
+1V05DX_MODPHY +1V05

n 5
PR129 PR130 PR118
1

*1M_4 *22_8 *1M_4


+1V05
PR131
PR125 *Short_8
TDC : 2.12A

a
*100K_4 MODPHY_D 4
PQ26 PEAK : 2.82A
2

*MDV1528Q
Width : 100mil
3

PR122

3
2
1
*0_4 PR128

u
2 *1M_4 2 2 +1V05DX_MODPHY
A [11] MODPHY_EN PC85 A
TDC : 1.65A
1

PQ24 PQ22 *2.2n/50V_4


PQ23 *2N7002K *2N7002K PEAK : 2.19A
Quanta Computer Inc.
1

PC84 PR121 *PDTC143TT


Width : 80mil
1

*1u/10V_4 *100K_4
PROJECT : ZS8
2

Q
Size Document Number Rev
+1V05_S5 (TPS51211) 1A

Date: Wednesday, August 13, 2014 Sheet 30 of 35


5 4 3 2 1

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5 4 3 2 1

l
IMON offset
Place NTC close to the
4/23 remove JP1 for WIFI thermal issue 34

a
VIN
VIN +3V3_S5 51624_VREF
VCORE Hot-Spot. +5V_S5 +5V_S5

2200p/50V_4

15u/25V_7343
1
0.1u/50V_6

4.7u/25V_8

4.7u/25V_8
i
4/23 modify for remove JP1 +

PC5

PC6

PC1

PC3
PC12

PC13
100K/F_4_4250NTC
1u/10V_4

PR79
2M/F_4
D D

2
20/F_6
665K/F_4
36.5K/F_4

*90.9K/F_4

*39.2K/F_4
t

2
PR105

PR76

PR77

PR78

PR3

PR11

PR9

10K/F_4
1_6

PR82

VDD
51624_SKIP# 1 5 PL1 4/23 change for WIFI thermal issue
PR88 SKIP# VIN 0.15uH_7X7X4
51624_OCP-I 51624_VRON 51624_PWM1 8 4 CS_SW1 1 2
DCR= 0.66mOhm
PWM VSW +VCCIN
2M/F_4 CS_BSTR1 6 3

4
BOOT_R PGND

PC7
PC8

PR10
1n/50V_4
30K/F_4

1u/6.3V_4

20K/F_4

39K/F_4
100K/F_4

150K/F_4

2.26K/F_4
0.33u/6.3V_4
CS_BST1 7 9 +

1000p/50V_6 2.2_6
PR80

PR84

PR86

PR87

PR4
2.2u/10V_6

9.09K/F_4
BOOT PAD

PC9

PR2

PC2
PR85

*330u/2V_7343
100K/F_4

*Short_4

0.1u/10V_4

22u/6.3V_8

22u/6.3V_8
PR5 PC4 PU1

PC15

PC16

PC17

PC14
e
2.2/F_6 CSD97374CQ4M

PC10
0.22u/25V_6
Add 11 GND VIAs
for thermal pad

PR12

PR14
51624_CSP1

2.94K/F_4
d
+1V05

PR13
51624_B-RAMP

51624_SLEWA
51624_F-IMAX
51624_O-USR
Close to VR 51624_THERM PC72

51624_VREF
51624_VDD
*0.1u/25V_4

0.12u/10V_4
PC73
51624_V5A

i
BW-U 15W

16.9K/F_4
10K/F_4_3435NTC
51624_VBAT

PR91
0.1u/10V_4

56_4
PC11

PR115

PR116

PR117

PR8
*56_4
130/F_4

*75/F_4

C C

f
51624_CSN1

PR15
Icc TDC PL2:14A

27

10

11

15

14

28

16
2

9
PC74
*0.1u/25V_4
Icc Max:32A

THERM
VREF

F-IMAX

VBAT
B-RAMP

SLEWA
VDD

O-USR

V5A
30 6 51624_PWM1
[5,16,27] H_PROCHOT#
OCP:37A

n
VR_HOT PWM1
[6] VR_SVID_CLK VR_SVID_CLK PR110 *Short_451624_CLK 31 5 51624_PWM2 Close to the Close with
VCLK PWM2
[6] VR_SVID_ALERT# VR_SVID_ALERT# PR109 *Short_451624_ALERT# 32
ALERT MODE
4 51624_MODE
VR side. phase1 inductor
Fsw:1.2MHz
[6] VR_SVID_DATA VR_SVID_DATA PR108 *Short_451624_DATA 1 17 51624_CSP1
VDIO CSP1

o
3
PGOOD
PU7
CSN1
18 51624_CSN1 :
VCORE L/L:
TPS51624RSM
+3V3 +3V3 +3V3 51624_SKIP# 7 19 51624_CSN2
SKIP CSN2 PS3 OSR R_DC_LL:- 2.0mV/A
51624_VRON 8 20 51624_CSP2
VR_ON CSP2
51624_VFB 24 21
100K/F_4

100K Ohm ON ON R_AC_LL:- 7.0mV/A


*100K/F_4

*100K/F_4

VFB NC
Rmode
PR99

PR95

PR92

C
51624_GFB 23 22 PR7
GFB N/C

DROOP
COMP 150K/F_4

OCP-I

IMON
150K Ohm ON OFF

GND

PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
B B
51624_VREF
26

25

12

13

29

33
34
35
36
37
38
39
40
41
42
[6,11] IMVP_PWRGD
PR103 *Short_4

For BW-U 15W (1 Phase)


51624_DROOP

51624_OCP-I

51624_IMON

a
51624_COMP

[16] VRON
PR90 *0_4 PR1
*Short_8 +3V3_S5
4.99K/F_4
*Short_4

*Short_4

t
[6] VRON_CPU
PR83 *Short_4
+VCCIN
374K/F_4
PC79

PR111

PR89
*100p/50V_4

10K/F_4

PR97
*Short_4
PC76
1000p/50V_4

n
PR104 *330p/50V_4
PR100

PR98

PR107

PC71

*10_4
51624_CSP2
1500p/50V_4

39K/F_4
PR81
PR112
4.75K/F_4

[6] VCC_SENSE
PC77

51624_PWM2

a
[13] VSS_SENSE
51624_CSN2
4/23 change 4/23 change
PR96
A Parallel *10_4 PC75
*0.01u/50V_4
A

u
PR94 PR6
Close to the *Short_4 *0_4
CPU side.
Quanta Computer Inc.
PROJECT : ZS8
Size Document Number Rev
1A
+VCCIN(TPS51624)

Q
Date: Wednesday, August 13, 2014 Sheet 31 of 35
5 4 3 2 1

www.vinafix.vn
1 2 3 4 5

l
35

a
PR152 *100K_4
+5V_PCU
+3V3

i
PU10
PC116 1u/16V_6 G9661-25ADJF12U
4 1
VPP PGOOD HWPG_1.8V [16]

t
A SUSON 2 6 +1V8_SUS_C PR175 *Short_8 +1V8_SUS A
[16,28,29] SUSON PR61 *Short_4 VEN VO
+3V3_PCU 3
8 VIN PR62
GND R1

ADJ
9 5

n
GND NC 43.2K/F_4

PR60
TDC : 0.15A

7
100K_4
VREF=0.8V PEAK : 0.2A

e
PC118
10u/6.3V_6 Width : 20mil
PC114 PC117 PC115 PR153
10u/6.3V_6 0.1u/50V_6 *0.1u/50V_6
R2 34K/F_4

d
Vout =0.8(1+R1/R2)

i
=1.8V

f
PR127 *100K_4
+5V_PCU

n
+3V3
PU8
B PC78 1u/16V_6 G9661-25ADJF12U B
4 1
VPP PGOOD HWPG_1.5V [16]
MAINON 2 6 +1V5
VEN VO

o
PR126 *Short_4
+3V3_PCU 3
8 VIN PR120
GND R1 TDC : 0.08A

ADJ
9 5 30K/F_4
GND NC
PR124
PEAK : 0.1A
Width : 20mil
7
100K_4

C
VREF=0.8V PC83
10u/6.3V_6
PC82 PC81 PC86 PR123
10u/6.3V_6 0.1u/50V_6 *0.1u/50V_6
R2 34K/F_4

a
Vout =0.8(1+R1/R2)
=1.5V

nt
C C

a
VIN +3V3 +5V +1V05 +15V

PR119 PR101 PR93 PR102 PR113

u
1M_4 22_8 22_8 22_8 1M_4

MAINON_ON_G MAIND
MAIND [28,30]
3

3
3

PR114

Q
MAINON 2 PQ20 1M_4 2 2 2 2
[16,29] MAINON DTC144EU PC80
PQ19 PQ17 PQ18 PQ21 *2200p/50V_4
2N7002K 2N7002K 2N7002K 2N7002K
1

PR106
1

*100K/F_6

D D

Quanta Computer Inc.


PROJECT : ZS8
Size Document Number Rev
1A

www.vinafix.vn
+1.5V/+1.8V
Date: Wednesday, August 13, 2014 Sheet 32 of 35
1 2 3 4 5
1 2 3 4 5

i al
Thermal protection

t
VIN

PD2
DA2J10100L
36
A

en PR144
1M_6

1
PQ34

d
AO3409
2

i
3
f
3
2
[16,28,30] S5ON

n
PQ33 PR143

1
B B
Need fine tune DTC144EU *Short_6
for thermal protect point

o
Note placement position VL VL
SYS_SHDN# [11,25,28]
TEMP=85C

C
PR133 PC104 PR141
PR132 200K/F_4 0.1u/50V_6 200K_6

3
1.47K/F_4

8
PR17
10K/F_4_3435NTC 2.469V 3
+ 1 2
LM393_PIN2 2

a
- PQ32
3

PU9A 2N7002K
4

t
AS393MTR-E1 PC92

1
0.1u/50V_6
S5ON 2
PR134
C PQ29 200K/F_4 C

n
2N7002K
1

a
5
+

u
7
6
-
PU9B
AS393MTR-E1

Q
For EC control thermal protection (output 3.3V)

D D

Quanta Computer Inc.


PROJECT : ZS8
Size Document Number Rev
1A
Thermal Protect
1 2
www.vinafix.vn
3
Date: Wednesday, August 13, 2014
4
Sheet 33
5
of 35
5 4 3 2 1

l
VIN 1
3 3
+3V3_PCU +5V_PCU
1
VIN BAT-V

a
VL
3V_LDO 3V/5V 2
2 VR

i
3 +5V_PCU +5V_S5 11
+15V
CHARGER Battery

EN2

EN1
S5 PWR

t
D
+3V3_PCU +3V3_S5 10 4 D

3
3

n
S5_ON 8 NBSWON# +3V3_PCU or +3V3_S5

1 VIN Delay DSW power well 10ms DSW PWR


+3V3_S5_DEEP
PWR 6 DPWROK DPWROK

e
SUS PWR
DDR VDDQ +1V2_SUS 18 BTN 13 RSMRST# +1V05
RSMRST#
VR 7 14 SB_ACDC ASW PWR
DDR_VTTREF 19 EC ACPRESENT +3V3_S5

d
30 DNBSWON#
15 PWRBTN#
HWPG SUSC# 16 SPI PWR
+DDR_VTT_RUN 23 SLP_S4# +1V05DX_MODPHY

i
SUSB# 20 SLP_S3#
HSIO PWR

f
PCH_SUSACK# SUSACK +1V05
HWPG_VDDR 24
PG PCH_SUSPWARN# SUSWRAN
PLL PWR
S5

S3

PCH_SLP_SUS# SLP_SUS# +1V05


PCH

n
DDR_PG_CTRL APWROK CORE PWR
C
22 +3V3 C

31 EC_PWROK PCH_PWROK
MAINON
21 PCH_CLK SDIO PWR
35 +3V3_S5

o VRON

SUSON

S5_ON
MAINON
EC_PWROK
HWPG_1.05V_EC#
PLTRST#
PLTRST#
38 SYS_PWROK HDA PWR
SUSON SYS_PWROK
17 34 IMVP_PWRGD
+3V3_PCU 24 HWPG_VDDR
3 36
26 31 38

C
HWPG_1.05V EC_PWROK
+1V5 12 30a 31 32b 21 17 8
1.5V

PLTRST#
HWPG_1.5V
VR 29 29
HWPG_1.5V
PG
EN

+VCCIN

a
MAINON CORE PWR
21 +1V2_SUS

RESET#
t
CPU
VDDQ PWR
+1V05_VCCST
RUN PWR +1V05
+1V05_VCCST PROCPWRGD
B
3 +5V_PCU +5V 28 VCCST PWR B

n
MOS1

SM_PG_CNTL1

VCCST_PWRGD
0 ohm
3 +3V3_PCU +3V3 27

VR_READY
MOS2

VR_EN
a
10K ohm

SVID
+1V05_S5 +1V05
9 25
MOS3
G

u
HWPG_1.05V
1 VIN 12
MAINON

VRON_CPU
DDR_PG_CTRL
21

IMVP_PWRGD
33

VCCST_PWRGD_EN
SVID
+VCCIN EC_PWROK VCCST_PWRGD_EN
IMVP 31
VIN
1 9 VR

Q
SYS_PWROK
+1V05_S5 36
+1.05V_S5
VR 34
12 IMVP_PWRGD HWPG_1.05V_EC# 37 22 34 32a
HWPG_1V05 PG 30a
EN

PG
EN

A A

8 SVID VRON_CPU 32a HWPG+1ms


S5_ON
37 VRON 32b
PCH MAINON 21
CPU Quanta Computer Inc.
PROJECT : ZS8
Size Document Number Rev
1A
Power Sequence
5 4

www.vinafix.vn 3 2
Date: Wednesday, August 13, 2014
1
Sheet 34 of 35
5 4 3 2 1

l
Model Version CHANGE LIST
ZS8 B
2/12 page 11: add R777,R778,R776 pull high PWR well +3V3_S5 for electric leakage
page 22: change Q16 pull high PWR well to +3V3_SATA_N1
page 24: CN5 modify pin define

a
page 25: modify FAN PWN control circuit

2/14
page 16: ADD U23.99 PTP_PWR_EN# net for Touch pad PWR control
page 25: ADD Touch pad control circuit

i
3/12 page 18: modify HP_L / HP_R circuit

page 08: U20.5 pin PWR well from +3V3 to +3V3_S5


3/14
page 16: Del EL_SCL / EL_SDA net
page 25: modify EL/B control signal from EC to PCH

t
3/18
D
page 21: change CN8 footprint D

page 25: modify EL/B control signal from EC to PCH & change CN7 footprint
page 22: change CN13 & CN10 footprint

3/21 page 16: Del R533,R534


page 27: change PJ2 footprint

3/24
page 25: CN12 modufy define

n
C
4/17 page 24: Change CN4,CN5 footprint for SMT open issue
page 25: Change Q25 PWR well to +3V3 for electric leakage
4/22
page 25: add R784,R785,R786,R783,Q56,Q54,Q55 for touch pad Discharge

e
6/19 page 16: add AC_protection function for charger and EC
6/20
page 24: Del R170,R162,R518,R522 for SMT open issue

nfi d C

Co
B

nta B

ua
A

DOC NO. PROJECT MODEL


:

PART NUMBER:
5
Q
APPROVED BY:

DRAWING BY:
4
DATE:

REVISON:
3 2
Size

Date:
Document Number
Change list

www.vinafix.vn
Quanta Computer Inc.
PROJECT : ZS8

Wednesday, August 13, 2014


1
Sheet 35 of 35
Rev
3A
A

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