Int J Adv Manuf Technol (2001) 17:157–162

 2001 Springer-Verlag London Limited

Recent Advances in Machining of Silicon Wafers for

Semiconductor Applications
P. S. Sreejith, G. Udupa, Y. B. M. Noor and B. K. A. Ngoi
Precision Engineering Strategic Research Programme, School of Mechanical and Production Engineering, Nanyang Technological
University, Nanyang, Singapore

Silicon wafers are used world-wide for the production of

microchips. Silicon is a hard and brittle material. Conversion
of silicon ingots into polished wafers requires much processing
including machining and chemical processing. The machining
is critical to high-quality standards. With the development of
new components, the electronic industries require higher stan-
dards for total thickness variation and also wafer warp. This
paper focuses on the different machining methods available
for silicon processing.

Keywords: Chemical mechanical polishing; Grinding; Rough-

ness; Semiconductor; Silicon wafer; Total thickness variation;
Turning

Fig. 1. Manufacturing silicon wafers.

1. Introduction
The semiconductor industry is the fastest growing industry in
the world. More than 90% of all semiconductor products are
made of silicon. Silicon has a diamond-like crystal structure
with covalent bonding of the atoms. It has a high hardness
value of above 1000 Vickers units with a very low fracture
toughness. The brittle properties of silicon cause great difficult-
ies in machining.
The manufacture of silicon wafers from the ingot stage to
the wafer stage is shown in Fig. 1 [1]. Single-crystal cylindrical
silicon ingots with typical lengths of about 1 m are sliced into
wafers by internal diameter (ID) cut-off grinding. Then, in
order to ensure the correct thickness, flatness and parallelism,
the wafers are lapped or ground. The wafers will sometimes
be subjected to chemical etching, to remove the unavoidable
damaged zones. The wafers are polished on one side to a
mirror finish. Dicing separates the individual chips.
Correspondence and offprint requests to: Dr P. S. Sreejith, School
of Mechanical and Production Engineering, Nanyang Technological
University, North Spine (N3) Level 2, Nanyang Avenue, 639798
Singapore. E-mail: MPSSreejith얀ntu.edu.sg
Table 1 shows the increase in quantity and also quality
requirements for silicon wafers [2]. In 1993, US $3 billion
worth of pure silicon resulted in a $80 billion device market
and $700 billion of electronic equipment [3]. A steady increase
in chip surface area produced annually is expected and this
will be accompanied by an increasing degree of integration of
components. In order to realise this, decreasing structural
widths are necessary. At present, the smallest structural width
used is 0.35 ␮m, but it is predicted to be 0.18 ␮m for the
production of 1 Gbit-DRAM chips by 2001 [4]. It is expected
that advances in CMP technology and organic CVD processes
will make this a reality [5]. This paper deals with the different
machining methods available for silicon processing.
2. Precision Sawing
Precision sawing is used for cut-off operations such as slicing
of silicon rods into wafers using a fine wire or disk [6]. This
technique uses electrophoretic deposition of ultrafine abrasives
(colloidal silica, 5–7 nm diameter) onto a conductive diamond
saw blade in an electric field (Fig. 2). A bronze bonded dia-
mond saw blade, which acts as the anode, is mounted on a
158 P. S. Sreejith et al.

Table 1. Overall roadmap technology characteristics.

1992 1995 1998 2001 2004 2007

Feature size (␮m) 0.5 0.35 0.25 0.18 0.12 0.10

Gates/chip 300K 800K 2M 5M 10M 20M
Bits/chip
DRAM 16M 64M 256M 1G 4G 18G
Wafer processing cost ($ cm−2) 4.00 3.90 3.80 3.70 3.60 3.50
Defect density (defects cm−2) 0.1 0.05 0.03 0.01 0.004 0.002
Metal line process Etched Etched Etch/damascene Etch/damascene Damascene Damascene
Materials
Metal Al Al Al/Cu Al/Cu Al/Cu Al/Cu
Dielectric SiO2 SiO2 SiO2/LoK SiO2/LoK LoK LoK
Wafer size (mm) 200 200 200/300–400 300–400 300–400 300–400

Fig. 2. Apparatus for chipping-free dicing. Fig. 3. Principle of ID cut-off grinding. vf, feed speed; vs, grinding
wheel speed; Ff, feed force; FfN, feed perpendicular force; Fp, back
force.
high-speed air spindle, and the blade cover forms the cathode.
A groove is formed on the blade cover through which colloidal 4. Grinding/Slicing
silica solution passes continuously. When an electric field is
applied, a continuous layer of silica is deposited on the blade. Grinding/slicing is a further development of the ID cut-off
Using this technique, chipping-free dicing of silicon wafers grinding. During ID cut-off grinding, axial deflection of the
can be achieved with optically smooth surfaces. blade is an unavoidable phenomenon, which results in a warped
wafer. This warp will also be visible on the front end of the
silicon rod. Figure 4 shows the technology of the process. With
3. ID Cut-Off Grinding this process, the front of the silicon rod is ground plane before
the next cutting-off begins [1]. The plane ground on the wafers
ID cut-off grinding is the most commonly employed technology
for the cutting of silicon rods into wafers with a thickness of
less than 1 mm [1,7–9]. The slicing is carried out using an
unconventional tool made of high strength chromium nickel
steel. The internal diameter of the blade is electroplated with
an abrasive layer. The metallic bonded diamonds act as the
cutting edge. During the cutting-off process, the rotating tool
plunges into the silicon ingot using its active grinding profile
at a certain feed and speed (Fig. 3). The blade should be as
thin as possible to reduce the kerf width but thick enough to
retain stiffness and stability during the operation. The in-feed
of the blade into the silicon rod can cause median cracks.
There is also the possibility of chipping of the material from
either side of the blade owing to lateral cracks due to plastic
deformation underneath the abrasive because of the hydrostatic
pressure. Hence, further polishing of the wafer may be required,
incurring additional expenses. Fig. 4. Technology of the grinding/slicing process.
 Recent Advances in Machining of Silicon Wafers 159

by this method, serves as a reference surface. This approach

increases the size accuracy of the wafer so that the typical
warp-value is less than 6 ␮m, but in any case less than 8 ␮m.
This results in a reduction of 25% compared with conventional
ID cut-off grinding [10].

5. Chemical Mechanical Polishing (CMP)

Chemical mechanical polishing (CMP) has emerged as the

preferred technique for achieving local and global planarisation
in ultra large-scale integration metallisation processes [11,12].
In this process, a silicon wafer is pressed face down into a
rotating, compliant, polishing pad flooded with a slurry of
abrasive particles. The slurry is dragged into the interface
between the pad and sample. Polishing is accomplished by the
interaction of the pad and slurry with the sample surface. The
load on the sample, the platen velocity and the chemistry and
composition of the slurry determine the polishing rate.
The polishing mechanism, the process control and the basic
understanding of CMP remain at the experimental level. There
are a variety of physical and chemical effects that are involved Fig. 5. Material removal rate for chemical mechanical polishing with
break-up into individual components – mechanical and chemical.
in the CMP process and analysis based on various scientific
and engineering fields is needed [13]. It is assumed that the
polishing mechanism is a function of both chemical and mech- Despite the disadvantages, CMP is the fastest growing method
anical effects [14]. in the US supplier market and has created great interest in
Chemical effects are achieved by applying the slurry to the European and Japanese semiconductor companies [16].
wafer and changing the chemical properties of the wafer.
Chemical reactions between the slurry and the wafer surface
change the solubility and mechanical properties of the wafer 6. Abrasive Machining
surfaces. The mechanical process is affected by the down
force, the rotational speed of the pad and the wafer, the density Lapping and polishing can be classified on the basis of the
and viscosity of the pad and the slurry film [15]. backing material and abrasives used [17], as shown in Fig. 6.
The slurry used for the process consists of an alkaline The figure shows a combination of backing material and
solution containing chemically reactive particles whose size is abrasives used for different applications, which will give differ-
approximately 100 nm. Particle hardness for CMP is always ent surface finishes. For example, in the finishing of silicon
less than that of the workpiece being polished. Polyurethane wafers for a mirror finish, a soft backing plate and a fine
disks having a high stiffness are used as polishing pads. abrasive have to be used, whereas for conventional lapping a
The material removal rate (MRR) in CMP increases with
polishing pressure and saturation effects. An increase in particle
concentration increases MRR, but a 1% concentration by
weight is usually preferred. A rise in temperature significantly
increases MRR, as shown in Fig. 5 [3]. From the figure, it
should be noted that owing to an interaction between chemical
and mechanical removal, the total MRR is higher than the
total of each separate removal rate.
The advantages of CMP are:
1. Total thickness variation (TTV) for first run is 1.2 ␮m.
2. TTV for subsequent runs is 0.2–0.4 ␮m.
3. Non-toxic consumables are available.
4. Surface roughness is in the atomic scale.
The disadvantages are:
1. The wafer is hard to clean.
2. Scratches will be generated.
3. The cost is relatively high. Fig. 6. Diagram showing various combinations of backing materials
4. Productivity is limited. and abrasives for different applications resulting in different finishes.
160 P. S. Sreejith et al.

hard tool and a coarse abrasive will give a matt finish. Simi-
larly, for the finishing of sapphire, a hard backing plate and a
fine abrasive have to be used, whereas for die materials, a soft
backing plate and a coarse abrasive produces a mirror finish.
Figure 7 shows the various material removal mechanisms
and all the various polishing methods [17]. It can be seen that
the main material removal mechanisms are chemical, mechan-
ical, or a combination of both chemical and mechanical actions.
The mechanical action can be two or three body abrasion with
or without sliding or erosion involving plastic deformation or
fracture. Tribo chemical action may also produce material Fig. 8. The principle of electrolytic in-process dressing (ELID). (a)
removal owing to the generation of frictional heat. The System construction. (b) Electrode detail.
chemical action can result in the dissolution of the material.
Generally, the material removal will be a combination of both
chemical and mechanical action depending on the polishing be maintained during the grinding operation. A smooth surface
conditions, as well as on the abrasive work material environ- of 2.8 nm in Ra and 18 nm in Rmax was obtained using a
ment. #40000 wheel, when grinding a silicon wafer. The depths of
cracks in the subsurface were found to be around 0.4 ␮m. The
6.1 Electrolytic In-Process Dressing (ELID) depth of the damaged layer using a #40 000 wheel was found
to be less than 1 ␮m.
Electrolytic in-process dressing (ELID) of silicon wafers to
obtain a mirror finish was developed by Ohmori and Nakagawa
[18,19]. The mechanism of ELID grinding is shown in Fig. 8. 6.2 Fixed/Loose Polishing of Semiconductor
The system is composed of elements, which generate typical Wafers
electrolysing phenomena using a metallic bonded grinding
wheel, a power supply, a fluid, and an electrode. The wheel The different polishing methods used in lapping of semi-
becomes the positive pole by a brush smoothly contacting its conductors can be classified as in [20], i.e.
surface. The electrode fixed below the wheel surface is the
negative pole. In the clearance of around 0.1 mm between the 1. Close contact lapping.
two poles, electrolysis occurs by the supply of an electrically 2. Semi-contact polishing.
conductive fluid. This process enables the protruding grains to 3. Non-contact polishing.

Fig. 7. Material removal mechanisms and various polishing methods.

 Recent Advances in Machining of Silicon Wafers 161

By changing the nature of the contact from close contact to

non-contact, the mechanism of polishing can be altered from
mechanical to chemical.
A large number of lapping techniques using flexible laps
have been reported for machining semiconductor wafers. Teflon
laps with SiO2 have been used to superpolish single crystal
silicon wafers to a r.m.s. roughness of 0.1 nm [21]. Another
technique based on a “rapidly renewable lap” has been reported
[22]. It involves a thin film used to carry abrasives, which
covers a stable lap structure maintained to the required value.
A surface roughness of 1 nm was reported by this technique.
Flexible tools for ultrafine lapping include the use of fluorocar-
bon foam polishing with SiO2 powder which was able to
produce a roughness value of 0.3 nm Rmax [17].
A high-precision machine for polishing of semiconductor
wafers was developed by Watanabe and Suzuki [23]. Non-
contact laps based on hydrodynamic action are used in this Fig. 9. Free abrasive machining.
technique. Using this machine, Si wafers were polished to a
flatness of 0.3 ␮m over 76.2 mm and a roughness value 0.1 nm.
Kasai et al. [20] developed a fully automatic polishing slurry, which is trapped between a hard (typically 60–62 Rc)
machine for mirror finishing damage-free, flat surfaces on horizontally rotating wheel (lapping block) and the workpiece.
wafers. In this method, the polishing mechanism is altered The lapping block is typically made of hardened steel. The
progressively from mechanical to chemical. A flatness of essential feature of FAM is that the abrasive particles are not
⬍2 ␮m for 80% of the diameter with surface roughness ⬍2 nm embedded in the lapping block and the machining process is
Rmax was reported. somewhat akin to three-body wear. If the lapping block is
made of a relatively soft material such as tin, copper, felt, or
resin cloth, then the abrasive particles often become embedded
6.3 Damage-Free Grinding in the block and the machining action is a combination of
two-body and three-body wear. This corresponds to fine lapping
During machining at very shallow depths of cut, the energy and polishing processes. The machined surfaces are typically
required to propagate the cracks will be larger than the energy smoother when a softer lapping block is employed whereas
required for plastic yielding and so material removal takes the flatness of the finished surface is better when a harder
place owing to plastic yielding [24–27]. The sharpest edge lapping block is used.
radius that can be produced on a tool is in the range of 20–
70 nm. If the depth of cut is less than this value, the material
is removed by the radius of the tool, and not by the rake face
[28]. This is called the “ductile” mode of cutting/grinding.
7. Single-Point Diamond Turning (SPDT)
Diamond turning machines have been developed for the ductile
Single-point diamond turning is a well-established technology
mode of machining. Ductile regime grinding of silicon wafers
for the production of mirror surfaces [31–33]. The salient
to surface finishes as good as polishing has been achieved at
feature of the SPDT process is the ability to control directly
Cranfield Precision, UK. Ductile regime micro-crack-free grind-
the contour as well as the surface roughness by direct numerical
ing can achieve very high production rates in the creep feed
control. SPDT uses large single-crystal diamond tools with a
mode when the machine has a high loop stiffness, a high
fine edge radius of about 20 nm.
precision wheel infeed capability, and fine grit diamond wheels
Nakasuji et al. [34] carried out single-point diamond turning
with stiff bonds [29].
of Si with a tool having a nose radius of 0.5–1 mm and a
rake angle varying from 0 to 25°. A surface roughness vale
6.4 Free Abrasive Machining (FAM) of 0.04 ␮m was achieved. Shibata et al. [35,36] experimented
on silicon wafers with a single-point diamond tool of nose
Free abrasive machining (FAM) is a primary mechanical fin- radius 0.8 mm and a negative rake angle of 40°. The experi-
ishing operation that uses selected hard abrasive particles inter- ments were carried out at a depth of cut of 100–500 nm, at a
posed between the workpiece and a semi-flexible support media feedrate of 10 mm rev−1 and a speed of 3.3 m s−1. Kerosene
such as soft flexible pads on a rigid wheel or a soft metal was used as the cutting fluid. At 100 nm depth of cut, a mirror
wheel. This procedure can be used to generate large areas flat finished surface, of roughness value 20 nm Rmax, was obtained.
to within a few nanometres and effectively free of defects in Kunz et al. investigated the turning of silicon with a tool with
silicon wafers. a negative rake angle of 25° and a 64 nm nose radius. The
Figure 9 shows a diagram of the process. It uses abrasives feedrate used was 0.95 ␮m rev−1. The subsurface damage was
such as diamond, silicon carbide, boron carbide and aluminium 1–3 ␮m. Hence, polishing has to be performed to obtain defect-
oxide for stock removal and finishing [30]. In FAM, the free material. Venkatesh et al. [31] reported a surface roughness
abrasive is usually mixed with a liquid medium to form a of 1 nm Ra at a depth of cut of 1 ␮m, a feedrate of
162 P. S. Sreejith et al.
0.4 mm min−1 and a speed of 400 m min−1 when turning Si
using a tool of zero rake angle and 0.75 mm nose radius.
8. Conclusions
With the reduction of the size of electronic structures on
microchips in the submicron range, higher quality standards are
increasingly demanded from the machining/finishing processes.
With the realisation of a 300 mm wafer in sight, new techno-
logies are becoming more important. The objective of the
processes is to obtain a high wafer quality with minimum total
thickness variation and high surface quality. A review of the
available and newly developed techniques is presented in this
paper. Their application will be governed by the compromise
between performance requirements and process capabilities.
References
1. H. K. Tonshoff, W. v. Schmieden, I. Inasaki, W. Konig and G.
Spur, “Abrasive machining of silicon”, Annals CIRP, 39(2),
pp. 621–635, 1990.
2. S. Davis, Sematech, Austin TX, USA, 1994.
3. S. R. Runnels, “Feature scale fluid based erosion modelling for
chemical mechanical polishing”, Journal of the Electrochemical
Society, 141(7), pp. 1900–1904, 1994.
4. L. M. Cook, “Chemical process in glass polishing”, Journal of
Non Crystalline Solids, 120, pp. 152–171, 1990.
5. B. Roberts, A. Harris and R. L. Jackson, “Interplant metallization
for future device generations”, Solid State Technology, 38(2),
pp. 69–78, 1995.
6. J. Ikeno, Y. Tani and H. Sato, “Nanometer grinding using ultrafine
abrasive pellets – manufacture of pellets applying electrophoretic
deposition, Annals CIRP, 40(1), pp. 351–354, 1990.
7. H. K. Tonshoff, E. Brinksmeier, W. v. Schmeiden, “Silicon crys-
tals sliced into wafers”, Reports of the DFG, German Research,
3, pp. 23–25, 1989.
8. E. Brinksmeier, W. v. Schmeiden W, “ID cut-off grinding of
brittle materials”, Annals CIRP, 36(1), pp. 219–222, 1987.
9. A. Buttner, “ID sawing – diameters increase”, Industrial Diamond
Review, 45(2), pp. 77–79, 1985.
10. S. Matsui, “An experimental study on the grinding of silicon
wafers”, Bulletin of the Japan Society of Precision Engineers,
22(4), pp. 295–300, 1988.
11. J. M. Steizerwald, S. P. Muraka and R. J. Gutmann, Chemical
Mechanical Planarization of Microelectronic Materials, John
Wiley, New York, 1997.
12. R. Jairath, J. Farkas, C. K. Huang, M. Stell and S. M. Tzeng,
"Chemical-mechanical polishing: process manufacturability". Solid
State Technology, 37(7), pp. 71–77, 1994.
13. I. Ali, S. R. Roy and G. Shinn, "Chemical-mechanical polishing
of interlayer dielectric: A review", Solid State Technology, 37(10),
pp. 63–68, 1994.
14. John Tichy, Joseph A. Levert, Lei Shan and Steven Danyluk,
“Contact mechanics and lubrication hydrodynamics of chemical
mechanical polishing, Journal of the Electrochemical Society”,
1456 (4), pp. 1523–1528, 1999.
15. Dar-Zen Chen and Bor-Shin Lu, “Pattern planarization model for
chemical mechanical polishing”, Journal of the Electrochemical
Society, 146(2), pp. 744–748, 1999.
16. F. B. Kaufmann, “Chemical mechanical polishing for ULSI device
fabrication”, Watson Research Centre, Yorktown, New York
USA, 1995.
17. T. Kasai, K. Horio, T. Karaki-Doi and A. Kobayashi, “Improve-
ment of conventional polishing conditions for obtaining super
smooth surfaces of glass and metal works”, Annals CIRP, 39(1),
pp. 321–324, 1990.
18. H. Ohmori and T. Nagakawa, “Mirror surface grinding of silicon
wafers with electrolytic in process dressing”, Annals CIRP, 39(1),
pp. 329–332, 1990.
19. H. Ohmori and T. Nagakawa, “Analysis of mirror surface gener-
ation of hard and brittle materials by ELID grinding with superfine
grained metallic bonded wheels”, Annals CIRP, 44(1), pp. 286–
290, 1994.
20. T. Kasai, F. Matumoto and A. Kobayashi, “Newly developed fully
automatic polishing machines for obtainable super smooth surfaces
of glass and metal works”, Annals CIRP, 37(1), pp. 537–540, 1988.
21. A. J. Leistner, “Teflon laps: Some new developments and results”,
Applied Optics, 32, pp. 3416–3424, 1993.
22. R. E. Parks, C. J. Evans, D. J. Roderick and J. Dagata, “Appli-
cations of the rapidly renewable lap”, Proceedings of SPIE, pp. 31–
34, 1997.
23. J. Watanabe and J. Suzuki, “High precision polishing of semicond-
uctor materials using hydro dynamic principle”, Annals CIRP,
30(1), pp. 91–95, 1981.
24. D. Tabor, “The hardness of solids”, Proceedings of the Institute
of Physics, F: Physics in Technology, 1, pp. 145–179, 1970.
25. D. Tabor, “Indentation hardness and its measurement: Some cau-
tionary comments in micro indentation techniques in materials
science and engineering”, ASTM STP 889, ed. P. J. Blau and B.
R. Lawn, pp. 129–159, 1986.
26. K. E. Puttick, M. A. Shahid and M. M. Hosseini, “Size effects
in abrasion of brittle materials”, Journal of Physics, D: Applied
Physics 12, pp. 195–202, 1979.
27. K. E. Puttick and M. M. Hosseini, “Fracture by a pointed indentor
on near (111) Silicon”, Journal of Physics, D: Applied Physics
13, pp. 875–880, 1980.
28. R. Chauhan, Y. Ahn, S. Chandrasekhar and T. N. Farris, “Role
of indentation fracture in free abrasive machining of ceramics”,
Wear, 162–164, pp. 246–257, 1993.
29. R. Komanduri, D. A. Lucca and Y. Tani, “Technological advances
in fine abrasive processes”, Annals CIRP, 46(2), pp. 545–597,
1997.
30. T. G. Bifano, T. A. Dow and R. O. Scattergood, “Ductile regime
grinding – A new technology for machining brittle materials”,
Journal of Engineering for Industry, 113, pp. 184–189, 1991.
31. V. C. Venkatesh, F. Fang and W. K. Chee, “On-mirror surfaces
obtained with and without polishing”, Annals CIRP, 46(1),
pp. 505–508, 1997.
32. T. Semba, Y. Tani and H. Sato, “Development of melamine-
bonded diamond wheels with high porosity for smooth and mirror
finishing of die materials”, Annals CIRP, 45(1), pp. 315–318, 1996.
33. S. Blackley and R. N. Scattergood, “Ductile regime model for
diamond turning of brittle materials”, Journal of Precision Engin-
eering, 13(2), pp. 95–102, 1991.
34. T. Nakasuji, S. Kodera, S. Hara, H. Matsunga, N. Ikawa and
S. Shimada, “Diamond turning of brittle materials for optical
components”, Annals CIRP, 39(1), pp. 89–92, 1990.
35. T. Shibata, A. Ono, K. Kurihara, E. Makino and M. Ideda, “Cross-
section transmission electron microscope observations of diamond
turned single crystal silicon surfaces”, Applied Physics Letters,
65, pp. 2553–2555, 1994.
36. T. Shibata, S. Fujii, E. Makino and M. Ideda, “Ductile regime
turning mechanism of single crystal silicon”, Precison Engineering,
18, pp. 325–328, 1996.