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ANSYS ALinks for EDA Features
Supported EDA Translations
With ALinks, your thirdparty IC, PCB and electronic package layout files can be imported, edited and exported in a neutral file
(ANF) format. The resulting ANF file is readily available for subsequent design and analysis within ANSYS HFSS,ANSYS
Q3D Extractor,ANSYS SIwave,ANSYS TPA, ANSYS Icepak and ANSYS Mechanical.
ALinks for EDA Supports
Cadence
Allegro 16.0, 16.1, 16.2, 16.3, 16.5, 16.6
APD 16.0, 16.1, 16.2, 16.3, 16.5, 16.6
SiP Digital/RF 16.0, 16.1, 16.2, 16.3, 16.5, 16.6
Virtuoso 5.10, 6.14 & 6.15, 16.6 (Linux only)
Mentor Graphics
Expedition v2005, v2007.1 through EE7.9
Boardstation 8.x (uses HKP design flow)
Boardstation XE v2007, v2007.1, v2007.2, v2007.3 and v2007.7 (uses HKP design flow)
PADS PowerPCB v5.2a, v2005 and v2007
Zuken
CR5000 10 & higher (Zuken translator for .anf & .cmp)
CR8000 2013 and higher (Zuken translator for .anf &.cmp)
ODB++
Altium Designer R10, AD13 & AD14
Mentor Expedition EE7.9.2 & greater
Mentor PADS 9.4 & greater
Zuken Cadstar 12.1 & greater
Cadence OrCAD 16.3 & greater
User Interface
GUI
Undo/redo
Recent project history
Net selection ease of use
Show only highlighted nets
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8/19/2016 ANSYS ALinks for EDA Features
Automated differential net identification
Automated extended net (ENET) identification
Automated pwr/grd identification
Net properties
Net properties by hovering cursor
Net filtering
Detect close edges
Measure
Check net length
Calculate electrical properties (R, L, C, G, delay, Zo …)
Change trace width
Color mode
Color by layer
Color by net
Control highlighting color
Control background color
Control lighting
Interactive options
Z stretch
LMB pan, roller zoom
Dynamic zoom or fast zoom'
View cross section
Hot keys (standard Ansoft ALT/SHIFT/LMB commands)
View larger imageANSYS ALinks for EDA uses the popular ANSYS
SIwave user interface and includes many EDAspecific features.
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8/19/2016 ANSYS ALinks for EDA Features
Cadence Specific ANSYS HFSS for ECAD
ANSYS HFSS for ECAD is a new paradigm for RF, SI and digital engineers. This technology enables users of Cadence
software to set up readytosolve chip, package or PCB simulations directly from the Allegro Package Designer, Allegro PCB
Designer, SiP Digital Layout, or Virtuoso Analog Design Environment for analysis in HFSS. All the necessary HFSS setup
steps (geometry and net selection, material properties, excitations and boundary conditions) are completed in Cadence
software and transferred to HFSS for solving the electromagnetic field and Sparameters via a single click. Users never leave
the Cadence interface.
Cadence users have a choice between the automated ANSYS HFSS Solver on Demand or the traditional ALinks design flow.
This traditional design flow enables a model created in Cadence to be imported to ANSYS DesignerSI or ANSYS DesignerRF
where it can easily be modified in the Designer layout tool; it allows Cadence users the opportunity to take full advantage of
additional capabilities including parametric sweeps, optimization and FullWave SPICE for fullwave, highbandwidth SPICE
model generation.
Easy Import and Edit of ECAD Geometry
Generates 3D solid models of selected traces, planes and vias
Edit stackup properties, such as individual layer thickness, dielectric constant and conductivity
Select nets for translation by net name(s), or point and click on specific traces or region of board
Automatic defeaturing of selected nets to minimize model complexity and solution time
Clip design to reduce translation size for field solvers
View larger imageCadence users can operate ANSYS HFSS directly
from Allegro Package Designer, Allegro PCB Designer, SiP Digital Layout, or Virtuoso Analog Design Environment for
highly accurate electromagnetic analysis of critical components.
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