#include <xc.

h>
// #pragma config statements should precede project file includes.
// Use project enums instead of #define for ON and OFF.

// CONFIG1L
#pragma config PLLDIV = 1 // PLL Prescaler Selection bits (No prescale (4 MHz
oscillator input drives PLL directly))
#pragma config CPUDIV = OSC1_PLL2// System Clock Postscaler Selection bits
([Primary Oscillator Src: /1][96 MHz PLL Src: /2])
#pragma config USBDIV = 1 // USB Clock Selection bit (used in Full-Speed USB
mode only; UCFG:FSEN = 1) (USB clock source comes directly from the primary
oscillator block with no postscale)

// CONFIG1H
#pragma config FOSC = HSPLL_HS // Oscillator Selection bits (HS oscillator, PLL
enabled (HSPLL))
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe
Clock Monitor disabled)
#pragma config IESO = OFF // Internal/External Oscillator Switchover bit
(Oscillator Switchover mode disabled)

// CONFIG2L
#pragma config PWRT = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOR = ON // Brown-out Reset Enable bits (Brown-out Reset
enabled in hardware only (SBOREN is disabled))
#pragma config BORV = 3 // Brown-out Reset Voltage bits (Minimum setting)
#pragma config VREGEN = OFF // USB Voltage Regulator Enable bit (USB voltage
regulator disabled)

// CONFIG2H
#pragma config WDT = OFF // Watchdog Timer Enable bit (WDT disabled (control
is placed on the SWDTEN bit))
#pragma config WDTPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)

// CONFIG3H
#pragma config CCP2MX = ON // CCP2 MUX bit (CCP2 input/output is multiplexed
with RC1)
#pragma config PBADEN = ON // PORTB A/D Enable bit (PORTB<4:0> pins are
configured as analog input channels on Reset)
#pragma config LPT1OSC = OFF // Low-Power Timer 1 Oscillator Enable bit (Timer1
configured for higher power operation)
#pragma config MCLRE = ON // MCLR Pin Enable bit (MCLR pin enabled; RE3 input
pin disabled)

// CONFIG4L
#pragma config STVREN = ON // Stack Full/Underflow Reset Enable bit (Stack
full/underflow will cause Reset)
#pragma config LVP = ON // Single-Supply ICSP Enable bit (Single-Supply
ICSP enabled)
#pragma config ICPRT = OFF // Dedicated In-Circuit Debug/Programming Port
(ICPORT) Enable bit (ICPORT disabled)
#pragma config XINST = OFF // Extended Instruction Set Enable bit (Instruction
set extension and Indexed Addressing mode disabled (Legacy mode))

// CONFIG5L
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000800-001FFFh) is
not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 (002000-003FFFh) is
not code-protected)
#pragma config CP2 = OFF // Code Protection bit (Block 2 (004000-005FFFh) is
not code-protected)
#pragma config CP3 = OFF // Code Protection bit (Block 3 (006000-007FFFh) is
not code-protected)

// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot block
(000000-0007FFh) is not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM is
not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000800-001FFFh)
is not write-protected)
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (002000-003FFFh)
is not write-protected)
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (004000-005FFFh)
is not write-protected)
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (006000-007FFFh)
is not write-protected)

// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit
(Configuration registers (300000-3000FFh) are not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot block
(000000-0007FFh) is not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM is
not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000800-
001FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (002000-
003FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (004000-
005FFFh) is not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (006000-
007FFFh) is not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot block
(000000-0007FFh) is not protected from table reads executed in other blocks)
#define LED1 PORTAbits.RA0
int cont;
char contagem1;
char contagem2;

void timer0_1s() {
// 0,083333 micros x 256 x 46875 = 1s
// 65.535 - 46.875 = 18.660 = 48E4
// 0,083333 micros x 256 x 469 = 10 ms
// 65.535 - 469 = 65066 = 48E4
//TMR0H = 0x48; //
//TMR0L = 0xE4; //

TMR0H = 0x48; //
TMR0L = 0xEA;
while (INTCONbits.TMR0IF==0)
{
 LED1 = 1;
for(cont=0;cont<100;cont++);
LED1 = 0;
contagem1 = TMR1L;
contagem2 = TMR1H;
}
INTCONbits.TMR0IF=0;

if(TRMT!=0) //Verificar se o buffer de envio est� liberado

TXREG=contagem1;
// if(TRMT!=0) //Verificar se o buffer de envio est� liberado
TXREG=contagem2;

TMR1H = 0x00;
TMR1L = 0x00;
contagem1=0;
contagem2=0;
}

void config_timer0 (void){

T0CONbits.TMR0ON = 1; // Liga o Timer 0
T0CONbits.T08BIT = 0; // 16 bits
T0CONbits.T0CS = 0; // contagem por TCI
T0CONbits.T0SE = 0; // n�o faz diferen�a qual valor, pois contagem � por
TCI
T0CONbits.PSA = 0; // ativa Pr�-scaler
T0CONbits.T0PS2 = 1; // 111 - Pr�-scaler 1:256
T0CONbits.T0PS1 = 1;
T0CONbits.T0PS0 = 1;
TMR0H = 0x00; //
TMR0L = 0x00;
}
void config_timer1 (void){
T1CONbits.RD16 = 1; //
// T1CONbits.T1RUN = 0; //
// T1CONbits.T1CKPS1 = 0; //
// T1CONbits.T1CKPS0 = 0; //
// T1CONbits.T1OSCEN = 0; //
// T1CONbits.T1SYNC = 0; //
T1CONbits.TMR1CS = 1;
T1CONbits.TMR1ON = 1;
// T1CON=0x03;
TMR1H = 0x00;
TMR1L = 0x00;
}
void main (void)
{

TRISCbits.RC0=1; //define como entrada

TRISCbits.RC6=0; //define TX como sa�da
TRISCbits.RC7=1; //define RX como entrada
TRISAbits.RA0=0;
TRISAbits.RA4=1;
SPBRGH=0x04;
SPBRG=0xE1;
BRGH=1; // escolhe modo de alta velocidade. Registrador TXSTA
BRG16=1; // escolhe registrador de 16 bits. Registrador BAUDCON
SYNC=0; //Habilita Modo Ass�ncrono de comunica��o. Registrador TXSTA
 SPEN=1; //Habilita porta serial. Registrador RCSTA
TX9=0; // Habilita Transmiss�o de 8 bits. Registrador TXSTA
RX9=0; //Desabilita o uso do nono bit
TXEN=1; // Habilita Transmiss�o. Registrador TXSTA
CREN=1; // Habilita Recep��o. Registrador RCSTA
TXIE=1;//Habilita a INT de TX
RCIE=1;//Habilita a INT de RX
TXIP=1;//Coloca TX como alta prioridade
RCIP=0;//Coloca RX como baixa prioridade
config_timer0();
config_timer1();

while (1) {
//LED1=1;
timer0_1s();
// LED1=0;
// timer0_1s();

}
}