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LOG

102

Precision

LOGARITHMIC AND LOG RATIO AMPLIFIER

FEATURES DESCRIPTION

● EASY-TO-USE COMPLETE LOG RATIO FUNCTION The LOG102 is a versatile integrated circuit that computes

the logarithm or log ratio of an input current relative to a

● OUTPUT AMPLIFIERS FOR SCALING AND

reference current.

SIGNAL LOSS INDICATION

The LOG102 is tested over a wide dynamic range of input

● HIGH ACCURACY: 0.15% FSO Total Error Over signals. In log ratio applications, a signal current can be

6 Decades generated by a photodiode, and a reference current from a

● WIDE INPUT DYNAMIC RANGE: resistor in series with a precision external voltage reference.

6 Decades, 1nA to 1mA In the block diagram shown below, A3 and A4 are identical,

● LOW QUIESCENT CURRENT: 1.25mA uncommitted op amps that can be used for a variety of

functions, such as filtering, offsetting, adding gain or as a

● SO-14 PACKAGE comparator to detect loss of signal.

The output signal at VLOG OUT is trimmed to 1V per decade of

APPLICATIONS input current. It can be scaled with an output amplifier, either

A3 or A4.

● ONET, OPTICAL POWER METERS

Low dc offset voltage and temperature drift allow accurate

● LOG, LOG RATIO COMPUTATION: measurement of low-level signals over a wide environmental

Communication, Analytical, Medical, Industrial, temperature range. The LOG102 is specified over the tem-

Test, General Instrumentation perature range, 0°C to +70°C, with operation over –40°C to

+85°C.

● PHOTODIODE SIGNAL COMPRESSION AMP

NOTE: U.S. Patent Pending.

● ANALOG SIGNAL COMPRESSION IN FRONT

OF A/D CONVERTER

● ABSORBANCE MEASUREMENT

● OPTICAL DENSITY MEASUREMENT

R1 R2

VLOG OUT = LOG (I1/I2)

VOUT3 = G • LOG (I1/I2), G = 1 +R2/R1

CC

I2

6 14 5 3 4

I1 1

Q1 Q2

7

A3 VOUT3

A2

A1 12

+IN4

8

A4 VOUT4

A4 can be used

as comparator for

9 10 11 signal loss detect.

GND

V– –IN4

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Copyright © 2001-2005, Texas Instruments Incorporated

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

www.ti.com

ABSOLUTE MAXIMUM RATINGS(1) PIN DESCRIPTION

Supply Voltage, V+ to V– .................................................................... 36V Top View SO

Input Voltage ....................................................... V– (–0.5) to V+ (+0.5V)

Input Current ................................................................................... ±10mA

Output Short-Circuit(2) .............................................................. Continuous

Operating Temperature .................................................... –40°C to +85°C I1 1 14 I2

Storage Temperature ..................................................... –55°C to +125°C NC 2 13 NC

Junction Temperature .................................................................... +150°C

Lead Temperature (soldering, 10s) ............................................... +300°C +IN3 3 12 +IN4

NOTES: (1) Stresses above these ratings may cause permanent damage. –IN3 4 LOG102 11 –IN4

Exposure to absolute maximum conditions for extended periods may degrade

Vlog out 5 10 GND

device reliability. (2) Short circuit to ground, one amplifier per package.

V+ 6 9 V–

This integrated circuit can be damaged by ESD. Texas Instru-

ments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling

and installation procedures can cause damage.

ESD damage can range from subtle performance degrada-

tion to complete device failure. Precision integrated circuits

may be more susceptible to damage because very small

parametric changes could cause the device not to meet its

published specifications.

PACKAGE/ORDERING INFORMATION(1)

PACKAGE PACKAGE

PRODUCT PACKAGE-LEAD DESIGNATOR MARKING

LOG102AID SO -14 D LOG102A

NOTES: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at

www.ti.com.

ELECTRICAL CHARACTERISTICS

Boldface limits apply over the specified temperature range, TA = 0°C to +70°C.

At TA = +25°C, VS = ±5V, RL = 10kΩ, unless otherwise noted.

LOG102AID

PARAMETER CONDITION MIN TYP MAX UNITS

CORE LOG FUNCTION

IIN / VLOG OUT Equation VO = log (I1/I2)

LOG CONFORMITY ERROR(1)

Initial 1nA to 100µA (5 decades) 0.04 ±0.3 %

1nA to 1mA (6 decades) 0.15 %

over Temperature 1nA to 100µA (5 decades) 0.0002 %/ °C

1nA to 1mA (6 decades) 0.002 %/ °C

GAIN(2)

Initial Value 1nA to 100µA (5 decades) 1 V/decade

Gain Error 1nA to 100µA (5 decades) 0.15 ±1 %

vs Temperature TMIN to TMAX 0.025 0.05 %/ °C

INPUT, A1 and A2

Offset Voltage ±0.3 ±1.5 mV

vs Temperature TMIN to TMAX ±2 µV/°C

vs Power Supply (PSRR) VS = ±4.5V to ±18V 5 50 µV/V

Input Bias Current ±5 pA

vs Temperature TMIN to TMAX Doubles Every 10°C

Voltage Noise f = 10Hz to 10kHz 3 µVrms

f = 1kHz 30 nV/√Hz

Current Noise f = 1kHz 4 fA/√Hz

Common-Mode Voltage Range (Positive) (V+) – 2 (V+) – 1.5 V

(Negative) (V–) + 2 (V–) + 1.2 V

CMRR 90 105 dB

OUTPUT, A2 (VLOGOUT)

Output Offset, VOSO, Initial ±3 ±55 mV

vs Temperature TMIN to TMAX 25 µV/°C

Full-Scale Output (FSO) VS = ±5V Supplies (V–) + 1.2 (V+) – 1.5 V

Short-Circuit Current ±18 mA

2

LOG102

www.ti.com SBOS211B

ELECTRICAL CHARACTERISTICS (Cont.)

Boldface limits apply over the specified temperature range, TA = 0°C to +70°C.

At TA = +25°C, VS = ±5V, RL = 10kΩ, unless otherwise noted.

LOG102AID

PARAMETER CONDITION MIN TYP MAX UNITS

Initial min to max

I1 or I2 = 1mA ±55 mV

I1 or I2 = 100µA ±30 mV

I1 or I2 = 10µA ±25 mV

I1 or I2 = 1µA ±20 mV

I1 or I2 = 100nA ±25 mV

I1 or I2 = 10nA ±30 mV

I1 or I2 = 1nA ±37 mV

vs Temperature I1 or I2 = 1mA ±0.4 mV/ °C

I1 or I2 = 100µA ±0.07 mV/ °C

I1 or I2 = 10µA ±0.07 mV/ °C

I1 or I2 = 1µA ±0.07 mV/ °C

I1 or I2 = 100nA ±0.07 mV/ °C

I1 or I2 = 10nA ±0.07 mV/ °C

I1 or I2 = 1nA ±0.4 mV/ °C

vs Supply I1 or I2 = 1mA ±0.15 mV/ V

I1 or I2 = 100µA ±0.15 mV/ V

I1 or I2 = 10µA ±0.25 mV/ V

I1 or I2 = 1µA ±0.2 mV/ V

I1 or I2 = 100nA ±0.2 mV/ V

I1 or I2 = 10nA ±0.15 mV/ V

I1 or I2 = 1nA ±0.25 mV/ V

FREQUENCY RESPONSE, core log (5)

BW, 3dB

I2 = 10nA CC = 4500pF 0.1 kHz

I2 = 1µA CC = 150pF 38 kHz

I2 = 10µA CC = 150pF 40 kHz

I2 = 1mA CC = 50pF 45 kHz

Step Response

Increasing

I2 = 1µA to 1mA (3 decade) CC = 150pF 11 µs

I2 = 100nA to 1µA (1 decade) CC = 150pF 7 µs

I2 = 10nA to 100nA (1 decade) CC = 150pF 110 µs

Decreasing

I2 = 1mA to 1µA (3 decade) CC = 150pF 45 µs

I2 = 1µA to 100nA (1 decade) CC = 150pF 20 µs

I2 = 100nA to 10nA (1 decade) CC = 150pF 550 µs

OP AMPS, A3 AND A4

Input Offset Voltage ±175 ±750 µV

vs Temperature TMIN to TMAX ±2 µV/ °C

vs Power Supply VS = ±4.5V to ±18V 10 50 µV/V

Input Bias Current(5) –10 nA

Input Offset Current ±0.5 nA

Input Voltage Range (V–) (V+) – 1.5 V

Common-Mode Rejection 86 dB

Input Noise, f = 0.1Hz to 10Hz 1 µVPP

f = 1kHz 28 nV/√Hz

Open Loop Voltage Gain 88 dB

Gain-Bandwidth Product 1.4 MHz

Slew Rate G = 1, 2.5V step 0.5 V/µs

Settling Time, 0.01% G = 1, 2.5V Step, CL =100pF 16 µs

Rated Output VS = 5V, RL = 10kΩ (V–) + 1.5 (V+) – 0.9 V

Short-Circuit Current –ISC /+ISC –36 /+60 mA

POWER SUPPLY

Operating Range VS ±4.5 ±18 V

Quiescent Current IO = 0 1.25 2 mA

TEMPERATURE RANGE

Specified Range, TMIN to TMAX 0 70 °C

Operating Range –40 +85 °C

Storage Range –40 +125 °C

Thermal Resistance, θJA

SO-14 100 °C/W

NOTES: (1) Log Conformity Error is peak deviation from the best-fit straight line of VO versus Log (I1 /I2) curve expressed as a percent of peak-to-peak full-scale

(2) Output core log function is trimmed to 1V output per decade change of input current. (3) Worst-case Total Error for any ratio of I1 /I2, is the largest of the two

errors, when I1 and I2 are considered separately. (4) Total I1 + I2 should be kept below 1.1mA on ±5V supply. (5) Bandwidth (3dB) and transient response are a

function of both the compensation capacitor and the level of input current. (6) Positive conventional current flows into input terminals.

LOG102 3

SBOS211B www.ti.com

TYPICAL CHARACTERISTICS

At TA = +25°C, VS = ±5V, RL = 10kΩ, unless otherwise noted.

1

I1 0.9

3 VOUT = 1V • Log

Normalized Output Voltage (V)

I2

0.8

2

0.7

1 0.6

0 0.5

–1 0.4

0.3

–2

0.2

–3 0.1

0

0.001 0.01 0.1 1 10 100 1000 1 2 3 4 6 8 10

I I

Current Ratio, 1 Current Ratio, 1

I2 I2

60 0.35

0.30

50

0.25

Total Error (mV)

40 0.20

Gain Error (%)

0.15

30

0°C 70°C 0.10

20 0.05

25°C 0.00

10

–0.05

0 –0.10

1nA 10nA 100nA 1µA 10µA 100µA 1mA –60 –40 –20 0 20 40 60 80

Input Current Temperature (°C)

(I1 or I2)

10000 1M

Select CC for I1 min

10µA 100µA

and I2 max

3dB Frequency Response (Hz)

1µA 1mA

I1 = 1mA

1000

1µ

I1 = 10nA 10k F A

100µA 0p 100µA to

I1 = 100nA =1 0 µA

CC 1

1k

CC (pF)

100 10nA

1mA

to 10µA

I1 = 10µA 100

I1 = 1mA I1 = 1nA 100nA

10nA

I1 = 100µA 10 0 pF

10 00 I1 = 1nA

=1

1 CC µF

Values below 2pF =1

may be ignored. CC

1 0.1

1nA 10nA 100nA 1µA 10µA 100µA 1mA 10mA 1nA 10nA 100nA 1µA 10µA 100µA 1mA

I2 I2

4

LOG102

www.ti.com SBOS211B

TYPICAL CHARACTERISTICS (Cont.)

At TA = +25°C, VS = ±5V, RL = 10kΩ, unless otherwise noted.

5 300

4

70°C

3

Log Conformity (mV)

200

2 6 Decades (1nA to 1mA)

1

0

25°C 100

–1

5 Decades (1nA to 100µA)

–2

0°C

–3 0

–3 –2 –1 0 1 2 3 0 10 20 30 40 50 60 70

VLOGOUT (V) Temperature (°C)

60

50

1nA

Total Error (mV)

40

1mA

30

20

10

10nA to 100µA

0

0 10 20 30 40 50 60 70

Temperature (°C)

LOG102 5

SBOS211B www.ti.com

APPLICATION INFORMATION R2

10kΩ

V–

The LOG102 is a true logarithmic amplifier that uses the V+

compute the logarithm, or logarithmic ratio, of a current ratio. 1MΩ 6

1 5

With two uncommitted on-chip operational amplifiers, the VOUT

LOG102 provides design flexibility and simplicity. I1

LOG102

Figure 1 shows the basic connections required for operation

14 10

of the LOG102 with a gain factor. In order to reduce the

influence of lead inductance of power supply lines, it is I2

R1' 9

> 1MΩ

recommended that each supply be bypassed with a 10µF

tantalum capacitor in parallel with a 1000pF ceramic capaci- CC

V–

tor, as shown in Figure 1. Connecting the capacitors as close R2'

10kΩ

to the LOG102 as possible will contribute to noise reduction V+

V+

SETTING THE REFERENCE CURRENT

10µF

When the LOG102 is used to compute logarithms, either I1 or

1000pF

I2 can be held constant and becomes the reference current to

VOUT = G • VLOGOUT which the other is compared.

6 VLOGOUT is expressed as:

1 12

7

VOUT VLOGOUT = (1V) • log (I1/I2) (1)

10

4 IREF can be derived from an external current source (such as

LOG102 R1

5

shown in Figure 3), or it may be derived from a voltage

14 3 VLOGOUT source with one or more resistors. When a single resistor is

I1 I2

9 11 8 R2 used, the value may be large depending on IREF. If IREF is

CC 10nA and +2.5V is used:

RREF = 2.5V/10nA = 250MΩ

Amplifier A4 not being used.

1000pF 10µF

V– Unused amplifiers should IREF

have positive inputs grounded 2N2905

and negative inputs tied to

their respective outputs.

RREF

3.6kΩ

2N2905

FIGURE 1. Basic Connections with Output Gain Factor of the +15V –15V

6V

LOG102.

IN834 6V

IREF =

RREF

INPUT CURRENT RANGE FIGURE 3. Temperature Compensated Current Source.

To maintain specified accuracy, the input current range of the

LOG102 should be limited from 1nA to 1mA. Input currents

A voltage divider may be used to reduce the value of the

outside of this range may compromise LOG102 performance.

resistor (as shown in Figure 4). When using this method, one

Input currents larger than 1mA result in increased nonlinearity.

must consider the possible errors caused by the amplifier’s

An absolute maximum input current rating of 10mA is included

input offset voltage. The input offset voltage of amplifier A1

to prevent excessive power dissipation that may damage the

has a maximum value of 1.5mV, making VREF a suggested

logging transistor.

value of 100mV.

On ±5V supplies the total input current (I1 + I2) is limited to

1.1mA. Due to compliance issues internal to the LOG102, to

accommodate larger total input currents, supplies should be VREF = 100mV

increased. VOS

R1 R3

+ –

+5V 14

Currents smaller than 1nA will result in increased errors due A1

IREF

the input bias currents of op amps A1 and A2 (typically 5pA). R2

The input bias currents may be compensated for, as shown in R3 >> R2

Figure 2. The input stages of the amplifiers have FET inputs,

with input bias current doubling every 10°C, which makes the

nulling technique shown practical only where the temperature FIGURE 4. T Network for Reference Current.

is fairly stable.

6

LOG102

www.ti.com SBOS211B

Figure 5 shows a low-level current source using a series NEGATIVE INPUT CURRENTS

resistor. The low offset op-amp reduces the effect of the The LOG102 will function only with positive input currents

LOG102’s input offset voltage. (conventional current flow into pins 1 and 14). In situations

where negative input currents are needed, the circuits in

V+

Figures 6, 7, 8, and 9, may be used.

V+

I1 = 2.5nA to 1mA 6

2.5V 1 5

REF3025

VLOGOUT

1GΩ to 2.5kΩ

LOG102

100kΩ I2 = 2.5nA

QA QB

1MΩ IIN

14

+2.5mV National

5 9 10 LM394

+2.5V

CC

100Ω V–

D1 D2

OPA335 Chopper Om Amp

–2.5V

OPA703

IOUT

FIGURE 5. Current Source with Offset Compensation.

FREQUENCY RESPONSE

The 3dB frequency response of the LOG102 is a function of

the magnitude of the input current levels and of the value of FIGURE 6. Current Inverter/Current Source.

the frequency compensation capacitor. See Typical Charac-

teristic Curves for details.

The frequency response curves are shown for constant DC

I1 and I2 with a small signal AC current on one of them. +5V

The transient response of the LOG102 is different for in- TLV271 or 1 OPA2335

+3.3V 2

creasing and decreasing signals. This is due to the fact that 1/2 OPA2335

a log amp is a nonlinear gain element and has different gains 1.5kΩ

at different levels of input signals. Smaller input currents

require greater gain to maintain full dynamic range, and will 1.5kΩ +5V

slow the frequency response of the LOG102.

BSH203

1/2 OPA2335

10nA to 1mA Back Bias

FREQUENCY COMPENSATION +3.3V

LOG102

Frequency compensation for the LOG102 is obtained by 10nA to 1mA

Pin 1 or Pin 14

connecting a capacitor between pins 5 and 14. The size of Photodiode

the capacitor is a function of the input currents, as shown in

the Typical Characteristic Curves (Minimum Value of Com-

pensation Capacitor). For any given application, the smallest

value of the capacitor which may be used is determined by

the maximum value of I2 and the minimum value of I1. Larger

values of CC will make the LOG102 more stable, but will FIGURE 7. Precision Current Inverter/Current Source.

reduce the frequency response.

In an application, highest overall bandwidth can be achieved VOLTAGE INPUTS

by detecting the signal level at VOUT, then switching in The LOG102 gives the best performance with current inputs.

appropriate values of compensation capacitors. Voltage inputs may be handled directly with series resistors,

As seen on front page diagram, the voltage output of VLOGOUT but the dynamic input range is limited to approximately three

can be scaled by increasing or decreasing the resistor ratio decades of input voltage by voltage noise and offsets. The

connected to pins 4 and 7. The gain, G, can be set according transfer function of equation (14) applies to this configura-

to the following equation: tion.

G = 1 + R2/R1 (2)

LOG102 7

SBOS211B www.ti.com

1.5kΩ

100kΩ 100kΩ

+5V

Back Bias +5V 1.5kΩ

+3.3V 1/2 OPA2335

1.5kΩ

10nA to 1mA

Pin 1 or Pin 14

DATA COMPRESSION

V+ In many applications the compressive effects of the logarith-

mic transfer function are useful. For example, a LOG102

6 preceding a 12-bit Analog-to-Digital (A/D) converter can

(–VRB) 1 5 VOUT produce the dynamic range equivalent to a 20-bit converter.

I1

Signal

LOG102

(–VRB) 14

I2 V+

REF 9 CC 10

I1 6

1 5

VOUT

V– –VRB Sample D1

LOG102

λ1 λ 1´

NOTES: (1) –VRB, must be 2.5V more positive than V–. Example, for

VRB = –9.5V, V– =12V. (2) Typically, –3.3V bias is used with ±12V supplies. I2

14 10

Light λ1

D2 9

Source

FIGURE 9. Reverse Biased Photodiode Using Pin 10 on

LOG102. CC

V–

APPLICATION CIRCUITS

LOG RATIO

One of the more common uses of log ratio amplifiers is FIGURE 10. Absorbance Measurement.

to measure absorbance. A typical application is shown in

Figure 10.

Absorbance of the sample is A = logλ1´/ λ1 (3)

8

LOG102

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INSIDE THE LOG102

bipolar transistors, the LOG102 establishes a logarith-

mic function of input current ratios. Beginning with the R1 + R 2

VOUT = VL (9)

base-emitter voltage defined as R1

I1

IC kT = log (10)

VBE = VT ln where : VT = (1) I2

IS q

or VOUT = n VT log 1 (11)

T = Absolute temperature in degrees Kelvin R1 I2

q = Electron charge = 1.602 • 10–19 Coulombs

IC = Collector current

IS = Reverse saturation current I2

Q1 – – Q2

I1

From the circuit in Figure 11, we see that + + VOUT

VBE VBE A2

VL = VBE1 – VBE 2 I1 1 2

(2) A1

I1 R2

Substituting (1) into (2) yields VOUT = (1V) LOG

I2

VL

I1 I2 I2

VL = VT1 ln – VT2 ln (3) R1

IS1 IS 2

VTI = VT2, then (3) becomes:

FIGURE 11. Simplified Model of Log Amplifier.

I I

VL = VT1 ln 1 – ln 2 (4)

IS IS It should be noted that the temperature dependance

I associated with VT = kT/q is internally compensated on

VL = VT ln 1 and since (5) the LOG102 by making R1 a temperature sensitive resis-

I2

tor with the required positive temperature coefficient.

ln x = 2.3 log10 x (6)

I

VL = n VT log 1 (7)

I2

USING A LARGER REFERENCE VOLTAGE IREF such that it is as large or larger than the expected

REDUCES OFFSET ERRORS maximum photodiode current is accomplished using this

Using a larger reference voltage to create the reference requirement. The LOG102 configured with the reference

current minimizes errors due to the LOG102’s input offset current connecting I1 and the photodiode current connecting

voltage. Maintaining an increasing output voltage as a func- to I2 is shown in Figure 12. A3 is configured as a level shifter

tion of increasing photodiode current is also important in with inverting gain and is used to scale the photodiode

many optical sensing applications. All zeros from the A/D current directly into the A/D input voltage range.

converter output represent zero or low scale photodiode The wide dynamic range of the LOG102 is useful for measuring

current. Inputting the reference current into I1, and designing avalanche photodiode current (APD) (see Figure 13).

LOG102 9

SBOS211B www.ti.com

IREF =

VREF

R1

VOUT = VREF –

R2

R3

• LOG ( IREF

IPHOTO ) R2 R3

CC

VLOGOUT

5 3 VMIN to VMAX

IREF

R1 I1

Q1 Q2

1 7

A3 A/D

A2

VREF

A1

R2

4

IPHOTO I2

R3

14

LOG102

IMIN to IMAX

10

FIGURE 12. Technique for Using Full-Scale Reference Current such that V OUT Increases with Increasing Photodiode Current.

ISHUNT

+15V to +60V 500 Irx = 1µA to 1mA

Receiver

5kΩ 5kΩ

10gbits/sec

+5V

APD I to V

Converter

INA168

SOT23-5 IOUT = 0.1 • ISHUNT

2 1

IOUT

CC 1.2kΩ 1kΩ

+5V

6 5 4

1

Q1 Q2

7

A3 VOUT = 2.5V to 0V

A2

A1

100µA 3

25kΩ

14

2.5V 9 10

–5V

FIGURE 13. High Side Shunt for Avalanche Photodiode (APD) Measures 3 Decades of APD Current.

10

LOG102

www.ti.com SBOS211B

DEFINITION OF TERMS ERRORS RTO AND RTI

As with any transfer function, errors generated by the func-

TRANSFER FUNCTION

tion itself may be Referred-to-Output (RTO) or Referred-to-

The ideal transfer function is: Input (RTI). In this respect, log amps have a unique property:

VOUT = 1V • logI1/I2 (5) Given some error voltage at the log amp’s output, that error

corresponds to a constant percent of the input regardless of

Figure 14 shows the graphical representation of the transfer the actual input level.

over valid operating range for the LOG102.

LOG CONFORMITY

3 For the LOG102, log conformity is calculated the same as

1n

A nA

= 10 linearity and is plotted I1 /I2 on a semi-log scale. In many

I2 =

2 I2

applications, log conformity is the most important specifica-

1

10nA 100nA

tion. This is true because bias current errors are negligible

VOUT (V)

0 (1pA compared to input currents of 1nA and above) and the

A scale factor and offset errors may be trimmed to zero or

0n Dashed Line = Greater

10 Supply Voltage Requirement

= A

I2 A µA 0µ A removed by system calibration. This leaves log conformity as

1µ 10 =

10 1m I1

= = = VOUT = (1V) • LOG

I2 I2 I2 I2 I2 the major source of error.

–3

Log conformity is defined as the peak deviation from the best

fit straight line of the VOUT versus log (I1/I2) curve. This is

FIGURE 14. Transfer Function with Varying I 2 and I1. expressed as a percent of ideal full-scale output. Thus, the

nonlinearity error expressed in volts over m decades is:

ACCURACY VOUT (NONLIN) = 1V/dec • 2Nm V (6)

Accuracy considerations for a log ratio amplifier are some-

where N is the log conformity error, in percent.

what more complicated than for other amplifiers. This is

because the transfer function is nonlinear and has two

inputs, each of which can vary over a wide dynamic range. INDIVIDUAL ERROR COMPONENTS

The accuracy for any combination of inputs is determined The ideal transfer function with current input is:

from the total error specification.

I1

VOUT = (1V) • log (7)

I2

TOTAL ERROR

The total error is the deviation (expressed in mV) of the The actual transfer function with the major components of

actual output from the ideal output of VOUT = 1V • log(I1/I2). error is:

Thus, I1 – IB1

VOUT = (1V) (1 ± ∆K ) log ± 2Nm ± VOS OUT (8)

VOUT (ACTUAL) = VOUT (IDEAL) ± Total Error. (5) I2 – IB2

It represents the sum of all the individual components of error

normally associated with the log amp when operated in the ∆K = gain accuracy (0.3%, typ), as specified in

current input mode. The worst-case error for any given ratio specification table.

of I1/I2 is the largest of the two errors when I1 and I2 are IB1 = bias current of A1 (5pA, typ)

considered separately; this case is shown in Table I. Tem- IB2 = bias current of A2 (5pA, typ)

perature can affect total error.

N = log conformity error (0.04%, 0.15%, typ)

(maximum

10nA 100nA 1µA VOS OUT = output offset voltage (1mV, typ)

error)(1)

(30mV) (25mV) (20mV)

n = number of decades over which N is specified:

100nA

(25mV) 30mV 25mV 25mV Example: what is the error when

1µA

(20mV) 30mV 25mV 20mV I1 = 1µA and I2 = 100nA (9)

10µA

(25mV) 30mV 25mV 25mV

LOG102 11

SBOS211B www.ti.com

For the case of voltage inputs, the actual transfer function is

10 –6

≈ 1.003 log –7

+ 0.004 + 0.003 (10)

(14)

10 V1 EOS1

– IB1 ±

(11) R1 R1

= 1.003 (1) + 0.004 + 0.0003 VOUT = (1V) (1 ± ∆K ) log ± 2Nn ± VOS OUT

V2 E OS 2

= 1.0073V (12) – IB 2 ±

R2 R2

Since the ideal output is 1.000V, the error as a percent of (15)

reading is

EOS1 E

0.0073 Where and OS2 are considered to be zero for large

% error = • 100% = 0.73% (13) R1 R2

1

values of resistance from external input current sources.

12

LOG102

www.ti.com SBOS211B

PACKAGE OPTION ADDENDUM

www.ti.com 16-Feb-2009

PACKAGING INFORMATION

Orderable Device Status (1) Package Package Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)

Type Drawing Qty

LOG102AID ACTIVE SOIC D 14 50 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

LOG102AIDG4 ACTIVE SOIC D 14 50 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

LOG102AIDR ACTIVE SOIC D 14 2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

LOG102AIDRG4 ACTIVE SOIC D 14 2500 Green (RoHS & CU NIPDAU Level-3-260C-168 HR

no Sb/Br)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI

to Customer on an annual basis.

Addendum-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1

Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

LOG102AIDR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com 14-Jul-2012

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

LOG102AIDR SOIC D 14 2500 367.0 367.0 38.0

Pack Materials-Page 2

IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other

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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms

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Copyright © 2012, Texas Instruments Incorporated

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