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  • AVR Microcontroller and Embedded Systems - Vol - 3

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    AVR Microcontroller and Embedded Systems_vol_3

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    © All Rights Reserved
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    Sinalizar o conteúdo como inadequado
    10 visualizações91 páginas

    AVR Microcontroller and Embedded Systems - Vol - 3

    Enviado por

    anil ari
    AVR Microcontroller and Embedded Systems_vol_3

    Direitos autorais:

    © All Rights Reserved
    Baixe no formato PDF ou leia online no Scribd
    Sinalizar o conteúdo como inadequado
    de 91
    CHAPTER 6 AVR ADVANCED ASSEMBLY LANGUAGE PROGRAMMING >> >> Upon completion of this chapter, you will be able to: OBJECTIVES List all the addressing modes of the AVR microcontroller Contrast and compare the addressing modes Code AVR Assembly language instructions using each addressing mode Access the data RAM file register using various addressing modes Code AVR instructions to manipulate a look-up table Access fixed data residing in the program Flash ROM space Discuss how to create macros Explain how to write data to EEPROM memory of the AVR Explain how to read data from EEPROM memory of the AVR Code AVR programs to create and test the checksum byte Code AVR programs for ASCII data conversion 197 In Section 6.1, you leam some new assembler directives that are used throughout this chapter. In Sections 6.2 through 6.4 we see the different ways in which we can access program and data memories in the AVR. Section 6.5 explains the bit-addressability of the data memory space. In Section 6.6 we discuss how to access EEPROM in the AVR. Checksum generation and BCD-ASCII conversions are covered in Section 6.7. Macros are examined in Section 6.8. SECTION 6.1: INTRODUCING SOME MORE ASSEMBLER DIRECTIVES In Chapter 2, we introduced the assembler directives .ORG, SET, and .INCLUDE. In this section, you will leam some other useful directives. Arithmetic and logic expressions with constant values ‘As you saw in Chapter 2, we can define constant values using .EQU. The AVR Studio IDE supports arithmetic operations between expressions. See Table 6-1. For example, in the following program R24 is loaded with 29, which is the result of the arithmetic expression “ ( (ALFA-BETA)* 2) +9". -EQU ALFA = 50 -£QU BETA = 40 LDI R23, ALFA 7R23 = ALFA = 50 LDI R24, ( (ALFA-BETA)* 2) +9 R24 = ((50-40)¥2)+9 = 29 The AVR Studio IDE supports logic operations between expressions as well. See Table 6-2. For example, in the following program R21 is loaded with 0x14: -EQU Cl = 0x50 -£QU C2 = 0x10 -EQU C3 = 0x04 LDI R21, (C1&C2) |C3_ ;RZ1=(0x10&0x50) |Ox04 = Ox10/0x04= 0x14 In Table 6-3 you see the shift operators, which are very useful. They shift left and right a constant value. For example, the following instruction loads the R20 register with 0b00001110: LDI R16, 0b00000111<<1 ;R16 = 0600001110 One of the uses of shift operators is for initializing the registers. For exam- Table 6-1: Arithmetic Operators Table 6-2: Logic Operators Symbol Action Symbol Action + Addition & Bitwise AND = Subtraction. L Bitwise OR * Multiplication “ Bitwise XOR_ L Division ~ Bitwise NOT % Modulo 198 Table 6-3: Shift Operators Symbol Action Example << Shifts left the left expression - LDT._ R20, 0b101<<2 ;R20=0b10100 by the number of places given by the right expression >> Shifts right the left expression DI R20,0b100>>1 ;R20=0b010 by the number of places given by the right expression Bit b7 ct) sees Li [TT THT sTVv[TNTz{o¢ ] Figure 6-1. Bits of the Status Register ple, suppose we want to set the Z and C bits of the SREG (Status Register) regis- ter and clear the others. Look at Figure 6-1. If we load 0600000011 to SREG the task will be done: LDI R20, Ob00000011 72 = 1, C= 1 OUT SREG, R20 In this example, we calculated the 0b00000011 number by looking at Figure 6-1. But imagine you are writing a program and you want to do the same task; you have to open the datasheet or a reference book to see the structure of the SREG register. To make the task simpler, the names of the register bits are defined in the header files of each AVR microcontroller. For example, in M32DEF.INC there are the following lines of code: ; SREG - Status Register requ SREG_C = 0 ;carry flag sequ SREG_Z = 1 j2ero flag sequ SREG_N = 2 jnegative flag sequ SREG_V = 3 2's complement overflow flag sequ SREG_S = 4 jsign bit sequ SREG_H =5 shalf carry flag sequ SREG_? = 6 bit copy storage equ SREG I = 7 global interrupt enable So, we can use the names of the bits instead of remembering the structure of the registers or finding them in the datasheet. For example, the following pro- gram sets the Z flag of the SREG register and clears the other bits: LDI R16, 1<

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