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The envelope of IC package is made of plastic or ceramic. Most packages have standard sizes, and the number
of pins ranges from 8 to 64.
Each IC has a numeric designation printed on the surface of the package for identification. Each vendor publishes
a data book or catalog that provides the necessary information concerning the various products.
The size of the IC packages is very small. For example, four AND gates are enclosed inside a 14-pin DIP package
with dimension of 20x8x3 millimeters. An entire microprocessor is enclosed within a 40-pin DIP package with
dimensions of 50x15x4 millimeters.
The cost of ICs is very low: which makes them economical to use.
Reduced power consumption: which makes the digital system more economical to operated.
High reliability against failure: so the digital system needs less repairs.
High operating speed: which makes them suitable for high speed operations.
Reduced number of external wiring connections: since many of the connections are internal to the package.
# Categories of IC
(a) Linear ICs (Analog ICs): Which operates with continuous signals to provide electronic functions such as
amplifiers and voltage comparators
(b) Digital ICs: which operates with binary signals and are made up of interconnected digital gates such as adder,
subs tractor; encoder, decoder etc.
As the technology of ICs has improved, the number of gates that can be put on a single silicon chip has increased
considerably.
SSI (Small Scale Integration): Several logic gates (1 – 10) in a single package.
MSI (Medium Scale Integration): To qualify as a MSI device, the IC must perform a complete logic function
and have a complexity of 10 to 100 gates.
LSI (Large Scale Integration): A LSI device performs a logic function with more than 100 gates.
VLSI (Very Large Scale Integration): Contains thousands of gates in a single chip.
ULSI (Ultra Large Scale Integration): 10 thousand ++ gates on a single chip.
GSI (Giga Scale Integration): Up to 100 thousand gates on a single super chip.
Legend:
RTL – Resistor Transistor Logic DCTL – Direct Coupled Transistor Logic
IIL – Integrated Injection Logic DTL – Diode Transistor Logic
HTL – High Threshold Logic STTL – Schottky TTL
pMOS – p-type MOSFET Logic nMOS – n-type MOSFET Logic
CMOS – Complimentary MOS Logic
The circuits in which transistors are driven into saturation are called saturated circuits. The circuits that avoids
saturations region during logical operation is non-saturated circuits; they only make use of active and cut-off
mode during logical operation.
Fan-In is the number of inputs of a logic gate that it can handle without impairing its normal operation.
Propagation delay increases with number of inputs. Such as, a two input NAND gate is faster than four input
NAND gate.
Logical
Symbol
Fan-In 1 2 3
Fan-Out is the maximum number of digital inputs that the output of a single logic gate can feed where the gate
must be from same logic family. Each of the connected logic gate will be considered as a unit load. A unit load
determines how many connections we can make from the output from a single logic gate. In following figure,
the output of a driving NAND gate is fed to three-unit load (or load gates) during two states.
Figure: Current Sourcing in High State Figure: Current Sinking in Low State
It is the time taken for the output of a gate to change after the input is applied. The output could be logic 0 or 1.
- If the output changes for logical 0 to logical 1 state, then the propagation delay = T pLH
- If the output changes for logical 1 to logical 0 state, then the propagation delay = T pHL (TpLH ≠ TpHL)
In timing diagram, propagation delay is calculated between a designated point on the input pulse and the
corresponding point on the output pulse. Usually the propagation delay times are indicated with 50% point on the
pulse edges used as reference. Since, the value of TpLH and TpHL is not equal, hence we calculate an average
propagation delay: Average Propagation Delay (Td) = (TpHL + TpLH)/2
It is the power consumed by the gate when fully driven by all the inputs, which must be available from the power
supply. If the input keep changing frequently, then we will calculate an average power dissipation given by:
Speed-Power product is a common means of measuring and comparing the overall performance of IC family.
It is also known as figure of merit. It is the product of propagation delay (in Seconds) and power dissipation (in
Watts = Joules/Seconds). Since, we want a logic gate in which the propagation delay is minimum and consume
less power, so a low value of Speed-Power product is desirable.
⸫ Speed Power Product/Figure of Merit (J) = Propagation Delay (S) x Power Dissipation (J/S)
- The logic circuits may encounter noise voltages from different part of the circuit. If the noise voltage exceeds
certain level or specific limit the logic circuit malfunctioned. This arises two terms Noise Immunity and Noise
Margin.
- Noise immunity is the circuit’s ability to tolerate noise at the input side. To measure the noise immunity of a
circuit we use a term Noise Margin. The amount of noise voltage for which the digital circuit will capable of to
tolerate that noise voltage is known as Noise Margin. It is a quantitative measure of noise immunity or the
amount of noise spike that the logic can withstand.
- Hence, two Noise Margins are specified for logic circuits, High Level Noise Margin (NMH) and Low Level
Noise Margin (NML), they are expressed as: