Lecture Notes

Synthesis and Fabrication
of Electronic Materials
Asso. Prof. Dr. Nguyen Van Hieu

International Training Institute for Materials Science (ITIMS)
Lab. Of Micro-System and Sensors Technology
Gas Sensor Group
Lecture Content
5.1. Introduction to semiconductors
5.1.1.Essentials on semiconductors (“refreshing”)
5.1.2.History of semiconductor technology
5.2. Growth and process of semiconductor materials
5.2.1. Types of semiconductors.
5.2.2. Crystal growth and wafer fabrication
5.2.3. Physical and chemical vapor deposition (PVD&CVD).
5.3. Synthesis of one-dimensional nanostructures
5.3.1. Synthesis of carbon nanotubes.
5.3.2. Synthesis of metal oxide nanowires (NWs).
5.4. Nanostructures fabricated by physical methods
5.5. Practice on the synthesis of ZnO and SnO2 NWs

5.1.1.Essentials on semiconductors
Metallic conductor:
typically 1 or 2 freely moving electrons per atom
Semiconductor:
typically 1 freely moving electron per 109-1017
atoms
What is the result on the properties of such a
material?
1

Semiconductors in the periodic table
II III IV V VI Elemental semiconductors:
C, Si, Ge (all group IV)
Be B C N O Compound semiconductors:
III-V: GaAs, GaN…
Mg Al Si P S II-VI: ZnO, ZnS,…
Group-III and group-V

Zn Ga Ge As Se atoms are “dopants”

Small impurities can dramatically change
conductivity:
slight phosphorous contamination in silicon gives
many extra free electrons in the material (one per P
atom!)
slight aluminum contamination gives many extra
holes (one per Al atom)
P Al
2
- Atomic radius:
0.117nm, or
0.234nm.
-Lattice constant:
0.5nm.
-Atomic radius ~ As,
In (0.121, 0.166)

Silicon dopants
II III IV V VI Boron most widely used
as p-type dopant;
Aluminum in old processes
Be B C N O (Indium (In) seldom used)
Mg Al Si P S Phosphorous and arsenic

both used widely as n-type
dopant
Zn Ga Ge As Se (Antimony (Sb) seldom used)
In P: higher diffusion,
better activation than As

p-n junction (diode)
n-type doped semiconductor p-type doped semiconductor

e.g. silicon with phosphorus impurity e.g. silicon with Al impurity
electrons determine conductivity holes determine conductivity
p-n junction:
current can only flow one way!
Semiconductor diode
3
The field effect
accumulation ++++++++
depletion
- - - -
inversion
----------

Over 35 years
The chip
contains
The chip over a
contains million
04 bipolar MOS
transistors transistors

IC Minimum
Feature Size
4
IC Minimum Feature Size

Ultimate Small Scale Structure

5
1950 Junction Transistor

1950 - Alloy Junction Transistor

1958 – First Planar Transistor
6
Basic Bipolar Paired Transistors
Bias “Resistor” NPN Bipolar Device Bias “Resistor”

Modern Integrated Circuit Section

SEM Cross-Section of Integrated Circuit
Wiring Layers
Wiring Layers
Wiring Layers
Vias through
Passivating Layers
CMOS Devices
7
1) Elemental semiconductors
2) Binary compounds
3) Oxide semiconductors
4) Layered semiconductors
5) Magnetic semiconductors
6) Amorphous semiconductors
7) Organic semiconductors
Lecture Content
5.1.1.Essentials on semiconductors (“refreshing”)
5.2.2. Crystal growth and wafer fabrication
5.2.3. Physical and chemical vapor deposition (PVD&CVD).
5.3.2. Synthesis of metal oxide nanowires (NWs).
5.5. Practice on the synthesis of ZnO and SnO2 NWs

1) Elemental semiconductors
The elements Si and Ge are well-kwon
semiconductors.
Their crystal structures are the same as
diamonds.
Some elements from the group
V and VI of the periodical table
such as P, S, Se, Te are also
semiconductors
8
2) Binary compounds
Compounds formed from elements of the groups: III-V (such

as GaAs); II-VI (such as HgTe); I-VII (such as CuCl)
5.2.1 Types of semiconductors.

3) Oxide semiconductors
CuO and Cu2O are well-known semiconductors.
SnO2 Eg=3.6 eV ZnO=3.37 eV

4) Layer semiconductors
•Typical layer semiconductors are PbI2, MoS2,
GaSe.
•The bonding within layers is typically covalent.
•The behavior of electrons in the layer is quasi-
two dimensional.
•The interaction between layers can be modified
by incorporating foreign atoms.
9
5) Magnetic semiconductors
• Many compound containing
magnetic ions such as Eu, Mn, Co
have semiconductor and magnetic
properties.
• The magnetic alloy semiconductors
containing lower concentrations of
magnetic ion are known as dilute
magnetic semiconductor.
• Traditional electronic devices are
based on control of electric charge,
but magnetic semiconductors allow •Atoms of Mg can be inserted at
control of quantum spin-state. desired locations by using STM.
•MBE is used for doping
• This would theoretically provide spin •That material is used to fabricate the
polarization, which is important storage devices.
property of SPINTRONIC DEVICES

6) Amorphous semiconductors
Definition: Amorphous materials are in condensed phase and
do not possess the long range translational order (periodicity)
of atomic sites.
A glass is an amorphous solid which exhibits a glass transition.
Usually we are speaking about three

different orders (simplest definition):
Short range order means the order within
the range of 0-10 Å (local order).
Medium range order is the order within the
range of 10-100 Å.
Long range order means order over 100 Å.
a-Si:H is typical amorphous

semiconductors.

7) Organic semiconductors
Semiconductor in organic materials-mechanism
They have been extensively

used for optical devices such
as solar-cell, OLED,
10
5.2.2. Crystal growth and wafer fabrication.
a) The Czochralski Technique
b) Float-Zone Process
c) Wafer Fabrication
d) Modeling Crystal Growth
e) Bridgman Technique

The raw Si used for crystal growth is purified from SiO2

(sand) through refining, fractional distillation and CVD.
• The raw material contains < 1 ppb impurities except for O
(≈ 1018 cm-3 ) and C (≈ 1016 cm-3).
• Essentially all Si wafers used for ICs today come from
Czochralski grown crystals.
• Polysilicon material is melted, held at close to 1415 ˚C, and
a single crystal seed is used to start the crystal growth.
• Pull rate, melt temperature and rotation rate are all
important control parameters.

•The Czochralski technique uses an
apparatus called a Crystal puller.
•The puller has three main components:
(i) a furnace, includes a fused-silicon
(SiO2) crucible, a graphite susceptor, a
rotation mechanism, heating elements,
and power supply; (ii) a seed holder and
a rotation mechanism; (iii) an ambient
control (gas source, a flow control).
•Typical pull rate is a few millimeter per
minute.
11
b) Float-Zone Process
• An alternative growth process

is the float zone process which
can be used for either refining
or single crystal growth.
•A high-purity polycrystalline rod
with a seed crystal at the bottom
is held in a vertical and rotated.
•A small zone (a few
centimeters in length) is kept
molten by RF heater

c) Wafer preparation
After crystal pulling, the
boule is shaped and cut
into wafers which are
then polished on one
side.
Chemical-Mechanical Polishing (CMP),
used a slurry consisting of 10 nm
particle SiO2 and NaOH solution.

•We wish to find a relationship between pull rate

and crystal diameter.
• Freezing occurs between isotherms X1 and X2.
Heat balance: latent

heat of crystallization +
heat conducted from
melt to crystal
= heat conducted away.
12


d) Bridgman Technique
e) GaAs Crystal Growth
Preparing polycrystalline AsGa:

The high purity As is placed in a
graphite boat and heated to 610-
620°C.
The high purity Ga is placed in
another graphite boat and heated
1240-1260oC.
An overpressure of As causes the
transport of As vapor to Ga melt,
converting it to GaAs polycrystalline.
-Two Zones furnace is moved towards the right, the melt cools at one end.
-The gradual freezing of the melt allows a single crystal at the liquid-solid interface.
13
5.2.3. Physical and chemical deposition.
PVD (Physical Vapor Deposition)
Thermal evaporation and MBE
Sputtering
CVD (Chemical Vapor Deposition)
APCVD and LPCVD
PECVD and HDPCVD
ALD

• PVD uses mainly physical processes to produce reactant
species in the gas phase and to deposit films.
• In evaporation, source material is
heated in high vacuum chamber (P < 10-5
torr).
• Mostly line-of-sight deposition since
pressure is low.
• Deposition rate is determined by emitted
flux and by geometry of the target.
• The evaporation source can be
considered either a point source or as a
small area surface source (latter is more
applicable to most evaporation systems).

EVAPORATION and MBE
Molecular beam epitaxy system

Pressures: below 10-6 Pa
Simple evaporation system
Pressures: 10-3-10-8 Pa
14
Source:
- The level of contamination in films
deposited is generally relatively
large.
- It is commonly used to deposit
metal layer.
- Different sources are used for the
thermal evaporation.
-Electron beam evaporators (EBE)
can produce electron currents in
excess of 1A at a high energy,
resulting in many kilowatts of
heating power.
- The EBE can be used to
evaporate very low vapor pressure
materials such as Ir and Re.

PVD-THERMAL EVAPORATION
Vapor pressure:
It is very important parameter for this technique.
Is the latent heat of vaporization for the

V
solid.
Monitoring deposition rates:
-Quartz crystal microbalances
- Electron emission spectroscopy (EIES)
- Ionization gauge
- Glow-discharge optical spectroscopy
- Mass spectrometry
15
Sputtering
• Uses plasma to sputter
target, dislodging atoms
which then deposit on
wafers to form film.
• Higher pressures than
evaporation - 1-100 mtorr.
• Better at depositing alloys
and compounds than
evaporation.

DC-Sputtering
• The plasma contains ~ equal numbers
of positive argon ions and electrons as
well as neutral argon atoms.
• Most of voltage drop of the system (due
to applied DC voltage, Vc) occurs over
cathode sheath.
• Ar+ ions are accelerated across cathode
sheath to the negatively charged
cathode, striking that electrode (the
“target”) and sputtering off atoms.
These travel through plasma and deposit
on wafers sitting on anode.

•Rate of sputtering depends on the sputtering yield, Y, defined
as the number of atoms or molecules ejected from the target
per incident ion.
•Y is a function of the energy and mass of ions, and the target
material. It is also a function of incident angle.
• Y does not vary between target materials as much as the
vapor pressure does. Controlling composition of alloys is
easier with sputtering than with evaporation.
• Sputtering targets are

generally large and
provide a wide range of
arrival angles in contrast
to a point source.
16
RF-Sputtering
• For DC sputtering, target electrode is conducting.
• To sputter dielectric materials use RF power source.
Why the DC sputter is not suitable for insulation target ?
With a negative DC voltage applied,

positive argon ions from the plasma
strike the negatively charged insulator
and positive charge would accumulate.
The negative surface voltage would
become less than that required to
sustain is glow discharge, and plasma
would shut down.

RF-Sputtering
• Due to slower mobility of ions vs. electrons, the plasma
biases positively with respect to both electrodes. More
electrons than argon ion collected at each electrode, and
negative charge build up on the electrodes.
• When the electrode areas are not equal, the field must be
higher at the smaller electrode (higher current density), to
maintain overall current continuity.

CVD (Chemical Vapor Deposition)
Examples:
• Deposition of epitaxial (single crystal)
silicon in cold-walled, atmospheric
pressure system:
SiCl4(g)+2H(g)=Si(s)+ HCl(g) (1)
SiH4(g) =Si(s) +2H2(g) (2)
• Deposition of amorphous silicon
dioxide in hot-walled, low pressure
system:
SiH4(g)+O2(g)=SiO2(s) + 2H2(g) (3)
17
CVD=> APCVD & LPCVD
Steps involved in a CVD process:
1. Transport of reactants to the
deposition region.
2. Transport of reactants from the
main gas stream through the
boundary layer to the wafer surface.
3. Adsorption of reactants on the wafer surface.
4. Surface reactions, including: chemical decomposition or
reaction, surface migration to attachment sites (kinks and
ledges); site incorporation; and other surface reactions (emission
and redeposition for example).
5. Desorption of by-products.
6. Transport of by-products through the boundary layer.
7. Transport of by-products away from the deposition region.

CVD=> APCVD & LPCVD

CVD=> PECVD & HDPCVD
• Non-thermal energy to enhance
processes at lower temperatures.
• Plasma consists of electrons, ionized
molecules, neutral molecules, neutral
and ionized fragments of broken-up
molecules, excited molecules and free
radicals.
• Free radicals are electrically neutral species that have
incomplete bonding and are extremely reactive. (e.g. SiO, SiH3, F)
• The net result from the fragmentation, the free radicals, and the
ion bombardment is that the surface processes and deposition
occur at much lower temperatures than
in non-plasma systems.
18
CVD=> PECVD & HDPCVD
• Remote high density plasma with

independent RF substrate bias.
• Allows simultaneous deposition and
sputtering for better planarization and
void-free films (later).
• Mostly used for SiO2 deposition in
backend processes.

CVD=> ALD (Atomic Layer Deposition)
ALD has a self-limiting growth nature, each time only one
atomic or molecular layer can grow.
ALD source gases must have dramatically different reaction,

adsorption and/or desorption rates on surfaces with different
chemistries.

CVD=> ALD, An example
19
CNT synthesis methods overview:

•Arc discharge synthesis
•Laser ablation synthesis
•Thermal synthesis
• Chemical vapor deposition
• High-pressure carbon monoxide synthesis
• Flame synthesis
•PECVD synthesis

Arc discharge synthesis
•Arc discharge was the first recognized method for producing both
SWCNTs and MWCNTs, and has been optimized to be able to produce
gram quantities of either.
• Currently, most growth is carried out in an

Ar:He gas mixture.
• The current standard widely used for
SWCNT production is a Y:Ni mixture that
has been shown to yield up to 90%
SWCNT, with an average diameter of 1.2
to 1.4 nm

Laser ablation synthesis
The laser ablation technique uses a 1.2 at. % of cobalt/nickel

with 98.8 at.% of graphite composite target that is placed in a
1200°C quartz tube furnace with an inert atmosphere of ~500
Torr of Ar or He and vaporized with a laser pulse
20
Thermal synthesis: CVD,

The CVD process
encompasses a wide range of
synthesis techniques, from
the gram-quantity bulk
formation of nanotube
material to the formation of
individual aligned SWCNTs
on SiO2substrates for use in
electronics.
Simply put, gaseous carbon feedstock is flowed over

transition metal nanoparticles at medium to high temperature
(550 to 1200°C) and reacts with the nanoparticles to produce
SWCNTs

High-pressure carbon monoxide synthesis
1. One of the recent methods for

producing SWCNTs in gram to
kilogram quantities is the HiPco
process.
2. One of the recent methods for

producing SWCNTs in gram to
kilogram quantities is the HiPco
process.
3. The metal catalyst is formed in situ when Fe(CO)5 or Ni(CO)4 is injected
into the reactor along with a stream of carbon monoxide (CO) gas at 900
to 1100°C and at a pressure of 30 to 50 atm.

PECVD synthesis
(PECVD) systems have been used to produce
both SWCNTs and MWCNTs.
For SWCNT synthesis in the direct PECVD

system, the researchers heated the substrate
up to 550 to 850°C, utilized a CH4/H2 gas
mixture at 500 mT, and applied 900 W of
plasma power as well as an externally applied
magnetic field.
The remote PECVD

system utilized by Li et al. used CH4/Ar
held at 500 mT, with only 50 to 75
W of plasma power.29
21
Specifics of CVD growth method (self reading)

2.3.1 Growth mechanics
2.3.2 Carbon feedstock
2.3.3 Catalyst
2.3.3.1 Unsupported catalyst
2.3.3.2 Supported catalyst
2.3.3.3 Vapor phase catalyst
2.4 Recent advances in SWCNT growth control
2.4.1 Location and orientation control
2.4.1.1 Catalyst patterning
2.4.1.2 Suspended aligned SWCNTs
2.4.1.3 Aligned SWCNTs on substrates
2.4.2 Growth of ultralong SWCNTs
2.4.3 Water-assisted high-yield growth of SWCNTs
2.4.4 Diameter and chirality control

Growth mechanics:
CNT growth in CVD can be split into two basic types depending on the
location of the catalyst, so-called gas phase growth, and substrate growth.
The mechanism can be classed into “surface carbon diffusion” and “bulk carbon
diffusion”.
•Surface carbon diffusion: The “cracked” carbon diffuses around the surface
of solid metal particle.
•Bulk carbon diffusion: The “cracked” carbon dissolves in the metal liquid
droplet. The droplet dissolves the carbon until it reaches saturation (V-L-S).
•In substrate growth, once the nanotube

begins to grow by either surface or bulk
carbon diffusion, the CNT will undergo either
base growth or tip growth.
•Tip and base growth is dominated
mechanism for MWCNTs and SWCNTs
growth, respectively.

5.3.2. Synthesis of nanowires
Vapor phase growth of nanowires

•Vapor–liquid–solid growth
•Oxide-assisted growth
•Vapor–solid growth
•Carbothermal reactions
Solution based growth of nanowires

•Highly anisotropic crystal structures
•Template-based synthesis
•Solution–liquid–solid process
•Solvothermal synthesis
22
•Vapor–liquid–solid growth (1)
the liquid alloy becomes supersaturated with Ge,
precipitation of the Ge nanowire occurs at the solid-
liquid interface.
Real-time observations of Ge nanowire growth in an in

situ high-temperature TEM, which demonstrate the
validity of the VLS growth mechanism.

•Vapor–liquid–solid growth (2)
GaAs, GaP, GaAsP, InAs, InP, InAsP II-VI seminconductior ZnS, ZnSe, CdSe,
Oxide semiconductor SnO2, ZnO, TiO2, WO2.. Have been synthesized.
ZnO
nanowires
Diameter
nanowires
controll

•Vapor–solid growth
Vapor-solid growth is a
catalyst-free process whereby
deposition occurs when vapor
condenses to form a solid.
The vapor then can solidify,

forming a small crystal on the
substrate (see Figure b). This
crystal can now act as a
“seed” to promote further
deposition of the local vapor
(see Figure c).
23
•Template-based synthesis
The various inorganic materials
include Au, Ag, Pt, TiO2, MnO2,
ZnO, SnO2,In2O3, CdS, CdSe,
CdTe,
Nanowires themselves can be used

as templates to generate the
nanowires of other materials. The
template may be coated to the
nanowire (physical) forming
coaxial nanocables
5.4.1. Lithography techniques

Elements of photolithography
Phase shifting optical lithography
Electron beam lithography
X-ray lithography
Focussed ion beam lithography
5.4.2. Nanomanipulation and nanolithography
Scanning tunneling microscopy (STM)
Atomic force microscopy (AFM)
Nanomanipulation
Nanolithography
5.4.3. Solt lithography

Microcontact printing
Molding
Nanoimprint
Dip-pen nanolithography
5.4.4. Sefl-assembly of nanoparticles or nanowires

Capillary force induced assembly
Dispersion interaction assisted assembly
Shear force assisted assembly
Covalently linked assembly
Gravitational field assisted assembly
Template assisted assembly
24
•Elements of photolithography
•Phase shifting optical lithography
•X-ray lithography
•Electron beam lithography
•Focussed ion beam lithography

Lithography consists of patterning substrate by

employing the interaction of beams of photons or
particles with materials.
Photolithography is widely used in the integrated
circuits (ICs) manufacturing.
The process of IC manufacturing consists of a series of

10-20 steps or more, called mask layers where layers of
Lithography consists
Photolithography is widely
of patterning
used in substrate
the integrated
by employing
circuits (ICs)
the
materials coated with resists are patterned then
manufacturing.
interaction of beams of photons or particles with materials.
transferred onto the material layer.

Spin-on photoresist
Expose locally with UV light
Develop photoresist
UV-light
mask
photo-resist
silicon oxide
silicon substrate
25
A photolithography system consists of a

light source, a mask, and a optical
projection system.
Photoresists are radiation sensitive
materials that usually consist of a photo-
sensitive compound, a polymeric
backbone, and a solvent.
Resists can be classified upon their
solubility after exposure into: positive
resists (solubility of exposed area
increases) and negative resists (solubility
of exposed area decreases).

Contact Printing Proximity Printing Projection Printing

Micro- and nanolithography
Present techniques in IC manufacturing involve dimensions in order

of 200-300 nm.
Diffraction and other optical effects limit the resolution of
“standard” UV photolithography to the ~100 nm range.
Photolithography continues to support IC manufacturing in the sub-
100 nm region through continuous advances in optics (UV to DUV
to EUV) and resist engineering.
Exploratory research in the sub-100 nm region may also be
accomplished through alternate patterning techniques such as x-
ray-, ion- and electron beam- lithography.
26
Phase shifting optical lithography
Photolithographic
resolution of ~ λ/4n
This method has been used
to product a feature line as
narrow as 50nm
To increase reslosion:
(i) Reducing wavelength
(ii) Increasing the index of refraction of
the photoresist

X-Ray lithography
Wavelenghts in the
range of 0.04 to 0.5nm
(1) A mask consisting of a
pattern made with an X-ray
absorbing material on X-
ray transparent membrane.
(2) An X-ray source of
sufficient brightness in the
wavelength range of
interest to expose the resist
Diffraction limits lithography resolution to λ/2 through the mask.
Obvious solution: use lower wavelengths sources
DUV and EUV approaching standardization (3) An X-ray sensitive to
X-Ray lithography still at “exploratory” stage
resist material


X-Ray lithography
Resolution limit: 25nm
35nm Au line (a) and

20nm W dot (b)
27
X-Ray lithography
Structures produced with X-ray litho.
Device patterns with feature sizes less than 40 nm achieved by x-ray

lithography and by lift off.

X-Ray lithography
Structures produced with X-ray lithography
125 nm feature

1) Casting of thin PMMA film 3) Development of PMMA

The resolution is limited
e
by: (i) forward scattering
of the electrons in the
resist; and (ii) back
4) Metallization scattering from the
underlying substrate.
It is the most powerful

2) E-beam patterning of PMMA tool for the fabrication of
5) Lift-off
feature size of 3-5nm.
Employs a beam of electron instead of photons
Advantage: Fast turn-around time
Disadvantage: Slow throughput
28
Applications of electron beam lithography
Mainly employed for the

fabrication of photomasks
Also used to write patterns directly on wafer

Electron beam lithography system
Throughput
enhanced by variable
beam shaping

Focused Ion Beam Lithography

FIBL components:
Ion source
Ion optics column
Sample displacement table

Specifications:
Accelerating voltage 3-200 kV.
Current density up to 10 A/cm2 .
Beam diameter 0.5-1.0 μm.
Ions: Ga+ , Au+ ,Si+ ,Be+ etc.
FIB is a very attractive tool in

lithography, etching, deposition, and
doping.
29
Focused Ion Beam Lithography
FIB fabricated nanostructures
5.4.2.Nanomanipulation and nanolithography
•Scanning tunneling microscopy (STM)

•Atomic force microscopy (AFM)
•Nanomanipulation
•Nanolithography

Scanning tunneling microscopy (STM)
Current
Feedback
30
Atomic force microscopy (AFM)

Nanomanipulation (1)
“The interactions or forces between the tip and the sample

surface offer a means to carry out precise and controlled
manipulation of atoms, molecules and nanostructures on a
surface”
Eigler and coworkers used STM by

applying pulse voltage.
Ultrahigh vacuum and ultra low
temperature.
The tungsten tip was used
Two processes has been identified for to position 35 xenon atoms
the manipulation, namely parallel and on a nickel surface,
Perpendicular processes. “IBM”

Parallel Process characteristics

•The STM tip drags the atom (molecule ) along the surface and positions
the atom (molecule) at a desired spot.
•The bond between the manipulated atom (molecule) is never broken.
•The relevant energy barrier for such a process is the energy required for
diffusion across the surface, typically in the range of 1/10 to 1/3 of the
adsorption energy.
Two groups of parallel process:
-Field-assisted diffusion
-Sliding process
31
The field-assisted diffusion:

•Based on the present of the intense and inhomogeneous
electric field between the STM probe tip and surface.
•Directional diffusion of atom is due to interaction of the field
with the dipole moment of the atom.
The sliding process:
•It is based on the force between the STM and atom.
•The directional motion of atom is achieved by adjusting the
position of the tip, so the force between the STM and atom
will pull the atom across the surface with the tip.

STM can be used for

chemical manipulation and
the ability of single molecule
dissociation and construction.
Iodobenzen (C6H5I) molecule, the

C-I bond is break by injection of
1.5eV tunneling electrons.

AFM has also been explored for nano manipulation and fabrication.
Difference with STM, AFM tip is literally dragged across the substrate
surface.
Depending on the nature of the interaction between the tip and atom,
three basic manipulation modes is pushing, pulling, and sliding.
32
In comparison with other nanofabrication methods

•The SPM tip has a nano-scale sharp and is the best nanomanipulation
tool, it offers extremely fine position control in all tree dimensions, It
promises manipulating a single atom.
•It offers the ability of both manipulation and characterization insitu.
Fe atom contracted on
Cu (111) using STM

Nanolithography(1)
SPM-based nanolithogrphy:
•Local oxidation and passivation.
•Localized chemical vapor deposition.
•Electrodeposition
•Mechanical contact of the tip with the surface.
•Deformation of the surface by electrical pulse.
• Anodic oxidation of the sample surface and exposure of
electron resist.
Patterns with sizes of 10-20nm or to 1nm (in UHV)

have been demonstrated.

Nanolithography(2)
¾Nanometer holes can be formed using low energy electrons from STM
tip when a pulsed electric voltage is applied at the presence of surface
gas molecule between the substrate and the tip.
¾A possible mechanism is that the electric filed induces the ionization of
gas molecules near the STM tip, and accelerate the ions towards the
substrate.
¾Nanostructures can be created using field
evaporation by applying bias pulses to the
STM tip-sample tunneling junction.
d is large, the tip-atom and atom-sample
interactions Uat and Uas do not overlap.
When d is small, the atom can be either
transferred from the tip to the sample or
from sample to the tip
33
Nanolithography(3)
Field-gradient induced surface diffusion

When a voltage pulse is applied to either tip
or the sample, a field with a larger gradient
will be created at the sample surface around
the tip => atoms move toward the position
directly below the tip (the field is the
strongest).
Field electron current are emitted either from the tip or the sample can
melt the tip => a mount of tip atoms on the sample surface (deposition)

Nanolithography(4)
AFM lithography with tunneling currents

Conducting AFM tip
Scan AFM in constant force mode
Develop modified areas of resist
Si Substrate

Nanolithography(5)
AFM lithography using anodic oxidation

Biased AFM scanned over H-
passivated p+ Si
Oxide ions in field react with

substrate
Pattern fabricated on Ti
substrate with elevated
features being TiO2.
Resolution is a few nm.
34
Nanolithography(6)
Nanowires fabrication example
Cr nanowire using mechanical

AFM lithography
Cr nanodots using the

same process
5.4.3. Soft lithography
•Microcontact printing
•Molding
•Nanoimprint
•Dip-pen nanolithography

Microcontact printing (1)
Microcontact printing is a
technique that uses an
elastomeric stamp with relief on
its surface to generate patterned
SAM (self-assembled
monolayer) on the surface
1) Application of ink 2) Application of stamp
to stamp to surface
3) Removal of stamp 4) Residues rinsed off
35
(a)
(a) Printing on a planar
substrate with a planar
stamp.
(b) Printing on a planar
substrate with rolling
stamp.
(c) Printing on a curved
substrate with a planar (c)
stamp. (b)
PDMS =
Poly(imethylsiloxane)

Printing of PDMS

Molding
Micromolding in capillaries.
“a liquid precursor wicks spontaneously
by capillary action into the network of
channels formed by conformal contact
between an elastomeric stamp and a
substrate”
Microtranfer molding.
“Recessed regions of a elastomeric mold
are filled with a liquid precursor”
Replica molding.
“Micro-nanostructures are directly formed
by casting and solidifying a liquid
precursor again an electrometric mold”
36
Nanoimprint
•It was developed in the middle of 1990’s.

•It has demonstrated both high resolution and high throughput
for making nanometer scale structures.
Stamp with the desired feature.
Typically, thermoplastic polymer
is the printed materials.
•Consists of pressing a mold

onto the resist above its glass
transition temperature Tg

Nanoimprint
-Step size should be controlled to get the parallelity of the

substrate and thermal gradient.
-The flow of the displaced polymer could set a limit to the
feature density.
-Imprint of 50 nm feature separated by 50nm spaces within
an area of 200 x 200 μm has been demostrated.

Nanoimprint
SiO2 pillars with 10 nm

diameter, 40 nm spacing, and
60 nm height fabricated by e-
beam lithography.
Master can be used tens of

times without degradation
Stamp
37
Nanoimprint
Mask is pressed into 80 nm thick

layer of PMMA on Si substrate at
175° C (Tg=105 ° C), P= 4.4
MPa.
PMMA conforms to master

patterng, resulting in ~10 nm
range holes
pattern in PMMA

Nanoimprint
Reactive ion etching is used

to cut down resist thickness
until shallow regions are
completely removed
Ti/Au is deposited onto
resist.
Resist and metal-coating is
removed by solvent leaving
behind metal dots where
resist had been removed.
Metal dots

It is a direct-write method based upon an AFM and works under ambient

conditions.
Chemisorption is acted as a driving force for moving the molecules from
the AFM tip to the substrate via the water filled capilary.
38
A) Ultra-high resolution pattern of mercaptohexadecanoic acid on

atomically-flat gold surface. B) DPN generated multi-component
nanostructure with two aligned alkanethiol patterns. C) Richard
Feynmann's historic speech written using the DPN nanoplotter
5.4.4. Seft-assembly of nanoparticles or

nanowires
•Capillary force induced assembly

•Dispersion interaction assisted assembly
•Shear force assisted assembly
•Electric-field assisted assembly
•Covalently linked assembly
•Gravitational field assisted assembly
•Template assisted assembly
4. Seft-assembly of nanoparticles or nanowires

One of the commoly used

strategies of self-assembly of
nanoparticles in order 2D
array.
Basing on lateral capillary
force due to deformation of
liquid surface creating by
the particles.
The capillary interaction
between adjacent particles
either floating or partially
immersed into liquid.
39
SEM images of 2D structures of nanospheres self-

assembled using capillary force
5.4.4. Seft-assembly of nanoparticles or nanowires

Directed self-assembly of nanowire networks
Patterning substrate with

adhesive monolayers
Flow of nanowires in
microfluidic channels
Hierarchical assembly of
nanowires
Crossed n and p type
nanowires…

Directed self-assembly of nanowire networks
Nanowires aligned in Nanowires aligned in

flow direction and flow direction with
without adhesion adhesion promoting
promoter patterns Multilayer deposition
of nanowires in
various orientations
40
Electric-field assisted assembly
AC field (0.5V/μm at 5
MHz), The electrodes
are used with a gap size
of 5 μm

Integration with CMOS operating circuitry

Template assisted assembly
41
END LECTURE
42

Lecture Notes

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Synthesis and Fabrication

Asso. Prof. Dr. Nguyen Van Hieu

5.1. Introduction to semiconductors

5.1. Introduction to semiconductors

Group-III and group-V

5.1. Introduction to semiconductors

5.1. Introduction to semiconductors

Mg Al Si P S Phosphorous and arsenic

5.1. Introduction to semiconductors

n-type doped semiconductor p-type doped semiconductor

5.1. Introduction to semiconductors

5.1. Introduction to semiconductors

5.1. Introduction to semiconductors

5.1. Introduction to semiconductors

1950 Junction Transistor

5.1. Introduction to semiconductors

1950 - Alloy Junction Transistor

5.1. Introduction to semiconductors

1958 – First Planar Transistor

Basic Bipolar Paired Transistors

Bias “Resistor” NPN Bipolar Device Bias “Resistor”

5.1. Introduction to semiconductors

Modern Integrated Circuit Section

5.1. Introduction to semiconductors

SEM Cross-Section of Integrated Circuit

5.2.1. Types of semiconductors.

Compounds formed from elements of the groups: III-V (such

5.2.1 Types of semiconductors.

SnO2 Eg=3.6 eV ZnO=3.37 eV

5.2.1 Types of semiconductors.

5.2.1 Types of semiconductors.

Usually we are speaking about three

a-Si:H is typical amorphous

5.2.1 Types of semiconductors.

They have been extensively

5.2.2. Crystal growth and wafer fabrication.

The raw Si used for crystal growth is purified from SiO2

5.2.2. Crystal growth and wafer fabrication.

• An alternative growth process

5.2.2. Crystal growth and wafer fabrication.

5.2.2. Crystal growth and wafer fabrication.

•We wish to find a relationship between pull rate

Heat balance: latent

5.2.2. Crystal growth and wafer fabrication.

5.2.2. Crystal growth and wafer fabrication.

Preparing polycrystalline AsGa:

5.2.3. Physical and chemical deposition.

5.2.3. Physical and chemical deposition.

 EVAPORATION and MBE

Molecular beam epitaxy system

5.2.3. Physical and chemical deposition.

Is the latent heat of vaporization for the

5.2.3. Physical and chemical deposition.

5.2.3. Physical and chemical deposition.

• Sputtering targets are

With a negative DC voltage applied,

5.2.3. Physical and chemical deposition.

5.2.3. Physical and chemical deposition.

5.2.3. Physical and chemical deposition.

5.2.3. Physical and chemical deposition.

• Remote high density plasma with

5.2.3. Physical and chemical deposition.

ALD source gases must have dramatically different reaction,

EVAPORATION and MBE

The process of IC manufacturing consists of a series of

A photolithography system consists of a

Present techniques in IC manufacturing involve dimensions in order

Device patterns with feature sizes less than 40 nm achieved by x-ray