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1 Fundamentals
LEARNING OUTCOMES
By the end of Unit 1, you should be able to
1. Discuss the basic idea and function of switches.
2. Explain the properties of circuit switching, packet switching and
virtual circuit switching, and the differences between them.
3. Discuss the advantages of using virtual circuit switching over the
other types of switching.
4. Describe the fundamental operations of the simplest space division
switch: the crossbar switch.
5. Illustrate the advantages of constructing large switches using multi-
stage switching networks.
6. Identify different basic elements of switches.
7. Discuss the basic concepts in time division switches: time division
multiplexing, time slot interchanger and time multiplexed switches.
8. Explain the concept of equivalence of different switching networks:
Time-Space-Time (TST) and Space-Time-Space (STS).
9. Demonstrate the differences between rearrange ably non-blocking
(RNB) and strictly non-blocking (SNB).
10. Construct RNB and SNB networks using switching cells.
11. Describe the basic ideas of bus switches, buffer switches and memory
switches.
12. Appreciate the elementary structure of a concentrator and multicast
switches.
2 X UNIT 1 SWITCHING )81'$0(17$/6
OVERVIEW
Unit 1 contains seven sections dealing with the basic ideas of switching
technology and the various ways in which switches are constructed.
1. The first section gives you a basic understanding of switches and the history
of their development.
2. The second section contains a revision of different switching techniques.
3. The third section introduces the concepts and implementation methods
(construction) of space division switches. The idea of constructing a large
switch using a multistage switching network will be described as well.
4. In the fourth section, another major implementation · time division
switches · is discussed. You will learn the concept of equivalence of
different switching networks.
5. In the fifth section, youÊll learn the blocking and non-blocking properties of
switches. The ideas of strictly non-blocking (SNB) and rearrange ably non-
blocking (RNB) will be introduced.
6. In the sixth section, other types of switches · bus switches, buffer switches
and memory switches · will be investigated.
7. In the final section, two specific switching networks · concentrator and
multicast switches · will be briefly described.
The self-tests in this unit are designed to help you understand the fundamental
concepts of switching and switches as you work your way through the unit. The
summary and glossary at the end of this unit are there to help you when you do
your revision.
X INTRODUCTION
In the previous units, you learned the basic concepts of internetworking and
various protocols of data networks, and now you are ready for a different topic
· switching. Switching is the process of transfering data from an input interface
to a selected output interface of a device.
mechanism, i.e., there is no centralized control about which packet goes to where.
The packetÊs route is determined at each stage of its journey without prior
knowledge of the complete path. You will see examples in later sections of this
unit of how a switch determines the route of a packet stage by stage.
In the first section, youÊll see how a switch reduces the number of links required
in a network. The importance of switches becomes readily apparent, especially
when the number of users is large. YouÊll begin your study of switching systems
by gaining an understanding of the role played by switches in telephone
networks.
Did you ever construct a telephone system of your own when you were a child?
Perhaps you did using two plastic cups or two cans connected by a string (Figure
1.1). This is similar to a real telephone connection: two phones located a distance
apart were linked up over a copper wire that completed the connection · just
like the string did between the plastic cups. Signals were transmitted from one
phone to the other via the copper wire (string) so that people could talk to and
hear from each other.
4 X UNIT 1 SWITCHING )81'$0(17$/6
Telephones must work in pairs for communication to occur; they must be linked
through a communication circuit to carry the signal between connected telephone
sets. In other words, we need to establish a connection between any pair of
phones before communication can take place. The simplest idea is to build a fully
connected network as shown in Figure 1.2. This is also known as the mesh
topology in the literature. As the name implies, each telephone in a fully
connected network has a direct link to the remaining telephones; that is, there is
always a direct link between every pair of telephones.
telephone
link
Despite its simplicity, the cost of building a fully connected network is very high.
LetÊs consider the following simple example. Supposing you have ten friends to
call, then your phone must have ten links (ten pairs of copper wires) to connect to
each of your friendsÊ telephones through a direct connection. Similarly, each of
your friends also needs a single pair to connect to each of the other parties. Using
simple mathematics, your friends and you will need a total of 10 × 9/2 = 45 lines
to communicate with each other. For a system with few users, this effect is not
very large. If you have 20 friends, the number of required links will jump to 190.
How many links will be required if you have 100 friends?
From the above assigned reading, you should have found that a ÂcircuitÊ links
two telephones. If there were only two users, then a simple link would serve the
purpose. However, if the number of subscribers increased very rapidly, and if we
had to build a circuit between every single telephone, the cost would be
extremely high! In order to increase the efficiency (reduce the cost and the
amount of materials used) a new technique was needed and the answer was
found through switching technology.
So, instead of there being a direct connection between any pair of telephones,
each telephone was connected to a central office (known as a switching office or
telephone exchange) of the phone company. You might have watched the
following type of scene in the old movies:
1. A user (caller) picks up the telephone and tells the operator in the switching
offices who he/she wants to call (the ÂcalleeÊ).
2. The operator rings the ÂcalleeÊsÊ telephone.
3. If the ÂcalleeÊ picks up the phone, the operator manually connects the caller
and the ÂcalleeÊ using a jumper cable.
phones
centralized switch
Thus, the operator in the phone companyÊs central office acted like a switch by
manually connecting an input to an output. This kind of model, known as
centralized switching, is shown in Figure 1.3. That is, every user was connected to
a central switch (operators in the switching offices), and the switch (operator)
determined how to set up the connection between any two parties. Another
everyday example is: you make a call to the front desk of a company, ask for a
particular extension number, the receptionist forwards your call to desired
6 X UNIT 1 SWITCHING )81'$0(17$/6
extension number, and your call is answered. Again, the receptionist has acted as
a switch. The interconnection of multiple switches forms a switching network.
You can easily prove that the links required for n users are only n when
centralized switching is used. Compared to a fully connected network, you can
make big savings in the number of links required by using a centralized
switching system: 1/2 n(n-1) lines in a fully connected system are reduced to n
lines in a centralized system. In Table 1.1 we compare the number of links
required for a fully connected system with a centralized system.
Consequently, the problem of installing multiple and often redundant lines was
solved by using switches. As the number of telephones grew, it became very
complicated and inefficient for operators to make connections by plugging in
jacks in a switching office. Mechanical devices replaced operators and, with
advances in technology, the old electromechanical switches have been mostly
replaced by digital electronic switches in modern Public Switched Telephone
Networks (PSTNs).
Telephone switching networks are not just reserved for PSTNs. Some companies,
especially in the United States, have set up their own switching networks that not
only connect calls within a single building or complex but also between separate
parts of the company located in different cities or even on different continents. In
such systems, the local or inter-exchange telephone companies are bypassed and
the company acts as its own telephone company.
As the demand for phone services grew, connecting thousands of users through a
single switching office quickly became unmanageable (even impractical). Instead
of a single switching office that served all the telephone lines, more and more
switching offices were built so that each switching office served a number of
telephone lines, but not all of them. Switching offices were linked up such that
telephones served by different switching offices could be connected. Therefore,
second-level (or multi-level) switching offices were introduced to connect the first
level switching offices together as shown in Figure 1.4.
phones
SELF-TEST 1.1
1. State an advantage of star topology networks over fully connected
networks. What is the limitation of using star topology?
2. Calculate the number of links required when using (a) star
topology; and (b) a fully connected network with the following
number of users:
(i) 50
(ii) 5,000
(iii) 5,000,000.
Circuit Switching
LetÊs investigate the properties of the first type of switching technique · circuit
switching.
At the calling side, the user (caller) has to key in the number that he or she wants
to call. A signal is then transmitted from the calling side to a switch at the end
office. Since the signal contains the number that is to be called, the switch will try
to establish a path between the two parties. If the call is successfully made, a
connection is set up between the two parties, and hence the signal containing the
conversation can be exchanged through the established connection. One of the
major properties of circuit switching is that the connection established can only
be used by a single phone call, and the resource is dedicated to that phone call
only. That means the particular phone call has sole access to the circuit, and other
phone calls canÊt access that dedicated path until the particular phone call is
terminated.
How is this path established in circuit switching? Consider the network used in
the example in Figure 1.5. Suppose, in the figure, telephones are located at nodes
A and D, while nodes B and C are switches. You are located at node A and want
to call a friend who is located at node D. You need to dial the number and the call
request signals will be sent out. But before the call request signals are sent out, a
process is needed to encode the dialled number within the request signals, so that
nodes B and C · the switches in between · know where you want to connect to
and they can then set up the appropriate path.
AB BC CD
Links
Nodes A B C D
Time is needed at every node to search for an outgoing link to set up the circuit
for communication. So, there are delays at every node during circuit switching
connection. Remember that the call is still in the call set-up phase, and the two
parties cannot communicate with each other, as the circuit is not yet established.
After passing through nodes B and C, the call request signal finally reaches the
party being called. If the phone of the party being called is idle, it is then available
for this connection to be completed and a signal of acknowledgement will be sent
from the called partyÊs phone to your phone. The signal will be sent through the
circuit that has been set up through the call set-up phase and, since the path is
already established, the acknowledgement is received much faster than it took to
set up the original connection. Once the signal of acknowledgement is received,
you can hear the ringing of your friendÊs phone and then you simply wait for him
or her to pick up the phone.
From now on, the two parties can talk on the phone. Information is transmitted
through the circuit from one side to the other. After the conversation is finished,
the party who disconnects the call will send out a disconnect signal to the other
10 X UNIT 1 SWITCHING )81'$0(17$/6
side. Once the other side receives this disconnect signal, the whole calling process
comes to an end and that circuit is then available to handle another call.
The whole calling process is pictured in Figure 1.6.
Dialling and
associated delays
Time spent
hunting for an
Time outgoing trunk
Connect
signal
Message
Propagation
delay
.
.
.
Disconnect
signal
AB BC CD
trunk trunk trunk
Packet Switching
While circuit switching is the traditional kind of switching technique, packet
switching is a totally different technique. As we explained in earlier units, while
circuit switching is designed to handle voice connection, packet switching is
mainly used for handling digital data; for example, data sent across computer
networks. Although we can currently transmit voice over the Internet (know as
ÂVoice over IPÊ service in the literature), the voice information is first digitalized
to form packets before sending it over the Internet.
In circuit switching, the entire signal is transmitted through the dedicated (but
ÂtemporaryÊ) circuit that is set up for communication, but for packet switching,
the entire message is broken down into several packets that need not be equal in
size. Also, while there is a dedicated path in circuit switching, a dedicated path is
UNIT 1 SWITCHING )81'$0(17$/6 W 11
not needed in packet switching as the packets of the same message may go to the
destination through different routes. You may understand this better by using an
analogy from everyday life.
Assume that you are required to take a box of puzzles from your home to your
workplace. The best way you might think of is to go by taxi and take the whole
set of puzzles with you. However, you could also break the whole set of puzzles
into smaller sets and distribute them to a number of co-workers. Some may go by
MTR; others may go by bus or any other way to reach the workplace. After
receiving all the smaller sets of puzzles, you can put the puzzles together. This
simple analogy should highlight the difference between circuit switching and
packet switching. Since there is no dedicated path for the packets, however, a
header (an address) is needed ÂonÊ every packet so that the switch knows where
to route the packets (their destination). All those puzzles should arrive at the
same workplace, not just any workplace.
Queueing
delay
Pkt 1
Pkt 2
Pkt 1
Pkt 3
Pkt 2
Time Pkt 1
Propagation
Pkt 3 delay
Pkt 2
Pkt 3
A B C D
We have covered both circuit switching and packet switching. Let's now compare
the systems.
There is no need for packet switching to have a call set-up procedure, while
circuit switching needs it in order to have a dedicated path.
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Circuit switching requires a fixed bandwidth as it has a fixed path, and this value
is not related to the traffic. If the transmitted information rate is smaller than the
allocated bandwidth in the circuit, bandwidth will be wasted. There is no
bandwidth reservation in packet switching, and users just send as many packets
as they want to. However, if the network does not have sufficient bandwidth to
transmit the packets, excessively large packets will be lost.
As packets are used to transfer the data from one place to another, the packets
may follow different routes, and at different times, according to the traffic. Since
different packets may encounter different delays, this may result in packages
being received in a totally different order at the receiving end. Hence a special
control is required at the receiving end to reorder the sequence of packets. In the
example of puzzles, if any smaller set is lost, you will fail to put the puzzles
together. Circuit switching doesnÊt have all these problems, as data are directly
sent into the circuit and there are no delays in creating the packets. Also, the data
that arrive at the receiving end must be in sequence.
Table 1.2: Summarizes the differences between circuit switching and packet
switching.
However, since the path is actually shared by several connections, the delays
encountered by different packets can vary. There is no other route for the packets
to follow and so the delays may be very large.
SELF-TEST 1.2
1. List the three differences between circuit switching and packet
switching.
2. What are the advantages of using virtual circuit switching over
packet switching and circuit switching?
SPACE-DIVISION SWITCHES
So far, we have discussed the applications of switches and various switching
techniques. In this section, youÊll learn about the physical structure of switches.
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We shall start with the most popular switch · space-division switches · which
will be the main focus of this course. Then weÊll describe the basic operation of
the simplest space-division switch: the crossbar switch.
Crossbar Switches
The basic function of a switch is to connect an input line and a destined output
line. For a switch with M input lines and N output lines, we say that it is an M ×
N switch. Sometimes, an M × N switch is simply represented by a square box
with M inputs and N outputs as shown in Figure 1.8. Without loss of generality,
we can assume the number of input lines is equal to the number of output lines
(i.e. M = N) in the following discussion.
Input Output
1 1
2 2
. M × N switch .
. .
. .
M N
The most widely used form of switching is space-division switching, which was
originally developed for the analog environment (telephone networks) and has
gradually evolved into the digital technology environment. The fundamental
concept is the same whether the switch is used to convey analog or digital
signals. As the name implies, a space division switch is one in which the signal
paths that are set up are physically separated from one another (divided in
space). In other words, each input is connected to another output through a
dedicated physical path established by the switch.
You might wonder how the switch actually works inside that square box. We
start with the simplest kind of space division switch · the crossbar switch (also
called a crosspoint switch). Let us consider an N × N crossbar switch shown in
Figure 1.9. This crossbar switch has N × N interconnections, known as
crosspoints, where an input and an output line may be connected by a digital
device (logic AND gate) as shown in Figure 1.10.
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2
Crosspoints 'closed'
3
input input 2 output N
.
. input 3 output 1
.
1 2 ... N
output
Input
0
1
AND
Output
0 0 0 0 A
1 1 1 1
AND AND AND AND
B
Input
C
0 0 0 0
1
AND
1
AND
1
AND
1
AND
D
0 0 0 0
1 1 1 1
AND AND AND AND W X Y Z
Output
0 0 0 0
1
AND
1
AND
1
AND
1
AND
OPEN state of a crosspoint
CLOSED state of a crosspoint
Multi-stage Switches
Due to these limitations, it is hard to build a single large crossbar switch.
However, we do not want to limit our applications only to a small number of
users. How can we overcome the limitations? Well, you have encountered this
problem in telephone networks and the solution is to build a multiple level
hierarchy of switching offices. A similar idea can be employed in building large
crossbar switches · multistage switches. That is, make use of smaller sized
crossbar switches and then interconnect them to form a large switch. To keep our
discussion simple, weÊll consider only three-stage switches even though switches
with more stages are possible. Figure 1.12 shows a three-stage network of
switches that has a total of N inputs and N outputs.
UNIT 1 SWITCHING )81'$0(17$/6 W 17
N N
crossbars crossbars
n n
k crossbars
n .. .. n
n×k k×n
inputs . . outputs
N×N
n n
n .. .. n
n×k k×n
inputs . N×N . outputs
n n
. . .
. . .
. . .
N×N
n n n n
.. n×k k×n ..
inputs . . outputs
In the first stage, there are N/n crossbars, each with nk crosspoints. This gives a
total of kN. In the second stage, there are k crossbars, each with (N/n)2
crosspoints. The third stage is the same as the first. Adding up the three stages,
Examples
We would like to build a 1000 × 1000 crossbar switch.
(a) How many crosspoints will be required using a single crossbar?
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(b) How many crosspoints will be required using a three-stage switch with n =
50, k = 100?
(c) How many crosspoints will be required using a three-stage switch with n =
50, k = 10?
Answers
(a) N = 1000, number of crosspoints = 10002 = 1,000,000
(b) N = 1000, n = 50, k = 100,
number of crosspoints = 2 × 100 × 1000 + 100 × (1000/50)2 = 240,000
(c) N = 1000, n = 50, k = 10,
number of crosspoints = 2 × 10 × 1000 + 10 × (1000/50)2 = 24,000
The above examples clearly demonstrate that a three-stage switch requires far
fewer crosspoints than a single crossbar switch. It also shows that different
choices of k (the number of immediate crossbar switches) can make a significant
difference in the number of crosspoints (240,000 in (b) compared with 24,000 in
(c)). Equation 9.1 shows that if k increases, the number of crosspoints increases,
and if n decreases, the number of crosspoints increases. Thus, to minimize the
number of crosspoints, we can minimize the value of k and maximize the value of
n. You may quickly jump to the conclusion that k should be as small as possible
because it requires fewer crosspoints. However, this is not the complete story. As
the number of k is reduced, the chance of causing blocking increases, which
means that an input has a higher probability of not being able to connect to an
output. This idea is rather intuitive because the number of switches in the second
stage represents the number of possible paths for an input connecting to an
output. The more second stage switches there are, the higher the chance that an
input gets connected to an output. We will discuss the blocking issue in a later
section of this unit.
Switching Cells
In the previous section, you learned that a large switch can be constructed from
multi-stages of smaller switches. If we expand this idea a little bit, we can split
the smaller switches into multi-stages of even smaller switches. This process can
go on and on until we canÊt split the switch any more. Then, an interesting
question to ask is: ÂWhat is the smallest size of switch that can be used as the
UNIT 1 SWITCHING )81'$0(17$/6 W 19
basic element to construct other switches?Ê. Before we answer this question, let us
consider a simple example.
1 1
2×2 2×2
2 2
4×4
3 3
2×2 2×2
4 4
5 5
2×2 2×2
6 6
4×4
7 7
2×2 2×2
8 8
8 × 8 switch
1 1
2×2 2×2 2×2
2 2
3 3
2×2 2×2 2×2
4 4
4 × 4 switch
Switching cells are two-state switches, which are considered as the most
elementary switches. Two-state means that a switching cell can operate in one of
two states. By interconnecting these switching cells, we can build multi-stage
switches.
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There are four types of switching cell (the two states are shown in parentheses):
Ć 1 × 1 crosspoint (on/off)
Ć 2 × 2 switching cell (bar/cross)
Ć 2 × 1 concentrator (input 1/input 2)
Ć 1 × 2 distributor (output 1/output 2)
The crosspoint is the only 1 × 1 configuration, and it has been discussed earlier in
this section. When the crosspoint is in the closed state, the input is connected to
the output. In turn, when the crosspoint is in the open state, the input is not
connected to the output. An array of crosspoints forms a crossbar switch.
A A C D
B B D C
Figure 1.14: (a) The bar state and (b) the cross state of the 2 x 2 switching cell
You may ask why a 2 × 2 crossbar isnÊt commonly used to perform the same task
as this 2 × 2 switching cell. As mentioned before, a crossbar requires a central
control to enable (close or open) specified crosspoints in order to build the paths.
In the 2 × 2 crossbar, there are four crosspoints and the central control needs to
determine which crosspoint to close. However, a 2 × 2 switching cell only
operates in one of two states: bar or cross. No central control is required in a 2 ×2
switching cell, and the routing speed of a 2 × 2 switching cell is much faster than
a 2 × 2 crossbar. This is why 2 × 2 switching cells are used as the elementary
switch. In Figure 1.15, an 8 ×8 switching network constructed by 2 × 2 switching
cells is shown.
UNIT 1 SWITCHING )81'$0(17$/6 W 21
ACTIVITY 1.1
A 1
B
5
F
The 2 × 1 concentrator (Figure 1.16(a)) has two inputs and one output. The
concentrator picks one of the two inputs to connect to the output. In Figure
1.16(b), the output is connected to either input A or B. You can think of
implementing the 2 × 1 concentrator by a 2 × 2 switching cell as shown in Figure
1.14(c). You have two inputs A and B to a 2 × 2 switching cell but only the upper
output is used. Hence, depending on the state of the switching cell, the output is
connected to either the input A or B. The issue of concentrators will be discussed
in detail later.
input A
output
input B
A A
A or B
B B
A A A B
or
B B
The 1 × 2 distributor (Figure 1.17(a)) has one input and two outputs, which is the
mirror image of the 2 × 1 concentrator. In Figure 1.17(b), the input is connected to
either output 1 or output 2. Similarly, you can think of implementing the 1 × 2
distributor by a 2 × 2 switching cell as shown in Figure 1.17(c). Only the upper
input to the 2 × 2 switching cell is used. Hence, depending on the state of the
switching cell, the input is connected to either output 1 or output 2.
output 1
input
output 2
output 1
input or input
output 2
1
or
2
The 2 × 2 switching cell is the most important switching cell throughout this
course. Most of our study will concentrate on how to use 2 × 2 switching cells to
build larger switches with desired properties. We will not go into detail
concerning crosspoints, concentrators and distributors.
You may have noticed that there may not be enough links to use when many data
inputs arrive at a switch at the same instant. This leads to the problem of
blocking, which will be discussed in a later section.
UNIT 1 SWITCHING )81'$0(17$/6 W 23
SELF-TEST 1.3
TIME-DIVISION SWITCHES
So far, all the described switching networks have been in space-domain (i.e. the
use of physical wires). In this section, we shall introduce a completely different
kind of switching · time-division switching.
Time-division Multiplexing
Time-division multiplexing (TDM) is a technique that allows multiple signals to
share a single transmission line by separating the signals in time. As TDM is a
digital technique, we shall assume all the input signal is in digital format.
Otherwise, analog-to-digital conversion should be applied to the input signal.
The MUX first splits each piece of digital data into segments of a fixed size (say,
100 bytes). Then the MUX choose a frame with a fixed time interval (T) and
divides each frame into M time slots of duration T/M. Each of the M inputs is
assigned to a dedicated time slot in a frame to transmit its segment of data. This
frame pattern is repeated periodically. For example, the mth input is allocated to
the mth slot in a frame and only the data from the mth input can be transmitted
in the mth slot. An M:1 multiplexer is a multiplexer that can combine M inputs to
a single output.
A 4:1 multiplexer is shown in Figure 1.18. In the figure, there are four time slots
in a frame and each slot is allocated to a particular input. Suppose the duration of
each slot is one second and so each frame lasts for four seconds. The input 1
transmits its data in slot 1. Then input 2 transmits in slot 2, input 3 in slot 3 and
input 4 in slot 4. This completes a frame period and input 1 starts to transmit in
slot 1 again. This frame pattern is repeated every four seconds.
a frame
1 1 4 3 2 1 4 3 2 1
2 4:1 Output
Input
3 MUX
4
Consequently, if the input rate of data is R, the output rate of the MUX will be
MR, where M is the number of inputs. This limits the number of inputs into a
MUX. For instance, a 200:1 MUX with an input rate of 10 Mbps requires an
output rate of 2 Gbps. A MUX operating at this speed is very expensive.
The multiplexed signal contains data from all the M inputs. How can we retrieve
the corresponding data from the multiplexed signal at the receiving side? At the
other end of the transmission line, the individual signals are separated out by
means of a circuit called a demultiplexer (DEMUX). The idea is as follows: each
input is allocated to a fixed slot in a frame in the MUX; i.e., input m is allocated to
the slot m in a frame. After going through the high-speed transmission line, the
DEMUX determines the output from the location of the slot in the frame. That is,
the data in slot m will be forwarded to output m. Therefore, MUX-DEMUX
mechanisms form a one-to-one correspondence with input m connecting to
output m only.
1 2
4 3 2 1 1 3 4 2
2 4:1 1:4 4
Input TSI Output
3 MUX DEMUX 3
4 1
Four inputs · 1, 2, 3 and 4 · are multiplexed into a frame and the order of the
time slots is 12341234⁄ Now we add a special control unit known as a time-slot
interchanger (TSI) before the DEMUX. This control unit reorders the time slots in
the input frame such that the new order is 24312431⁄ Then this new output
frame (with reordered time slots) is sent to DEMUX. As discussed previously, the
DEMUX separates out individual signals according to the slot position in the
frame. Thus, input 1 is connected to output 4, input 2 is connected to output 1,
input 3 is connected to output 3 and input 4 is connected to output 2. We have
effectively made the following input-output pairs: 1 → 4, 2 → 1, 3 → 3 and 4 →
2 using the TSI process. In other words, we have switched the signals in the time
domain, and this is the basic idea of time-division switching.
Figure 1.20 presents a 4 × 4 time-division switch. First, the four inputs are
multiplexed and the multiplexed signal enters the TSI, then the TSI exchanges the
order of the time slots and finally the interchanged frame is forwarded to the
DEMUX for output.
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A TSI works as follows: when the input frame is ready to be processed, each slot is
written to a RAM inside the interchanger. Memory cells in the TSI buffer are in a
one-to-one correspondence with the input time slots. Digital data arriving inside a
time slot of the frame is written into the corresponding memory cell in the buffer.
That is, the slots are written in an order such that buffer cell i contains slot i. After a
whole frame is stored in the RAM, the data in the stored frame can be read out in
an order defined by the TSI. If the data in time slot i is to be switched to time slot 1,
this data will be read out first on the output frame. Similarly, if the data in time slot
j is to be switched to time slot k, this data will be read out at the kth slot on the
output frame. In this way, switching is performed in the time domain.
a
b
c
write read address
d buffer
address
(data memory)
2 b
1 a
4 d
time 3 c
slot
counter address memory
An example is shown in Figure 1.21. The input frame is divided into four slots,
with the first one assigned a and the fourth one assigned d. When the frame
enters TSI, the TSI first writes each slot of the input frame into a buffer. The slots
are written in order, so slot k is located in buffer address k. Thus, the write
address sequence is a, b, c, d. Suppose we want the output sequence to be b, a, d,
c. Then the TSI will interchange the time slots with the read address sequence as
b, a, d, c. This output frame is sent to the DEMUX for connection.
they arrive. For example, suppose we would like to read and write m slots in a
frame period of 125 μs. The memory is accessed twice in each time slot, once for
reading and once for writing. If each time this memory access takes 100 ns, the
equation for the time needed to process a frame is 2m × 100 ns = 125 μs.
125 10−6 1
Hence, we can support at most m = × × = 625 lines. Consequently, a
100 10−9 2
TSI unit can support only a limited number of connections.
Time-multiplexed Switch
We have argued that the size of TSI-based time-division switches is limited by
memory access speed. Furthermore, for a fixed memory access speed, the delay at
the TSI also increases as the size of a switch increases. This limits the speed of
inputs that can be supported by a switch. To overcome these problems, multiple
TSI units could be used. This idea is similar to what you learned earlier about
building a large switch using multiple small size switches. Let us consider the
simple example in Figure 1.22 to explore the idea.
a b a d a
b
2×2
switch
c
d
d c b c
In the following discussion, I shall use the term ÂchannelÊ to refer to a particular
input (or user) to avoid confusion with the term ÂslotÊ which refers to the position
in a frame. Here we have two time-multiplexed streams that have their own TSIs.
To connect two channels (e.g. a and b) entering a single TSI, we can simply
interchange their time slots. Nevertheless, to connect a channel (e.g. b) on one
TDM stream (going into one TSI) to a channel (e.g. d) on another TDM stream
(going into another TSI) requires us to switch their positions in the two
multiplexed streams. How can we do it?
If you apply your knowledge from our previous discussion, you should
recognize that some form of space-division switching can do this. Generally, we
do not wish to switch all of the time slots from one stream to another because not
all the channels in one stream need to connect to all the channels in another
stream. Instead, we would like to do it one slot at a time so only those channels
that are swapping their positions in different streams are moved. This technique
28 X UNIT 1 SWITCHING )81'$0(17$/6
The idea of time-multiplexed switching is very simple. Let us assume that the
frames and time slots for different streams are synchronized. That is, the slots in
different streams all arrived at the same time. Each multiplexed stream is
connected to an input of a space-division switch as shown in Figure 1.22. During
the duration of a time slot, each input may request a connection to an output. The
space-division switch could be set for the input-output connections required for
that time slot. As shown in Figure 1.23(a), at the first time slot, the 2 × 2 switch is in
the bar state and channels a and c stay at the upper and lower streams
respectively. During the next time slot, the connections for the space-division
switch would be reconfigured for that slot. In Figure 1.23(b), at the second time
slot, the 2 × 2 switch is in the cross state, channel b is moved to the lower stream
and channel d is moved to the upper stream. The combined effect is shown in
Figure 1.23(c).
a a
c c
b d
d b
b a d a
2×2
d c b c
2 1
1
2×2
2
1 2
Let us consider the TMS in Figure 1.23(c) again. In the first time slot, input
channel a is connected to the upper output port of the 2 × 2 switch while input
channel c is connected to the lower output port. In the second time slot, input
channel b is connected to the lower output port while input channel d is
connected to the upper output port. The identity of the input channel (i.e. a, b,
etc.) is not useful to the 2 × 2 switch. As far as the 2 × 2 switch is concerned, it
only needs to know how the switch should be connected in a particular time slot.
For instance, input 1 should be connected to output 1 and input 2 connected to
output 2 in time slot 1 (refer to Figure 1.23(a)).
To simplify the figure we shall use the following notation relating to time-
multiplexed switching: the number in a slot in an input frame indicates the
desired output of that frame at that particular time slot. A simplified
representation for the TMS in Figure 1.23(c) is shown in Figure 1.23(d). In Figure
1.23(d), inputs 1, 2 request connections to outputs 1, 2 in the slot 1 and inputs 1, 2
request connections to outputs 2, 1 in time slot 2. This simplified representation
can help us to understand complex switching networks.
You should now have a basic idea of how time-multiplexed switching works.
LetÊs consider a more complicated case as shown in Figure 1.24, in which four
input frames have three slots per frame and are entering a 4 × 4 switch. The
space-division switch could be a single stage switch or a multi-stage switch.
1 4 2 1
4 1 3 4×4 2
2 3 4 switch 3
3 2 1 4
The 4 × 4 switch will have the connection set-up as shown in Figure 1.25(a). That
is, inputs 1, 2, 3 and 4 request connections to outputs 2, 3, 4 and 1 in the first time
slot in Figure 1.24. Similarly, inputs 1, 2, 3 and 4 request connections to outputs 4,
1, 3, 2 in the second time slot and connections to outputs 1, 4, 2, 3 in the third time
slot. Their connections are shown in Figure 1.25 (b) and (c) respectively. Thus
30 X UNIT 1 SWITCHING )81'$0(17$/6
Important notes: The inputs here refer to the four inputs to the 4 × 4 switch while
the outputs refer to the four outputs from the 4 × 4 switch. They are not the same
as the input channels entering the MUX or the output channels leaving the
DEMUX. In fact, there are totally 12 input channels and output channels in Figure
1.25 because we have four frames with three slots per frame. Make sure you are
not in any confusion about these terms.
Time slot 1
Inputs Outputs
1 1 input output
2 2 1 2
3 3 2 3
4 4 3 4
4 1
(a)
Time slot 2
Inputs Outputs
1 1 input output
2 2 1 4
3 3 2 1
4 4 3 3
4 2
(b)
Time slot 3
Inputs Outputs
1 1 input output
2 2 1 1
3 3 2 4
4 4 3 2
4 3
(c)
Figure 1.25: The input-output mapping changes from slot to slot in the space division
switch in time multiplexed switching mode.
Nevertheless, different inputs to the TMS may want to connect to the same
output in the same slot. This is termed output conflict, which means two or more
inputs are heading for the same output. As shown in Figure 1.26(a), the inputs 1
and 4 in the input frame both have the number 2 in their first slot, which means
UNIT 1 SWITCHING )81'$0(17$/6 W 31
that they both want to connect to output 2 in the first time slot. Similarly, inputs 2
and 3 are also competing for output 3 in the first time slot. Furthermore, inputs 1
and 2 are contending for output 1 in the second time slot and inputs 1 and 2 are
contending for output 4 in the third time slot. This conflict is quite unavoidable
because transmission links incident to a switch may originate from different
switches, and these switches typically do not cooperate to avoid this conflict.
The TSI mechanism can be used to ease the output conflicts by interchanging
time slots on a link so that conflicts with other links no longer exist. In Figure
1.26(b), a TSI is added in front of each input line to the 4 × 4 TMS to interchange
the order of time slots within each input frame. After the operation of TSI, inputs
2 and 3 are no longer contending the same output 3 in the first time slot. In fact,
you can check that there is no output conflict in other time slots as well. How can
the switch resolve these output conflicts? This requires a central control to
coordinate different TSIs to interchange slots to avoid output conflicts.
4 1 2 1
4 1 3 4×4 2
2 4 3 switch 3
1 3 2 4
1 4 2
4 1 2 TSI 1
4 1 3
4 1 3 TSI 4×4 2
2 3 4 switch
2 4 3 TSI 3
3 2 1
1 3 2 TSI 4
Figure 1.26(b): Example of how TSI can remove the output conflict
3 2 1
2 3 1 4×4
4 2 1 switch
3 4 1
Figure 1.27: Example of output overloaded and TSI fails to resolve conflict
The basic TS switching is sufficient to remove output conflict and to switch time
slots on to the right output frame. Nevertheless, the slots can appear in any order
in the output frame since the TSIs have reordered the slots to avoid output
conflict. The input channel may be connected to the wrong output channel by the
DEMUX. If we add another TSI stage at the output of a TMS, we rearrange the
slots in the output frame to get the correct sequence. In doing so, any input
channel could be connected to any other output channel. This three stage
configuration is called TST switching.
input channels will connect to different output frames, there will be no output
conflict in the 3 × 3 switch.
You may wonder how we can coordinate different TSIs to interchange the slots.
As mentioned previously, there is a central control to perform this job and the
detailed operation is beyond the scope of this course. Each input channel passes
through the TSI and TMS to get to the right output frame. After the TS stage in
Figure 1.28(a), the input channel d (destined for output channel 8) is correctly
switched to the third frame that is connecting to output channels 7ă9. However, it
appears in the wrong slot (the first slot is for output to channel 7). Consequently,
input channel d is wrongly connected to output channel 7 after demultiplexing as
shown in Figure 1.28(a).
To get back the correct input-output connection, a TSI is added after each output
of 3 × 3 switch. With the additional TSI, slots are rearranged to the correct order
and they are ready for output connection as shown in Figure 1.28(b). For instance,
input channel d is now correctly connected to output channel 8 after
demultiplexing.
2 3 2 3 2 2
(a, 4) (c, 5) (b, 7) (a, 4) (b, 7) (c, 5) (a, 4) (e, 3) (f, 2) (h, 1) 1 (h, 1)
M T D
(b, 7) U S E 2 (f, 2)
X I M
(c, 5) 3 (e, 3)
1 1 3 1 1 3
(d, 8) (f, 2) (e, 3) (d, 8) (e, 3) (f, 2) (d, 8) (i, 6) (c, 5) (a, 4) 4 (a, 4)
M T D
(e, 3) U S 3×3 E 5 (c, 5)
X I M
(f, 2) 6 (i, 6)
2 1 3 2 3 1
(g, 9) (i, 6) (h, 1) (g, 9) (i, 6) (g, 9) (h, 1) (b, 7) (g, 9) (d, 8) 7 (d, 8)
M T D
(h, 1) U S E 8 (g, 9)
X I M
(i, 6) 9 (b, 7)
output channel T S
input channel
Figure 1.28(a): Example of how TS switch can give incorrect input-output connection
34 X UNIT 1 SWITCHING )81'$0(17$/6
2 3 2 3 2 2
(a, 4) (c, 5) (b, 7) (a, 4) (b, 7) (c, 5) (a, 4) (e, 3) (f, 2) (h, 1) (e, 3) (f, 2) (h, 1) 1 (h, 1)
M T T D
(b, 7) U S S E 2 (f, 2)
X I I M
(c, 5) 3 (e, 3)
1 1 3 1 1 3
(d, 8) (f, 2) (e, 3) (d, 8) (e, 3) (f, 2) (d, 8) (i, 6) (c, 5) (a, 4) (i, 6) (c, 5) (a, 4) 4 (a, 4)
M T T D
(e, 3) U S 3×3 S E 5 (c, 5)
X I I M
(f, 2) 6 (i, 6)
2 1 3 2 3 1
(g, 9) (i, 6) (h, 1) (g, 9) (i, 6) (g, 9) (h, 1) (b, 7) (g, 9) (d, 8) (g, 9) (d, 8) (b, 7) 7 (b, 7)
M T T D
(h, 1) U S S E 8 (d, 8)
X I I M
(i, 6) 9 (g, 9)
T S T
Figure 1.28(b): Example of how TST switch can get correct input-output connection
1 1 3 3
2 2 1 1
MUX DEMUX MUX DEMUX
3 3 2 2
TSI
Figure 1.29: Building a time slot interchanger using a space division switch
TSIs in STS will require synchronization and so TST is always preferable to STS.
A structure of STS is shown in Figure 1.30.
TSI
2×3 3×2
TSI
switch switch
TSI
SELF-TEST 1.4
The following figure shows the internal structure of a TSI. The TSI will
first read incoming data one by one and write it into the data memory.
Indexes are marked to the address memory for the corresponding
output slots. The first one, ÂaÊ, with its index, Â1Ê, has been done for you.
Complete the figure.
h g f e d c b a c e a g b h d f
a
Read
Write Read
Time
slot
counter 1
SELF-TEST 1.5
Blocking
Before you learn about non-blocking, however, it is logical that you must fully
understand blocking. Consider a switch with m inputs and n outputs. Given that
there are k active signals at the inputs of the switch, it is possible that not all of
the k active signals can be routed to the destined k of the n outputs. If this is the
case, we can say that blocking occurs.
What causes blocking? If the number of active signals, the number k, is greater
than the available number of output ports of the switch, the number n, it is
obvious that blocking must occur · rather like trying to fit 30 cans of soft drink
into a 24-can case. We will focus on conditions where the number of inputs into a
switch is not larger than the number of outputs; i.e., m ª n. We are then sure that
UNIT 1 SWITCHING )81'$0(17$/6 W 37
the number of inputs with active signals must be smaller than or equal to the
number of outputs, but not greater.
Before going into detail, you should review what a 2 × 2 switch does since, in
most of the later examples, the networks are built using 2 × 2 switching cells.
Remember, the 2 × 2 switching cell is actually a basic switching element
consisting of two inputs and two outputs. It allows only two connection
configurations: the bar state and the cross state, which were previously shown in
Figure 1.14.
Now youÊll look at two examples in which the two different kinds of blocking are
illustrated. Consider a 4 × 4 switch which is constructed using four 2 × 2
switching cells as shown in Figure 1.31. The connection assignments of the four
inputs in Figure 1.31 are as follows:
Input 1 ă a ă e ă Output 1, Input 2 ă b ă gă Output 3, Input 3ă c ă f ă
Output 1, Input 4ă dă h ă Output 4.
From Figure 1.31, you can see in the top right 2 × 2 switching cell that both inputs
e and f want to connect with output 1. However, this is not a valid state for a 2 × 2
switching cell, i.e. either e or f can connect to output 1 but both cannot connect at
the same time. Figure 1.31(a) shows e connected to output 1, while Figure 1.31(b)
shows f connected to output 1. A switching cell, however, can only be in a bar or
a cross state; those states cannot be mixed. From the connection assignment, both
input 1 and input 3 want to set up a connection with output 1 simultaneously. In
this case, we have two inputs contending for the same output, therefore either
input 1 or input 3 cannot be connected to output 1 as desired and blocking
occurs. This is called external blocking because multiple inputs are contending
for the same output.
38 X UNIT 1 SWITCHING )81'$0(17$/6
Inputs Outputs
a e
1 1
b f
2 2
c g
3 3
d h
4 4
(a)
Inputs Outputs
a e
1 1
b f
2 2
c g
3 3
d h
4 4
(b)
Figure 1.31: External blocking of a switch
Inputs Outputs
a e
1 1
b f
2 2
c g
3 3
d h
4 4
(a)
Inputs Outputs
a e
1 1
b f
2 2
c g
3 3
d h
4 4
(b)
Figure 1.32: Internal blocking of a switch
From the connection assignment (above), different inputs are paired up with
different outputs, and so there should not be any external blocking. Focus,
however, on the lower 2 × 2 switching cell of the first stage. Although Input 3 and
Input 4 want to connect with two different outputs of the 4 × 4 switch, the two
signals are contending for the same switching cell output port c, and that is not a
valid state in a 2 × 2 switching cell. As both input ports are contending for the
(internal) line c ă f, this is called internal blocking. Only one of the signals can
access the line (Input 3 is connected to c in Figure 1.32(a) while Input 4 is
connected to c in Figure 1.32(b)), and hence connections from Input 3 to Output 1
and from Input 4 to Output 2 cannot co-exist.
In summary, external blocking happens when two inputs of the switch are
destined for the same output of the switch. The external blocking is unavoidable
because we cannot control the connection request by different inputs. If the
inputs are in packet form, this may be solved by temporarily storing the
contending packets in a buffer. We shall discuss the buffer switch in a later
section. Internal blocking, however, happens when two active signals contend for
the same output port at a switching cell level inside the multistage switch.
Generally speaking, internal blocking can be solved by designing internal non-
blocking switching networks. The design of (internal) non-blocking multistage
switching networks will be our next topic.
40 X UNIT 1 SWITCHING )81'$0(17$/6
ACTIVITY 1.2
1
1
2 2
3 3
4 4
For a strictly non-blocking switch, whenever a new active signal comes in it can
be routed to the destined output while the current connections are not changed or
disconnected.
This has great practical implications. Imagine that you are talking to a friend via a
switch and then a new user wants to make a call through the same switch. You
would be very unhappy if there was any disruption of service due to the addition
of this new user.
Inputs Outputs
A A
B B
C C
D D
ACTIVITY 1.3
What is the difference between SNB and RNB? Well, an idle input can always
connect to an idle output in SNB without changing the existing connection
42 X UNIT 1 SWITCHING )81'$0(17$/6
To get a better understanding of RNB, let us suppose all the active signals arrive
at the inputs at the same time. Provided that there are no two active signals
competing for a single output, all the required connections can be achieved if the
switch is rearrangeably non-blocking. However, if the active signals arrive
asynchronously and connection paths are established one by one, blocking may
occur. The following two examples will show this fact.
Inputs Outputs
A 1
(a)
Inputs Outputs
A 1
D 4
(b)
Inputs Outputs
A 1
B 2
D 4
(c)
Figure 1.34: Blocking occurs in a 4 × 4 rearrangeably non-blocking
switch if inputs arrive one by one
UNIT 1 SWITCHING )81'$0(17$/6 W 43
In Figure 1.34, let us assume the active signals arrive one by one. First active
signal A arrives and it is connected to output 1 of the switch as shown in Figure
1.34(a). Then active signal D arrives and it is connected to output 4 shown in
Figure 1.34(b). Now, an active signal B arrives and wants to be routed to output 3
of the switch. Unfortunately, the remaining valid path (shown as a dotted line in
Figure 1.34(c)) is to connect input B to output 2, but not to output 3! Hence, input
B is blocked by the switch even though output 3 is idle.
In contrast, suppose the three active signals A, B and D arrive at the same instant
and they would like to connect to outputs 1, 3 and 4 respectively. Then we
consider them together and they can be connected to the desired outputs as
shown in Figure 1.35.
Inputs Outputs
A 1
B 2
D 4
Figure 1.35: If all the three inputs A, B and C are considered together, they can all connect
to the desired outputs in the same 4 x 4 rearrangeably non-blocking switch
Inputs Outputs
1
4
2 2
(*) 1
3 (*)
4 3
5 5
Suppose now you want to set up a new connection, (*), at the fifth input port. You
can easily verify that the required connection cannot be achieved without
44 X UNIT 1 SWITCHING )81'$0(17$/6
changing the existing established connections. In fact (*) can only connect to the
first or second output ports in Figure 1.36. In order to avoid blocking, we can
consider all the six connections (the five established connections and (*) together.
In the following activity, you can show that this 8 × 8 switching network is
rearrangeably non-blocking.
ACTIVITY 1.4
Try to achieve the connection assignments of the above example of an 8
× 8 rearrangeably non-blocking switch by considering all the signals
together. First, you can pick one of the six input-output pairs and
connect them together. Then, you can establish connections one by one.
If you fail to connect an input to its desired output, you have to stop and
restart the connection process again. This is a kind of trial and error
exercise and so it may take you a few times to establish all the six
connections.
Inputs Outputs
1
4
2 2
(*) 1
3 (*)
4 3
5 5
In the above exercise, how many times did you try to set up all the
connections in this 8 × 8 switch? Imagine the situation of building a 512 ×
512 switch.
In the above examples, eight 2 × 2 switching cells are needed to construct the 4 × 4
strictly non-blocking switch in Figure 1.33, while only six are needed for the 4 × 4
rearrangeably non-blocking switch in Figure 1.35. This is reasonable since SNB
implies RNB, but the reverse doesnÊt hold. Hence, it is more expensive to
construct an SNB switch than an RNB switch (e.g. we need two additional 2 × 2
switching cells in this case).
Despite the lower cost of rearrangeably non-blocking switches, they have several
limitations. First, a rearrangeably non-blocking switch is only non-blocking when
the active signals arrive at the inputs synchronously. This is not easy to achieve
since we cannot require all the applications to start at the same time and the
signals to arrive together. Second, even if alteration is allowed, the user may
suffer a disturbance due to the alteration. Third, frequent alteration can cause a
burden on the central control of a switch. Consider a 512 × 512 switch that is
made of multistage 2 × 2 switching cells. This will involve numerous complicated
processes to rearrange a large number of connections whenever a new signal
arrives.
So far we have only described the properties of SNB and RNB switches.
However, we have not introduced the mechanism for building such non-blocking
switches. The three-stage construction of SNB switches and RNB switches will be
discussed in detail in Unit 2.
ACTIVITY 1.5
B 2
C 3
D 4
E 5
F 6
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1
A
B 2
3
4
C
D 5
6
7
E 8
F
9
Inputs Outputs
(c)
A 1
B 2
C 3
D 4
E 5
F 6
G 7
H 8
Inputs Outputs
(d) A 1
B I 2
C 3
D 4
E 5
II
F 6
Bus Switch
You have learned that bus topology is commonly used to transfer information
inside a computer. In fact, bus topology can be used to implement switches as
well. Furthermore, a bus switch can be implemented either as a space-division
bus switch or a time-division bus switch as shown in Figure 1.38 and Figure 1.39
respectively.
Input
1 bus
a b c
Output
In Figure 1.38, each input terminal transmits data into a separate bus (the thick
horizontal lines 1, 2, 3) and so there are three input buses. You can imagine a bus
containing input data that is moving from left to right (and this is the reason why
the term ÂterminalÊ is used). There are three output terminals (the thin vertical
line a, b, c) tapping to each bus capable of reading data from all the buses. A
control unit is used to determine which data bus should be read by which output
terminal. For example, if bus 1 is bus switch read by output terminal b, input 1 is
connected to output b. If bus 2 is read by output terminals a and c, input 2 is
making multicast connections to outputs a and c. This particular bus switch is
equivalent to a space-division switch because different signals travel through
different physical buses. Similar to the function of crosspoints in a crossbar
switch, the control unit determines the input-output connection.
Instead of having a separate bus for each input terminal, there can be just a single
time-slotted bus. In Figure 1.39, we have three input terminals and each input
terminal writes data into a different time slot in the bus periodically. At regular
intervals, the control unit determines which output terminal reads data from a
slot in the bus as shown in Figure 1.39. If input terminal 1 wants to connect to
output terminal b, output terminal b just reads data from slots labelled 1. This
48 X UNIT 1 SWITCHING )81'$0(17$/6
time-slotted bus
1
2 3 2 1 3 2 1 3 2 1
3
a b c
Buffer Switches
You have learned that some switching networks are blocking networks. In the
case of packet switching, blocking occurs when more than one input packet want
to connect to the same output. Only one packet can go to the output and the other
contending input packets will be dropped during blocking. One way to decrease
the blocking rate without changing the architecture of these networks is
ÂbufferingÊ. In other words, we add buffers in switching networks to store the
contending input packets so that they will not simply be dropped during
blocking. The stored packets can be forwarded to the desired output when the
output is free. The idea is similar to calling a customer hotline. If you cannot talk
to a customer representative immediately, you can hang up the phone (blocking),
or you can wait for the next available representative (waiting).
Buffer switches can be divided into two types: input-buffer switches and output-
buffer switches. The basic ideas of the two switches are the same and they only
differ in the location of the buffer.
An input-buffer switch is used to store arriving packets at each input port of the
switch as shown in Figure 1.40. With input buffering, it provides an input queue
for each input port. The switch will allow one of these packets to reach its
destination while the remaining packets for the same destination will be
instructed to pass through the switch at a later time. Although buffer switches
can help to reduce blocking to some extent, a packet arriving at a full input buffer
will still be lost.
UNIT 1 SWITCHING )81'$0(17$/6 W 49
buffer
input output
1 1
switch
2 2
Input-buffer switch
For input buffering, only one of the packets from different inputs contending for
the same output is sent. Alternatively, a switch node can be built such that all
contending packets at different inputs are sent and stored at the outputs as
shown in Figure 1.41. The output buffer switch provides an output queue for
each output port. Output buffering can give better performance than input
buffering, and youÊll learn more about that in Unit 2. Output buffering, however,
requires each node to be capable of simultaneously connecting all inputs to an
output. Moreover, the output buffer must be able to receive and manage packets
simultaneously. This increases the complexity of the output buffer switches.
Detailed information on buffer switches will be discussed in Units 2 and 3.
input output
1 1
switch
2 2
Memory Switches
Memory switching refers to switching implemented using random-access
memory (RAM). You have already learned about this kind of switching in TSI
because RAM is used to reorder the time slots in a frame. Furthermore, RAMs
can be used as buffers in buffer switches too.
50 X UNIT 1 SWITCHING )81'$0(17$/6
Suppose we have four input packets, 1, 2, 3 and 4 for output 1 and they are stored
in the output queue. Physically, these four packets are put in the buffer addresses
4, 9, 21 and 23 respectively, as shown in Figure 1.44. The head and tail of the
linked list are 4 and 23 respectively. Then the linked list for output queue 1 will
be 4 → 9 → 21 → 23. The arrow sign means the pointer to indicate the location
where the next packet to be sent to output 1 is located (the 'read' part). That is, the
packet in buffer address 4 is first sent to output 1. Then the packet in address 9
will be the second one and it is followed by the packet in address 21 and finally
the packet in address 23 should be sent.
UNIT 1 SWITCHING )81'$0(17$/6 W 51
buffer
.
. queue 1
.
.
. queue 2
write . read
.
.
.
.
. queue N
.
buffers
packet
address
Head packet 1 4
..
.
packet 2 9
..
.
packet 3 21
Tail packet 4 23
Every output owns a linked list, so there are totally N linked lists. The N linked
lists indicate all the used buffer locations (addresses). One additional linked list is
required to indicate the free buffer locations so that new packets that arrive can
be allocated to free buffer locations quickly. This linked list is called the free-list.
Each linked list has a head and tail, corresponding to the first and last packets in
52 X UNIT 1 SWITCHING )81'$0(17$/6
the queue. Figure 1.45 shows the buffer management (linked-lists) in a shared-
buffer memory switch.
From Figure 1.45, the linked-list 1 is head1 → 1 → m-1 → m+1 → n+1 → NULL
and the linked-list 2 is head2 → m → n → NULL. NULL means the linked list is
empty. That is, there are no more packets in the output queue. Notice that the
linked list contains the buffer addresses in order. The packet at the head of the
linked list will be the first one in the list to be sent out. Taking linked list 1 above
as an example, the first packet to be sent out is in buffer address 1. Thus, after it is
sent out, the linked list 1 will become head1 → m-1 → m+1 → n+1 → NULL.
Now buffer address 1 is free for future incoming packets and it is added to the
free-list.
1 1
1 2
3 3
1 4
1 1
1 2
3 3
1 4
5
Head 1 2 4 Null
Figure 1.47: (a) Inside the buffer pool, (b) The linked-list of output 1
1
4
1 2
2
3
1
1 4
3
5
Figure 1.48
54 X UNIT 1 SWITCHING )81'$0(17$/6
I O
i1 o1 i1 i2
i2 o2 ⇒ o1 o2
Concentrators
We have briefly described the 2 × 1 concentrator when we looked at switching
cells. A 2 × 1 concentrator only picks one of the two inputs to send to the output.
In the following, we shall consider a more general case. An M × N (where M > N)
concentrator has M inputs and N outputs. Again, let I be a set of M inputs, and O
be a set of N outputs.
I O
A
To any member in O
I O
Copy networks are built using multicast switches. The connection pattern is
defined by the set of pairs {(i, ni)} for which input I can be connected to ni
unspecified outputs . A copy network is responsible for making the exact number
of copies required of the input without worrying about the outputs from which
the copies emerge. For example, if input 1 wants to make a multicast connection
to three outputs, then it will have the connections pattern shown in Figure 1.52.
The copy network generates three copies of the input 1 and connects them to
three unspecified outputs, a, b, and c. More detailed descriptions of multicast
switches and copy networks will be covered in Unit 3.
I O
a
1
b
c
SELF-TEST 1.7
In this unit, the basic concepts and operation principles of switching networks
have been covered. The application of switches in telephone networks was
introduced, and you were shown how switches evolved from being controlled by
human operators to the pure digital electronic switch of today.
There are two kinds of connection techniques: circuit switching and packet
switching. For circuit switching, a path is dedicated to the two parties involved in
the call. No matter how the traffic of the path is, other connections canÊt access
the path dedicated to the particular connection. In packet switching, however,
data are chopped into packets and routed to the destination via different paths.
Since packets can go through different paths in packet switching, headers are
included in every packet to specify the source and destination addresses. Virtual
circuit switching · a hybrid of circuit switching and packet switching · was
then introduced.
The time slot interchanger (TSI) is the main element in building time-division
switches. Together with time-multiplexed switches, TSI can be used to build
multistage switches like TST and STS switches. Furthermore, we have illustrated
the functional equivalence of TSI and crossbar. Based on this argument, we
further argued the equivalence of TST and STS.
switch, the requirement of synchronous input signals in RNB limits its practical
application.
Self-test 1.1
1. Star topology reduces the number of links required, n links for n users.
However, there are limits on the efficiency of centralized switches: the
greater the number of connected users, the lower the performance of the
switching function.
Self-test 1.2
1. (a) Circuit switching has a fixed path for transmission while packets in
packet switching follow different paths. (b) Circuit switching needs a path
set-up process while packet switching doesnÊt require this. (c) Fixed
bandwidth is dedicated to circuit switching as it needs a fixed path while
the bandwidth requirement of packet switching is dynamic, changing as
packets are sent.
Self-test 1.3
1. 2 × 2 switching cell is a self-routing switch, that is, no central control is
required. Also, the routing speed of a 2 × 2 switching cell is much faster
than a 2 × 2 crossbar.
Self-test 1.4
h g f e d c b a c e a g b h d f
a
Read
Write Read
Time
slot
counter 1
Self-test 1.5
STS is less efficient than TST. STS requires one more TMS making it more
expensive to build such a network. Also, data entering the middle TSIs will
require synchronization. Therefore, TST is always preferable to STS.
Self-test 1.6
(a) Blocking (e.g. input A → output 3 and input B → output 4 are not allowed)
(b) SNB
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Case 1:
(i) Connect input A to output 3 through switch I
(ii) Connect input C to output 2 through switch II
(iii) Then input B cannot connect to output 1
Inputs Outputs
A 1
B I 2
C 3
D 4
E 5
II
F 6
Case 2:
(i) Connect input A to output 3 through switch II
(ii) Connect input B to output 1 through switch I
(iii) Connect input C to output 2 through switch II
UNIT 1 SWITCHING )81'$0(17$/6 W 61
Inputs Outputs
A 1
B I 2
C 3
D 4
E 5
II
F 6
Self-test 1.7
Shared-buffer memory switches provide buffering for all outputs with a
relatively small memory size, but blocking can still occur.