What is SAMPLING?

Introduction to Process by which an analog

Sampling signal is measured, often
millions of times per second
for video, in order to convert
the analog signal to digital.

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Data Representation - Digital vs.

Digital Data Acquisition Analog
Data Representation - Digital vs. Analog Digital: Analog:
1s and 0s, (1001 3.141592687..., 1/3
Analog-to-Digital Conversion 1011)2 ! Advantages
Number Systems ! Advantages

! Binary Numbers
! Binary Arithmetic
! Disadvantages
Sampling & Aliasing ! Disadvantages

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 Analog-
Analog-to-
to-Digital
Analog-
Analog-to-
to-Digital Conversion
Conversion
Converts analog voltages to binary
integers. Sampling • ADC calibration
Binary
Analog
ADC Integers
Voltage
(0s & 1s)

1.5 Integer
7
1 Calibration Code 6
0.5
Curve
Voltage

0 5
4
-0.5 ( 3 bit ADC) 3
-1
-1.5
2
1
0 2 4 6 8 10
0 Analog
Time
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 Voltage

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Analog-
Analog-to-
to-Digital Conversion Analog-
Analog-to-
to-Digital Conversion
Input Range Quantization Interval (Q)
! Unipolar: ( 0, VADCMAX ) ! n bit ADC, the input range is divided into
! Bipolar: ( -VADCMAX , +VADCMAX ) (Nominal Range) 2n-1 intervals.
! Clipping: V − VADC min
Q = ADCMAXn
If |VIN| > |VADCMAX|, then |VOUT| = |VADCMAX| 2 −1
! 3 bit ADC:
Integer Integer
VADCMAX Code
7
Code
7
6 6
time 5 5
4 4
3 3
2 2
1 1
0 Analog 0 Analog
-VADCMAX 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
Voltage
−2 −1.5 −1.0 −.5 0.0 0.5 1.0 1.5
Voltage

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Analog-
Analog-to-
to-Digital Conversion Analog-
Analog-to-
to-Digital Conversion
Voltage to Integer Code Voltage to Integer Code (cont.)
! n bit ADC Ex: 3 bit ADC, VADCmin = −2 V and VADCMAX = 1.5 V
V Q IN
Voltage: VADCmin VADCMAX VIN = 1.25 V
Q: Find the integer code for VIN using only positive
Code: 0 2n−1
integers and using both positive and negative
−2n−1 2n−1−1 integers.
Positive Coding: Positive and Negative Coding:
 V − VADC min  V 
Code = Round  IN  Code = Round  IN 
 Q   Q 

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Analog-
Analog-to-
to-Digital Conversion Analog-
Analog-to-
to-Digital Conversion
Convert Code to Estimated Voltage Convert Code to Estimated Voltage (cont.)
Q V$IN Ex: 3 bit ADC, VADCmin = 0 V and VADCMAX = 3.5 V
Voltage: VADCmin VADCMAX
Code = 2
Code: 0 2 −1
n
Q: What is the estimated input voltage VIN?
Code
2n−1 0 2n−1−1
Ex: 3 bit ADC, VADCmin = −2 V and VADCMAX = 1.5 V

⇒ V$ IN = Code × Q + Voffset Code = 2 (Bipolar Coding)

Q: What is the estimated input voltage VIN?

Voffset: voltage corresponding to

code 0
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 Analog-
Analog-to-
to-Digital Conversion Binary Numbers
Maximum Quantization Error
Binary Representation of Integers
VIN 644444 n7 bits44444 8
Q
( d( n− 1 ) d( n − 2 ) d ( n − 3 ) L d 2 d1 d{0 )2
VADCmin VADCMAX ;MSB LSB
( n−1 )
= d( n − 1 ) × 2 + d ( n − 2 ) × 2 ( n − 2 ) + d( n − 3 ) × 2 ( n − 3 ) +L+ d 2 × 2 2 + d1 × 2 1 + d 0 × 2{0
1
Code where d i ' s = 0 or 1.

Q Q
! n bits binary: represents 2n integers.

Any VIN ∈ V$IN − , V$IN +  will be coded to V$IN Ex: 4 bit Binary: 24 = 16 integers, (0, 1, 2, …, 15).
 2 2
! MSB: Most Significant Bit
! Maximum Quantization Error = Q/2 ! LSB: Least Significant Bit

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Binary Numbers - Coding Binary Numbers - Coding

Positive Integers Straight Binary (cont.)
Straight Binary Decimal Binary
Decimal Binary (132)10 (1011 0100)2
3 2 1 0
(101100) (2 2 2 2 )2
0 0 0 0 0 0
0 1 0 0 0 1
0 2 0 0 1 0
0 3 0 0 1 1
0 4 0 1 0 0
0 5 0 1 0 1
0 6 Q: What are the decimal integers represented by an n bit straight binary number?
0 1 1 0
0 7 0 1 1 1
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 Binary Number - Coding Binary Numbers - Coding
Negative Integers
Binary Coded Decimal (BCD)
! Used a lot in LED digital display. Sign Bit Convention
! Each digit of the decimal number is separately ! Uses the MSB as the Binary Decimal
coded into binary number. sign bit: ( 222120 )2
0 0 to 9, need 4 bits. MSB = 0 Positive 0 0 0 0
1 5 0123456 MSB = 1 Negative 0 0 1 1
6
0000 ****** 0 1 0 2
! Have two zeros.
0 0 0 1 **
2 4
0 1 )2 =
( 0{1{ 0 1 1 3
0010 * ** ** Ex:
3
0011 * **** 1 0 0 -0
1 0 )2 =
( 1{1{ 1 0 1 -1
MSB (Sign Bit) 1 1 0 -2
Ex: (3 6 4)10 = (0011 0110 0100)BCD
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1 1 1 -3

Binary Numbers - Coding Binary Numbers - Coding

2’s Complement 2’s Complement (cont.)
! Positive Numbers: Binary Decimal ! Number of bits is important.
0 … (2(n-1)-1) ( 222120 )2 ! n bit 2’s complement numbers can represent
0 1 1 3 integers from:
! Negative Numbers are
represented by their 2’s
0 1 0 2 − (2 ( n −1 ) ) ← 0 → (2 ( n −1 ) − 1)
0 0 1 1
complements: 0 0 0 0
! Quick way of getting 2’s complement numbers:
{ }
6 4 bit straight binary ⇒ (0110 )2 1 1 1 -1
{Reverse 0s and 1s} a (1001)2 1 1 0 -2 8 bit numbers: − 84 a 84 = (0101 0100 )2
{Add 1} a (1010 )2 1 0 1 -3
12
4 4 3 1 0 0 -4 Q: What is the largest positive integer and the smallest
2's complement
negative integer that a 5 bit 2’s complement number can
a -6 MSB (Sign Bit) represent?
Q: What are the 8 bit 2’s complement representations of 81
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 Why A/D-conversion?
Binary Arithmetic
Analog Analog
Analog signal ADC DAC signal Analog
Addition input processing Processing output
! 0+0=0 Ex:
! 0 + 1 = 1, 1 + 0 = 1 Digital signal processing
(8 bit 2’s complement)
! 1 + 1 = 0, carry 1 Single chip
32 + 75 =
Signals are analog by nature • ADC bottle necks:
4 (0100)2 ADC necessary for DSP – Dynamic range
Digital signal processing – Conversion speed
+6 +(0110)2 provides:
24 - 32 = – Power consumption
10 (1010)2 ! Close to infinite SNR
! Low system cost
! Repetitive system

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A/D-converter Quantization
basics noise
Digital output
Dout
t t t n ⋅ TS

111

110

f f 101
f IN f IN
f IN FS / 2 FS
f
100 VQ
vIN , A (t ) vIN (t )
Sample & hold
011
δ /2
DOUT [n]
Anti-alias δ
Quantizer
filter
010
−δ / 2
Vin
001
FS Time discrete Time discrete
Time continuos 000 Analog input
Amplitude continuos Amplitude discrete
Amplitude continuos V FSR vin

Sampling
VFSR
δ=
clock
ideal
[n] = Gideal ⋅ vIN (n ⋅ Ts ) + q( n )
•N-bit converter:
DOUT
real
DOUT [n] = Gideal ⋅ (1 + ε ) ⋅ vIN (n ⋅ Ts ) + q( n ) + eoffset ( n ) + enoise ( n ) + e jitter ( n ) + edistortion ( n )
2N

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 Quantization Successive
noise (2) approximation ADC
N clock cycles
conversion
SNR for ideal Vin FCLK = FS ⋅ N
Noise energy: ADC: Vin( RMS)
S/H
_
+ Comp

+ High resolution
1 δ /2 δ2 SNR = 20log( )
VQ( RMS) = ∫ V dVQ = (selfcalibration)
2 FS Succesive

δ Q
12
VQ( RMS) DAC Approximation
Register Dout
−δ / 2 + Easy implementation
FCLK

3
• Signal energy: SNR = 20log(2 ⋅ ) N
Successive approximation – Distortion limited by
2 decision tree component matching
δ ⋅ 2N 111
Vin( RMS) = SNR = 6.02 × N + 1.76[dB]
110
101 – Need high frequency
2 2 VFSR Vin 100
011 clock
010
001
000
TConversion = N ⋅ TDAC_ settling
– Low speed
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4 Steps of
Analog / Digital Step 1: Antialiasing
Conversion Sometimes an electronic signal will contain
a range of frequencies that is greater
than the range of frequencies contained in
the information-bearing signal.

Antialiasing (filters) For Example:

Sampling (MHz)
Quantizing (bits)
Encoding
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 Step 1: Antialiasing Step 1: Antialiasing
Most information in a speech signal is A pre-filter is used to remove the
contained in frequencies below 4 kHz, unwanted part of the signal.
but noise and other factors may
introduce frequency components
greater than 4 kHz into an electronic
speech signal.

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Step 2: Sampling
Step 2: Sampling
Value of the analog signal
is read at evenly spaced
time intervals.
Sample rate (frequency)
is measured in
megahertz.
1 mHz=1,000,000 cps.
(Cycles per second).
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Step 3: Quantization Step 3: Quantization
The height of
The each vertical bar
can take on only
digital certain values,
signal is shown by
defined horizontal dashed
only at lines, which are
sometimes higher
the points and sometimes
at which it lower than the
is original signal,
indicated by the
sampled. dashed curve.

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Step 3: Quantization Step 3: Quantization

If the 4 bits… why?
graphic has
11 1 bit would allow up to 2 levels
quantization
levels, how
2 bits would allow up to 4 levels
many bits 3 bits would allow up to 8 levels
are needed
to encode 4 bits would allow up to 16 levels
each
sample?

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 Step 3: Quantization
The difference between a quantized
representation and an original analog
signal is called the quantization noise.
The more bits for quantization of a signal,
the more closely the original signal is
reproduced.
Step 3: Quantization
Using higher sampling frequency and more
bits for quantization will produce better
quality digital video and audio.
But for the same length of video and audio,
the file size will be much larger than the
low quality signal.

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Step 4: Encoding
Step 3: Quantization
The number of bits available to describe Conversion
sampling values determines the
resolution or accuracy of quantization. of data into
For example, if you have 8-bit analog to
digital converters, the varying analog
machine
voltage must be quantized to 1 of 256
discrete values;
readable
a 16-bit converter has 65,536 values. format.
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 Nyquist Theorem

Nyquist Theorem A theorem, developed by Harry

Nyquist, which states that an
analog signal waveform may be
uniquely reconstructed, without
error, from samples taken at equal
time intervals.

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Nyquist Theorem Nyquist Theorem

The sampling rate must be Stated differently:

equal to, or greater than, The highest frequency which
twice the highest frequency can be accurately
component in the analog represented is one-half of
signal. the sampling rate.

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 Error
Sampling an analog signal can
introduce ERROR.
ERROR is the difference between a
computed, estimated, or measured
value and the true, specified, or
theoretically correct value.
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Nyquist Theorem
The vertical lines are sample intervals,
and the white dots are the crossing
points - the actual samples taken by the
conversion process.
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Nyquist Theorem
By sampling at TWICE the highest
frequency:
! One number can describe the
positive transition, and…
! One number can describe the
negative transition of a single
cycle.
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Nyquist Theorem
The sampling rate was below the Nyquist
frequency, so the reconstructed
waveform does not accurately
reproduce the original:
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 Nyquist Theorem
This under-sampling results in aliasing which
shows up as noise in digitized sound.
To correct the aliasing, A/D converters use
lowpass filters to remove all signals above
the Nyquist frequency.
To eliminate aliasing and to get high-fidelity
sound, use a high sample rate.
Frequency aliasing
When the highest frequency of the
signal Finput is greater than half the
sampling ( Fsampling/2).
E.g. Finput =20KHz, Fsampling must be over
40KHz.
Remedy: Use a low pass filter to cut off
the input high frequency content before
ADC sampling.

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upper => sampling 6 times per cycle(fs=6f);

middle => sampling 3 times per cycle(fs=3f);
Method to reduce
lower=> sampling 6 times in 5 cycles, from[1]
aliasing noise
Use low pass filter to remove high frequency
Input voltage = V
before sampling

output code =
Low ADC n
Pass Sampling 0110001
Filter: at 40KHz 0100010
fcorner=20KHz
0100100
0101011
e.g. Gain(dB)
0 :
Max freq
-3dB cut off :
=20KHz
Freq. :
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