Bbcom SDH

SDH – the synchronous transport layer
Broadband Communication
Lars Dittmann
1
© Lars Dittmann, ld@com.dtu.dk
Synchronization problem
• Multiplexing of N channels must adopt to

highest rate (N x highest rate - rather than
sum)
• Clock distribution depending on local
oscillators and network structure
• Must incorporate case of failure
2
Multiplexing
f1
f2
f3 4 x maxf
f4
f5
f6
4 x maxf
f7
f8 4 x maxf
f9
f10
4 x maxf
f11
f12
f13
f14
4 x maxf
f15
f16
3
Net synchronization
core network
node
????
access
node
1 2 3
n 1 2 3 n 1 2 3 n 1 2 3 n
4
Framing in circuit switching
125 μsec
29 30 31 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 0 1 2 3 4
Basic PDH
framing
structure
Destination determined by frame possition
5
PDH Multiplex hierarchy
DS-1E
DS-2E
(4) M12E DS-3E
(4) M23E DS-4E
(4) M34E DS-5E
(4) M45E
Multiplex hierarchy, European standard

System Data speed, Mbit/s Number of channels
DS-1E 2,048 30
DS-2E 8,448 120
DS-3E 34,368 480
DS-4E 139,264 1920
DS-5E 564.992 7680
6
Plesiochronous add and drop
7
SDH
general network issues
8
The history of SONET/SDH
• SONET proposed standard by BELLCORE at the

time when ITU/CCITT was working on global
standard
• A (simplified) version adopted by ITU
G.707/708/709 now one standard G.707
• Still minor differences in SDH and SONET - NOT
just plug and play.
• Now a general accepted standard - even non-SDH
networks are using SDH-framing
• Simplified (not all function fields supported)
versions in datacom e.g. 10GE, DPT/SRP etc.
9
SDH in brief
SDH advantages
λ SDH is synchronous, i.e. all elements use one clock as reference.

λ SDH provide simpel multiplexing and allow direct access
to lower level signals.
λ SDH defines optical standards => ‘midspan meet’ possible
λ SDH can be introduced into existing systems
λ SDH is prepared for carrying many signal types such as:
ETSI-PDH, ANSI-PDH and ATM.
λ SDH include management channels embedded in the signal.
λ SDH enable the possibility of a centralized network control.
10
SDH network structure
S D H le v e l D a ta speed STM-4/STM-16
S T M -1 1 5 5 5 2 0 k b /s
S T M -4 6 2 2 0 8 0 k b /s
S T M -1 6 2 4 8 8 3 2 0 k b /s Regional
S T M -6 4 9 9 5 3 2 8 0 k b /s network
STM-1 STM-16/STM-64
Local
network core network STM-4/STM-16
STM-1 STM-1
Local
Regional Regional Local
network network
network network
Local
STM-1 network
Local Local
network
STM-4/STM-16 network STM-1
STM-1
11
SONET vs. SDH
• SONET = ANSI (American standard)

• SDH = International Standard
• SDH basic unit = STM-1 = 155 Mbit/s
• SONET basic unit STS-1 = OC-1 = 51 Mbit/s
12
SDH og PDH
Customer Customer
SDH-island PDH SDH-island

network
High speed
SDH-line
PDH
network
13
Network element 1
SDXC
synchronous digital cross connect
STM - n SDXC STM - n
(m<n)
STM - n STM - m / PDH
•Switching of lines with different speed

•Add / drop of lower order signals
14
Network element 2
ADM
add / drop multiplexer
STM - n ADM STM - n
(m<n)
STM - m PDH
•Add / drop of lower order signals

•Used in e.g. ringstructures
15
Network element 3
Mux
multiplexer
STM - m
Multiplexer STM - n
PDH (m<n)
•Multiplexing of lower order SDH to higher order SDH

•Link between PDH and SDH
•MUX is part of the SDXC and ADM
16
Network element 4
Reg
regenerator
STM - n Regenerator STM - n
•Regenerate the signal

•Signal supervision
17
Layered structure
Circuit
Circuit layer networks layer
Lower
VC-11 VC-12 VC-2 VC-3 order
path
layer
Path
layer
Higher
order SDH
VC-3 VC-4 path transport
layer layers
Multiplex section layer

Section
layer
Transmission
media
Regenerator section layer
layer
Physical media layer
T1816750-92/d11
18
SDH structure
Path layer:
low-order path
high-order path
Transmission medium layer:

Multiplexer section
Regenerator section
Physical medium (e.g. fiber)
19
Overhead
• Regenerator section
• Multiplekser section
Overhead is generated at:
• End-to-end high-order path
• End-to-end low-order path
20
SDH
frame structure
21
Multiplexing structure
European multiplexing of ‘low-order’ signals into a SDH signal
Overhead added Pointer added

Multiplexed AU’s Overhead added
Multiplexed TU’s Overhead added
Pointer added Input container
22
From container 1 to STM-N
Container-1
VC-1 POH Container-1 VC-1
TU-1 PTR VC-1 TU-1
TU-1 PTR TU-1 PTR VC-1 VC-1 TUG-2
TUG-2 TUG-2 TUG-3
VC-4 POH TUG-3 TUG-3 VC-4
AU-4 PTR VC-4 AU-4
AU-4 PTR VC-4 AUG
SOH AUG AUG STM-N
Logical association
T1819910-93/D03
Physical association
PTR Pointer
23
BIP-8 calculation
Calculation of a BIP-8
Bit-stream : 1011 0010 0100 1101 1011 0011 1110 0101
BIP-8 => In a group of bits:
Number of “1” even => parity bit 0

Number of “1” odd => parity bit 1
24
Transmission system
TX RX TX RX
Site A Site B Site C
RX TX RX TX
If site B have problems with a signal from site A
‘Upstream to A’
• Remote Defect Indication (RDI)
former (Far End Receive Failure (FERF))
• Remote Error Indication (REI)

former (Far End Block Error (FEBE))
‘Downstream to C’
• Alarm Indication Signal (AIS) of appropriate type
25
Overhead
Multiplexed AUG’s
26
STM-N frame
270 × N columns (bytes)
9× N 261 × N
1
Section overhead
SOH
3
4 Administrative unit pointer(s)
9 rows
5 STM-N payload
Section overhead
SOH
9
T1819950-93/D07
Transmission
• From upper left corner to lower right corner.
• One row at a time
• Each byte is transmitted with most significant bit first
Frame
• Repeated every 125 μs => frame rate 8 kHz
• Each byte correspond to 64 kbit/s
27
STM-1 Section overhead (SOH)
Regenerator Section Overhead (RSOH) terminated at regenerators

Multiplexer Section Overhead (MSOH) terminated at multiplexers
28
Regerator section overhead
A1, A2
• Framing bytes. A1=hex F6, A2=hex 28.
C1/J0
• STM-1 Identifier / Section trace.(16-byte frame)
B1
• 8-bit byte interleaved parity (BIP-8)
check sum on entire STM-1 (after scrambling)
and stored in the next frame (before scrambling).
E1
• Order wire-64 kbit/s voice channel.
F1
• User channel, not yet defined.
D1-D3
• Data communication channel (192 kbit/s)
for operation and management of regene-
rators.
29
Multiplexer section overhead
B2
• 3 bytes (BIP-24)check sum. Calculated on
the entire STM-1 (except RSOH) and inser-
ted in the next frame.
K1,K2
• Mainly for signaling related to multiplex
section protection and maintenance.
D4-D12
• Data Communication Channel (576 kbit/s)
for operation and management of multi-
plexers.
S1
• Synchronization state.
M1
• Section REI (FEBE). Number of B2
bit errors detected by ‘far end’ in the last
frame. Range [0-24*N] for STM-N, but
truncated at 255.
E2
• Order wire for multiplex section.
30
High-order path overhead
J1
• 64 kb/s channel for path trace
B3
• 8 bit byte interleaved parity check. The check is
calculated on the complete VC-n and inserted in
B3 in the next VC-n.
F2
• User channel between path-elements
H4
• Multi-frame indicator. (e.g. Used when a VC-12 is
mapped into a multi-frame TU-12).
F3* F3*
• User channel between path-elements
K3* *
K3
N1* • Automatic Protection Switching (b1-b4) at the
VC-4/3 path level.(b5-b8) Future use.
N1*
• Network operator byte. Allocated for providing a
Tandem Connection Monitoring function.
Reserved* C2
Unused
Signal label :
* ITU-T G707 (03/96)

* 1111 1110 FE Test signal O.181
1111 1111 FF VC-AIS
31
Low-order path overhead
VC-11, VC-12, VC-2 path BIP-2
overhead : V5, J2, N2 and K4. • 2-bit interleaved check sum calculated on
the total VC-n, stored and inserted into
the next VC-n.
V5=> REI (former FEBE)
BIP-2 REI RFI Signal Label RDI
1 2 3 4 5 6 7 8
• Remote Error Indication. Bit which shows

if any BIP-2 errors was found in the last
Virtual Container path REI coding: 0 = 0 errors
1 = 1 or more errors
Virtual Container path Signal Label coding : received frame in the far end.
b5 b6 b7 Meaning RFI
0 0 0 Unequipped or supervisory-unequipped
• Remote Failure Indication. A failure is a
defect which persists beyond the time
0 0 1 Equipped - non-specific (Note 1)
0 1 0 Asynchronous
0 1 1 Bit synchronous (Note 2) allocated for protection mechanisms.
RDI (former FERF)
1 0 0 Byte synchronous
1 0 1 Reserved for future use
1 1 0 Test signal, O.181 specific mapping (Note 3) • Remote Defect Indication. Bit which show
1
NOTES
1 1 VC-AIS (Note 4)
if the far end has detected a large problem.
1 Value "1" is only to be used in cases where a mapping code is not defined in the above table. For
interworking with old equipment (i.e. designated to transmit only the values "0" and "1"), the following
conditions apply:
– For backward compatibility, old equipment shall interpret any value received other than "0" as an
equipped condition.
– For forward compatibility, when receiving value "1" from old equipment, new equipment shall not
generate a Signal Label Mismatch alarm.
2 In the case of a VC-12, the code "3" shall, for backward compatibility purposes, continue to be
J2 : Low-order path Access Point Identifier.
interpreted as previously defined even if the bit synchronous mapping of 2048 kbit/s signal is not
defined anymore. N2 : Tandem Connection Monitor
3 Any mapping defined in Recommendation O.181 which does not correspond to a mapping defined in
Recommendation G.707 falls in this category. K4 : (b1-b4) Automatic Protection Switching.
4 Only for networks supporting the transport of Tandem Connection signals.
(b5-b7) Reserved.
FIGURE 9-7/G.707 (03/96) (b8) Spare
VC-2/VC-1 POH V5 byte
32
Overhead summary
• Regenerator section
• Multiplekser section
• End-to-end high-order path
• End-to-end low-order path
• TU-pointer
• AU-pointer
33
SDH
pointers
34
Pointers
Multiplexed AUG’s
35
Pointers
• Pointers are used to allow a flexible and dynamic alignment of VC-n’s
which include compensation for phase and frequency differences between
two SDH net.
• There are two pointer levels for 2Mb/s signals in a VC-4.
36
AU-4 pointer
AU-4 pointer offset numbering
H1 H2 H3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
1 2 3 4 5 6 7 8 9 10 AUG 270 N N N N S S I D I D I D I D I D
1 Negative justification 10 bit pointer value T1518180-95

opportunity (3 bytes)
2 Negative Positive
Positive justification I Increment justification justification
3 opportunity (3 bytes)
D Decrement opportunity opportunity
4 H1 Y Y H2 1* 1* H3 H3 H3 0 - - 1 .... - 86 - - N New data flag
Pointer value (b7-b16)
5 87 - New data flag – Normal range is:
6 – Enabled when at least 3 out of 4 bits match "1001" for AU-4, AU-3: 0-782 decimal
– Disabled when at least 3 out of 4 bits match "0110" for TU-3: 0-764 decimal
7
– Invalid with other codes
8 Positive justification
Negative justification – Invert 5 I-bits
9 .... 521 - - – Invert 5 D-bits – Accept majority vote
125 µs – Accept majority vote
1 522 - ....
Concatenation indication
2 – 1001SS1111111111 (SS bits are unspecified)
3 .... 782 - -
SS bits AU-n/TU-n type
4 H1 Y Y H2 1* 1* H3 H3 H3 0 .... .... 86 - -
5 261*9/3 = 783 = 0 to 782 10 AU-4, AU-3, TU-3
6
7 NOTE – The pointer is set to all "1"s when AIS occurs.
8
FIGURE 8-3/G.707 (03/96)
9
250 µs
T1819190-92/d12
AU-n/TU-3 pointer (H1, H2, H3) coding
1* All 1s byte
Y 1001SS11 (S bits are unspecified)
37
AU-4 pointers
1 2 3 4 5 6 7 8 9 10 AUG 270
1 Negative justification
opportunity (3 bytes)
2
Positive justification
3 opportunity (3 bytes)
4 H1 Y Y H2 1* 1* H3 H3 H3 0 - - 1 .... - 86 - -
5 87 -
6
7
8
9 .... 521 - -
125 µs
1 522 - ....
2
3 .... 782 - -
4 H1 Y Y H2 1* 1* H3 H3 H3 0 .... .... 86 - -
5
6
7
8
9
250 µs
T1819190-92/d12
1* All 1s byte
38
AU-4 pointers
H1 H2 H3
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
N N N N S S I D I D I D I D I D
10 bit pointer value T1518180-95

Negative Positive
I Increment justification justification
D Decrement opportunity opportunity
N New data flag
Pointer value (b7-b16)
New data flag – Normal range is:
– Enabled when at least 3 out of 4 bits match "1001" for AU-4, AU-3: 0-782 decimal
– Disabled when at least 3 out of 4 bits match "0110" for TU-3: 0-764 decimal
Positive justification
Negative justification – Invert 5 I-bits
– Invert 5 D-bits – Accept majority vote
– Accept majority vote
Concatenation indication
– 1001SS1111111111 (SS bits are unspecified)
SS bits AU-n/TU-n type
10 AU-4, AU-3, TU-3
NOTE – The pointer is set to all "1"s when AIS occurs.
39
Pointer adjustments
Positive justification -- AU-4 pointer -- negative justification
1 2 3 4 5 6 7 8 9 10 AUG 270
1 1 2 3 4 5 6 7 8 9 10 AUG 270
Start of VC-4
1
3 Start of VC-4
4 H1 Y Y H2 1* 1* H3 H3 H3 3
5 4 H1 Y Y H2 1*1* H3 H3 H3
n – 1 n n n n + 1, n + 1 5
Frame 1 n – 1 n n n n + 1, n + 1
Frame 1
9
125 µs
1 9
Pointer value (n) 125 µs
1
3 Pointer value (n)
4 H1 Y Y H2 1* 1* H3 H3 H3 3
5 4 H1 Y Y H2 1*1* H3 H3 H3
n – 1 n n n n + 1, n + 1 5
Frame 2 n – 2, n – 1, n – 1, n – 1 n n n n + 1, n + 1
Frame 2
9
250 µs
1 9
Pointer value (I-bits inverted) 250 µs
1
3 Pointer value (D-bits inverted)
4 H1 Y Y H2 1* 1* H3 H3 H3 Positive justification bytes (3 bytes) 3
5 4 H1 Y Y H2 1*1* Negative justification bytes (data)
n – 1 n n n n + 1, n + 1
5
Frame 3 n – 2 n – 1, n – 1, n – 1 n n n n + 1, n + 1
Frame 3
9
375 µs
1 9
Pointer value (n + 1) 375 µs
1
3 Pointer value (n – 1)
4 H1 Y Y H2 1* 1* H3 H3 H3 3
5 4 H1 Y Y H2 1*1* H3 H3 H3
n – 1 n n n n + 1, n + 1
5
Frame 4 n – 2 n – 1, n – 1, n – 1 n n n n + 1, n + 1
Frame 4
9 500 µs
9
T1819220-92/d15 500 µs
1* All 1s byte T1819240-92/d17
Y 1001SS11 (S bits are unspecified) 1* All 1s byte
FIGURE 3-4/G.709
FIGURE 3-6/G.709
AU-4 pointer adjustment operation – positive justification
AU-4 pointer adjustment operation – Negative justification
Example :
10 bit pointer value
40
Possitive adjustment
1 2 3 4 5 6 7 8 9 10 AUG 270
1 Start of VC-4
3
4 H1 Y Y H2 1* 1* H3 H3 H3
5
n – 1 n n n n + 1, n + 1
Frame 1
9 125 µs
1
Pointer value (n)
3
4 H1 Y Y H2 1* 1* H3 H3 H3
5
n – 1 n n n n + 1, n + 1
Frame 2
9
1 250 µs
Pointer value (I-bits inverted)
3
4 H1 Y Y H2 1* 1* H3 H3 H3 Positive justification bytes (3 bytes)
5
n – 1 n n n n + 1, n + 1
Frame 3
9
375 µs
1
Pointer value (n + 1)
3
4 H1 Y Y H2 1* 1* H3 H3 H3
5
n – 1 n n n n + 1, n + 1
Frame 4
9 500 µs
T1819220-92/d15
1* All 1s byte
41
Negative justification
1 2 3 4 5 6 7 8 9 10 AUG 270
1
Start of VC-4
3
4 H1 Y Y H2 1*1* H3 H3 H3
5
n–1 n n n n + 1, n + 1
Frame 1
9
125 µs
1
Pointer value (n)
3
4 H1 Y Y H2 1* 1* H3 H3 H3
5
n – 2, n – 1, n – 1, n – 1 n n n n + 1, n + 1
Frame 2
9
250 µs
1
Pointer value (D-bits inverted)
3
4 H1 Y Y H2 1* 1* Negative justification bytes (data)
5
n–2 n – 1, n – 1, n – 1 n n n n + 1, n + 1
Frame 3
9
375 µs
1
Pointer value (n – 1)
3
4 H1 Y Y H2 1* 1* H3 H3 H3
5
n–2 n – 1, n – 1, n – 1 n n n n + 1, n + 1
Frame 4
9
500 µs
T1819240-92/d17
1* All 1s byte
42
TU-12 Pointer-1
TU-12
V1
105
State of V1 PTR1
H4 byte TU-n VC-n
.. ..
XXXXXX00 V1 V2 PTR2
VC-11 VC-12 VC-2
Zero pointer offset location
V5 139
V3 PTR3 (action) Negative justification opportunity
Positive justification opportunity V2
26 35 107 V4 Reserved 0
125 µs
XXXXXX01 V2
....
V1 V2
J2
N N N N S S I D I D I D I D I D
(S bits specify size) 34
26 35 107
TU-2 NDF 0 0 10-bit pointer value V3
250 µs 10-bit pointer value
35
TU-12 NDF 1 0
XXXXXX10 V3 N2
.. ..
TU-11 NDF 1 1 10-bit pointer value
26 35 107 T1518260-95
I Increment 69
D Decrement
N New Data Flag V4
375 µs K4
XXXXXX11 V4
New Data Flag
70
– Enabled when at least 3 out of 4 bits match "1001"
26 35 107
.. ..
– Disabled when at least 3 out of 4 bits match "0110"
104
104 140 428 VC capacity (byte/500 ms) Negative justification Positive justification
500 µs – Invert 5 D-bits – Invert 5 I-bits
– Accept majority vote – Accept majority vote
TU Tributary unit T1518250-95 Pointer value

VC Virtual container Normal range is:
V1 VC Pointer 1 – for TU-2: 0-427 decimal Concatenation indication
V2 VC Pointer 2 – for TU-12: 0-139 decimal – 1001SS11111111 (SS bits are unspecified)
V3 VC Pointer 3 (action) – for TU-11: 0-103 decimal
V4 Reserved
FIGURE 8-11/G.709 (03/96) TU-2/TU-1 pointer coding

NOTE – V1, V2, V3 and V4 bytes are part of the TU-n and are terminated at the
pointer processor.
FIGURE 8-10/G.707 (03/96) Virtual Container mapping in multiframed Tributary Unit
43
TU-12 Pointer-2
VC-3/VC-4 POH
(V4)
9 row
VC-3/VC-4 payload
H4(00)
PTR (V1)
VC-3/VC-4 payload
H4(01)
H4 bits
1 2 3 4 5 6 7 8 Frame N° Time
PTR (V2) -------------------------------------------------------------
X X X X X X 0 0 0 0
VC-3/VC-4 payload
H4(10) X X X X X X 0 1 1
X X X X X X 1 0 2
PTR (V3) X X X X X X 1 1 3 500 μs TU-n multiframe
VC-3/VC-4 payload X undefined content

H4(11)
(V4)
FIGURE 8-14/G.707
VC-3/VC-4 payload
H4(00)
Tributary Unit multiframe indicator byte (H4) coding sequence
T1518280-95
In H4 (XY), XY represent bits 7 and 8 of H4
FIGURE 8-13/G.707 TU-1/2 500 µs multiframe indication using H4 byte
44
SDH
mapping and multiplexing
45
Multiplexing
Multiplexed AUG’s
46
Multiplexing to higher order
SDH level Data speed
STM-1 155520 kbit/s
STM-4 622080 kbit/s
STM-16 2488320 kbit/s
STM-64 9953280 kbit/s
1 261 1 261
1 9 1 9
#1 #N
AUG AUG
RSOH 123...N123...N
123...N123...N
MSOH
123 ... N
N×9 N × 261 T1518050-95
STM-N
F IG U R E 7 -1 /G .7 0 7 (0 3 /9 6 ) M u ltip le x in g o f N A U G s in to S T M -N
47
STM-N pointers
1 261 1 261
1 9 1 9
#1 #N
AUG AUG
RSOH 123...N123...N
123...N123...N
MSOH
123 ... N
N×9 N × 261 T1518050-95
STM-N
48
STM-n Section Overhead (SOH)
STM-4 overhead
•Some bytes are repeated 4 times (for STM-4) and others only show once.
And in the latter case the byte from the first STM-1 is used.
•The overhead is 36 bytes long for STM-4, but 1 byte is still 64 kbit/s.
49
Multiplexing of TUs 1
TUG-3 VC-4
TUG-3 TUG-3 TUG-3

(A) (B) (C)
1 86 1 86 1 86
A B C A B C A .... A B C A B C
1 2 3 4 5 6 7 8 9 10 261
T1819120-92/d05
Fixed stuff
VC-4 POH
FIGURE 2-4/G.709
Multiplexing of three TUG-3s into a VC-4
50
Multiplexing of TUs 2
TU12,TUG-2 TUG-3
TU-11 TU-12 TU-2
1
2
36
TU-12 bytes
36
125 µs
4 columns
1 2 3 4
1 1 1 1 1 1 1
2 2 2 2 2 2 2 ................
9 rows 2304 kbit/s TUG-2 3 3 3 3 3 3 3
4 4 4
36
(1) (2) (3) (7)

TUG-3
1 1 1 1 1 1 1 1 1 1 1 1
2 2 2 2 2 2 2 2 2 2 2 2
3 3 3 3 3 3 3 3 3 3 3 3
4 4 4 4 4 4 4 4 4 4 4 4
Fixed stuff 5 5 5 5 5 5 5 5 5 5 5 5
6 6 6 6 6 6 6 6 6 6 6 6
7 7 7 7 7 7 7 7 7 7 7 7
1 23 45 6 7 89 . . . . . . . . 78 80 82 84 86
79 81 83 85
T1518110-95
FIGURE 7-7/G.707 (03/96) Multiplexing of seven TUG-2s via a TUG-3
51
Mapping
Multiplexed AUG’s
52
Mapping
In the SDH note following mappings are described :
140 Mbit/s PDH => C-4 => VC-4

34 Mbit/s PDH => C-3 => VC-3 => TU-3 => TUG-3
2 Mbit/s
2 Mbit/s can be mapped into C-12 using 3 metods:
Asynchronous (eg. PDH signals)

Bit-synchronous (not framesynchronous) (not in 03/96)
Byte- synchronous (frame and speed synchronous)
2 ways of operation are defined:
Floating mode (pointers are used)

Locked mode (no pointers) (not in 03/96)
53
Multiframed TU-12
VC-12 mapped into TU-12 multiframe indikation
a multi-frame TU-12 VC-3/VC-4 POH
State of
H4 byte TU-n VC-n
TU PTR (V4)
XXXXXX00 V1
VC-11 VC-12 VC-2
V5
9 row
VC-3/VC-4 payload
H4(00)
26 35 107
125 µs TU PTR (V1)

XXXXXX01 V2
J2
VC-3/VC-4 payload
H4(01)
26 35 107
250 µs TU PTR (V2)

XXXXXX10 V3 N2
26 35 107 VC-3/VC-4 payload

H4(10)
K4 TU PTR (V3)
375 µs
XXXXXX11 V4
26 35 107
VC-3/VC-4 payload
H4(11)
104 140 428 VC capacity (byte/500 ms) TU PTR (V4)

500 µs
VC-3/VC-4 payload
TU Tributary unit T1518250-95 H4(00)
VC Virtual container
V1 VC Pointer 1
V2 VC Pointer 2 T1819300-92/d24
V3 VC Pointer 3 (action) TU PTR Tributary unit pointer

V4 Reserved
FIGURE 3-13/G.709
NOTE – V1, V2, V3 and V4 bytes are part of the TU-n and are terminated at the
pointer processor. An example of TU-1/2 multiframe indication using H4 byte
(the case of 500 μs multiframe)
FIGURE 8-10/G.707 (03/96) Virtual Container mapping in multiframed Tributary Unit
54
Asynchronous
2 Mbit/s mapping - asynchronous
V5
RRRRRRRR
D Data bit
O Overhead (8 bit)
32 bytes
RRRRRRRR
J2
C Justification control (6 bit)
C 1 C2 O O O O R R S Justification possibility (2 bit)
32 bytes R Fixed stuff
RRRRRRRR J2 * Low order path trace
N2 *
140
Tandem Connection Monitoring

bytes N2
K4 *
C 1 C2 O O O O R R
32 bytes Automatic Protection Switching

RRRRRRRR Additional RDI information
K4
1023 databit / 500 μs

C1 C2 R R R R R S1
S2 D D D D D D D
31 bytes
RRRRRRRR
T1523020-96 Used e.g. for PDH signals

D Data bit
R
O
Fixed stuff bit
Overhead bit
* From ITU-T G707 (03/96)
S Justification opportunity bit
C Justification control bit
FIGURE 10-8/G.707 Asynchronous mapping of 2048 kbit/s tributary
55
Byte- synchronous
2 Mbit/s mapping - byte synchronous
V5
R
Time Slot 0
Time Slots 1 to 15
Time Slot 16
R Fixed stuff byte

Time Slots 17 to 31
J2 *
R
J2
Low order path trace
N2 *
R
Time Slot 0
Tandem Connection Monitoring
K4 *
Time Slots 1 to 15
140
Time Slot 16 Automatic Protection Switching
Additional RDI information
bytes Time Slots 17 to 31
R
N2
R
Time Slot 0
Time Slots 1 to 15
Time Slot 16
* From ITU-T G707 (03/96)
Time Slots 17 to 31
R
K4
R
Time Slot 0
Time Slots 1 to 15
Time Slot 16
Time Slots 17 to 31
R FIGURE 10-9/G.707 (03/96)
500 µs
T1523030-96
R Fixed stuff byte
Byte synchronous mapping for 2048 kbit/s tributary
(30 channels with Common Channel Signalling or Channel Associated Signalling)
56
Asynchronous 140 Mbit/s
270 bytes
261 bytes
AU-4
1 byte 13 bytes
SOH
3
J1 VC-4
1 AU-4 PTR B3
FIGURE 10-2/G.707 (03/96)
C2
G1 Multiplexing of VC-4 into STM-1 and
SOH F2
5
H4
block structure of VC-4 for
F3 asynchronous mapping of 139 264 kbit/s
K3
STM-1
N1
VC-4 20 blocks of 13 bytes

POH
T1518350-95
PTR Pointer
1 12 bytes
POH W 96 D X 96 D Y 96 D Y 96 D Y 96 D
X 96 D Y 96 D Y 96 D Y 96 D X 96 D
Y 96 D Y 96 D Y 96 D X 96 D Y 96 D FIGURE 10-3/G.707 (03/96)
Asynchronous mapping of 139 264

Y 96 D Y 96 D X 96 D Y 96 D Z 96 D
kbit/s tributary into VC-4
T1522990-96
D Data bit
W DDDDDDDD Y RRRRRRRR R Fixed stuff bit
O Overhead bit
X CRRRRROO Z DDDDDDSR S Justification opportunity bit

C Justification control bit
NOTE – This figure shows one row of the nine-row VC-4 container structure.
57
Mapping of ATM cells
J1
B3 ....
C2
VC-4/VC-3
ATM Cell G1
Mapping ATM cells
F2
53 octets H4 into a VC-4
F3
K3
N1 ....
VC-4/VC-3 POH
ATM bytes are aligned

Cells may cross frames
J1
B3 ....
C2
ATM Cell VC-4-Xc
G1
F2 Fixed
Mapping ATM cells into
53 octets H4
Stuff
a concatinated VC-4
F3 (VC-4-Xc)
K3
N1 ....
X-1 X x 260 bytes
VC-4-Xc POH
58
Optical standards 1
TABLE 1/G.957
Classification of optical interfaces based on application

and showing application codes
Inter-office
Application Intra-
office
Short-haul Long-haul
Source nominal 1310 1310 1550 1310 1550

wavelength (nm)
Type of fibre Rec. G.652 Rec. G.652 Rec. G.652 Rec. G.652 Rec. G.652 Rec. G.653
Rec. G.654
Distance (km)a) ≤ 20 ∼ 15 ∼ 40 ∼ 80
STM-1 I-10 S-1.10 S-1.20 L-1.10 L-1.20 L-1.30
STM level STM-4 I-40 S-4.10 S-4.20 L-4.10 L-4.20 L-4.30
STM-16 I-16 S-16.1 S-16.2 L-16.1 L-16.2 L-16.3

a) These are target distances to be used for classification and not for specification.
59
Parameters for STM-16 interface
Unit Values
Digital signal STM-16 according to Recommendations G.707 and G.958
Nominal bit rate kbit/s 2 488 320
Application code (Table 1) I-16 S-16.1 S-16.2 L-16.1 L-16.2 L-16.3
Operating wavelength range nm 1266a)-1360 1260a)-1360 1430-1580 1280-1335 1500-1580 1500-1580
Transmitter at reference point S
Source type MLM SLM SLM SLM SLM SLM
Spectral characteristics
– maximum RMS width (σ) nm 4 – – – – –
– maximum –20 dB width nm – 1 < 1b) 1 < 1b) < 1b)
– minimum side mode dB – 30 30 30 30 30
– suppression ratio
Mean launched power
– maximum dBm –30 –00 –00 +3 +3 +3
– minimum dBm –10 –50 –50 –2 –2 –2
Minimum extinction ratio dB 8.2 8.2 8.2 8.2 8.2 8.2
Optical path between S and R
Attenuation rangec) dB 0-7 0-12 0-12 10-24e) 10-24e) 10-24e)
Maximum dispersion ps/nm 12 NA b) NA 1200-1600b),d) b)
Minimum optical return loss of dB 24 24 24 24 24 24

cable plant at S, including any
connectors
Maximum discrete reflectance dB –27 –27 –27 –27 –27 –27
between S and R
Receiver at reference point R
Minimum sensitivityc) dBm –18 –18 –18 –27 –28 –27
Minimum overload dBm –30 –00 –00 –9 –90 –9
Maximum optical path penalty dB 1 1 1 1 2 1
Maximum reflectance of dB –27 –27 –27 –27 –27 –27
receiver, measured at R
60
Multiplex-Section Protection
A number of MSP architectures exists of which two is shown:
Null 0
channel (0)
1 0
Working Working
channel 1 section 1
2
1
Working Working
0 section 1 Working section 2
Working channel 2
channel 1 1
15 2
Extra Protection
traffic section (0)
Protection channel
Permanent section (0) (15)
bridge 15
Selector
Bridge Selector
T1508790-92/d33 T1508800-92/d34
FIGURE A.1/G.783 FIGURE A.2/G.783

MSP Switch – 1 + 1 architecture example MSP Switch – 1 : n architecture example
(shown in released position) (shown in released position)
61
1+ 1 protection
Working
0 section 1
Working
channel 1 1
Protection
Permanent section (0)
bridge Selector
T1508790-92/d33
FIGURE A.1/G.783
MSP Switch – 1 + 1 architecture example
(shown in released position)
62
1:n protection
Null 0
channel (0)
1 0
Working Working
channel 1 section 1
2
1
Working
Working section 2
channel 2
15 2
Extra Protection
traffic section (0)
channel
(15)
15
Bridge Selector
T1508800-92/d34
FIGURE A.2/G.783
MSP Switch – 1 : n architecture example
(shown in released position)
63
STM-n Signal Composition
Composition of an STM-n signal carrying a 140 Mbit/s PDH signal
C-4 => VC-4 => STM-n
64
Clock 1
Clock hierarchy:
Primary reference clock (PRC)

Slave (transit)
Slave (local)
SDH element clock
G.811
PRC
SDH SDH
network network
element element
clock clock
a) Node
G.812 G.812 a) boundary
node node
clock clock
Synchronisation Node
link(s) clock
a)
a)
SDH SDH
network network
element element
G.812 G.812 G.812 G.812 clock clock
node node node node
clock clock clock clock
Distribution to other
G.81s clocks
T1816900-92/d26 outside the node
T1816890-92/d25
PRC Primary reference clock
a) Timing only.
FIGURE 6-2/G.803 FIGURE 6-1/G.803

Synchronisation network architecture inter-node distribution Synchronisation network architecture intra-node distribution
65
Clock 2
The clock of a SDH Network Element
can be synchronized in two ways:
a) Synchronization to an incoming STM-N line.
b) Synchronization to a Node clock which is synchronized to a STM-N signal,

a 2048 kbit/s signal or a 2048 kHz signal.
66

Bbcom SDH

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SDH – the synchronous transport layer

• Multiplexing of N channels must adopt to

Destination determined by frame possition

Multiplex hierarchy, European standard

general network issues

• SONET proposed standard by BELLCORE at the

λ SDH is synchronous, i.e. all elements use one clock as reference.

• SONET = ANSI (American standard)

SDH-island PDH SDH-island

STM - n SDXC STM - n

STM - n STM - m / PDH

•Switching of lines with different speed

STM - n ADM STM - n

•Add / drop of lower order signals

•Multiplexing of lower order SDH to higher order SDH

STM - n Regenerator STM - n

•Regenerate the signal

Multiplex section layer

Physical media layer

Transmission medium layer:

Overhead added Pointer added

Multiplexed TU’s Overhead added

Pointer added Input container

VC-1 POH Container-1 VC-1

TU-1 PTR VC-1 TU-1

TU-1 PTR TU-1 PTR VC-1 VC-1 TUG-2

TUG-2 TUG-2 TUG-3

VC-4 POH TUG-3 TUG-3 VC-4

AU-4 PTR VC-4 AU-4

AU-4 PTR VC-4 AUG

SOH AUG AUG STM-N

Bit-stream : 1011 0010 0100 1101 1011 0011 1110 0101

BIP-8 => In a group of bits:

Number of “1” even => parity bit 0

If site B have problems with a signal from site A

• Remote Error Indication (REI)

Multiplexed TU’s Overhead added

Pointer added Input container

Regenerator Section Overhead (RSOH) terminated at regenerators

* ITU-T G707 (03/96)

• Remote Error Indication. Bit which shows

Multiplexed TU’s Overhead added

Pointer added Input container

1 Negative justification 10 bit pointer value T1518180-95

10 bit pointer value T1518180-95

SS bits AU-n/TU-n type

10 AU-4, AU-3, TU-3

NOTE – The pointer is set to all "1"s when AIS occurs.

10 bit pointer value

TU Tributary unit T1518250-95 Pointer value

FIGURE 8-11/G.709 (03/96) TU-2/TU-1 pointer coding

FIGURE 8-10/G.707 (03/96) Virtual Container mapping in multiframed Tributary Unit

PTR (V3) X X X X X X 1 1 3 500 μs TU-n multiframe

VC-3/VC-4 payload X undefined content

In H4 (XY), XY represent bits 7 and 8 of H4

FIGURE 8-13/G.707 TU-1/2 500 µs multiframe indication using H4 byte

mapping and multiplexing

Multiplexed TU’s Overhead added

Pointer added Input container

TUG-3 TUG-3 TUG-3

(1) (2) (3) (7)

Multiplexed TU’s Overhead added