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Mixed Signal LSI

Practical design method of


CMOS analog circuits

Kanazawa University
Microelectronics Research Lab.
Akio Kitagawa
0. Introduction

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Growing information technology toward
a real world and an daily life
Keywords: Wireless, Battery-less, Sensor integration.
An analog mixed signal (AMS) LSI is fundamental to advanced electronic systems.
Regional Information

Disaster
prevention
Distribution
Intelligent system
transport systems
Maintenance of Nursing-care
buildings
Cultivation Information in a virtual reality
Environment
conservation
Medical services
Home safety and
automation Health care
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Information in a real world and an actual life
Stage of circuit design
Analog Digital
Function
Transfer function Block diagram
Verilog-A Verilog-D

Circuit Analog circuit Logic circuit
(Element circuit) (Logic gate)

Circuit Element
Analog circuit Digital circuit
② (Transistor circuit) (Transistor circuit)

The hierarchical learning makes easy to understand the analog circuit


design. Let us learn ① first, then learn ②.
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Alliance between the subjects
Digital Electronic Circuits (B3) Mixed Signal LSI (M1)
Transfer functions
Continuous time/Discrete time analog Design of CMOS analog
circuit
Oversampling and noise shaping
circuits
Mixed signal simulation

This subject is a sequel of Digital Electronic Circuits (B3, 2nd


semester) and Design of Integrated Circuits (B4, 1st semester).
• You can get a credit of Mixed Signal LSI, if you want to get enrolled
the undergrad class of Digital Electronic Circuits instead of this class.
• The credit of Digital Electronic Circuits is not required as a essential
condition. You may learn Mixed Signal LSI first.
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Books of reference
• For students who wants to learn the practical CMOS
analog circuit design (Note)
– R. Jacob Baker, CMOS: Circuit Design, Layout, and Simulation,
3rd Edition, ISBN 978-0-470-88132-3, Wiley-IEEE Press (2010)
– R. Jacob Baker, CMOS: Mixed-Signal Circuit Design, 2nd Edition,
ISBN 978-0-470-29026-2, Wiley-IEEE Press (2009)
• Course wares
– http://jaco.ec.t.kanazawa-u.ac.jp/edu/mix/
– http://cmosedu.com/
Note:
These books does not cover the RF (Radio-frequency circuits).
Book of reference on RF circuits:
- RF Microelectronics, B. Razavi, ISBN 0-13-887571-5, Prentice Hall (1998)
- High-linearity Cmos Rf Front-end Circuits, Yongwang Ding, ISBN
0387238018 , Springer (2004) 6
Requirement to the analog circuit
designer
• Broad knowledge and much experience are required.
– There are many circuit parameters with trade-off relations each other.
– All optimization procedure is solved under the constraint peculiar to
the application assumed.
– The constraint of the circuit design is depends on the architecture of
whole system.

An analog designer must learn a digital circuit design,


a system architecture and a systematic design
methodology too.

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History of analog mixed signal
LSI development

Bio-sensor, Battery-less
Emerging Devices,
Analog Functions

ISDN MODEM
Over Sampling

Mobile Phone
SCF MODEM

Read Ch. LSI


MOS Analog
Bipolar OPA

CMOS RF
Bipolar ICs

Base band
741 OPA (1996)

SPICE (1973)

1950 1960 1970 1980 1990 2000 2010

Bipolaar PMOS NMOS CMOS(Analog Mixed Signal)

From analog and digital complex systems to analog/digital integrated systems 8


Modern analog circuit technology
The modern analog circuit cannot be designed only with the
design style of the conventional analog circuit technology.
Issue of Conventional Analog Design Issue of Modern Analog Design
Analog circuit for analog Analog circuits for digital/mixed
products signal products
Analog TV, VTR, RF, Power Digital storage, Digital display, Digital
supply Circuits (e.g. Voltage communication, Network, Intelligent
regulator) home appliance,
Switching power supply
Bipolar or Bi-CMOS CMOS

Continuous time Discrete time + Continuous Time


Just Analog circuitry Analog circuitry, Signal processing,
Digital control, Error correction,
Communication Protocol ・・・
SPICE MATLAB, Verilog-AMS, Spectre/SPICE/XA
specialty of Japan, Korea USA, EU, Taiwan, Korea (Global)
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Architecture of single chip UHF transceiver
(RF signal generation) PLL DSM (Frequency control)

Other functions in Logic


(Impedance
LNA Amp., ADC Regulator Image rejection
matching) Decimator
Mixer (Analog-to- (Power
(Frequency Digital supply) Channel filter 10
conversion) conversion) Demodulator
Analog/Digital functions in the
transceiver LSI
Category Function Analog/Digital Remarks
AAF (Anti-Aliasing Filter) Band-limitation Analog feasible only in analog
SF (Smoothing Filter) Discrete time to Continuous time Analog feasible only in analog
LNA (Low Noise Amp.) Impedance matching Analog feasible only in analog
Mixer Down-conversion, Up-conversion Analog for RF signal
Digital for IF signal
Power supply circuits (e.g. Voltage regulation, DC-DC conversion, Analog
Regulator, Reference Voltage) Voltage/Current reference
ADC (Analog-to-Digital Analog-to-Digital conversion Analog + Digital
Converter)
DAC (Digital-to-Analog Digital-to-Analog conversion Analog + Digital
Converter)
PLL (Phase Locked Loop) RF Frequency Synthesize Analog or Digital
DSM (Delta-Sigma Modulator) Read out from memory cell Digital
Memory(Sens-Amplifier, Read out from memory cell Analog + Digital
Memory Cell, DLL)
Processor(DSP, MCU) Software signal processing, system control Digital

Filter Hardware signal processing Analog high speed


Digital high precision 11
Strategy of analog/digital partitioning
• Digital implementation
– The digital implementation is given priority over the analog
implementation, if the function can be implemented with a digital
circuit.
– The digital circuit can make use of a merit of the scaling.
– The specification of digital circuit can be changed easily.

• Analog implementation
– There are some functions which can not implement in the digital circuit.
• High frequency
• High sensitivity
• Continuous time processing
• Ultra low power
• Sensor integration
– System performance is influenced by the insertion point of the analog-
to-digital converter (ADC) and digital-to-analog converter (DAC).
– The accuracy of analog circuits can enhanced by digital compensation
technique. 12
Wave forms in mixed signal circuits
Continuous time Discrete time

Continuous time Discrete time


analog circuit analog circuit
Contin-
uous
value

Time domain Binary


Digital circuit
analog circuit b3
b2
b1
Discrete b0

value DSM
(Pulse width, Delay time)

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DSM: Delta-Sigma Modulation
Overview of analog design flow
Block diagram of system architecture Specification sheet for analog block
PHS PHS 規格値 設計値
DAC Wave DBP 項目 条件 単位
RFU IFU Min. Typ. Max. Min. Typ. Max.
Form I/F 電源電圧 1.8 3.3 3.5 1.8 2.1 3.3 V
GEN 消費電流 ― ― 2.2 mA
User 利得 ― 15 ― dB
Quad DSP
Mode ADC 周波数 300 426 475
Damed I/F 雑音指数(NF) ― 2 ― dB
IFU
1dBコンプレッションレベル ― 0 ― dBm
GPS GPS CLK GPS インタセプトポイント(IIP3) ― 9.6 ― dB
ADC 入力インピーダンス ― 50 ― Ω
RFU IFU GEN I/F
出力インピーダンス ― 500 ― Ω
端子間アイソレーション(OUT→IN) 20 dB
ETC ETC GPS PHS
RFU IFU Correrator I/F

ETC Demed ETC


I/F

Circuit scjematic with behavior models Transfer function or Signal flow

Circuit schematic with Transistors Layout artwork Marge to digital blocks


vdd

M15
5/2
M14
M5 M6
5/2 M8 M9
5/2 5/2
5/2 Vbias 5/2

M3 M4
10.24/2 10.24/2
3.5kΩ 0.5pF 0.5pF
Vout- Vin+ M1 M2 Vin- Vout+
8.56/2 8.56/2

M16
8/2 M10 M7 M11
8/2 8/2 8/2

M17 M18 M12 M13

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5/2 5/2 5/2 5/2
Vcm

gnd
Choice of Process technology
• CMOS (MOSFET)
– Current driving ability is rather low.
– High speed (SOI-CMOS is better for very high speed circuits)
– In the case of integration with large scale digital circuits, there is not
the choice else.
• Bipolar
– Current driving ability is high (good characteristic for power
amplifiers)
– SiGe HBT (Hetero Bipolar Transistor) can perform in high frequency.
• HEMT (High Electron Mobility Transistor)
– Very low noise (good characteristic for low noise amplifiers)
– Very high speed
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Application Spectrum
GaAs MHEMT
InP HBT, HEMT
SiGe HBT, BiCMOS
Si RF-CMOS GaAs HBT, HEMT

800MHz 2GHz 5GHz 10GHz 28GHz 77GHz

RF-Mixed Signal LSI (SiP or SoC) mill-metric-wave

GSM PDC DCS WLAN SAT WLAN SAT TV LMDS AUTO


(Local
CDMA GPS PCS 802.11b/g/n TV 802.11a/n WLAN
Multipoint RADER
ISM(海外) SAT DECT HomeRF UWB Distribution
Service)
DTTV Radio CDMA Bluetooth WLAN

MHEMT: Metamorphic HEMT 2005 ITRS


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Structure of MOSFET and Bipolar Tr.
MOSFET Bipolar Tr.

base emitter collector


source gate drain

contact L Weff
tOX WB
n-Si n-Si
p-Si
SiO2 p-Si n-Si
n-Si substrate

WE: Emitter Width


Leff
Transition frequency fT depends on Leff. Transition frequency fT depends on WB.
NOTE: The peak transition frequency of bipolar transistor also depends on the base width
WB and the base resistance (small WE is better).
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1000
Trends of operating frequency range
CMOS 11nm
16nm
High Speed Bipolar
32nm 22nm
45nm
65nm
100 130nm 90nm
Peak Transition frequency (GHz)

Bipolar
180nm

250nm
CMOS Amp., Mixer (20dB)
10
350nm
WLAN 802.11a
CMOS ADC, Small Digital
CDMA
1
Cellular Peak Transition Frequency:
The frequency for the current gain h21 = 1 (0dB)
of the transistor.
0.1
1996 2000 2004 2008 2012 2016 2020

Year ITRS 2008 18


Performance of ADC architecture
Technology front is limited by GBP of amplifier, switching speed of CMOS-
switch, and process variation of capacitance.
10G

1G
Sampling Frequency (Hz)

HDD DVD
Digital TV
100M Digital IF
VDSL
Flash Digital Camera
10M LAN
ADC Pipeline ADC
ADSL
1M
Motor Servo GSM, PDC

100k
SAR ADC Σ-Δ ADC
10k CD/MD
Celluar Phone
1k
4 6 8 10 12 14 16 18 20 22 24
Resolution (bit) 19
Advantages and disadvantages of
technology scaling
1
Integration  2
L
Performance (Log)

1
Speed  1.5 (Constant ID)
L

Signal Swing
Dynamic Range 
Noise  Mismatch

Supply voltage  L1 Gain  L


1.5

Scaling
1/(Design Rule) (Log)
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Figure of merit (FOM) of analog
circuits
• Before ITRS2004 edition: G  IIP3  f
FOM LNA 
FOM was defined for each category ( NF  1)  P
2
of circuits.  f0  1
FOM VCO   
– LNA: Low noise amplifier  f  L{f }  P
– VCO: Voltage controlled
oscillator FOMPA  Pout  Gp  PAE f 2
– PA: Power amplifier
(2 ENOB0 )  f S
– ADC: Analog-to-Digital FOM ADC 
converter P
P : Power consumption
• After ITRS2005 edition: IIP3: Third Order Input Intercept Point
NF : Noise figure
fT, fmax, NFmin, s(VT) is a successor of L: Spurious power
the FOM of analog circuit trend, PAE: Power efficiency
ENOB0: Effective number of bits
fS : Sampling frequency
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Quiz: Speed = Accuracy = Gain?
Effective Number of Bits for Oversampling ADC
M
SNRmax [dB]  6.02  N  1.76  20  log[ ]  (20  M  10) log OSR
2  M 1
fS Sampling frequency fS
OSR 
2 f0
Maximum frequency of signal fo

Equivalent gain for LSB

1(bit )  6.02(dB)

Why is the increment of 1bit equivalent with the


amplification of 6dB (2 times)? 22
Suggested answer
Maximum number of N-bit binary code = 2N -1
Dynamic range of N-bit binary code system = (2N -1)/1
Maximum number of (N+1)-bit binary code = 2*2N -1
Dynamic range of (N+1)-bit binary code system = (2*2N -1)/1
Then, the amplitude of signal that is equivalent for the
differential dynamic range between (N+1)-bit and N bit
system is comparable to (2*2N -1)/ (2N -1) ≒ 2 ≒ 6.02[dB]

Note that this calculation is made on a condition of M = 0


(no noise shaping) and OSR = 1 (no oversampling). More
precise analysis is shown in next slide.
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Effect of noise shaping and
oversampling
SNR for quantization noise and ENOB of oversampling conversion
M
SNRmax [dB]  6.02  N  1.76  20  log[ ]  (20  M  10) log OSR
2  M 1
1 M
ENOB[bit ]  1  [(20  M  10) log OSR  20 log( )]
6.02 2  M 1
M : Order of noise shaping transfer function
OSR: Oversampling ratio
Example
Speed Accuracy Gain
M = 0, OSR = 128, then ENOB = 4.5[bit], ΔSNRmax = 27[dB]
M = 1, OSR = 128, then ENOB = 10.6[bit], ΔSNRmax = 64[dB]
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