Output to Monitor:

When monitor is ready to display another character:

 The ready bit DSR[15] is set to 1

When data is written to DDR:

• DSR[15] is set to 0
• Character in DDR[7:0] is displayed
• Any other character data written to DDR is ignored

Basic Output Routine

I/O Bus and Interface Modules:

 Input-output device attached to the computer are also called peripherals.

 A typical communication link between the processor and several peripherals is shown in
figure.
 The I/O bus consists of data lines, address lines, and control lines.
 Each peripheral device has associated with it an interface unit.
 The I/O bus from the processor is attached to all peripheral interfaces.
 To communicate with a particular device, the processor places a device address on the
address lines.
 Each interface attached to the I/O bus contains an address decoder that monitors the
address lines.
 When the interface detects its own address, it activates the path between the bus lines
and the peripherals.
 All peripherals whose address does not correspond to the address in the bus are disabled
by their interface.
 A control command (read/write) is issued to activate the peripheral and to inform it what to
do.
 The interface responds to the address and command and transfers the information from
the data bus to the processor.

Two types of addressing are possible

In addition to communicating with I/O the processor communicates with memory. There are
three ways that computer buses can be used to communicate with memory and I/O.

1. Use two separate buses, one for memory and other for I/O.
2. Use one common bus for both memory and I/O but having separate control lines for each
(Isolated or I/O mapped I/O)
3. Use one common bus for both memory and I/O with common control lines. (memory
mapped I/O)

Isolated or I/O mapped I/O:

 Isolated I/O uses one common bus to transfer information between memory and I/O.
 The distinction between a memory transfer and I/O transfer is made through separate read
and write lines.
 The CPU specifies whether the address on the address lines is for a memory or for a I/O by
using separate read or write control lines.
 I/O read and I/O write control commands are used for I/O transfer and memory read and
memory write control commands are used for memory transfer.
 Process:
I. The CPU places an address on to the address line.
II. The CPU sends the commands on to the control line as i/o read or I/o write to
communicate with I/O or memory read or memory write to communicate with a
memory.
III. Based on the command passed by the CPU data will be transferred between
(peripherals and CPU) or (CPU and memory)
Memory mapped I/O

• There is a single address space for memory locations and I/O devices

• The processor treats the status and address register of the I/O modules as memory
location and the same machine instructions are used to access both memory and I/O
devices.

• Since I/O devices are included in the same memory address space, so the status and
address registers of I/O modules are treated as memory location by the processor.
Therefore, the same machine instructions are used to access both memory and I/O
devices.

Data Transfer:
1. Synchronous: All devices derive the timing information from common clock line.

2. Asynchronous: No common clock and it requires control signals

1. Strobe Pulse

2. Handshaking
 Strobe Control
 The Strobe control method of asynchronous data transfer employs a single control
line to time each transfer.
1. Source-initiated strobe for data transfer
2. Destination-initiated strobe for data transfer
 The strobe may be activated by either the source or the destination unit. Figure shows
a source-initiated transfer.
 The data bus carries the binary information from source unit to the destination unit.
 The strobe is a single line that informs the destination unit when a valid data word is
available in the bus.
 The source unit first places the data on the data bus.
 After a delay to ensure that the data settle to a steady value, the source activates the
strobe pulse.
 The information on the data bus and the strobe signal remain in the active state for a
sufficient time period to allow the destination unit to receive the data.
 The source removes the data from the bus a brief period after it disables its strobe
pulse.

 The disadvantage of the strobe method is that the source unit that initiates the transfer
has no way of knowing whether the destination unit has actually received the data item
that was placed in the bus.
Handshaking:
 The handshake method solves the problem of Strobe method by introducing a second
control signal that provides a reply to the unit that initiates the transfer.

1. Source-initiated transfer using handshaking

 The source unit places a data on to the data bus.
 After some delay it will activate the data valid line as 1, indicates that data already
present on the data bus.
 After receiving the data from the data bus the destination unit sends data accepted
message back. It indicates that data reached safely.

2. Destination-initiated transfer using handshaking