Escolar Documentos
Profissional Documentos
Cultura Documentos
8CA Series
Specification Features:
• Working Peak Reverse Voltage Range – 5.8 V to 214 V
• Peak Power – 1500 Watts @ 1 ms
• ESD Rating of Class 3 (>16 KV) per Human Body Model
• Maximum Clamp Voltage @ Peak Pulse Current AXIAL LEAD
• Low Leakage < 5 µA above 10 V
CASE 41A
PLASTIC
• UL 497B for Isolated Loop Circuit Protection
• Response Time is typically < 1 ns
Mechanical Characteristics: L
1N6
CASE: Void-free, transfer-molded, thermosetting plastic xxxCA
1.5KE
FINISH: All external surfaces are corrosion resistant and leads are xxxCA
YYWW
readily solderable
MAXIMUM LEAD TEMPERATURE FOR SOLDERING PURPOSES:
L = Assembly Location
230°C, 1/16″ from the case for 10 seconds 1N6xxxCA = JEDEC Device Code
POLARITY: Cathode band does not imply polarity 1.5KExxxCA = ON Device Code
MOUNTING POSITION: Any YY = Year
WW = Work Week
MAXIMUM RATINGS
Rating Symbol Value Unit
Peak Power Dissipation (Note 1.) PPK 1500 Watts ORDERING INFORMATION
@ TL ≤ 25°C
Device Packaging Shipping
Steady State Power Dissipation PD 5.0 Watts
@ TL ≤ 75°C, Lead Length = 3/8″ 1.5KExxCA Axial Lead 500 Units/Box
Derated above TL = 75°C 20 mW/°C
1.5KExxCARL4 Axial Lead 1500/Tape & Reel
Thermal Resistance, Junction–to–Lead RJL 20 °C/W
Operating and Storage TJ, Tstg – 65 to °C
Temperature Range +175
1. Nonrepetitive current pulse per Figure 4 and derated above TA = 25°C per
Figure 2.
*Please see 1N6267A to 1N6306A (1.5KE6.8A – 1.5KE250A)
for Unidirectional Devices
ELECTRICAL CHARACTERISTICS
I
(TA = 25°C unless otherwise noted) IPP
Symbol Parameter
IPP Maximum Reverse Peak Pulse Current
IT
VC Clamping Voltage @ IPP VC VBR VRWM IR
V
IR V
VRWM Working Peak Reverse Voltage IT RWM VBR VC
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1.5KE6.8CA Series
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1.5KE6.8CA Series
100
SHOWN IN FIGURE 4
100
10 80
60
40
20
1 0
0.1 µs 1 µs 10 µs 100 µs 1 ms 10 ms 0 25 50 75 100 125 150 175 200
tP, PULSE WIDTH TA, AMBIENT TEMPERATURE (C)
4 IPP
HALF VALUE –
3 2
50
2
tP
1
0 0
0 25 50 75 100 125 150 175 200 0 1 2 3 4
TL, LEAD TEMPERATURE (C) t, TIME (ms)
200 200 75 V
100 100
50 50
20 20 180 V
10 10 120 V
5 5
2 2
1 1
0.3 0.5 0.7 1 2 3 5 7 10 20 30 0.3 0.5 0.7 1 2 3 5 7 10 20 30
∆VBR, INSTANTANEOUS INCREASE IN VBR ∆VBR, INSTANTANEOUS INCREASE IN VBR
ABOVE VBR(NOM) (VOLTS) ABOVE VBR(NOM) (VOLTS)
Figure 5. Dynamic Impedance
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1.5KE6.8CA Series
1
0.7
0.5
0.3
DERATING FACTOR
0.2
PULSE WIDTH
10 ms
0.1
0.07
0.05
1 ms
0.03
0.02 100 µs
10 µs
0.01
0.1 0.2 0.5 1 2 5 10 20 50 100
D, DUTY CYCLE (%)
Figure 6. Typical Derating Factor for Duty Cycle
APPLICATION NOTES
RESPONSE TIME circuit layout, minimum lead lengths and placing the
In most applications, the transient suppressor device is suppressor device as close as possible to the equipment or
placed in parallel with the equipment or component to be components to be protected will minimize this overshoot.
protected. In this situation, there is a time delay associated Some input impedance represented by Zin is essential to
with the capacitance of the device and an overshoot prevent overstress of the protection device. This impedance
condition associated with the inductance of the device and should be as high as possible, without restricting the circuit
the inductance of the connection method. The capacitance operation.
effect is of minor importance in the parallel protection DUTY CYCLE DERATING
scheme because it only produces a time delay in the The data of Figure 1 applies for non-repetitive conditions
transition from the operating voltage to the clamp voltage as and at a lead temperature of 25°C. If the duty cycle increases,
shown in Figure 7. the peak power must be reduced as indicated by the curves
The inductive effects in the device are due to actual of Figure 6. Average power must be derated as the lead or
turn-on time (time required for the device to go from zero ambient temperature rises above 25°C. The average power
current to full current) and lead inductance. This inductive derating curve normally given on data sheets may be
effect produces an overshoot in the voltage across the normalized and used for this purpose.
equipment or component being protected as shown in At first glance the derating curves of Figure 6 appear to be
Figure 8. Minimizing this overshoot is very important in the in error as the 10 ms pulse has a higher derating factor than
application, since the main purpose for adding a transient the 10 µs pulse. However, when the derating factor for a
suppressor is to clamp voltage spikes. These devices have given pulse of Figure 6 is multiplied by the peak power value
excellent response time, typically in the picosecond range of Figure 1 for the same pulse, the results follow the
and negligible inductance. However, external inductive expected trend.
effects could produce unacceptable overshoot. Proper
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1.5KE6.8CA Series
Zin
Vin LOAD VL
Vin (TRANSIENT)
OVERSHOOT DUE TO
V Vin (TRANSIENT) V INDUCTIVE EFFECTS
VL
VL
Vin
td
Figure 7. Figure 8.
UL RECOGNITION*
The entire series has Underwriters Laboratory Conditioning, Temperature test, Dielectric Voltage-
Recognition for the classification of protectors (QVGV2) Withstand test, Discharge test and several more.
under the UL standard for safety 497B and File #116110. Whereas, some competitors have only passed a
Many competitors only have one or two devices recognized flammability test for the package material, we have been
or have recognition in a non-protective category. Some recognized for much more to be included in their Protector
competitors have no recognition at all. With the UL497B category.
recognition, our parts successfully passed several tests
including Strike Voltage Breakdown test, Endurance *Applies to 1.5KE6.8CA – 1.5KE250CA
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1.5KE6.8CA Series
OUTLINE DIMENSIONS
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
D Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. LEAD FINISH AND DIAMETER UNCONTROLLED
IN DIMENSION P.
4. 041A-01 THRU 041A-03 OBSOLETE, NEW
STANDARD 041A-04.
K
P INCHES MILLIMETERS
DIM MIN MAX MIN MAX
A 0.335 0.374 8.50 9.50
P B 0.189 0.209 4.80 5.30
A D 0.038 0.042 0.96 1.06
K 1.000 --- 25.40 ---
P --- 0.050 --- 1.27
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1.5KE6.8CA Series
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
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attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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