CAS : What is it all about ?

If You are a serious buyer of memory ,there are many facts which you need to look into ?
Quality ,manufacturer , confifuration details etc .Another fact ,which many manufacturers
Talk about , is cas latency .
Lantency is very important if you are a power user & RAM manufacturer are quite
upbeat about the terms CAS Lantency , CAS , & CAS & does advertis about them with
great enthusiam .
They make it sound like CAS2 is a huge improvement over CAS3 . Is it mainly
hype ? For that matter , what is CAS ?
Simply put , CAS Lantency is a number that refers to the ratio – rounded to the
next higher whole number – between coloumn access time & the clock cycle time .
It is derived from dividing the column access time by the clock frequency , &
raising the result to the next whole number . This formula is :
CL >= tCAC / tCLK
Where :

* CL is CAS Latency.
* tCAC is Column Access Time .
* tCLK is Length of Clock Cycle .
For example , if tge tCAC is 20 nanoseconds & the tCLK is 10 ns. [ as with a 100 Mhz .
bus ] , then the CL must be 2 . However , if tCAC is 25 ns., then CL must be 3, Since
25/10 = 2.5.

SDRAM Basics
So, what does all this mean ? To understand , we need to get into other memory timing
factors.First , an introduction to a few more terms :
 RAS* - Row Access Strobe.
 CAS* - Colum Access Strobe.
 tRCD - Time between RAS & CAS access.
 tRP - Time to switch between memory banks.
 tAC - Time to prepare for output.
 RAS & CAS are normally written with a line across the top.
The SDRAM basics fo hoe data is transferred from memory to the CPU are as follows :
1. The CPU sends a signal specifying the memory row & bank that it wants to access.
2. After a specific period of time [ tRCD ] the CPU sends a signal on the CAS line,
specifying the column it wants to access .
3. After tCAC [ column access time ] the data moves to the output line, from where it is
transferred with the next clock trick .
4. The CPU expects the data to appear upon a specific clock tick after sending the requst
In PC100 SDRAM,this process takes about 50 ns.for the first transfer . However , in brust
mode it takes only one clock cycle for the next three ,or if a different column is required,
The time required, by tCAC [ CAS Latency ]
CAS Latency Specifies

To keep things as simple as possible,the clock cycle referred

tCAS = 25 ns. 25 / 10 = 2.5 - round up to 3
tRP = 20 ns. 20 / 10 = 2 3 - 2 - 2
tRCD = 20 ns. 20 / 10 = 2

To in this article [ unless otherwise specified ] is based on a 100 meghahertz bus.

tCAS = 25 ns. 25 / 7.5 = 3.33 - round up to 4
tRP = 20 ns. 20 / 7.5 = 2.67 - round up to 3 4 - 3 -3
tRCD = 20 ns. 20 / 7.5 = 2.67 - round up to 3

Since the clock cycle is the inverse of the bus speed, it is defined here as 10 nanoseconds.
On a 100 Mhz . bus data transfer takes about 2 ns.
According to specification, tAC is 6ns.It takes about 2 ns. Ofr the signal to stabilise.
6 ns. [ tAC ] + 2 [ Stabilization time ] = 8 ns.
8 ns. + 2 ns. [ transfer time ] = 10 ns = 1 clock tick.
Thus,in burst mode [ the three data transfer after the first one requiring 50ns. ] data
can be transferred in one clock cycle.
Often, SDRAM modules are defined by three numbers,such as 2-2-2 or 3-2-2 . The
first number refers to CAS Latency, the second to tRP, & the third to tRCD.
Note that these numbers mean different things for different bus speeds .
Following is an example of calculating these numbers for 100Mhz . [1 clock cycle=10ns]
However, if these figures were calculated at 133 Mhz [1 clock cycle=7.5ns] the results
would be :
As you can see, the second example would not be vaild in a 133 Mhz . system,as a
cas Latency of 4 is not allowed in the SDRAM specification .
With all the hype about CAS Latency,usually written as CAS2 or CAS3,just how
important is it ? In general , the importance is nominal . CAS3 means,at 100 Mhz.,that
the amount of time required for the first memory access in a burst is increased by less
than 10ns.Divide that by 4,to average the increased time across four bursts, & you have
an improvement of less than 2.5ns.over CAS2 . However, if you are considering
overlocking the bus , then it colud be critical .

CAS Lantency and Overclocking

To overclock the bus, You must be sure that the memory can handle it.In this case,you
must be sure that the memory can handle it.In this case,you’ll need to make assumptions
about tCAC,unless the manufacturer provides it,which is highly unlikely.
You can,however,infer it from tCLK,as defined by the bus speed,and the CAS
Latency of 2 on a 66 MHz . Board
 1 / 66,000,000 hz. = 15.1 ns.
 CL > = tCAC / tCLK
 2 > = Tcas / 15.1ns.
 tCAC < = 30.2 ns.
Because the SDRAM specification calls for a maximum CAS Latency of 3 , the worst-
case scenario for overclocking to 83 MHz. is :
 1 / 83,000,000 hz. = 12.0 ns.
 3 > = tCAC / 12.0 ns.
 tCAC < = 36.0 ns.
Thus, in this example, the difference between the slowest possible column access time,
30.2 ns., & the maximum time allowed by the SDRAM specification,36.0 ns., is 5.8 ns.
Obviously,this isn’t a large gap.
If a reputable manufacturer which can generally be determind by whether the name is
stamped on the module – makes the memory module then the odds that it is
overclockable from 66 MHz.to 83 Mhz. are good.
Of coruse, if you can get the tCAC from the manufacturer,you can be certain .

How does CAS work ?

To understand this let’s walk through a simplified versionof how the memory controller
actually reads the memory.
First, the chip set accesses the ROW of the memory matrix by putting an address on
the memory’s address pins & activating the RAS signal.
Then,we have to wait a few clock cycle [ known as RAS-to-CAS Delay ] Then, ht
column address pins, and the CAS signal is activated,to access the correct COLUMN of
the memory matrix.Then, we wait a few clock cycles --
THIS IS KNOWN AS CAS LATENCY ! – and then the data appears on the pins of
the RAM.
So,for CAS-2you wait 2 clock cycle and for CAS-3 you wait 3 clock cycle ?
Not so fast ! There are a LOT of other factors in the memory performance.Here are a few
of the main ones :
 Sometimes you have to move to a different row in memory.This means activating
RAS,waiting RAS-to-CAS delay,then doing the CAS latency thing .
 Other times, you do a “burst”read,when you pull in a lot of data in one big block.In
that case,CAS is only activated ONCE,at the beginning of the burst.
 Also, don’t forget the most important thing : processors have big caches ! The cache
is where the processor stores recently accesed instructiona & data .The cache
“ hit rate ”,i.e.,the percentage of times the processor finds the information it needs in
its own cache, is typicaly greater than 95 % !
What’s the bottom line ?
So, the bottom line is , moving from CAS-3 to CAS-2 will offer a percentage
performance increase in the low single digits for most applications. Programs which are
known to be memory intensive [ you gramers might know of some … ] will see the best
improvement.
The other thing to keep in mind is that CAS-2 memory will run FASTER [ some review
sits have taken it to 160 MHz ! ] than CAS-3 memory.
So, if you’re thinking of over clocking your system [ now or in the future ] , CAS-2
is your best bet for speed & stability.
What is typically the price difference ?
The price difference between these memory modules is not significant due to the
excessive competition in the market.