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PWA FP381, PWB DY483,


JM7-INTEGRATED SCHEM UW474.
A
JM7 M/B PCB
VER : 1A A

POWER SYSTEM POWER


PG 44 Merom CLOCK
RESET CIRCUIT CK410M+LP
(478 Micro-FCPGA) REGULATOR PG 48
BATT +1.5V_RUN/+1.05V_VCCP CPU VR PG 51
PG 45 PG 3,4
SELECTOR
REGULATOR PG 49 PG 17
BATT (Symbol Rev.09) +1.8V_SUS/+1.25V_RUN DC/DC PG 52
PG 46 /+0.9V_DDR_VTT
AC/BATT CHARGER +3.3V_ALW/+5V_ALW/+15V_ALW
CONNECTOR
RUN POWER SW PG 53
PG 54 +3.3V_SUS/+5V_SUS
667/800 MHz FSB
+5V/+3.3V/+1.8V
LVDS
Panel Connector PG 24

Crestline SDVO SI1362


DDR2-SODIMM1 533/667 MHZ DDR II
B
1299 uFCBGA PG 18 B

PG 15,16 TVOUT
PG 5,6,7,8,9,10
VGA CRT CONN.
533/667 MHZ DDR II
DDR2-SODIMM2 PG 25
(Symbol Rev.09)
PG 15,16
USB2.0 (P0,P1) (EXT SIDE)
POWER USB & USB
USB2.0 (P2,P3) (EXT BACK)
IDE PG 33
Internal Media Bay DMI interface USB2.0 (P8)
33MHz PCI
CD-ROM PG 26 Q-SWITCH
USB1.0 SATA - HDD SATA PCIEx1 CARDBUS/1394 PG 42 DOCKING
PG 26 ICH8-M USB2.0 (P6)
SMART CARD OZ711EZ1TN CONNECTOR
USB2.0 (P4) PCIEx2
OZ77CR6LN 676 BGA PG 27
USB2.0 (P9)
PG 28 PG 43
IHDA PG 11,12,13,14 USB2.0 (P7) EXPRESS-CARD
C R5538 C

MINI-CARD PG 28
AUDIO/AMP MDC
(Symbol Rev.09) WLAN
PG 38,39 PG 30 PG 29
USB2.0 (P5) Biometric MINI-CARD
PG 35 WWAN
LPC PCIEx1
SPI PG 29
Bluetooth
S/PDIF Audio RJ11 Tip
for Dock Jacks for Dock Ring PG 35
PG 43 PG 39 PG 43 PG 30 SIO SIO
MEC5025 ECE5018 BCM5755M E-Switch RJ45/Magnetics
PI3L500
128KB Flash BC Expander /BCM5752 +3.3V_LAN
Keyboard ECE1077 BC TMKBC USB 2.0 Hub(4) PG 41
Controllor PG 40 PG 41
PG 34 128 Pins VTQFP 128 Pins VTQFP
DOCK LPC
PG 31 PG 32
D D

SPI PS/2
USER Keyboard Touchpad/ Serial Port IrDA FAN & THERMAL QUANTA
FLASH
INTERFACE Stick point EMC4001
Title
COMPUTER
PG 36 PG 36 PG 34 PG 35 PG 33 PG 35 PG 37 Schematic Block Diagram1

Size Document Number Rev


JM7 1A

Date: Monday, June 26, 2006 Sheet 1 of 57


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1 2 3 4 5 6 7 8

INDEX Power States


Control S3/ S4/ S5/
Pg# Description Power Rail S0/M0 S3/M1 S3/M1 S4/M1
Signal M-off M-off M-off
1 Schematic Block Diagram
2 Front Page +3.3V_ALW
3-4 Merom
+5V_ALW
5-10 Crestline
A 11-14 ICH8M +3.3V_LAN A

15-16 DDRII SO-DIMM(200P)


17 Clock Generator
18-23 VGA
24 LCD Conn. & SSP
+1.8V_SUS
25 CRT Conn
26 SATA & IDE Conn +0.9V_DDR_VTT
27 PCCARD/Conn & 1394
+5V_SUS
28 Express Card & Smart Card
29 Mini Card +3.3V_SUS
30 MDC Conn.
+5V_RUN
31 SIO (MEC5025)
32 SIO (MEC5018) +3.3V_RUN
33 SERIAL PORT & USB
+1.8V_RUN
34 Flash ROM, RTC & ECE1077
B 35 TP,BT & FIR +1.25V_RUN B

36 Switch,Keyboard & LED


+1.5V_RUN
37 FAN & Thermal
38-39 Audio CODEC(STAC9205)/Phone Jack +1.05V_VCCP
40-41 LOM (Nineveh)/Switch
VCC_VCRE
42-43 Docking Conn/Q-Switch
44 System Reset Circuit +LCDVCC
45-46 Battery Selector & Charger
+5V_MOD
47 DDR2_1.8VSUS, 0.9V
48 1.5VSUS,1.05V(VTT)
49 VGA DC/DC,1.25V,1.05V
50 CPU_MAX8786(3phase)
51 D/D Power
52 RUN Power Switch
53 DCIN,Batt
C C
54 PAD& SCREW
55 EMI CAP
56 SMBUS BLOCK

D D

QUANTA
Title
COMPUTER
Index & Power Status

Size Document Number Rev


JM7 1A

Date: Monday, June 26, 2006 Sheet 2 of 57


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1 2 3 4 5 6 7 8

H_A#[3..16] U6A H_D#[0..63] U6B H_D#[0..63]


5 H_A#[3..16] 5 H_D#[0..63] H_D#[0..63] 5
H_A#3 J4 H1 H_D#0 E22 Y22 H_D#32
A[3]# ADS# H_ADS# 5 D[0]# D[32]#
H_A#4 L5 E2 H_D#1 F24 AB24 H_D#33
A[4]# BNR# H_BNR# 5 D[1]# D[33]#
H_A#5 L4 G5 H_D#2 E26 V24 H_D#34
A[5]# BPRI# H_BPRI# 5 D[2]# D[34]#
H_A#6 K5 H_D#3 G22 V26 H_D#35
H_A#7 A[6]# H_D#4 D[3]# D[35]# H_D#36
M3 A[7]# DEFER# H5 H_DEFER# 5 F23 D[4]# D[36]# V23
H_A#8 N2 F21 H_D#5 G25 T22 H_D#37
A[8]# DRDY# H_DRDY# 5 D[5]# D[37]#
H_A#9 J1 E1 H_D#6 E25 U25 H_D#38
A[9]# DBSY# H_DBSY# 5 D[6]# D[38]#
H_A#10 N3 +1.05V_VCCP H_D#7 E23 U23 H_D#39
A[10]# H_BR0# 5 D[7]# D[39]#

ADDR GROUP 0

DATA GRP 0
DATA GRP 2
H_A#11 P5 F1 Layout Note: H_D#8 K24 Y25 H_D#40
H_A#12 A[11]# BR0# R352 56 H_D#9 D[8]# D[40]# H_D#41
P2 A[12]# Place R646 G24 D[9]# D[41]# W22

1
H_A#13 L2 D20 H_IERR# 1 2 H_D#10 J24 Y23 H_D#42

CONTROL
A A[13]# IERR# +1.05V_VCCP close to D[10]# D[42]# A
H_A#14 P4 B3 R356 H_D#11 J23 W24 H_D#43
A[14]# INIT# H_INIT# 11 D[11]# D[43]#
H_A#15 P1 A[15]#
51/F_NC CPU. H_D#12 H22 D[12]# D[44]# W25 H_D#44
H_A#16 R1 H4 H_D#13 F26 AA23 H_D#45
A[16]# LOCK# H_LOCK# 5 D[13]# D[45]#
M1 H_D#14 K22 AA24 H_D#46
5 H_ADSTB#0

2
H_REQ#[0..4] ADSTB[0]# H_RESET# H_D#15 D[14]# D[46]# H_D#47
5 H_REQ#[0..4] RESET# C1 H_RESET# 5 H23 D[15]# D[47]# AB25
H_REQ#0 K3 F3 J26 Y26
REQ[0]# RS[0]# H_RS#0 5 5 H_DSTBN#0 DSTBN[0]# DSTBN[2]# H_DSTBN#2 5
H_REQ#1 H2 F4 H26 AA26
REQ[1]# RS[1]# H_RS#1 5 5 H_DSTBP#0 DSTBP[0]# DSTBP[2]# H_DSTBP#2 5
H_REQ#2 K2 G3 H25 U22
REQ[2]# RS[2]# H_RS#2 5 5 H_DINV#0 DINV[0]# DINV[2]# H_DINV#2 5
H_REQ#3 J3 G2
REQ[3]# TRDY# H_TRDY# 5 H_D#[0..63] H_D#[0..63]
H_REQ#4 L1
H_A#[17..35] REQ[4]# 5 H_D#[0..63] H_D#[0..63] 5
G6 H_D#16 N22 AE24 H_D#48
5 H_A#[17..35] HIT# H_HIT# 5 D[16]# D[48]#
H_A#17 Y2 E4 H_D#17 K25 AD24 H_D#49
A[17]# HITM# H_HITM# 5 D[17]# D[49]#
H_A#18 U5 H_D#18 P26 AA21 H_D#50
H_A#19 A[18]# ITP_BPM#0 H_D#19 D[18]# D[50]# H_D#51
R3 A[19]# BPM[0]# AD4 R23 D[19]# D[51]# AB22
H_A#20 W6 AD3 ITP_BPM#1 Layout Note: H_D#20 L23 AB21 H_D#52
A[20]# BPM[1]# D[20]# D[52]#

ADDR GROUP 1
H_A#21 U4 AD1 ITP_BPM#2 H_D#21 M24 AC26 H_D#53

XDP/ITP SIGNALS
H_A#22 A[21]# BPM[2]# ITP_BPM#3
Place voltage H_D#22 D[21]# D[53]# H_D#54
Y5 A[22]# BPM[3]# AC4 L22 D[22]# D[54]# AD20
divider within

DATA GRP 1
DATA GRP 3
H_A#23 U1 AC2 ITP_BPM#4 H_D#23 M23 AE22 H_D#55
H_A#24 A[23]# PRDY# ITP_BPM#5 0.5" of GTLREF H_D#24 D[23]# D[55]# H_D#56
R4 A[24]# PREQ# AC1 P25 D[24]# D[56]# AF23
H_A#25 T5 AC5 ITP_TCK pin H_D#25 P23 AC25 H_D#57
H_A#26 A[25]# TCK ITP_TDI H_D#26 D[25]# D[57]# H_D#58
T3 A[26]# TDI AA6 P22 D[26]# D[58]# AE21
H_A#27 W2 AB3 ITP_TDO H_D#27 T24 AD21 H_D#59
H_A#28 A[27]# TDO ITP_TMS +1.05V_VCCP H_D#28 D[27]# D[59]# H_D#60
W5 A[28]# TMS AB5 R24 D[28]# D[60]# AC22
H_A#29 Y4 AB6 ITP_TRST# H_D#29 L25 AD23 H_D#61
H_A#30 A[29]# TRST# ITP_DBRESET# H_D#30 D[29]# D[61]# H_D#62
U2 A[30]# DBR# C20 ITP_DBRESET# 13,31 T25 D[30]# D[62]# AF22

2
H_A#31 V4 H_D#31 N25 AC23 H_D#63
H_A#32 A[31]# R353 56 R339 D[31]# D[63]#
W3 A[32]# 5 H_DSTBN#1 L26 DSTBN[1]# DSTBN[3]# AE25 H_DSTBN#3 5
H_A#33 AA4 THERMAL 2 1 +1.05V_VCCP 1K/F M26 AF24
A[33]# 5 H_DSTBP#1 DSTBP[1]# DSTBP[3]# H_DSTBP#3 5
H_A#34 AB2 N24 AC20
A[34]# 5 H_DINV#1 DINV[1]# DINV[3]# H_DINV#3 5
B H_A#35 AA3 D21 H_PROCHOT# B
PAD T44

1
A[35]# PROCHOT# H_THERMDA V_CPU_GTLREF AD26 COMP0
5 H_ADSTB#1 V1 ADSTB[1]# THERMDA A24 H_THERMDA 37 GTLREF COMP[0] R26 Note:
B25 H_THERMDC CPU_TEST1 C23 MISC COMP[1] U26 COMP1 H_DPRTSTP need to daisy chain
THERMDC H_THERMDC 37 TEST1

2
A6 CPU_TEST2 D25 AA1 COMP2
11 H_A20M# A20M# TEST2 COMP[2] from ICH8 to IMVP6 to CPU.
A5 C7 H_THERMTRIP# CPU_TEST3 C24 Y1 COMP3
11 H_FERR# FERR# THERMTRIP# H_THERMTRIP# 37 TEST3 COMP[3]
ICH

C4 R360 56 R338 CPU_TEST4 AF26


11 H_IGNNE# IGNNE# TEST4
1 2 +1.05V_VCCP 2K/F CPU_TEST5 AF1 E5
TEST5 DPRSTP# H_DPRSTP# 6,11,51
D5 H CLK CPU_TEST6 A26 B5
11 H_STPCLK# H_DPSLP# 11

1
STPCLK# TEST6 DPSLP#
11 H_INTR C6 LINT0 DPWR# D24 H_DPWR# 5
11 H_NMI B4 LINT1 BCLK[0] A22 CLK_CPU_BCLK 17 6,17 CPU_MCH_BSEL0 B22 BSEL[0] PWRGOOD D6 H_PWRGOOD 11
11 H_SMI# A3 SMI# BCLK[1] A21 CLK_CPU_BCLK# 17 6,17 CPU_MCH_BSEL1 B23 BSEL[1] SLP# D7 H_CPUSLP# 5
6,17 CPU_MCH_BSEL2 C21 BSEL[2] PSI# AE6 H_PSI# 51
M4 RSVD[01]
N5 Merom Ball-out Rev 1a
RSVD[02] C101
T2 RSVD[03] Voltage Level shift
V3 H_THERMDA 1 2 H_THERMDC
RSVD[04]
RESERVED

B2 +1.05V_VCCP +3.3V_ALW
RSVD[05] 2200P/50V_NC CPU_TEST3
C3 RSVD[06] PAD T7
D2 PAD T42 CPU_TEST5
RSVD[07]

2
D22 R358 1K/F_NC
RSVD[08] CPU_TEST1
D3 RSVD[09] 1 2 For the purpose of testability, route these signals
F6 R351 R355 1K/F_NC through a ground referenced Z0 = 55ohm trace that
RSVD[10] 2.2K_NC CPU_TEST2
1 2
ends in a via that is near a GND via and is

2
Q57 C401 0.1U/10V_NC

1
2 1 CPU_TEST4 accessible through an oscilloscope connection.
Merom Ball-out Rev 1a H_PROCHOT# 1 3 R357 0_NC
CPU_PROCHOT# 31
1 2 CPU_TEST6

2N7002W-7-F_NC
C
Place C close to the FSB BCLK BSEL2 BSEL1 BSEL0 C
CPU_TEST4 pin. Make sure
CPU_TEST4 routing is 533 133 0 0 1
Populate ITP700Flex for bringup reference to GND and away 667 166 0 1 1
from other noisy signal.
+1.05V_VCCP 800 200 0 1 0
Layout Note:
Place couple 0.1uF Decoupling COMP0
caps with in 0.1" ITP connector.
1

COMP1
R9 R7 R3 R2 COMP2
51/F 51 39/F 150 +1.05V_VCCP +3.3V_ALW COMP3
ITP700 layout guidelines
JITP1 C3 0.1U/10V
2

2
2 1 Signal Resistor Value Connect To Resistor Placement
ITP_TDI 1 27 R344 R343 R347 R350
ITP_TMS TDI VTT0 C2 0.1U/10V 54.9/F 27.4/F 54.9/F 27.4/F
2 TMS VTT1 28 TDI 150 ohm ± 5% VCCP Place the pull-up near CPU
ITP_TCK 5 26 2 1
ITP_TDO R6 1 TCK VTAP
2 0 7 TMS 39 ohm ± 1% VCCP Within 200ps of ITP connector

1
ITP_TRST# TDO
3 TRST#
500 to 680
R8 22.6/F R10 150 TRST# ohm ± 5% GND Place the pull-down near CPU Comp0,2 connect with Zo=27.4ohm,Comp1,3
H_RESET# 1 2 12 25 ITP_DBRESET# 2 1 connect with Zo=55ohm, make those traces
RESET# DBR#
Layout Note: DBA# 24 Connect to TCK pin of CPU and then length shorter than 0.5".Trace should be
ITP_TCK
Place R8 close ITP. connect it to FBO pin of ITP connector at least 25 mils away from any other
11 FBO
TCK 27 ohm ± 1% GND in daisy chain. Place the pull-down toggling signal.
17 CLK_CPU_ITP# 8 BCLKN
near TCK0 pin of ITP connector
D 9 23 ITP_BPM#0 D
17 CLK_CPU_ITP BCLKP BPM0#
21 ITP_BPM#1 TDO 51 ohm ± 5% VCCP Place the pull-up near ITP
BPM1# ITP_BPM#2
BPM2# 19
10 17 ITP_BPM#3 Connect to CPURST# pin of GMCH through
R5 27/F
14
16
GND0
GND1
BPM3#
BPM4# 15
13
ITP_BPM#4
ITP_BPM#5
22.6 ohm ± 1%
series resistor
the series resistor placed within QUANTA
ITP_TCK GND2 BPM5# 200ps of ITP connector. Place the
2

R4
1

649/F
18
20
22
GND3
GND4
NC0
NC1
4
6
29
RESET# and pullup 51
ohm ± 1%.
VCCP
pull-up after the series resistor from
Title
COMPUTER
GND5 GND_0 ITP connector.
2 1 ITP_TRST# 30 Merom Processor (HOST BUS)
GND_1
ITP700Flex_NC Size Document Number Rev
JM7 1A

Date: Wednesday, June 28, 2006 Sheet 3 of 57


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1 2 3 4 5 6 7 8

+VCC_CORE +VCC_CORE U6D


U6C A4 P6
VSS[001] VSS[082]
A7 VCC[001] VCC[068] AB20 A8 VSS[002] VSS[083] P21
A9 VCC[002] VCC[069] AB7 A11 VSS[003] VSS[084] P24
+VCC_CORE All use 10U 4V(+-20%,X6S,0805)Pb-Free. A10 AC7 A14 R2
VCC[003] VCC[070] VSS[004] VSS[085]
A12 VCC[004] VCC[071] AC9 A16 VSS[005] VSS[086] R5
A13 VCC[005] VCC[072] AC12 A19 VSS[006] VSS[087] R22
A15 VCC[006] VCC[073] AC13 A23 VSS[007] VSS[088] R25

1
A17 VCC[007] VCC[074] AC15 AF2 VSS[008] VSS[089] T1
C415 C73 C72 C71 C70 A18 AC17 B6 T4
10U/4V 10U/4V 10U/4V 10U/4V 10U/4V VCC[008] VCC[075] VSS[009] VSS[090]
A20 AC18 B8 T23
2

2
A VCC[009] VCC[076] VSS[010] VSS[091] A
B7 VCC[010] VCC[077] AD7 B11 VSS[011] VSS[092] T26
B9 VCC[011] VCC[078] AD9 B13 VSS[012] VSS[093] U3
B10 VCC[012] VCC[079] AD10 B16 VSS[013] VSS[094] U6
B12 VCC[013] VCC[080] AD12 B19 VSS[014] VSS[095] U21
+VCC_CORE B14 AD14 B21 U24
VCC[014] VCC[081] VSS[015] VSS[096]
B15 VCC[015] VCC[082] AD15 B24 VSS[016] VSS[097] V2
B17 VCC[016] VCC[083] AD17 C5 VSS[017] VSS[098] V5
B18 VCC[017] VCC[084] AD18 C8 VSS[018] VSS[099] V22
1

1
B20 VCC[018] VCC[085] AE9 C11 VSS[019] VSS[100] V25
C405 C406 C69 C68 C425 C9 AE10 C14 W1
10U/4V 10U/4V 10U/4V 10U/4V 10U/4V VCC[019] VCC[086] VSS[020] VSS[101]
C10 AE12 C16 W4
2

2
VCC[020] VCC[087] VSS[021] VSS[102]
C12 VCC[021] VCC[088] AE13 C19 VSS[022] VSS[103] W23
C13 VCC[022] VCC[089] AE15 C2 VSS[023] VSS[104] W26
C15 VCC[023] VCC[090] AE17 C22 VSS[024] VSS[105] Y3
8 inside cavity, north side, secondary layer. C17 VCC[024] VCC[091] AE18 C25 VSS[025] VSS[106] Y6
C18 VCC[025] VCC[092] AE20 D1 VSS[026] VSS[107] Y21
D9 VCC[026] VCC[093] AF9 D4 VSS[027] VSS[108] Y24
+VCC_CORE D10 AF10 D8 AA2
VCC[027] VCC[094] VSS[028] VSS[109]
D12 VCC[028] VCC[095] AF12 D11 VSS[029] VSS[110] AA5
D14 VCC[029] VCC[096] AF14 D13 VSS[030] VSS[111] AA8
D15 VCC[030] VCC[097] AF15 D16 VSS[031] VSS[112] AA11
1

1
D17 VCC[031] VCC[098] AF17 D19 VSS[032] VSS[113] AA14
C410 C411 C407 C408 C409 D18 AF18 D23 AA16
10U/4V 10U/4V 10U/4V 10U/4V 10U/4V VCC[032] VCC[099] +1.05V_VCCP VSS[033] VSS[114]
E7 AF20 D26 AA19
2

2
VCC[033] VCC[100] VSS[034] VSS[115]
E9 VCC[034] E3 VSS[035] VSS[116] AA22
E10 VCC[035] VCCP[01] G21 E6 VSS[036] VSS[117] AA25
E12 VCC[036] VCCP[02] V6 E8 VSS[037] VSS[118] AB1

1
E13 VCC[037] VCCP[03] J6 E11 VSS[038] VSS[119] AB4
+VCC_CORE E15 K6 + C430 E14 AB8
VCC[038] VCCP[04] 220U/4V VSS[039] VSS[120]
B E17 VCC[039] VCCP[05] M6 E16 VSS[040] VSS[121] AB11 B
E18 J21 E19 AB13

2
VCC[040] VCCP[06] VSS[041] VSS[122]
E20 VCC[041] VCCP[07] K21 E21 VSS[042] VSS[123] AB16
1

1
F7 VCC[042] VCCP[08] M21 E24 VSS[043] VSS[124] AB19
C434 C435 C412 C432 C433 F9 N21 F5 AB23
10U/4V 10U/4V 10U/4V 10U/4V 10U/4V VCC[043] VCCP[09] VSS[044] VSS[125]
F10 N6 F8 AB26
2

2
VCC[044] VCCP[10] VSS[045] VSS[126]
F12 VCC[045] VCCP[11] R21 F11 VSS[046] VSS[127] AC3
F14 R6 +1.5V_RUN F13 AC6
VCC[046] VCCP[12] VSS[047] VSS[128]
F15 VCC[047] VCCP[13] T21 F16 VSS[048] VSS[129] AC8
8 inside cavity, south side, secondary layer. F17 VCC[048] VCCP[14] T6 F19 VSS[049] VSS[130] AC11
F18 VCC[049] VCCP[15] V21 F2 VSS[050] VSS[131] AC14
F20 VCC[050] VCCP[16] W21 F22 VSS[051] VSS[132] AC16
AA7 VCC[051] F25 VSS[052] VSS[133] AC19
+VCC_CORE AA9 B26 G4 AC21
VCC[052] VCCA[01] VSS[053] VSS[134]
AA10 VCC[053] VCCA[02] C26 G1 VSS[054] VSS[135] AC24
AA12 VCC[054] G23 VSS[055] VSS[136] AD2

1
AA13 AD6 C443 C446 G26 AD5
VCC[055] VID[0] VID0 51 VSS[056] VSS[137]
1

AA15 AF5 0.01U/25V 10U/4V H3 AD8


VCC[056] VID[1] VID1 51 VSS[057] VSS[138]
C419 C429 C439 C438 C437 C436 AA17 AE5 H6 AD11
VID2 51

2
10U/4V 10U/4V 10U/4V 10U/4V 10U/4V 10U/4V VCC[057] VID[2] VSS[058] VSS[139]
AA18 AF4 VID3 51 H21 AD13
2

VCC[058] VID[3] VSS[059] VSS[140]


AA20 VCC[059] VID[4] AE3 VID4 51 H24 VSS[060] VSS[141] AD16
AB9 VCC[060] VID[5] AF3 VID5 51 J2 VSS[061] VSS[142] AD19
AC10 VCC[061] VID[6] AE2 VID6 51 J5 VSS[062] VSS[143] AD22
6 inside cavity, north side, primary layer. AB10 VCC[062] J22 VSS[063] VSS[144] AD25
AB12 VCC[063] Layout Note: J25 VSS[064] VSS[145] AE1
AB14 AF7 VCCSENSE Place C105 near PIN K1 AE4
VCC[064] VCCSENSE VCCSENSE 51 VSS[065] VSS[146]
+VCC_CORE AB15 K4 AE8
VCC[065] B26. VSS[066] VSS[147]
AB17 VCC[066] K23 VSS[067] VSS[148] AE11
AB18 AE7 VSSSENSE K26 AE14
VCC[067] VSSSENSE VSSSENSE 51 VSS[068] VSS[149]
L3 VSS[069] VSS[150] AE16
1

C C
Merom Ball-out Rev 1a L6 AE19
C89 C88 C87 C86 C85 C84 VSS[070] VSS[151]
. L21 VSS[071] VSS[152] AE23
10U/4V 10U/4V 10U/4V 10U/4V 10U/4V 10U/4V L24 AE26
2

+VCC_CORE VSS[072] VSS[153]


M2 VSS[073] VSS[154] A2
M5 VSS[074] VSS[155] AF6

1
M22 VSS[075] VSS[156] AF8
6 inside cavity, south side, primary layer. R336 M25 AF11
100/F VSS[076] VSS[157]
N1 VSS[077] VSS[158] AF13
N4 VSS[078] VSS[159] AF16
N23 AF19

2
VSS[079] VSS[160]
N26 VSS[080] VSS[161] AF21
VCCSENSE P3 A25
VSSSENSE VSS[081] VSS[162]
VSS[163] AF25
+PWR_SRC

1
+1.05V_VCCP Merom Ball-out Rev 1a
R334 .
1

1
100/F
+ C59 + C78 + C99 + C113
1

100U/25V 100U/25V 100U/25V 100U/25V_NC

2
C416 C426 C417 C427 C418 C428
2

0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V


2

Route VCCSENSE and VSSSENSE


Layout Note: traces at 27.4ohms and
Layout out: Need to add 100uF cap on PWR_SRC for cap singing. length matched to within 25
Place these inside socket cavity on North side secondary. Place on PWR_SRC near +VCC_CORE. mil. Place PU and PD within
2 inch of CPU.
D D

QUANTA
Title
COMPUTER
Merom Processor (POWER)

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 4 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U9A H_A#[3..35]
H_D#[0..63] H_A#[3..35] 3
J13 H_A#3
3 H_D#[0..63] H_A#_3
H_D#0 E2 B11 H_A#4
H_D#1 H_D#_0 H_A#_4 H_A#5
A
G2 H_D#_1 H_A#_5 C11 A
H_D#2 G7 M11 H_A#6
H_D#3 H_D#_2 H_A#_6 H_A#7
M6 H_D#_3 H_A#_7 C15
H_D#4 H7 F16 H_A#8
H_D#5 H_D#_4 H_A#_8 H_A#9
H3 H_D#_5 H_A#_9 L13
H_D#6 G4 G17 H_A#10
H_D#7 H_D#_6 H_A#_10 H_A#11
F3 H_D#_7 H_A#_11 C14
H_D#8 N8 K16 H_A#12
H_D#9 H_D#_8 H_A#_12 H_A#13
H2 H_D#_9 H_A#_13 B13
H_D#10 M10 L16 H_A#14
H_D#11 H_D#_10 H_A#_14 H_A#15
N12 H_D#_11 H_A#_15 J17
H_D#12 N9 B14 H_A#16
+1.05V_VCCP H_D#13 H_D#_12 H_A#_16 H_A#17
H5 H_D#_13 H_A#_17 K19
H_D#14 P13 P15 H_A#18
H_D#15 H_D#_14 H_A#_18 H_A#19
K9 H_D#_15 H_A#_19 R17
H_D#16 M2 B16 H_A#20
H_D#_16 H_A#_20
1

H_D#17 W10 H20 H_A#21


R374 H_D#18 H_D#_17 H_A#_21 H_A#22
Y8 H_D#_18 H_A#_22 L19
221/F H_D#19 V4 D17 H_A#23
H_D#20 H_D#_19 H_A#_23 H_A#24
M3 H_D#_20 H_A#_24 M17
H_D#21 J1 N16 H_A#25
2

H_SWING H_D#22 H_D#_21 H_A#_25 H_A#26


N5 H_D#_22 H_A#_26 J19
H_D#23 N3 B18 H_A#27
H_D#_23 H_A#_27
1

H_D#24 W6 E19 H_A#28


H_D#_24 H_A#_28
2

R373 H_D#25 W9 B17 H_A#29


100/F C454 H_D#26 H_D#_25 H_A#_29 H_A#30
N2 H_D#_26 H_A#_30 B15
0.1U/10V H_D#27 Y7 E17 H_A#31
1

H_D#28 H_D#_27 H_A#_31 H_A#32


Y9 C18
2

H_D#29 H_D#_28 H_A#_32 H_A#33


P4 H_D#_29 H_A#_33 A19
H_D#30 W3 B19 H_A#34
H_D#31 H_D#_30 H_A#_34 H_A#35
B N1 H_D#_31 H_A#_35 N19 B
H_D#32 AD12
H_D#33 H_D#_32
AE3 H_D#_33 H_ADS# G12 H_ADS# 3
H_D#34 AD9 H17
H_D#_34 H_ADSTB#_0 H_ADSTB#0 3
H_D#35 AC9 G20
H_D#_35 H_ADSTB#_1 H_ADSTB#1 3

HOST
H_D#36 AC7 C8
H_D#_36 H_BNR# H_BNR# 3
+1.05V_VCCP H_D#37 AC14 E8
H_D#_37 H_BPRI# H_BPRI# 3
H_D#38 AD11 F12
H_D#_38 H_BREQ# H_BR0# 3
H_D#39 AC11 D6
H_D#_39 H_DEFER# H_DEFER# 3
H_D#40 AB2 C10
H_D#_40 H_DBSY# H_DBSY# 3
H_D#41 AD7 AM5
H_D#_41 HPLL_CLK CLK_MCH_BCLK 17
1

H_D#42 AB1 AM7


H_D#_42 HPLL_CLK# CLK_MCH_BCLK# 17
R413 R410 H_D#43 Y3 H8
H_D#_43 H_DPWR# H_DPWR# 3
54.9/F 54.9/F H_D#44 AC6 K7
H_D#_44 H_DRDY# H_DRDY# 3
H_D#45 AE2 E4
H_D#_45 H_HIT# H_HIT# 3
H_D#46 AC5 C6 H_HITM# 3
2

H_SCOMP H_D#47 H_D#_46 H_HITM#


AG3 H_D#_47 H_LOCK# G10 H_LOCK# 3
H_SCOMP# H_D#48 AJ9 B7
H_D#_48 H_TRDY# H_TRDY# 3
H_D#49 AH8
H_RCOMP H_D#50 H_D#_49
AJ14 H_D#_50
H_D#51 AE9 H_D#_51
1

H_D#52 AE11
R372 H_D#53 H_D#_52
AH12 H_D#_53 H_DINV#_0 K5 H_DINV#0 3
24.9/F H_D#54 AJ5 L2
H_D#_54 H_DINV#_1 H_DINV#1 3
H_D#55 AH5 AD13
H_D#_55 H_DINV#_2 H_DINV#2 3
Layout Note: H_D#56 AJ6 AE13 H_DINV#3 3
2

H_D#57 H_D#_56 H_DINV#_3


H_RCOMP trace should be AE7 H_D#_57
H_D#58 AJ7 M7
10-mil wide with 20-mil H_D#_58 H_DSTBN#_0 H_DSTBN#0 3
H_D#59 AJ2 K3
H_D#_59 H_DSTBN#_1 H_DSTBN#1 3
C
spacing. H_D#60 AE5 H_D#_60 H_DSTBN#_2 AD2 H_DSTBN#2 3 C
H_D#61 AJ3 AH11
H_D#_61 H_DSTBN#_3 H_DSTBN#3 3
H_D#62 AH2
H_D#63 H_D#_62
AH13 H_D#_63 H_DSTBP#_0 L7 H_DSTBP#0 3
H_DSTBP#_1 K2 H_DSTBP#1 3
H_DSTBP#_2 AC2 H_DSTBP#2 3
H_SWING B3 AJ10
+1.05V_VCCP H_SWING H_DSTBP#_3 H_DSTBP#3 3
H_RCOMP C2 H_RCOMP
H_REQ#_0 M14 H_REQ#0 3
H_SCOMP W1 E13
H_SCOMP H_REQ#_1 H_REQ#1 3
2

H_SCOMP# W2 A11
H_SCOMP# H_REQ#_2 H_REQ#2 3
R376 H13
H_REQ#_3 H_REQ#3 3
1K/F B6 B12
3 H_RESET# H_CPURST# H_REQ#_4 H_REQ#4 3
3 H_CPUSLP# E5 H_CPUSLP#
E12 H_RS#0 3
1

H_RS#_0
H_RS#_1 D7 H_RS#1 3
H_RS#_2 D8 H_RS#2 3
H_REF B9 H_AVREF
A9 H_DVREF
1

CRESTLINE_1p0
1

R375 C457
2K/F 0.1U/10V
2
2

Layout Note:
Place the 0.1 uF
D decoupling capacitor D
within 100 mils from
GMCH pins.
QUANTA
Title
COMPUTER
Crestline (HOST)

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 5 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U9B U9C +VCC_PEG

+1.8V_SUS P36 J40 R397 24.9/F


RSVD1 24 BIA_PWM L_BKLT_CTRL
P37 RSVD2 SM_CK_0 AV29 M_CLK_DDR0 15 32 PANEL_BKEN H39 L_BKLT_EN PEG_COMPI N43 VCC3G_PCIE_R 1 2

1
R35 BB23 LCTLA_CLK E39 M43
RSVD3 SM_CK_1 M_CLK_DDR1 15 L_CTRL_CLK PEG_COMPO
N35 BA25 LCTLB_DATA E40
RSVD4 SM_CK_3 M_CLK_DDR3 15 L_CTRL_DATA
R446 AR12 AV23 L_IBG LCD_DDCCLK C37
RSVD5 SM_CK_4 M_CLK_DDR4 15 24 LCD_DDCCLK L_DDC_CLK
1K/F AR13 LCD_DDCDAT D35 J51
RSVD6 24 LCD_DDCDAT L_DDC_DATA PEG_RX#_0

2
AM12 AW30 M_CLK_DDR#0 15 24 ENVDD K40 L51 SDVOB_INT- 18

2
SM_RCOMP_VOH RSVD7 SM_CK#_0 R401 L_VDD_EN PEG_RX#_1
AN13 RSVD8 SM_CK#_1 BA23 M_CLK_DDR#1 15 PEG_RX#_2 N47
J12 AW25 2.4K L_IBG L41 T45
RSVD9 SM_CK#_3 M_CLK_DDR#3 15 LVDS_IBG PEG_RX#_3
1

1
C539 C538 AR37 AW23 PAD T53 L43 T50
RSVD10 SM_CK#_4 M_CLK_DDR#4 15 LVDS_VBG PEG_RX#_4
0.01U/25V 2.2U/6.3V AM36 N41 U40

1
A
R447 RSVD11 LVDS_VREFH PEG_RX#_5 A
AL36 BE29 DDR_CKE0_DIMMA 15,16 N40 Y44
2

3.01K/F RSVD12 SM_CKE_0 LVDS_VREFL PEG_RX#_6


AM37 RSVD13 SM_CKE_1 AY32 DDR_CKE1_DIMMA 15,16 24 LCD_ACLK- D46 LVDSA_CLK# PEG_RX#_7 Y40
2 D20 BD39 DDR_CKE3_DIMMB 15,16 UMA 24 LCD_ACLK+ C45 AB51

MUXING
RSVD14 SM_CKE_3 LVDSA_CLK PEG_RX#_8
SM_CKE_4 BG37 DDR_CKE4_DIMMB 15,16 24 LCD_BCLK- D44 LVDSB_CLK# PEG_RX#_9 W49
SM_RCOMP_VOL E42 AD44
24 LCD_BCLK+ LVDSB_CLK PEG_RX#_10

LVDS
SM_CS#_0 BG20 DDR_CS0_DIMMA# 15,16 PEG_RX#_11 AD40
1

C542 C546 BK16 G51 AG46


SM_CS#_1 DDR_CS1_DIMMA# 15,16 24 LCD_A0- LVDSA_DATA#_0 PEG_RX#_12
0.01U/25V 2.2U/6.3V BG16 +1.8V_SUS E51 AH49
SM_CS#_2 DDR_CS2_DIMMB# 15,16 24 LCD_A1- LVDSA_DATA#_1 PEG_RX#_13
R444 H10 BE13 F49 AG45
DDR_CS3_DIMMB# 15,16 24 LCD_A2-
2

1K/F RSVD20 SM_CS#_3 LVDSA_DATA#_2 PEG_RX#_14


B51 RSVD21 PEG_RX#_15 AG41

1
BJ20 BH18 M_ODT0 15,16
2

RSVD22 SM_ODT_0

RSVD

GRAPHICS
BK22 RSVD23 SM_ODT_1 BJ15 M_ODT1 15,16 24 LCD_A0+ G50 LVDSA_DATA_0 PEG_RX_0 J50
BF19 BJ14 R437 E50 L50
RSVD24 SM_ODT_2 M_ODT2 15,16 24 LCD_A1+ LVDSA_DATA_1 PEG_RX_1 SDVOB_INT+ 18

DDR
BH20 BE16 20/F F48 M47
RSVD25 SM_ODT_3 M_ODT3 15,16 24 LCD_A2+ LVDSA_DATA_2 PEG_RX_2
Santa Rosa Platform MOW WW15 BK18 U44

2
RSVD26 SMRCOMPP SMRCOMPP PEG_RX_3
For 4Gb DRAM support, BJ18 RSVD27 SM_RCOMP BL15 PEG_RX_4 T49
BF23 BK14 SMRCOMPN SMRCOMPN G44 T41
change Pin-BJ29 to DDR_A_MA14, RSVD28 SM_RCOMP# 24 LCD_B0- LVDSB_DATA#_0 PEG_RX_5
BG23 RSVD29 24 LCD_B1- B47 LVDSB_DATA#_1 PEG_RX_6 W45

1
change Pin-BE24 to DDR_B_MA14. BC23 RSVD30 SM_RCOMP_VOH BK31 SM_RCOMP_VOH
24 LCD_B2- B45 LVDSB_DATA#_2 PEG_RX_7 W41
BD24 BL31 SM_RCOMP_VOL AB50
RSVD31 SM_RCOMP_VOL R443 PEG_RX_8
15,16 DDR_A_MA14 BJ29 RSVD32 PEG_RX_9 Y48
BE24 AR49 V_DDR_MCH_REF 20/F E44 AC45
15,16 DDR_B_MA14 RSVD33 SM_VREF_0 24 LCD_B0+ LVDSB_DATA_0 PEG_RX_10
BH39 AW4 24 LCD_B1+ A47 AC41

2
RSVD34 SM_VREF_1 LVDSB_DATA_1 PEG_RX_11
AW20 RSVD35 24 LCD_B2+ A45 LVDSB_DATA_2 PEG_RX_12 AH47
+3.3V_RUN BK20 AG49
RSVD36 PEG_RX_13
C48 AH45

PCI-EXPRESS
R402 1 PM_EXTTS#0 RSVD37 PEG_RX_14
2 10K D47 RSVD38 DPLL_REF_CLK B42 MCH_DREFCLK 17 PEG_RX_15 AG42
R395 1 2 10K PM_EXTTS#1 B44 C42
RSVD39 DPLL_REF_CLK# MCH_DREFCLK# 17 DVO_RED#_C
C44 RSVD40 DPLL_REF_SSCLK H48 DREF_SSCLK 17 43 TV_CVBS E27 TVA_DAC PEG_TX#_0 N45
B A35 H47 G27 U39 DVO_GREEN#_C B
CLK
RSVD41 DPLL_REF_SSCLK# DREF_SSCLK# 17 43 TV_Y TVB_DAC PEG_TX#_1
B37 K27 U47 DVO_BLUE#_C
+1.05V_VCCP RSVD42 43 TV_C TVC_DAC PEG_TX#_2
B36 K44 N51 DVO_CLK#_C
RSVD43 PEG_CLK CLK_MCH_3GPLL 17 PEG_TX#_3

TV
R406 56_NC B34 K45 F27 R50
RSVD44 PEG_CLK# CLK_MCH_3GPLL# 17 TVA_RTN PEG_TX#_4

2
1 2 THERMTRIP_MCH# C34 RSVD45 J27 TVB_RTN PEG_TX#_5 T42
R387 R381 R398 L27 Y43
150/F 150/F 150/F TVC_RTN PEG_TX#_6
PEG_TX#_7 W46
Layout Note: DMI_RXN_0 AN47 DMI_MRX_ITX_N0 12 M35 TV_DCONSEL_0 PEG_TX#_8 W38
Location of all MCH_CFG strap AJ38 DMI_MRX_ITX_N1 12 P33 AD39

1
DMI_RXN_1 TV_DCONSEL_1 PEG_TX#_9
DMI_RXN_2 AN42 DMI_MRX_ITX_N2 12 PEG_TX#_10 AC46
resistors needs to be close to AN46 AC49
DMI_RXN_3 DMI_MRX_ITX_N3 12 PEG_TX#_11
minmize stub. PEG_TX#_12 AC42
DMI_RXP_0 AM47 DMI_MRX_ITX_P0 12 PEG_TX#_13 AH39
3,17 CPU_MCH_BSEL0 P27 CFG_0 DMI_RXP_1 AJ39 DMI_MRX_ITX_P1 12 PEG_TX#_14 AE49
3,17 CPU_MCH_BSEL1 N27 CFG_1 DMI_RXP_2 AN41 DMI_MRX_ITX_P2 12 PEG_TX#_15 AH44
3,17 CPU_MCH_BSEL2 N24 CFG_2 DMI_RXP_3 AN45 DMI_MRX_ITX_P3 12
PAD T45 CFG3 C21 VGA_BLU H32 M45 DVO_RED_C
CFG_3 25,43 VGA_BLU CRT_BLUE PEG_TX_0
CFG4 C23 AJ46 G32 T38 DVO_GREEN_C
DMI

PAD T12 CFG_4 DMI_TXN_0 DMI_MTX_IRX_N0 12 CRT_BLUE# PEG_TX_1


R391 2 1 4.02K/F_NC CFG5 F23 AJ41 VGA_GRN K29 T46 DVO_BLUE_C
CFG_5 DMI_TXN_1 DMI_MTX_IRX_N1 12 25,43 VGA_GRN CRT_GREEN PEG_TX_2
PAD T56 CFG6 N23 AM40 J29 N50 DVO_CLK_C
CFG_6 DMI_TXN_2 DMI_MTX_IRX_N2 12 CRT_GREEN# PEG_TX_3
PAD T49 CFG7 G23 AM44 VGA_RED F29 R51
CFG_7 DMI_TXN_3 DMI_MTX_IRX_N3 12 25,43 VGA_RED CRT_RED PEG_TX_4

VGA
PAD T46 CFG8 J20 E29 U43
CFG_8 CRT_RED# PEG_TX_5
CFG

R382 2 1 4.02K/F_NC CFG9 C20 CFG_9 DMI_TXP_0 AJ47 DMI_MTX_IRX_P0 12 PEG_TX_6 W42
PAD T58 CFG10 R24 AJ42 Y47
CFG_10 DMI_TXP_1 DMI_MTX_IRX_P1 12 PEG_TX_7
PAD T48 CFG11 L23 AM39 K33 Y39
CFG_11 DMI_TXP_2 DMI_MTX_IRX_P2 12 25 G_CLK_DDC2 CRT_DDC_CLK PEG_TX_8
PAD T52 CFG12 J23 AM43 G35 AC38
CFG_12 DMI_TXP_3 DMI_MTX_IRX_P3 12 25 G_DAT_DDC2 CRT_DDC_DATA PEG_TX_9
PAD T50 CFG13 E23 R390 1 2 30/F F33 AD47
CFG_13 25 VGAHSYNC CRT_HSYNC PEG_TX_10
PAD T47 CFG14 E20 R379 1 2 1.3K/F C32 AC50
CFG15 CFG_14 +1.25V_RUN R384 1 CRT_TVO_IREF PEG_TX_11
PAD T54 K23 CFG_15 25 VGAVSYNC 2 30/F E33 CRT_VSYNC PEG_TX_12 AD43
C
R405 2 1 4.02K/F_NC CFG16 M20 CFG_16 PEG_TX_13 AG39 C
+3.3V_RUN
GRAPHICS VID

CFG17
PAD T57
T55 CFG18
M24
L32
CFG_17 Non-iAMT 1
PEG_TX_14 AE50
AH43
PAD CFG_18 PEG_TX_15
R403 2 1 4.02K/F_NC CFG19 N33 CFG_19
R416
R394 2 1 4.02K/F_NC CFG20 L35 1K/F
CFG_20 CRESTLINE_1p0
VGA_BLU
2

E35 T51 PAD MCH_CLVREF VGA_GRN UMA


GFX_VID_0 +3.3V_RUN VGA_RED
13 PM_BMBUSY# G41 PM_BM_BUSY# GFX_VID_1 A39 T11 PAD UMA
1

3,11,51 H_DPRSTP# L39 PM_DPRSTP# GFX_VID_2 C38 T10 PAD


2

2
PM_EXTTS#0 L36 B39 T8 PAD C508 R418 R365 1 2 10K LCTLA_CLK
15 PM_EXTTS#0 PM_EXT_TS#_0 GFX_VID_3
PM

PM_EXTTS#1 J36 E36 T9 PAD 0.1U/10V 392/F R366 1 2 10K LCTLB_DATA R396 R400 R393 Layout Note:
15 PM_EXTTS#1 PM_EXT_TS#_1 GFX_VR_EN R364 2.2K LCD_DDCCLK 150/F 150/F 150/F
AW49 2 1 Place 150 ohm
1

13,44 ICH_PWRGD PLTRST#_R PWROK R363 2.2K LCD_DDCDAT


AV20 2 1
2

THERMTRIP_MCH# N20 RSTIN# termination resistors


37 THERMTRIP_MCH#

1
THERMTRIP# close to GMCH.
13,51 DPRSLPVR 1 2 G36 DPRSLPVR
R389 0 AM49
CL_CLK CL_CLK0 13
CL_DATA AK50 CL_DATA0 13
BJ51 AT43 Low=DMIx2 DVO_RED#_C C475 1 2 0.1U/10V
ICH_CL_PWROK 13,31 SDVOB_RED- 18
ME

NC_1 CL_PWROK DVO_GREEN#_C C489 0.1U/10V


BK51 NC_2 CL_RST# AN49 ICH_CL_RST0# 13 CFG5 DMI X2 Select High=DMIx4(Default) 1 2 SDVOB_GREEN- 18
BK50 AM50 DVO_BLUE#_C C483 1 2 0.1U/10V
NC_3 CL_VREF SDVOB_BLUE- 18
BL50 MCH_CLVREF PCI Express Low= Reveise Lane DVO_CLK#_C C471 1 2 0.1U/10V
NC_4 SDVOB_CLK- 18
BL49 NC_5 CFG9 Graphic Lane High=Normal operation
BL3 DVO_RED_C C473 1 2 0.1U/10V
NC_6 SDVOB_RED+ 18
BL2 FSB Dynamic Low=Dynamic ODT Disable DVO_GREEN_C C486 1 2 0.1U/10V
NC_7 SDVOB_GREEN+ 18
NC

BK1 CFG16 ODT High=Dynamic ODT Enable(default). DVO_BLUE_C C480 1 2 0.1U/10V


NC_8 SDVOB_BLUE+ 18
BJ1 H35 DVO_CLK_C C469 1 2 0.1U/10V
NC_9 SDVO_CTRL_CLK SDVO_CTRLCLK 18 SDVOB_CLK+ 18
E1 NC_10 K36 SDVO_CTRLDATA 18 DMI Lane Low=Normal(default).
MISC

SDVO_CTRL_DATA
A5 NC_11 CLK_REQ# G39 CLK_3GPLLREQ# 17 CFG19 Reversal High=Lane Reversed DC Blocked Cap.
D C51 NC_12 ICH_SYNC# G40 MCH_ICH_SYNC# 13 D
B50 NC_13
Low=Only SDVO or PCIEx1 is
A50 NC_14
SDVO/PCIE operational (defaults)
A49 A37 CFG20
BK2
NC_15
NC_16
TEST_1
TEST_2 R32
Concurrent
Operation
High=SDVO and PCIEx1 are operating
simultaneously via PEG port
QUANTA
2

CRESTLINE_1p0
R419
1
0_NC
2
R407
20K
R378
0
Low=No SDVO Device Present
Title
COMPUTER
12 SB_NB_PCIE_RST# (default) Crestline (VGA,DMI)
SDVO_CRTL_DATA SDVO Present. High=SDVO Device Present
R422 0 R421 100
1

1 2 2 1 PLTRST#_R Size Document Number Rev


12,18,28,29,31,32,40 PLTRST# JM7 1A

Date: Wednesday, June 28, 2006 Sheet 6 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

15 DDR_A_D[0..63] 15 DDR_B_D[0..63]
U9D U9E
DDR_A_D0 AR43 BB19 DDR_A_BS0 DDR_B_D0 AP49 AY17 DDR_B_BS0
SA_DQ_0 SA_BS_0 DDR_A_BS0 15,16 SB_DQ_0 SB_BS_0 DDR_B_BS0 15,16
DDR_A_D1 AW44 BK19 DDR_A_BS1 DDR_B_D1 AR51 BG18 DDR_B_BS1
A SA_DQ_1 SA_BS_1 DDR_A_BS1 15,16 SB_DQ_1 SB_BS_1 DDR_B_BS1 15,16 A
DDR_A_D2 BA45 BF29 DDR_A_BS2 DDR_B_D2 AW50 BG36 DDR_B_BS2
SA_DQ_2 SA_BS_2 DDR_A_BS2 15,16 SB_DQ_2 SB_BS_2 DDR_B_BS2 15,16
DDR_A_D3 AY46 DDR_B_D3 AW51
DDR_A_D4 SA_DQ_3 DDR_A_CAS# DDR_B_D4 SB_DQ_3 DDR_B_CAS#
AR41 SA_DQ_4 SA_CAS# BL17 DDR_A_CAS# 15,16 AN51 SB_DQ_4 SB_CAS# BE17 DDR_B_CAS# 15,16
DDR_A_D5 AR45 DDR_B_D5 AN50
SA_DQ_5 DDR_A_DM[0..7] 15 SB_DQ_5 DDR_B_DM[0..7] 15
DDR_A_D6 AT42 AT45 DDR_A_DM0 DDR_B_D6 AV50 AR50 DDR_B_DM0
DDR_A_D7 SA_DQ_6 SA_DM_0 DDR_A_DM1 DDR_B_D7 SB_DQ_6 SB_DM_0 DDR_B_DM1
AW47 SA_DQ_7 SA_DM_1 BD44 AV49 SB_DQ_7 SB_DM_1 BD49
DDR_A_D8 BB45 BD42 DDR_A_DM2 DDR_B_D8 BA50 BK45 DDR_B_DM2
DDR_A_D9 SA_DQ_8 SA_DM_2 DDR_A_DM3 DDR_B_D9 SB_DQ_8 SB_DM_2 DDR_B_DM3
BF48 SA_DQ_9 SA_DM_3 AW38 BB50 SB_DQ_9 SB_DM_3 BL39
DDR_A_D10 BG47 AW13 DDR_A_DM4 DDR_B_D10 BA49 BH12 DDR_B_DM4
DDR_A_D11 SA_DQ_10 SA_DM_4 DDR_A_DM5 DDR_B_D11 SB_DQ_10 SB_DM_4 DDR_B_DM5
BJ45 SA_DQ_11 SA_DM_5 BG8 BE50 SB_DQ_11 SB_DM_5 BJ7
DDR_A_D12 BB47 AY5 DDR_A_DM6 DDR_B_D12 BA51 BF3 DDR_B_DM6
DDR_A_D13 SA_DQ_12 SA_DM_6 DDR_A_DM7 DDR_B_D13 SB_DQ_12 SB_DM_6 DDR_B_DM7
BG50 SA_DQ_13 SA_DM_7 AN6 AY49 SB_DQ_13 SB_DM_7 AW2
DDR_A_D14 BH49 DDR_B_D14 BF50
SA_DQ_14 DDR_A_DQS[0..7] 15 SB_DQ_14 DDR_B_DQS[0..7] 15
DDR_A_D15 BE45 AT46 DDR_A_DQS0 DDR_B_D15 BF49 AT50 DDR_B_DQS0
SA_DQ_15 SA_DQS_0 SB_DQ_15 SB_DQS_0

A
DDR_A_D16 AW43 BE48 DDR_A_DQS1 DDR_B_D16 BJ50 BD50 DDR_B_DQS1
SA_DQ_16 SA_DQS_1 SB_DQ_16 SB_DQS_1

B
DDR_A_D17 BE44 BB43 DDR_A_DQS2 DDR_B_D17 BJ44 BK46 DDR_B_DQS2
DDR_A_D18 SA_DQ_17 SA_DQS_2 DDR_A_DQS3 DDR_B_D18 SB_DQ_17 SB_DQS_2 DDR_B_DQS3
BG42 SA_DQ_18 SA_DQS_3 BC37 BJ43 SB_DQ_18 SB_DQS_3 BK39
DDR_A_D19 BE40 BB16 DDR_A_DQS4 DDR_B_D19 BL43 BJ12 DDR_B_DQS4
DDR_A_D20 SA_DQ_19 SA_DQS_4 DDR_A_DQS5 DDR_B_D20 SB_DQ_19 SB_DQS_4 DDR_B_DQS5
BF44 BH6 BK47 BL7

MEMORY
DDR_A_D21 SA_DQ_20 SA_DQS_5 DDR_A_DQS6 DDR_B_D21 SB_DQ_20 SB_DQS_5 DDR_B_DQS6
BH45 BB2 BK49 BE2

MEMORY
DDR_A_D22 SA_DQ_21 SA_DQS_6 DDR_A_DQS7 DDR_B_D22 SB_DQ_21 SB_DQS_6 DDR_B_DQS7
BG40 SA_DQ_22 SA_DQS_7 AP3 DDR_A_DQS#[0..7] 15 BK43 SB_DQ_22 SB_DQS_7 AV2 DDR_B_DQS#[0..7] 15
DDR_A_D23 BF40 AT47 DDR_A_DQS#0 DDR_B_D23 BK42 AU50 DDR_B_DQS#0
DDR_A_D24 SA_DQ_23 SA_DQS#_0 DDR_A_DQS#1 DDR_B_D24 SB_DQ_23 SB_DQS#_0 DDR_B_DQS#1
AR40 SA_DQ_24 SA_DQS#_1 BD47 BJ41 SB_DQ_24 SB_DQS#_1 BC50
DDR_A_D25 AW40 BC41 DDR_A_DQS#2 DDR_B_D25 BL41 BL45 DDR_B_DQS#2
DDR_A_D26 SA_DQ_25 SA_DQS#_2 DDR_A_DQS#3 DDR_B_D26 SB_DQ_25 SB_DQS#_2 DDR_B_DQS#3
AT39 SA_DQ_26 SA_DQS#_3 BA37 BJ37 SB_DQ_26 SB_DQS#_3 BK38
DDR_A_D27 AW36 BA16 DDR_A_DQS#4 DDR_B_D27 BJ36 BK12 DDR_B_DQS#4
DDR_A_D28 SA_DQ_27 SA_DQS#_4 DDR_A_DQS#5 DDR_B_D28 SB_DQ_27 SB_DQS#_4 DDR_B_DQS#5
AW41 SA_DQ_28 SA_DQS#_5 BH7 BK41 SB_DQ_28 SB_DQS#_5 BK7
DDR_A_D29 AY41 BC1 DDR_A_DQS#6 DDR_B_D29 BJ40 BF2 DDR_B_DQS#6
DDR_A_D30 SA_DQ_29 SA_DQS#_6 DDR_A_DQS#7 DDR_B_D30 SB_DQ_29 SB_DQS#_6 DDR_B_DQS#7
AV38 SA_DQ_30 SA_DQS#_7 AP2 BL35 SB_DQ_30 SB_DQS#_7 AV3
B DDR_A_D31 AT38 DDR_B_D31 BK37 B
SA_DQ_31 DDR_A_MA[0..13] 15,16 SB_DQ_31 DDR_B_MA[0..13] 15,16
DDR_A_D32 AV13 BJ19 DDR_A_MA0 DDR_B_D32 BK13 BC18 DDR_B_MA0
DDR_A_D33 SA_DQ_32 SA_MA_0 DDR_A_MA1 DDR_B_D33 SB_DQ_32 SB_MA_0 DDR_B_MA1
AT13 BD20 BE11 BG28
SYSTEM

DDR_A_D34 SA_DQ_33 SA_MA_1 DDR_A_MA2 DDR_B_D34 SB_DQ_33 SB_MA_1 DDR_B_MA2


AW11 BK27 BK11 BG25

SYSTEM
DDR_A_D35 SA_DQ_34 SA_MA_2 DDR_A_MA3 DDR_B_D35 SB_DQ_34 SB_MA_2 DDR_B_MA3
AV11 SA_DQ_35 SA_MA_3 BH28 BC11 SB_DQ_35 SB_MA_3 AW17
DDR_A_D36 AU15 BL24 DDR_A_MA4 DDR_B_D36 BC13 BF25 DDR_B_MA4
DDR_A_D37 SA_DQ_36 SA_MA_4 DDR_A_MA5 DDR_B_D37 SB_DQ_36 SB_MA_4 DDR_B_MA5
AT11 SA_DQ_37 SA_MA_5 BK28 BE12 SB_DQ_37 SB_MA_5 BE25
DDR_A_D38 BA13 BJ27 DDR_A_MA6 DDR_B_D38 BC12 BA29 DDR_B_MA6
DDR_A_D39 SA_DQ_38 SA_MA_6 DDR_A_MA7 DDR_B_D39 SB_DQ_38 SB_MA_6 DDR_B_MA7
BA11 SA_DQ_39 SA_MA_7 BJ25 BG12 SB_DQ_39 SB_MA_7 BC28
DDR_A_D40 BE10 BL28 DDR_A_MA8 DDR_B_D40 BJ10 AY28 DDR_B_MA8
DDR_A_D41 SA_DQ_40 SA_MA_8 DDR_A_MA9 DDR_B_D41 SB_DQ_40 SB_MA_8 DDR_B_MA9
BD10 SA_DQ_41 SA_MA_9 BA28 BL9 SB_DQ_41 SB_MA_9 BD37
DDR_A_D42 BD8 BC19 DDR_A_MA10 DDR_B_D42 BK5 BG17 DDR_B_MA10
DDR_A_D43 SA_DQ_42 SA_MA_10 DDR_A_MA11 DDR_B_D43 SB_DQ_42 SB_MA_10 DDR_B_MA11
AY9 SA_DQ_43 SA_MA_11 BE28 BL5 SB_DQ_43 SB_MA_11 BE37
DDR_A_D44 BG10 BG30 DDR_A_MA12 DDR_B_D44 BK9 BA39 DDR_B_MA12
DDR_A_D45 SA_DQ_44 SA_MA_12 DDR_A_MA13 DDR_B_D45 SB_DQ_44 SB_MA_12 DDR_B_MA13
AW9 SA_DQ_45 SA_MA_13 BJ16 BK10 SB_DQ_45 SB_MA_13 BG13
DDR_A_D46 BD7 DDR_B_D46 BJ8
DDR

DDR_A_D47 SA_DQ_46 DDR_B_D47 SB_DQ_46 DDR_B_RAS#


BB9 BJ6 AV16

DDR
SA_DQ_47 SB_DQ_47 SB_RAS# DDR_B_RAS# 15,16
DDR_A_D48 BB5 BE18 DDR_A_RAS# DDR_B_D48 BF4 AY18 T60 PAD
SA_DQ_48 SA_RAS# DDR_A_RAS# 15,16 SB_DQ_48 SB_RCVEN#
DDR_A_D49 AY7 AY20 T59 PAD DDR_B_D49 BH5
DDR_A_D50 SA_DQ_49 SA_RCVEN# DDR_B_D50 SB_DQ_49 DDR_B_WE#
AT5 SA_DQ_50 BG1 SB_DQ_50 SB_WE# BC17 DDR_B_WE# 15,16
DDR_A_D51 AT7 BA19 DDR_A_WE# DDR_B_D51 BC2
SA_DQ_51 SA_WE# DDR_A_WE# 15,16 SB_DQ_51
DDR_A_D52 AY6 DDR_B_D52 BK3
DDR_A_D53 SA_DQ_52 DDR_B_D53 SB_DQ_52
BB7 SA_DQ_53 BE4 SB_DQ_53
DDR_A_D54 AR5 DDR_B_D54 BD3
DDR_A_D55 SA_DQ_54 DDR_B_D55 SB_DQ_54
AR8 SA_DQ_55 BJ2 SB_DQ_55
DDR_A_D56 AR9 DDR_B_D56 BA3
DDR_A_D57 SA_DQ_56 DDR_B_D57 SB_DQ_56
AN3 SA_DQ_57 BB3 SB_DQ_57
DDR_A_D58 AM8 DDR_B_D58 AR1
DDR_A_D59 SA_DQ_58 DDR_B_D59 SB_DQ_58
AN10 SA_DQ_59 AT3 SB_DQ_59
DDR_A_D60 AT9 DDR_B_D60 AY2
C
DDR_A_D61 SA_DQ_60 DDR_B_D61 SB_DQ_60 C
AN9 SA_DQ_61 AY3 SB_DQ_61
DDR_A_D62 AM9 DDR_B_D62 AU2
DDR_A_D63 SA_DQ_62 DDR_B_D63 SB_DQ_62
AN11 SA_DQ_63 AT2 SB_DQ_63
CRESTLINE_1p0 CRESTLINE_1p0

D D

QUANTA
Title
COMPUTER
Crestline (DDR2)

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 7 of 57


1 2 3 4 5 6 7 8
5 4 3 2 1

+3.3V_RUN
+1.05V_VCCP U9G U9F
R368 10 D28
AT35 1 2 +VCC_GMCH_L 1 2 AB33
VCC_1 VCC_NCTF_1
AT34 VCC_2 VCC_AXG_NCTF_1 T17 AB36 VCC_NCTF_2
AH28 T18 CH751H-40HPT AB37
VCC_3 VCC_AXG_NCTF_2 VCC_NCTF_3
AC32 VCC_5 VCC_AXG_NCTF_3 T19 AC33 VCC_NCTF_4 VSS_NCTF_1 T27
AC31 VCC_4 VCC_AXG_NCTF_4 T21 AC35 VCC_NCTF_5 VSS_NCTF_2 T37
AK32 T22 AC36 U24

VCC CORE
VCC_6 VCC_AXG_NCTF_5 VCC_NCTF_6 VSS_NCTF_3
AJ31 VCC_7 VCC_AXG_NCTF_6 T23 AD35 VCC_NCTF_7 VSS_NCTF_4 U28
AJ28 T25 +1.05V_VCCP AD36 V31
VCC_8 VCC_AXG_NCTF_7 VCC_NCTF_8 VSS_NCTF_5
AH32 VCC_9 VCC_AXG_NCTF_8 U15 AF33 VCC_NCTF_9 VSS_NCTF_6 V35
D
AH31 VCC_10 VCC_AXG_NCTF_9 U16 AF36 VCC_NCTF_10 VSS_NCTF_7 AA19 D
AH29 VCC_11 VCC_AXG_NCTF_10 U17 AH33 VCC_NCTF_11 VSS_NCTF_8 AB17
AF32 VCC_12 VCC_AXG_NCTF_11 U19 AH35 VCC_NCTF_12 VSS_NCTF_9 AB35

VSS NCTF
VCC_AXG_NCTF_12 U20 AH36 VCC_NCTF_13 VSS_NCTF_10 AD19

1
U21 + AH37 AD37
VCC_AXG_NCTF_13 C447 C441 C490 C487 C497 VCC_NCTF_14 VSS_NCTF_11
VCC_AXG_NCTF_14 U23 AJ33 VCC_NCTF_15 VSS_NCTF_12 AF17
R30 U26 Layout Note: 220U/2.5V 22U/10V 0.22U/10V 0.22U/10V 0.1U/10V AJ35 AF35

2
VCC_13 VCC_AXG_NCTF_15 VCC_NCTF_16 VSS_NCTF_13
VCC_AXG_NCTF_16 V16 370 mils from edge. AK33 VCC_NCTF_17 VSS_NCTF_14 AK17
VCC_AXG_NCTF_17 V17 AK35 VCC_NCTF_18 VSS_NCTF_15 AM17
VCC_AXG_NCTF_18 V19 Layout Note: AK36 VCC_NCTF_19 VSS_NCTF_16 AM24
VCC_AXG_NCTF_19 V20 Inside GMCH cavity. AK37 VCC_NCTF_20 VSS_NCTF_17 AP26
VCC_AXG_NCTF_20 V21 AD33 VCC_NCTF_21 VSS_NCTF_18 AP28
VCC_AXG_NCTF_21 V23 AJ36 VCC_NCTF_22 VSS_NCTF_19 AR15
VCC_AXG_NCTF_22 V24 AM35 VCC_NCTF_23 VSS_NCTF_20 AR19

VCC NCTF
Y15 Layout Note: AL33 AR28
+1.8V_SUS
POWER VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
Y16
Y17
370 mils from edge.
+1.05V_VCCP AL35
AA33
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VSS_NCTF_21

AU32 VCC_SM_1 VCC_AXG_NCTF_26 Y19 AA35 VCC_NCTF_27


AU33 VCC_SM_2 VCC_AXG_NCTF_27 Y20 AA36 VCC_NCTF_28
AU35 VCC_SM_3 VCC_AXG_NCTF_28 Y21 AP35 VCC_NCTF_29

1
AV33 VCC_SM_4 VCC_AXG_NCTF_29 Y23 AP36 VCC_NCTF_30
AW33 Y24 + C118 + C126 + C133 + C144 AR35
VCC_SM_5 VCC_AXG_NCTF_30 220U/2.5V 220U/2.5V 220U/2.5V_NC 220U/2.5V_NC VCC_NCTF_31
AW35 VCC_SM_6 VCC_AXG_NCTF_31 Y26 AR36 VCC_NCTF_32
AY35 Y28 Y32

2
VCC_SM_7 VCC_AXG_NCTF_32 VCC_NCTF_33
BA32 Y29 Y33
BA33
BA35
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
AA16
AA17
Y35
Y36
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
POWER
BB33 VCC_SM_11 VCC_AXG_NCTF_36 AB16 Y37 VCC_NCTF_37 VSS_SCB1 A3
BC32 AB19 T30 B2

VSS SCB
VCC_SM_12 VCC_AXG_NCTF_37 VCC_NCTF_38 VSS_SCB2
BC33 VCC_SM_13 VCC_AXG_NCTF_38 AC16 T34 VCC_NCTF_39 VSS_SCB3 C1
C BC35 VCC_SM_14 VCC_AXG_NCTF_39 AC17 T35 VCC_NCTF_40 VSS_SCB4 BL1 C
BD32 VCC_SM_15 VCC_AXG_NCTF_40 AC19 Layout Note: U29 VCC_NCTF_41 VSS_SCB5 BL51
BD35 AD15 +1.05V_VCCP U31 A51
VCC_SM_16 VCC_AXG_NCTF_41 Inside GMCH cavity for VCC_AXG. VCC_NCTF_42 VSS_SCB6
BE32 VCC_SM_17 VCC_AXG_NCTF_42 AD16 U32 VCC_NCTF_43
BE33 VCC_SM_18 VCC_AXG_NCTF_43 AD17 U33 VCC_NCTF_44
BE35 VCC_SM_19 VCC_AXG_NCTF_44 AF16 U35 VCC_NCTF_45
VCC GFX NCTF

BF33 AF19 U36


VCC SM

VCC_SM_20 VCC_AXG_NCTF_45 VCC_NCTF_46

1
BF34 VCC_SM_21 VCC_AXG_NCTF_46 AH15 V32 VCC_NCTF_47
BG32 AH16 C482 C488 C466 C494 C470 C492 V33
VCC_SM_22 VCC_AXG_NCTF_47 0.1U/10V 0.1U/10V 0.47U/10V 1U/10V 10U/6.3V 22U/4V VCC_NCTF_48
BG33 AH17 2 V36

2
VCC_SM_23 VCC_AXG_NCTF_48 VCC_NCTF_49 +1.05V_VCCP
BG35 VCC_SM_24 VCC_AXG_NCTF_49 AH19 V37 VCC_NCTF_50
BH32 VCC_SM_25 VCC_AXG_NCTF_50 AJ16
BH34 VCC_SM_26 VCC_AXG_NCTF_51 AJ17 VCC_AXM_1 AT33
BH35 AJ19 AT31

VCC AXM
VCC_SM_27 VCC_AXG_NCTF_52 VCC_AXM_2
BJ32 VCC_SM_28 VCC_AXG_NCTF_53 AK16 VCC_AXM_3 AK29
BJ33 VCC_SM_29 VCC_AXG_NCTF_54 AK19 VCC_AXM_4 AK24
BJ34 VCC_SM_30 VCC_AXG_NCTF_55 AL16 Layout Note: VCC_AXM_5 AK23
BK32 AL17 +1.05V_VCCP AL24 AJ26
VCC_SM_31 VCC_AXG_NCTF_56 Inside GMCH cavity. VCC_AXM_NCTF_1 VCC_AXM_6
BK33 VCC_SM_32 VCC_AXG_NCTF_57 AL19 AL26 VCC_AXM_NCTF_2 VCC_AXM_7 AJ23
BK34 VCC_SM_33 VCC_AXG_NCTF_58 AL20 AL28 VCC_AXM_NCTF_3
BK35 VCC_SM_34 VCC_AXG_NCTF_59 AL21 AM26 VCC_AXM_NCTF_4
BL33 VCC_SM_35 VCC_AXG_NCTF_60 AL23 AM28 VCC_AXM_NCTF_5

VCC AXM NCTF


AU30 VCC_SM_36 VCC_AXG_NCTF_61 AM15 AM29 VCC_AXM_NCTF_6
AM16 C499 C503 C506 AM31
VCC_AXG_NCTF_62 0.1U/10V 0.1U/10V 0.1U/10V VCC_AXM_NCTF_7
AM19 AM32

2
+1.05V_VCCP VCC_AXG_NCTF_63 VCC_AXM_NCTF_8
VCC_AXG_NCTF_64 AM20 AM33 VCC_AXM_NCTF_9
R20
VCC_AXG_NCTF_65 AM21
AM23
Non-iAMT AP29
AP31
VCC_AXM_NCTF_10
VCC_AXG_1 VCC_AXG_NCTF_66 VCC_AXM_NCTF_11
T14 VCC_AXG_2 VCC_AXG_NCTF_67 AP15 AP32 VCC_AXM_NCTF_12
B
W13 VCC_AXG_3 VCC_AXG_NCTF_68 AP16 AP33 VCC_AXM_NCTF_13 B
W14 VCC_AXG_4 VCC_AXG_NCTF_69 AP17 AL29 VCC_AXM_NCTF_14
Y12 VCC_AXG_5 VCC_AXG_NCTF_70 AP19 AL31 VCC_AXM_NCTF_15

1
AA20 VCC_AXG_6 VCC_AXG_NCTF_71 AP20 AL32 VCC_AXM_NCTF_16
AA23 AP21 C182 C511 C510 AR31
VCC_AXG_7 VCC_AXG_NCTF_72 22U/4V 0.22U/10V 0.22U/10V VCC_AXM_NCTF_17
AA26 AP23 AR32

2
VCC_AXG_8 VCC_AXG_NCTF_73 VCC_AXM_NCTF_18
AA28 VCC_AXG_9 VCC_AXG_NCTF_74 AP24 AR33 VCC_AXM_NCTF_19
AB21 VCC_AXG_10 VCC_AXG_NCTF_75 AR20
AB24 VCC_AXG_11 VCC_AXG_NCTF_76 AR21
AB29 VCC_AXG_12 VCC_AXG_NCTF_77 AR23 Layout Note:
AC20 VCC_AXG_13 VCC_AXG_NCTF_78 AR24 Place close to GMCH edge.
AC21 AR26 CRESTLINE_1p0
VCC_AXG_14 VCC_AXG_NCTF_79
VCC GFX

AC23 VCC_AXG_15 VCC_AXG_NCTF_80 V26


AC24 VCC_AXG_16 VCC_AXG_NCTF_81 V28
AC26 VCC_AXG_17 VCC_AXG_NCTF_82 V29
AC28 Y31 +1.8V_SUS
AC29
VCC_AXG_18 VCC_AXG_NCTF_83 VCC_SM
VCC_AXG_19
AD20 VCC_AXG_20
AD23 VCC_AXG_21

1
AD24 AW45 VCCSM_LF1
VCC SM LF

VCC_AXG_22 VCC_SM_LF1

1
AD28 BC39 VCCSM_LF2 +
VCC_AXG_23 VCC_SM_LF2 VCCSM_LF3 C230 C202 C544 C545
AF21 VCC_AXG_24 VCC_SM_LF3 BE39
AF26 BD17 VCCSM_LF4 0.1U/10V 330U/6.3V 22U/4V 22U/4V

2
VCC_AXG_25 VCC_SM_LF4 VCCSM_LF5
AA31 VCC_AXG_26 VCC_SM_LF5 BD4
AH20 AW8 VCCSM_LF6
VCC_AXG_27 VCC_SM_LF6 VCCSM_LF7
AH21 VCC_AXG_28 VCC_SM_LF7 AT6 Layout Note:
AH23 VCC_AXG_29 Place C901 where LVDS
1

AH24 VCC_AXG_30 and DDR2 taps. Layout Note:


AH26 C512 C509 C530 C532 C529 C528 C519 Place on the edge.
VCC_AXG_31 0.1U/10V 0.1U/10V 0.22U/10V 0.22U/10V 0.47U/10V 1U/10V 1U/10V
AD31
2

VCC_AXG_32
A AJ20 VCC_AXG_33
A
AN14 VCC_AXG_34

QUANTA
CRESTLINE_1p0 Title
COMPUTER
Crestline (VCC,NCTF)

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 8 of 57


5 4 3 2 1
5 4 3 2 1

+3.3V_RUN
U9H
+1.05V_VCCP +1.05V_VCCP
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC VCC_HV
J32 VCCSYNC VTT_1 U13

2
L29 R87 0 U12
+VCCA_CRTDAC +VCCA_CRTDAC_R +VCCA_CRTDAC_R VTT_2
+3.3V_RUN 1 2 1 2 A33 VCCA_CRT_DAC_1 VTT_3 U11

1
BLM18PG181SN1 B33 U9 D27
VCCA_CRT_DAC_2 VTT_4

1
3 1 U8 C477 C474 CH751H-40HPT_NC

CRT
VTT_5

1
C690 U7 2.2U/6.3V 4.7U/6.3V

1
C107 C112 0.1U/10V +VCC_TVBG_R VTT_6 +VCC_HV_L
A30 U5

2
0.1U/10V 22nF/3P_NC VCCA_DAC_BG VTT_7
U3

2
VTT_8

1
B32 VSSA_DAC_BG VTT_9 U2
U1 +1.05V_VCCP
D VTT_10 R367 D
VTT_11 T13 Place on the edge.
+VCCA_DPLLA B49 T11 10_NC
VCCA_DPLLA VTT_12

VTT
T10

2
+VCCA_DPLLB VTT_13
H49 VCCA_DPLLB VTT_14 T9
Non-iAMT 45mA MAx. 40mA MAx. T7

PLL
VTT_15

1
+VCCA_HPLL
FB_120ohm+-25%_100mHz +1.25V_RUN
10uH+-20%_100mA
AL2 VCCA_HPLL VTT_16 T6
T5 C476 C479 + C154 Non-
+1.25V_RUN VTT_17
_200mA_0.2ohm DC
L48 +VCCA_MPLL AM2 T3 0.47U/6.3V 4.7U/6.3V 220U/4V iAMT +3.3V_RUN

2
+VCCA_DPLLA C115 VCCA_MPLL VTT_18
2 1 T2

2
L50 10uH/100MA 1000P/50V VTT_19
R3

A LVDS
VTT_20

1
2 1 +VCCA_HPLL 2 1 +VCC_TX_LVDS A41 R2 +1.25V_RUN
VCCA_LVDS VTT_21

1
BLM11A121S + C464 C459 R1 +1.25V_RUN
470U/4V 0.1U/10V VTT_22
B41 VSSA_LVDS
Place on the edge. PJP31
1

+3.3V_RUN

2
C161 C498 AT23 +VCC_AXD_L 1 2+VCC_AXD_R 2 1
22U/10V 0.1U/10V VCC_AXD_1 L54 0
AU28
2

VCC_AXD_2
K50 VCCA_PEG_BG VCC_AXD_3 AU24 Reserved L81 pad for

1
L30 AT29

A PEG
VCC_AXD_4 inductor.

AXD
L51 2 1 +VCCA_DPLLB K49 AT25 C517 C198
BLM11A121S 10uH/100MA VSSA_PEG_BG VCC_AXD_5 1U/10V 22U/10V
AT30

2
VCC_AXD_6

1
2 1 +VCCA_MPLL C468 Place caps close

1
R420 0.1Caps should be + C128 C130 0.1U/10V +VCCA_PEG_PLL U51 AR29 to VCC_AXD.
VCCA_PEG_PLL VCC_AXD_NCTF

1
0.5/F/0603 placed 200 mils 470U/4V 0.1U/10V

2
1 2 C451 C453

2
with in its pins.
1

AW18 B23 +1.25V_RUN 1U/10V 10U/6.3V

2
+VCCA_MPLL_L C507 VCCA_SM_1 VCC_AXF_1
AV19 B21

AXF
VCCA_SM_2
POWER VCC_AXF_2
1

0.1U/10V AU19 A21


2

C167 VCCA_SM_3 VCC_AXF_3


AU18 VCCA_SM_4
22U/10V AU17 AJ50 +1.25V_RUN
PJP29
2

VCCA_SM_5 VCC_DMI
C Place caps close C

A SM

1
+1.25V_RUN 1 2 +VCCA_SM AT22 to VCC_AXF
VCCA_SM_7 +VCC_SM_CK C502
AT21 BK24

SM CK
VCCA_SM_8 VCC_SM_CK_1
1

AT19 BK23 0.1U/10V

2
VCCA_SM_9 VCC_SM_CK_2
2

1
+ C175 C505 C518 C526 C504 AT18 BJ24 Place PJP62 for
100U/6.3V 4.7U/6.3V 22U/4V 22U/4V 1U/10V VCCA_SM_10 VCC_SM_CK_3
AT17 VCCA_SM_11 VCC_SM_CK_4 BJ23 +1.8V_SUS +1.8V_SUS
Non-iAMT AR17
2

2
VCCA_SM_NCTF_1
AR16 VCCA_SM_NCTF_2 R102 0/1206 PJP8
A43 +VCC_TX_LVDS 1 2 +VCC_TX_LVDS_R 2 1

A CK
PJP30 VCC_TX_LVDS
BC29 VCCA_SM_CK_1

1
1 2 +VCCA_SM_CK BB29 +3.3V_RUN For EMI +1.8V_RUN
+1.25V_RUN VCCA_SM_CK_2

1
C40 + fine tune. PJP10
+VCC_TVDACA_R VCC_HV_1 C116 C121
C25 B40 2 1

HV
VCCA_TVA_DAC_1 VCC_HV_2
1

C533 C520 C523 1 C535 B25 1000P/50V 220U/4V

2
VCCA_TVA_DAC_2

1
22U/4V 1U/10V 1U/10V 0.1U/10V +VCC_TVDACB_R C27 VCCA_TVB_DAC_1 C460
B27 AD51

TV
2

+1.25V_RUN +VCC_TVDACC_R VCCA_TVB_DAC_2 VCC_PEG_1 0.1U/10V +VCC_PEG +1.05V_VCCP


B28 W50

2
L49 VCCA_TVC_DAC_1 VCC_PEG_2
A28 VCCA_TVC_DAC_2 VCC_PEG_3 W51

PEG
1 2 +VCCA_PEG_PLL V49 R127 0/1206

D TV/CRT
BLM21PG221SN1D VCC_PEG_4
VCC_PEG_5 V50 1 2
1

+VCCD_TVDAC_R M32 VCCD_CRT

1
L29 VCCD_TVDAC For EMI

1
FB_220ohm+-25%_100MHz R417 +VCC_RXR_DMI
Non-iAMT AH50 + fine tune.

DMI
1/F/0603 +1.25V_RUN +VCCQ_TVDAC_R VCC_RXR_DMI_1 C146 C147
_2A_0.1ohm DC Place PJP54 for N28 VCCD_QDAC VCC_RXR_DMI_2 AH51
1

+1.8V_SUS 220U/4V 10U/6.3V


1 2

2
C485 AN2
0.1U/10V VCCD_HPLL +VTTLF1 +1.05V_VCCP
A7

VTTLF
2

C496 +VCCA_PEG_PLL VTTLF1 +VTTLF2


U48 VCCD_PEG_PLL VTTLF2 F2
10U/6.3V PJP9 AH1 +VTTLF3 R134 0/1206

LVDS
2

VTTLF3
1

B B
+1.8V_SUS 1 2 +VCCD_LVDS J41 1 2
C180 C484 VCCD_LVDS_1
H42 VCCD_LVDS_2

1
0.1U/10V 0.1U/10V PJP11 For EMI
2

1
+1.8V_RUN 1 2 + fine tune.
1

C166 C156
C137 C138 CRESTLINE_1p0 220U/4V 10U/6.3V

2
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC 1U/10V 10U/6.3V_NC
2

L28 R83 0
+3.3V_RUN 1 2 +VCC_TVDACA 1 2 +VCC_TVDACA_R +VTTLF1
BLM18PG181SN1 +VTTLF2
1 3 +VTTLF3
1

22nF & 0.1uF for


1

1
C102 C103 C108 +1.8V_SUS
VCC_TVDACA:C_R should
2

10U/6.3V 0.1U/10V 22nF/3P_NC C495 C456 C455 R449 0/1206


2

be placed with in 250 0.47U/10V 0.47U/10V 0.47U/10V +VCC_SM_CK 1 2


2

2
mils from Crestline.

1
For EMI
R86 0 R79 0.03/F R84 0 R436
fine tune.

1
+VCC_TVBG_R 2 1 +VCC_TVBG 2 1 +VCC_TVDACB 1 2 +VCC_TVDACB_R 1/F/0603
C199 C534

1 2
3 1 1 3 +1.5V_RUN 22U/10V 0.1U/10V +VCC_SM_CK_L

2
1

R354 0
C111 C106 C104 C109 1 2 +VCCD_TVDAC_R C540
2

22nF/3P_NC 0.1U/10V 0.1U/10V 22nF/3P_NC 10U/6.3V


2

2
1

1 3
C444 +VCCQ_TVDAC_R
0.1U/10V C442
2

A 22nF/3P_NC A
R85 0
+3.3V_RUN +VCC_TVDACC 1 2 +VCC_TVDACC_R L47 R359 0
+1.5V_RUN 1 2 +VCCQ_TVDAC 1 2
D8 R78 10_NC 1 3 BLM18PG181SN1 QUANTA
1

2 1 +VCC_TVDAC_L 1 2 1 3
C105 C110 C448
FB_180ohm+-25%_
COMPUTER
2

CH751H-40HPT_NC 0.1U/10V 22nF/3P_NC 0.1U/10V C449


100mHz_1500mA_
2

TV DAC Voltage Follower Circuit -700 mV. 22nF/3P_NC Title


0.09ohm DC Crestline (POWER)

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 9 of 57


5 4 3 2 1
5 4 3 2 1

U9I U9J
C46 VSS_199 VSS_287 W11
A13 VSS_1 VSS_100 AW24 C50 VSS_200 VSS_288 W39
A15 VSS_2 VSS_101 AW29 C7 VSS_201 VSS_289 W43
A17 VSS_3 VSS_102 AW32 D13 VSS_202 VSS_290 W47
A24 VSS_4 VSS_103 AW5 D24 VSS_203 VSS_291 W5
AA21 VSS_5 VSS_104 AW7 D3 VSS_204 VSS_292 W7
AA24 VSS_6 VSS_105 AY10 D32 VSS_205 VSS_293 Y13
AA29 VSS_7 VSS_106 AY24 D39 VSS_206 VSS_294 Y2
D
AB20 VSS_8 VSS_107 AY37 D45 VSS_207 VSS_295 Y41 D
AB23 VSS_9 VSS_108 AY42 D49 VSS_208 VSS_296 Y45
AB26 VSS_10 VSS_109 AY43 E10 VSS_209 VSS_297 Y49
AB28 VSS_11 VSS_110 AY45 E16 VSS_210 VSS_298 Y5
AB31 VSS_12 VSS_111 AY47 E24 VSS_211 VSS_299 Y50
AC10 VSS_13 VSS_112 AY50 E28 VSS_212 VSS_300 Y11
AC13 VSS_14 VSS_113 B10 E32 VSS_213 VSS_301 P29
AC3 VSS_15 VSS_114 B20 E47 VSS_214 VSS_302 T29
AC39 VSS_16 VSS_115 B24 F19 VSS_215 VSS_303 T31
AC43 VSS_17 VSS_116 B29 F36 VSS_216 VSS_304 T33
AC47 VSS_18 VSS_117 B30 F4 VSS_217 VSS_305 R28
AD1 VSS_19 VSS_118 B35 F40 VSS_218
AD21 VSS_20 VSS_119 B38 F50 VSS_219
AD26 VSS_21 VSS_120 B43 G1 VSS_220
AD29 VSS_22 VSS_121 B46 G13 VSS_221 VSS_306 AA32
AD3 VSS_23 VSS_122 B5 G16 VSS_222 VSS_307 AB32
AD41 VSS_24 VSS_123 B8 G19 VSS_223 VSS_308 AD32
AD45 VSS_25 VSS_124 BA1 G24 VSS_224 VSS_309 AF28
AD49 VSS_26 VSS_125 BA17 G28 VSS_225 VSS_310 AF29
AD5 VSS_27 VSS_126 BA18 G29 VSS_226 VSS_311 AT27
AD50 VSS_28 VSS_127 BA2 G33 VSS_227 VSS_312 AV25
AD8 VSS_29 VSS_128 BA24 G42 VSS_228 VSS_313 H50
AE10 VSS_30 VSS_129 BB12 G45 VSS_229
AE14 VSS_31 VSS_130 BB25 G48 VSS_230
AE6 VSS_32 VSS_131 BB40 G8 VSS_231
AF20 BB44 H24
AF23
AF24
VSS_33
VSS_34
VSS_35
VSS VSS_132
VSS_133
VSS_134
BB49
BB8
H28
H4
VSS_232
VSS_233
VSS_234
AF31 VSS_36 VSS_135 BC16 H45 VSS_235
AG2 VSS_37 VSS_136 BC24 J11 VSS_236
C AG38 VSS_38 VSS_137 BC25 J16 VSS_237
C
AG43 VSS_39 VSS_138 BC36 J2 VSS_238
AG47 VSS_40 VSS_139 BC40 J24 VSS_239
AG50 VSS_41 VSS_140 BC51 J28 VSS_240
AH3 BD13 J33
AH40
AH41
VSS_42
VSS_43
VSS_44
VSS_141
VSS_142
VSS_143
BD2
BD28
J35
J39
VSS_241
VSS_242
VSS_243
VSS
AH7 VSS_45 VSS_144 BD45
AH9 VSS_46 VSS_145 BD48 K12 VSS_245
AJ11 VSS_47 VSS_146 BD5 K47 VSS_246
AJ13 VSS_48 VSS_147 BE1 K8 VSS_247
AJ21 VSS_49 VSS_148 BE19 L1 VSS_248
AJ24 VSS_50 VSS_149 BE23 L17 VSS_249
AJ29 VSS_51 VSS_150 BE30 L20 VSS_250
AJ32 VSS_52 VSS_151 BE42 L24 VSS_251
AJ43 VSS_53 VSS_152 BE51 L28 VSS_252
AJ45 VSS_54 VSS_153 BE8 L3 VSS_253
AJ49 VSS_55 VSS_154 BF12 L33 VSS_254
AK20 VSS_56 VSS_155 BF16 L49 VSS_255
AK21 VSS_57 VSS_156 BF36 M28 VSS_256
AK26 VSS_58 VSS_157 BG19 M42 VSS_257
AK28 VSS_59 VSS_158 BG2 M46 VSS_258
AK31 VSS_60 VSS_159 BG24 M49 VSS_259
AK51 VSS_61 VSS_160 BG29 M5 VSS_260
AL1 VSS_62 VSS_161 BG39 M50 VSS_261
AM11 VSS_63 VSS_162 BG48 M9 VSS_262
AM13 VSS_64 VSS_163 BG5 N11 VSS_263
AM3 VSS_65 VSS_164 BG51 N14 VSS_264
AM4 VSS_66 VSS_165 BH17 N17 VSS_265
B
AM41 VSS_67 VSS_166 BH30 N29 VSS_266 B
AM45 VSS_68 VSS_167 BH44 N32 VSS_267
AN1 VSS_69 VSS_168 BH46 N36 VSS_268
AN38 VSS_70 VSS_169 BH8 N39 VSS_269
AN39 VSS_71 VSS_170 BJ11 N44 VSS_270
AN43 VSS_72 VSS_171 BJ13 N49 VSS_271
AN5 VSS_73 VSS_172 BJ38 N7 VSS_272
AN7 VSS_74 VSS_173 BJ4 P19 VSS_273
AP4 VSS_75 VSS_174 BJ42 P2 VSS_274
AP48 VSS_76 VSS_175 BJ46 P23 VSS_275
AP50 VSS_77 VSS_176 BK15 P3 VSS_276
AR11 VSS_78 VSS_177 BK17 P50 VSS_277
AR2 VSS_79 VSS_178 BK25 R49 VSS_278
AR39 VSS_80 VSS_179 BK29 T39 VSS_279
AR44 VSS_81 VSS_180 BK36 T43 VSS_280
AR47 VSS_82 VSS_181 BK40 T47 VSS_281
AR7 VSS_83 VSS_182 BK44 U41 VSS_282
AT10 VSS_84 VSS_183 BK6 U45 VSS_283
AT14 VSS_85 VSS_184 BK8 U50 VSS_284
AT41 VSS_86 VSS_185 BL11 V2 VSS_285
AT49 VSS_87 VSS_186 BL13 V3 VSS_286
AU1 VSS_88 VSS_187 BL19
AU23 VSS_89 VSS_188 BL22
AU29 BL37 CRESTLINE_1p0
VSS_90 VSS_189
AU3 VSS_91 VSS_190 BL47
AU36 VSS_92 VSS_191 C12
AU49 VSS_93 VSS_192 C16
AU51 VSS_94 VSS_193 C19
AV39 VSS_95 VSS_194 C28
AV48 VSS_96 VSS_195 C29
A AW1 VSS_97 VSS_196 C33 A
AW12 VSS_98 VSS_197 C36
AW16 VSS_99 VSS_198 C41

CRESTLINE_1p0
QUANTA
Title
COMPUTER
Crestline (VSS)

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 10 of 57


5 4 3 2 1
1 2 3 4 5 6 7 8

32.768KHZ R515 10M +RTC_CELL +RTC_CELL


2 1

1
W2
R514 0 R520 R550
ICH_RTCX1 1 4 1 2 ICH_RTCX2 332K/F 332K/F

2
2 3 ICH_INTVRMEN ICH_LAN100_SLP

1
C618 32.768KHZ C625
A A
15P/50V 15P/50V

2
R522 R539
0_NC 0_NC

2
+RTC_CELL ICH8M Internal VR Enable Strap ICH8M LAN100 SLP Strap
(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5) (Internal VR for VccLAN1.05 and VccCL1.05)
Low = Internal VR Disabled Low = Internal VR Disabled

2
ICH_INTVRMEN High = Internal VR Enabled(Default) ICH_LAN100_SLP High = Internal VR Enabled(Default)
R534 R527 +1.05V_VCCP
1M 20K
U18A
2

1
ICH_RTCRST# ICH_RTCX1 AG25 E5
RTCX1 FWH0/LAD0 LPC_LAD0 31,32,40

2
ICH_INTRUDER# ICH_RTCX2 AF24 F5
RTCX2 FWH1/LAD1 LPC_LAD1 31,32,40
G8 R519 R518 R528
FWH2/LAD2 LPC_LAD2 31,32,40
1
ICH_RTCRST# AF23 F6 56_NC 56_NC 56
RTCRST# FWH3/LAD3 LPC_LAD3 31,32,40
C638

LPC
RTC
1U/10V ICH_INTRUDER# AD22 C4 LPC_LFRAME# 31,32,40
2

1
INTRUDER# FWH4/LFRAME# H_DPRSTP#
ICH_INTVRMEN AF25 G9 H_DPSLP#
INTVRMEN LDRQ0# LPC_LDRQ0# 32
ICH_LAN100_SLP AD21 E6 H_FERR#
LAN100_SLP LDRQ1#/GPIO23 LPC_LDRQ1# 32

T25 PAD GLAN_CLK B24 AF13 SIO_A20GATE


GLAN_CLK A20GATE SIO_A20GATE 31
A20M# AG26 H_A20M# 3
D22 LAN_RSTSYNC
Reserved for AF26 H_DPRSTP# +3.3V_RUN
DPRSTP# H_DPRSTP# 3,6,51
B
Intel Nineveh T30 PAD LAN_RXD0 C21 AE26 H_DPSLP# B

LAN / GLAN
LAN_RXD0 DPSLP# H_DPSLP# 3
T28 PAD LAN_RXD1 B21
design. LAN_RXD2 LAN_RXD1 H_FERR#
T89 PAD C22 LAN_RXD2 FERR# AD24 H_FERR# 3

2
T90 PAD LAN_TXD0
T92 PAD LAN_TXD1 D21 AG29 R566 R558
LAN_TXD2 LAN_TXD0 CPUPWRGD/GPIO49 H_PWRGOOD 3 10K 10K
T98 PAD E20 LAN_TXD1
C20 LAN_TXD2 IGNNE# AF27 H_IGNNE# 3

CPU

1
T29 PAD AH21 AE24 SIO_A20GATE
GLAN_DOCK#/GPIO13 INIT# H_INIT# 3
R551 1 2 33 ACZ_BIT_CLK AC20 SIO_RCIN#
30 ICH_AZ_MDC_BITCLK INTR H_INTR 3
R552 1 2 33 R521 24.9/F D25 AH14 SIO_RCIN#
38 ICH_AZ_CODEC_BITCLK GLAN_COMPI RCIN# SIO_RCIN# 31
+1.5V_PCIE_ICH 1 2 GLAN_COMP C25 GLAN_COMPO
NMI AD23 H_NMI 3
2

ACZ_BIT_CLK AJ16 AG28


HDA_BIT_CLK SMI# H_SMI# 3 +1.05V_VCCP
C649 C646 ACZ_SYNC AJ15
27P/50V_NC 27P/50V_NC HDA_SYNC
AA24 H_STPCLK# 3
1

ACZ_RST# STPCLK#
AE14 HDA_RST#

2
AE27 THERMTRIP#_ICH
THRMTRIP# R517
38 ICH_AZ_CODEC_SDIN0 AJ17 HDA_SDIN0 PAD T88
R547 1 2 33 ACZ_SYNC AH17 AA23 56
30 ICH_AZ_MDC_SYNC 30 ICH_AZ_MDC_SDIN1

IHDA
R546 33 HDA_SDIN1 TP8 IDE_DD[0..15]
38 ICH_AZ_CODEC_SYNC 1 2 T31 PAD AH15 HDA_SDIN2 IDE_DD[0..15] 26
R556 1 2 33 ACZ_RST# T111PAD AD13 V1 IDE_DD0
30 ICH_AZ_MDC_RST#

1
R555 33 HDA_SDIN3 DD0 IDE_DD1 THERMTRIP#_ICH
38 ICH_AZ_CODEC_RST# 1 2 DD1 U2
R562 1 2 33 ACZ_SDOUT ACZ_SDOUT AE13 V3 IDE_DD2
30 ICH_AZ_MDC_SDOUT HDA_SDOUT DD2
R557 1 2 33 T1 IDE_DD3
38 ICH_AZ_CODEC_SDOUT DD3
AE10 V4 IDE_DD4
HDA_DOCK_EN#/GPIO33 DD4 IDE_DD5
AG14 HDA_DOCK_RST#/GPIO34 DD5 T5
Place all series terms close to ICH8 except for SDIN input AB2 IDE_DD6
SATA_ACT#_R DD6 IDE_DD7
lines,which should be close to source.Placement of R292, R286, AF10 SATALED# DD7 T6
T3 IDE_DD8
C R283 & R289 should equal distance to the T split trace point as DD8 IDE_DD9 C
26 SATA_RX0- AF6 SATA0RXN DD9 R2
R291, R285, R284 & R290 respective. Basically,keep the same 26 SATA_RX0+ AF5 SATA0RXP DD10 T4 IDE_DD10
distance from T for all series termination resistors. SATA_TX0-_C AH5 V6 IDE_DD11
SATA_TX0+_C SATA0TXN DD11 IDE_DD12
AH6 SATA0TXP DD12 V5
U1 IDE_DD13

IDE
DD13 IDE_DD14
AG3 SATA1RXN DD14 V2
AG4 U6 IDE_DD15
C668 SATA_TX0-_C SATA1RXP DD15
26 SATA_TX0- 2 1 3900P/25V AJ4 SATA1TXN
C667 2 1 3900P/25V SATA_TX0+_C AJ3 AA4 IDE_DA0

SATA
26 SATA_TX0+ SATA1TXP DA0 IDE_DA0 26
AA1 IDE_DA1
DA1 IDE_DA1 26
AF2 AB3 IDE_DA2
SATA2RXN DA2 IDE_DA2 26
Distance between the ICH-8 M and cap on the "P" AF1 SATA2RXP
signal should be identical distance between the AE4 Y6 IDE_DCS1#
SATA2TXN DCS1# IDE_DCS1# 26
AE3 Y5 IDE_DCS3#
ICH-6 M and cap on the "N" signal for same pair. SATA2TXP DCS3# IDE_DCS3# 26

17 CLK_PCIE_SATA# AB7 SATA_CLKN DIOR# W4 IDE_DIOR# 26


17 CLK_PCIE_SATA AC6 SATA_CLKP DIOW# W3 IDE_DIOW# 26
DDACK# Y2 IDE_DDACK# 26
This circuit is Place within 500mils R585 24.9/F AG1 Y3
SATARBIAS# IDEIRQ IDE_IRQ 26
of ICH8 ball 2 1 SATABIAS AG2 Y1
only needed if the +3.3V_RUN SATARBIAS IORDY
W5
IDE_DIORDY 26
DDREQ IDE_DDREQ 26
platform has the
SNIFFER. ICH8M REV 1.0
1

R571
10K +3.3V_RUN
32,35 LED_MASK#
2

D 3 1 SATA_ACT#_R XOR Chain Entrance Strap R563 D


36 SATA_ACT#
1K_NC
ICH RSVD HDA SDOUT Description
Q68
QUANTA
1

2N7002W-7-F 0 0 RSVD ACZ_SDOUT


ICH_RSVD 13
R575 0_NC 0 1 Enter XOR Chain
COMPUTER
2

1 2
1 0 Normal Operation (Default) R542 Title
1K_NC ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)
1 1 Set PCIE port config bit 1
Size Document Number Rev
1

JM7 1A

Date: Wednesday, June 28, 2006 Sheet 11 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

U18D
29 PCIE_RX1- P27 PERN1 DMI0RXN V27 DMI_MTX_IRX_N0 6
Place TX DC blocking caps close ICH8. P26 V26

Direct Media Interface


29 PCIE_RX1+ PERP1 DMI0RXP DMI_MTX_IRX_P0 6
PCIE_TXN1_C N29 U29
PETN1 DMI0TXN DMI_MRX_ITX_N0 6
C621 1 2 0.1U/10V PCIE_TXN1_C MiniWWAN PCIE_TXP1_C N28 U28
29 PCIE_TX1- PETP1 DMI0TXP DMI_MRX_ITX_P0 6
C622 1 2 0.1U/10V PCIE_TXP1_C
29 PCIE_TX1+
29 PCIE_RX2- M27 PERN2 DMI1RXN Y27 DMI_MTX_IRX_N1 6
29 PCIE_RX2+ M26 PERP2 DMI1RXP Y26 DMI_MTX_IRX_P1 6
C620 1 2 0.1U/10V PCIE_TXN2_C PCIE_TXN2_C L29 W29
29 PCIE_TX2- PETN2 DMI1TXN DMI_MRX_ITX_N1 6
C619 1 2 0.1U/10V PCIE_TXP2_C MiniWLAN PCIE_TXP2_C L28 W28
29 PCIE_TX2+ PETP2 DMI1TXP DMI_MRX_ITX_P1 6
K27 AB26

PCI-Express
PERN3 DMI2RXN DMI_MTX_IRX_N2 6
C623 1 2 0.1U/10V PCIE_TXN4_C K26 AB25
A 28 PCIE_TX4- PERP3 DMI2RXP DMI_MTX_IRX_P2 6 A
C624 1 2 0.1U/10V PCIE_TXP4_C J29 AA29
28 PCIE_TX4+ PETN3 DMI2TXN DMI_MRX_ITX_N2 6
J28 PETP3 DMI2TXP AA28 DMI_MRX_ITX_P2 6
C626 1 2 0.1U/10V GLAN_TXN_C H27 AD27
40 PCIE_TX6-/GLAN_TX- 28 PCIE_RX4- PERN4 DMI3RXN DMI_MTX_IRX_N3 6
C627 1 2 0.1U/10V GLAN_TXP_C H26 AD26
40 PCIE_TX6+/GLAN_TX+ 28 PCIE_RX4+ PERP4 DMI3RXP DMI_MTX_IRX_P3 6
PCIE_TXN4_C G29 AC29
PETN4 DMI3TXN DMI_MRX_ITX_N3 6
Express Card PCIE_TXP4_C G28 AC28
PETP4 DMI3TXP DMI_MRX_ITX_P3 6
F27 PERN5 DMI_CLKN T26 CLK_PCIE_ICH# 17
F26 PERP5 DMI_CLKP T25 CLK_PCIE_ICH 17
E29 PETN5
E28 Y23 R537 24.9/F
PETP5 DMI_ZCOMP DMI_COMP
DMI_IRCOMP Y24 2 1 +1.5V_PCIE_ICH Place within 500mils of ICH8
40 PCIE_RX6-/GLAN_RX- D27 PERN6/GLAN_RXN
40 PCIE_RX6+/GLAN_RX+ D26 PERP6/GLAN_RXP USBP0N G3 ICH_USBP0- 33 Ext Side Top
GLAN_TXN_C C29 G2 ICH_USBP0+ 33
GLAN_TXP_C PETN6/GLAN_TXN USBP0P
Giga Bit LOM C28 PETP6/GLAN_TXP USBP1N H5 ICH_USBP1- 33 Ext Side Bottom
USBP1P H4 ICH_USBP1+ 33
R530 1 2 15 ICH_EC_SPI_CLK_R C23 H2 ICH_USBP2- 33 Ext Back Bottom
31 ICH_EC_SPI_CLK SPI_CLK USBP2N
Layout Note: ICH_SPI_CS# B23 H1 ICH_USBP2+ 33
ICH_SPI_CS1#_R SPI_CS0# USBP2P
Place R288,R324 and R282 E22 J3 ICH_USBP3- 33 Power USB

SPI
SPI_CS1# USBP3N
USBP3P J2 ICH_USBP3+ 33
within 500 mils from ICH. R531 1 2 15 ICH_EC_SPI_DO_R D23 K5 ICH_USBP4- 28 Smart Card
31 ICH_EC_SPI_DO SPI_MOSI USBP4N
31 ICH_EC_SPI_DIN F21 SPI_MISO USBP4P K4 ICH_USBP4+ 28
K2 ICH_USBP5- 35 Biometric PCI Pullups +3.3V_RUN
USB_OC0_1# USBP5N RP43
33 USB_OC0_1# AJ19 OC0# USBP5P K1 ICH_USBP5+ 35
+3.3V_ALW
AG16 OC1#/GPIO40 USBP6N L3 ICH_USBP6- 28 Express Card 6 5
USB_OC2_3#
33 USB_OC2_3# AG15
AE15
OC2#/GPIO41 USB USBP6P L2
M5
ICH_USBP6+
ICH_USBP7-
28
35 Blue Tooth
7
8
4
3 PCI_STOP#
R526 OC4# OC3#/GPIO42 USBP7N PCI_FRAME#
B AF15 OC4#/GPIO43 USBP7P M4 ICH_USBP7+ 35 9 2 B
5

U17 15 OC5# AG17 M2 ICH_USBP8- 43 Dock 10 1 PCI_REQ1#


R523 15_NC ICH_SPI_CS# OC6# OC5#/GPIO29 USBP8N +3.3V_RUN
2 1 2 AD12 OC6#/GPIO30 USBP8P M1 ICH_USBP8+ 43
1 2 4 OC7# AJ18 N3 ICH_USBP9- 29 WWAN
34 SPI_CS0# OC7#/GPIO31 USBP9N 10P8R-8.2K
1 OC8# AD14 N2 ICH_USBP9+ 29 +3.3V_RUN
SIO_SPI_CS# 31 OC8# USBP9P RP45
R262 0 OC9# AH18
7SH08_NC OC9# PCI_DEVSEL#
1 2 USBRBIAS# F2 6 5
F3 USBRBIAS ICH_GPIO4_PIRQG# 7 4 PCI_SERR#
USBRBIAS ICH_GPIO3_PIRQF#
8 3
ICH8M REV 1.0 PCI_PIRQD# 9 2 ICH_GPIO2_PIRQE#
10 1 PCI_TRDY#
+3.3V_RUN

2
Non-iAMT Short F2 and F3 at the package
+3.3V_SUS R581
RP48 and keep length to less than 22.6/F
10P8R-8.2K
+3.3V_RUN
OC6# 6 5
500mils. Trace Impedance RP46
OC4# 7 4 OC8# should be 60ohms +/- 15%. ICH_GPIO5_PIRQH# 6 5

1
OC5# 8 3 USB_OC2_3# PCI_REQ0# 7 4 PCI_PIRQC#
OC7# 9 2 USB_OC0_1# PCI_PLOCK# 8 3 PCI_PIRQB#
10 1 OC9# PCI_PERR# 9 2 PCI_PIRQA#
+3.3V_SUS PCI_IRDY#
+3.3V_RUN 10 1
ICH_SPI_CS1#_R Boot BIOS Strap
10P8R-10K
PCI_GNT0#
10P8R-8.2K
GNT0# SPI_CS1#

2
LPC 11 No stuff No stuff
R578 R529 SB_WWAN_PCIE_RST# R543 2 1 20K
27,42 PCI_AD[0..31] U18B 1K 1K_NC PCI 10 No stuff Stuff SB_WLAN_PCIE_RST# R554 2 1 20K
PCI_AD0 D20 A4 PCI_REQ0# SB_LOM_PCIE_RST# R565 2 1 20K
PCI_REQ0# 43

1
PCI_AD1 AD0 REQ0# PCI_GNT0#
E19 AD1 PCI GNT0# D7 PCI_GNT0# 42 SPI 01 Stuff No stuff
PCI_AD2 D19 E18 PCI_REQ1#
C AD2 REQ1#/GPIO50 PCI_REQ1# 27 C
PCI_AD3 A20 C18 PCI_GNT1# BIOS should not enable the
AD3 GNT1#/GPIO51 PCI_GNT1# 27
PCI_AD4 D17 B19 SB_WWAN_PCIE_RST# internal GPIO pull up resistor.
AD4 REQ2#/GPIO52 SB_WWAN_PCIE_RST# 29
PCI_AD5 A21 F18 SB_WLAN_PCIE_RST#
AD5 GNT2#/GPIO53 SB_WLAN_PCIE_RST# 29
PCI_AD6 A19 A11 SB_LOM_PCIE_RST#
AD6 REQ3#/GPIO54 SB_LOM_PCIE_RST# 40
PCI_AD7 C19 C10 SB_NB_PCIE_RST#
AD7 GNT3#/GPIO55 SB_NB_PCIE_RST# 6
PCI_AD8 SB_NB_PCIE_RST#
PCI_AD9
A18
B16
AD8
C17
Non-iAMT +3.3V_SUS Add Buffers as needed for
AD9 C/BE0# PCI_C_BE0# 27,42

2
PCI_AD10 A12 E15 C691 Loading and fanout concerns.
AD10 C/BE1# PCI_C_BE1# 27,42
PCI_AD11 E16 F16 1 2
AD11 C/BE2# PCI_C_BE2# 27,42
PCI_AD12 A14 E17 R559
AD12 C/BE3# PCI_C_BE3# 27,42
PCI_AD13 G16 1K_NC 0.047U/10V
AD13

5
PCI_AD14 A15 C8 PCI_IRDY# U42
PCI_IRDY# 27,42

1
PCI_AD15 AD14 IRDY#
B6 AD15 PAR D9 PCI_PAR 27,42 2
PCI_AD16 C11 G6 PCI_RST#_G 4
AD16 PCIRST# PCI_RST# 27,28,42
PCI_AD17 A9 D16 PCI_DEVSEL# PCI_RST#_G 1
AD17 DEVSEL# PCI_DEVSEL# 27,42
PCI_AD18 D11 A7 PCI_PERR# A16 away override strap.
AD18 PERR# PCI_PERR# 27,42
PCI_AD19 B12 B7 PCI_PLOCK# 7SH32
AD19 PLOCK# PCI_PLOCK# 42
PCI_AD20 C12 F10 PCI_SERR# Low = A16 swap override enabled.
AD20 SERR# PCI_SERR# 27,42
PCI_AD21 D10 C16 PCI_STOP# SB_NB_PCIE_RST# High = Default. +3.3V_SUS
AD21 STOP# PCI_STOP# 27,42
PCI_AD22 C7 C9 PCI_TRDY# C614
AD22 TRDY# PCI_TRDY# 27,42
PCI_AD23 F13 A17 PCI_FRAME# 1 2
AD23 FRAME# PCI_FRAME# 27,42
PCI_AD24 E11
PCI_AD25 AD24
E13 AD25 PLTRST# AG24 PCI_PLTRST# CLK_PCI_ICH 0.047U/10V

5
PCI_AD26 E12 B10 CLK_PCI_ICH U39
AD26 PCICLK CLK_PCI_ICH 17

2
PCI_AD27 D8 G7 2
AD27 PME# ICH_PME# 32
PCI_AD28 A6 4
AD28 PLTRST# 6,18,28,29,31,32,40
PCI_AD29 E8 R564 PCI_PLTRST# 1
PCI_AD30 AD29 10_NC
D6 AD30
PCI_AD31 A3 7SH32

2 1
AD31
D DOCK REQ0 GNT0 PIRQA D

PCI_PIRQA# F9
Interrupt I/F F8 ICH_GPIO2_PIRQE# Cardbus or C655
42 PCI_PIRQA# PIRQA# PIRQE#/GPIO2
PCI_PIRQB# B5 G11 ICH_GPIO3_PIRQF# REQ1 GNT1 PIRQD 8.2P/16V_NC
T107 PAD Cardbus/1394
QUANTA
1

PCI_PIRQC# PIRQB# PIRQF#/GPIO3 ICH_GPIO4_PIRQG#


T109 PAD C5 PIRQC# PIRQG#/GPIO4 F12
PCI_PIRQD# A10 B3 ICH_GPIO5_PIRQH# PIRQC
27 PCI_PIRQD# PIRQD# PIRQH#/GPIO5
ICH8M REV 1.0
1394/MediaCard REQ2 GNT2 PIRQD Reserved for EMI.
Place resister and cap Title
COMPUTER
close to ICH. ICH8-M (USB,DMI,PCIE,PCI)

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 12 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Place these close to ICH7.

CLK_ICH_48M
+3.3V_SUS Non-iAMT

1
A A

R541 2 1 10K RSV_ICH_CL_RST1# +3.3V_RUN R582


R545 2 1 10K ICH_RI# 10_NC
R532 2 1 10K SIO_EXT_SCI#
R548 2 1 1K ICH_PCIE_WAKE#

1 2
2
+3.3V_SUS
Non-iAMT
RP44 R568 C666
1 2 ICH_SMBDATA 8.2K 4.7P/50V_NC

2
3 4 ICH_SMBCLK

1
U18C
4P2R-2.2K ICH_SMBCLK AJ26 AJ12
28,29,40 ICH_SMBCLK ICH_SMBDATA SMBCLK SATA0GP/GPIO21
28,29,40 ICH_SMBDATA AD19 SMBDATA SATA1GP/GPIO19 AJ10

Clocks SATA
GPIO
RSV_ICH_CL_RST1# AG21 AF11 CLK_ICH_14M

SMB
T94 PAD LINKALERT# SATA2GP/GPIO36
T105 PAD AC17 SMLINK0 SATA3GP/GPIO37 AG11

1
T96 PAD AE19 SMLINK1
AG9 CLK_ICH_14M
+3.3V_RUN CLK14 CLK_ICH_14M 17
ICH_RI# AF17 G5 CLK_ICH_48M R574
RI# CLK48 CLK_ICH_48M 17
10_NC
T112 PAD RSV_LPCPD# F4 D3 ICH_SUSCLK
PAD T113

1 2
SUS_STAT#/LPCPD# SUSCLK
2

3,31 ITP_DBRESET# AD15 SYS_RESET#


SLP_S3# AG23 SIO_SLP_S3# 31
R570 AG12 AF21 C664
6 PM_BMBUSY# BMBUSY#/GPIO0 SLP_S4# PAD T84
8.2K AD18 4.7P/50V_NC
SIO_SLP_S5# 31

2
SIO_EXT_SCI# SLP_S5#
31 SIO_EXT_SCI# AG22
1

CLKRUN# SMBALERT#/GPIO11 RSV_SIO_S4_STATE#


S4_STATE#/GPIO26 AH27 PAD T24
17 H_STP_PCI# AE20

GPIO
STP_PCI#/GPIO15
1

AG18 AE23 ICH_PWRGD

SYS
17 H_STP_CPU# STP_CPU#/GPIO25 PWROK ICH_PWRGD 6,44
DPRSLPVR
DPRSLPVR 6,51
B R569 CLKRUN# AH11 AJ14 B

Power MGT
10_NC 27,31,32 CLKRUN# CLKRUN#/GPIO32 DPRSLPVR/GPIO16 R538 8.2K
ICH_PCIE_WAKE# AE17 AE21 ICH_BATLOW# 2 1 +3.3V_SUS
32 ICH_PCIE_WAKE#
2

IRQ_SERIRQ WAKE# BATLOW#


27,31,32,40 IRQ_SERIRQ AF12 SERIRQ
T106 PAD RSV_THRM# AC13 C2
THRM# PWRBTN# SIO_PWRBTN# 31
Option to " Disable " ICH_PWRGD R535 2 1 10K
clkrun. Pulling it down IMVP_PWRGD AJ20 AH20 RSV_ICH_LAN_RST#
31,44,51 IMVP_PWRGD VRMPWRGD LAN_RST# PAD T100
DPRSLPVR R560 1 2 100K
will keep the clks AJ22 AG27 ICH_RSMRST#
T26 PAD TP7 RSMRST# ICH_RSMRST# 31
running. ICH_RSMRST# R516 2 1 10K_NC
26 USB_IDE# AJ8 TACH1/GPIO1 CK_PWRGD E1 CLK_PWRGD 17
T33 PAD RSVD_GPIO6 AJ9 RSV_ICH_LAN_RST# R549 2 1 1M
SIO_EXT_WAKE# TACH2/GPIO6 ICH_CL_PWROK
32 SIO_EXT_WAKE# AH9 TACH3/GPIO7 CLPWROK E3 ICH_CL_PWROK 6,31
ICH_CL_PWROK R579 2 1 1M
31 SIO_EXT_SMI# AE16
AC19
GPIO8
AJ25 RSV_SIO_SLP_M# Non-iAMT
T91 PAD GPIO12 SLP_M# PAD T85
PCIE_MCARD1_DET# AG8
29 PCIE_MCARD1_DET# TACH0/GPIO17
USB_MCARD1_DET# AH12 F23

Controller Link
29 USB_MCARD1_DET# GPIO18 CL_CLK0 CL_CLK0 6
PCIE_MCARD2_DET# AE11 AE18 RSV_ICH_CL_CLK1

GPIO
29 PCIE_MCARD2_DET# GPIO20 CL_CLK1 PAD T104
USB_MCARD2_DET# AG10
29 USB_MCARD2_DET# SCLOCK/GPIO22
T83 PAD AH25 QRT_STATE0/GPIO27 CL_DATA0 F22 CL_DATA0 6
AD16 AF19 RSV_ICH_CL_DATA1
26 IDE_RST_MOD QRT_STATE1/GPIO28 CL_DATA1 PAD T97
17 SATA_CLKREQ# AG13 SATACLKREQ#/GPIO35
T114 PAD RSVD_GPIO38 AF9 D24 CL_VREF0
RSVD_GPIO39 SLOAD/GPIO38 CL_VREF0 CL_VREF1
T32 PAD AJ11 SDATAOUT0/GPIO39 CL_VREF1 AH23 PAD T87
T102 PAD RSVD_GPIO48 AD10 SDATAOUT1/GPIO48
CL_RST# AJ23 ICH_CL_RST0# 6
SPKR AD9
38 SPKR SPKR
AJ27

MISC
MEM_LED/GPIO24 PAD T22
R263 2 1 0 MCH_ICH_SYNC#_R AJ13 AJ24
6 MCH_ICH_SYNC# MCH_SYNC# ME_EC_ALERT/GPIO10 PAD T23
AF22 GPIO14
C EC_ME_ALERT/GPIO14 PAD T93 C
AJ21 AG19 RSV_WOL_EN
11 ICH_RSVD TP3 WOL_EN/GPIO9 PAD T95
ICH8M REV 1.0 R544 10K
+3.3V_RUN 2 1 +3.3V_SUS

UMA Package:RC0402-C +3.3V_RUN +3.3V_ALW


R261 2 1 2.2K_NC IMVP_PWRGD
Non-iAMT
Discrete Package: RC0402

2
+3.3V_RUN +3.3V_RUN R524 R536
Non-iAMT 3.24K/F 3.24K/F_NC
SMbus address D2
2

+3.3V_RUN

1
2
4
R561 2 1 10K RSV_THRM# R577 These are for CL_VREF0 CL_VREF1
R567 2 1 10K_NC MCH_ICH_SYNC#_R 1K_NC backdrive issue. RP42
R193 2 1 10K IRQ_SERIRQ 4P2R-2.2K
1

1
R267 2 1 10K RSVD_GPIO6 SPKR
2

1
R573 2 1 10K RSVD_GPIO38 C635 R525 C644 R533
1
3

R265 2 1 10K RSVD_GPIO39 Q41 0.1U/10V 453/F 0.1U/10V_NC 453/F_NC


R572 2 1 10K RSVD_GPIO48 No Reboot strap. 3 1
28,29,40 ICH_SMBDATA MEM_SDATA 15

2
R269 1 2 100K PCIE_MCARD1_DET#

2
R268 1 2 100K USB_MCARD1_DET# Low = Default.
R576 1 2 100K PCIE_MCARD2_DET# SPKR High = No Reboot. 2N7002W-7-F
R266 2 1 100K USB_MCARD2_DET#
+3.3V_RUN
2

D Q42 D

28,29,40 ICH_SMBCLK 3 1 MEM_SCLK 15

+3.3V_ALW
2N7002W-7-F QUANTA
R458 2 1 10K SIO_EXT_SMI#
Title
COMPUTER
ICH8-M (PM,GPIO,SMB,CL)

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 13 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+RTC_CELL U18E
+1.05V_VCCP
A23 VSS[001] VSS[099] K7

2
A5 VSS[002] VSS[100] L1

2
C611 C633 C612 AA2 L13
1U/10V 0.1U/10V 0.1U/10V C648 C659 VSS[003] VSS[101]
AA7 L15

1
R264 100 U18F 0.1U/10V 0.1U/10V +1.05V_VCCP +1.5V_RUN VSS[004] VSS[102]
A25 L26

1
D33 VSS[005] VSS[103]
+5V_RUN 1 2 AD25 VCCRTC VCC1_05[01] A13 AB1 VSS[006] VSS[104] L27
VCC1_05[02] B13 1 R540 AB24 VSS[007] VSS[105] L4
D18 A16 C13 AC11 L5
+ICH_V5REF_RUN V5REF[1] VCC1_05[03] VSS[008] VSS[106]
+3.3V_RUN 2 1 T7 V5REF[2] VCC1_05[04] C14 3 1 2 AC14 VSS[009] VSS[107] M12
VCC1_05[05] D14 AC25 VSS[010] VSS[108] M13

2
CH751H-40HPT G4 E14 2 10/0805 AC26 M14
C303 V5REF_SUS VCC1_05[06] VSS[011] VSS[109]
A VCC1_05[07] F14 AC27 VSS[012] VSS[110] M15 A
0.1U/10V AA25 G14 BAT54C AD17 M16

1
VCC1_5_B[01] VCC1_05[08] VSS[013] VSS[111]
Non-iAMT R276 10
AA26
AA27
VCC1_5_B[02] VCC1_05[09] L11
L12
AD20
AD28
VSS[014] VSS[112] M17
M23
VCC1_5_B[03] VCC1_05[10] VSS[015] VSS[113]
+5V_SUS 1 2 AB27 VCC1_5_B[04] VCC1_05[11] L14 AD29 VSS[016] VSS[114] M28
AB28 VCC1_5_B[05] VCC1_05[12] L16 AD3 VSS[017] VSS[115] M29
D19 AB29 L17 AD4 M3
+ICH_V5REF_SUS VCC1_5_B[06] VCC1_05[13] VSS[018] VSS[116]
+3.3V_SUS 2 1 D28 VCC1_5_B[07] VCC1_05[14] L18 AD6 VSS[019] VSS[117] N1
D29 VCC1_5_B[08] VCC1_05[15] M11 AE1 VSS[020] VSS[118] N11
2

CORE
CH751H-40HPT E25 M18 AE12 N12
C312 VCC1_5_B[09] VCC1_05[16] VSS[021] VSS[119]
E26 VCC1_5_B[10] VCC1_05[17] P11 1uH+-20%_800mA AE2 VSS[022] VSS[120] N13
0.1U/10V E27 P18 AE22 N14
1

VCC1_5_B[11] VCC1_05[18] L59 +1.5V_RUN VSS[023] VSS[121]


F24 VCC1_5_B[12] VCC1_05[19] T11 AD1 VSS[024] VSS[122] N15
F25 T18 1uH_800MA R512 1 AE25 N16
VCC1_5_B[13] VCC1_05[20] +1.5V_DMIPLL VSS[025] VSS[123]
G24 VCC1_5_B[14] VCC1_05[21] U11 2 1+1.5V_DMIPLL_R 2 1 AE5 VSS[026] VSS[124] N17
H23 VCC1_5_B[15] VCC1_05[22] U18 AE6 VSS[027] VSS[125] N18
H24 VCC1_5_B[16] VCC1_05[23] V11 AE9 VSS[028] VSS[126] N26

2
J23 VCC1_5_B[17] VCC1_05[24] V12 AF14 VSS[029] VSS[127] N27
J24 V14 C630 C615 AF16 N4
VCC1_5_B[18] VCC1_05[25] 0.01U/25V 10U/6.3V VSS[030] VSS[128]
K24 V16 AF18 N5

1
VCC1_5_B[19] VCC1_05[26] VSS[031] VSS[129]
K25 VCC1_5_B[20] VCC1_05[27] V17 AF3 VSS[032] VSS[130] N6
+1.5V_RUN L23 V18 AF4 P12
VCC1_5_B[21] VCC1_05[28] VSS[033] VSS[131]
L24 VCC1_5_B[22] AG5 VSS[034] VSS[132] P13

VCCA3GP
L25 VCC1_5_B[23] VCCDMIPLL R29 AG6 VSS[035] VSS[133] P14
1

M24 VCC1_5_B[24] AH10 VSS[036] VSS[134] P15


FB_330ohm+-25%_100mHz_ M25 AE28 +VCC_DMI +1.25V_RUN AH13 P16
L58 VCC1_5_B[25] VCC_DMI[1] VSS[037] VSS[135]
N23 AE29 AH16 P17
1.5A_0.09 ohm DC VCC1_5_B[26] VCC_DMI[2] VSS[038] VSS[136]

1
BLM21PG331SN1D N24 AH19 P23
VCC1_5_B[27] +V_CPU_IO C628 C291 VSS[039] VSS[137]
N25 VCC1_5_B[28] V_CPU_IO[1] AC23 AH2 VSS[040] VSS[138] P28
+1.5V_PCIE_ICH P24 AC24 0.1U/10V 22U/10V AF28 P29
2

2
VCC1_5_B[29] V_CPU_IO[2] +1.05V_VCCP VSS[041] VSS[139]
B P25 VCC1_5_B[30] AH22 VSS[042] VSS[140] R11 B
R24 VCC1_5_B[31] VCC3_3[01] AF29 +3.3V_RUN AH24 VSS[043] VSS[141] R12
R25 +V_CPU_IO AH26 R13
VCC1_5_B[32] VSS[044] VSS[142]
1

R26 VCC1_5_B[33] VCC3_3[02] AD2 AH3 VSS[045] VSS[143] R14


1

+ R27 VCC1_5_B[34] AH4 VSS[046] VSS[144] R15

1
C287 C637 C617 C640 T23 AC8 C654 C639 C641 AH8 R16
220U/4V 22U/10V 22U/10V 2.2U/10V VCC1_5_B[35] VCC3_3[03] C629 C673 0.1U/10V 0.1U/10V 4.7U/10V VSS[047] VSS[145]
T24 AD8 AJ5 R17
2

VCC1_5_B[36] VCC3_3[04] VSS[048] VSS[146]

VCCP_CORE
T27 AE8 0.1U/10V 0.1U/10V B11 R18

2
VCC1_5_B[37] VCC3_3[05] VSS[049] VSS[147]
T28 VCC1_5_B[38] VCC3_3[06] AF8 B14 VSS[050] VSS[148] R28
T29 VCC1_5_B[39] B17 VSS[051] VSS[149] R4
U24 VCC1_5_B[40] VCC3_3[07] AA3 B2 VSS[052] VSS[150] T12
U25 VCC1_5_B[41] VCC3_3[08] U7 B20 VSS[053] VSS[151] T13
V23 VCC1_5_B[42] VCC3_3[09] V7 B22 VSS[054] VSS[152] T14

2
V24 VCC1_5_B[43] VCC3_3[10] W1 B8 VSS[055] VSS[153] T15
V25 W6 C660 C24 T16
IDE

+1.5V_RUN VCC1_5_B[44] VCC3_3[11] 0.1U/10V VSS[056] VSS[154]


W25 W7 C26 T17

1
VCC1_5_B[45] VCC3_3[12] VSS[057] VSS[155]
Y25 VCC1_5_B[46] VCC3_3[13] Y7 C27 VSS[058] VSS[156] T2
C6 VSS[059] VSS[157] U12
1

+VCCSATPLL AJ6 A8 D12 U13


R277 VCCSATAPLL VCC3_3[14] VSS[060] VSS[158]
VCC3_3[15] B15 D15 VSS[061] VSS[159] U14
0 +1.5V_RUN AE7 B18 D18 U15
VCC1_5_A[01] VCC3_3[16] VSS[062] VSS[160]

2
AF7 VCC1_5_A[02] VCC3_3[17] B4 D2 VSS[063] VSS[161] U16
ARX

AG7 B9 C653 C636 C663 D4 U17


1 2

VCC1_5_A[03] VCC3_3[18] VSS[064] VSS[162]


1

+VCCSATPLL_L AH7 C15 0.1U/10V 0.1U/10V 0.1U/10V E21 U23

1
C669 VCC1_5_A[04] VCC3_3[19] VSS[065] VSS[163]
AJ7 D13 E24 U26
PCI

L40 1U/10V VCC1_5_A[05] VCC3_3[20] VSS[066] VSS[164]


D5 E4 U27
2

10uH/100MA VCC3_3[21] VSS[067] VSS[165]


AC1 VCC1_5_A[06] VCC3_3[22] E10 E9 VSS[068] VSS[166] U3
10uH+-20%_100mA AC2 VCC1_5_A[07] VCC3_3[23] E7
+3.3V_SUS +3.3V_RUN
F15 VSS[069] VSS[167] U5
ATX

AC3
AC4
VCC1_5_A[08] VCC3_3[24] F11 Non-iAMT E23
F28
VSS[070] VSS[168] V13
V15
2

C
+VCCSATPLL VCC1_5_A[09] VSS[071] VSS[169] C
+1.5V_RUN AC5 VCC1_5_A[10] VCCHDA AC12 F29 VSS[072] VSS[170] V28
F7 VSS[073] VSS[171] V29
1

AC10 VCC1_5_A[11] VCCSUSHDA AD11 G1 VSS[074] VSS[172] W2

2
C665 C315 C657 AC9 E2 W26
VCC1_5_A[12] VSS[075] VSS[173]

2
1U/10V 10U/6.3V 1U/10V J6 TP_VCCSUS1.05_1 C656 G10 W27
2

VCCSUS1_05[1] TP_VCCSUS1.05_2 PAD T108 C658 0.1U/10V VSS[076] VSS[174]


AA5 AF20 G13 Y28

1
VCC1_5_A[13] VCCSUS1_05[2] PAD T27 0.1U/10V VSS[077] VSS[175]
AA6 G19 Y29

1
VCC1_5_A[14] TP_VCCSUS1.5_1 VSS[078] VSS[176]
VCCSUS1_5[1] AC16 PAD T101 G23 VSS[079] VSS[177] Y4
G12 VCC1_5_A[15] G25 VSS[080] VSS[178] AB4
TP_VCCSUS1.5_2 +3.3V_SUS
G17
H7
VCC1_5_A[16] VCCSUS1_5[2] J7 PAD T110 Non-iAMT G26
G27
VSS[081] VSS[179] AB23
AB5
VCC1_5_A[17] +VCCSUS3_3[0~6] VSS[082] VSS[180]
VCCSUS3_3[01] C3 H25 VSS[083] VSS[181] AB6
AC7 VCC1_5_A[18] H28 VSS[084] VSS[182] AD5

1
+1.5V_RUN AD7 AC18 C313 C631 H29 U4
VCC1_5_A[19] VCCSUS3_3[02] 0.022U/16V 0.022U/16V VSS[085] VSS[183]
VCCSUS3_3[03] AC21 H3 VSS[086] VSS[184] W24
D1 AC22 H6

2
VCCUSBPLL VCCSUS3_3[04] VSS[087]
VCCPSUS

VCCSUS3_3[05] AG20 J1 VSS[088] VSS_NCTF[01] A1


+1.5V_RUN F1 VCC1_5_A[20] VCCSUS3_3[06] AH28 J25 VSS[089] VSS_NCTF[02] A2
USB CORE

L6 VCC1_5_A[21] J26 VSS[090] VSS_NCTF[03] A28


2

L7 VCC1_5_A[22] VCCSUS3_3[07] P6 J27 VSS[091] VSS_NCTF[04] A29


C671 C608 M6 P7 J4 AH1
0.1U/10V 0.1U/10V VCC1_5_A[23] VCCSUS3_3[08] VSS[092] VSS_NCTF[05]
M7 C1 J5 AH29
1

VCC1_5_A[24] VCCSUS3_3[09] +VCCSUS3_3[7~19] VSS[093] VSS_NCTF[06]


VCCSUS3_3[10] N7 K23 VSS[094] VSS_NCTF[07] AJ1
Non-iAMT W23 VCC1_5_A[25] VCCSUS3_3[11] P1 K28 VSS[095] VSS_NCTF[08] AJ2

1
P2 C661 K29 AJ28
TP_VCCSUSLAN1 F17 VCCSUS3_3[12] 0.1U/10V VSS[096] VSS_NCTF[09]
Place C929 T103PAD VCCLAN1_05[1] VCCSUS3_3[13] P3 K3 VSS[097] VSS_NCTF[10] AJ29
VCCPUSB

TP_VCCSUSLAN2 G18
close to A24. Non-iAMT T99 PAD VCCLAN1_05[2] VCCSUS3_3[14] P4
P5 2
K6 VSS[098] VSS_NCTF[11] B1
B29
VCCSUS3_3[15] VSS_NCTF[12]
+3.3V_RUN F19 VCCLAN3_3[1] VCCSUS3_3[16] R1
D +1.5V_RUN G20 R3 ICH8M REV 1.0 D
VCCLAN3_3[2] VCCSUS3_3[17]
2

VCCSUS3_3[18] R5
C645 +VCCGLANPLL A24 R6
+VCCGLANPLL 0.1U/10V VCCGLANPLL VCCSUS3_3[19]
QUANTA
1

GLAN POWER

A26 G22 TP_VCCCL1.05


VCCGLAN1_5[1] VCCCL1_05 PAD T86
2

+1.5V_PCIE_ICH A27
C634 VCCGLAN1_5[2] +VCCCL1_5
B26 VCCGLAN1_5[3] VCCCL1_5 A22
COMPUTER
2

0.1U/10V B27 C643 C642


1

VCCGLAN1_5[4] 0.1U/10V_NC 1U/10V_NC Title


B28 VCCGLAN1_5[5] VCCCL3_3[1] F20 +3.3V_RUN
1

C302 G21 ICH8-M (POWER,GND)


1

4.7U/6.3V VCCCL3_3[2]
B25 VCCGLAN3_3 Non-iAMT Size Document Number Rev
2

ICH8M REV 1.0 JM7 1A


+3.3V_RUN
Date: Wednesday, June 28, 2006 Sheet 14 of 57
1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

A is required to route to Top +1.8V_SUS +1.8V_SUS +1.8V_SUS +1.8V_SUS


DDR_A_DM[0..7] 7
SoDIMM for AMTto function. DDR_A_D[0..63] 7 DDR_B_DM[0..7] 7
V_DDR_MCH_REF V_DDR_MCH_REF
DDR_A_DQS[0..7] 7 DDR_B_D[0..63] 7
Ch.A SODIMM needs to be TOP DDR_A_DQS#[0..7] 7 BOT DDR_B_DQS[0..7] 7
populated for Intel AMT support. DDR_A_MA[0..13] 7,16 DDR_B_DQS#[0..7] 7
JDIM1 JDIM2
DDR_B_MA[0..13] 7,16
1 VREF VSS46 2 1 VREF VSS46 2
3 4 DDR_A_D4 V_DDR_MCH_REF 3 4 DDR_B_D0
DDR_A_D0 VSS47 DQ4 DDR_A_D1 DDR_B_D4 VSS47 DQ4 DDR_B_D1 V_DDR_MCH_REF
5 DQ0 DQ5 6 5 DQ0 DQ5 6
DDR_A_D5 7 8 DDR_B_D5 7 8
DQ1 VSS15 DDR_A_DM0 DQ1 VSS15 DDR_B_DM0
9 VSS37 DM0 10 9 VSS37 DM0 10
DDR_A_DQS#0 11 12 DDR_B_DQS#0 11 12
DQS#0 VSS5 DQS#0 VSS5

1
DDR_A_DQS0 13 14 DDR_A_D6 DDR_B_DQS0 13 14 DDR_B_D6
DQS0 DQ6 DQS0 DQ6

1
A A
15 16 DDR_A_D7 C571 C573 15 16 DDR_B_D7
DDR_A_D3 VSS48 DQ7 0.1U/10V 2.2U/6.3V DDR_B_D3 VSS48 DQ7 C580 C578
17 18 17 18

2
DDR_A_D2 DQ2 VSS16 DDR_A_D8 DDR_B_D2 DQ2 VSS16 DDR_B_D13 0.1U/10V 2.2U/6.3V
19 20 19 20

2
DQ3 DQ12 DDR_A_D13 DQ3 DQ12 DDR_B_D8
21 VSS38 DQ13 22 21 VSS38 DQ13 22
DDR_A_D12 23 24 DDR_B_D12 23 24
DDR_A_D9 DQ8 VSS17 DDR_A_DM1 DDR_B_D9 DQ8 VSS17 DDR_B_DM1
25 DQ9 DM1 26 25 DQ9 DM1 26
27 VSS49 VSS53 28 27 VSS49 VSS53 28
DDR_A_DQS#1 29 30 DDR_B_DQS#1 29 30
DQS#1 CK0 M_CLK_DDR0 6 DQS#1 CK0 M_CLK_DDR3 6
DDR_A_DQS1 31 32 DDR_B_DQS1 31 32
DQS1 CK0# M_CLK_DDR#0 6 DQS1 CK0# M_CLK_DDR#3 6
33 VSS39 VSS41 34 33 VSS39 VSS41 34
DDR_A_D14 35 36 DDR_A_D11 DDR_B_D15 35 36 DDR_B_D14
DDR_A_D15 DQ10 DQ14 DDR_A_D10 DDR_B_D11 DQ10 DQ14 DDR_B_D10
37 DQ11 DQ15 38 37 DQ11 DQ15 38
39 VSS50 VSS54 40 39 VSS50 VSS54 40

41 VSS18 VSS20 42 41 VSS18 VSS20 42


DDR_A_D20 43 44 DDR_A_D17 DDR_B_D17 43 44 DDR_B_D16
DDR_A_D16 DQ16 DQ20 DDR_A_D21 DDR_B_D20 DQ16 DQ20 DDR_B_D21
45 DQ17 DQ21 46 45 DQ17 DQ21 46
47 VSS1 VSS6 48 47 VSS1 VSS6 48
DDR_A_DQS#2 49 50 PM_EXTTS#0 PM_EXTTS#0 6 DDR_B_DQS#2 49 50 PM_EXTTS#1 PM_EXTTS#1 6
DDR_A_DQS2 DQS#2 NC3 DDR_A_DM2 DDR_B_DQS2 DQS#2 NC3 DDR_B_DM2
51 DQS2 DM2 52 51 DQS2 DM2 52
53 VSS19 VSS21 54 53 VSS19 VSS21 54
DDR_A_D18 55 56 DDR_A_D23 DDR_B_D18 55 56 DDR_B_D19 +1.8V_SUS Place these Caps near So-Dimm1.
DQ18 DQ22 DQ18 DQ22
PC4800 DDR2 SDRAM

PC4800 DDR2 SDRAM


DDR_A_D22 57 58 DDR_A_D19 DDR_B_D23 57 58 DDR_B_D22
DQ19 DQ23 DQ19 DQ23
SO-DIMM (200P)

SO-DIMM (200P)
59 VSS22 VSS24 60 59 VSS22 VSS24 60
DDR_A_D28 61 62 DDR_A_D24 DDR_B_D28 61 62 DDR_B_D25
DDR_A_D29 DQ24 DQ28 DDR_A_D25 DDR_B_D29 DQ24 DQ28 DDR_B_D24
63 DQ25 DQ29 64 63 DQ25 DQ29 64

1
65 66 65 66 C232 C231 C277 C284 C281
DDR_A_DM3 VSS23 VSS25 DDR_A_DQS#3 DDR_B_DM3 VSS23 VSS25 DDR_B_DQS#3 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V
67 DM3 DQS#3 68 67 DM3 DQS#3 68
69 70 DDR_A_DQS3 69 70 DDR_B_DQS3

2
NC4 DQS3 NC4 DQS3
B 71 VSS9 VSS10 72 71 VSS9 VSS10 72 B
DDR_A_D26 73 74 DDR_A_D30 DDR_B_D31 73 74 DDR_B_D30
DDR_A_D31 DQ26 DQ30 DDR_A_D27 DDR_B_D26 DQ26 DQ30 DDR_B_D27
75 DQ27 DQ31 76 75 DQ27 DQ31 76
77 VSS4 VSS8 78 77 VSS4 VSS8 78
79 80 79 80 +1.8V_SUS
6,16 DDR_CKE0_DIMMA CKE0 CKE1 DDR_CKE1_DIMMA 6,16 6,16 DDR_CKE3_DIMMB CKE0 CKE1 DDR_CKE4_DIMMB 6,16
81 VDD7 VDD8 82 81 VDD7 VDD8 82
83 NC1 A15 84 83 NC1 A15 84 Place these Caps near So-Dimm2.
DDR_A_BS2 85 86 DDR_B_BS2 85 86
7,16 DDR_A_BS2 A16_BA2 A14 DDR_A_MA14 6,16 7,16 DDR_B_BS2 A16_BA2 A14 DDR_B_MA14 6,16
87 VDD9 VDD11 88 87 VDD9 VDD11 88
DDR_A_MA12 89 90 DDR_A_MA11 DDR_B_MA12 89 90 DDR_B_MA11
A12 A11 A12 A11

1
DDR_A_MA9 91 92 DDR_A_MA7 DDR_B_MA9 91 92 DDR_B_MA7 C584 C567 C589 C564 C566
DDR_A_MA8 A9 A7 DDR_A_MA6 DDR_B_MA8 A9 A7 DDR_B_MA6 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V 2.2U/6.3V
93 A8 A6 94 93 A8 A6 94
95 96 95 96

2
DDR_A_MA5 VDD5 VDD4 DDR_A_MA4 DDR_B_MA5 VDD5 VDD4 DDR_B_MA4
97 A5 A4 98 97 A5 A4 98
DDR_A_MA3 99 100 DDR_A_MA2 DDR_B_MA3 99 100 DDR_B_MA2
DDR_A_MA1 A3 A2 DDR_A_MA0 DDR_B_MA1 A3 A2 DDR_B_MA0
101 A1 A0 102 101 A1 A0 102
103 VDD10 VDD12 104 103 VDD10 VDD12 104
DDR_A_MA10 105 106 DDR_A_BS1 DDR_B_MA10 105 106 DDR_B_BS1
A10/AP BA1 DDR_A_BS1 7,16 A10/AP BA1 DDR_B_BS1 7,16
DDR_A_BS0 107 108 DDR_A_RAS# DDR_B_BS0 107 108 DDR_B_RAS# +1.8V_SUS
7,16 DDR_A_BS0 BA0 RAS# DDR_A_RAS# 7,16 7,16 DDR_B_BS0 BA0 RAS# DDR_B_RAS# 7,16
DDR_A_WE# 109 110 DDR_B_WE# 109 110 Place these Caps near So-Dimm1.
7,16 DDR_A_WE# WE# S0# DDR_CS0_DIMMA# 6,16 7,16 DDR_B_WE# WE# S0# DDR_CS2_DIMMB# 6,16
111 VDD2 VDD1 112 111 VDD2 VDD1 112
DDR_A_CAS# 113 114 M_ODT0 DDR_B_CAS# 113 114 M_ODT2
7,16 DDR_A_CAS# CAS# ODT0 M_ODT0 6,16 7,16 DDR_B_CAS# CAS# ODT0 M_ODT2 6,16
115 116 DDR_A_MA13 115 116 DDR_B_MA13
6,16 DDR_CS1_DIMMA# S1# A13 6,16 DDR_CS3_DIMMB# S1# A13

1
117 VDD3 VDD6 118 117 VDD3 VDD6 118
M_ODT1 119 120 M_ODT3 119 120 C279 C280 C233 C234
6,16 M_ODT1 ODT1 NC2 6,16 M_ODT3 ODT1 NC2
121 122 121 122 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V

2
DDR_A_D37 VSS11 VSS12 DDR_A_D36 DDR_B_D37 VSS11 VSS12 DDR_B_D36
123 DQ32 DQ36 124 123 DQ32 DQ36 124
DDR_A_D33 125 126 DDR_A_D32 DDR_B_D33 125 126 DDR_B_D32
DQ33 DQ37 DQ33 DQ37
127 VSS26 VSS28 128 127 VSS26 VSS28 128
DDR_A_DQS#4 129 130 DDR_A_DM4 DDR_B_DQS#4 129 130 DDR_B_DM4 +1.8V_SUS
C
DDR_A_DQS4 DQS#4 DM4 DDR_B_DQS4 DQS#4 DM4 C
131 DQS4 VSS42 132 131 DQS4 VSS42 132 Place these Caps near So-Dimm2.
133 134 DDR_A_D38 133 134 DDR_B_D38
DDR_A_D39 VSS2 DQ38 DDR_A_D35 DDR_B_D35 VSS2 DQ38 DDR_B_D39
135 DQ34 DQ39 136 135 DQ34 DQ39 136
DDR_A_D34 +3.3V_RUN DDR_B_D34
137 DQ35 VSS55 138 Non-iAMT 137 DQ35 VSS55 138

1
139 140 DDR_A_D45 139 140 DDR_B_D44
DDR_A_D41 VSS27 DQ44 DDR_A_D44 DDR_B_D40 VSS27 DQ44 DDR_B_D45 C586 C585 C569 C568
141 DQ40 DQ45 142 141 DQ40 DQ45 142
DDR_A_D40 143 144 DDR_B_D41 143 144 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V

2
DQ41 VSS43 DQ41 VSS43
1

145 146 DDR_A_DQS#5 145 146 DDR_B_DQS#5


DDR_A_DM5 VSS29 DQS#5 DDR_A_DQS5 C583 C582 DDR_B_DM5 VSS29 DQS#5 DDR_B_DQS5
147 DM5 DQS5 148 147 DM5 DQS5 148
149 150 2.2U/6.3V 0.1U/10V 149 150
2

DDR_A_D42 VSS51 VSS56 DDR_A_D46 DDR_B_D43 VSS51 VSS56 DDR_B_D46


151 DQ42 DQ46 152 151 DQ42 DQ46 152
DDR_A_D43 153 154 DDR_A_D47 DDR_B_D42 153 154 DDR_B_D47
DQ43 DQ47 DQ43 DQ47
155 VSS40 VSS44 156 155 VSS40 VSS44 156
DDR_A_D53 157 158 DDR_A_D49 DDR_B_D52 157 158 DDR_B_D48
DDR_A_D48 DQ48 DQ52 DDR_A_D52 DDR_B_D49 DQ48 DQ52 DDR_B_D55
159 DQ49 DQ53 160 159 DQ49 DQ53 160
161 VSS52 VSS57 162 161 VSS52 VSS57 162
163 NCTEST CK1 164 M_CLK_DDR1 6 163 NCTEST CK1 164 M_CLK_DDR4 6
165 VSS30 CK1# 166 M_CLK_DDR#1 6 165 VSS30 CK1# 166 M_CLK_DDR#4 6
DDR_A_DQS#6 DDR_B_DQS#6 +3.3V_RUN
DDR_A_DQS6
167
169
DQS#6 VSS45 168
170 DDR_A_DM6 DDR_B_DQS6
167
169
DQS#6 VSS45 168
170 DDR_B_DM6 Non-iAMT
DQS6 DM6 DQS6 DM6
171 VSS31 VSS32 172 171 VSS31 VSS32 172
DDR_A_D54 173 174 DDR_A_D55 DDR_B_D54 173 174 DDR_B_D50
DQ50 DQ54 DQ50 DQ54

1
DDR_A_D51 175 176 DDR_A_D50 DDR_B_D51 175 176 DDR_B_D53
DQ51 DQ55 DQ51 DQ55 C219 C226
177 VSS33 VSS35 178 177 VSS33 VSS35 178
DDR_A_D60 179 180 DDR_A_D56 DDR_B_D56 179 180 DDR_B_D57 2.2U/6.3V 0.1U/10V

2
DDR_A_D57 DQ56 DQ60 DDR_A_D61 DDR_B_D60 DQ56 DQ60 DDR_B_D61
181 DQ57 DQ61 182 181 DQ57 DQ61 182
183 VSS3 VSS7 184 183 VSS3 VSS7 184
DDR_A_DM7 185 186 DDR_A_DQS#7 DDR_B_DM7 185 186 DDR_B_DQS#7
DM7 DQS#7 DDR_A_DQS7 DM7 DQS#7 DDR_B_DQS7
D DDR_A_D63
187
189
VSS34 DQS7 188
190 DDR_B_D58
187
189
VSS34 DQS7 188
190
Non-iAMT D
DDR_A_D59 DQ58 VSS36 DDR_A_D62 DDR_B_D59 DQ58 VSS36 DDR_B_D62
191
193
DQ59 DQ62 192
194 DDR_A_D58 Non-iAMT 191
193
DQ59 DQ62 192
194 DDR_B_D63
MEM_SDATA VSS14 DQ63 MEM_SDATA VSS14 DQ63 +3.3V_RUN
195 196 195 196
13 MEM_SDATA
13 MEM_SCLK
+3.3V_RUN
MEM_SCLK 197
199
SDA
SCL
VSS13
SA0 198
200 +3.3V_RUN
MEM_SCLK 197
199
SDA
SCL
VSS13
SA0 198
200 R469 2 1 10K
QUANTA
VDD(SPD) SA1 VDD(SPD) SA1
COMPUTER
2

TYC_1775804-2 FOX_AS0A426-M2SN-7F
SMbus address A0 R250 R247 SMbus address A4 R463 Title
10K 10K 10K DDR2 SO-DIMM (200P) X 2
Non-iAMT CLOCK 0,1 CLOCK 2,3
Size Document Number Rev
CKE 0,1 CKE 2,3
1

JM7 1A

Date: Wednesday, June 28, 2006 Sheet 15 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

TOP
+0.9V_DDR_VTT Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.

A A

1
C605 C604 C606 C607 C601 C597 C598 C554 C555 C551 C552 C553 C556 C293
0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V

2
+0.9V_DDR_VTT
BOT

1
C296 C294 C211 C295 C297 C298 C299 C217 C210 C212 C213 C214 C215 C603
0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V
2

2
B B
+0.9V_DDR_VTT
7,15 DDR_B_MA[0..13] DDR_A_MA[0..13] 7,15
RP34 RP14
DDR_B_MA7 2 1 1 2 DDR_A_MA7
DDR_B_MA11 4 3 3 4 DDR_A_MA11

4P2R-S-56 4P2R-S-56
RP33 RP13
DDR_B_MA4 2 1 1 2 DDR_A_MA4
DDR_B_MA6 4 3 3 4 DDR_A_MA6

4P2R-S-56 4P2R-S-56
RP31 RP11
DDR_B_RAS# 2 1 1 2 DDR_A_RAS#
7,15 DDR_B_RAS# DDR_A_RAS# 7,15
DDR_B_BS1 4 3 3 4 DDR_A_BS1
7,15 DDR_B_BS1 DDR_A_BS1 7,15
4P2R-S-56 4P2R-S-56
RP30 RP10
DDR_B_MA13 2 1 1 2 DDR_A_MA13
M_ODT2 4 3 3 4 M_ODT0
6,15 M_ODT2 M_ODT0 6,15
4P2R-S-56 4P2R-S-56
RP39 RP7
DDR_B_MA12 2 1 1 2 DDR_A_BS2
DDR_A_BS2 7,15
DDR_B_MA9 4 3 3 4 DDR_A_MA12

4P2R-S-56 4P2R-S-56
RP38 RP6
C C
DDR_B_MA8 2 1 1 2 DDR_A_MA9
Please these resistor DDR_B_MA5 4 3 3 4 DDR_A_MA8 Please these resistor
closely DIMMB,all 4P2R-S-56 4P2R-S-56
closely DIMMA,all
trace length<750 mil. RP37 RP5 trace length<750 mil.
DDR_B_MA3 2 1 1 2 DDR_A_MA5
DDR_B_MA1 4 3 3 4 DDR_A_MA3

4P2R-S-56 4P2R-S-56
RP36 RP9
DDR_B_MA10 2 1 1 2 DDR_A_MA10
DDR_B_BS0 4 3 3 4 DDR_A_BS0
7,15 DDR_B_BS0 DDR_A_BS0 7,15
4P2R-S-56 4P2R-S-56
RP40 RP8
DDR_B_WE# 2 1 1 2 DDR_A_WE#
7,15 DDR_B_WE# DDR_A_WE# 7,15
DDR_B_CAS# 4 3 3 4 DDR_A_CAS#
7,15 DDR_B_CAS# DDR_A_CAS# 7,15
4P2R-S-56 4P2R-S-56
RP32 RP12
DDR_B_MA0 2 1 1 2 DDR_A_MA0
DDR_B_MA2 4 3 3 4 DDR_A_MA2

4P2R-S-56 4P2R-S-56
R204 1 2 56 R486 2 1 56
6,15 M_ODT1 M_ODT3 6,15
DDR_A_MA1 R206 1 2 56 R492 2 1 56
DDR_B_BS2 7,15
R253 1 2 56 R464 2 1 56
6,15 DDR_CS0_DIMMA# DDR_CS2_DIMMB# 6,15
R205 1 2 56 R487 2 1 56
6,15 DDR_CS1_DIMMA# DDR_CS3_DIMMB# 6,15
R215 1 2 56 R488 2 1 56
6,15 DDR_CKE0_DIMMA DDR_CKE3_DIMMB 6,15
D R252 1 2 56 R474 2 1 56 D
6,15 DDR_CKE1_DIMMA DDR_CKE4_DIMMB 6,15
R254 1 2 56 R465 2 1 56
6,15 DDR_A_MA14 DDR_B_MA14 6,15

QUANTA
Title
COMPUTER
DDR2 RES ARRAY

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 16 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Y3
Add capacitor pads for improving WWAN. +3.3V_RUN
Non-iAMT Non-iAMT CLK_XTAL_IN 1 2 CLK_XTAL_OUT
C193 1 2 27P/50V_NC CLK_SMCARD_48M CLK_3GPLLREQ# R147 2 1 10K
+3.3V_RUN +3.3V_RUN C191 1 2 27P/50V_NC CLK_ICH_48M SATA_CLKREQ# R153 2 1 10K
14.318MHZ

1
C514 1 2 27P/50V_NC CLK_SIO_14M LOM_CLKREQ# R190 2 1 10K
C171 1 2 27P/50V_NC CLK_ICH_14M C525 C524 CARD_CLK_REQ# R152 2 1 10K
C169 1 2 27P/50V_NC CLK_PCI_5018 27P/50V 27P/50V MINI1CLK_REQ# R192 2 1 10K

2
2

2
C579 1 2 27P/50V_NC CLK_PCI_5025 MINI2CLK_REQ# R195 2 1 10K
R442 C184 27P/50V_NC CLK_PCI_PCCARD
A
10K_NC R156 C516
1
1
2
2 27P/50V_NC CLK_PCI_DOCK 14.318MHz A

10K_NC C181 1 2 27P/50V_NC CLK_PCI_TPM


C190 1 2 27P/50V_NC CLK_PCI_ICH
1

1
FSA PCI_LOM PGMODE R448 1 2 10K_NC
2

U34
Populate for Napa platforms only.
R438
10K_NC R155 1 7 +CK_VDD_A
10K VDD_SRC_01 VDDA
49 VDD_SRC_02 VSSA 8
54
CK505
1

VDD_SRC_03
65 VDD_SRC_04 PCI_STP# 25 H_STP_PCI# 13
+3.3V_RUN Non-iAMT +CK_VDD_MAIN2 CPU_STP# 24 H_STP_CPU# 13
0=UMA 30 VDD_PCI_01 MCH_BCLK
36 11 4 3 RP19 CLK_MCH_BCLK 5
1 = Disc. GRFX down R427 1 2 10K_NC PCI_PCCARD
VDD_PCI_02 CPUT1_MCH
10 MCH_BCLK# 2 1 4P2R-S-33 CLK_MCH_BCLK# 5
+CK_VDD_MAIN CPUC1_MCH
12 VDD_CPU
14 CPU_BCLK 4 3 RP17
CPUT0 CLK_CPU_BCLK 3
+CK_VDD_48 40 13 CPU_BCLK# 2 1 4P2R-S-33
VDD_48 CPUC0 CLK_CPU_BCLK# 3
+CK_VDD_REF 18 6 CPU_ITP 4 3 RP22
VDD_REF CPUT2_ITP/SRCT_10 CLK_CPU_ITP 3
5 CPU_ITP# 2 1 4P2R-S-33
CPUC2_ITP/SRCC_10 CLK_CPU_ITP# 3
CLK_XTAL_IN 20
R439 1 XIN
28 CLK_SMCARD_48M 2 15 CLK_XTAL_OUT 19 XOUT PGMODE 9 PGMODE R445 1 2 10K_NC +3.3V_RUN Non-iAMT
R440 1 2 15
13 CLK_ICH_48M
R441 1 2 8.2K FSA 41 3 PCIE_MINI1 4 3 RP24
3,6 CPU_MCH_BSEL0 48M/FSA SRCT_9 CLK_PCIE_MINI1 29
FSB 45 2 PCIE_MINI1# 2 1 4P2R-S-33
3,6 CPU_MCH_BSEL1 FSB/TEST_MODE SRCC_9 CLK_PCIE_MINI1# 29
R425 1 2 8.2K FSC 23 72
3,6 CPU_MCH_BSEL2 REF0/FSC_TEST_SEL CLKREQ9# MINI1CLK_REQ# 29
R424 2 1 15 70 PCIE_MINI2 4 3 RP29
32 CLK_SIO_14M SRCT_8 CLK_PCIE_MINI2 29
R150 2 1 15 CLKREF 22 69 PCIE_MINI2# 2 1 4P2R-S-33
13 CLK_ICH_14M REF1 SRCC_8 CLK_PCIE_MINI2# 29
B R151 2 1 15 71 B
32 CLK_PCI_5018 CLKREQ8# MINI2CLK_REQ# 29
R426 2 1 15 PCI_SIO 27 66 PCIE_ICH 2 1 RP26
31 CLK_PCI_5025 PCI1 SRCT_7 CLK_PCIE_ICH 12
R428 2 1 33 PCI_PCCARD 32 67 PCIE_ICH# 4 3 4P2R-S-33
+3.3V_RUN 27 CLK_PCI_PCCARD PCI2/TME SRCC_7 CLK_PCIE_ICH# 12
R429 33 PCI_DOCK
Non-iAMT 43 CLK_PCI_DOCK
R157
2
2
1
1 33 PCI_LOM
33
34
PCI3 CLKREQ7# 38
63
40 CLK_PCI_TPM PCI4/FCTSEL1 SRCT_6
2

Enable ITP SRCC_6 64


6 MCH_DREFCLK 4 3 RP20 27M_NSS 43 DOT96T/27M_NSS CLKREQ6# 62
10K
6 MCH_DREFCLK# 2 1 4P2R-S-33 27M_SS 44 DOT96C/27M_SS SRCT_5 60 PCIE_EXPCARD 2 1 RP27 CLK_PCIE_EXPCARD 28
R431 61 PCIE_EXPCARD# 4 3 4P2R-S-33
SRCC_5 CLK_PCIE_EXPCARD# 28
R434 2 1 33 PCI_ICH 37 29
12 CLK_PCI_ICH CARD_CLK_REQ# 28
1

PCIF0/ITP_SEL CLKREQ5# PCIE_LOM


SRCT_4 58 2 1 RP28 CLK_PCIE_LOM 40
PCI_ICH 39 59 PCIE_LOM# 4 3 4P2R-S-33 Broadcom
13 CLK_PWRGD VTT_PWRDG#/PD(CKPWRGD/PD#) SRCC_4 CLK_PCIE_LOM# 40
CLKREQ4# 57 LOM_CLKREQ# 40
CLK_SCLK 16 55 MCH_3GPLL 2 1 RP25
SCLK SRCT_3 CLK_MCH_3GPLL 6
CLK_SDATA 17 56 MCH_3GPLL# 4 3 4P2R-S-33
SDATA SRCC_3 CLK_MCH_3GPLL# 6
28 R154 2 1 475/F
CLKREQ3# CLK_3GPLLREQ# 6
SRCT_2 52
+3.3V_RUN
UMA without iAMT 15
31
VSS_01 SRCC_2 53
26
L55 VSS_02 CLKREQ2# PCIE_SATA
35 VSS_03 SRCT_1/SATAT 50 2 1 RP23 CLK_PCIE_SATA 11
1 2 +CK_VDD_MAIN 21 51 PCIE_SATA# 4 3 4P2R-S-33
VSS_04 SRCC_1/SATAC CLK_PCIE_SATA# 11
BLM21PG600SN1D 4 46
VSS_05 CLKREQ1# SATA_CLKREQ# 13
120 ohms@100Mhz 42 VSS_06
1

68 47 DOT96_SSC 3 4 RP21
VSS_07 SRCT_0/LCD100MT DREF_SSCLK 6
C550 C547 C541 C548 C197 C549 48 DOT96_SSC# 1 2 4P2R-S-33
SRCC_0/LCD100MC DREF_SSCLK# 6
0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 10U/6.3V
2

CY28547LFXC FSC FSB FSA CPU SRC PCI


C
R175 2.2
1 0 1 100 100 33 C

+CK_VDD_A +3.3V_ALW +3.3V_RUN 0 0 1 133 100 33


1 2 Non-iAMT
SMbus address D2 0 1 1 166 100 33
1

2
4
C543 C194 0 1 0 200 100 33
L52 0.047U/10V 4.7U/6.3V These are for
2

1 2 +CK_VDD_MAIN2 backdrive issue. R149 RP16 0 0 0 266 100 33


BLM21PG600SN1D 2.2K 4P2R-2.2K
120 ohms@100Mhz 1 1 0 0 333 100 33
1

1
3
C522 C527 C521 Q22 1 1 0 400 100 33
0.1U/10V 0.1U/10V 10U/6.3V 3 1 CLK_SDATA
31 CKG_SMBDAT
2

1 1 1 RSVD 100 33
2N7002W-7-F

R148 0_NC PCI_LOM = FCTSEL1


R432 2.2 1 2
1 2 +CK_VDD_48 FCTSEL1 PIN43 PIN44 PIN47 PIN48
+3.3V_ALW +3.3V_RUN (PIN34)
1

C536 C537
96/ 96/
0=UMA DOT96T DOT96C 100M_T 100M_C
2

0.047U/10V 4.7U/6.3V
2

R162 1 = Disc.
2.2K
GRFX down 27Mout 27MSSout SRCT0 SRCC0
1

D R433 1 D
2

1 2 +CK_VDD_REF
Q23
3 1 CLK_SCLK
31 CKG_SMBCLK
QUANTA
1

C531
0.047U/10V
2N7002W-7-F
COMPUTER
2

R167 0_NC Title


1 2 CLOCK GENERATOR

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 17 of 57


1 2 3 4 5 6 7 8
5 4 3 2 1

D D

L25
+3.3V_RUN SIL_VCC 1 2 +1.8V_RUN
BLM11A121S
U5

1
SIL 1362ACLU Tx
2

C82 C75 C74 C422


64 Pin TQFP 0.1U/10V 10U/6.3V 0.1U/10V 0.1U/10V

2
R73 R74 29 37
43 DVI_DETECT HTPLG SDVOB_R+ SDVOB_RED+ 6
4.7K 4.7K SIL_A1 6 CONFIG/ 38
A1 SDVOB_R- SDVOB_RED- 6
SDVO_CTRLDATA 4 40
6 SDVO_CTRLDATA SDVOB_GREEN+ 6
1

SDVO_CTRLDATA SDVO_CTRLCLK SDSDA PROGRAM SDVOB_G+


6 SDVO_CTRLCLK 5 SDSCL SDVOB_G- 41 SDVOB_GREEN- 6
SDVO_CTRLCLK 2 SDVO SDVOB_B+ 43 L22
6,12,28,29,31,32,40 PLTRST# RESET# SDVOB_BLUE+ 6
44 SIL_AVCC 1 2 +3.3V_RUN
SDVOB_B- SDVOB_BLUE- 6
C DVI_TX0+ 17 46 BLM11A121S C
43 DVI_TX0+ TX0+ SDVOB_CLK+ SDVOB_CLK+ 6
DVI_TX0- 16 47
43 DVI_TX0- TX0- SDVOB_CLK- SDVOB_CLK- 6

1
DVI_TX1+ 20
43 DVI_TX1+ TX1+
DVI_TX1- 19 I2C 32 INT+ C77 2 1 0.1U/10V C62 C63 C60
43 DVI_TX1- TX1- SDVOB_INT+ SDVOB_INT+ 6
DVI_TX2+ 23 33 INT- C80 2 1 0.1U/10V 0.1U/10V 0.1U/10V 10U/6.3V
43 DVI_TX2+ SDVOB_INT- 6

2
+3.3V_RUN DVI_TX2- 22
TX2+ Master SDVOB_INT-
35 R75 2 1 1K
43 DVI_TX2- TX2- EXT_RES
DVI_CLK+ 14
43 DVI_CLK+ TXC+
DVI_CLK- 13
43 DVI_CLK- TXC-
1

R68 220
SIL_AVCC 1 2 EXT_SWING 25 10 SIL_VCC L23
R72 DVI_SDAT EXT_SWING VCC1 SIL_PVCC1
43 DVI_SDAT 9 SDADCC VCC2 28 1 2 +3.3V_RUN
1K_NC DVI_SCLK 8 34 BLM11A121S
43 DVI_SCLK SCLDDC VCC3
30 15 SIL_AVCC
2

TEST AVCC1

1
SIL_A1 21
AVCC2 C65 C67
7 GND1 POWER/
1

31 11 SIL_PVCC1 10U/6.3V 0.1U/10V

2
18
GND2 GROUND PVCC1
26 SIL_PVCC2
R71 AGND1 PVCC2
24 AGND2
1K 12 36 SIL_SVCC
AGND/PGND1 SVCC1
27 42
2

PGND2 SVCC2 L24


39 SGND1
45 48 SIL_SPVCC SIL_PVCC2 1 2 +3.3V_RUN
SGND2 SPVCC BLM11A121S
3 SPGND OVCC 1 +3.3V_RUN

1
1

1
SI1362ACLU C64 C66
C83 C93 10U/6.3V 0.1U/10V

2
+5V_RUN 0.1U/10V 10U/6.3V

2
B B
2

L27
Placed this capacitor SIL_SVCC 1 2 +1.8V_RUN
R70 R69 close to OVCC. BLM18PG181SN1
2.2K 2.2K

1
1

DVI_SDAT C90 C91 C98


DVI_SCLK 0.1U/10V 0.1U/10V 10U/6.3V

2
L26
SIL_SPVCC 1 2 +3.3V_RUN
BLM11A121S
DVI_TX0+ R346 1 2 110/F C414 1 2 0.1U/10V DVI_TX0-

1
DVI_TX1+ R345 1 2 110/F C413 1 2 0.1U/10V DVI_TX1-
DVI_TX2+ R349 1 2 110/F C421 1 2 0.1U/10V DVI_TX2- C97 C92
DVI_CLK+ R348 1 2 110/F C420 1 2 0.1U/10V DVI_CLK- 10U/6.3V 0.1U/10V

2
Put these 4 Resistors and 4 Capacitors close to the TX
pin of SDVO device.

A A

QUANTA
Title
COMPUTER
SiI 1362

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 18 of 57


5 4 3 2 1
1 2 3 4 5 6 7 8

A A

B
BLANK PAGE FOR PAGE B

NUMBER SAME AS DISCRETE

C C

D D

QUANTA
Title
COMPUTER
Size Document Number Rev
JM7 1A

Date: Monday, June 26, 2006 Sheet 19 of 57


1 2 3 4 5 6 7 8
A B C D E

4 4

3 3

BLANK PAGE FOR PAGE


NUMBER SAME AS DISCRETE
2 2

1 1

QUANTA
Title
COMPUTER
Size Document Number Rev
JM7 1A

Date: Monday, June 26, 2006 Sheet 20 of 57


A B C D E
1 2 3 4 5 6 7 8

A A

B
BLANK PAGE FOR PAGE B

NUMBER SAME AS DISCRETE

C C

D D

QUANTA
Title
COMPUTER
Size Document Number Rev
JM7 1A

Date: Monday, June 26, 2006 Sheet 21 of 57


1 2 3 4 5 6 7 8
A B C D E

4 4

3 3

BLANK PAGE FOR PAGE


NUMBER SAME AS DISCRETE
2 2

1 1

QUANTA
Title
COMPUTER
Size Document Number Rev
JM7 1A

Date: Monday, June 26, 2006 Sheet 22 of 57


A B C D E
1 2 3 4 5 6 7 8

A A

B B

BLANK PAGE FOR PAGE


NUMBER SAME AS DISCRETE
C C

D D

QUANTA
Title
COMPUTER
Size Document Number Rev
JM7 1A

Date: Monday, June 26, 2006 Sheet 23 of 57


1 2 3 4 5 6 7 8
5 4 3 2 1

J4
44 LCD_BCLK-
44 LCD_BCLK- 6
43 LCD_BCLK+
43 LCD_BCLK+ 6 +LCDVCC
42 +3.3V_RUN
42 LCD_B2-
41 41 LCD_B2- 6
+15V_ALW +3.3V_RUN +LCDVCC 40 LCD_B2+
40 LCD_B2+ 6
Q54 39
FDC653N_NL 39 LCD_B1-
38 38 LCD_B1- 6

1
6 37 LCD_B1+
37 LCD_B1+ 6

2
5 4 36 C58 C54 C394
R329 36 LCD_B0- 0.1U/10V 0.047U/10V 0.1U/10V
2 35 LCD_B0- 6

2
330K 35 LCD_B0+
1 34 34 LCD_B0+ 6

2
33 33

2
R66 32 LCD_ACLK-
LCD_ACLK- 6

3
D
47/0805 C61 C400 32 LCD_ACLK+ D
31 31 LCD_ACLK+ 6
LCDVCC_ON 22U/10V 0.01U/25V 30

1
30 LCD_A2-
29 LCD_A2- 6

1
29

2
28 LCD_A2+
28 LCD_A2+ 6

2
27 +5V_ALW
R330 C388 27 LCD_A1-
26 26 LCD_A1- 6
100K_NC 0.01U/25V 25 LCD_A1+
LCD_A1+ 6

1
25
24

1
24

1
23 LCD_A0-
23 LCD_A0- 6
22 LCD_A0+ C57
22 LCD_A0+ 6
+3.3V_RUN +3.3V_ALW 21 0.1U/10V

2
21

3
20 LCD_DDCCLK
20 LCD_DDCCLK 6
2 2 19 LCD_DDCDAT
19 LCD_DDCDAT 6
Q53 18
18

1
Q52 2N7002W-7-F 17 +3.3V_RUN

1
R331 R326 2N7002W-7-F 17
16 16
R335 47K_NC 47K 15
0_NC 15 +LCDVCC
14 14
Support the new imbeded 1 2 13 LCD_TST 32

2
13
12
diagnostics. 12
11
D25 11 GFX_PWR_SRC
10 10

3
6 ENVDD 1 9 9
8 BACKLITEON
EN_LCDVCC 8
3 2 7 7
Q51
6 6 LCD_SMBCLK 31 Adress : A9H --Contrast
2 DTC124EUAT-106 5
31 LCDVCC_TST_EN 5
4
LCD_SMBDAT 31 AAH --Backlight

1
BAT54C 4
3 3 +5V_ALW

1
C 2 LAMP_STAT# T6 PAD C55 C56 C
2 47P/50V 47P/50V
1 1

2
JAE_FI-TD44SB-E-R750

UMA +3.3V_RUN
Populate R614 for DPST
implementation only.
2
Shunt capacitors on LVDS for improving WWAN.
R341
10K_NC LCD_B0- C399 1 2 3.3P/50V_NC LCD_B0+
LCD_B1- C398 1 2 3.3P/50V_NC LCD_B1+
R65 0 LCD_B2- C384 1 2 3.3P/50V_NC LCD_B2+
1

1 2 BACKLITEON Populate R74 for LCD_BCLK- C386 1 2 3.3P/50V_NC LCD_BCLK+


6 BIA_PWM
LCD_A0- C403 1 2 3.3P/50V_NC LCD_A0+
platform without DPST LCD_A1- C402 1 2 3.3P/50V_NC LCD_A1+
support. No Stuff for LCD_A2- C397 1 2 3.3P/50V_NC LCD_A2+
Discrete DSPT support LCD_ACLK- C393 1 2 3.3P/50V_NC LCD_ACLK+

due to back up plan.

+PWR_SRC GFX_PWR_SRC

B 40mil B
40mil 4
6
5
2
1

1
2
Q55 C396 C392

3
R342 C404 FDC658P_NL 0.1U/50V/0603 0.1U/50V/0603

2
100K 0.1U/50V/0603

1
2

2
R340
100K

1
3
2 Q56
31,33,44,53 RUN_ON
2N7002W-7-F

1
A A

QUANTA
Title
COMPUTER
LCD CONN & CK-SSCD

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 24 of 57


5 4 3 2 1
A B C D E

4 4

+3.3V_RUN +5V_RUN

2
D24

2
CH501H
D22 D21 D20
DA204U_NC DA204U_NC DA204U_NC

1
Layout Note:
Setting R,G,B treac CRT_VCC

3
impedance to 50 ohm.

1
L4 R296
1 2 RED 0/1206
6,43 VGA_RED
BLM18B750SB
PAD T4 M_SEN#_R

2
L1 CRT_VCC_R
1 2 GREEN
6,43 VGA_GRN
BLM18B750SB JVGA1
6
L3 11
1 2 BLUE 1
6,43 VGA_BLU
BLM18B750SB 7
2

3 1 12 3

1
R14 R13 R12 2
150/F 150/F 150/F C17 C13 C16 C12 C9 C8 8
22P/50V_NC 22P/50V_NC 22P/50V_NC 10P/50V_NC 10P/50V_NC 10P/50V_NC 13
2

2
3
1

9
14
PAD T3 M_ID2# 4
10
+5V_RUN U31_VCC +3.3V_RUN U31_VCC 15
5

D23 CH501H R295 1K FOX_DS01A91-MD221-7F

3
1

3
1
2 1 2 1

2
RP2 C333 RP1
5

4P2R-2.2K 0.01U/25V 4P2R-2.2K


U24 Q1

1
R18 10 BSS138_NL
2 4 VGAHSYNC_R 1 2
6 VGAHSYNC

4
2

4
2
6 G_DAT_DDC2 1 3 DOCK_DAT_DDC2 43
74AHCT1G125GW
C347

2
0.1U/10V Place near +3.3V_RUN
2 1 U31 < 200

2
mil
6 G_CLK_DDC2 1 3 DOCK_CLK_DDC2 43
5

U25

1
2 2
R298 10 Q3
2 4 VGAVSYNC_R 1 2 BSS138_NL C11 C326
6 VGAVSYNC
10P/50V_NC 10P/50V_NC

2
74AHCT1G125GW
L2
1 2 JVGA_HS
43 HSYNC
BLM11A121S

L41
1 2 JVGA_VS
43 VSYNC
BLM11A121S

1
C339 C14 C10 C335
10P/50V_NC 10P/50V_NC 10P/50V 10P/50V
2

2
Place near JVGA1 connector <
200 mil

1 1

QUANTA
Title
COMPUTER
CRT&TV CONN

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 25 of 57


A B C D E
1 2 3 4 5 6 7 8

SATA Connector. ODD Connector.


CON6

+5V_HDD +5V_MOD JMOD1


A GND1 1 +5V_MOD 1 1 2 2 INT_MOD_IN1# A
RXP 2 SATA_TX0+ 11 3 3 4 4

2
RXN 3 SATA_TX0- 11 5 5 6 6
1

1
GND2 4 7 7 8 8
C318 C319 5 SATA_RXN0_C C96 C424 C423 R76 9 10
0.1U/10V_NC 1000P/50V_NC TXN SATA_RXP0_C 10U/10V 0.1U/10V 0.1U/10V 100K 9 10
6 11 12
2

2
TXP 11 12
7 13 14

1
GND3 13 14
15 15 16 16
17 17 18 18
3.3V_0 8 +3.3V_RUN Place caps close to 28 UPD+ 19 19 20 20
Place caps close to 3.3V_1 9 connector. 28 UPD- 21 21 22 22
connector. 3.3V_2 10 23 23 24 24
11 DASP# 25 26 IDE_DCS3#
GND4 IDE_DCS1# 25 26 IDE_DA2
GND5 12 27 27 28 28
13 29 30 IDE_DA0
GND6 29 30 IDE_DA1
5V_0 14 +5V_HDD PDIAG# 31 31 32 32
15 R583 2 1 8.2K IDE_IRQ 33 34 R81 470
5V_1 +3.3V_RUN 33 34
16 IDE_DDACK# R80 2 1 0 35 36 CSEL2 1 2
5V_2 R82 2 35 36
GND7 17 +3.3V_RUN 1 4.7K IDE_DIORDY 37 37 38 38 IDE_DIOR#
18 39 40 IDE_DIOW#
RSVD IDE_DDREQ 39 40 IDE_DD15
GND8 19 41 41 42 42
20 IDE_DD0 43 44
12V_0 IDE_DD14 43 44 IDE_DD1
12V_1 21 45 45 46 46
22 IDE_DD13 47 48 IDE_DD2
12V_2 47 48 IDE_DD12
49 49 50 50
IDE_DD3 51 52 IDE_DD11
IDE_DD4 51 52
53 53 54 54
MLX_67492-1821 IDE_DD10 55 56 IDE_DD5
IDE_DD9 55 56 IDE_DD6
57 57 58 58
59 60 IDE_DD8
IDE_DD7 59 60 R103 1
B 61 61 62 62 2 56 IDE_RST_MOD 13 B
63 63 64 64 USB_IDE# 13
SATA_RXN0_C C309 2 1 3900P/25V 65 66
SATA_RX0- 11 65 66
67 67 68 68 MODPRES# 32
SATA_RXP0_C C310 2 1 3900P/25V SATA_RX0+ 11
JAE_WM1F068NSD-R500 INT_MOD_IN2#
R111 10K
1 2 +3.3V_ALW
IDE_DD[0..15]
11 IDE_DD[0..15]
R109 100K
IDE_DDREQ 1 2
11 IDE_DDREQ +3.3V_RUN
IDE_DIOW#
11 IDE_DIOW#
IDE_DIOR#
11 IDE_DIOR#
IDE_DIORDY
11 IDE_DIORDY
IDE_DDACK#
11 IDE_DDACK#
IDE_IRQ
11 IDE_IRQ
IDE_DA1
11 IDE_DA1
+5V_ALW +5V_HDD +5V_RUN IDE_DA0
11 IDE_DA0
IDE_DCS1#
11 IDE_DCS1#
Q43 IDE_DA2 +5V_ALW +5V_MOD
11 IDE_DA2
SI3456DV R284 IDE_DCS3#
11 IDE_DCS3#
6 0/0805_NC Q15
5 4 2 1 SI4800BDY
2 8 3
1

1 7 2
1

+3.3V_ALW 6 1

1
C322 R286 5
3

1
+3.3V_ALW +15V_ALW 10U/10V 100K C81
2

1U/16V C95 C94


2

4
1
10U/10V 0.01U/25V

2
C C
R285 R177
1

100K 100K R77 100K


R597 2 1 HDD_EN_5V +15V_ALW 2 1
100K

2
3

1
2

2 2 Q16 C100
32 HDDC_EN# 32 MODC_EN#
C323 2N7002W-7-F 0.1U/25V

2
Q44 0.1U/25V
1

1
2N7002W-7-F

D D

QUANTA
Title
COMPUTER
SATA (HDD&CD_ROM)

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 26 of 57


1 2 3 4 5 6 7 8
5 4 3 2 1

+CBS_VCC
IEEE1394 OZTPA+ R93 1 2 0 OLTPA+
IEEE1394 OZTPA- R94 1 2 0 OLTPA- CON5
U40 Please these parts IEEE1394 OZTPB+ R96 1 2 0 OLTPB+
near OZ711EZ1. IEEE1394 OZTPB- R98 1 2 0 OLTPB- 1 10
J5 CBS_CAD0 GND_2 GND_0
2
12,42 PCI_AD[0..31]
OZ711EZ1 R587 6.2K/F EB1 CBS_CAD1 3
D3-CAD0
D4-CAD1 GND_1 50
1 2 1 8 CBS_CAD3 4
A0+ A_0+ D5-CAD3
PCI_AD31
PCI_AD30
19
20
AD31 128 PIN LQFP R1 72
70 IEEE1394 OZTPA+ 2 7 OLTPA+ 4
CBS_CAD5
CBS_CAD7
5
6
D6-CAD5
PCI_AD29 AD30 TPAP IEEE1394 OZTPA- A0- A_0- OLTPA- A1+ CBS_CC/BE0# D7-CAD7
21 AD29 TPAN 69 3 A1- 7 CE1#-CC/BE0#
PCI_AD28 22 IEEE 1394 67 IEEE1394 OZTPB+ 3 6 OLTPB+ 2 CBS_CAD9 8
PCI_AD27 AD28 TPBP IEEE1394 OZTPB- B1+ B_1+ OLTPB- B1+ CBS_CAD11 A10-CAD9
D
23 AD27 TPBN 66 1 B1- 9 OE#-CAD11
PCI_AD26 24 AD26
(8) TPBIAS 71 TPBIAS 4 B1- B_1- 5 CBS_CAD12 11 A11-CAD12
D
PCI_AD25 25 74 PCCARD_XI CBS_CAD14 12
PCI_AD24 AD25 XI PCCARD_XO NCM900E-TR_NC CBS_CC/BE1# A9-CAD14
27 AD24 XO 75 13 A8-CC/BE1#
PCI_AD23 29 Close to OZ711EZ1. CBS_CPAR 14
PCI_AD22 AD23 TYC_1-1734607-1 CBS_CPERR# A13-CPAR
30 AD22 15 A14-CPERR#
PCI_AD21 CBS_CAD31 these 1394 signals are high speed CBS_CGNT#
PCI_AD20
31
32
AD21 CAD31 3
1 CBS_CAD30
1394A PORT CBS_CINT#
16
17
WE/PGM-CGNT#
PCI_AD19 AD20 CAD30 CBS_CAD29
differential pairs and must be kept RDY/BSY-IRQ/CIN
34 AD19 CAD29 128 18 VCC_0
R553 100 PCI_AD18 35 127 CBS_CAD28 equal length with a differential
IDSEL AD18 CAD28 impedance(Zo) of 110 ohms.
1 2 PCI_AD17 PCI_AD17 36 AD17 CAD27 126 CBS_CAD27 19 VPP1
PCI_AD16 37 125 CBS_CAD26 CBS_CCLK 21
PCI_AD15 AD16 CAD26 CBS_CAD25 CBS_CIRDY# A16-CCLK
47 AD15 CAD25 124 22 A15-CIRDY#
PCI_AD14 48 122 CBS_CAD24 CBS_CC/BE2# 24
PCI_AD13 AD14 CAD24 CBS_CAD23 CBS_CAD18 A12-CC/BE2#
49 AD13 CAD23 120 25 A7-CAD18
PCI_AD12 50 PC CARD 118 CBS_CAD22 IEEE1394 OZTPA+ IEEE1394 OZTPB+ CBS_CAD20 27
PCI_AD11 AD12 CAD22 CBS_CAD21 IEEE1394 OZTPA- IEEE1394 OZTPB- CBS_CAD21 A6-CAD20
51 AD11 CAD21 116 28 A5-CAD21
PCI_AD10 52 AD10
SOCKET CAD20 115 CBS_CAD20 CBS_CAD22 30 A4-CAD22

2
PCI_AD9 53 PCI HOST BUS 114 CBS_CAD19 CBS_CAD23 31
PCI_AD8 54
AD9 (32) CAD19
113 CBS_CAD18 CBS_CAD24 33
A3-CAD23
PCI_AD7 AD8 (46) CAD18 CBS_CAD17 R275 R274 R271 R270 CBS_CAD25 A2-CAD24
57 AD7 CAD17 112 34 A1-CAD25
PCI_AD6 58 96 CBS_CAD16 56.2/F 56.2/F 56.2/F 56.2/F CBS_CAD26 35
PCI_AD5 AD6 CAD16 CBS_CAD15 CBS_CAD27 A0-CAD26
59 94 36

1
PCI_AD4 AD5 CAD15 CBS_CAD14 TPBIAS CBS_CAD29 D0-CAD27
60 AD4 CAD14 93 37 D1-CAD29
PCI_AD3 61 92 CBS_CAD13 CBS_R2_D2 38
AD3 CAD13 D2-RFU

2
PCI_AD2 62 91 CBS_CAD12 CBS_CCLKRUN# 39
AD2 CAD12 WP/IOIS16-CCLKR

1
PCI_AD1 63 90 CBS_CAD11 C311 40
PCI_AD0 AD1 CAD11 CBS_CAD10 1U/10V R272 C308 GND_3
64 89

2
AD0 CAD10 CBS_CAD9 5.1K 820P/50V
88 41

2
CAD9 CBS_CAD8 CBS_CCD1# GND_4
12,42 PCI_C_BE3# 28 87 42

1
C/BE3# CAD8 CBS_CAD7 CBS_CAD2 CD1#-CCD1#
C
12,42 PCI_C_BE2# 38 C/BE2# CAD7 84 43 D11-CAD2
C
46 83 CBS_CAD6 CBS_CAD4 44
12,42 PCI_C_BE1# C/BE1# CAD6 D12-CAD4
55 81 CBS_CAD5 CBS_CAD6 45
12,42 PCI_C_BE0# C/BE0# CAD5 D13-CAD6
80 CBS_CAD4 CBS_R2_D14 46
CAD4 Y4 D14-RFU
42 79 CBS_CAD3 R586 0 CBS_CAD8 47
12,42 PCI_DEVSEL# DEVSEL# CAD3 D15-CAD8
39 78 CBS_CAD2 PCCARD_XI 2 1 1 2 PCCARD_XO CBS_CAD10 48
12,42 PCI_FRAME# FRAME# CAD2 CE2#-CAD10
IDSEL 9 77 CBS_CAD1 CBS_CVS1# 49
IDSEL CAD1 VS1#/RFSH-CVS1

1
40 76 CBS_CAD0 24.576MHZ CBS_CAD13 51
12,42 PCI_IRDY# IRDY# CAD0 RSVD-CAD13
44 C680 C679 CBS_CAD15 52
12,42 PCI_PAR PAR RSVD-CAD15
CLK_PCI_PCCARD 45 101 CBS_CBLOCK# 12P/50V 12P/50V CBS_CAD16 53
17 CLK_PCI_PCCARD

2
PCI_CLK CBLOCK# CBS_CC/BE0# CBS_R2_A18 A17-CAD16
12 PCI_GNT1# 18 PCI_GNT# CC/BE0# 86 Please these parts 54 A18-RFU
17 95 CBS_CC/BE1# near OZ711EZ1. CBS_CBLOCK# 55
12 PCI_REQ1# PCI_REQ# CC/BE1# A19-CBLOCK#
43 111 CBS_CC/BE2# CBS_CSTOP# 56
12,42 PCI_STOP# STOP# CC/BE2# A20-CSTOP#
41 123 CBS_CC/BE3# CBS_CDEVSEL# 57
12,42 PCI_TRDY# TRDY# CC/BE3# A21-CDEVSEL#
R584 0 58
CBS_CCLK VCC_1
12,28,42 PCI_RST# 5 PCI_RST# CCLK 106 1 2
EPSI 8 4 CBS_CCLKRUN# 59
EPSI CCLKRUN# CBS_CDEVSEL# U19 R273 33 CBS_CTRDY# VPP2/VPP2
MISCELLANEOUS CDEVSEL# 105
CBS_CFRAME# EPSI CBS_CFRAME#
61 A22-CTRDY#
13,31,32,40 IRQ_SERIRQ 6 IRQSER CFRAME# 110 20 PIN SSOP 1 2 62 A23-CFRAME#
32,42 SYS_PME# 7 PME#
(4) CGNT# 102 CBS_CGNT# +5V_RUN 15 5V_0 EPSI 1 CBS_CAD17 64 A24-CAD17
104 CBS_CINT# 16 2 CLK_PCI_PCCARD CBS_CAD19 65
CINT# CBS_CIRDY# 5V_1 PCI_CLK CBS_CVS2# A25-CAD19
PC CARD CIRDY# 109
CBS_CPAR INTA# 3 PCI_PIRQD# 12
CBS_CRST#
67 VS2#/RSVD-CVS2
+3.3V_RUN 11 3.3VCC_0 CPAR 98 +3.3V_RUN 17 3.3V_0 CLKRUN# 6 CLKRUN# 13,31,32 68 RESET-CRST
97 3.3VCC_1
INTERFACE CPERR# 100 CBS_CPERR# 18 3.3V_1 PERR# 7 PCI_PERR# 12,42
CBS_CSERR# 70 WAIT#-CSERR#
121 CBS_CREQ# 8 CBS_CREQ# 71
65
(27) CREQ#
117 CBS_CRST# 19
SERR#
9
PCI_SERR# 12,42
CBS_CC/BE3# 72
RSVD-CREQ#
CB_3.3VCCA 3.3VCCA_0 CRST# +1.8V_OZ 1.8VOUT SKT_LED REG#-CC/BE3#
68 119 CBS_CSERR# 10 73
3.3VCCA_1 CSERR# RESET# PCI_RST# 12,28,42 BVD2/SP-CAUDIO#
73 103 CBS_CSTOP# +CBS_VCC 4 CBS_CSTSCHG 75
3.3VCCA_2 CSTOP# CBS_CTRDY# VCC/VPP_0 CBS_CAD28 BVD1-STSCHG
CTRDY# 107 5 VCC/VPP_1 USB_A0 14 76 D8-CAD28
+1.8V_OZ 16 POWER PLANE 99 CBS_R2_A18 13 CBS_CAD30 77
B 1.8VCC_0 RFU_A18 CBS_R2_D2 USB_B0 CBS_CAD31 D9-CAD30 B
82 1.8VCC_1 RFU_D2 2 USB_A1 12 78 D10-CAD31
(11) RFU_D14 85 CBS_R2_D14 20 GND USB_B1 11 +SC_VCC CBS_CCD2# 79 CD2#-CCD2#
26 13 CBS_CSTSCHG 80
+3.3V_RUN PCI_VCC_0 CSTSCHG GND_5
56 PCI_VCC_1
10 CBS_CCD1# OZ2532L 29
CD1# CBS_CCD2# R281 SC_VCC
33 GND_0 CD2# 14 28 SC_RST# 1 2 220 26 SC_RST
108 12 CBS_CVS1# R280 1 2 33 23
GND_1 VS1 28 SC_CLK SC_CLK
15 CBS_CVS2# 28 SC_C4 R278 1 2 220 20
VS2 SC_RSV4
28 SC_D+ 69 SC_GND
R282 1 2 47K 66
OZ711EZ1TN R279 SC_VPP
28 SC_IO 1 2 220 63 SC_IO
60 SC_RSV8
Place these caps Place these parts 28 SC_D-
CLK_PCI_PCCARD near connector. near connector. SC_DET# 32
28,32 SC_DET# SC_DET1
+CBS_VCC +SC_VCC 74 SC_DET2
1

1
C321 FOX_QT8P080A-1820C-F
R580 0.1U/10V

2
1

10_NC
1

1
1 2

C314 C316 R283 C320 C317


0.1U/10V 0.1U/10V 10K 1U/10V 0.1U/10V
2

2
Reserved for EMI. C662 Place these parts
2

Placce the parts 4.7P/50V_NC near connector.


2

near pin 45.

A +3.3V_RUN CB_3.3VCCA +1.8V_OZ +5V_RUN +3.3V_RUN A


L60
1 2
BLM11A121S
QUANTA
2

C675 C652 C672 C650 C674 C681 C678 C677 C676 C651 C304 C306 C307 C305
4.7U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 4.7U/10V 0.1U/10V 0.1U/10V 4.7U/10V 0.1U/10V 0.1U/10V 4.7U/10V 0.1U/10V 4.7U/10V
COMPUTER
1

Title
Place these caps PCCARD
Place these caps near OZ711EZ1. near OZ2532. Size Document Number Rev
JM7 1A

Date: Wednesday, June 28, 2006 Sheet 27 of 57


5 4 3 2 1
1 2 3 4 5 6 7 8

L31 +1.5V_CARD
12 ICH_USBP6-
12 ICH_USBP6+
1
4
2
3
USBP6 D-
USBP6 D+
Express Card

1
DLW21SN900SQ2B_NC +1.5V_CARD Max. 650mA, Average 500mA.
C153 C157
R117 0 0.1U/10V 0.1U/10V +3V_CARD Max. 1300mA, Average 1000mA.

2
1 2

R118 0
1 2
+1.5V_RUN +3.3V_RUN +3.3V_SUS +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD
U10
A
Please the cap A
near connector.
17 AUXIN AUXOUT 15
+3.3V_CARD 2 3
3.3VIN_0 3.3VOUT_0
4 3.3VIN_1 3.3VOUT_1 5
CN1 12 11
1.5VIN_0 1.5VOUT_0
1 GND_1 14 1.5VIN_1 1.5VOUT_1 13
1

USBP6 D- 2
C515 C513 C170 USBP6 D+ USB- R141 100K
3 USB+
0.1U/10V 0.1U/10V 10U/6.3V CPUSB# 4 2 1 ExpressSwitch +3.3V_SUS
+3.3V_SUS
2

CPUSB# CARD_RESET#
5 RSV_0
6 R140 0_NC 20 8
RSV_1 SHDN# PERST# EXPRCRD_PWREN# R161
Please the cap 13,29,40 ICH_SMBCLK 7 SMBCLK 32 EXPRCRD_STDBY# 1 2 1 STBY# CPPE# 10 2 1 100K
near connector. 8 6 9 CPUSB# R160 2 1 100K
13,29,40 ICH_SMBDATA SMBDATA 6,12,18,29,31,32,40 PLTRST# SYSRST# CPUSB#
9 +1.5V_0 OC# 19
+1.5V_CARD 10 +1.5V_1 16 NC
29,32,40 PCIE_WAKE# 11 WAKE# 7 GND0 RCLKEN 18
+3.3V_CARDAUX 12 +3.3VAUX
CARD_RESET# 13 PERST# R5538D001-TR-F
+3.3V_CARD 14 +3.3V_1
15 +3.3V_2
17 CARD_CLK_REQ# 16 CLKREQ#
EXPRCRD_PWREN# 17
32 EXPRCRD_PWREN# CPPE# +1.5V_RUN +3.3V_RUN +3.3V_SUS +3.3V_CARDAUX +3.3V_CARD +1.5V_CARD
17 CLK_PCIE_EXPCARD# 18 REFCLK-
17 CLK_PCIE_EXPCARD 19 REFCLK+
20 GND_2

1
12 PCIE_RX4- 21 PERn0
22 C172 C176 C162 C168 C179 C177
12 PCIE_RX4+ PERp0
23 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V

2
GND_3
12 PCIE_TX4- 24 PETn0
B 25 B

NC1
NC2
NC3
NC4
12 PCIE_TX4+ PETp0
26 GND_4
Please the cap Please the cap Please the cap Please the cap Please the cap Please the cap
FOX_1CH4310C-JM near pin 12 & near pin 2 & 4 near pin 17 near pin 15 near pin 3 & 5 near pin 11 &

27
28
29
30
14(1.5VIN). (3.3VIN). (AUXIN). (AUXOUT). (3.3VOUT). 13(1.5VOUT).

JAE PX10FS16PH-26P
PCI-Express TX and RX direct to connector.

Smart Card
Note: U41
These signals must kept equal length +3.3V_RUN OZ77CR6
C693 1U/10V
with differential impedance (Zo) of C689 1U/10V 32 PIN QFN See Note
2

90 ohms. 2 1 29 3V_CPR VR_CPR_0 6 1 2


VR_CPR_1 10
See Note R588 +5V_RUN 5
1.5K VCC5V_IN_0
28 VCC5V_IN_1 EGATED- 21 SC_D- 27
20 SC_D+ 27
1

EGATED+
12 ICH_USBP4- 17 UPD- SC_VCC 27 +SC_VCC

1
C 12 ICH_USBP4+ 16 UPD+ SC_RST# 24 SC_RST# 27 C
26 UPD- 19 DPD- SC_CLK 23 SC_CLK 27
ODD 26 UPD+ 18 22 R591 R592
DPD+ SC_C4 SC_C4 27
25 15K 15K
SC_IO SC_IO 27
12,27,42 PCI_RST# 12 13 SC_DET# 27,32

2
RST# SC_DET#
1

30 NC_3 +3.3VCC 8 +3.3V_RUN


R590 R589 31 7
15K 15K NC_4 NC_1
RFIO_1 15 PAD T115
CLK_SMCARD_48M 3 14
17 CLK_SMCARD_48M PAD T34
2

6M/48M(XI) RFIO_0
4 XO

1
32 MODE0/LED# GND_0 11
1 MODE1 GND_1 9
2

2 26 R594 R593
MODE2 GND_2 15K 15K
R595

2
4.7K OZ77CR6
1

CLK_SMCARD_48M +5V_RUN +SC_VCC


+3.3V_RUN
1

D D
R596
2

1
10_NC
C696 C695 C692 C688 C684 C687
QUANTA
1 2

4.7U/10V 0.1U/10V 4.7U/10V 0.1U/10V 4.7U/10V 0.1U/10V


1

2
C694
4.7P/50V_NC
Reserved for EMI.
Placce the parts COMPUTER
2

Title
near pin 45. Please these caps Please these caps ExpressCard/SmartCard
near OZ77CR6LN. near OZ77CR6LN. Size Document Number Rev
JM7 1A

Date: Wednesday, June 28, 2006 Sheet 28 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Place caps close to


MiniCard WLAN connector +1.5V_RUN +3.3V_WLAN
connector.
J8

1
+3.3V_WLAN +3.3V_WLAN +1.5V_RUN
TYC_JXJM6001 C250 C575 C590
J9 0.047U/10V 0.047U/10V 0.1U/10V

2
A 28,32,40 PCIE_WAKE# 1 WAKE# 3.3V_1 2 A
R260 1 2 0 3 4
35 COEX2_WLAN_ACTIVE RESERVED_1 GND0
R259 1 2 0 5 6
35 COEX1_BT_ACTIVE RESERVED_2 1.5V_1
17 MINI1CLK_REQ# 7 CLKREQ# UIM_PWR 8
9 GND1 UIM_DATA 10
17 CLK_PCIE_MINI1# 11 REFCLK- UIM_CLK 12
13 14 +3.3V_WLAN
17 CLK_PCIE_MINI1 REFCLK+ UIM_RESET
15 GND2 UIM_VPP 16 HOST_DEBUG_TX 31
R231 0
1 2 PLTRST# 6,12,18,28,31,32,40

2
31 HOST_DEBUG_RX 17 UIM_C8 GND3 18
19 20 WLAN_RADIO_OFF# C252 C251 C244 C253 C243
31 8051_TX UIM_C4 W_DISABLE# R232 0_NC 0.1U/10V 0.047U/10V 0.1U/10V 0.047U/10V 4.7U/10V
21 22

1
GND4 PERST#
12 PCIE_RX2- 23 PERn0 3.3VAUX1 24 1 2 SB_WLAN_PCIE_RST# 12
12 PCIE_RX2+ 25 PERp0 GND5 26 +3.3V_WLAN
27 GND6 1.5V_2 28
29 GND7 SMB_CLK 30 ICH_SMBCLK 13,28,40
PCI-Express TX and RX 12 PCIE_TX2- 31 PETn0 SMB_DATA 32 ICH_SMBDATA 13,28,40
direct to connector 12 PCIE_TX2+ 33 PETp0 GND8 34
35 GND9 USB_D- 36 PAD T18
13 PCIE_MCARD1_DET# 37
39
RESERVED_3 USB_D+ 38
40
PAD T19 Suport for WoW
RESERVED_4 GND10 USB_MCARD1_DET# 13
41 RESERVED_5 LED_WWAN# 42 8051_RX 31
43 44 WLAN_RADIO_OFF# 2 1
RESERVED_6 LED_WLAN# LED_WLAN_OUT# 36 WLAN_RADIO_DIS# 32
RSV_ICH_CL_CLK1 45 46
T76 PAD RESERVED_7 LED_WPAN#
RSV_ICH_CL_DATA1 R41 0_NC D16
Non-iAMT T77 PAD
RSV_ICH_CL_RST1#
47
49
RESERVED_8 1.5V_3 48
50 1 2 CH751H-40HPT
T21 PAD RESERVED_9 GND11 BT_ACTIVE 35,36
51 RESERVED_10 3.3V_2 52
2 1 Prevent backdrive when
B DEBUG PINS R216
WoW is enabled.
B
JMINI Pin Debug Pin Name EC Pin TYC_1775838-1 0_NC

16 HOST_DEBUG_TX 70
17 HOST_DEBUG_RX 71
19 8051_TX 82 MiniCard WWAN connector
J7
42 8051_RX 81 +3.3V_RUN +3.3V_RUN +1.5V_RUN +1.5V_RUN +3.3V_LAN Place caps close to connector.
J10
TYC_JXJM6001
28,32,40 PCIE_WAKE# 1 WAKE# 3.3V_1 2

1
T81 PAD 3 RESERVED_1 GND0 4
5 6 C267 C272 C274
T82 PAD RESERVED_2 1.5V_1
7 8 UIM_PWR 0.047U/10V 33P/50V 0.1U/10V
17 MINI2CLK_REQ#

2
CLKREQ# UIM_PWR UIM_DATA
9 GND1 UIM_DATA 10
11 12 UIM_CLK
17 CLK_PCIE_MINI2# REFCLK- UIM_CLK
13 14 UIM_RESET
17 CLK_PCIE_MINI2 REFCLK+ UIM_RESET
15 16 UIM_VPP
GND2 UIM_VPP
R502 0
1 2 +3.3V_RUN
PLTRST# 6,12,18,28,31,32,40
17 UIM_C8 GND3 18
19 UIM_C4 W_DISABLE# 20 WWAN_RADIO_DIS# 32
21 22 R503 0_NC
GND4 PERST#

1
12 PCIE_RX1- 23 PERn0 3.3VAUX1 24 1 2 SB_WWAN_PCIE_RST# 12

1
25 26 + C602 + C292
C 12 PCIE_RX1+ PERp0 GND5 +3.3V_LAN C
27 28 C265 C264 C268 C269 330U/6.3V 330U/6.3V_NC
GND6 1.5V_2 33P/50V 0.047U/10V 33P/50V 0.047U/10V
29 30

2
GND7 SMB_CLK ICH_SMBCLK 13,28,40
PCI-Express TX and RX 12 PCIE_TX1- 31 PETn0 SMB_DATA 32 ICH_SMBDATA 13,28,40
direct to connector 12 PCIE_TX1+ 33 PETp0 GND8 34
35 36 USBP9 D-
GND9 USB_D- USBP9 D+
13 PCIE_MCARD2_DET# 37 RESERVED_3 USB_D+ 38
39 RESERVED_4 GND10 40 USB_MCARD2_DET# 13
41 RESERVED_5 LED_WWAN# 42 PAD T20
43 RESERVED_6 LED_WLAN# 44
45 RESERVED_7 LED_WPAN# 46
47 48 L38
RESERVED_8 1.5V_3 USBP9 D-
49 RESERVED_9 GND11 50 1 2 ICH_USBP9- 12
51 52 USBP9 D+ 4 3 ICH_USBP9+ 12
RESERVED_10 3.3V_2
DLW21SN900SQ2B_NC
TYC_1775838-1 Layout Note:
R240 0 R222 and R223
1 2
close to choke
R244 0 as possible to
1 2 minimize stubs.
ESD2
JSIM1 UIM_RESET UIM_VPP UIM_PWR
1 1 6 6
UIM_PWR 5 6 2 5 UIM_PWR
VCC GND UIM_CLK 2 5 UIM_DATA
3 3 4 4
UIM_RESET 3 4 UIM_VPP
RST VPP
2

C682 C686 SRV05-4 C683 C685 C670


UIM_CLK 1 2 UIM_DATA 33P/50V 33P/50V 33P/50V 33P/50V 1U/10V
CLK DATA
D D
1

SUY_254020MA006S522ZL
QUANTA
Place as close as possible to JMINI connector
Title
COMPUTER
MINI-PCI

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 29 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

A A
CON1

L42
J1 RJ_TIP 1 2
43 RJ_TIP
2 RJ_TIP SBK160808T-301Y-N RJ_TIP_R 1
L5 RJ_RING_R 2
1 RJ_RING RJ_RING 1 2
43 RJ_RING
SBK160808T-301Y-N
MLX_53398-0271

1
C332 C331

5
6
ICH_AZ_MDC_SDOUT 300P/3KV_NC 300P/3KV_NC FOX_JM34613-L002-7F

2
1

R29
10_NC
2
2

C23
10P/50V_NC
1

B B

R307 0_NC
H5 1 2
J14 HOLE-C118D63P2_NC

Q48
BSS138_NL
MDC_NUT
11 ICH_AZ_MDC_RST# 3 1 ICH_AZ_MDC_RST1#

1
J3

2
+5V_SUS
1 MDC 2

2
GND_1 RES0

2
11 ICH_AZ_MDC_SDOUT ICH_AZ_MDC_SDOUT 3 4 R38
IAC_SDATA_OUT RES1 100K
5 GND_2 3.3V 6 +3.3V_SUS
ICH_AZ_MDC_SYNC 7 8 R304
11 ICH_AZ_MDC_SYNC

1
MDC_SDIN IAC_SYNC GND_3 10K
9 IAC_SDATA_IN GND_4 10
ICH_AZ_MDC_RST1# 11 12 ICH_AZ_MDC_BITCLK
ICH_AZ_MDC_BITCLK 11

1
IAC_RESET# IAC_BITCLK
37 MDC_RST_DIS#
TYC_1-1734054-2

NOTE : MDC DISABLE


If platform requires MDC disable,populate this circuit.
If MDC disable isn't required, connect ICH_AZ_MDC_RST# directly to
C
JMDC connector. C

R37 33 ICH_AZ_MDC_BITCLK +3.3V_SUS


1 2 MDC_SDIN
11 ICH_AZ_MDC_SDIN1

1
R305

2
10_NC
C355 C354

2
0.1U/10V 4.7U/10V

1
2
C358
10P/50V_NC

1
Place these caps
near MDC module.

D D

QUANTA
Title
COMPUTER
MDC CONN.

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 30 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Place cap +3.3V_ALW


+RTC_CELL
USIO2 close to pin
121.
R470 1M
2 1 SUS_ON R219 0
MEC5025 EC-08

1
R472 1M 12 121 MEC5025_VCC0 2 1
17 CKG_SMBDAT KSO17/GPIOA1/AB1H_DATA VCC0
2 1 RUN_ON 13 C572 C557 C574 C591 C587
17 CKG_SMBCLK KSO16/GPIOA0/AB1H_CLK
128 PIN VTQFP

1
R198 100K 14 21 +3.3V_ALW 10U/6.3V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V
44 3.3V_LAN_PWRGD

2
GPIO5/KSO15 VCC1
2 1 DDR_ON T61 PAD RSV_3.3V_M_PWRGD 15
GPIO4/KSO14 VCC1 44 C236
16 65 0.1U/10V
49 1.8V_SUS_PWRGD

2
KSO13/GPIO18 VCC1
3 CPU_PROCHOT# 17 KSO12/OUT8 POWER PLANES VCC1 83
A Non- 52 ALW_PWRGD_3V_5V 18 KSO11/GPIOC7 (6) VCC1 116 Place these caps close to MEC5025. A
6,13 ICH_CL_PWROK 19 KSO10/GPIOC6
iAMT T17 PAD 20 KSO9/GPIOC5 ALWON
13 ICH_RSMRST# 23 KSO8/GPIOC4 ALWON 120 ALWON 52
+5V_RUN T13 PAD RSV_M_ON 24 119
KSO7/GPIO3 POWER_ SW_IN2#/GPIO23 SNIFFER_PWR_SW# 36
T62 PAD RSV_SIO_SLP_M# 25 KEYBOARD/MOUSE 126 R462 1 2 100K +RTC_CELL
DDR_ON KSO6/GPIO2 POWER_ SW_IN1#/GPIO22 +5V_ALW
49 DDR_ON 27 KSO5/GPIO1 (26) POWER_ SW_IN0# 127 MAIN_PWR_SW# 36
35 TP_CABLE_DET# 28 KSO4/GPIO0 ACAV_IN 128 ACAV_IN 37,45,46
29 POWER SWITCH BGPO0/GPIOA5 118 R455 8.2K
44 3.3V_5V_SUS_PWRGD KSO3/GPIOC3
2
4
6
8

30 (6) SNIFFER_RTC_GPO T73 PAD DOCK_SMBCLK 2 1


13 SIO_SLP_S3# KSO2/GPIOC2
RP41 31
13 SIO_SLP_S5# KSO1/GPIOC1
8P4R-4.7K 32 8 LCD_SMBCLK R454 8.2K
53 3.3V_RUN_ON KSO0/GPIOC0 AB1B_CLK/GPIOA4 LCD_SMBCLK 24
7 LCD_SMBDAT DOCK_SMBDAT 2 1
41 AUX_ON AB1B_DATA/GPIOA2 LCD_SMBDAT 24
SUS_ON 33 ACCESS BUS 6 DOCK_SMBCLK
44,53 SUS_ON DOCK_SMBCLK 43
1
3
5
7

CLK_KBD RUN_ON KSI7/GPIO19 AB1A_CLK DOCK_SMBDAT +3.3V_ALW


24,33,44,53 RUN_ON 34 KSI6/GPIO17 (4) AB1A_DATA 5 DOCK_SMBDAT 43
DAT_KBD 35
54 AC_OFF KSI5/GPIO10
CLK_DOCK 8.2K R196
DAT_DOCK Non- 36
RSV_1.05V_1.25V_M_PWRGD 37 KSI4/GPIO9 GPIO11/AB2_DATA 93
94
1.8V_RUN_ON
LCD_SMBCLK 2 1
T67 PAD KSI3/GPIO8 GPIO12/AB2_CLK LCDVCC_TST_EN 24
iAMT 34 BC_A_INT# 38 KSI2/GPIO7/BC_A_INT# GPIO13/AB1G_DATA 95 RSV_AMT_SMBDAT
RSV_AMT_SMBCLK
T79 PAD
8.2K R197
34 BC_A_DAT 39 KSI1/GPIO6/BC_A_DAT GPIO14/AB1G_CLK 96 T80 PAD
40 111 PBAT_SMBDAT LCD_SMBDAT 2 1
34 BC_A_CLK KSI0/SGPIO30/BC_A_CLK GPIO87/AB1C_DATA PBAT_SMBDAT 54
112 PBAT_SMBCLK
GPIO86/AB1C_CLK PBAT_SMBCLK 54
R479 100K 92 9 SBAT_DH_SMBDAT R481 2.2K
11 SIO_A20GATE SGPIO34/A20M GPIO85/AB1D_DATA SBAT_DH_SMBDAT 33,54
1 2 SNIFFER_GREEN SNIFFER_GREEN 50 10 SBAT_DH_SMBCLK PBAT_SMBDAT 2 1
36 SNIFFER_GREEN OUT5/KBRST GPIO84/AB1D_CLK SBAT_DH_SMBCLK 33,54
R480 100K 97
GPIO93/AB1F_DATA 1.5V_RUN_ON 48
1 2 SNIFFER_YELLOW 75 98 R478 2.2K
35 CLK_TP_SIO GPIO94/IMCLK GPIO92/AB1F_CLK 1.25V_RUN_ON 49
76 99 THRM_SMBDAT PBAT_SMBCLK 2 1
35 DAT_TP_SIO GPIO95/IMDAT GPIO91/AB1E_DATA THRM_SMBDAT 37,46
CLK_KBD 77 (10) 100 THRM_SMBCLK
43 CLK_KBD KCLK GPIO90/AB1E_CLK THRM_SMBCLK 37,46
DAT_KBD 78 R456 2.2K
43 DAT_KBD KDAT
CLK_DOCK 79 43 SBAT_DH_SMBDAT 2 1
43 CLK_DOCK GPIOA6/EMCLK GPIO82/FAN_TACH3 IMVP_PWRGD 13,44,51
B DAT_DOCK 80 42 T72 PAD B
43 DAT_DOCK GPIOA7/EMDAT GPIO16/FAN_TACH2
8051_RX 81 41 R457 2.2K
29 8051_RX GPIO20/PS2CLK/8051RX GPIO15/FAN_TACH1 FAN1_TACH 37
8051_TX 82 SBAT_DH_SMBCLK 2 1
CLK_PCI_5025 29 8051_TX GPIO21/PS2DAT/8051TX R235 1
OUT2/PWM3 48 2 0 IMVP_VR_ON 51
GPIO OUT9/PWM2 47 AUX_EN_WOWL 41
1

Place close 6,12,18,28,29,32,40 PLTRST# 57 LRESET# (36) OUT11/PWM1 46 3.3V_SUS_ON 53


CLK_PCI_5025 58 45
R485 to pin 58. 17 CLK_PCI_5025
59
PCICLK OUT10/PWM0 BREATH_LED# 36 +3.3V_ALW
11,32,40 LPC_LFRAME# LFRAME#
10_NC 60 66
11,32,40 LPC_LAD0 LAD0 nEC_SCI/SPDIN2 SIO_EXT_SCI# 13
11,32,40 LPC_LAD1 61 PCI POWER/LPC BUS 55 ITP_DBRESET# 3,13
1 2

LAD1 SGPIO45/MSDATA/SPDOUT2
11,32,40 LPC_LAD2 62 LAD2 (9) SGPIO44/MSCLK/SPCLK2 54 SIO_RCIN# 11

2
4
11,32,40 LPC_LAD3 63 LAD3 SGPIO46/SPDIN1 69 PLTRST_DELAY#
C581 64 68 RP35
13,27,32 CLKRUN# CLKRUN# SGPIO47/SPDOUT1 1.25V_GFX_PCIE_ON
4.7P/50V_NC 56 67 DEBUG_ENABLE# 4P2R-4.7K
2

13,27,32,40 IRQ_SERIRQ SER_IRQ SGPIO31/TIN1/SPCLK1

SYSOPT0/SGPIO32/LPC_TX 70 HOST_DEBUG_TX 29
12 ICH_EC_SPI_CLK 102 71 HOST_DEBUG_RX 29

1
3
HSTCLK SYSOPT1/SGPIO33/LPC_RX R241 2 THRM_SMBCLK
12 ICH_EC_SPI_DIN 105 HSTDATAIN 1 1M +3.3V_ALW
107 91 THRM_SMBDAT
12 ICH_EC_SPI_DO HSTDATAOUT SGPIO40 CAP_LED# 36
SGPIO41 90 SCRL_LED# 36
34 EC_FLASH_SPI_CLK 103 FLCLK SGPIO42 89 NUM_LED# 36
34 EC_FLASH_SPI_DIN 106 FLDATAIN
HOST/8051 SPI SGPIO43 4 SIO_SPI_CS# 12
108 (8) R214 1 2 100K +3.3V_ALW
34 EC_FLASH_SPI_DO FLDATAOUT +3.3V_ALW
SGPIO35 1 LOM_SMB_ALERT# 40
109 2 SFPI_EN
13 SIO_PWRBTN# GPIO80 SGPIO36 (SFPI_EN)

1
SNIFFER_YELLOW 110 3 1 = Enabled.
36 SNIFFER_YELLOW GPIO81 SGPIO37 DOCK_SMB_PME 43
52 R452
87
GPIO96/TOUT1
11
0.9V_DDR_VTT_ON 49 0 = Disabled 1K_NC
32 BC_CLK BC_CLK OUT7/nSMI SIO_EXT_SMI# 13
86 BC R453 2 1 +5V_ALW
32 BC_DAT BC_DAT
85 (3) 10K
32 BC_INT#

2
C BC_INT# SFPI_EN C
MISCELLANEOUS nPWR_LED 115 BAT2_LED# 36
(8) nBAT_LED 114 BAT1_LED# 36

1
MEC5025_XTAL1 122 CLOCK 84 FWP#
MEC5025_XTAL2 XTAL1 nFWP R451
124 XTAL2 (3) GPIOA3/WINDMON 73 0.9V_DDR_VTT_PWRGD 49
R476 1 2 10K 123 117 T74 PAD Flash Recovery. 1K
XOSEL GPIO83/32KHZ_OUT
PWRGD 49 RUNPWROK 32,44,51
C204 4.7U/10V 53 RESET_OUT# 44

2
VR_CAP nRESET_OUT/OUT6 MEC_TEST_PIN
2 1 22 VR_CAP TEST_PIN 72 T78 PAD
2 1 MEC_AGND 125 Populate
AGND

1
L56 113 for flash
BLM11A121S VSS
104 VCC_PLL VSS 88
1 2 MEC_VCC_PLL POWER PLANES 74 R489 corruption +3.3V_ALW
+3.3V_ALW VSS
L57 (9) VSS 51 0 issue.
1

1
BLM11A121S 101 26

2
C577 VSS_PLL VSS R494
Low =
0.1U/10V 100K
Write Protected.
2

1 2 MEC5025
L39 LQFP128-16X16-4-FX2

2
BLM11A121S Rev 0.01 (11/09/05) FWP#

1
For MEC5025 Rev.C: C685=22uF and Flash Write
+3.3V_ALW R493
32KHz Clock. External Work Around populate workaround circuit. Protect bottom
Debug Serial Port 100K_NC
MEC5025_XTAL2 Circuit. For MEC5025 Rev.D: C685=4.7uF and +3.3V_ALW 4K of internal
depopulate workaround circuit. Flash Recovery Port.
bootblock flash.

2
2

R467 R468 2

2
R473 100K_NC 10K_NC C563
D 0 4.7U/6.3V_NC D
W1
D32 2 1 R495 R491 R490
1

4 1 MEC5025_XTAL1 CH501H_NC R466 R194 0_NC JDEBUG1 1M 10K 10K


1

10K_NC 1 2 VR_CAP
QUANTA
1

1
ALWON 1 Q67 5 8051_RX
3 2 2 1 2 2 4
1

MMBT3906_NL_NC 8051_TX
3
3

C565 32.768KHZ C570


COMPUTER
3

22P/50V 22P/50V Q65 2


2
2

2N7002W-7-F_NC 1 Title
R450 100K_NC MLX_53398-0571 DEBUG_ENABLE# Ultra I/O Controller MEC5025
1

1 2
Size Document Number Rev
JM7 1A

Date: Wednesday, June 28, 2006 Sheet 31 of 57


1 2 3 4 5 6 7 8
5 4 3 2 1

RP3
+3.3V_ALW 2 1 PWRUSB_OC#
4 3 SYS_PME#
6 5 PCIE_WAKE#
8 7 DBAY_MODPRES#

8P4R-10K USIO1
D D

R471 10K
2 1 DOCK_SMB_ALERT# ECE5018 Midway
128 PIN VTQFP Place closely pin USIO2.
54 PBAT_PRES# 97
98
GPIOA[0] PCI POWER CLKRUN# 37
56 CLK_PCI_5018
CLKRUN# 13,27,31
CLK_PCI_5018
45,54 SBAT_PRES# GPIOA[1] PCI_CLK CLK_PCI_5018 17
45 CHG_PBATT 99 GPIOA[2] SIRQ (3) SER_IRQ 39 IRQ_SERIRQ 13,27,31,40

1
45 CHG_SBATT 100 GPIOA[3]
45 PBAT_DSCHG 101 GPIOA[4] LAD0 54 LPC_LAD0 11,31,40
SYS_PME# 102 52 R187
27,42 SYS_PME# GPIOA[5] LAD1 LPC_LAD1 11,31,40
PCIE_WAKE# 103 49 10_NC
28,29,40 PCIE_WAKE# GPIOA[6] LAD2 LPC_LAD2 11,31,40
33 USB_BACK_EN# 104 LPC BUS 47 LPC_LAD3 11,31,40

2
GPIOA[7] LAD3
LFRAME# 42 LPC_LFRAME# 11,31,40
+3.3V_ALW Reserved for Broadcom LOM solution BID2 (8)
Discrete Board ID Straps 112 GPIOF[4] LRESET# 41 PLTRST# 6,12,18,28,29,31,40

1
VGA_IDENTIFY 111 46
GPIOF[5] LDRQ0# LPC_LDRQ0# 11
110 44 C203
40 LOM_SUPER_IDDQ GPIOF[6] LDRQ1# LPC_LDRQ1# 11
109 4.7P/50V_NC
40 LOM_TPM_EN#

2
GPIOF[7]
40 LOM_LOW_PWR DLAD0 55 D_LAD0 43
R461 2 1 10K 88 53
GPIOG[0] DLAD1 D_LAD1 43
2

27,28 SC_DET# 89 GPIOG[1] DOCKING LPC DLAD2 50 D_LAD2 43


R180 R182 R185 R188
11,35 LED_MASK# 90
91
GPIOG[2] GPIO (8) DLAD3 48
43
D_LAD3 43
GFX_DEVID2 GPIOG[3] DLFRAME# D_LFRAME# 43
10K_NC 10K_NC 10K_NC 10K_NC
13 SIO_EXT_WAKE#
R165 1 2 0 92 GPIOG[4] (25) DCLK_RUN# 38 D_CLKRUN#
D_CLKRUN# 43
93 45 D_DLDRQ1# DOCKING +3.3V_RUN
12 ICH_PME# D_DLDRQ1# 43
1

GPIOG[5] DLDRQ1# D_SERIRQ


13 ICH_PCIE_WAKE# 94 GPIOG[6] DSER_IRQ 40 D_SERIRQ 43 PULLED UP
BID0 95
29 WLAN_RADIO_DIS# GPIOG[7]
BID1 60
BC_CLK BC_CLK 31

1
3
BID2
C VGA_IDENTIFY
28 EXPRCRD_PWREN# 26
27
GPIOH[4] BC BC_DAT 59
58
BC_DAT 31
RP4 C
28 EXPRCRD_STDBY# GPIOH[5] BC_INT# BC_INT# 31
IMVP6_PROCHOT# 32 4P2R-S-100K
51 IMVP6_PROCHOT# GPIOH[6]
2

44 5V_3V_1.8V_1.25V_RUN_PWRGD 33 GPIOH[7] GPIOB[0]/INIT# 65 USB_SIDE_EN# 33


66 PWRUSB_OC#
GPIOB[1]/SLCTIN# PWRUSB_OC# 33
R181 R183 R186 R189 105 82
24 LCD_TST PWRUSB_EN 33

2
4
10K 10K 10K 10K OUT65 GPIOB[2]/PD0 D_CLKRUN#
GPIOB[3]/PD1 81 HP_NB_SENSE 38,39
R223 2 1 12K/F 127 80 D_SERIRQ
DOCK_HP_MUTE# 38
1

R222 2 RBIAS GPIOB[4]/PD2


+3.3V_ALW 1 10K 126 ATEST GPIOB[5]/PD3 79 AUD_SPDIF_SHDN 38
VGA_IDENTIFY 78 +3.3V_RUN
GPIOB[6]/PD4 BEEP 38
ECE5018 XTAL2
1 = Discrete Gfx. ECE5018 XTAL1
122 XTAL2 PARALLEL GPIOB[7]/PD5 77 NB_MUTE# 38
UMA 123 XTAL1/CLKIN
0 = UMA. PORT (17) GPIOC[0]/PD6 76 DOCK_SMB_ALERT#
DOCK_SMB_ALERT# 43

2
PAD T63 9 USBDP0 GPIOC[1]/PD7 75 DOCKED 41,43
PAD T16 10 USBDN0 GPIOC[2]/SLCT 67 QBUFEN# 42
BID2 BID1 BID0 JM7 JM7B 13 68 R191 R166
PAD T70 USBDP1 GPIOC[3]/PE DOCK_PWR_EN 43
0 0 0 ENG1 (X00) ENG1 (X00) 100K 100K
0 0 1 ENG2 (X01) ENG2 (X01)
PAD T66 12
15
USBDN1 USB GPIOC[4]/BUSY 69
70
ADAPT_OC 46
PAD T68 ADAPT_TRIP_SET 46

1
USBDP2 GPIOC[5]/ACK#
0 1 0 ENG3 (X02) ENG3 (X02)
PAD T71 16 USBDN2 (19) GPIOC[6]/ERROR# 71 PS_ID 54
0 1 1 ENG4 (X03) ENG4 (X03) 19 73 D_DLDRQ1#
PAD T15 USBDP3 GPIOC[7]/ALF# PSID_DISABLE# 54
1 0 0 QT (X04) QT (X04) 18 IMVP6_PROCHOT#
PAD T65 USBDN3 PANEL_BKEN 6
1 0 1 RAMP (A00) RAMP (A00) 21 74 R67 100K
PAD T64 USBDP4 GPIOD[0]/STROBE#
1 1 0 22 1 2
PAD T69 USBDN4
GPIOE[0]/RxD 1 RXD0 33
GFX_CORE_ON 63 GPIOD[3]/VBUS_DET GPIOE[1]/TxD 2 TXD0 33
26 MODPRES#
DBAY_MODPRES#
28
29
GPIOD[4]/OCS1_N UART GPIOE[2]/RTS# 3
4
RTS0# 33
33 DBAY_MODPRES# GPIOD[5]/OCS2_N GPIOE[3]/DSR# DSR0# 33
24MHz Clock 26 HDDC_EN# 30 GPIOD[6]/OCS3_N (8) GPIOE[4]/CTS# 5 CTS0# 33
+3.3V_SUS
ECE5018 XTAL1 31 84
26 MODC_EN# GPIOD[7]/OCS4_N GPIOE[5]/DTR# DTR0# 33
83 RI0#
GPIOE[6]/RI# RI0# 33

2
R202 1M_NC R201 0_NC EC_VDDA 125 6
B VDDA33PLL GPIOE[7]/DCD# DCD0# 33 B
1 2 1 2 ECE5018 XTAL2 8 VDDA33_0
14 113 R164
VDDA33_1 IRTX IRTX 35
1

10K
Y1 C239 C238
20
11
VDDA33_2 IRCC IRRX 114
61
IRRX 35
LID_CL_SIO# 36

1
VSS_0 GPIOD[1]/CIRTX
1 2 4.7U/6.3V 4.7U/6.3V 17 (8) 62 1.05V_RUN_ON 48
2

VSS_1 GPIOD[2]/CIRRX RI0#


24MHz_NC
23
36
VSS_2 POWER PLANES GPIOF[0]/IRMODE/IRRX3A 118
117
IRMODE 35
VSS_3 GPIOF[1]/IRRX2 ATF_INT# 37
1

Crystal and surrounding 51 VSS_4 (21) GPIOF[2]/IRTX2 116 BID0


C218 C216 72 115 BID1
30P/50V_NC 30P/50V_NC components not needed 87
VSS_5 GPIOF[3]/IRMODE/IRRX3B
2

VSS_6 CLK_SIO_14M
unless SIO USB Hub is 96 VSS_7 SIO GPIOH[0] 24 WIRELESS_ON/OFF# 36
121 25 BT_RADIO_DIS# 35
utilized. VSS_8 GPIOH[1]

1
128 VSS_9 RESET SYSOPT1/GPIOH[2] 106 WWAN_RADIO_DIS# 29
+3.3V_ALW 34 107 R179 1 2 0 LOM_CABLE_DETECT 40
57
VCC1_0
VCC1_1
(4) SYSOPT0/GPIOH[3] R170
85 64 CLK_SIO_14M 10_NC
+3.3V_ALW EC_VDDA VCC1_2 14 MHz_IN CLK_SIO_14M 17
108

2
L37 VCC1_3
119 VCC1_4 Reserved for Broadcom
1 2 MISCELLANEOUS LOM solution

1
BLM18PG181SN1 120 VDD18
86 CAP_LDO (4) TEST_PIN 35 RSV_TEST_PIN
T14 PAD
C189
1

Use BLM18PG if 124 7 4.7P/50V_NC


RUNPWROK 31,44,51

2
C228 C237 C241 VDDA18PLL PWRGD
SIO USB Hub is
2

0.1U/10V 0.1U/10V 0.1U/10V


2

utilized. C206 C207 C188 C220 ECE5018


4.7U/6.3V 0.1U/10V 4.7U/6.3V 4.7U/6.3V
1

A A

QUANTA
2

C187 C201 C205 C221 C200


0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V COMPUTER
1

Title
Ultra I/O Controller EEC5018

Size Document Number Rev


Place these caps near ECE5018. JM7 1A

Date: Wednesday, June 28, 2006 Sheet 32 of 57


5 4 3 2 1
1 2 3 4 5 6 7 8

External USB PORT hookup reference. Your design may +3.3V_SUS


need more or less external ports and may be mapped U21
C349 1 2 0.1U/50V/0603 28 26 CP1 JCOM1
differently C1+ VCC RI0
1 2 5

1
24 C337 0.47U/25V 3 4 DTR0 RI0 9
C1- C351 CTS0 DTR0
V+ 27 1 2 5 6 4
L6 C327 1 2 0.47U/25V/0805 1 0.1U/10V 7 8 TXD0# CTS0 8

2
USBP0 D- C2+ C329 0.47U/25V TXD0#
12 ICH_USBP0- 1 2 3
4 3 USBP0 D+ 2 3 1 2 8P4C-270P/50V RTS0 7
12 ICH_USBP0+ C2- V- RXD0# 2
DLW21SN900SQ2B_NC 14 9 TXD0# CP2 DSR0 6
32 TXD0 T1IN T1OUT
13 10 RTS0 1 2 RTS0 DCD0 1
A 32 RTS0# T2IN T2OUT A
R21 0 12 11 DTR0 3 4 RXD0#
32 DTR0# T3IN T3OUT
1 2 5 6 DSR0 FOX_DS00191-MT221-7F
20 7 8 DCD0
R23 0 DCD0 R2OUTB
4 R1IN R1OUT 19 DCD0# 32
1 2 RI0 5 18 8P4C-270P/50V
R2IN R2OUT RI0# 32
RXD0# 6 17
R3IN R3OUT RXD0 32
L9 CTS0 7 16
R4IN R4OUT CTS0# 32
4 3 USBP1 D- DSR0 8 15
12 ICH_USBP1- R5IN R5OUT DSR0# 32
1 2 USBP1 D+
12 ICH_USBP1+
24,31,44,53 RUN_ON 22 FORCEOFF INVILID 21 PAD T35
Place these beads close to JCOM1 as soon as possible
DLW21SN900SQ2B_NC +3.3V_SUS 23 25
FORCEON GND
R30 0 MAX3243CPWR
If MAX3243 pin 22 tied to RUN_ON,then it can not support Ring Out
1 2

R26 0
1 2

L8
PJP22 Ext Side JUSB3
1 2 USBP3 D- 1 2 Place one 150uF cap by each FOX_UB1112C-TB210-7F
12 ICH_USBP3-
4 3 USBP3 D+ +5V_ALW +USB_SIDE_PWR 1
12 ICH_USBP3+ USB connector. V1+
FS3
DLW21SN900SQ2B_NC 455/5A_NC U28 +USB_SIDE_PWR 5 V2+
1 2 2 IN GND 1
R27 0 USBP1 D- 2 DATA1_L
1 2
3 7 +USB_SIDE_PWR USBP0 D- 6
32 USB_SIDE_EN# EN1# OUT1 DATA2_L
R28 0 8
OC1# USB_OC0_1# 12
1 2 USBP1 D+ 3
+USB_SIDE_PWR DATA1_H
B 4 EN2# OUT2 6 B

1
L43 5 USBP0 D+ 7
USBP2 D- C363 C328 OC2# DATA2_H
12 ICH_USBP2- 1 2

1
USBP2 D+ 0.1U/10V 10U/10V_NC

SHEIL1

SHEIL2

SHEIL3

SHEIL4
12 ICH_USBP2+ 4 3 4

2
TPS2062 + C25 + C360 GND1
DLW21SN900SQ2B_NC 150U/6.3V_NC 150U/6.3V 8 GND2

1
2

2
R303 0 C26 C27

10

11

12
1 2 0.1U/10V 0.1U/10V
PJP19

2
R299 0 1 2
1 2 +5V_ALW
FS2
455/5A_NC U1
Platforms should put in PADS for the USB chokes if they
1 2 2 IN GND 1
have the room. Chokes should be NOPOP.
3 7 +USB_BACK_PWR
32 USB_BACK_EN# EN1# OUT1
OC1# 8 USB_OC2_3# 12 Ext Back JUSB1
1

4 6 +USB_BACK_PWR SUY_020133MR004S525ZL
EN2# OUT2
1

C324 5 +USB_BACK_PWR 1
0.1U/10V C362 OC2# V+
2

1
10U/10V_NC USBP2 D- 2
2

TPS2062 + C4 + C1 USBP2 D+ DATA_L


3 DATA_H
150U/6.3V_NC 150U/6.3V 5
SHIELD1

1
4 6

2
C20 GND SHIELD2
0.1U/10V

2
C Each channel is 1A C

JUSB2
C15 0.1U/10V FOX_UB11193-8M6-7F
1 2 +USB_BACK_PWR 1 V+
USBP3 D- 2 DATA_L
+PWR_SRC USBP3 D+ 3 DATA_H
FS1 L7 4
SMD1812P150TF/24 BLM21PG600SN1D GND1
6
4 5 USB_PWR_SRC_L 1 2 USB_PWR_SRC 1 2 USB_PWR_SRC_R USB_PWR_SRC_R 5 PWR_SRC
2
1

1 PUSB_SDA 6 SDA
1

R40 C28 Q12 C22 R24 1 150

SHEIL1
SHEIL2
SHEIL3
SHEIL4
SHEIL5
32 DBAY_MODPRES# 2 7
3

SAL
1

GND2
100K 0.47U/25V FDC658P_NL 0.1U/50V/0603
2

R22 PUSB_SCL 8
2

100K SCL

9
10
11
12
13
14
1
C21
2

1000P/50V_NC
PWRUSB_OC# 32
2

2
3

R39
10K 2 Q5
D 2N7002W-7-F_NC D
3 1

PUSB_SDA
1

PUSB_SCL
QUANTA
2

2 Q13 R25 C24


32 PWRUSB_EN
1

2N7002W-7-F 200K 0.1U/50V/0603


Q6 Q4
2 2
COMPUTER
1

2N7002W-7-F 2N7002W-7-F
2

Title
3

SERIAL PORT & USB


31,54 SBAT_DH_SMBDAT
31,54 SBAT_DH_SMBCLK
Size Document Number Rev
JM7 1A

Date: Wednesday, June 28, 2006 Sheet 33 of 57


1 2 3 4 5 6 7 8
A B C D E

4 4

8Mbit (1M Byte), SPI RTC BATTERY


+3.3V_SUS
Non-iAMT
Layout Note: +RTC_CELL +3.3V_RTC_LDO +PWR_SRC
Place R471 within 500 mils from SPI flash.

1
Place R498 & R534 within 500 mils of the R482 R477 D15
MEC5025. 10K 10K U14
1 2 3 OUT IN 1
4

2
U36 CH751H-40HPT 5/3#

1
1 8 2 5 C261
12 SPI_CS0# CE# VDD GND SHDN
R484 1 2 15 6 C257 1U/25V_NC
31 EC_FLASH_SPI_CLK SCK

1
R230 1 2 15 5 C576 2.2U/6.3V_NC MAX1615_NC
31 EC_FLASH_SPI_DO

2
R483 1 SI
31 EC_FLASH_SPI_DIN 2 15 2 SO HOLD# 7 0.1U/10V

2
D31
Non-iAMT 3 WP# VSS 4
R414 1K J13
3 SST_SST25VF080B 1 2 +RTC_1 1 2 +RTC 1 3
2
CH751H-40HPT

2
MLX_53261-0271 RTC-BATTERY
C500
1U/25V

1
Keyboard Scan Extension
+3.3V_ALW
U7
KSO[0..17]
KSO[0..17] 36
30 9 KSO0
VCC1 KSO0 KSO1
10 VCC1 KSO1 11
12 KSO2
KSO2

1
C122 C114 39 13 KSO3
0.1U/10V 0.1U/10V NC3 KSO3 KSO4
14
ECE1077 KSO4
15 KSO5

2
KSO5 KSO6
16
40 PIN QFN KSO6
KSO7 17 KSO7
KSO8
37 NC1 KSO8 18
+3.3V_ALW 38 19 KSO9
NC2 KSO9 KSO10
KSO10 20

1
2 2
21 KSO11
R475 KSO11 KSO12
KSO12 22
10K 23 KSO13
KSO13 KSO14
KSO14 24
25 KSO15

2
KSO15 KSO16
31 BC_A_DAT 34 BC_DATA KSO16/GPIO_0 26
27 KSO17
KSO17/GPIO_1 KSO18
31 BC_A_CLK 35 BC_CLK KSO18/GPIO_2 28
29 KSO19
KSO19/GPIO_3
31 BC_A_INT# 36 BC_INT# KSO20/GPIO_4 31 KYBD_DET# 36
32 KSO21
KSO21/GPIO_5 KSO22
KSO22/GPIO_6 33
KSI[0..7]
KSI[0..7] 36
1 KSI0
KSI0 KSI1
KSI1 2
3 KSI2
KSI2 KSI3
KSI3 4
R101 0 5 KSI4
KSI4 KSI5
1 2 40 TEST_PIN KSI5 6
7 KSI6
KSI6 KSI7
41 GND_PAD KSI7 8

ECE1077
11/09/2005

1 1

QUANTA
Title
COMPUTER
FLASH, RTC & KC

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 34 of 57


A B C D E
1 2 3 4 5 6 7 8

Touch Pad

+3.3V_ALW +5V_RUN
L53
12 ICH_USBP5- 4 3 USBP5 D-

2
12 ICH_USBP5+ 1 2 USBP5 D+ Support the new imbeded
A A
diagnostics.

1
3
DLW21SN900SQ2B_NC R435
100K
R430 0 RP15

1
1 2 JP1 4P2R-4.7K
31 TP_CABLE_DET# 1 2
R423 0

2
4
3 4
1 2 5 6 SP_GND 36
USBP5 D-
7 8 SP_X 36
USBP5 D+
9 10 SP_Y 36
+3.3V_RUN 11 12 SP_V+ 36
R143 BLM11A601S
13 14
15 16 1 2 CLK_TP_SIO 31
36 LID_CL# 17 18 1 2 DAT_TP_SIO 31
+3.3V_ALW TP_VCC R142 BLM11A601S
19 20
Lid Switch(Hall) BIO FOX_HT1310F
+3.3V_ALW +3.3V_RUN

2
4
6
8

2
4
6
8
+5V_RUN
R133 0/0805
1

C165 C174 CP3 CP10 TP_VCC 1 2


0.1U/10V 0.1U/10V 8P4C-10P/50V_NC 8P4C-10P/50V_NC
2

1
C160 C163

1
3
5
7

1
3
5
7
0.1U/10V 0.047U/10V

2
B B
CP3 and CP10 depend on EA quality.

This circuit is only needed if


the platform has the SNIFFER.
R292 10K
1 2 BT_ACTIVE 29,36

Bluetooth

1
+3.3V_RUN Q46 2 LED_MASK# 11,32
MMBT3906_NL

3
J2
1 GND Activity LED 2
3 3.3V(Logic) COEX2 4 COEX2_WLAN_ACTIVE 29
32 BT_RADIO_DIS# 5 Radio Enable/Disable# COEX1 6 COEX1_BT_ACTIVE 29
PAD T2 7 RSVD USB- 8 ICH_USBP7- 12
12 ICH_USBP7+ 9 USB+ GND 10

TYC_1566995-1

2
1

1
R289 R11
C7 C6 10K 10K C5
C C
0.1U/10V 100P/50V 33P/50V
2

2
1

1
FIR
+3.3V_RUN
1

C178 Total require 1/4W, ~3.6 ohm


1

4.7U/10V_NC
2

R172
47_NC
Total require 1/8W U12
2

IR_LEDA 1 IREDA
2 IREDC
IRTX 3
32 IRTX TXD
IRRX 4
32 IRRX RXD
IRMODE 5
32 IRMODE SD/MODE
FIR_VCC 6 VCC
7 MODE
1

D 8 GND
D
1

R168 C195 C196 R169


10K_NC 4.7U/10V_NC 0.1U/10V_NC 10K_NC TFDU6102-TR3_NC

QUANTA
2

2
2

Title
COMPUTER
TOUCH PAD, BULE TOOTH & FIR

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 35 of 57


1 2 3 4 5 6 7 8
A B C D E

+3.3V_RUN +3.3V_ALW
HDD activity LED. Keyboard Connector Sniffer Switch SW1

1
R371 SNIFFER1 4
100K GUN

1
R43 JKB1 3

2
100K_NC G
34 KYBD_DET# 1
KSO10
4 47K 2 4
R42 0 Q9 Support the new imbeded KSO11

2
DDTA114YUA-7-F KSO9 3
2 1 2 2
11 SATA_ACT# diagnostics. KSO14 4 ON
10K 5
KSO13
KSO15 6 SNIFFER2
7 1 S
KSO[0..17] KSO16
34 KSO[0..17]

3
HDD_LED KSO12 8
HDD_LED 43 9
KSO0 FOX_1BS008-13130-7F
KSI[0..7] KSO2 10
34 KSI[0..7] 11
KSO1
KSO3 12
KSO8 13
Blue tooth LED. R35 KSO6 14
15 35
+3.3V_RUN
2K/F D5 KSO7
16 36

1
+5V_RUN 1 2 2 1 KSO4
17 37 SP_GND 35
KSO5 R225
18 38 SP_X 35
LTST-C191TBKT KSI0 100K
19 39 SP_V+ 35
KSI3
20 40 SP_Y 35
KSI1 R233 10K

2
21

3
KSI5 2 1 SNIFFER1
22 32 WIRELESS_ON/OFF#
2 Q8 KSI2
29,35 BT_ACTIVE 23

1
2N7002W-7-F KSI4
KSI6 24 C240

1
KSI7 25 1U/10V

2
POWER_SW# 26
37 POWER_SW# 27
R239 2 1 330
31 NUM_LED# 28
R243 2 1 330
31 CAP_LED# 29
R238 2 1 330 +RTC_CELL
31 SCRL_LED# 30
KSO17
Power & Suspend. 31

1
3 +3.3V_SUS +3.3V_ALW 3
32 R251
33 100K
34
5

U2 FOX_GS12403-0001K-8F R249 10K

2
31 SNIFFER_PWR_SW# 2 1 SNIFFER2
BREATH_PWRLED CP8 CP7 CP5
31 BREATH_LED# 2 4

1
8 7 KSI1 8 7 KSO4 8 7 KSO12
6 5 KSI3 6 5 KSO7 6 5 KSO16 C278
7SH04 4 3 KSI0 4 3 KSO6 4 3 KSO15 1U/10V
3

2
2 1 KSO5 2 1 KSO8 2 1 KSO13

8P4C-100P/50V_NC 8P4C-100P/50V_NC 8P4C-100P/50V_NC


CP9 CP6 CP4
KSI6 KSO3 KSO14
8
6
7
5 KSI4
8
6
7
5 KSO1
8
6
7
5 KSO9 Hall Switch +3.3V_ALW
4 3 KSI2 4 3 KSO2 4 3 KSO11
KSI5 KSO0 KSO10
Sniffer LED 2 1 2 1 2 1

1
8P4C-100P/50V_NC 8P4C-100P/50V_NC 8P4C-100P/50V_NC
+3.3V_SUS +3.3V_SUS R229
100K
C119 C120
1 2 KSI7 1 2 KSO17 R228 10

2
32 LID_CL_SIO# 1 2 LID_CL# 35
Q29 Q30 100P/50V_NC 100P/50V_NC

1
2N7002W-7-F 2N7002W-7-F
3

C242
2 2 0.047U/10V
SNIFFER_YELLOW 31 SNIFFER_GREEN 31

2
2 2

+RTC_CELL Layout Note: C252.1 pad is used


1

as a Provision For External


Power Cycling, Must place C252

1
SNIFFER Y_R SNIFFER G_R R213 on top to be accessed when
100K Keyboard is removed.
D17 2 R203 10K
R199 220 2 1 POWER_SW#
SNIFFER Y_R 2 1 3 1
31 MAIN_PWR_SW# WLAN
1

1
+3.3V_WLAN
R200 220 C208 C209
SNIFFER G_R 2 1 2 1U/10V 1U/10V_NC
2

1
Package 0603
12-22AUYSYGC/S530-A2/TR8
47K
D4 Q7
R34 100 LTST-C190GKT-DE 2 DDTA114YUA-7-F
29 LED_WLAN_OUT#
LED_WLAN_OUT#_R 1 2 2 1 10K
D1 Battery status. +3.3V_ALW +3.3V_ALW
R36 100 LTST-C190GKT-DE

3
BREATH_PWRLED 1 2 RBREATH_PWR_LED 2 1
Q11 Q10 LED_WLAN_OUT#_R
1

1
D2 DDTA114YUA-7-F DDTA114YUA-7-F
R31 100 LTST-C190GKT-DE
HDD_LED 1 2 RHDD_LED 2 1 47K 47K
1 D3 2 2 1
31 BAT2_LED# 31 BAT1_LED#
R33 220 10K 10K
BAT2_LED 1 2 RBAT2_LED 3 1

R32 220 QUANTA


3

BAT1_LED 1 2 RBAT1_LED 4 2
BAT2_LED BAT1_LED

19-22SURSYGC/S530-A2/TR8 Title
COMPUTER
SWITCH, KEYBOARD & LED

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 36 of 57


A B C D E
1 2 3 4 5 6 7 8

REM_DIODE1_N
R459 0 Put C6164,R580 & R581 as close as

1
REM_DIODE3_N 2 1 possable to Guardian.

1
C134 2 Q14
Put C690 close to Diode.

1
2200P/50V MMST3904 C79

1
2200P/50V_NC C136 2 Q66 C558

2
+3.3V_RUN 2200P/50V MMST3904 2200P/50V_NC
REM_DIODE1_P

2
2 R460 0
Put C149 close to Guardian. REM_DIODE3_P 2 1 Place near the bottom SODIMM
A A
R386 Put C86 close to Diode
10K
1

FAN1_TACH 31 Place under CPU


2

R113 0 Put C172,R582 & R583 as close as


R388 Put C144 close to REM_DIODE4_N 2 1 possable to Guardian.
0 Guardian. Put C714 close to Diode.

1
1

1
D29 J6 H_THERMDA C131 2 Q64 C141
3 H_THERMDA
1

CHN202UPT_NC FAN1_VOUT 2200P/50V MMST3904 2200P/50V_NC


FAN1_VOUT_FB 1
Placement should be on bottom

2
2
3

2
R114 0 side of MB, located within
3 C135 REM_DIODE4_P 2 1
triangle of CPU/MCH/DRAM
1

MLX_53398-0371 470P/50V

1
C463
22U/10V H_THERMDC
3 H_THERMDC
2
1

Placement should be near the WWAN minicard


U8
connector just under the inserted minicard.
+3.3V_SUS 11 43 +5V_SUS +5V_SUS
31,46 THRM_SMBDAT SMDATA VCP1 PWR_MON 51
12 46 VCP2
31,46 THRM_SMBCLK SMBCLK EMC 4001 VCP2
1

2
B REM_DIODE1_P 38 45 REM_DIODE3_P Thermistor P/N: B
R112 REM_DIODE1_N 37
DP1
DN1
QFN PIN48 DP3
DN3 44 REM_DIODE3_N R163
TH11-3H103FT
R159
49.9/F 2.2K/F 10K
H_THERMDA 41 48 REM_DIODE4_P
H_THERMDC DP2 DP4 REM_DIODE4_N R171 10K/NTC
40 47
2

1
+3VSUS_THRM DN2 DN4 VCP2 1 2
DP5 2

3
+3VSUS_THRM 35 1 0603
3V_SUS DN5
1

2 5V_CAL_SIO1#
C132 21 C186 package.
+RTC_CELL

1
0.1U/10V RTC_PWR3V ATF_INT# 2200P/50V Q25
20
2

1
R89 ATF_INT# ATF_INT# 32
44 SUSPWROK 1 2 1K THERM_PWRGO 23 VSUS_PWRGD POWER_SW# 3 POWER_SW# 36
2N7002W-7-F
R91 1 2 1K +3V_PWROK# 16 4
44 ICH_PWRGD# 3V_PWROK# ACAVAIL_CLR ACAV_IN 31,45,46
25 THERMTRIP_SIO
THERMTRIP_SIO THERM_STP# THERMTRIP_SIO
SYS_SHDN# 24 THERM_STP# 52
THERMATRIP1# 17 R100 7.5K/F
+RTC_CELL THERMATRIP2# THERMTRIP1# LDO_SHDN#_ADDR
18 THERMTRIP2# LDO_SHDN#/ADDR 27 2 1 +3.3V_SUS
THERMATRIP3# 19 THERMTRIP3# ATF_INT# R90
LDO_POK 33 2.5V_RUN_PWRGD 44 1 2 10K +3.3V_SUS
1

C117 THERM_VEST 42 THERMTRIP_SIO R95 1 2 10K +3.3V_ALW


0.1U/10V R97 VSET
1 2 1K 26 XEN LDO_SET 28 THERM_LDO_SET THERM_STP# R88 1 2 10K_NC +RTC_CELL
34
2

VSS
LDO_OUT 32 +2.5V_RUN
LDO_OUT 31
FAN1_VOUT 7 FAN_OUT_1 THERM_LDO_IN
8 FAN_OUT_2 LDO_IN 30
R99 2 1 10K_NC 29 +2.5V_RUN
+3.3V_SUS
R92 2 1 10K_NC 39
LDO_IN 2.5V LDO
FAN_DAC1

1
C C
30 MDC_RST_DIS# 10 GPIO1
+3.3V_SUS 13 9 +3.3V_RUN
SIO_GFX_PWR 5V_CAL_SIO1# GPIO2 VDD_3V R383
14 GPIO3
15 5 +5V_RUN Voltage margining 31.6K/F_NC
5V_CAL_SIO2# GPIO4 VDD_5V_1
1

C617 needs to be placed 22 6 circuit for LDO

2
38 AUDIO_AVDD_ON GPIO5 VDD_5V_2 THERM_LDO_SET
near Guardian IC. R399 36 GPIO6/FAN_DAC2
8.2K
output.For Vmargin

1
EMC4001 stuff R592 and
R113=30K. R113=1K for 0603 R385
2

THERMATRIP1# 1K_NC
production. package.

2
3

R370 2.2K Q60 C472


+1.05V_VCCP 1 2 THERM_B1 2 MMST3904 0.1U/10V
2
1

3 H_THERMTRIP# +3.3V_RUN Layout Note: R392 0/1210_NC


Place those capacitors THERM_LDO_IN 1 2 +3.3V_RUN
close to EMC4001. This Value of
1

1
R396 can be 0.27

1
+3.3V_SUS C461 C462 C123 C125
0.1U/10V 10U/10V 0.1U/10V_NC 1U/10V_NC or 0 ohm
2

2 and the package

2
1

is 1210.
C613 needs to be placed R377 +3.3V_SUS
near Guardian IC. 8.2K
R115 332K/F
D 1 2 THERM_VEST Note: +5V_RUN +2.5V_RUN D
2

THERMATRIP2# VSET = (Tp-70)/21, where


1

Tp = 70 to 101 degrees C.
1

QUANTA
3

1
R369 2.2K Q58 C458 C139 R116 C140 Tp set at 88 degrees C.
+1.05V_VCCP 1 2 THERM_B2 2 MMST3904 0.1U/10V 0.1U/10V 118K/F 2200P/50V Guardian temp tolerance = C124 C127 C465 C467
2

0.1U/10V 10U/10V 0.1U/10V_NC 10U/4V_NC


+-3 degrees C. COMPUTER
2

2
1

Title
6 THERMTRIP_MCH#
FAN & THERMAL

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 37 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

JSPK1
Package 1206 for THD+N INTERNAL SPEAKER AMP AUD_SPK_R1 1 1
performance and Vista Logo AUD_SPK_R2 2
AUD_SPK_L1 2
U16 3 3
requirements. AUD_SPK_L2 4 4
AUD_LINE_OUT_L C301 1 2 0.033U/200V LIN- 3 6 AUD_SPK_L1 MLX_53398-0471
SPKR_INL OUTL+

2
AUD_LINE_OUT_R C259 1 2 0.033U/200V RIN- 2 7 AUD_SPK_L2
SPKR_INR OUTL- C559 C560 C561 C562
AUD_HP_OUT_L C613 2 1 1U/100V HP_OUT_L 27 20 AUD_SPK_R1 100P/50V 100P/50V 100P/50V 100P/50V
MAX9789A OUTR+

1
AUD_HP_OUT_R C594 2 HP_INL
A
1 1U/100V HP_OUT_R 26 HP_INR OUTR- 19 AUD_SPK_R2
A
C275 1U/10V
TQFN 32PIN HPL

1
C599 C609 C256 C289 1 2 24 16
BIAS AUD_HP_JACK_L 39
47P/50V_NC 47P/50V_NC 47P/50V_NC 47P/50V_NC AUD_SPK_ENABLE# 23 15
SPKR_EN# HPR AUD_HP_JACK_R 39
AUD_HP_NB_SENSE 22

2
AUD_AMP_MUTE# HP_EN REGEN
T75 PAD 25 MUTE# REGEN 4 L35 +5V_SPK_AMP +VDDA
AUD_AMP_GAIN1 31 1 SET
AUD_AMP_GAIN2 32
GAIN1 SET FB_600ohm+-25%_100MHz
GAIN2
VOUT 29 +VDDA _200mA_0.6ohm DC
+5V_SPK_AMP 17
+5V_SPK_AMP HPVDD

1
For TPA6040A,pop 9 30 VDD VDD
CPVDD VDD C247 C246
C866,depop R865. PVDD_8 8 +5V_SPK_AMP
1

1
C276 C271 C222 1 2 1U/16V 10 18 +5V_SPK_AMP 1U/10V 1U/10V

2
C1P PVDD_18

1
10U/10V 1U/10V 12 C285 C260 C262
R499 C1N 1U/10V 1U/10V 0.1U/10V
11 28

2
100K CPGND GND_28
5 Layout Note:

2
R498 PGND_5
14 21 Place close
2

0_NC PVSS PGND_21


13 CPVSS Layout Note:

1
AUDIO_AVDD_ON 1 2 AUD_AMP_MUTE# U22. Place close U22.
C225
1U/16V MAX9789A

2
+5V_SPK_AMP +5V_SPK_AMP +5V_RUN +5V_SPK_AMP
AUDIO_AVDD_ON
AUDIO_AVDD_ON 37
L36

1
2 1
2

R505 BLM21PG600SN1D
+5V_SPK_AMP 0

1
R242 R255 Layout Note:
100K 100K C286 C300 C223 C224
Place close to

2
B REGEN 1U/10V_NC 10U/10V_NC 1U/10V 10U/10V B
1

2
1

AUD_SPK_ENABLE# pin 8.

1
Layout Note:
R497 R256 C595 For TPA6040A,pop FB_60ohm+-25%_100MHz Place close to
3

100K 100K_NC 0.033U/16V_NC


C1425,depop R409. _3A_0.05ohm DC

2
AUD_EAPD 2 pin 18.
2

AUD_AMP_GAIN1
Q38 AUD_AMP_GAIN2
1

2N7002W-7-F
2

C616 +3.3V_RUN For TPA6040A,pop SET


R496 R257 GAIN2 GAIN1 GAIN 0.1U/10V
C331,depop R406.
3

2
100K_NC 100K 0 0 6dB 1 2

2
NB_MUTE# 2 C288 R258

5
0 1 10dB U38 0.033U/16V_NC 0
1

Q31 2 HP_NB_SENSE
1

1
2N7002W-7-F 1 0 15.6dB AUD_HP_NB_SENSE 4

1
1 NB_MUTE#
NB_MUTE# 32
1 1 21.6dB
7SH08

+VDDA Layout Note: R245 +VDDA


AZALIA (HD) CODEC Close to Pin 13. AUD_SENSE_A
5.1K/F
1 2

2
R221

1
U15 100K C282
R246 R248 1000P/50V
ICH_AZ_CODEC_BITCLK 6 13 AUD_SENSE_A 39.2K/F 20K/F
11 ICH_AZ_CODEC_BITCLK

2
C
R237 2 HDA_BITCLK SENSE_A C
11 ICH_AZ_CODEC_SDIN0 1 33 SDIN 8 HDA_SDI_CODEC SENSE_B 34 AUD_SENSE_B
ICH_AZ_CODEC_SDOUT 5
11 ICH_AZ_CODEC_SDOUT STAC9205 PORT_A_L

3 2

3 2
HDA_SDO AUD_HP_OUT_L
11 ICH_AZ_CODEC_SYNC 10 HDA_SYNC 39
11 41 AUD_HP_OUT_R
11 ICH_AZ_CODEC_RST# HDA_RST# LQFP 48PIN VREFOUT_A
PORT_A_R
37 32,39 HP_NB_SENSE
HP_NB_SENSE 2 2 AUD_MIC_SWITCH 39
46 21 Q39 Q40
AUD_EXT_MIC_L 39

1
DMIC_CLK PORT_B_L 2N7002W-7-F 2N7002W-7-F
2 DMIC0/VOL_UP/GPIO1 PORT_B_R 22 AUD_EXT_MIC_R 39
4 DMIC1/VOL_DN/GPIO2 VREFOUT_B 28 AUD_VREFOUT_B 39
For tuning. PORT_C_L 23 AUD_INT_MIC_IN 39
ICH_AZ_CODEC_BITCLK R220 0 AUD_EAPD 47 24
SPDIF_OUT SPDIF_IN/EAPD/GPIO0 PORT_C_R
43 AUD_SPDIF_OUT 2 1 48 SPDIF_OUT VREFOUT_C 29 Close to U21.
2

+VDDA
R236 35 AUD_LINE_OUT_L C248
47_NC PORT_D_L AUD_LINE_OUT_R 0.1U/16V
43 NC_43 PORT_D_R 36
44 NC_44 2 1
Close to pin 6. 45 14 R217 10K
2 1

+3.3V_RUN NC_45 PORT_E_L


PORT_E_R 15 1 2 +VDDA

5
31 C249 R224
GPIO4/VREFOUT_E DOCK_HP_MUTE# 32
C258 1 0.1U/10V 20K 1
DVDD_CORE_1 BEEP 32
0.1U/10V_NC 9 16 R218 10K AUD_PC_BEEP 2 1BEEP2 1 2 BEEP1 4
1

+3.3V_RUN DVDD_CORE_9 PORT_F_L


40 DVDD_CORE_40 PORT_F_R 17 1 2 +VDDA 2 SPKR 13
1

1
C273 C266 C270 3 30
DVDD_IO GPIO3/VREFOUT_F AUD_SPDIF_SHDN 32
10U/10V_NC 0.1U/10V 1U/10V R227

3
1

C229 25 18 10K_NC U13


2

0.1U/10V AVDD_25 CD_L 74LVC1G86GW


38 AVDD_38 CD_GND 19
ICH_AZ_CODEC_SDOUT 20
2

2
CD_R
2

D 7 12 AUD_PC_BEEP D
R234 DVSS PC_BEEP
MONO_OUT 32
47_NC +VDDA 26 AVSS_26 AC97VREFI
42 27
Close to pin 5. AVSS_42 VREFFILT
33 CAP2 QUANTA
2 1

CAP2
1

COMPUTER
1

C254 STAC9205 C245 C255


0.1U/10V_NC C227 C263 C235 10U/6.3V 10U/6.3V Title
1

0.1U/16V 1U/10V 10U/10V_NC Azelia CODEC


2

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 38 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+3.3V_RUN

C150

1
R132 0 10U/10V
1 2 1 2 R144 R105
38 AUD_VREFOUT_B
100K 100K
A A

2
1

1
32,38 HP_NB_SENSE AUD_MIC_SWITCH 38
R139 R128
4.7K 4.7K

2
R120 C145 R121 L32
5.1/F/0603 1U/10V 0 BLM18AG601SN1D 1 CON3
38 AUD_EXT_MIC_L 1 2 NB_MICIN_L4 1 2 NB_MICIN_L3 1 2 NB_MICIN_L2 1 2 MIC_IN_L1 2

1 2 NB_MICIN_R4 1 2 NB_MICIN_R3 1 2 NB_MICIN_R2 1 2 MIC_IN_R1


6
3
STEREO MIC
38 AUD_EXT_MIC_R
L33
R125 C149 R123 BLM18AG601SN1D
4
5
LINE IN

1
5.1/F/0603 1U/10V 0 TYC_1775162-1
R138 R122 C143 C129 1 CON4
20K_NC 20K_NC 100P/50V 100P/50V 2
HEADPHONE

2
6
3 LINE OUT

2
4
5
L35 TYC_1775162-1
BLM18AG601SN1D
1 2 HP_SPK_L2 JACK_GND
38 AUD_HP_JACK_L
1 2 HP_SPK_R2
38 AUD_HP_JACK_R
L34

1
B BLM18AG601SN1D B

1
L24,L26,L29,L30 C173 C164 R380
100P/50V 100P/50V 0
FB_600ohm+-25%_100MHz

2
_200mA_0.6ohm DC

+VDDA
2

R504
100K
+VDDA 8 U37A
LM358ADR2G R511
1

3 10K
1

1 2 1
2

R501 2
1

1K
C290 R510
4

2.2U/10V 100K
2

INT_MIC_C_L+
1
1

C593
C C
2.2U/10V R506 +VDDA
1K
2

C610 R513 U37B


2

8
J11 0.1U/16V/0603 10K LM358ADR2G C592
2 INT_MIC_L+ 2 1 INT_MIC_L1+ 1 2 INT_MIC_L2+ 5 0.1U/16V/0603
7 INT_MIC_IN_OP 2 1 AUD_INT_MIC_IN 38
1 INT_MIC_L- 2 1 INT_MIC_L1- 1 2 INT_MIC_L2- 6
1

Only Single INT MIC


MLX_53398-0271_NC R507 C600 R500
4

1 1K 0.1U/16V/0603 10K
2
2

M1 1 2
2

A-OF6027ZGF-P3R6 INT_MIC_C_L-
R509
1

ESD1 10K
1

C596 R508 SM05_NC


2.2U/10V 1K
2

Layout Note:
2

Place close to CODEC.

D D

QUANTA
Title
COMPUTER
AUDIO CONN

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 39 of 57


1 2 3 4 5 6 7 8
5 4 3 2 1

Place filters close to the power pins - 0.1uF should be closest to the LOM_TRD0- LOM_TRD1- LOM_TRD2- LOM_TRD3-
+1.2V_LOM +1.2V_LOM +1.2V_LOM power pin. Minimize the loop path from pin to cap to power feed via. LOM_TRD0+ LOM_TRD1+ LOM_TRD2+ LOM_TRD3+
The length of the path from the ground side of the cap to the ground via

1
1

1
should also be minimized. Layout Note: R327 R328 R324 R325 R314 R323 R312 R313

L45 L46 L21


Place termination 49.9/F_NC 49.9/F_NC 49.9/F_NC 49.9/F_NC 49.9/F_NC 49.9/F_NC 49.9/F_NC 49.9/F_NC

BLM11A601S BLM11A601S BLM11A601S +1.2V_LOM +3.3V_LAN resistors close to LAN

2
U30 controller(less than
0.25").
2

1
+1.2V_AVDDL +1.2V_GPHY_PLLVDD +1.2V_PCIE_PLLVDD H8 A3
VDDC VDDIO C383 C376 C370 C367
J4 VDDC VDDIO C2
2

1
H6 D10 0.1U/10V_NC 0.1U/10V_NC 0.1U/10V_NC 0.1U/10V_NC

2
D
C368 C36 C387 C385 C395 C48 VDDC VDDIO D
H5 F1
4.7U/10V 0.1U/10V 4.7U/10V 0.1U/10V 4.7U/10V 0.1U/10V D8
VDDC
BCM5755M VDDIO
G10
1

2
VDDC VDDIO
D7 VDDC VDDIO J2 Reserved for BCM5752 as back-up solution.
D6 VDDC 10mm x 10mm VDDIO L1 Reserved as optional EMI filtering for BCM5755M.
D5 VDDC
+1.2V_LOM +1.2V_AVDDL
BGA144 +2.5V_LOM
F11 AVDDL
F10 A5 +2.5V_LOM +2.5V_LOM +2.5V_LOM
AVDDL VDDP
VDDP G3 Place R676 as close as
1

+1.2V_GPHY_PLLVDD G12 L11


GPHY_PLLVDD VDDP possible to the ASIC. Pad is

1
R337 +1.2V_PCIE_PLLVDD K6 needed to measure 125Mhz L11 L17 L14
0/0603 PCIE_PLLVDD +2.5V_BIASVDD BLM11A601S BLM11A601S BLM11A601S
BIASVDD A12 clock for debugging.
+1.2V_PCIE_SDSVDD K4 H12 +2.5V_XTALVDD
2

PCIE_SDSVDD XTALVDD +2.5V_AVDD


AVDD A11
+1.2V_PCIE_SDSVDD C53 1 2 0.1U/10V GLAN_RXP_C L3 F12
12 PCIE_RX6+/GLAN_RX+

2
PCIE_TXDP AVDD
12 PCIE_RX6-/GLAN_RX-
C52 1 2 0.1U/10V GLAN_RXN_C M3 PCIE_TXDN
+2.5V_BIASVDD +2.5V_XTALVDD +2.5V_AVDD
2

12 PCIE_TX6+/GLAN_TX+ M7 PCIE_RXDP

1
C391 C45 L7 B12 LOM_TRD3-
12 PCIE_TX6-/GLAN_TX- PCIE_RXDN TRD3- LOM_TRD3- 41
4.7U/10V_NC 0.1U/10V_NC A4 B11 LOM_TRD3+ C31 C44 C29
28,29,32 PCIE_WAKE# LOM_TRD3+ 41
1

R46 WAKE# TRD3+


2 1 0 B1 0.1U/10V 0.1U/10V 0.1U/10V

2
6,12,18,28,29,31,32 PLTRST# PERST# LOM_TRD2-
17 CLK_PCIE_LOM M5 REFCLK+ TRD2- C12 LOM_TRD2- 41
L5 C11 LOM_TRD2+
17 CLK_PCIE_LOM# REFCLK- TRD2+ LOM_TRD2+ 41
12 SB_LOM_PCIE_RST# 2 1 Layout Note:
R52 0_NC D12 LOM_TRD1-
R47 2 1 4.7K_NC B3
TRD1-
D11 LOM_TRD1+
LOM_TRD1- 41 Place filters close to the power pins - 0.1uF should be closest to the
REFCLK_SEL TRD1+ LOM_TRD1+ 41
17 LOM_CLKREQ#
R44 2 1 0 F2 power pin. Minimize the loop path from pin to cap to power feed via.
CLKREQ# LOM_TRD0-
TRD0- E12 LOM_TRD0- 41 The length of the path from the ground side of the cap to the ground
K9 E11 LOM_TRD0+
C
11,31,32 LPC_LAD3
J5
LAD3 TRD0+ LOM_TRD0+ 41 via should also be minimized. C
11,31,32 LPC_LAD2 LAD2
L10 R49 0_NC
11,31,32 LPC_LAD1 LAD1
J7 C6 LOM_GPHY_TVCOI 2 1
11,31,32 LPC_LAD0 LAD0 GPHY_TVCOI
11,31,32 LPC_LFRAME# J9 LFRAME# Monitor GPHY PLL Clk +3.3V_LAN
6,12,18,28,29,31,32 PLTRST# M10 LRESET#
CLK_PCI_TPM J8 A9
17 CLK_PCI_TPM LCLK LINKLED# LOM_SPD10LED_GRN# 41
13,27,31,32 IRQ_SERIRQ H7 SERIRQ SPD100LED# B9 LOM_SPD100LED_ORG# 41
SPD1000LED# A10 PAD T36

2
R60 0 B8
TRAFFICLED# LOM_ACTLED_YEL# 41
2 1 J6 C361 C359
32 LOM_TPM_EN# TPM_EN# R63
J1 2 1 4.7K_NC +3.3V_LAN 0.1U/10V 4.7U/10V

1
NC
1

3
R56 2 1 10K_NC H3 M4 Rserved for BCM5752 as
R55 TPM_GPIO2/TPM_STATUS NC
2 1 10K_NC J3 TPM_GPIO1 back-up solution Q49
R59 R53 2 1 10K_NC G4 LOM_REGCTL25_PNP 1 MMJT9435T1
4.7K_NC TPM_GPIO0 M4 pin:
Rserved for BCM5752 as SCLK C9 LOM_SCLK 41
CLK_PCI_TPM E10 NC for BCM5755M. +2.5V_LOM
back-up solution. LOM_SI 41
2

SI
B6 D9 LOM_SO 41 SERIAL_DO/TPM_STATUS for

2
4
VAUXPRSNT SO
1

+3.3V_LAN R50 2 1 1K G11 C10 BCM5752. LOM_REGSEN25


VMAINPRSNT CS# LOM_CS# 41
R58 +3.3V_RUN R64 2 1 1K H4 LOW_PWR

1
33_NC LOW_PWR
LOM_SMB_ALERT# 31
C8 H9 C366 C365 C364
13,28,29 ICH_SMBCLK SMB_CLK GPIO0
13,28,29 ICH_SMBDATA C7 H11 LOM_SERIAL_DI R332 2 1 4.7K +3.3V_LAN 0.047U/10V_NC 0.1U/10V 10U/6.3V
1 2

2
SMB_DATA GPIO1_SERIAL_DI
GPIO2_SERIAL_DO C5 LOM_SERIAL_DO
C51 LOM_XTALO M9 C4
22P/50V_NC LOM_XTALI XTALO ENERGY_DET
L9 XTALI LOM_CABLE_DETECT 32
2

R45 1 1.15K/F +3.3V_LAN


Reserved for EMI. 2 A8 RDAC REGSUP25 L12 +3.3V_LAN
M11 LOM_REGCTL25_PNP R322 1R/F/1W
REGCTL25 LOM_REGSEN25
RDAC resistor R674 - 1% A1 DC_A1 REGSEN25 M12 1 2
- 1.15K for Docking solutions with analog s/w A6 DC_A6

2
B B
R333 200 A7
LOM_XTALO - 1.24K for Non-Docking solutions DC_A7 C381 C377
1 2 B7 DC_B7 REGSUP12 K12 +3.3V_LAN
Place as close to the ASIC as possible C1 J11 LOM_REGCTL12_PNP 0.1U/10V 4.7U/10V

1
DC_C1 REGCTL12

3
Y2 C3 J12 LOM_REGSEN12
LOM_XTALI DC_C3 REGSEN12 Q50
1 2 D1 DC_D1
R54 D2 LOM_REGCTL12_PNP 1 PBSS5540Z
DC_D2
1

25MHz 0_NC D3 D4 LOM_TRST# R51 2 1 4.7K_NC


C390 C389 LOW_PWR DC_D3 TRST# +1.2V_LOM
32 LOM_LOW_PWR 2 1 E1 DC_E1 TCK B5 PAD T37
27P/50V 27P/50V G2 F3 LOM_CABLE_DETECT goes to an input on a
PAD T40
2

2
4
R311 DC_G2 TDI LOM_REGSEN12
H2 DC_H2 TDO B4 PAD T38 system microcontroller that can poll this signal
0 K1 E3
DC_K1 TMS PAD T39 periodically and can de-assert the

1
2 1 LOM_SERIAL_DO K2 DC_K2 PAD T41
25MHz +-5 ppm 300uW Crystal. K3 M1 LOM_LOW_PWR when LOM_CABLE_DETECT C382 C380 C378 C379
DC_K3 NV_STRAP1 LOM_NV_STRAP0 0.047U/10V_NC 4.7U/10V_NC 0.1U/10V 10U/6.3V
M2 signal is high. Connect to an EC GPIOC defined

2
NV_STRAP0
B2 VSS by the GPIO mapping.
B10 VSS
Place high-frequency decoupling caps close to the power pins. Minimize the loop path E4 VSS
E5 K11 R57 2 1 4.7K_NC +3.3V_LAN
from pin to cap to power feed via. The length of the path from the ground side of the cap to E6
VSS NC_K11
K10 LOM_REGSEN12 and LOM_REGSEN25 should be routed using a trace
the ground via should also be minimized. VSS NC_K10
E7 VSS NC_J10 J10 from the load (PNP) back to the controller. Do not use a direct connection
E8 H10
+1.2V_LOM E9
VSS NC_H10
H1
to the power plane.Use 8 mils trace width for these signals.
VSS NC_H1
F4 VSS NC_G09 G9
F5 VSS NC_G1 G1
F6 VSS NC_E2 E2
1

F7 A2 R48 2 1 4.7K_NC +3.3V_LAN A2 pin:


C41 C32 C39 C42 C34 C33 C46 C43 VSS NC_A2
F8 VSS
Rserved for BCM5752 as NC for BCM5755M.
0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V F9 M8 back-up solution. ATTN_BTTN for BCM5752.
2

VSS DC_M8
G5 VSS DC_L8 L8
A G6 VSS DC_L4 L4 A
G7 VSS DC_K8 K8
G8 VSS DC_K7 K7
+3.3V_LAN +2.5V_LOM +1.2V_LOM L2
L6
M6
VSS
VSS
K5
R61
2
20K
1
QUANTA
VSS SUPER IDDQ LOM_SUPER_IDDQ 32
COMPUTER
2

C38 C49 C37 C47 C30 C50 C40 R62 Title


4.7U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 0.1U/10V 4.7U/10V_NC 39K/F LAN Broadcom 5755
1

Logic High Voltage must be


0.7V to 2.75V Size Document Number Rev
2

JM7 1A

Date: Wednesday, June 28, 2006 Sheet 40 of 57


5 4 3 2 1
A B C D E

TRANSFORM+RJ45
36nH is a suggested value.
Actual value will be systgem dependent.
Must use 0603 package for lower DC resistance. +2.5V_LOM NB_LOM_TRCT1
NB_LOM_TRCT2
For Broadcom NB_LOM_TRCT3
4 4
(5755) NB_LOM_TRCT4

2
U3

1
L20 1 2 0603CS-360EJTS TRD0N_L 2 48 NB_LOM_TRD0- R306 L44
40 LOM_TRD0- A0 0B1
L19 1 2 0603CS-360EJTS TRD0P_L 3 47 NB_LOM_TRD0+ 0/0603 BLM11A601S_NC C356 C357 C352 C353
40 LOM_TRD0+ A1 1B1
L18 1 2 0603CS-360EJTS TRD1N_L 7 43 NB_LOM_TRD1- 0603 package. 0.1U/10V 0.1U/10V 0.1U/10V_NC 0.1U/10V_NC
40 LOM_TRD1-

2
L16 0603CS-360EJTS TRD1P_L A2 2B1 NB_LOM_TRD1+
40 LOM_TRD1+ 1 2 8 42 Reserved for EMI.

1
L15 0603CS-360EJTS TRD2N_L A3 3B1 NB_LOM_TRD2- NB_LOM_TRCT1
40 LOM_TRD2- 1 2 11 A4 4B1 37
L13 1 2 0603CS-360EJTS TRD2P_L 12 36 NB_LOM_TRD2+ NB_LOM_TRCT2
40 LOM_TRD2+ A5 5B1
L12 1 2 0603CS-360EJTS TRD3N_L 14 32 NB_LOM_TRD3- NB_LOM_TRCT3
40 LOM_TRD3- A6 6B1
L10 1 2 0603CS-360EJTS TRD3P_L 15 31 NB_LOM_TRD3+ NB_LOM_TRCT4
40 LOM_TRD3+ A7 PI3L500-A 7B1
LOM_ACTLED_YEL# 19 22 NB_LOM_ACTLED_YEL#
40 LOM_ACTLED_YEL# LOM_SPD10LED_GRN# LED0 0LED1 NB_LOM_SPD10LED_GRN#
40 LOM_SPD10LED_GRN# 20 LED1 1LED1 23
LOM_SPD100LED_ORG# 54 52 NB_LOM_SPD100LED_ORG# Use 2.5V_LOM for center tap on
40 LOM_SPD100LED_ORG# LED2 2LED1 +3.3V_LAN
17 SEL 0B2 46 DOCK_LOM_TRD0- 43
magnetics when using Broadcom; CON2
32,43 DOCKED
5 NC 1B2 45 DOCK_LOM_TRD0+ 43 1.8V_LOM for Intel only
DOCKED 2B2 41 DOCK_LOM_TRD1- 43 RJ45 Connector
+3.3V_LAN 4 40
SEL 0: RJ45. 10
VDD_1 3B2
35
DOCK_LOM_TRD1+ 43
NB_LOM_ACTLED_YEL# R1 1 2 150 LED_Y_C 13
VDD_2 4B2 DOCK_LOM_TRD2- 43 LED_Y_C
SEL 1: Dock. 18 VDD_3 5B2 34 DOCK_LOM_TRD2+ 43 14 LED_Y_A
27 VDD_4 6B2 30 DOCK_LOM_TRD3- 43
38 29 NB_LOM_TRD0+ 11
VDD_5 7B2 DOCK_LOM_TRD3+ 43 TRD1+
50 NB_LOM_TRCT1 12
VDD_6 NB_LOM_TRD0- TRCT1
56 VDD_7 0LED2 25 DOCK_LOM_ACTLED_YEL# 43 10 TRD1-
1LED2 26 DOCK_LOM_SPD10LED_GRN# 43
51 NB_LOM_TRD1+ 4
2LED2 DOCK_LOM_SPD100LED_ORG# 43 TRD2+
Reserve pull up. NB_LOM_TRCT2 6
NB_LOM_TRD1- TRCT2
3 1 GND_1 5 TRD2-
3
6 GND_2
+3.3V_LAN 9 33 NB_LOM_TRD2+ 3
GND_3 GND_9 NB_LOM_TRCT3 TRD3+
13 GND_4 GND_10 39 1 TRCT3
16 44 NB_LOM_TRD2- 2
GND_5 GND_11 TRD3-
21 GND_6 GND_12 49
24 53 NB_LOM_TRD3+ 8
GND_7 GND_13 TRD4+
1

28 55 NB_LOM_TRCT4 7
R308 R309 R310 GND_8 GND_14 NB_LOM_TRD3- TRCT4
9 TRD4-
10K_NC 10K_NC 10K_NC
PI3L500-A NB_LOM_SPD100LED_ORG# R290 1 2 150 LED_O_C 15
NB_LOM_SPD10LED_GRN# R288 1 LED_O_C
2 150 LED_G_C 17
2

LOM_ACTLED_YEL# LED_G_C
LOM_SPD10LED_GRN# 16
LOM_SPD100LED_ORG# LED_O/G_A
18 SHIELD1
19 SHIELD2

BLS_L830-1J1C-43

2 2

+PWR_SRC +3.3V_ALW +3.3V_WLAN +3.3V_RUN +PWR_SRC +3.3V_ALW +3.3V_LAN

PQ27 PQ41
FDC655BN R226 SI3456DV NV_STRAP1 NV_STRAP0 S0 SI CS# SCLK
PJP23
6 0/1206_NC 6
1

5 4 1 2 5 4 1 2 Auto-Sense Mode 0 0 0 0 0 0
PR91 PR93 2 2
100K 100K 1 1 POWER_JP ST M45PE20 0 1 1 0 0 1
1

PR166 PR160 Atmel AT45BCM021B 0 0 1 0 1 1


2

3
100K 100K
+3.3V_LAN +3.3V_LAN
2

2
3

2
PQ25B
2N7002DW 5 R301 R302 R300
4.7K_NC 4.7K_NC 4.7K_NC
6

PQ25A
4

2 2N7002DW 5 U20
31 AUX_EN_WOWL

1
1

40 LOM_SCLK 2 SCK VCC 6


1

PR92 PR94 PC85 PQ42A PR159 PC149 8 5


40 LOM_SI
1

SO WP#
1

200K 470K 4700P/50V/0603_NC 2 2N7002DW 470K 4700P/50V/0603_NC 1 3


31 AUX_ON 40 LOM_SO SI RESET#
PR90 PR165 4 7
40 LOM_CS#
2

CS# GND

1
100K PQ42B 200K C350
2

2N7002DW AT45BCM021B 0.1U/10V


2

2
1 1

QUANTA
Title
COMPUTER
LAN SWITCH

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 41 of 57


A B C D E
1 2 3 4 5 6 7 8

+VCC_QBUF
D7 D6
1 2 VCC_QBUF_1 1 2
A +5V_RUN A

1
CH751H-40HPT CH751H-40HPT

1
C375 C373 C374 C369 R319
0.1U/10V 0.1U/10V 0.047U/10V 0.047U/10V 1K

2
PCI_AD[0..31] DOCK_AD[0..31]
12,27 PCI_AD[0..31] DOCK_AD[0..31] 43
U31

50
60
70
80
PCI_AD31 2 78 DOCK_AD31 +VCC_QBUF

VCC1
VCC2
VCC3
VCC4
PCI_AD30 A1 B1 DOCK_AD30
3 A2 B2 77
PCI_AD29 4 76 DOCK_AD29
PCI_AD27 A3 B3 DOCK_AD27
5 75 U4
PCI_AD28 A4 B4 DOCK_AD28 C35 0.1U/10V
6 A5 B5 74 47 BE1# VCC 48
PCI_AD26 7 73 DOCK_AD26 QUIETE# 35 36 1 2
PCI_AD25 A6 B6 DOCK_AD25 BE2# VCC
8 A7 B7 72
PCI_AD24 9 71 DOCK_AD24 2 46
A8 B8 12 PCI_PIRQA# A0 B0 DOCK_PIRQA# 43
PCI_AD24 3 45
A1 B1 DOCK_IDSEL 43
QUIETE# 79 1 4 44
OE1# NC1 27,32 SYS_PME# A2 B2 DOCK_PME# 43
PCI_GNT0# 5 43
12 PCI_GNT0# A3 B3 DOCK_GNT0# 43
PCI_AD23 12 68 DOCK_AD23 6 42
A9 B9 12,27 PCI_STOP# A4 B4 DOCK_STOP# 43
PCI_AD22 13 67 DOCK_AD22 7 41
A10 B10 12 PCI_PLOCK# A5 B5 DOCK_LOCK# 43
PCI_AD21 14 66 DOCK_AD21 8 40
A11 B11 12,27 PCI_SERR# A6 B6 DOCK_SERR# 43
PCI_AD20 15 65 DOCK_AD20 PCI_IRDY# 9 39
A12 B12 12,27 PCI_IRDY# A7 B7 DOCK_IRDY# 43
PCI_AD19 16 64 DOCK_AD19 10 38
A13 B13 12,27 PCI_C_BE3# A8 B8 DOCK_C_BE3# 43
PCI_AD18 17 63 DOCK_AD18 11 37
A14 B14 12,27,28 PCI_RST# A9 B9 DOCK_PCIRST# 43
B PCI_AD17 18 62 DOCK_AD17 B
PCI_AD16 A15 B15 DOCK_AD16
19 A16 B16 61 12,27 PCI_PAR 14 A10 B10 34 DOCK_PAR 43
PCI_FRAME# 15 33
12,27 PCI_FRAME# A11 B11 DOCK_FRAME# 43
69 OE2# NC2 11 12,27 PCI_C_BE1# 16 A12 B12 32 DOCK_C_BE1# 43
12,27 PCI_C_BE0# 17 A13 B13 31 DOCK_C_BE0# 43
PCI_AD15 22 58 DOCK_AD15 18 30
A17 B17 12,27 PCI_PERR# A14 B14 DOCK_PERR# 43
PCI_AD14 23 57 DOCK_AD14 19 29
A18 B18 12,27 PCI_DEVSEL# A15 B15 DOCK_DEVSEL# 43
PCI_AD13 24 56 DOCK_AD13 20 28
A19 B19 12,27 PCI_TRDY# A16 B16 DOCK_TRDY# 43
PCI_AD12 25 55 DOCK_AD12 21 27
A20 B20 12,27 PCI_C_BE2# A17 B17 DOCK_C_BE2# 43
PCI_AD1 26 54 DOCK_AD1 22 26
PCI_AD6 A21 B21 DOCK_AD6 A18 B18
27 A22 B22 53 23 A19 B19 25
PCI_AD3 28 52 DOCK_AD3
PCI_AD4 A23 B23 DOCK_AD4
29 A24 B24 51 1 NC1 NC2 13
12 GND GND 24
59 OE3# NC3 21
PI5C162861
PCI_AD5 32 48 DOCK_AD5
PCI_AD2 A25 B25 DOCK_AD2
33 A26 B26 47
PCI_AD0 34 46 DOCK_AD0
PCI_AD9 A27 B27 DOCK_AD9
35 A28 B28 45
PCI_AD11 36 44 DOCK_AD11
PCI_AD8 A29 B29 DOCK_AD8
37 A30 B30 43
PCI_AD7 38 42 DOCK_AD7
PCI_AD10 A31 B31 DOCK_AD10
39 A32 B32 41
GND1
GND2
GND3
GND4

49 OE4# NC4 31
10
20
30
40

PI5C34X2245B
C C

+3.3V_RUN

C334 0.1U/10V +3.3V_RUN


1 2

1
+3.3V_RUN C372
5

1
U22 0.1U/10V_NC
C346 0.1U/10V R321

2
PCI_GNT0# 2 4 1 2 100K
5

5
U27 U29

2
7SH04 2 32 QBUFEN# 2
3

+3.3V_RUN 4 4 QUIETE#
DOCK_OWNS_PCI 43
1 43 DOCK_PCI_EN# 1
C345 0.1U/10V
1 2 7SH08 7SH32
5

U26
PCI_IRDY# 2
4
PCI_FRAME# 1
D D
7SH08

QUANTA
Title
COMPUTER
Docking Q-SWITCH

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 42 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

+DOCK_PWR_SRC +DC_IN

J12A DOCK_AD[0..31] J12B


42 DOCK_AD[0..31]
P1 V1+ V5+ P5
P2 P6 DOCK_DET# S137 S205 DOCK_DET#
V2+ V6+ S137 S205
P3 V3+ V7+ P7 6,25 VGA_GRN S138 S138 S206 S206 DOCK_DAT_DDC2 25
P4 V4+ V8+ P8 S139 S139 S207 S207 DOCK_CLK_DDC2 25
6,25 VGA_BLU S140 S140 S208 S208
S1 S69 M_SEN# T5 PAD S141 S209
S2
S1
S2
S69
S70 S70 VGA_RED 6,25 32 D_LAD1 S142
S141
S142
S209
S210 S210
HSYNC 25
VSYNC 25
VGA
S3 S71 S143 S211
A 18 DVI_CLK-
18 DVI_CLK+ S4
S3
S4
S71
S72 S72 LPC 32 D_LAD2
32 D_LAD3 S144
S143
S144
S211
S212 S212 D_CLKRUN# 32
A

S5 S5 S73 S73 D_SERIRQ 32 S145 S145 S213 S213 D_LAD0 32


S6 S74 DOCK_AD1 S146 S214
S6 S74 DOCK_IDSEL 42 S146 S214 DOCK_SMB_ALERT# 32
DVI_T- S7 S75 DOCK_AD0 S147 S215
DVI DVI(4) DVI_T+ S8
S7
S8
S75
S76 S76
DOCK_AD3
S148
S147
S148
S215
S216 S216 DOCK_AD2
DOCK_AD5
S9 S9 S77 S77 D_DLDRQ1# 32 S149 S149 S217 S217
S10 S78 DOCK_AD4 S150 S218 DOCK_AD6
S10 S78 D_LFRAME# 32 S150 S218
DVI_T+ S11 S79 DOCK_AD7 S151
DVI_T- S11 S79 S151
+3.3V_RUN +3.3V_RUN
DVI(3) S12 S12 S80 S80
DOCK_AD9
S152 S152 S220 S220
S13 S13 S81 S81 DVI_SCLK 18 S153 S153
S82 DOCK_AD10 S154 S222 DOCK_AD12
S82 DVI_SDAT 18 S154 S222
S15 S83 DOCK_AD11 S155 S223 DOCK_AD13
54 DOCK_PSID S15 S83 DVI_DETECT 18 S155 S223
1

S84 DOCK_AD8 S156 S224


R317 R316 S84 S156 S224 DOCK_C_BE1# 42
S17 S17 S85 S85 DOCK_C_BE0# 42 42 DOCK_PAR S157 S157 S225 S225
10K_NC 22K_NC DVI_T+ S18 S86 S158 S226
S18 S86 42 DOCK_SERR# S158 S226 DOCK_PERR# 42
DVI(5) DVI_T- S19 S87 S159 S227
S19 S87 DOCK_AD14 42 DOCK_LOCK# S159 S227 DOCK_STOP# 42
S20 S88 S160 S228
2

S20 S88 DOCK_AD15 S160 S228 DOCK_TRDY# 42


S21 S21 S89 S89 42 DOCK_FRAME# S161 S161 S229 S229
DVI_T+ DVI_T- S22 S90 S162 S230 DOCK_AD17
18 DVI_TX2+
18 DVI_TX2- S23
S22
S23
S90
S91 S91
42 DOCK_C_BE2#
DOCK_AD16 S163
S162
S163
S230
S231 S231 DOCK_AD18 S-VIDEO
1

S24 S92 S164 S232 DOCK_AD21


R318 R315 S24 S92 DOCK_DEVSEL# 42 DOCK_AD22 S164 S232
S25 S25 S93 S93 DOCK_IRDY# 42 S165 S165 S233 S233
22K_NC 10K_NC S26 S94 DOCK_AD23 S166 S234
18 DVI_TX1+ S26 S94 DOCK_AD24 S166 S234 DOCK_AD25 DOCK_C_BE3# 42
18 DVI_TX1- S27 S27 S95 S95 S167 S167 S235 S235
S28 S96 DOCK_AD19 S168 S236 DOCK_AD26
2

S28 S96 DOCK_AD20 DOCK_AD29 S168 S236


S29 S29 S97 S97 S169 S169 S237 S237
18 DVI_TX0+ S30 S30 S98 S98 42 DOCK_PME# S170 S170 S238 S238 PCI_REQ0# 12
18 DVI_TX0- S31 S31 S99 S99 S171 S171 S239 S239 DOCK_PCIRST# 42
S32 S100 DOCK_AD27 TV_C S172 S240
S32 S100 DOCK_AD28 6 TV_C S172 S240 TV_CVBS
B S33 S33 S101 S101 42 DOCK_PCI_EN# S173 S173 S241 S241 TV_CVBS 6 B
DOCK_AD31 S34 S102 DOCK_AD30 S174 S242
S34 S102 S174 S242 TV_Y
S35 S103 S175 S243
17 CLK_PCI_DOCK
42 DOCK_PIRQA# S36
S35
S36
S103
S104 S104
DOCK_GNT0# 42 SPDIF 38 AUD_SPDIF_OUT
S176
S175
S176
S243
S244 S244
TV_Y 6
1

S37 S105 S177 S245


R320
22_NC
S38
S37
S38
S105
S106 S106
ICH_USBP8- 12
ICH_USBP8+ 12
USB 4141DOCK_LOM_SPD10LED_GRN#
DOCK_LOM_SPD100LED_ORG# S178
S177
S178
S245
S246 S246 DOCK_LOM_ACTLED_YEL# 41
31 DOCK_SMBCLK S39 S39 S107 S107 S179 S179 S247 S247
31 DOCK_SMBDAT S40 S40 S108 S108 DOCK_SMB_PME 31 42 DOCK_OWNS_PCI S180 S180 S248 S248 HDD_LED 36
31 CLK_DOCK S41 S109 S181
1 2

S41 S109 CLK_KBD 31 S181


31 DAT_DOCK S42 S42 S110 S110 DAT_KBD 31 S182 S182 S250 S250

C371
S43 S43 S111 S111
S112
For Broadcom +2.5V_LOM
S183
S184
S183
S252
S112 S184 S252
18P/50V_NC
SMBUS S45 S113 (5755) S185 S253
2

S45 S113 C340 0.01U/25V S185 S253


S47
S114 S114
S115
For Broadcom 1 2
S186
S187
S186 S254 S254
S255
S47 S115 S187 S255
S48 S48 S116 S116
+2.5V_LOM
(5755) LAN C341 0.01U/25V
S188 S188 S256 S256
S49 S49 S117 S117 S189 S189 S257 S257
S50 S118 C342 0.01U/25V 1 2 S190 S258
S50 S118 S190 S258
SMBUS ADDRESS : S51 S51 S119 S119 2 1 S259 S259
S52 S120
DOCK/APR Microprocessor -- 74H S53
S52 S120
S121 C343 0.01U/25V S193 TV_CVBS
DOCK USB/IDE Interface(FX2) -- 72H S54
S53
S54
S121
S122 S122 2 1 LAN 41
41
DOCK_LOM_TRD1-
DOCK_LOM_TRD1+ S194
S193
S194
TV_Y
TV_C
S55 S55 41 DOCK_LOM_TRD0- S195 S195
41 DOCK_LOM_TRD0+ S196 S196

1
DOCK SMbus - S125
S125 DOCK_LOM_TRD3- 41
Battery 16H S126 Refer to LAYOUT NOTE1. R16 R17 R15
S126 DOCK_LOM_TRD3+ 41
S127 150/F 150/F 150/F
Charger 12H S127
S128
DOCK_LOM_TRD2- 41
S128 DOCK_LOM_TRD2+ 41
IDE I/F 70H

2
C D-BAY 72H Refer to LAYOUT NOTE1. Use 2.5V_LOM for center tap on C
SIO 48H magnetics when using Broadcom; M204 M204
1.8V_LOM for Intel only FOX_QL00703-C4B4-FH

M136 M136 RJ_RING 30 30 RJ_TIP


LAYOUT NOTES:
FOX_QL00703-C4B4-FH
MODEM MODEM Follow the Intel Platform Design
Guideline routing recommendations
for the following buses: PCI, DVI ,
LPC & USB.
Q47
+PWR_SRC FDS6679 +DOCK_PWR_SRC
LAYOUT NOTES1:
8 Terminators should be as close as
1 7
2 6 possible to dock connector pins.
1

3 5 Keep traces as short as possible.


1

C338 R293
0.47U/25V 100K +5V_ALW +3.3V_ALW
2

R294 100K
2

1 2
1

+3.3V_SUS
R19
1

+DC_IN +DOCK_PWR_SRC C344 0.1U/16V 100K


1 2 R20
D 100K D
3 2
5

U23 DOCKED
DOCKED 32,41
3

DOCKED 2
2

4 2
QUANTA
2

1 DOCK_DET# 2 Q2
32 DOCK_PWR_EN
2

C18 C19 C348 C330 Q45 DTC144EUA


1

0.1U/50V/0603 1N/50V 0.1U/50V/0603 1N/50V R291 2N7002W-7-F


7SH08
COMPUTER
1

100K
1

R297 0_NC Title


1 2 Docking Station CONN.
1

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 43 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8

Non-iAMT R124 1 2 0 +3.3V_RUN +3.3V_SUS


49 1.25V_RUN_PWRGD

1
R110 1 2 0
48 1.5V_RUN_PWRGD

2
R106 1 2 0
48 1.05V_RUN_PWRGD
R104 1 2 0_NC R412
37 2.5V_RUN_PWRGD
R146 100K
2.2K_NC

2
A A
+5V_RUN +5V_ALW
ICH_PWRGD# 37

3
D12
CH751H-40HPT 2 Q62

1
R129 10K 2N7002W-7-F
2 1 1 2 2 Q19

1
MMBT3906_NL
1

3
1

3
R108 4.7K Q17 U32D
C152 R130 C155 1 2 2 MMST3904 12
13,31,51 IMVP_PWRGD
0.1U/10V 200K 2200P/50V 11 ICH_PWRGD 6,13
2

31 RESET_OUT# 13
2

1
74AHC08PW
+1.8V_RUN +1.8V_SUS

D26 1
CH751H-40HPT R361 10K Keep Away from high speed buses
2 1 1 2 2 Q59
MMBT3906_NL
1

+3.3V_SUS +3.3V_ALW +3.3V_ALW +3.3V_ALW


3
1

3
R107 4.7K Q18
C452 R362 C450 1 2 2 MMST3904

1
0.1U/10V 200K 2200P/50V C493 0.1U/10V
2

R415 1 2
2

1
20K

5
+3.3V_RUN +3.3V_ALW U33A U33B

2
B C491 0.1U/10V B
1 6 3 4 1 2
D30
1

CH751H-40HPT R404 10K

1
Q61 C501 NC7WZ14P6X_NL NC7WZ14P6X_NL

14
2 1 1 2 2
MMBT3906_NL 0.01U/25V U32A
1

1
3

2
1

R409 4.7K Q63 R411 0 3


C481 R408 C478 1 2 2 MMST3904 1 2 2
200K 2200P/50V 24,31,33,53 RUN_ON
0.1U/10V
2

74AHC08PW
2

U32B
4
5V_3V_1.8V_1.25V_RUN_PWRGD 32 6 RUNPWROK 31,32,51
5

74AHC08PW
U32C
31,53 SUS_ON 10
8 SUSPWROK 37
9

74AHC08PW
3.3V_5V_SUS_PWRGD 31

+3.3V_LAN +3.3V_ALW +3.3V_ALW


C C

+3.3V_SUS +3.3V_ALW +3.3V_ALW


D9

1
C183 CH751H-40HPT R126 10K
D14 0.1U/10V 2 1 1 2 2 Q20
1

CH751H-40HPT R173 10K 1 2 MMBT3906_NL

5
2 1 1 2 2 Q24 U35B

3
MMBT3906_NL
1

D13 U11 3 4
3

3.3V_LAN_PWRGD 31
1

CH751H-40HPT
1

C185 R174 C192 2 1 2 4 1


1

1
0.1U/10V 200K 2200P/50V C159 R137 C148 NC7WZ14P6X_NL
2

0.1U/10V 200K 2200P/50V R119 C142


2

2
3

NC7SZ14P5X_NL 200K 2200P/50V


2

2
R158
2

200K
2

+5V_SUS +5V_ALW

D10
1

CH751H-40HPT R135 10K


2 1 1 2 2 Q21
MMBT3906_NL
1

D11
3
1

CH751H-40HPT
1

D C151 R136 C158 2 1 D


0.1U/10V 200K 2200P/50V
2

1
2

R131
200K
R145
200K
QUANTA
COMPUTER
2

Title
System Reset Circuit

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 44 of 57


1 2 3 4 5 6 7 8
1 2 3 4 5

A A

8
7 1
6 2 +PWR_SRC
+SDC_IN
5 3

2
PQ31
FDS6679 PC89 PC88

4
PQ50 2200P/50V 0.1U/50V/0603

1
2N7002W-7-F
1 2 1 2
PR100 PR99

3
10K 100K
31,37,46 ACAV_IN 2
PD8
PQ21A PQ21B UBM32PT

1
FDS4935 FDS4935 2 1

7 1 CHG_SBAT 3 5
+VCHGR
8 6
FDS4935
PQ26A

4
PR74 PR77 7 1
54 +SBATT +PWR_SRC
10K 100K 8
CHG_SBAT_N 1 2 1 2

2
PC74 0.1U/50V/0603 2
2 1
3

B 3 SBAT_G B
2 PQ16
32 CHG_SBATT

1
2N7002W-7-F 1
CHG_SBATT_N
1

PR207
PD19 33K
CH715FPT

2
CHG_PBATT_N
1

PC116
2 PQ37 0.1U/50V/0603
32 CHG_PBATT
2N7002W-7-F 2 1
3

PR118 PR119
10K 100K
CHG_PBAT_N 1 2 1 2 PQ28
SI4835BDY
54 +PBATT
4

4
8 PD11
5 3 3 5 1 7 UBM32PT
+VCHGR CHG_PBAT
6 2 2 6 2 6 2 1
7 1 1 7 3 5
8 8

5 3

4
PQ35 PQ36 6

2
SI4835BDY SI4835BDY 1 2 PQ26B
FDS4935

4
2
C C
PR202 PR203 PR204 2
470K 470K 47K PR205
2 10K 3 PBAT_G

1
+PBATT
1

1
PR198 47K 8 PQ48 PD18 PR206

3
1 2 3 PU11A 2N7002W-7-F CH715FPT 33K
+
1 2

2
PR197 2
+SBATT 147K/F - LM393

1
2
1 2
4

PR201
470K
+PBATT

1
2
1

PC61 PR60 PR200 100K


1

0.1U/50V/0603_NC 42.2K/F PC183 1 2 +3.3V_ALW


0.1U/50V/0603
2

PR196
8

10K/F 2
1 2 5 PU11B
+
7 3
+3.3V_ALW 1 2 6
2

- LM393
D 1 D
PR50 PR199
4

32.4K/F/0603 100K PD15


5

PU12 CH715FPT
QUANTA
3

32 PBAT_DSCHG 2
1

4 2 +3.3V_ALW
32,54 SBAT_PRES# 1
PQ49 COMPUTER
1

NC7ST32 2N7002W-7-F Title


Battery Selector

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 45 of 57


1 2 3 4 5
1 2 3 4 5

PR101 +SDC_IN
0.01/3720
+DC_IN_SS 1 2

1 4
A A
PR105

0
PC188

2
1 2
0.22U/10V_NC

8731_CSSN
8731_CSSP
1
8731_LDO

PR107

2
365K/F
PJP18 +SDC_IN

2
PD12 POWER_JP

1
PC102 CH501H 1 2
8731_VIN

1
8731_LDO 1U/25V/0805 PR113 0/0603

28

27
2

1
1 2 8731_A04

1
PR110 PC109 PC110 PC111 PC106 PC108 PC107

GND

CSSP

CSSN

8731_BST
1

49.9K/F 22 DCIN

2200P/50V

0.1U/50V/0603

2200P/50V_NC

0.1U/50V/0603_NC

10U/25V/1206

10U/25V/1206
2 1

2
5
6
7
8

5
6
7
8
PR106 PC101 1U/10V/0603
10K/F 2 1 8731_ACIN 2 25 2 1 PQ33 PQ32
ACIN BST

1
PC105 4 SI4800BDY 4 SI4800BDY +5V_ALW
2

1
PC96 0.01U/25V PR114 0.1U/50V/0603
PR104 21 8731_LDO 33/F
LDO

2
31,37,45 ACAV_IN 2 1 13 PC104

1
2
3

1
2
3
ACOK +VCHGR
B 26 8731_VCC 1 2 PC112 PD13 B

2
0 VCC
+5V_ALW 11 3.3nF/50V 1SS355

2
VDD
1

DHI 24 8731_DHI 1U/10V/0603 PR116 PR117


2 1 PC90 Adress : 0.01/3720 1K/0603

1
PR102 0.1U/50V/0603 23 8731_LX2 2 PR112 1 8731_LX 2 1 CHG_CS 1 2 1 2
15.8K/F 10
12H LX 1/F/0603 3
31,37 THRM_SMBCLK SCL

5
6
7
8
31,37 THRM_SMBDAT 9 20 8731_DLO 2 1 PL10
2

13

4
SDA DLO 5.6uH_HMU1356-5R6_8.8A
14 19 PC103 220P/50V 4
BATSEL PGND

1
PR115 PC115 PC113 PC114
8731_IINP 8 18 PQ34 10U/25V/1206
IINP CSIP

0.1U/50V/0603

10U/25V/1206
SI4810BDY 0

1
2
3

2
CSIN 17
1 2
8731_CCV 6 15
CCV FBSA PR109 8731_CSIP
2

16 2 1 +VCHGR PC98
PR108 8731_CCI FBSB
5 CCI
4.7K 100 0.22U/10V_NC
8731_CSIN
8731_CCS 4
1

CCS
GND
DAC

8731_REF 3 29
REF PAD
1

PC94 PC93 PC95 PC97


MAX8731
7

12
0.1U/10V

0.01U/25V

0.01U/25V

0.01U/25V

PR103 PU7
2

10K/F
1

PC99
2

1U/10V/0603 PJP32
2

PC91 2 1 "SI4800BDY"---Id=6.5A,Rdson=23mOhm@Vgs=4.5V
2

C
0.1U/10V 2 1 C
(P/N:BAM48000040) / (TTRANS MOS SI4800BDY-T1-E3(30V7A,SOIC)L-F);

8731AGND Jump20X10 "SI4810BDY"---Id=7.5A,Rdson=16mOhm(25℃) ;


Rdson=22mOhm(100℃) @Vgs=4.5V
(P/N:BAM48100036) / (TRANS MOS SI4810BDY-T1-E3(30V,10A)L-F);

8731_VREF=4.096V
8731_VLDO=5.4V
ACIN switch
+5V_ALW +3.3V_ALW threshold=2.048V
+5V_ALW
8731_REF 400KHz PWM
nominal
2

PR121 PR125
1

301K/F_NC 4.32M/F_NC
PC117 PC118 PR123 PR122
PR120 0.01U/25V_NC 100P/50V_NC 100K_NC 100K_NC
1

154K/F_NC
32 ADAPT_TRIP_SET 2 1
1

ADAPT_OC 32
1

PC120 3 PU8A
0.01U/25V_NC + PQ38
1 2
2

8731_IINP 2 2N7002W-7-F_NC
- LM393_NC R287
1
2

D 1K D
4

PR124 PC122 PC121


56.2K/F_NC 0.01U/25V_NC 100P/50V_NC PC119
2

0.1U/50V/0603_NC
QUANTA
2
1 1

PR126
1

PC123
2

Title
COMPUTER
27.4K/F_NC 100P/50V_NC PC118,116,114 -- For GPRS Battery Charger
immunity place as close to
2

Size Document Number Rev


the IC as possible JM7 1A

Date: Wednesday, June 28, 2006 Sheet 46 of 57


1 2 3 4 5
1 2 3 4 5

A A

BLANK PAGE FOR PAGE


B B

NUMBER SAME AS DISCRETE

C C

D D

QUANTA
Title
COMPUTER
Size Document Number Rev
JM7 1A

Date: Monday, June 26, 2006 Sheet 47 of 57


1 2 3 4 5
5 4 3 2 1

M'08
+1.5V_RUN /+1.05V_VCCP /+3.3V_ALW /+3.3_RTC_LDO
+PWR_SRC
PJP24 +DC2_PWR_SRC
POWER_JP

1 2
D D

1
PR34 PR33

1
0/0805 0/0805
+ PC158 PC147 PC159 + PC35 + PC34 PC36 PC33

2
10U/25V/1206 0.1U/50V 2200P/50V

2
10U/25V/1206

10U/25V/1206
2

2200P/50V
0.1U/50V
1
PC162
0.1U/25V

2
+5V_VCC2
1.5V +/- 5% 1.05V +/- 5%
+3.3V_RTC_LDO
Thermal Design Current: 2.4A Thermal Design Current: 11A
Maximum Current: 3.43A Maximum Current:16.1A

2
PC163
OCP: 4.29A OCP: 20.13A

2
1U/10V/0603 PR181 PR182
PR178 0_NC 0 +1.05V_VCCP

2
+1.5V_RUN 0

5
6
7
8
PR173 REF

1
0/0603 PQ10
2

2
1.5V_DH 1 2 4 FDS6294_NL PJP5 PJP4

1
C PJP2 PJP1 PC166 PR183 POWER_JP POWER_JP C

1
POWER_JP POWER_JP PR179
8 G1 D1 1 0_NC 0.1U/25V 0_NC

1
2
3

2
8
7
6
5
4
3
2
1
1

1
PL4 7 S1/D2 D1 2 PAD PL5

LDOREFIN
LDO
VIN
RTC
ONLDO
VCC
TON
REF
7.0UH 30% 4.8A (SIL104R-7R0PF) T43 1.05V_LX MPLC1040L1R0
+1.5V_RUN_P 2 1 6 G2 3 2 1 +1.05V_VCCP_P
PR184
5 S2 4 PC161 9 32 200K/F
BYP REFIN2
2

5
6
7
8
9
0.1U/25V_NC 10 31 1 2
OUT1 ILIM2

1
PR171 PQ43 11 PU10 30 PQ11
FB1 OUT2

1
0/0603_NC SI4914DY-T1-E3 1 2 12 29 4 + PC47 PC49
ILIM1 SKIP#
1

PR172 232K/F POK1 13 MAX8778 28 POK2 FDS7088SN3 PC39 330U/2.5V + PC48


PGOOD1 PGOOD2
1

PC30 + PC153 EN1 14 27 EN2 0.1U/25V 330U/2.5V


1

2
10U/6.3V/1206 330U/2.5V PC31 1.5V_LX EN1 EN2 1.05V_DH

10U/6.3V/1206
15 26

1
2
3

2
0.1U/25V DH1 DH2 1.05V_LX
16 25
2

LX1 LX2
2

37 1.05V_DL_1
PR175 PAD
36

SECFB
PAD
2

PGND
0/0603_NC

BST1

BST2
GND
VDD
PAD
PAD
PAD

1
DL1

DL2
PC160 PC167
0.1U/25V 0.1U/25V
1

35
34
33

17
18
19
20
21
22
23
24

2
PR180 1/F

1
PR176 1/F 1 2
1 2 PR35 PC168 0.1U/25V_NC
1.5V_DL 1.05V_DL_2 2 1

2
PR177 +5V_ALW +3.3V_SUS
+5V_VCC2 10/0603 4.7
1 2

1
B B
1

1
PJP25
Layout Notes: PC164 PC165 2 1 PR174 PR185
1U/10V 1U/10V 2 1 178K/F_NC 178K/F_NC
Place C7 very near U1-pin19 and PU1-pin20.
2

2
Place C8 very near U1-pin3. Jump20X10
Place R19 very near U1-pin21. POK2
1.05V_RUN_PWRGD 44
Minimize loop including Q4, L2, C11, C12 and R19. POK1
1.5V_RUN_PWRGD 44
Minimize loop including Q2, L3, C17, C18, C19 and R19.
Route GNDA_DC2 using at least 25 mil trace width.
Minimize GNDA_DC2 trace length.
Place C15 near U1-pin7. EN1
1.5V_RUN_ON 31
Place C20 near U1-pin5.
Place R7 near U1-pin11.
Place R12 near U1-pin31.
Place R3, C10 near U1-pins 24 and 25. PR186 0
Place R2, C9 near U1-pins 16 and 17. EN2 1 2 1.05V_RUN_ON 32
Route +1.05V_BOOT, +1.05V_BOOST, +1.5V_BOOT, +1.5V_BOOST
using 25mil trace width and minimize lengths.
Connect large copper fill areas to PQ1, PQ2, PQ3 and Q4
signals for thermal improvement.
Minimize length of +1.5V_RUN_PL and +1.05V_VCCP_PL.
A Place C1, C2, C3, C22 very near Q3-pins 5, 6, 7, 8. A
Place C4, C5, C6, C23 very near Q1-pins 5, 6, 7, 8.
Route +DC2_PWR_SRC using 50 mil trace width and minimize
length.
Route OUT1 and OUT2 away from inductor and switch-node.
QUANTA
Sense Vout directly at output bulk cap.
Title
COMPUTER
1.5V,1.05V

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 48 of 57


5 4 3 2 1
5 4 3 2 1

+PWR_SRC PJP28
POWER_JP
1 2

1
PC179 PC178 PC177 PC176 PC171 PC172 PC169 PC170

1
+ + + +

2200P/50V

2200P/50V
PR195 PR192

0.1U/25V

0.1U/25V
10U/25V/1206

10U/25V/1206

10U/25V/1206

10U/25V/1206
0/0805 0/0805

2
2

1
D D
+5V_VCC3 PC41
0.1U/25V

2
PR39

1
0_NC

0 PR38 1.25V +/- 5%


1.8 Volt +/- 5%

2
1 2 Thermal Design Current: 0.92A

2
Design current 6.5A PR41 PR187
Maximum Current: 1.32A

1
30.1K/0603
Maximum current 9.2A 0 PC37
PR191 0.1U/25V OCP: 1.65A
OCP:11.5A

2 1
+3.3V_ALW
1 2
+1.8V_SUS 0_NC
PR188

8
7
6
5
4
3
2
1

2
51.1K/F +1.25V_RUN
PR36

LDOREFIN
LDO
VIN
RTC
ONLDO
VCC
TON
REF

1
100K

1
9 32 PR37 100K/F
BYP REFIN2 1.25V_RUN_ON 31
1

10 OUT1 ILIM2 31
PJP7 PJP6 11 PU4 30 1 2 PQ45A
FB1 OUT2

2
POWER_JP POWER_JP PR193 137K/F 12 29
ILIM1 SKIP#

7
1 2 13 MAX8778 28 FDS6982AS PJP27 PJP26
PGOOD1 PGOOD2 D1 D1 POWER_JP
31 DDR_ON 14 27 POWER_JP
2

EN1 EN2 1.25V_DH


15 DH1 DH2 26 2
8
7
6
5

C 16 25 G1 C

1
LX1 LX2 PL6
PQ47 37 PAD S1
FDS8880_NL 4 1.8V_DH 36 PC38 1.25V_LX 10UH 30% 4.4A (SIL104R-100PF)

SECFB

1
PAD

PGND
+1.25V_SRC_MP

BST1

BST2
GND
VDD
PAD
PAD
PAD

1
DL1

DL2

0.1U/25V

5
PL7
3
2
1

1
1.5UH_MPO104-1R5_20A/3.8mohm_+-20% 20A 1.8V_LX D1 D1 PQ45B

35
34
33

17
18
19
20
21
22
23
24

1
1.8V_SUSP 2 1 PC44 PR40 1/F 4 PC173
0.1U/25V 1 2 G1 FDS6982AS + PC175 + PC174 +
2

330U/2.5V

10U/25V/1206
S1
9
8
7
6
5

PR43 1/F 1.25V_DL_2 2 1 1.25V_DL_1 330U/2.5V_NC

2
1

+ + PQ46 1 2
PC51 PC50 PC46 FDS7066ASN3_NL 4 1.8V_DL 4.7 PR190
0.1U/25V
330U/6.3V/ESR25

330U/6.3V/ESR25

+5V_ALW +3.3V_ALW
3
2
1

PR45
PR42

2
27.4K/F/0603 +5V_VCC3
2 1 PR194 PR189
2

100K/F 100K/F_NC
10/0603
1

1
PC40 PC43 Power Sequencing, Vcore Regulator
1.25V_RUN_PWRGD 44
PR46 1U/10V/0603 1U/10V/0603
2

17.4K/F/0603 Power Sequencing


1.8V_SUS_PWRGD 31
2

PJP3
B B
2 2 1 1

0.9V +/- 5% Jump20X10


Design current 1.05 A
Peak Current 1.5 A
+5V_ALW V_DDR_MCH_REF +0.9V_P PJP33
POWER_JP +0.9V_DDR_VTT
+1.8V_SUS PU6
PJP17 10 IN VTT 3 1 2

1 2 2 VLDOIN
VTTSNS 5
POWER_JP 1 VDDQSNS
2

+3.3V_ALW
6 PC187 PC186
VTTREF 10U/4V 10U/4V
31 0.9V_DDR_VTT_ON 7
1

S3 (STBY)
1

4 PR208 PR209
PGND
31 DDR_ON 9 S5 (OFF) 20K_NC 100K_NC
1

AGND 8
PC92
2

1U/10V
2

TPS51100
1

0.9V_DDR_VTT_PWRGD 31
PC100
3

1U/10V
2

A 2 PQ52 A
MMST3904_NC
1

QUANTA
3

PR111

PQ51
2
0_NC
Title
COMPUTER
1

2N7002W-7-F_NC 1.25V,1.8V,0.9V
1

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 49 of 57


5 4 3 2 1
5 4 3 2 1

D D

BLANK PAGE FOR PAGE


C C

NUMBER SAME AS DISCRETE

B B

A A

QUANTA
Title
COMPUTER
Size Document Number Rev
JM7 1A

Date: Monday, June 26, 2006 Sheet 50 of 57


5 4 3 2 1
A B C D E F G H

PJP21 +PWR_SRC
+CPU_PWR_SRC POWER_JP
1 2

PJP20
POWER_JP
+5V_ALW 1 2

2
+CPU_PWR_SRC

5
6
7
8
9
PQ6 PC20 PC144 PC146 PC126

2
IRF7821 PR155 PC26 PC27

10U/25V/1206

10U/25V/1206

10U/25V/1206

10U/25V/1206
2

1
+5V_ALW +5V_RUN

2200P/50V
PR32 2.2/F/1206_NC

0.1U/50V/0603
4

1
PR153 PC148 0/0603

1
10/0603_NC 1U/10V/0603 1 2

2
2

1
2
3
1
PC32

1
2

1
PU3 MAX8791 0.22U/10V
1 1
PR28 PR27 5 PC145
BOOT 1

2
10/0603 10/0603_NC VCC 1.5nF/50V/0603_NC

2
1
PC138 2 8 UG1 PL1
0.01U/25V_NC PWM UGTE 0.45U_MPC1040LR45_25A_20%
1

1
FCCM 6 7 PH1 2 1 +VCC_CORE

2
+3.3V_RUN FCCM PHSE

PAD
3 4 LG1

3
GND LGTE

5
6
7
8
9

1
PC133 PC28

9
1

1
1U/10V/0603 4 1.5nF/50V/0603_NC PR164

2
PR129 PR161 PC125 0

1
2
1.91K/F/0603 PQ9 1.5K/F 0.22U/10V PC151 PC150
2

1
FDS7088SN3 1 2 1 2 PC156 + +

1
2
3

330U/2V/ESR6
330U/2V/ESR6_NC
2
2

1
PR30

0.1U/16V/0603
IMVP_PWRGD 13,31,44

2
PR20 1 2.2/F/1206_NC PR136
0/0603 PU9 PR157 0

2
PR26 7.68K/F_NC

19

20

18

39

40
13K/F_NC
1

2
(GND)
VSS

3V3
(VCC)VDD

VIN

PGOOD
(IMVPOK)
VSUM VO
2

(V3P3)
(NC)
32 IMVP6_PROCHOT# 4 VR_TT#
PR133
143K/F (VRHOT#)
2 1 3 24 FCCM
RBIAS(OSC) FCCM
2 1 2 1 5 (DRSKP#)
PR134 PR135 NTC (THRM)
0_NC 100K/NTC_NC
PWM1 27 MAX8786_PWM1 RDS(ON)=12.5m ohm +CPU_PWR_SRC +PWR_SRC
1 2 6 SOFT (CCV) +5V_ALW
PC127 470P/50V 23
ISEN1
28 VID0

2
4 VID0 (CSP1) PC18 PC17 PC15 PC135 PC87 PC29

5
6
7
8
9

2
PQ4 PR146

10U/25V/1206

10U/25V/1206

10U/25V/1206

10U/25V/1206
0.1U/50V/0603
4 VID1 29 VID1

2200P/50V
PR16 IRF7821 2.2/F/1206_NC
30 PC21 0/0603 4
4 VID2

1
VID2 1U/10V/0603
2 1 2 2

1
31 26 MAX8786_PWM2
4 VID3 VID3 PWM2

1
2
3

1
32 PU2 MAX8791 PC12
4 VID4 VID4
22 5 0.22U/10V PC137
BOOT 1

2
ISEN2 VCC 1.5nF/50V/0603_NC
4 VID5 33

2
VID5 (CSP2) UG2 PL3
2 PWM UGTE 8
34 0.45U_MPC1040LR45_25A_20%
4 VID6 VID6 FCCM 6 7 PH2 2 1
FCCM PHSE +VCC_CORE
3,6,11 H_DPRSTP# 37

PAD
DPRSTP# LG2
3 4

3
GND LGTE

5
6
7
8
9

1
PR130 2 1 499/F 36 25 MAX8786_ PWM3
6,13 DPRSLPVR DPRSLPVR PWM3

1
PC25

9
3 H_PSI# PR13 2 1 0 1 4 1.5nF/50V/0603_NC PR170

1 2
PR132 10K_NC PSI# PR169 PC128 0
ISEN3 21

1
2
PWR_MON 2 1 2 1.5K/F 0.22U/10V
PWR_MON(PGD_IN)
2

1
(CSP3) PQ7 PR29 1 2 1 2 PC154 + PC152 + PC182

1
2
3
PC124 PR131 PR17 FDS7088SN3 2.2/F/1206_NC

1
1U/10V_NC 0 CLK_ENABLE# 226K/F

0.1U/16V/0603

330U/2V/ESR6

330U/2V/ESR6
T1 PAD 38
1

2
CLK_EN# PR25 PR139
2 1

2
PR128 0_NC PR167 0 0_NC
2

1 2 35 7.68K/F_NC
31,32,44 RUNPWROK

2
VR_ON (SHDN#) PR19
31 IMVP_VR_ON RDS(ON)=4m ohm

2
11.5K/F_NC VSUM VO
2 1 12 (FBS) 7 1 2
PR21 VSEN OCSET CSN2
1

0_NC PR152 PR144 (ILIMPK)


2 100 1 PR148 4.99K/F 13 (GNDS)
4 VCCSENSE 10K/NTC RTN VSUM
VSUM 17
PC140 1000P/50V PR6
2

1 2 11 (VPS) (PWR)
0.33U/16V_NC

0.012U/50V_NC
2

VDIFF
2

PR5
2.43K/F_NC
0.033U/16V_NC

1 2 PR10 15K/F
PC136 4.53K/F_NC
1000P/50V +CPU_PWR_SRC +PWR_SRC
1

1
1

2 1 10 MAX8786 PWR_MON
PWR_MON 37
1

FB
2

4 VSSSENSE PR151 100 PR31


2

(TIME)
6.8K/NTC_NC
2

2
3 +5V_ALW 3
PC9

PC7

2 1 PR12 PC10 PC141 PC8 PC130

2
PC6

PR145 0_NC PC4 PC23 PC24

10U/25V/1206

10U/25V/1206

10U/25V/1206

10U/25V/1206
5
6
7
8
9
PR147 0.1U/16V PQ5 PR154

0.1U/50V/0603
9
1

COMP(REF)

2200P/50V
1 2 1 2 2 1 (CSN1) 15K/F_NC IRF7821 2.2/F/1206_NC
1

1
1

PR149 16 PR15 4

1
VO
2

(CSN3)

332/F_NC PC139 6.49K/F 8 (TRC) PC22 0/0603


VW
(CSN2)
DROOP

680P/50V_NC PR150 1U/10V/0603 1 2


2

2.2K/F_NC
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD

DFB

1
2
3
1

1
PU1 MAX8791
1 2 5 PC14 PC142
BOOT 1
1

PR22 VCC 0.22U/10V 1.5nF/50V/0603_NC


41
42
43
44
45
46
47
48
49
50

14

15

2
PR141 CSN2 1K/F_NC MAX8786_ PWM3 2 8 UG3 PL2
PWM UGTE
2

71.5K/F 0.45U_MPC1040LR45_25A_20%
2

1 2 1 2 CSN3 FCCM 6 7 PH3 2 1


FCCM PHSE +VCC_CORE
PC134 PR142 PR4
PAD
2

1500P/50V_NC 82.5K/F_NC PR140 PR24 30K/F 3 4 LG3

3
GND LGTE

5
6
7
8
9
1K/F 10.5K/F_NC
1

1
2 1 1 2
9

PC131 PC19 4 PC143 PR168


0.01U/25V 330P/50V_NC 1.5nF/50V/0603_NC 1.5K/F PC132 0
1

1
2
PC129 2 1 VO PR163 0.22U/10V
1

1
1000P/50V_NC PQ8 1 2 1 2 PC155 + PC180 + PC181

1
2
3
1

1
PR138 2 1 PC16 FDS7088SN3

1
1000P/50V PR156

0.1U/16V/0603

330U/2V/ESR6
0

330U/2V/ESR6_NC
2

2
1
2.2/F/1206_NC PR158
2

7.68K/F_NC PR23 PR143


2

0 0_NC

2
VSUM

2
VO

CSN3

4
If use ISL6260C:PR34 and PR38 are 0 ohm , PR37 and PR41 no stuff. 4

If use MAX8786:PR34,PR38,PR326 and PR327 no stuff , PR37 and PR41 are 0 ohm.

PHASE 3 populate QUANTA


Title
COMPUTER
CPU Power

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 51 of 57


A B C D E F G H
5 4 3 2 1

DC/DC +3V_ALW/+5V_ALW/+5V_ALW2 /+15V_ALW


Place these CAPs
close to FETs
Place these CAPs
+DC1_PWR_SRC No Install for ISL6236
PJP13 Install 10 ohm for MAX8778 close to FETs
D D
POWER_JP
+PWR_SRC 1 2

2
PC63 PC68 PC71 PC73 PC66 PC59 +5V_ALW2 PR65 +5V_VCC1 PC62 PC69

1
10/0603

10U/25V/1206_NC

1
2200P/50V

2200P/50V
+ + + + PR59 PR56

10U/25V/1206

10U/25V/1206

10U/25V/1206

0.1U/50V/0603

0.1U/50V/0603
2 1

1
0/0805 0/0805 PC64
3.3 Volt +/- 5%

2
1U/10V/0603 PR75 PR78
2

2
PC67 0_NC 0
Design Current:9A

2
4.7U/10V/1206

2
PC58 Maximum current:13A
5 Volt +/- 5%

1
2
0.1U/50V/0603
OCP :16.25A

2
PR64 PR69
Design Current: 6.4A

2
1U/10V
0_NC PC70 PR84
0 0_NC
Maximum current:8A

1
PC72

2
0.1U/10V
OCP : 10A

1
1 2 +3.3V_ALW

5
6
7
8
2 1

1
4 PQ20
PR68 FDS8880_NL PJP15

0.1U/50V/0603_NC
+5V_ALW 0 POWER_JP

8
7
6
5
4
3
2
1
PC56

1
2
3
8
7
6
5

2
PL9

LDOREFIN
LDO
VIN
RTC
EN_LDO
VCC
TON
REF

2
1

PC76
0.1U/50V/0603_NC 2.2UH +-20% 8.0A (MPO73-2R2)
PJP12 PQ15 4 +5V_DH +3.3V_LX 1 2 +3.3V_ALWP

1
POWER_JP FDS8880_NL PR83

1
C +5V_ALWP 9 32 200K/F C
PL8 BYP REFIN2
10 31 1 2
2

3
2
1
4.7uH_MPL73-4R7 OUT1 PU5 ILIM2 PC79
11 FB1 OUT2 30
+5V_ALWP 1 2 +5V_LX 1 2 12 29
ILIM1 SKIP#

5
6
7
8
9
PR54 147K/F POK1 MAX8778 POK2

0.1U/50V/0603
13 PGOOD1 PGOOD2 28
2

2
PC55 14 27 PQ19 + PC78
PR55 EN1 EN2 +3.3V_DH 330U/6.3V/ESR25
15 DH1 DH2 26 4
0_NC FDS7066ASN3_NL
0.1U/50V/0603

16 25

1
LX1 LX2
2

8
7
6
5

PC54 + PC57 37 PAD

2
330U/6.3V/ESR25 0.1U/50V/0603 36 PC75

SECFB
1

1
2
3
PAD

2
PGND
PQ14 +5V_DL 0.1U/50V/0603

BST1

BST2
4

GND
VDD
PAD
PAD
PAD
1

DL1

DL2
FDS6676AS_NL

1
2

1
PR51 PR76
3
2
1

35
34
33

17
18
19
20
21
22
23
24
0 PR57 1/0603
1/0603 1 2
1 2 1.25V_DL_2 2 1 +3.3V_DL_1
1

4.7 PR70 +3.3V_ALWP +3.3V_ALWP


PD9 PJP14

+5V_ALW2
1 PC82 2 1
2 1

1
0.1U/50V/0603
32 1 PR52 PR82
Jump20X10 100K 100K_NC

3
2

2
2
BAT54S PC81
2

PC84 PD10 0.1U/50V/0603 POK2


0.1U/50V/0603

2
1

2
B B
3 PR53
PD6 0
2 BAT54-7-F

1
PJP16 BAT54S POK1
ALW_PWRGD_3V_5V 31
POWER_JP
2 1 +15V_ALWP 1 2
+15V_ALW

1
2

PC80 PR61 PR62


200K/F 39K/F
0.1U/50V/0603
1

2
PR80
2K/F
31 ALWON 2 1
1

37 THERM_STP# 2 1
PR81
PR79 200K
0
2

A A

QUANTA
Title
COMPUTER
3VALW,5V,3V, Power On

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 52 of 57


5 4 3 2 1
1 2 3 4 5

+5V_ALW +15V_ALW +3.3V_ALW +3.3V_SUS


PQ17
+5V_ALW +15V_ALW +5V_ALW +5V_RUN SI4800BDY
PQ44 8 3

1
SI4336DY-T1-E3 7 2
8 3 PR96 PR95 6 1

1
7 2 100K 100K 5

2
PR98 PR97 6 1 PC60

2
100K 100K 5 10U/6.3V/1206 PR66

4
1
PC157 PR162 SUS_3.3V_ENABLE 20K

2
10U/16V/1206 20K

3
A A
RUN_ENABLE

1
SUS_ON_3.3V# 5

1
3

1
RUN_ON_5V# 5 PQ29A

1
PQ30A 2 2N7002DW PC65 PR63
31 3.3V_SUS_ON
6

1
2N7002DW PC86 4700P/50V/0603_NC 100K_NC

4
2 4700P/50V/0603 PQ29B
24,31,33,44 RUN_ON

2
PQ30B 2N7002DW

2
2N7002DW +1.8V_SUS +1.8V_RUN
1

PQ12
SI4800BDY-T1-E3 +5V_ALW +5V_SUS
8 3 PQ13
7 2 +5V_ALW +15V_ALW SI4800BDY
6 1 8 3

2
5 7 2

1
PC42 PR44 6 1
PD3 10U/6.3V/0603 20K PR72 PR71 5

2
CH751H-40HPT_NC 100K 100K

1
1 2 PC52 PR48

4
10U/6.3V/1206 20K

2
PR47 SUS_5V_ENABLE

2
1
0

1
3
1 2 PC45
0.047U/25V_NC SUS_ON_5V# 5

1
PQ18A

1
2 2N7002DW PC53 PR49
31,44 SUS_ON
4700P/50V/0603_NC 100K_NC
PQ18B

2
B 2N7002DW B

2
+5V_ALW +15V_ALW +3.3V_ALW +3.3V_RUN
PQ24
SI4336DY-T1-E3
8 3
1

7 2
PR86 PR87 6 1
100K 100K 5

PD7
2

4
CH751H-40HPT_NC
1 2
+3.3V_ALW
3

PR89

4
5 0
PQ22A 1 2 5
6

2
2N7002DW 6 1
4

1
2 7 2 PC77 PR88
31 3.3V_RUN_ON
PQ22B PC83 8 3 10U/6.3V/1206 20K
2N7002DW 470P/50V_NC
1

2
PQ23

1
SI4336DY-T1-E3

C C

+1.8V_SUS +5V_SUS +3.3V_SUS


Reserve discharge path Reserve discharge path

1
+5V_RUN +3.3V_RUN +1.8V_RUN +1.5V_RUN +0.9V_DDR_VTT +1.25V_RUN
R178 R184 R176
30/F_NC 1K_NC 1K_NC
1

R212 R207 R210 R209 R211 R208

3 2

3 2

3 2
1K_NC 10_NC 1K_NC 1K_NC 1K_NC 1K_NC

SUS_ON_5V# 2 2 2
3 2

3 2

3 2

3 2

3 2

3 2

Q27 Q28 Q26

1
RUN_ON_5V# 2 2 2 2 2 2 2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC

Q36 Q37 Q34 Q33 Q35 Q32


1

2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC 2N7002W-7-F_NC

D D

QUANTA
Title
COMPUTER
RUN POWER SW

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 53 of 57


1 2 3 4 5
1 2 3 4 5

+3.3V_ALW

PC184 2200P/50V
2 1 +3.3V_ALW

2
PC185 PD17 PD16 PD5
1 2 DA204U_NC DA204U_NC DA204U_NC

1
0.1U/50V/0603 PR73

3
A +SBATT 45 A
JABT1 10K
1 RP18
BATT1+ 4P2R-S-100
2

2
BATT2+
SMB_CLK 3 2 1 SBAT_DH_SMBCLK 31,33
Secondary Battery SMB_DAT 4 4 3 SBAT_DH_SMBDAT 31,33
Connector 5 PR85 1 2 100
BATT_PRES# SBAT_PRES# 32,45
SYSPRES# 6
7 PR67 1 2 100
BATT_VOLT +3.3V_ALW
BATT1- 8 +3.3V_ALW
BATT2- 9

TYCO-1566657-1

1
PR58
PD4 10K
DA204U_NC

2
3
SBAT_ALARM#

+3.3V_ALW
PC190 2200P/50V
2 1 +3.3V_ALW

2
1

2
PC189 PD21
PD23 PD22 DA204U_NC
1 2 DA204U_NC
B DA204U_NC B

1
0.1U/50V/0603

3
JABT2 +PBATT 45 PR212

3
1 10K
BATT1+ RP47 4P2R-S-100
BATT2+ 2
3 2 1 PBAT_SMBCLK 31

2
SMB_CLK
Primary Battery SMB_DAT 4 4 3 PBAT_SMBDAT 31
Connector BATT_PRES# 5 1 2 PBAT_PRES# 32
6 PR213 100
SYSPRES#
BATT_VOLT 7 1 2 +3.3V_ALW
8 PR211 100 +3.3V_ALW
BATT1-
BATT2- 9

1
SUY_200185MR009S509ZL

2
PR210
PQ2--Three transistor can be used for PD20 10K
PQ2(pin compatible):FDV301N/FDV303N DA204U_NC
has low Vgs_on w/buit-in ESD

2
protection.MMBT100 BJT works in

3
reverse conduction mode. PBAT_ALARM#

PR1--This resistor must be depopulated if


FDV301N/FDV303 are used to avoid a 1.36mA
constant current drain from +3VALW. Thus,
D12--This diode is no-stuff BIOS will not be to switch Q1 off. MMBT100
populate if PQ2 gets damageed will not have that issue.
by ESD. +5V_ALW

PSID_DISABLE# 32
1

C C

PR11
1

15K/F
+5V_ALW +3.3V_ALW
PD1
1

1
2

DA204U_NC
2

2 PR3
DOCK_PSID--To Docking PD14 PQ1 10K
1

1
connector(PSID from the dock) SSM24_NC MMST3904
PR1
3

PR7 PR127
2

100K PD2 2.2K


1 2 PSID--To Power Management Controller
1

DA204U
or EC(ex: Macallan3)
2

PQ2 10K_NC
2

2
FDV301N PR8
3

3 1 1 2 PS_ID 32
43 DOCK_PSID
JDCIN1 FL1 33
TYC-1770730-1 PL11
BLM11B102SPT
FBMA-L11-453215-900LMA60T_NC
1 2 1
PR9
2 +DC_IN
PQ3
FDS6679
Reserved for EMI.
1 1 2 FL2 +DC_IN_SS +DCIN_JACK
HCM806025F-330T101 33_NC 8 -DCIN_JACK
2 +DCIN_JACK 1 4 1 7
-DCIN_JACK 2 3 2 6

1
3 PC13 3 5
1

C325 C336
0.1U/50V/0603_NC

1 2 PC11 PR18 0.1U/50V/0603 0.1U/50V/0603


9
8
7
6
5
4

2
1

1
FL3 1U/25V/0805 240K PC1 PR2 PC2 PC3 PC5
2

4
1

FBMA-L11-453215-900LMA60T_NC PR137 0.01U/50V 4.7K/F/0805

10U/25V/1206
0.1U/50V/0603

0.1U/50V/0603
1

2
2

2
1

0_NC

D RV1 RV2 Q49_G D


PR14 47K
2

VZ0603M260APT_NC VZ0603M260APT_NC 1 3 1 2
2

PQ40
SI2301BDS_NC
QUANTA
2

PC6--This Capacitor should be


used only as last resort COMPUTER
3

for EMI suppression. Title


31 AC_OFF 2 PQ39 DCIN,BATT CONN.
Capacitance should be as 2N7002W-7-F_NC
small as possible. Size Document Number Rev
1

JM7 1A

Date: Wednesday, June 28, 2006 Sheet 54 of 57


1 2 3 4 5
1 2 3 4 5 6 7 8

PV1 PV2 PV3 PV6 PV7 PV8 PV9


PAD195X130_NC PAD195X130_NC PAD195X130_NC PAD195X130_NC PAD195X130_NC PAD195X130_NC PAD195X130_NC
CPU
H6 H7 H12 H11

2
1 HOLE-C197D102P2-4 1 HOLE-C197D102P2-4 1 HOLE-C197D102P2-4 1 HOLE-C197D102P2-4

GND

GND

GND

GND

GND

GND

GND
5 3 5 3 5 3 5 3
1

1
A A

4
PV10 PV11 PV12 PV13 PV14 PV5 PV4
PAD195X130_NC PAD195X130_NC PAD195X130_NC PAD195X130_NC PAD195X130_NC PAD195X130_NC PAD195X130_NC
GND

GND

GND

GND

GND

GND

GND
1

1
Reserved for EMI.

H1 H3 H2
H9
2

2
B 1 HOLE-TC276C197D114P2-4 1 HOLE-TC276C197D114P2-4 1 HOLE-TC276C197D114P2-4 1 HOLE-TC276C197D114P2-3 B

5 3 5 3 5 3

4 3
4

4
H10
H14 H17 H13
2

2
1 HOLE-TC276C197D114P2-4 1 HOLE-TC276C197D114P2-3 1 HOLE-TC276C197D114P2-3 1
HOLE-H-C197D102P2-4

5 3
5 3

4 3 4 3
4

4
C C

HDD
H4 H18
H8
2

1 HOLE-H-TC276C197D114P2-4 1 HOLE-H-C197D114P2-4 1
HOLE-H-C197D102P2-4

5 3 5 3 5 3
4

H16 H15
2

1 HOLE-H-C276B372X323D114P2-3 1 H-C276B310X269D114P2-4

5 3

D 4 3 D

QUANTA
4

Title
COMPUTER
SCREW PAD

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 55 of 57


1 2 3 4 5 6 7 8
5 4 3 2 1

Reserved for EMI.

Stitching caps
+PWR_SRC +1.5V_RUN +1.5V_RUN +1.8V_SUS +1.05V_VCCP
1

1
C445 C647 C283 C588 C632
D D
0.1U/25V_NC 0.1U/10V_NC 0.1U/10V_NC 0.1U/10V_NC 0.1U/10V_NC
2

2
+1.5V_RUN +1.05V_VCCP +1.8V_SUS +1.05V_VCCP +3.3V_RUN

Page 26 Page 27 Page 31 Page 38 Page 40


SATA (HDD&CD_ROM) PCCARD /CONN SIO(MEC5025) Azelia CODEC LAN(BCM5755M)

C C

Page 48 Page 49
1.5VRUN,1.05V(VTT) 1.25V,1.8V,0.9V
1.05V_LX 1.25V_LX 1.25V_LX
2

2
C76 C431 C440
1500P/50V_NC 1500P/50V_NC 1500P/50V_NC
1

1
Place C860,C216,C1426 close to PQ33. Place C867,C254,C1428 close to PQ91.
Place C862,C222,C1427 close to PQ73. Place C863,C253,C1429 close to PQ92.

Page 51 Page 52
CPU_MAX8786(3phase) D/D Power

B B

A A

QUANTA
Title
COMPUTER
EMI CAP

Size Document Number Rev


JM7 1A

Date: Wednesday, June 28, 2006 Sheet 56 of 57


5 4 3 2 1
1 2 3 4 5 6 7 8

+3.3V_M

2.2K 2.2K DIMM 0


+3.3V_M
AJ26 ICH_SMBCLK 7002 MEM_SCLK 197
A A

ICH8-M AD19 ICH_SMBDATA +3.3V_M MEM_SDATA 195 DIMM 1


7002
+3.3V_ALW +3.3V_M

2.2K 2.2K 2.2K 2.2K


+3.3V_M
100 SIO_CLK_SCLK 7002 CLK_SCLK 16
99 SIO_CLK_SDATA +3.3V_M CLK_SDATA 17 CLK GEN.
7002
+3.3V_ALW

B B

4.7K 4.7K

10 THRM_SMBCLK 12
SMBUS
9 THRM_SMBDAT +3.3V_ALW 11 GUARDIAN ADDRESS [2F]
+5V_ALW

S39
SMBUS
8.2K 8.2K S40 DOCKING ADDRESS [C4, 72, 70, 48]
100
6 DOCK_SMB_CLK 3
SMBUS
5 4 Second ADDRESS [16]
C DOCK_SMB_DAT +5V_ALW C
BATTERY
+3.3V_ALW 100
8
SIO
6 Power USB
MEC5025
4.7K 4.7K

112 SBAT_DH_SMBCLK
111 SBAT_DH_SMBDAT +3.3V_ALW
8 LCD_SMBCLK 6 Inverter
SMBUS
7 LCD_SMBDAT +3.3V_ALW 5 INV ADDRESS [56]
+3.3V_ALW

D 4.7K 10 D

SMBUS
8.2K 8.2K 9 CHARGER ADDRESS [12] QUANTA
8 PBAT_SMBCLK
+3.3V_ALW 100
3 Title
COMPUTER
SMBUS SMBUS BLOCK
7 4 Primary ADDRESS [16]
PBAT_SMBDAT +3.3V_ALW Size Document Number Rev
BATTERY JM7 1A
100 Date: Monday, June 26, 2006 Sheet 57 of 57
1 2 3 4 5 6 7 8

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