LIST OF EXPERIMENTS

1. Wheat Stone bridge

2. Kelvin double bridge
3. Determination of critical damping resistance of a D’Arsonval Galvanometer
4. Tests on a single-phase energy meter
5. Calibration of wattmeter at different power factors
6. Testing of current transformers
7. Calibration of ammeter, voltmeter and wattmeter using shunt type potentiometer
8. Design, construction and calibration of series and shunt type ohmmeters
9. Regulated power supply using fixed voltage IC regulators and LM 723
10.RC phase shift and Wien bridge oscillator
11.Measurement of low, medium & high resistance
CIRCUIT DIAGRAM:

100 K 100 K

+12 V +12 V
1k 7 Vin 1k 7
2 2
– –
6 6
Vin 1k 741 741
3 Vo 3 Vo
+ +
4 4
100 K –12 V 1K –12 V
Common mode gain Differential mode gain

TABULATION:
CHARACTERISTICS VALUE

Slew rate
CMRR

2
Experiment No: 1

WHEAT STONE BRIDGE

AIM:

APPARATUS REQUIRED:
APPARATUS TYPE RANGE QTY

THEORY:
Slew rate: Maximum rate of change of output voltage caused by a step input voltage.

CMRR: It is defined as the common mode rejection ratio i.e. the ability of the differential amplifier to reject
the common mode signal against the differential signal.

PROCEDURE:
Slew rate:
1. The connections are given as per the circuit diagram.
2. Signal of fixed amplitude is applied from the AFO.
3. The frequency of the signal is varied and the output waveform is observed.
4. The frequency at which the output just starts getting distorted from the input is noted. The output
voltage at that instant is also noted.
5. The slew rate is calculated using the formula:
Slew rate =
2πV p− p f max

CMRR:
1. The connections are given as per the circuit diagram.
2. The input sinusoidal signal is given and the output in both common mode and differential mode is
taken from the oscilloscope.
3. The common mode gain, differential gain and the CMRR is calculated from the formula
A
CMRR=20 log d
Ac where A is differential gain and A is the common mode gain.
d c

3
4
RESULT:

Thus the slew rate and CMRR was measured using an op amp.

5
CIRCUIT DIAGRAM:

TABULATION:
Y axis X axis Amplitude Time
(Volts) (Secs)

Divisions Settings Divisions Settings

6
Experiment No: 2

APPLICATIONS OF OPERATIONAL AMPLIFIER -DIFFERENTIATOR

AIM:

To study and implement the applications of an op amp for differentiator.

APPARATUS REQUIRED:
APPARATUS TYPE RANGE QTY
IC 741 1
Fixed power supply Dual ± 12 V 1
RPSU 3
Resistors Design values 4
Capacitors Design values 2
CRO 1
AFO 1
Bread board 1

THEORY:

PROCEDURE:

1. Connections are given as per the circuit diagram.

2. The input triangular wave is given and the output square waveform is observed and tabulated.
dv in
V o =−RC
3. The output relation is given by the equation dt .

7
8
RESULT:

Thus the applications of an op amp for differentiator was studied and implemented.
CIRCUIT DIAGRAM:
9
 C

+12 V
R
2 7
Vin –
6
741 Vo
3 + 4
-12 V
Rcomp=R||Xc

Integrator

TABULATION:

Y axis X axis Amplitude Time

Divisions Settings Divisions Settings (Volts) (Secs)

Experiment No: 3

10
 APPLICATIONS OF OPERATIONAL AMPLIFIER -INTEGRATOR

AIM:
To study and implement the applications of an op amp for integrator.

APPARATUS REQUIRED:
APPARATUS TYPE RANGE QTY
IC 741 1
Fixed power supply Dual ± 12 V 1
RPSU 3
Resistors Design values 4
Capacitors Design values 2
CRO 1
AFO 1
Bread board 1

THEORY:

PROCEDURE:

1. Connections are given as per the circuit diagram.

2. The input square wave is given and the output triangular waveform is observed and tabulated.
1
V o =− ∫ v ( t ) dt+C
RC in
3. The output relation is given by the equation , where C is the initial voltage
of the capacitor before the application of the input which is assumed to be ‘0’.

11
12
RESULT:

Thus the applications of an op amp for integrator was studied and implemented.

Circuit Diagram :
13
Experiment No: 4
14
 INSTRUMENTATION AMPLIFIERS

AIM:
To design and test the instrumentation amplifiers using Op-amp IC741 for the given specification

APPARATUS REQUIRED:

S.N NAME RANGE QUANTIT

O Y
1 Operational amplifier IC741 3
2 CRO 1
3 Function generator 1
5 Resistor 10kΩ 6
6 Power supply (0-30)V 2

THEORY:
The instrumentation amplifier is a differential amplifier optimized for its dc performance. An
instrumentation amplifier has a large voltage gain, a high CMRR, low input offsets, low temperature drift and
high input impedance.
Calculation of voltage gain:
Second Stage
Let us consider the second stage in fig. b.
Let us assume VA = 0;
Output due to VB is

R5 R6
VoB = 1 + ___ ______ VB
R3 R6 + R4

Now let us assume VB = 0;

Output due to VA is
R5
VoA = - __ . VA
R3

15
16
Let us apply superposition theorem and the inputs VA and VB are applied simultaneously
The output is

R5 R6 R5
Vo = VoB + VoA = 1 + ___ ______ VB - __ VA
VA
R3 R6 + R 4 R3

If R5=R6= RF and R3 = R4 = R3

Vo = RF/ R3 (VB – VA) where VB –VA =V01

If RF = R3, gain = 1.

Overall gain of the inst. amp. is

Vo Vo Vo1 RF 2R2
_____ = ___. _____ = __ . 1 + ___ .
Vidiff Vo1 Vidiff R3 R1

c R5 R5
We get the same result if the ratio of __ equals __ so that the
R4 R3

actual resistance values need not be equal.

ΔR
The common mode gain ACM =  2 __ if the resistance of the second stage
R
are equal.

DESIGN:
1. The second stage of the instrumentation amplifier can be considered to have a gain of unity. That stage can be
designed as

RF
Voltage gain = __ , RF = R3
R3

2. The first stage can be considered to give the total required gain.

2R2
V. gain = 1 + ___
R1
This stage can also be designed.
The common mode gain is ACM = 2ΔR/R where ΔR is the variation in the
resistance R if the resistances of the second stage are equal

17
18
PROCEDURE:
1. Circuit connections are made as per the circuit diagram.
2. Gain is varied by changing the resistance.
3. Input is applied to amplifier and output is verified.
4. Readings are taken and tabulated.

RESULT:
Thus the instrumentation amplifier using op-amp IC741 were designed

19
CIRCUIT DIAGRAM:
High pass filter:
Rf

R1 +12 V
2 7
–
6
C 741
Vo
3
+ 4
-12 V

AFO R
Active high pass filter

1
Rf
f l= A=1+
2 π RC R1
1
R=
Let A = 3 and Rf = 2R1, given fh = Hz, let C = 0.01 µF, so 2 π Cf l

MODEL GRAPH:
High pass filter

Experiment No: 5
20
 HIGH PASS BUTTERWORTH FILTER

AIM:
To design, construct & test an active high pass filter for the specified cut-off
frequency and gain. To study the effect of increase in order of the filter.

APPARATUS REQUIRED:
APPARATUS TYPE RANGE QTY
IC 741 1
Fixed power supply Dual ± 12V 1
AFO 1
CRO 1
Resistors 3
Capacitor 1

THEORY:
A filter is a frequency selective circuit that passes a specified band of frequencies
and blocks signals of frequencies outside the band.
A high pass filter has a stop band of 0 < f < fl and a pass band of f > fl.
Since it passes only high frequency components, it is called high pass filter.

PROCEDURE:
1. Give the circuit connections as per the circuit diagram
2. Give a sine wave input having the amplitude in order of millivolts from the
function generator
3. Keeping the i/p amplitude constant, vary the i/p signal frequency
4. Measure the o/p signal amplitude
5. Calculate the gain in decibel
6. Tabulate the readings
7. Plot the graph between frequency vs gain in decibel
8. Find the 3 dB cut off frequency

21
TABULATION:

High pass filter Vin =

Frequency O/p voltage (V) Gain=Vo/Vin Gain in db=
20 log (Vo/Vin)

22
RESULT:

Thus the active high pass filter for the specified cut-off frequency were design and
constructed.
PIN DIAGRAM:
23
 Ground 18 Vcc

Trigger 27 Discharge
555
Output 36 Threshold

Reset Control
45 Voltage

CIRCUIT DIAGRAM:
+5 V
Ra
8 4
7
Vo 3
Rb
6
555
5
2
0.1 μF
C
1

Astable multivibrator

Experiment No: 6
24
 ASTABLE MULTIVIBRATOR
USING IC 555
AIM:
(i) To design, construct, and test an astable multivibrator using IC 555 timer for a time
period of ms and duty cycle %.

APPARATUS REQUIRED:

SNo APPARATUS TYPE RANGE QUANTITY

1 IC555 1
2 Power Supply Fixed +5 V 1
3 Bread board 1
4 Resistors Design values 3
5 CRO 1
Design value 1
6 Capacitor
0.1 μF 1
THEORY:
This free running multivibrator generates square wave without any external
triggering pulse. The circuit has no stable states and switches back and forth from one
state to another, remaining in each state for a time depending upon the discharging of the
capacitive circuit. The multivibrator is one form of relaxation oscillator.

MODEL CALCULATION:

T ON =0 .69 ( R a + R b ) C
,
T OFF =0 . 69 R b C
T ON
=
T =T ON +T OFF =0 .69 ( R a +2 Rb ) C T ON +T OFF
, Duty cycle

PROCEDURE:
1. Construct the given circuit as shown in the fig.
2. For the astable multivibrator using the formula, find the resistance and the
capacitance value.
3. Check the square wave output
4. Compare the theoretical and practical frequency.

MODEL GRAPH:

25
 TON
Vo (V) TOFF

Time (ms)

MONOSTABLE MULTIVIBRATOR

Trigger pulse
Vo (V)

Vc (V)

Time (ms)

TABULATION:
Astable multivibrator

Y axis X axis Amplitude Time

Divisions Settings Divisions Settings (Volts) (Sec)

26
RESULT:

Thus the astable multivibrator using IC 555 timer were designed, constructed and tested.

CIRCUIT DIAGRAM:
27
 +Vsat

C1
-Vsat
+12 V t
2 7
– +12 V
R1
6 2 7 +Vramp
741 – Vo
3 6
+ 4
741
3
-12 V + 4 -Vramp
-12 V t

R3
R2
Triangular wave generator

MODEL CALCULATION

1 R3
f o= =
T 4 R 1 C 1 R2

Experiment No: 7

28
 TRIANGULAR WAVE GENERATOR AND ZERO CROSSING
DETECTOR

(i) TRIANGULAR WAVE GENERATOR

AIM:
(i) To design construct & test a triangular wave generator circuit whose frequency of oscillation is
fo = Hz.

(ii) Compare theoretical & practical frequency.

APPARATUS REQUIRED:
APPARATUS TYPE RANGE QTY
IC 741 2
Fixed power supply Dual ±12 V 1
CRO 1
Resistors Design values 3
Capacitor 1

THEORY:
Triangular waveform can be simply obtained by integrating a square wave. Although the amplitude
of the square wave is constant at +/- V sat, the amplitude of the triangular wave will decrease as the frequency
increases. This is because the reactance of the capacitor (C) in the feedback circuit decreases with increasing
frequency.

PROCEDURE:
1. Connections are given as per the circuit diagram;
2. Resistor& capacitor values are put according to the design.
3. Triangular wave output is checked using a CRO and verified with theoretical values of frequency.

MODEL GRAPH:

29
 +Vsat

Vo’ (V)

-Vsat

+Vramp

Vo (V)

-Vramp Time (ms)

TABULATION:
No of Div No of Div Time /Div Volt/Div Time Voltage
in X Axis in Y Axis (ms) (V)

30
RESULT:
Thus the triangular wave generator circuit were designed, constructed and verified.

31
CIRCUIT DIAGRAM:

Amp (V)
+12 V
1k
2 7
–
6
741 Vo
3 +VSat
AFO + 4
-12 V
1k
Zero crossing detector
-VSat Time (ms)

(ii) ZERO CROSSING DETECTOR

32
AIM:
To design and construct a zero crossing detector

APPARATUS REQUIRED:

SNo APPARATUS TYPE RANGE QUANTITY

1 IC 741 1
2 Power Supply Dual ±12 V 1
3 Bread board 1
1 kΩ 2
4 Resistors
Design values 3
5 AFO,CRO Each one
THEORY:

The comparators can be used as a zero crossing detector provided that v ref is set to zero. An
inverting zero crossing detector is had the output waveform for a sinusoidal input signal the circuit is also
called a sine to square wave generator.
PROCEDURE:

1. Give the connections as per the circuit diagram.

2. Give the sine wave input to the input terminal.
3. Check the output in the CRO and observe the input and output waveforms.

TABULATION:
Zero crossing detector
33
 Y axis X axis Amplitude Time
Divisions Settings Divisions Settings (Volts) (Secs)

Schmitt trigger
Y axis X axis Amplitude Time
Divisions Settings Divisions Settings (Volts) (Secs)

34
RESULT:

Thus the zero crossing detector were designed and constructed.

35
CIRCUIT DIAGRAM:
Active low pass filter
Rf

R1 +12 V
2 7
–
6
741
R Vo
3
+ 4
-12 V

AFO C
Active low pass filter

1
Rf
f h= A=1+
2 π RC R1
1
R=
Let A = 3 and Rf = 2R1, given fh = Hz, let C = 0.01 µF, so 2 π Cf h

36
Experiment No: 8

LOW PASS BUTTERWORTH FILTER

AIM:
To design, construct & test an active low pass filter for the specified cut-off frequency and gain. To
study the effect of increase in order of the filter.

APPARATUS REQUIRED:
APPARATUS TYPE RANGE QTY
IC 741 1
Fixed power supply Dual ± 12V 1
AFO 1
CRO 1
Resistors 3
Capacitor 1

THEORY:
A filter is a frequency selective circuit that passes a specified band of frequencies and blocks signals
of frequencies outside the band.
A low pass filter has a constant gain from 0 Hz to high cutoff frequency i.e. fh (gain is down by 3dB
at fh). For f > fh, the gain decreases with the increase in input frequency. The frequency between 0 - fh is
known as pass band frequency, whereas range of frequencies beyond fh is attenuated and is called stop band
frequency.
PROCEDURE:
1. Give the circuit connections as per the circuit diagram
2. Give a sine wave input having the amplitude in order of millivolts from the function generator
3. Keeping the i/p amplitude constant, vary the i/p signal frequency
4. Measure the o/p signal amplitude
5. Calculate the gain in decibel
6. Tabulate the readings
7. Plot the graph between frequency vs gain in decibel
8. Find the 3 dB cut off frequency

MODEL GRAPH:
37
 Low pass filter

TABULATION:
Low pass filter Vin =
Frequency O/p voltage (V) Gain=Vo/Vin Gain in db=
20 log (Vo/Vin)

38
RESULT:

Thus the active low pass filter for the specified cut-off frequency were design and constructed.

MODEL CALCULATION:
39
 Pulse width (ON time) TON =1.1 RC
PIN DIAGRAM:
Ground 18 Vcc

Trigger 27 Discharge
555
Output 36 Threshold

Reset Control
45 Voltage

CIRCUIT DIAGRAM:

+5 V
R
8 4
Vo 3 7

Trigger Pulse 2 6
555
5
C
0.1 μF 1

Monostable multivibrator

40
Experiment No: 9

MONOSTABLE MULTIVIBRATOR
USING IC 555
AIM:

(i) To design, construct and test a mono stable multivibrator using IC 555 for the given time period of
ms.

APPARATUS REQUIRED:

SNo APPARATUS TYPE RANGE QUANTITY

1 IC555 1
2 Power Supply Fixed +5 V 1
3 Bread board 1
4 Resistors Design values 3
5 CRO 1
Design value 1
6 Capacitor
0.1 μF 1
THEORY:
Monostable multivibrator often called a one shot multivibrator is a pulse generating circuit in which
the duration of this pulse is determined by the RC network, connected externally to the 555 timer. In a stable
or standby state, the output of the circuit is approximately zero or a logic-low level. When external trigger
pulse is applied output is forced to go high (+ VCC).

The time for which output remains high is determined by the external RC network connected to the
timer. At the end of the timing interval, the output automatically reverts back to its logic-low stable state.
The output stays low until trigger pulse is again applied. The monostable circuit has only one stable state
(output low) hence the name monostable.

PROCEDURE:
1. Construct the given circuit as shown in the figure.
2. According to the design find resistor and capacitor values.
3. Give the pulse input from AFO. The amplitude of the wave is more than one third of the supply
voltage
4. Check the output by using CRO
5. Compare the theoretical & practical values of pulse width.

MODEL GRAPH:
41
 MONOSTABLE MULTIVIBRATOR

Trigger pulse
Vo (V)

Vc (V)

Time (ms)

TABULATION:
Monostable multivibrator

Y axis X axis Amplitude Time

Divisions Settings Divisions Settings (Volts) (Sec)

42
RESULT:

Thus the monostable multivibrator using IC 555 timer were designed, constructed and verified.

43
CIRCUIT DIAGRAM:
2 kΩ

+12 V
1 kΩ 1 kΩ 1 kΩ
2 7
–
6
LSB MSB 741 Vo
2 kΩ 2 kΩ 2 kΩ 2 kΩ 3
+ 4
-12 V

d3=0 d2=0 d1=1

-VR

MODEL GRAPH:

Analog output

000 001 010 011 100 101 110 111

Experiment No: 10
44
 D/A CONVERTER

AIM:
To construct and test a D/A converter using an opamp.

APPARATUS REQUIRED:

SNo APPARATUS TYPE RANGE QUANTITY

1 IC741 1
2 Power Supply Fixed ±12 V, 5 V 1
1 kΩ 4
3 Resistors
2 kΩ 5
4 Multimeter 1
5 Wires 15
6 Bread board 1

THEORY:

+ –
VR

d1
d2 +
Binary word D d3 DAC Vo

dn –

The schematic of a DAC is shown in figure above. The input is an n-bit binary word D and is
combined with the reference voltage VR to give an analog output signal. The output of an DAC can be either
a voltage or current. For a voltage output DAC, the D/A converter is mathematically described as
Vo = K VFS (d12-1 + d22-2+ d32-3+.......+ dn2-n)
where, Vo = output voltage
VFS = full scale output voltage
K = scaling factor usually adjusted to unity
d1, d2, d3 ....., dn = n-bit binary fractional word.

PROCEDURE:
1. The connections are given as per the circuit diagram.
2. The switches are put in all possible 3-bit binary positions and the corresponding analog values are
noted down.
3. The output is verified to satisfy the given equation in the theory.

TABULATION:
45
Sl. Bit Corresponding
No positions voltage

46
RESULT:

Thus the D/A converter using an op amp were constructed and tested.

Circuit Diagram:

47
 R R

250 Ω 250 Ω
+12 V
Io
- 6
+ Vo
-12 V
R

250 Ω 250 Ω mA
0-5 Ω 0-5 Ω
R
+12 V

Model Graph: V – I Converter

I(mA)V

V (v)

Circuit Diagram:
R R

250 Ω 250 Ω
+12 V
Io
- 6
+ Vo
-12 V
R

250 Ω 250 Ω mA
0-5 Ω 0-5 Ω
R
+12 V

Experiment no: 11
48
 Design of V to I and I to V convertor
Aim:
To design a V-I and I-V convertor with given specifications.
Apparatus required:
S.no Apparatus Range Quantity
1 Regulated power supply ------ 1
2 Op-Amp IC 741 1
3 Resistance 250 Ohms 4
4 Bread board ------ 1

Theory:
V to I convertor:

It converts the change on voltage into change of current.There are two types of V/I convertors.
V to I convertor with ground level V1 be the voltage at ‘a’,
i1+i2=iL;
(Vi-V1)/R+(Vo-Vi)/R=iL;
Vi=VL+Vo;
Vi=(iL)R/2;
The gain of the Op-Amp in non-inverting mode is,
1+(R/2)=2;
The output voltage is,Vo=2Vi=Vi+Vo=(iL)(R);
Vi=iLR;
iL=Vi/R;

I to V convertor:

It is used to convert the change in current to change in voltage.For eg.The output from a phota
cell,photodiode is converted by the feedback resistor R1,
The output voltage is,Vo=(iL)(R)

Formula:

V to I, iL=Vi/R;
I to V, Vi=(iL)(R)

Procedure:

*Values of resistance are changed by the given specifications.

*Circuit connections are made as per the circuit diagram.
*Voltage/Current varied and the corresponding variation in the current/voltage of the voltage/current
convertor are noted and calculated.

I - V Converter
49
Circuit Diagram & Model Graph:
R 250 Ω

+12 V
+ -
2 - 6
A
+ Vo
-12 V

+
R 1k
R 105 Ω V (0-5 V) Ω

-
+

- 5V
Voltage

Current (mA)

50
Result:
Thus the V to I and I to V was verified by the graph.
CIRCUIT DIAGRAM:
51
 +
Vin 12 11
6 10
Vref V+ Vc
(0-50) mA
33
680 2 + –
CL A
R1

5 723 3
1K NI CS (0-25) V
+

1K RL V
4
R2
2.2 K –
INV
V- Comp
7 13

100 pF

PIN DETAILS:

NC 1 14 NC

Current limitr 2 13 Frequency compensation

Current sense 3 12 V+

Inverting I/P Vc
4 IC 72311
Non-inverting I/P Vout
5 10
VRef Vz
69
V- NC
78

Experiment No: 12

52
 VOLTAGE REGULATOR USING IC 723

AIM:
To study the characteristics of load & line regulations of the voltage regulator using IC 723.

APPARATUS REQUIRED:
APPARATUS TYPE RANGE QTY
IC 723 1
RPSU (0-15) V 1
Ammeter (0-50) mA 1
Voltmeter (0-15) V 1
Resistors 680 Ω, 2.2 kΩ, Each one
33 Ω, 1 kΩ
Potentiometer Carbon I kΩ 1
Capacitor 100 pF 1
DRB 1

THEORY:
A voltage regulator is an electronic circuit that provides a stable DC voltage independent of the load
current, temperature & ac line voltage variations. This is series type voltage regulator.
The three terminal voltage regulators has the following limitations:
 No short circuit protection
 Fixed output voltage.
These limitations have been overcome in the 723 general-purpose regulators which can be adjusted
over a wide range of both positive and negative regulated voltage. This IC is inherently low current device,
but can be boosted to provide 5 amps or more current by connecting external components. The limitation of
this IC is there is no in-built thermal protection and short circuit protection.

PROCEDURE:
1. Connections are given as per the circuit diagram,
2. Depending upon the regulated voltage requirement, design R1, R2 value The formulae is given by
R2
V o =7 . 15
(R 1 + R2 ).
3. For line regulation, keep the DRB value as constant, and then vary unregulated voltage until you will
get the regulated voltage
4. Note down VL & IL
5. For line regulation, keep Vin as constant which value should be greater than your requirement regulated
voltage
6. Vary the load, then note down VL & IL
7. Plot the graph for both line & load regulation

TABULATION:
53
Line regulation: RL =
Vin(V) VL(V) IL(milli ampere)

Load Regulation: Vin=

RL(Ω) VL(V) IL (milli ampere)

54
MODEL GRAPH:

RL constant Vin constant Vin constant

VL VL VL
(V) (V) (V)

Vin (V) IL (mA) RL ()

Line regulation Load regulation Load regulation

55
RESULT:

Thus the characteristics of load & line regulations of the voltage regulator using IC 723 was verified.

56
Experiment no.13
57
 Signal conditioning circuit with RTD
Aim:
To design signal conditioning circuit for RTD.

Apparatus required:

S.no Apparatus Range Quantity

1 Op-Amp IC 741 1
2 RPS ----- 1
3 Resistor 110 Ohms 4
4 Water heater ----- 1
5 RTD ----- 1

Theory:

RTD works on the principle that electrical resistance of must metals linearly with temperature.If a
metal has resistance R at 0 degree C,then resistance R at any temperature T is given by,

RT=Ro(1-2t)

The constant d is called the temperature co-efficient of resistance.A temperature using the above
principle is called RTD.

58
59
Result:

Thus the signal conditioning circuit for RTD was designed.

60
61
62
63