A DC-DC BUCK-BOOST CONVERTER BASED ON THE THREE-STATE
SWITCHING CELL
Paulo Henrique Feretti1, Fernando Lessa Tofoli1
1
Federal University of São João del-Rei, São João del-Rei – Minas Gerais, Brazil
e-mail: pauloferetti@gmail.com, fernandolessa@ufsj.edu.br
Abstract—This work presents a buck-boost converter
based on the three-state switching cell (3SSC), which has
been widely employed in the conception of several
converter topologies. The structure is part of family of
converters that has been previously reported in
literature, even though the detailed study of dc-dc buck-
boost-type 3SSC-based converters has not been presented
before. Compared to the classical buck-boost converter,
prominent advantages can be addressed to the proposed
approach e.g. the input current is continuous when the
duty cycle is higher than 0.5 and the current stresses
through the semiconductor elements are reduced. A
qualitative analysis is carried out in overlapping mode, so
that the operating stages are analyzed and a design
procedure can be obtained. Simulation and experimental
results are presented and properly discussed in order to
validate the theoretical assumptions.
Index Terms—dc-dc converters, buck-boost converter, three-
state switching cell.
I. INTRODUCTION
The increase of power density associated to the reduction
of size, weight, and volume, as well as the achievement of
high power levels, are some of the main motivations for the
conception of novel converter topologies. Typically, the
reduction of overall dimensions of power converters can be
obtained by increasing the switching frequency. However, it
causes switching losses to increase proportionally, thus
compromising efficiency and possibly the useful life of
semiconductors due to excessive heating [1]. The operation
at high switching frequencies becomes possible if auxiliary
circuits known as snubbers are employed [2], which can be
classified as either passive ones [3] or active ones [4].
Active snubbers can minimize the switching losses by
using auxiliary active switches, which increase cost and
complexity in both power and control circuits. On the other
hand, passive snubbers are able to reduce effectively
switching losses and EMI noise without active switches and
using only passive elements such as diodes, inductors, and
capacitors. However, the design and tuning of the LC
(inductor-capacitor) tank is not a trivial task, thus leading to
the use of complex equations [4] and achievement of soft
switching for a restrict load range [3]. Besides, high
component count is usually necessary in both types of
snubbers, as numerous examples of derived topologies exist
in literature [2, 3, 5].
High power levels associated to power electronic
converters can be achieved using distinct approaches, which
978-1-5090-6248-5/17/$31.00 ©2017 IEEE
may consist in the association of semiconductors or even
converters in series and/or in parallel. Modular multilevel
converters (MMCs) have drawn significant attention recently,
where prominent characteristics such as modularity and low
harmonic distortion make them a good alternative for
medium- and high-voltage high-power conversion systems
[1]. Interleaving is also a remarkable technique that allows
achieving high-power, high-current levels in a modular
approach. Besides, the operating frequency of magnetics
increases proportionally with the number of required phases,
as it is possible to obtain reduced current stresses through
semiconductors and also minimize overall dimensions.
However, current sharing issues are of major concern, which
are due to intrinsic differences in the elements associated to
each phase and duty cycle mismatch [6], thus requiring the
use of complex control schemes for the proper operation of
the converter [7].
Since the three-state switching cell (3SSC) was proposed
in [8], several ac-dc, dc-ac, and dc-dc converter topologies
have been presented basically by a same group of authors [9-
11]. Even though it is similar to the interleaving technique,
good current sharing is naturally obtained due to the presence
of an autotransformer with unity turns ratio without the need
of special control strategies. Besides, the current stresses
regarding the semiconductor elements and dimensions of
magnetic elements are significantly reduced.
The family of converters introduced in [12] comprises six
nonisolated dc-dc converters for high-current applications
based on the conventional buck, boost, buck-boost, Ćuk,
SEPIC (single-ended primary inductance converter) and Zeta
topologies. Basically, two operation modes exist for 3SSC-
based converters: nonoverlapping mode (NOM), when
D<0.5 and the active switches do not remain on
simultaneously in a given operating stage; and overlapping
mode (OM), when D>0.5 and the current flows through two
active switches simultaneously in a given operating stage.
Even though the converters are able to operate within the full
range of the duty cycle 0≤D≤1, it has been effectively
demonstrated that they do not present the same behavior for
each one of the aforementioned modes analogously to the
classical dc-dc ones, thus leading to distinct qualitative and
quantitative analyses [9].
As it was mentioned before, literature presents many
3SSC-based topologies, but most of them refer to nonisolated
boost-type converters associated to achieve high voltage step-
up [9]. A detailed analysis of the 3SSC dc-dc buck-boost
converter has not yet been presented, which has prominent
advantages over its classical counterpart: the input current is
continuous when D>0.5, consequently minimizing EMI
levels; reduced current stresses through the semiconductor
elements; reduction of dimensions of magnetic elements,
a
which are designed for twice the switching frequency; better
distribution of losses, with improved use of heat sinks. Within +
D1 D2
Ro Co
this context, this paper presents the detailed analysis of a -
3SSC-based buck-boost converter in OM (D>0.5), which is L
c
T1

described in terms of the operating stages and main

theoretical waveforms. Thus it is possible to obtain the T2
S1 S2
mathematical expressions for the proper design of the power Vi
+

stage elements. Simulation and experimental results are

presented and discussed in order to validate the theoretical b
assumptions. (a) First stage

II. 3SSC BUCK-BOOST CONVERTER a

+
Ro Co D1 D2
The proposed dc-dc buck-boost converter is presented in -
Fig. 1, where it can be seen that the 3SSC is composed of L
c
T1

two active switches S1 and S2; two diodes D1 and D2; and one
T2
autotransformer with unity turns ratio. The active switches S1 S2
are connected to a same reference node, as there is no need to Vi
+
-
use isolated drive circuitry. Besides, the output voltage
polarity is inverted as in the conventional buck-boost b
topology. The operating principles in OM considering the (b) Second stage
continuous conduction mode (CCM) are described as
follows, where all elements are considered ideal. a
+
Ro Co D1 D2
a -
L T1
+ c
Ro Co D1 D2
T2
-
L T1 S1 S2
c Vi
+

T2
S1 S2 b
+
Vi
(c) Third stage
b a
Fig. 1. 3SSC dc-dc buck-boost converter. +
Ro Co D1 D2

The converter operation can be defined according to four -

L T1
c
operating stages as shown in Fig. 2, while the main
theoretical waveforms are represented in Fig. 3. T2
First stage [t0, t1] (Fig. 2 (a)): Initially, switch S1 is turned on, +
S1 S2
Vi
while switch S2 maintains its previous switching state. -
Diodes D1 and D2 remain reverse biased. The inductor
b
current increases linearly, while the output filter capacitor is
responsible for supplying energy to the load. Besides, current (d) Fourth stage
sharing is properly maintained by the autotransformer with Fig. 2. Operating stages of the proposed converter in OM and
unity turns ratio. CCM.
Second stage [t1, t2] (Fig. 2 (b)): Switch S2 is turned off, but
switch S1 remains on. The voltage across inductor L is According to the volt-second balance, the converter static
inverted, as diode D2 is forward biased. The energy stored in gain in OM and CCM is:
the inductor during the previous stage is supplied to the Vo D
GV = = (1)
output filter capacitor and the load through D2. This stage Vi 1 − D
finishes when S2 is turned on.
Once again, the static gain is identical to that of the
Third stage [t2, t3] (Fig. 2 (c)): Due to existing symmetry in
conventional buck-boost converter. It is also worth to
the circuit, this stage is analogous to the first one, but switch
mention that the proposed topology provides voltage step-up
S2 is turned on instead, while S1 keeps its respective previous
when operating in OM, behaving as a boost converter.
switching state. Both diodes are reverse biased.
Fourth stage [t3, t4] (Fig. 2 (d)): This stage is similar to the
second one, but switch S1 is turned off while S2 is turned on.
Energy is provided to the load through D1.

978-1-5090-6248-5/17/$31.00 ©2017 IEEE

 T/2 T IM
Vg S1
T(2D-1)/2 T(1-D) T(2D-1)/2 T(1-D)
I D ( pk ) = (9)
2
Vg S2 t
IM t where IM is the maximum inductor current.
ΔIL Im Finally, the maximum voltage stress for the switches and
I Vo =I L
diodes is:
IM t
Im 2 VS ( max ) = VD( max ) = Vi + Vo (10)
I S1 2

IM t The voltage stresses in the semiconductor elements are

2 Im identical to those regarding the classical dc-dc buck-boost
I D1 2
converter operating in CCM according to (10).
t
III. SIMULATION RESULTS
Io
In order to validate the theoretical analysis, the 3SSC
I Co t buck-boost converter has been properly designed and
Vo+Vi
thoroughly evaluated through simulation tests carried out in
VS1 software PSIM®. For this purpose, the operating point
t
t described in Table I is employed in the design procedure.
VD1 -(Vo+Vi) The drive signals of main switches S1 and S2 and the
Vi
inductor current are shown in Fig. 4, where it can be seen that
VL the converter operates in OM and CCM. Besides, the
t operating frequency of the filter inductor is twice the
(Vi-Vo)/2
t0 t1 t2 t3 T switching frequency. The average output voltage is Vo=200 V
considering that the converter operates in OM, while the input
Fig. 3. Main theoretical waveforms of the proposed converter in
OM and CCM.
current is continuous.
TABLE I
Analyzing Fig. 2 and Fig. 3, it is possible to obtain the DESIGN SPECIFICATIONS OF THE DC-DC 3SSC BUCK-BOOST CONVERTER
following expressions for the filter inductance and the output Parameter Value
filter capacitance: Input voltage Vi=100 V
Vi ⋅ ( 2 ⋅ D − 1) Inductor current ripple ΔIL=800 mA
L= (2) Switching frequency fs=35 kHz
2 ⋅ f s ⋅ ΔI L Rated output power Po=800 W
I o ⋅ ( 2 ⋅ D − 1) Output voltage Vo=200 V
Co = (3) Output voltage ripple ΔVo=2%⋅Vo
2 ⋅ f s ⋅ ΔVo
where ΔIL is the inductor current ripple, fs is the switching
frequency, ΔVo is the output voltage ripple, and Io is the
average output current.
The average, rms, and peak current through the actives
switches are given by (4), (5), and (6), respectively.
D ⋅ Io
I S ( avg ) = (4)
2 ⋅ (1 − D )

D  ΔI L 2 ⋅ (1 − D ) + 12 ⋅ I o 2 
2
1  
I S ( rms ) = ⋅ (5)
4 ⋅ (1 − D ) 3
I m Vi ⋅ ( 2 ⋅ D − 1)
I S ( pk ) = + (6)
2 4 ⋅ L ⋅ fs
where Im is the minimum inductor current.
The average, rms, and peak currents through the diode are
given by (7), (8), and (9), respectively.
Io
I D ( avg ) = (7)
2
(1 − D )
2
1 ⋅ ΔI L 2 + 12 ⋅ I o 2
I D ( rms ) = ⋅ (8) Fig. 4. Gate-to-source voltage applied to switches S1 and S2,
4 3 ⋅ (1 − D ) inductor current, input current and output voltage for the 3SSC
buck-boost converter in OM.

978-1-5090-6248-5/17/$31.00 ©2017 IEEE

 The voltage and current waveforms regarding the active
switches and diodes are represented in Fig. 5. It can be seen
that the inductor current is equally shared between two
semiconductors during the operating stages due to the
autotransformer.
In order to establish a fair comparison, the operation point
described in Table I has also been employed in the design of a
conventional buck-boost converter, while the results are
presented in Table II. It can be stated that in either NOM or
OM the 3SSC buck-boost converter presents filter elements
with reduced size, while the current stresses through the
semiconductors are also minimized, thus leading to improved
efficiency and better utilization of heat sinks.
TABLE II
COMPARISON BETWEEN THE 3SSC AND CONVENTIONAL BUCK-BOOST
CONVERTER.
3SSC buck-boost Conventional buck-
Parameter
converter boost converter
Rated duty cycle 0.667 0.667
Filter inductance L=297.6 µH L=1.19 mH
Output filter
Co=4.76 µF Co=19.05 µF
capacitance (b) Diodes D1 and D2
Load resistance Ro=50 Ω Ro=50 Ω Fig. 5. Current and voltage waveforms in the semiconductor
Peak and rms IL(pk)=23.96 A IL(pk)=24 A elements for the 3SSC buck-boost converter in OM.
inductor current IL(rms)=14.29 A IL(rms)=14.17 A
Current and voltage IS(avg)=4.27 A IS(avg)=8.58 A IV. EXPERIMENTAL RESULTS
stresses in the active IS(rms)=8.26 A IS(rms)=11.71 A
switches VS(max)=300.89 V VS(max)=302.7 V
An experimental prototype of the 3SSC buck-boost
ID(avg)=8.31 A ID(avg)=3.76 A
Current and voltage converter operating in OM according to the specifications
ID(rms)=11.66 A ID(rms)=7.97 A
stresses in the diodes
VD(max)=300.2 V VD(max)=302.86 V given in Table I has been properly designed and
implemented, which is shown in Fig. 6. Besides, the
components specified in Table III have been used in the
experimental setup.
The drive signals for switches S1 and S2 represented in
Fig. 7 show that the 3SSC-based converter operates in OM.
It is expected that the input current is continuous in this case
according to Fig. 8, as reduced EMI levels result if compared
with the conventional buck-boost converter.
The inductor current waveform in Fig. 9 evidences the
operation in CCM, where the ripple frequency is twice the
switching frequency. Besides, the measured current ripple is
880 mA, which is close to the design specifications given in
Table I.
The converter operates under rated load condition in Fig.
10, where the average output voltage is about 200 V current
and the average output current is 4 A.
TABLE III
COMPONENTS USED IN THE EXPERIMENTAL PROTOTYPE
Parameter Specification
Filter inductor L1=245 μH, core NEE-55/28/21-IP12 by
Thornton, NL=36 turns – 20×AWG 22
Autotransformer Core NEE-65/33/26-IP12 by Thornton
NLp=NLs=6 turns – 10×AWG 22
Active switches MOSFET 16N50C3 by Infineon
(a) Switches S1 and S2 Diodes Ultrafast diodes MUR860 by ON
Semiconductor
Output filter capacitor Co=4.7 µF/350 V, electrolytic capacitor by
Hitano

978-1-5090-6248-5/17/$31.00 ©2017 IEEE

Fig. 6. Experimental prototype of the proposed converter. Fig. 9. Inductor current.

Fig. 7. Gate-to-source voltages applied to switches S1 and S2. (a)

(b)
Fig. 10. (a) Output voltage and (b) output current.
Fig. 8. Input current.

978-1-5090-6248-5/17/$31.00 ©2017 IEEE

 Within this context, the following characteristics can be
addressed to the proposed topology:
• the input current is continuous when operation occurs in
CCM and D>0.5 unlike the conventional buck-boost
converter; when operation occurs in NOM and CCM, the
input current is discontinuous;
• the output voltage polarity is inverse with respect to the
input;
• the current stresses in the semiconductors are reduced,
thus implying reduced conduction losses;
• filter elements are designed for twice the switching
frequency, while dimensions are consequently reduced;
• only part of the input power is delivered to the load
through the main switches due to the magnetic coupling
between the transformer windings, implying increased
efficiency;
• higher component count exists if compared with the
classical topology, even though it is capable of handling
higher power levels with improved efficiency.
V. CONCLUSION
This paper has presented a dc-dc buck-boost converter
based on the 3SSC operating in CCM. Considering that the
static gain is the same as that regarding a conventional buck-
boost converter, it can be used in either voltage step-down or
step-up applications. However, it is able to handle higher
power levels with improved performance and, unlike
interleaved converters, current sharing is not of major
concern due to the present of an autotransformer, which is
part of the 3SSC.
The qualitative and quantitative analysis for the converter
operating in OM and CCM has been presented in detail, as it
is possible to design and evaluate it through simulation and
experimental tests. The results have shown that the inductor
current ripple frequency is twice the switching frequency,
thus implying reduced dimensions of magnetic and filter
elements used in the power stage.
Even though higher component count results, the current
stresses regarding the semiconductor elements are reduced.
Besides, simplified drive circuitry is possible considering
that the active switches are connected to a same reference
node in common source configuration.
Besides, an important advantage of the proposed converter
operating in OM is the continuous nature of the input current,
which is inherently discontinuous in the conventional buck-
boost converter as the use of an input filter may be necessary
for some applications.
ACKNOWLEDGEMENTS
The authors acknowledge CAPES, CNPq, FAPEMIG, and
INERGE for the overall support to this work.
978-1-5090-6248-5/17/$31.00 ©2017 IEEE
REFERENCES
[1] K. M. Smith and K. M. Smedley, "Properties and
synthesis of passive lossless soft-switching PWM
converters," IEEE Transactions on Power Electronics,
vol. 14, no. 5, pp. 890-899, 1999.
[2] M. Mohammadi, E. Adib, and M. R. Yazdani, "Family
of soft-switching single-switch PWM converters with
lossless passive snubber," IEEE Transactions on
Industrial Electronics, vol. 62, no. 6, pp. 3473-3481,
2015.
[3] R. T. H. Li, H. S. H. Chung, and A. K. T. Sung,
"Passive lossless snubber for boost PFC with minimum
voltage and current stress," IEEE Transactions on
Power Electronics, vol. 25, no. 3, pp. 602-613, 2010.
[4] N. S. Ting, I. Aksoy, and Y. Sahin, "ZVT-PWM DC-
DC boost converter with active snubber cell," IET
Power Electronics, vol. 10, no. 2, pp. 251-260, 2017.
[5] R. T. H. Li and H. S. H. Chung, "A passive lossless
snubber cell with minimum stress and wide soft-
switching range," IEEE Transactions on Power
Electronics, vol. 25, no. 7, pp. 1725-1738, 2010.
[6] J. Kucka, D. Karwatzki, L. Baruschka, and A. Mertens,
"Modular multilevel converter with magnetically
coupled branch inductors," IEEE Transactions on
Power Electronics, vol. 32, no. 9, pp. 6767-6777, 2017.
[7] N. Genc and I. Iskender, "DSP-based current sharing of
average current controlled two-cell interleaved boost
power factor correction converter," IET Power
Electronics, vol. 4, no. 9, pp. 1015-1022, 2011.
[8] K. I. Hwu, W. Z. Jiang, and P. Y. Wu, "An expandable
four-phase interleaved high step-down converter with
low switch voltage stress and automatic uniform current
sharing," IEEE Transactions on Industrial Electronics,
vol. 63, no. 10, pp. 6064-6072, 2016.
[9] G. V. T. Bascope and I. Barbi, "Generation of a family
of non-isolated dc-dc PWM converters using new three-
state switching cells," in 2000 IEEE 31st Annual Power
Electronics Specialists Conference. Conference
Proceedings, 2000, pp. 858-863 vol.2.
[10] S. V. Araujo, R. P. Torrico-Bascope, and G. V. Torrico-
Bascope, "Highly efficient high step-up converter for
fuel-cell power processing based on three-state
commutation cell," IEEE Transactions on Industrial
Electronics, vol. 57, no. 6, pp. 1987-1997, 2010.
[11] G. V. Torrico-Bascope and I. Barbi, "A single phase
PFC 3 kW converter using a three-state switching cell,"
in 2004 IEEE 35th Annual Power Electronics
Specialists Conference (IEEE Cat. No.04CH37551),
2004, pp. 4037-4042 Vol.5.
[12] R. P. Torrico-Bascopé, G. V. Torrico-Bascopé, C. G. C.
Branco, D. L. Ferreira, and F. A. A. d. Souza, "Analysis
and proposal of an isolated dc/ac system using three-
state switching cell," in 2009 Brazilian Power
Electronics Conference, 2009, pp. 536-543.