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If a bias is applied between Source and Drain, a current will flow in the active channel. The current is
determined by free charge carriers and hence by VG.
b) How are the contacts made at the source, drain, gate, and body?
• For an n-channel MOSFET a p-type Si wafer is needed. The wafer is a single crystal with a
(100) surface.
• The orientation of the silicon is important for the second step where the cleaned wafer gets
an oxide layer (SiO2). This layer will work as the Gate oxide, the quality of this layer is very
important.
• On top of the oxide, the Gate (a conductor) is deposited. The Gate defines the distance
between the Source and the Drain, it is also used as a mask for etching away the silicon oxide
to implement the Source and Drain contacts.
• For making n+ regions at Source and Drain donors are implemented. (f.e. P) After the
implementation, an annealing step is done to heal damages done by the implantation and to
make the n+ regions diffuse partially underneath the Gate (self-aligned process).
1
d) Draw the charge density in the channel when the saturation voltage is applied.
In the saturation regime the MOSFET acts as a current source (ID) controlled by the applied voltage
(VGS).
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In very small devices, the transistor characteristics are destroyed due to the decreased channel
length. The Source to Drain depletion area can become a significant part of the channel length and
the Gate voltage does not control the charge in those regions anymore. Also, there is a Threshold-
voltage shift, a lack of pinch-off, an increased leakage current and an increased output conductance.
One solution is to use a thinner semiconductor, so the electric field lines in a very small device will
look more like the ones in a bigger device.
Switch for signal processing, in memories or microprocessors. They are fast and have low power
dissipation.