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Page 1

Welcome to ELEC2104

ELEC2104: Electronic
Devices and Circuits
Week 1
Presented by
Dr Omid Kavehei
Faculty of EIT

Die photograph of the 8008 microprocessor by Intel


Page 2

What is this course all about?

– Starts with basic semiconductor physics and ends with circuits


design and analysis.
– What we learn?
– How diodes and transistors behave as fundamental integrated circuit
elements, and
– How to design and analysis integrated circuits

Before we jump into the course material there are a few things we should
talk about!
Page 3

Safety First
We are running a relatively large class this semester. It
is our collective responsibility to follow rules, adhere to
policies, think before act, and make a safe environment
for our students and staff to teach, study, and learn.
Page 4

Laboratory Rules
Page 5

Laboratory Safety

1. Laboratory Rules

❑ Adequate footwear with fully closed uppers (shoes, not barefoot,


thongs or sandals) be worn at all times in the laboratory.

❑ Headwear in cases of long hair. Also loose clothing or jewelry is not


permitted.

❑ Students are not allowed to: eat, drink or disturb other groups in this
laboratory.
Page 6

Laboratory Safety

2. Risk assessment and safe working procedure for lab440

➢ Documentations are posted on Canvas panel. Please


familiarize yourself with the contents and ensure them followed
all the time when working inside the lab 440.
Page 7

Laboratory Safety

Emergency Emergency
Button Door Exit

3. Emergency Button, Exit and Assembly area


❑ Emergency button – push when someone electrocution occurs
❑ Exit – following green lights.
❑ Assembly area – in front of the old school and PNR building.
Page 8

Laboratory Safety
Emergency
Door Exit

3.1 First aid kit and main emergency door

❑ Emergency exit – following the green lights .

❑ First aid kits located in lab440.


Page 9

Laboratory Safety

4. Electrocution
➢Paralysis, ventricular fibrillation, loss of pulse and
respiration, irreversible damage to brain within
three minutes due to cessation of blood flow, a
FATAL SITUATION.
➢ If someone is electrocuted, do not touch him/her
unless you have disconnected the supply. Trip red
emergency button
Page 10

Laboratory Equipment’s
Function generator Digital Oscilloscope

Power
supplies Digital
Soldering
Multimeter
stations

Desktop
National Instrument
PC
Evaluation breadboard

5. Bench-top equipment’s
❑ Digital Multimeter, power supplies, function generator, soldering station
and desktop PC

➢ Make sure all equipment's on the bench are switched off after
finish the experimental tasks.
Page 11

Laboratory Equipment’s
Electronics Inkjet
component Printer
boxes

Cables
Hanger

5.1 Bench-top equipment’s

❑ Cables and testing leads – required to be returned tidily and


hang it back to the hanger after the lab sessions.
❑ The printer is located at the corner side of the laboratory 440.
Page 12

Academic Plans and


Special Considerations

You do not need to reveal anything about your disability or condition or situation to the
lecturer or tutors.
So do not email any of the teaching team members for approval. There is a mechanism in
place to review your case and once approved you may just share the approval with your
lecturer.
Page 13

Do you have a disability?


You may not think of yourself as having a ‘disability’
but the definition under the Disability
Discrimination Act (1992) is broad and includes
temporary or chronic medical conditions, physical
or sensory disabilities, psychological conditions
and learning disabilities.

The types of disabilities we see include:


Anxiety // Arthritis // Asthma // Autism // ADHD
Bipolar disorder // Broken bones // Cancer
Cerebral palsy // Chronic fatigue syndrome
Crohn’s disease // Cystic fibrosis // Depression
Diabetes // Dyslexia // Epilepsy // Hearing
impairment // Learning disability // Mobility
impairment // Multiple sclerosis // Post-traumatic
stress // Schizophrenia // Vision impairment
and much more.

Students needing assistance must register with


Disability Services. It is advisable to do this as
early as possible. Please contact us or review our
website to find out more.

Disability Services Office


sydney.edu.au/disability
02-8627-8422
Page 14

Academic Integrity and


Professional Conduct
Page 15

Academic Integrity and Professional Conduct


– Academic dishonesty
– School and Faculty policies will be strictly followed
– Collaboration (not cheating!) is encouraged
• Sharing questions in any shape or form online in a form of cheating.
• Asking or providing help during individual assessment or outside the
boundary of your group for group assessment is a form of cheating.

– Notes:
– Arrive in any of the classes on time!
– Silence all electronic communication devices.
– Avoid distracting conversations
• Otherwise, Lecturer or Tutors are left with no option but to ask you
to leave the room.
Page 16

Course Information
Page 17

Class Materials

– Textbook:
Fundamentals of Microelectronics, 2nd Edition
by Behzad Razavi

– Lecture Notes are available on Canvas


– Lectures will be recorded
– Lecture recording does NOT intended to replace attendance
Page 18

Schedule, Calendar, Syllabus, Textbook, Assessment,


Assumed Knowledge and more
– Check
– CUSP Profile
• https://cusp.sydney.edu.au/students/view-unit-page/uos_id/85437
– Timetabling
• https://web.timetable.usyd.edu.au/ttLabel.jsp?labelString=ELEC210
4&sessionId=2&academicYear=2018&campusId=1
– A nice time-line on Canvas
• https://canvas.sydney.edu.au/courses/9632/pages/staff-and-
contact-details?module_item_id=236734
Page 19
Page 20

Assessment, details (check CUSP)

Name Group Weight Due Week


– 40% Final Exam
W1
– No mid-Sem Exam

W2

W3
No Lab report
Assignment I Yes 8 W4 – No Log-book (but highly recomm.)
In-lab Test I Yes 6 W5 – No every week online quizzes
W6

W7 – No mark above 100


In-lab Test II No 10 W8
– To be eligible to pass
– Must achieve > 40 pts in FE
break
• Otherwise 45 is your mark
Assignment II Yes 8 W9
– It is your responsibility to make sure we have
W10 your Assignments for assessment.
In-tutorial Test No 10 W11 – You must attend your enrolled Lab and Tutorial
In-lab Test III No 10 W12 sessions.
Assignment III No 8 W13
– Groupings will be announced by the Lecturer
and is subject to change at any time. Groups
Final Exam (FE) No 40 Exam Period have two members, with one potential exception
100 of a single 3-member group.
Page 21

Assessment, load and coverage


Page 22

Fundamentals of Microelectronics (The Textbook)

CH1 Why Microelectronics? CH1 Why Microelectronics?


CH2 Basic Physics of Semiconductors CH2 Basic Physics of Semiconductors
CH3 Diode Circuits CH8 Operational Amplifier
CH4 Physics of Bipolar Transistors CH3 Diode Circuits
CH5 Bipolar Amplifiers CH4 Physics of Bipolar Transistors
CH6 Physics of MOS Transistors CH5 Bipolar Amplifiers
CH7 CMOS Amplifiers CH6 Physics of MOS Transistors
CH8 Operational Amplifier CH7 CMOS Amplifiers
CH9 Cascode and Current Mirrors CH17 CMOS Amplifier Considerations
CH10 Differential Amplifiers CH9 Cascode and Current Mirrors
CH11 Frequency Response CH10 Differential Amplifiers
CH17 CMOS Amplifier Considerations CH11 Frequency Response
Appendix A Introduction to SPICE Appendix A Introduction to SPICE
Page 23

ELEC2104 / ELEC9704

CH2 Basics of
CH1 Concepts CH8 Op-amps CH3 Diodes
Semiconductors

CH7 CMOS CH5 BJT


CH6 MOSFET CH4 BJT
Amplifiers Amplifiers

CH17 CMOS CH9 Cascode CH10 Diff. CH11 Freq.


Amps Cons & Current Mirr Amplifiers Response

To be covered in this course (will be part of the final exam)


Coverage of full chapters NOT ONLY limited to exact lecture coverage

App. A Intro. to Limited to example and topic discussed in the lecture


(may be part of the final exam in the above said capacity)
SPICE
For self-study if interested to know in more depth about SPICE
Page 24

Expectation

– Students are least expected to


– attend all lectures
• Self-study materials and at least one textbook example for each
topic according to the chart and information in the previous slide.
– attend all tutorial classes
• Solve shared problem sets for each tutorial before the session.
– attend all laboratory classes
• Self-study lab material before each lab session.
– maintain awareness of any information made available
• either via
– Canvas, e.g. regularly checking Announcements
– your official university email
– complete all assessments according TBA and announced rules for each
assessment
– cooperate with your tutors, your lecturer and the course coordinator
Page 25

WARNING: Danger Zone

– Students must make sure they have sufficient background


knowledge as listed in CUSP for ELEC1103
– https://cusp.sydney.edu.au/students/view-unit-page/alpha/ELEC1103

absolute minimum required


Background knowledge
Page 26

What we know ...

– Enrolled currently: 328 students


– ~60%, 194 students, studied ELEC1103/9703
– 22 of 194 students failed ELEC1103
– ~40%, 134 students without a known background

22

134

194
172
Page 27

Week 1

– No lab this week, Labs start next week


– No tutorial this week, Tutorials start next week
Page 28

A note on tutorials

Check
https://canvas.sydney.edu.au/courses/9632/pages/tutorial-notes
Page 29

A sample note on a sample assignment PDF

Check
https://www.dropbox.com/s/3g0qruyrnbut328/Assignment-
I%20Sample.pdf?dl=0
Page 30

Important to note

– We have two 1-hour Lectures on Mondays and Wednesdays


– For some students having tutorials on Mon and Tue

perfect synchronization of Lectures and Tutorials may not


be possible

despite the course being well sync


Page 31

Introduction
Page 32

Where to find basics? and Where to get inspired?

– Doubt your knowledge on fundamentals


– Great guides are available here http://www.ece.utah.edu/eceCTools
by Dr Neil E. Cotter
– Search topics you are looking for in Google and next to the search
keyword put site:edu or site:edu.au or site:ac.uk
– Check
– http://www.computerhistory.org
– https://spectrum.ieee.org/static/chip-hall-of-fame
– http://www.righto.com/2016

To learn and get excited about this amazing field


Page 33

Where to get inspired?

– Let’s listen to the Father of the Field


– On Caltech channel on Youtube
• Insight 1: Logic in Physical Form
• Insight 2: The MOS Transistor
• Insight 3: Evolution of Computers (Moore is the co-founder of Intel)
• Insight 4: Physics of Moore's Law
– How Carver Mead started the integrated electronic circuit revolution?
• Watch this: “MY FIRST CHIP” by Carver Mead

Don’t understand some of the terms?


We will come back to these videos or please simply ask.
Page 34

ENIAC: The first programmable electronic computer


Vacuum tube?
A light Bulb

Transistors
Page 35

The ‘Integrated’ Circuit (IC)

– An IC consists of interconnected electronic components in a


single piece (“chip”) of semiconductor material.
• In 1958, Jack S. Kilby (T exas • In 1959, Robert Noyce
Ins trum ents ) showed that it (F airc h ild S em ic onduc tor)
was possible to fabricate a demonstrated an IC made in
simple IC in germanium. silicon using SiO2 as the
insulator and Al for the metallic
interconnects.

The first planar IC


(actual size: 0.06 in. diameter)
Slide from EE105 UC Berkeley
Page 36

Solid State Physics + right Chemistry


made Microelectronics possible
Year Microprocessor Size (m) # of Transistors Clock speed
1974 8080 6 6,000 2 MHz
1979 8088 3 29,000 5 MHz
~ ~ ~ ~ ~ ~ ~ ~ ~
1993 Pentium 0.8 3,100,000 60MHz
~ ~ ~ ~ ~ ~ ~ ~ ~
2003 Pentium IV 0.09 30,000,000 2.0 GHz
~ ~ ~ ~ ~ ~ ~ ~ ~
2018 > multi-core 0.007 10s of billions above 4 GHz

Side cross-section of a transistor Top-angled view of a chip


Page 37

Layout of integrated circuits, Interconnects

– 3D Layout Demo: GDS3D


– https://www.dropbox.com/s/r9gkelr8he2a0e3/GDS3D.zip?dl=1
• Use CTRL + Scroll for layer by layer presentation
Page 38

The Law of Moore, we need More than Moore!

The number of devices on a chip doubles


every ~18 months, for the same price.

Intel Pentium®4 Processor

300mm Si wafer
Page 39

Start with an example

– What is circuit schematic? What is layout?


– Visit
• http://www.righto.com/2018/06/silicon-die-analysis-op-amp-
with.html
– Go under “Interactive chip viewer”
– This is a Texas Instrument’s TL084 Operational Amplifier
» http://www.ti.com/product/TL084
– Another example from 6502 Intel 8-bit Microprocessor
Page 40

Start with an example

– How all these work?


– ARM1, grandpa of iPhone chipsets

– Intel’s 3101 RAM chip with only 64 bits!

Diodes Resistors static RAM cell

Interested to know more about device fabrication? check


https://people.eecs.berkeley.edu/~hu/Chenming-Hu_ch3.pdf
Page 41

Moore again and scaling


Page 42

Circuit Simulation using SPICE

• Simulation
3
* Example netlist
Q1 1 2 0 npnmod
1
2
R1 1 3 1k
Vdd 3 0 3v
SPICE
.tran 1u 100u

0
stimulus netlist response

– SPICE = Simulation Program with IC Emphasis


– Invented at Berkeley (released in 1972)
– .DC: Find the DC operating point of a circuit
– .TRAN: Solve the transient response of a circuit (solve a system of
generally non-linear ordinary differential equations via adaptive time-
step solver)
– .AC: Find steady-state response of circuit to a sinusoidal excitation
Slide from EE105 UC Berkeley
Page 43

What is a clean-room? Well, it’s clean! Very clean!


Page 44

Chapter 1
Why Microelectronics?
Page 45

Cellular Technology

– An important example of microelectronics.


– Microelectronics exist in black boxes that process the received
and transmitted voice signals.

CH1 Why Microelectronics? 45


Page 46

Frequency Up-conversion

– Voice is “up-converted” by multiplying two sinusoids.


– When multiplying two sinusoids in time domain, their spectra
are convolved in frequency domain.

CH1 Why Microelectronics? 46


Page 47

Transmitter

– Two frequencies are multiplied and radiated by an antenna in


(a).
– A power amplifier is added in (b) to boost the signal.

CH1 Why Microelectronics? 47


Page 48

Modulation

www.taitradioacademy.com
Page 49

Receiver

– High frequency is translated to DC by multiplying by fC.


– A low-noise amplifier is needed for signal boosting without
excessive noise.

CH1 Why Microelectronics? 49


Page 50

Filtering is Core to any-Signal Processing

Source of image: www.ibiblio.org/kuphaldt


Page 51

Transmitter chip looks like?

Screaming Channels: When Electromagnetic Side Channels Meet Radio Transceivers, 2018
Page 52

How cool electronics can get?

Screaming Channels: When Electromagnetic Side Channels Meet Radio Transceivers, 2018
Page 53

Nervous System is an Electrical System!


Electrocorticography Electroencephalography
Electromyograph (EMG):
Physiological(ECoG): (EEG):
signals
Pacemaker Ventricular
Atrial repolarization
depolarization
AP

Motor unit action


Ventricular
potential (also
depolarization
involves ion
channels)

ELE404 Princeton
Page 54

Digital or Analog?

– X1(t) is operating at 100Mb/s and X2(t) is operating at


1Gb/s.
– A digital signal operating at very high frequency is very
“analog”.

CH1 Why Microelectronics? 54


Page 55

Chapter 2
Basic Physics of
Semiconductors
Page 56

What is a Semiconductor?

– Low resistivity => “conductor”


– High resistivity => “insulator”
– Intermediate resistivity => “semiconductor”
– conductivity lies between that of conductors and insulators
– generally crystalline in structure for IC devices
• In recent years, however, non-crystalline semiconductors have
become commercially very important

polycrystalline amorphous crystalline


Some slides are from EE105 UC Berkeley.
All derived form the publisher slides.
Page 57

Energy Barrier, Dimensions and Limitations

– Quantum Tunneling and Wave Simulator


– https://www.dropbox.com/s/4rxley9fly4cdwm/Quantum%20Tunneling
%20and%20Wave%20Simulator.zip?dl=1
– Please tick the transmission probability
– This is Java applet
Page 58

Semiconductor Physics

– Semiconductor devices serve as heart of microelectronics.


– PN junction is the most fundamental semiconductor device.
Page 59

Charge Carriers in Semiconductor

– To understand PN junction’s IV characteristics, it is important to


understand charge carriers’ behavior in solids, how to modify
carrier densities, and different mechanisms of charge flow.
Page 60

Semiconductor Materials

https://www.ptable.com

Source image: leachlegacy.ece.gatech.edu/ece3040


Page 61

Silicon

– Atomic density: 5 x 1022 atoms/cm3


– Si has four valence electrons. Therefore, it can form
covalent bonds with four of its nearest neighbors.
– When temperature goes up, electrons can become
free to move about the Si lattice.

This slide source: The textbook publisher and EE105 UC Berkeley


Page 62

Electronic Properties of Si

• Silicon is a semiconductor material.


– Pure Si has a relatively high electrical resistivity at room
temperature.

• There are 2 types of mobile charge-carriers in Si:


– Conduc tion elec trons are negatively charged;
– Holes are positively charged.
• The concentration (#/cm3) of conduction electrons & holes in a
semiconductor can be modulated in several ways:
1. by adding special impurity atoms ( dopants )
2. by applying an electric field
3. by changing the temperature
4. by irradiation

This slide source: The textbook publisher and EE105 UC Berkeley


Page 63

Electron-Hole Pair Generation

– When a conduction electron is thermally generated, a


“hole” is also generated.
– A hole is associated with a positive charge, and is
free to move about the Si lattice as well.

This slide source: The textbook publisher and EE105 UC Berkeley


Page 64

Carrier Concentrations in Intrinsic Si

– The “band-gap energy” Eg is the amount of energy


needed to remove an electron from a covalent bond.
– The concentration of conduction electrons in intrinsic
silicon, ni, depends exponentially on Eg and the
absolute temperature (T):
− Eg
ni = 5.2 10 T
15 3/ 2
exp electrons / cm3
2kT

ni  11010 electrons / cm3 at 300K


ni  11015 electrons / cm3 at 600K

This slide source: The textbook publisher and EE105 UC Berkeley


Page 65

High temperatures (Si vs W)?

Image source: saylordotorg.github.io


Page 66

Why Si is a poor conductor at room temp.?

– Number of Si atoms / cm3: ~1025


– Number of free electrons at room temperature / cm3:
~1010

Image source: Colorado Uni


Page 67

Doping; What? How?

Thermal annealing at 900 deg temp


Image source: Phys.org
https://www.ptable.com
Page 68

WhyisSia and
Ge semiconductor,
not Carbon so
(C)?
why Si and not Ge?

Check www.ptable.com
and change temperature to find the reason

kJ/mol is a form of energy, convert it to eV


www.colby.edu/chemistry/PChem/Hartree.htm
e.g. For diamond

Image source: saylordotorg.github.io


Page 69

Doping; Why?

Image source: saylordotorg.github.io


Page 70

Doping (N type)

– Si can be “doped” with other elements to change its


electrical properties.
– For example, if Si is doped with phosphorus (P), each
P atom can contribute a conduction electron, so that
the Si lattice has more electrons than holes, i.e. it
becomes “N type”:
Notation:
n = conduction electron
concentration

This slide source: The textbook publisher and EE105 UC Berkeley


Page 71

Doping (P type)

– If Si is doped with Boron (B), each B atom can


contribute a hole, so that the Si lattice has more holes
than electrons, i.e. it becomes “P type”:
Notation:
p = hole concentration

This slide source: The textbook publisher and EE105 UC Berkeley


Page 72

Summary of Charge Carriers

This slide source: The textbook publisher and EE105 UC Berkeley


Page 73

Electron and Hole Concentrations

– Under thermal equilibrium conditions, the product of


the conduction-electron density and the hole density
is ALWAYS equal to the square of ni:
np = ni
2

– Why?
Because, for example, the more electron added to the
doped Si the less the number of holes become!

N-type material P-type material


n  ND p  NA
2 2
ni ni
p n
ND NA
This slide source: The textbook publisher and EE105 UC Berkeley
Page 74

Terminology

donor: impurity atom that increases n


acceptor: impurity atom that increases p

N-type material: contains more electrons than holes


P-type material: contains more holes than electrons

majority carrier: the most abundant carrier


minority carrier: the least abundant carrier

intrinsic semiconductor: n = p = ni
extrinsic semiconductor: doped semiconductor

This slide source: The textbook publisher and EE105 UC Berkeley


Page 75

Summary

– The band gap energy is the energy required to free an


electron from a covalent bond.
– Eg for Si at 300K = 1.12eV
– In a pure Si crystal, conduction electrons and holes are
formed in pairs.
– Holes can be considered as positively charged mobile particles
which exist inside a semiconductor.
– Both holes and electrons can conduct current.
– Substitutional dopants in Si:
– Group-V elements (donors ) contribute conduction electrons
– Group-III elements (ac c eptors ) contribute holes
– Very low ionization energies (<50 meV)

This slide source: The textbook publisher and EE105 UC Berkeley


Page 76

Dopant Compensation

– An N-type semiconductor can be converted into P-type


material by counter-doping it with acceptors such that NA > ND.
– A c om pens ated s em ic onduc tor m aterial has both acceptors
and donors.

N-type material P-type material


(ND > NA) (NA > ND)
n  ND − N A p  N A − ND
2 2
ni ni
p n
ND − N A N A − ND

This slide source: The textbook publisher and EE105 UC Berkeley


Page 77

Types of Charge in a Semiconductor

– Negative charges:
– Conduction electrons (density = n)
– Ionized donor atoms (density = ND)
– Positive charges:
– Holes (density = p)
– Ionized acceptor atoms (density = NA)

– The net charge density (C/cm3) in a semiconductor is

 = q( p − n + N D − N A )

This slide source: The textbook publisher and EE105 UC Berkeley


Page 78

Carrier Drift

– The process in which charged particles move because of an


electric field is called drift.
– Charged particles within a semiconductor move with an
average velocity proportional to the electric field.
– The proportionality constant is the carrier m obility.

F=qE , E=V/L (V is voltage) → →


Hole velocity vh =  p E
→ →
Electron velocity ve = −  n E
Notation:
m p  hole mobility (cm2/V·s)
m n  electron mobility (cm2/V·s)

This slide source: The textbook publisher and EE105 UC Berkeley


Page 79

Mobility
Page 80

Current Flow: General Case

– Electric current is calculated as the amount of charge in v


meters that passes thru a cross-section if the charge travel with
a velocity of v m/s.

I = −v  W  h  n  q

This slide source: The textbook publisher and EE105 UC Berkeley


Page 81

Velocity Saturation

– In reality, carrier velocities saturate at an upper limit, called the


s aturation veloc ity (vsat).
0
=
1 + bE
0
vsat =
b
0
v = E
0 E
1+
vsat

This slide source: The textbook publisher and EE105 UC Berkeley


Page 82

Drift Current
– Drift current is proportional to the carrier velocity and carrier
concentration:

vh t A = volume from which all holes cross plane in time t


p vh t A = # of holes crossing plane in time t
q p vh t A = charge crossing plane in time t
q p vh A = charge crossing plane per unit time = hole current
➔ Hole current per unit area (i.e. current density) Jp,drift = q p vh
This slide source: The textbook publisher and EE105 UC Berkeley
Page 83

Conductivity and Resistivity

– In a semiconductor, both electrons and holes conduct current:

J p ,drift = qp p E J n ,drift = −qn(−  n E )


J tot ,drift = J p ,drift + J n ,drift = qp p E + qn n E
J tot ,drift = q ( p p + n n ) E  E
– The c onduc tivity of a semiconductor is
– Unit: mho/cm   qp p + qnn
– The res is tivity of a semiconductor is 1
– Unit: ohm.cm 

– For Si is somewhere between 103 Ohm.cm and 10-3 Ohm.cm
This slide source: The textbook publisher and EE105 UC Berkeley
Page 84

Resistivity Example

– Estimate the resistivity of a Si sample doped with phosphorus to


a concentration of ND=1015 cm-3 and boron to a concentration
of NA=1017 cm-3. The electron mobility and hole mobility are
µn=700 cm2/Vs and µp=300 cm2/Vs, respectively.

NA>ND → p-type
p  N A − ND
2
n
ni p = NA-ND ~1017 cm-3
N A − ND n~103 cm-3
 = [µppq+µnnq]-1

difference between n and


p are huge therefore it is
safe to ignore n.
This slide source: The textbook publisher and EE105 UC Berkeley
Page 85

Electrical Resistance
V
I _
+
W
t
homogeneously doped sample

V L
Resistance R = (Unit: ohms)
I Wt
1
where r is the resistivity     qp p + qnn

This slide source: The textbook publisher and EE105 UC Berkeley
Page 86

Carrier Diffusion

– Due to thermally induced random motion, mobile particles tend


to move from a region of high concentration to a region of low
concentration.
– Analogy: ink droplet in water
– Current flow due to mobile charge diffusion is proportional to
the carrier concentration gradient.
– The proportionality constant is the diffus ion c ons tant.

dp
J p = −qD p
dx
Notation:
Dp  hole diffusion constant (cm2/s)
Dn  electron diffusion constant (cm2/s)

This slide source: The textbook publisher and EE105 UC Berkeley


Page 87

Diffusion Examples

• Linear concentration – Non-linear concentration profile


profile → varying diffusion current
→ constant diffusion −x
p = N exp
current  x Ld
p = N 1 − 
 L

dp dp
J p ,diff = −qD p J p ,diff = −qD p
dx dx
N qD p N −x
= qD p = exp
L Ld Ld
This slide source: The textbook publisher and EE105 UC Berkeley
Page 88

Diffusion Current

– Diffusion current within a semiconductor consists of hole and


electron components:

dp dn
J p ,diff = −qD p J n ,diff = qDn
dx dx
dn dp
J tot ,diff = q ( Dn − Dp )
dx dx
– The total current flowing in a semiconductor is the sum of drift
current and diffusion current:
J tot = J p ,drift + J n,drift + J p ,diff + J n,diff
Page 89

The Einstein Relation

– The characteristic constants for drift and diffusion are related:

D kT
=
 q

kT
– Note that  26mV at room temperature (300K)
q
– This is often referred to as the “thermal voltage”.

This slide source: The textbook publisher and EE105 UC Berkeley


Page 90

Summary
– Current flowing in a semiconductor is comprised of drift and
diffusion components: dn dp
J tot = qp p E + qn n E + qDn − qD p
dx dx
– A region depleted of mobile charge exists at the junction between
P-type and N-type materials.
– A built-in potential drop (V0) across this region is established by the charge
density profile; it opposes diffusion of carriers across the junction. A reverse
bias voltage serves to enhance the potential drop across the depletion
region, resulting in very little (drift) current flowing across the junction.

kT N A N D
V0 = ln 2
q ni

This slide source: The textbook publisher and EE105 UC Berkeley

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