28/10/2019 How can I exclude registers from check_timing's no_clock report?

How can I exclude registers from check_timing's no_clock report?

Doc Id: 025190 Product: PrimeTime Last Modified: 11/21/2008

Question:

I have some registers in my design which don't receive a clock. The check_timing -verbose command reports
all of these registers in its report:

pt_shell> check_timing -verbose

Information: Checking 'no_clock'.
Warning: There are 451 register clock pins with no clock.

Clock Pin
------------------------------------------------------------
core/wishbone/clockrecovA_reg/CP
core/wishbone/clockrecovB_reg/CP
eth_top_BSR_top_inst/eth_top_int_o_bsr1/DW_bc_1_inst_U1_U1_U3/CP
eth_top_BSR_top_inst/eth_top_int_o_bsr1/DW_bc_1_inst_U1_U3/CP
eth_top_BSR_top_inst/eth_top_m_wb_ack_i_bsr2/DW_bc_2_inst_U1_U1_U3/CP
eth_top_BSR_top_inst/eth_top_m_wb_ack_i_bsr2/DW_bc_2_inst_U1_U3/CP
eth_top_BSR_top_inst/eth_top_m_wb_adr_o_0__bsr3/DW_bc_1_inst_U1_U1_U3/CP
eth_top_BSR_top_inst/eth_top_m_wb_adr_o_0__bsr3/DW_bc_1_inst_U1_U3/CP
...omitted...
eth_top_DW_tap_inst/U5_U3_0/CP
eth_top_DW_tap_inst/U5_U3_1/CP
eth_top_DW_tap_inst/U6_U4/CP
eth_top_DW_tap_inst/U8/CP

Information: Checking 'no_input_delay'.

Information: Checking 'partial_input_delay'.
Information: Checking 'no_driving_cell'.
Information: Checking 'unconstrained_endpoints'.
Information: Checking 'unexpandable_clocks'.
Information: Checking 'generic'.
Information: Checking 'latch_fanout'.
Information: Checking 'loops'.
Information: Checking 'generated_clocks'.
Information: Checking 'pulse_clock_non_pulse_clock_merge'.
Information: Checking 'pll_configuration'.
0

How can I get a set of registers excluded from this report?

Answer:

This article provides a Tcl procedure called remove_noclock_flops which takes the output of check_timing and
post-processes it to remove a given list of register cells or register clock pins. You can give it either a list or
a collection of either cells or cell clock pins. If cells are given, they are converted to the clock pins of those
cells. The provided check_timing command is issued, then post-processed to remove the specified list of
clock pins. Only the no_clocks portion of the check_timing report is post-processed; other sections are left
intact.

Here is an example using the check_timing report above:

pt_shell> source remove_noclock_flops.tcl

pt_shell> remove_noclock_flops {check_timing -verbose} \
{eth_top_BSR_top_inst/*/*/CP eth_top_DW_tap_inst/*/CP}
Information: Checking 'no_clock'.

https://solvnet.synopsys.com/retrieve/print/025190.html 1/2
28/10/2019 How can I exclude registers from check_timing's no_clock report?
Warning: There are 2 register clock pins with no clock.

Clock Pin
------------------------------------------------------------
core/wishbone/clockrecovA_reg/CP
core/wishbone/clockrecovB_reg/CP

Information: Checking 'no_input_delay'.

Information: Checking 'partial_input_delay'.
Information: Checking 'no_driving_cell'.
Information: Checking 'unconstrained_endpoints'.
Information: Checking 'unexpandable_clocks'.
Information: Checking 'generic'.
Information: Checking 'latch_fanout'.
Information: Checking 'loops'.
Information: Checking 'generated_clocks'.
Information: Checking 'pulse_clock_non_pulse_clock_merge'.
Information: Checking 'pll_configuration'.
0

The given wildcards are used to find the list of clock pins to be removed from the report. If all registers
receive clocks after post-processing, the table is omitted from the report to be consistent with the normal
behavior of check_timing.

remove_noclock_flops.tcl - version 1.0

© 2019 Synopsys, Inc. All Rights Reserved.

https://solvnet.synopsys.com/retrieve/print/025190.html 2/2