Electrical Handbook by Kreatryx

Downloaded From : www.EasyEngineering.
net
ww
w.E
asy
En
gin
ee rin
g.n
et
Downloaded From : www.EasyEngineering.net

Contents
Manual for K-Notes ................................................................................... 2

Transformers ............................................................................................. 3
DC Machines ........................................................................................... 11
ww
Synchronous Machines ........................................................................... 16
w.E
Induction Machines ................................................................................. 27
Single Phase Induction Motor ................................................................. 34
asy
En
gin
ee rin
g.n
et
© 2014 Kreatryx. All Rights Reserved.

Transformers
Impact of dimensions on various parameters of Transformer
KVA Rating  (Core Dimension)4
Voltage Rating  (Core Dimension)2

Current Rating  (Core Dimension)2
No-Load Current  Core Dimension
ww
Core Loss  Core Volume
w.E
Induced EMF in a Transformer
E1  N1
d
dt
E2  N2
d
asy
dt
E1 (rms)  4.44fN1m
En
E2 (rms)  4.44fN2m
 gin
Where E1 and E2 are emf in primary and secondary windings of Transformer respectively.


ee
Φ is the flux in the transformer and Φm is maximum value of flux.
rin
The polarity of emf is decided on basis of Lenz Law as currents in primary and secondary

g.n
should be such that primary and secondary flux should oppose each other.
Also, primary current enters the positive terminal of primary winding as primary absorbs
et
power and secondary current leaves the positive terminal of secondary winding as
secondary delivers power and this way we can mark emf polarities.
Exact equivalent circuit

Exact equivalent circuit w.r.t. primary
ww N 
2
N 
2
N 
2
R 2 = R 2  1  ; X 2 = X 2  1  ; Z L = Z L  1  ;
w.E  N2   N2 
 Approximately Equivalent Circuit

 N2 
asy
En
gin
ee rin
R 01 = R1  R 2
X 01 = X1  X 2 g.n
Tests Conducted on a Transformer et
(i) Open Circuit Test
o Conducted on LV side keeping HV side open circuited

o Equivalent Circuit

V12
o Power reading = P = V1 I0 cos 0 = -------- (i)
Rc
o Ammeter reading  I = I 0
P
o cos 0 =
V1 I0
o Calculate sin 0 = 1 - cos2 0
V12
o Q = V1 I0 sin 0 = ------- (ii)
Xm
ww
Calculate R c from (i) & Xm from (ii)
w.E
(ii) Short Circuit Test
o Conducted on HV side keeping LV side short circuited

o Equivalent Circuit
asy
En
gin
o
HV side.
ee
R 01 & X 01 are equivalent winding resistance & equivalent leakage reactor referred to
rin
Wattmeter reading = P = Isc R01 from this equation, we can calculate R 01
2
o
o Z 01 =
Vsc
& X01 = Z012  R012 g.n
o
Isc
We obtain R 01 , X 01 & full load copper losses from this test. et
Losses on Transformers
o Copper Loss
PCu = I12R1  I22R 2
= I12R01  I22R02
Where I1 = primary current
I2 = secondary current

R 1 = primary winding resistance
R 2 = secondary winding resistance
2 2
N  N 
R 01 = R1   1  R 2 ; R 02 = R 2   2  R 1
 N2   N1 
o Core Loss
(i) Hysteresis Loss
ww Pn = KnBm
x
f
w.E X = 1.6
Bm = maximum value of flux density
asy
Pn = KnBm1.6f
Bm 
V En
f
gin
V = applied voltage
f = frequency ee rin
V
1.6
Pn = Kh   f = KhV1.6f 0.6
f 
g.n
If V is constant & f is increased, Ph decreases et
(ii) Eddy Current Loss
Pe = KeBm2 f 2
V
Bm 
f
2
V
Pe = K e   f 2 = K e V 2
f
Core loss = Pc = Pe  Pn

Efficiency
x KVA  cos 
=
x KVA  cos   Pi  x2PCu,FL
X = % loading of Transformer
cos  = power factor
Pi = iron loss
ww PCu,FL = Full load copper losses
w.E
KVA = Power rating of Transformer
For maximum efficiency,

asy
Pi
x=
En
PCu,FL
Voltage Regulation of Transformer gin

Regulation down 
VNL  VFL
VNL
ee
 100
rin
Regulation up 
VNL  VFL
VFL
 100 g.n
Equivalent circuit with respect to secondary et
N2
K = Transformation Ratio 
N1
No-load voltage  V2
Full-load voltage  V2
Approximate Voltage Regulation
I2 R 02 cos 2  X 02 sin 2 
VR =
V2

cos 2 = power factor of load ZL
+ sign is used for lagging pf load

- sign is used for leading pf load
Condition for zero voltage regulation
R 
2 = tan-1  02 
 X 02 
The power factor is leading, Voltage Regulation can never be zero for lagging pf load.
ww
Condition for maximum voltage regulation
w.E X 
2 = tan-1  02 
 R 02 
asy
The power factor is leading, Voltage Regulation can never be negative for lagging pf loads
Three – Phase Transformers En

gin
In a 3-Phase transformers; the windings placed parallel to each other at as primary & secondary of
single phase transformer.
Rules to draw Phasor diagram

ee rin
1) Always draw phasors from A to B, B to C & C to A for line voltages.
2) The end points should have same naming as the input or output terminals. g.n
et
3) If we draw primary phasor from dotted to undotted terminal and if secondary voltage is also
from dotted to undotted, then secondary voltage is in same phase else in opposite phase.
Some examples

Phasor
ww o If you observe carefully, we traverse from dotted to undotted terminal in primary while
going from a2 to b2 , b2 to c2 & c2 to a2 .
w.E Same is the case when we traverse the secondary winding, so secondary voltage are in-
phase to primary.
o
asy
Then, we draw reference phasors from neutral to terminal and mark it with phase with
same name as terminal it is pointed to.
En
Then we plot it on clock & we observe it is like 12 0 clock so name is Dd12
connection.
Another example gin

ee rin
g.n
Phasor
et

o Here, we traversed primary from dotted to undotted terminal & in secondary from undotted
to dotted so all secondary phasor are out of phase wrt primary.
Parallel operation of Transformer
Necessary Conditions
1) Voltage ratings of both transformers should be same.

2) Transformers should have same polarity.
3) Phase sequence of both transformers must be same in case of 3- phase transformers.
ww 4) Phase displacement between secondary’s of both transformers must be 0 .
If there are 2 transformers A & B supplying a load power SL .
w.E S A = SL
ZB
Z A  ZB
; SB = SL
ZB
Z A  ZB
asy
ZB = impedance of transformer B (in ohms)
En
Z A = impedance of transformer A (in ohms)
Auto Transformer gin

o
o
ee
Generally, auto transformer is created from 2- winding transformer.
If rating of auto – transformer is LV/HV or HV/LV
rin
LV = low voltage
HV = high voltage g.n
Transformation Ratio = K =
KVA rating of auto transfer = 

LV
HV
 1 
et
o  (KVA rating of 2- winding Transformer)
1 - R 
o In auto- transformer, power is transferred from primary to secondary by 2 methods
induction & conduction.
o KVAinduction = 1 - K  Input KVA 
o KVAconduction = K  Input KVA 
o % Full load losses = 1 - K  %FL losses in2  winding Transformer 

o If copper & core losses are not given separately, then we consider losses as constant,
same as that of two winding transformer while calculating efficiency
10

DC Machines
Induced emf equation
NZ  P 
Ea =  
60  A 
 = flux per pole  wb 
N = speed of machine rpm
ww P = number of poles
w.E A = number of paralled path
Z = number of conductors
A = 2 for wave winding asy

A = P for lap winding
En
If speed is given in rad/sec gin Ea =
Z  P 
 
2  A 
where ω = speed (rad/s)
ee  
 PZ 
2 A
 
  = Km
rin
 
PZ g.n
Developed Torque
Km =
2A
= machine constant
et
T = KmIa
PZ
Km = = machine constant
2A
 = flux per pole
Ia = armature current
11

Classification of DC Machine
(i) Separately excited
ww
w.E
(ii) Shunt excited
asy
En
gin
(iii) Series excited
ee rin
g.n
et
(iv) Compound Excited
12

Terminologies
R a : Armature Resistance
R se : Series Field winding Resistance
R sh : Shunt Field winding Resistance
o The only difference between Generator & Motor will be that the direction of armature current is
coming out of positive terminal of emf Ea. In case of motor, armature current flows into Ea.
ww
Performance Equations of DC Machines
w.E
For shunt & separately excited machine
Generator: Ea = Vt  IaR a
Motor: asy
Ea = Vt  I aR a
En
For series & compound excited machine
Generator: gin
Ea = Vt  Ia R a  R se 
Motor: ee
Ea = Vt  Ia R a  R se 
rin
Power Flow
g.n
Shaft Power Armature Power et
Electrical Power
Pa  EaIa 
Rotational loss Copper loss
o This power flow diagram is for a dc generator.

o If you traverse the diagram from right to left then it is a power flow diagram for a motor.
13

Losses
Rotational loss Copper loss

 
 I 2R  I 2R  I 2R  V I 
 a a se se f f BD a 
 
Ohmic loss Brush
contact loss
ww
Friction & Hystersis   N &
 N2 
Stray load
PLL  i2 
w.E
Windage loss Pf w  Eddy current
Friction windage asy

 N2 
En
Bearing Brush gin
  N  N2 
ee rin
Efficiency
g.n
=
VaIa
VaIa  Ia2Ra  VBDIa  Pk
; for generator
et
Pk = sum of all constant loss
For maximum efficiency
Pk
For shunt & separately excited machine Ia =
ra
Pk
For series & compound excited machine Ia =
ra  rse
14

Characteristics of DC Generator
External characteristics
If no-load voltage is same for all types of generators:
ww
w.E
There are two categories of compound generators/motors
1. Cumulative Compound asy=> If series field flux aids the shunt fields flux.
En
2. Differentially Compound => If series field flux opposes the shunt field flux.
gin
If full – load voltage of all generators is kept same
1  series excited
2  over compound
ee
5  separately excited
6  shunt excited
rin
3  level compound 7  differentially compound
g.n
4  under compound
Conditions for voltage build-up in Shunt Generator

et
1) There must be residual flux.
2) Correct polarity of field winding with respect to armature winding so that field flux aids
residual flux for a given direction of rotation.
3) Field Resistance must be less than critical value
R f< R f cr 
Critical resistance is equal to the slop of air-gap line.
4) Speed of rotation should be more than critical value for a given field resistance R f .
N > Ncr
15

Braking of DC Motor
Plugging
o Supply to armature terminals is reversed whole field is left undisturbed.

o The current reverses resulting into negative torque & that brings rotor quickly to rest.
I' a =
V  E  a
R a
 R ex 
ww o Plugging Torque 
EaIa
,  = speed of rotor
w.E 
Before plugging, Ia 
 V - Ea 
asy Ra
EaIa
Load Torque 
En 
Breaking Torque = (Load Torque + Plugging Torque)
gin
Synchronous Machine
Induced emf
ee rin
Phase voltage  4.44 Nph f g.n
Nph : number of turns per phase et
 : flux per pole
f : frequency
This phase voltage is rms value
Armature Winding
o Usually, coil span is 180 (electrical)

o If coil span = 180 (electrical), coil is called as full pitch coil.
o  
If coil span = 180   (electrical), coil is called as Chorded coil or short pitched winding.
16


o Pitch Factor, KP = cos
2
o Induced emf   4.44 N ph f K P 
o For nth harmonic
Induced emf   4.44 N ph f K P 
 n
KP = cos  
 2 
To eliminate nth harmonic
ww n
2
=

2
w.E  =
180
n
 electrical
Distributed Winding
asy
m=
number of slots
En
number of poles  no. of phase
number of slotsgin
Coil Span =
180
number of poles
ee rin
=  electrical ;
coil span
g.n
Distribution Factor, K d 
 m 
sin 
 2 
 et
m sin  2  
For nth harmonic,  is replaced by n 
 mn 
sin  
Kd   2 
 n 
m sin  
 2 
17

 n  n
o For uniform distribution replace sin   by
 2  2
Winding Factor, K w = KPK d
Induced emf = 4.44 Nphf K w
Armature Resistance
Generally winding resistance is measured using voltmeter ammeter –method.
ww
For star connection
w.E Rm =
V
I
=
voltmeter reading
ammeter reading
Rm = 2R
asy
R=
Rm
En
2
gin
For Delta Connection
Rm =
voltmeter reading
ammeter reading
ee rin
Rm =
2
R
g.n
R=
3
3
R
et
2 m
This resistance is dc resistance but ac resistance is higher due to skin effect.
Raac = 1.2 to 1.3R
18

Armature Reaction
Power factor Generator Motor

Unity
ww
Zero pf lagging
w.E
asy
Zero pf leading
En
gin
ee rin
Lagging pf  cos 
g.n
et
Leading pf  cos 
19

Leakage Flux
Leakage flux links only one winding but not both so if it is present in stator, it won’t link to rotor &
vise versa.
Equivalent Circuit
ww
w.E X s = synchronous reactance
 X ar  X l
asy
En
= sum of armature reaction & leakage reactance
gin
E   V 0 + Ia  (R a  jX s ) , for Synchronous Generator
Where Φ is power factor angle (leading)

ee
E     V 0 - Ia  (R a  jX s ) , for Synchronous Motor
rin
for lagging power factor we replace Φ by “– Φ”
g.n
Voltage Regulation
Voltage regulation 
EV
 100%
et
V
For zero voltage regulation
 Xs 
   = 180  = tan-1  
 Ra 

cos  = load pf leading 
20

For maximum voltage regulation
=
cos  = load pf lagging 
Characteristics of Alternator
OCC & SCC
Open circuit characteristics & short circuit characteristics
ww ZS =
open circuit voltage at same field current
short circuit current at same field current
w.E
asy
Generally, open circuit voltage is given as Line to Line value so, before calculating Z S , we
need to find phase voltage
En
ZS =
Voc / 3
Isc gin : For Star Connection
ZS =
Voc
ee
If = constant
: For Delta Connection rin

Isc I
f = constant
g.n
Short circuit ratio
et
Field current required for rated open circuit voltage
SCR =
Field current required for rated short circuit current
1

X S pu 
XS pu = synchronous reactance in pu
21

Finding Voltage Regulation
There are usually 4 methods to find voltage regulation
o EMF Method
o MMF Method
o Potier Triangle Method
o ASA Method
Order of voltage regulation: EMF  ASA>ZPF>MMF
ww
Power Angle Equation
w.E
Output of generator
Pout =
VtEf
cos      
Vt2
cos 
ZS
asy ZS
Qout =
VtEf
ZS En V2
sin       t sin 
ZS
Input of motor gin

Pin =
Vt 2
ZS
VE ee
cos S  t f cos     
ZS rin
Qin =
Vt 2 VE
sin   t f sin     
g.n
ZS ZS
Synchronous Impedance = Z s = R a  jXS = Z S 

et
X 
  tan-1  S 
 Ra 
If R a = neglected, Z s = jXS = XS 90
Ef Vt V
Pout g =
XS
sin  ;  Qout  = t Ef cos   Vt 
g XS
22

Developed power in synchronous motor
Ef Vt E2
Pdev = cos       f cos 
ZS ZS
Ef Vt E2
Q dev = sin       f sin 
ZS ZS
If ra is neglected, ZS = XS 90
ww Pdev =
Ef Vt
ZS
sin 
w.E Q dev =
Ef Vt
cos  
Ef 2
asy
ZS ZS
o
o En
Developed Power is the power available at armature of motor.
In all power expressions, all voltages are line voltages and if we want to use phase voltage, we
gin
must multiply all expressions by a factor of 3.
ee rin
g.n
et
Parallel operation of Alternators
Necessary Conditions
1) Terminal voltage of incoming alternator must be same as that of existing system.

2) Frequency should be same.
3) Phase sequence should be same.
23

Synchronization by Lamp Method
ww
w.E
1) Observe if 3 lamps are bright & dark simultaneously, that means phase sequence of
asy
incoming alternator is same as that of existing system.
Otherwise, phase sequence is opposite and stator terminals must be interchanged to
En
reverse phase sequence of incoming generator.
2) The frequency of alternator is usually a bit higher than infinite bus.
gin
3) To understand the concept better, refer Ques. 39 of GATE – 2014 EE-01 paper.
ee
o If two alternators are supplying a load and we change either excitation or steam input of one
machine is varied, then following effects will happen:
rin
If excitation of machine 1 is increased
o
g.n
Parameter
Real Power
Reactive Power
Armature Current
Machine 1
Same
Increases
Increases
Machine 2
Same
Decreases
Decreases
et
Power Factor Decreases Increases
o If steam input of machine 1 is increased
Parameter Machine 1 Machine 2

Real Power Increases Decreases
Reactive Power Constant Constant
Armature Current Increases Decreases
Power Factor Increases Decreases
24

Droop Characteristics
fNL  fFL
droop of generator =  100%
fFL
Example: Refer Kuestions on Electrical Machines Type-8
Salient Pole Machine
o In case of salient pole machine, There are 2 reactances

Xd & Xq
ww X d : Direct axis reactance

Xq : quadrature axis reactance
w.E
o Id = Ia sin        90
Iq = Iacos      
 =   
asy
En
For synchronous generator
gin
tan  =
Vsin  IaX q
V cos   IaR a
;
ee
  lagging pf
-  leading pf
rin
For synchronous motor
Vsin  IaX q   leading pf

g.n
tan  =
V cos   IaR a
;
-  lagging pf et
Power – Angle Characteristics
VtEf V2  1 1 
P= sin   t    sin2
Xd 2  Xq Xd 
Excitation Reluctance power
power
25

Slip Test
If machine is run by prime mover at a speed other than synchronous speed & voltages & currents
are observed
Maximum Voltage
Xd =
Maximum Current
Maximum Voltage
Xq =
Maximum Current
ww
Power Flow Diagram
w.E
Input Shaft Power
3 EfIa cos 
Pe
3Vt Ia cos 
Field asy
Rotational SC load
Circuit loss Loss
En   loss 3Ia2ra
gin
Power Flow for Synchronous Generator
ee
3 EfIa cos 
rin
Input Pe
3VtIa cos 
g.n Shaft Power
Field
Circuit loss
SC load
 2
loss 3Ia ra 
et
Rotational
Loss
Power Flow Diagram for Synchronous Motor
26

Induction Machines
Stator & Rotor Magnetic Fields
o When a 3-phase supply is connected to the stator, than a magnetic field is set up
whose speed of rotation is
120f
NS =
P
f = frequency of supply
o If negative sequence currents are applied the rotating magnetic field rotates in
ww opposite direction as compared to magnetic field produced by positive sequence

currents.
w.E
o The rotor rotates in same direction as the stator magnetic field with a speed, Nr .
slip s =
Ns  Nr
Ns
asy
 Nr = Ns 1  s 
o
En
Speed of rotor magnetic field with respect to rotor = sNs
speed of rotor magnetic field with respect to stator = Ns .
o
gin
Hence, stator & rotor magnetic fields are at rest with respect to each other.
o
ee
Frequency of emf & current in rotor = sf
Relative Speed of rin

Stator Stator
Magnetic
Rotor
g.n Rotor
Magnetic
With
respect
Stator
Stator
Magnetic
0
-Ns
Field
Ns
0
Ns(1-s)
-sNs
et Field
Ns
0
to Field
Rotor -Ns(1-s) sNs 0 sNs
Rotor -Ns 0 -sNs 0
Magnetic
Field
27

Inverted Induction Motor
o When a 3   supply is connected to the rotor & stator terminals are shorted or are
connected to the resistive load.
o Then a rotor magnetic field is set up which rotates at speed Ns with respect to rotor ;
120f
Ns = where f is frequency of supply.
P
o If rotor rotates at speed Nr , than slip
Ns  Nr
s=
ww Ns
Here, the rotor rotates in a direction opposite to the direction of rotation of stator
w.E
o
magnetic field.
Speed of rotor magnetic field with respect to stator
= Ns  Ns 1  s  = sNs
asy
Speed of stator magnetic field = sNs
o
En
Frequency of emf & current induced in stator = sf
f = supply frequency on rotor.
gin Relative Speed of
ee
Stator Stator
Magnetic
Field
Rotor
rin
Rotor
Magnetic
Field
With
Stator
Stator
0
-sNs
sNs
0
Ns(1-s)
-Ns g.n sNs
0
respect
to
Magnetic
Field
Rotor -Ns(1-s) Ns 0
et Ns
Rotor -sNs 0 -Ns 0
Magnetic
Field
Equivalent circuit of Induction Motor
28

If we refer all parameters on stator side
ww N  
2
N  
r2 = r2  1  ; x2 = x2  1 
2
w.E N  
 2 
N  
 2 
N1 = N1 k1
asy
En
Where N1 = no. of turns per phase on stator
gin
k1 = winding factor of stator winding
N2 = N2 k2
ee
N2 = number of turns per phase on rotor rin
k2 = winding factor of rotor winding g.n
Tests Conducted on Induction Motor et
(i) No-Load Test
o Conducted on Stator with no-load on rotor side.

o It gives No-Load Losses ( Rotational Loss + Core Loss).
(ii) Blocked Rotor Test
o Conducted on stator side keeping rotor blocked

o It gives full load Copper Losses and equivalent resistance and equivalent reactance
referred to Stator Side.
29

o R 01 & X 01 are equivalent winding resistance & equivalent leakage reactor referred to
Stator side.
Wattmeter reading = P = Isc R01 from this equation, we can calculate R 01
2
o
Vsc
o Z 01 = & X01 = Z012  R012
Isc
o We obtain R 01 , X 01 & full load copper losses from this test.
o R 01 = R1+ R2’ ; X 01 = X1+ X2’
Power Flow Diagram
ww
w.E Rotor i/p = Pg (Airgap power) Mechanical Power Developed
Pin asy
Stator Stator En Rotor Rotor Friction &
I2R loss core loss
gin I2R loss core loss windage loss
Pg =
3I22r2
s
ee rin
I2 = rotor current g.n
s = slip
r2 = rotor resistance per phase

et
Rotor Cu Loss = 3I2 r2 = sPg
2
Mechanical power developed = Pg  sPg = 1-s Pg
Developed Torque, Te =
Pm
=
1-sPg  Pg
wr 1-s ws ws
30

Torque – Slip Characteristics
If core loss is neglected then equivalent circuit looks like as shown
V1  jXm 
Ve =
r1  j  X1  Xm 
r1Xm X1 X m
Re = ; Xe =
X1  Xm  X1  Xm 
ww
w.E
Torque developed, Tc =

mVe2

2
r2
 s

asy


r
ws  Re  2
s
   X   Xe 


 2 
2




En 
gin
ee rin
g.n
et
For Approximate analysis,
3 V12 r2
Stator impedance is neglected; Tc = 
ws  
2  s
 R 2  
  X22 
 s  
  
31

o At low slip, s  1
R 2 3 sV1 2
 X 2 , Tc =   Tc  s
s ws R2
o At high slip , s  1
2
R 2 3  V1  R 2 1
 X 2 , Tc = 
s ws  X   s s
 2 
ww
For maximum torque
R 2
w.E
Sm,T =
R e2   Xe  X2 
2
It stator impedance is neglected


asy 
R En3 V12
Sm,T = 2
X2
and Tmax =
gin
s (2X 2 )
And also,
T
Tmax
=
 s
2
s 
ee
, where T is the torque at a slip ‘s’
rin
 m,T 

 sm,T s 
g.n
For maximum power
R2
et
Sm,P =
2 2
R  R     X  X    R 
 e 2   e 2  2
   
Starting of Induction Motor
(i) Direct on – line starting

o Directly motor is connected to supply.
2
Te,st I 
o =  st  SFL
Te,FL  IFL 
32

(ii) Auto Transformer Starting

o Instead of connecting the motor to direct supply we reduce the voltage from
V1 to  xV1 
o This is done with the help of auto – transformer.
2
Te,st 1  Ist 
o = 2   SFL
Te,FL X  IFL 
2
Te,st auto X'mer   XV 
o =  1  = X2
Te,FL direct   V1 
ww (iii) Star – Delta Starting
w.E o At starting, stator winding is connected in star & in running state stator winding
is connected in delta.
asy
2
 V1 
 
V1 TY  3 1
Vph = ; = =
o
3
En TD V1 2
3
o IY =
1
3
ID
gin
o
Tst
TFL
I 
2
 1

=  st,Y  SFL =  3
I   I
ee 
Ist,d 
 S
 FL
2
;
Tst
TFL rin
1 I 
2
=  st,Y  SFL
3  IFL,d 
 FL,d 


FL,d


g.n
Speed Control of Induction Motor
o Constant V Control
et
f
2
180 sV1
At low slip, T= 
2Ns R 
2
Ns  N
s=
Ns
180 Ns  N V1
2
2
V 
T=     1  Ns  N
2Ns Ns R 2  f 
33

For constant torque, Ns  N = constant

So, by varying frequency we vary Ns & since Ns  N = constant we vary N accordingly.
Crawling
o Due to harmonies, the actual torque characteristics may look like
ww
w.E
asy
o
crawling. En
Due to this saddle region, the motor may become stable at a low speed & this is called as
gin
Cogging
o ee
If number of stator slots is equal to or integral multiple number of rotor slots, than at the
rin
time of start, the strong alignment forces between stator teeth & rotor teeth simultaneously
at all rotor teeth may prevent movement of rotor. This is called cogging.
g.n
Single Phase Induction Motor
o
et
According to Double field Revolving Theory, a single phase mmf can be resolved into two
rotating fields one rotating clockwise called as Forward field & other rotating anti-clock wise
called as Backward Field.
Both fields rotate at synchronous speed
120f
Ns =
P
o If rotor rotates at speed Nr , or a slips with respect to forward field.

Than slip with respect to backward field is  2  s 
34

o Due to these two fields producing opposing torques on rotor single phase IM is not
self starting.
ww
o To produce starting torque, we introduce an auxiliary winding which is used at the time
of start & is disconnected during the run stage.
w.E
asy
En
gin
ee
We generally design auxiliary winding such that phase difference is approximately 90
between main winding & auxiliary winding currents.
rin
g.n
et
35

o Capacitor Start Motor
ww
w.E
o
asy
Capacitor Run Motor
En
gin
ee rin
g.n
et
36

https://t.me/abcdelectrical
ww
w.E
asy
En
gin
ee rin
g.n
et

Contents
Manual for K-Notes ................................................................................. 2
Diodes ..................................................................................................... 3
Transistor Biasing .................................................................................. 11
ww
Transistor Amplifier .............................................................................. 19
w.E
Feedback Amplifiers .............................................................................. 25
Operational Amplifiers (OP-AMP) ......................................................... 29
asy
En
gin
ee rin
g.n
et

Diodes
Representation:
A: Anode K : Cathode
ww

w.E
The voltage at which the charged particles start crossing the junction is called as cut – in voltage
or Threshold voltage.
It is represented as VAK  V .
asy

I 0
D En
When VAK  V , depletion region exists and no charge carriers cross the junction, therefore

gin
When VAK  V , number of charged particles crossing the junction increases & the current
through the diode increase, non – linearly or exponentially.

 VAK

ee
Diode in the condition is said to be forward biased.
VT

 rin
ID  IS e  1



 g.n
I = reverse saturation current
S
V = Thermal voltage =
T
KT
q
et
K = Boltzmann constant
T = Temp. in k
q = charge of one e
V = 26mv at room temperature
T
 = intrinsic factor
 When V  0 , diode is said to be in reverse biased condition & no majority carriers cross the
AK
depletion region, hence I  0
D

Characteristics of Diode
ww
w.E
Equivalent circuit of diode
 Forward Bias asy

En
gin
ee rin
g.n
 Reverse Bias
et
Diode Resistance
1) State or DC Resistance
V
R  AK
DC I
D

2) Dynamic or AC Resistance
dV V
R  D  T
AC dI I
D D
Diode Applications
Clippers
It is a transmission circuit which transmits a part of i/p voltage either above the reference

ww
voltage or below the reference voltage or b/w the two reference voltages.
Series Clippers
w.E
i) Positive Clippers
asy V  V sin t
i m
: When V  V => V  V
i R O R
En V V
m R
When V  V => V  V
i R O i
gin
ee rin
g.n
et
ii) Negative Clipper
V  V sin t : When V   V => V  V
i m i R o R
V  V When V   V => V  V
m R i R o i

 Shunt Clipper
ww
i) Positive Clipper
When V  V , D is ON
w.E i
V V
o
R
R
asy When V  V , D is OFF

i R
V V
ii) Negative Clipper En o i
gin When V  V , D is ON
i R
ee V  V
o R
When V  V , D is OFF
i R rin
V V
o i
g.n
 Two level Clipper
When V  V , D is OFF & D is ON

et
i 2 1 2
V V
0 2
When V  V & V  V , D is OFF & D is OFF
i 2 i 1 2 1
V V
o i
When V  V , D is OFF D is ON
i 1 2 l
V V
o 1

CLAMPERS
These circuits are used to shift the signal either up words or down words.
 Negative Clampers
ww
w.E
When V  0
R asy
+ve peak is shifted to 0
En
-ve peak is shifted to 2V
When V  0
m
gin
R
+ve peak is shifted to V
R
ee rin
-ve peak is shifted to -2 V  V
m R
g.n
 Positive Clampers et

When V  0
R
-ve peak is shifted to 0
+ve peak is shifted to 2V
m
When V  0
R
-Ve peak is shifted to V
R
+ve peak is shifted to 2V  V
m R
ww
Rectifier
w.E
It converts AC signal into pulsating DC.
1) Half wave rectifier
asy
During positive half wave cycle
 R
V  V sin t  L 

En
0 m R  R 
 f L
gin
R = diode resistance
f
During negative half cycle

ee rin
V 0
0 g.n
  
V
0 avg
V
 m

et
4  RL 
     100%
2  R f  RL 
V
  
V
0 RMS
 m
2
V
 Form Factor = RMS   2
V
avg
 Ripple factor = FF2  1

 PIV  V
m

Bridge full wave rectifier
When +ve half wave cycle
R
V  V t  L
o R  2R
L f
When –ve half wave cycle
ww
V  V  t  
o
R
L
R  2R
L f
  
V
w.E 
2V
m
o avg


 asy
 

8 

2 
1
R


  100% En


1  2
R
L
f 

 gin
  
V
o RMS

V
 m
2 ee rin


FF 
2 2
PIV  V g.n
m
Zener Diode et
 A heavily doped a si diode which has sharp breakdown characteristics is called Zener Diode.
 When Zener Diode is forward biased, it acts as a normal PN junction diode.
 For an ideal zener diode, voltage across diode remains constant in breakdown region.
 If I is not given, then consider I 0

z(min) z(min)

Voltage Regulator
Regulators maintains constant output voltage irrespective of input voltage variation.
ww
w.E
asy
En
Zener must operate in breakdown region so V  V
i z
I I I
z L gin
V
I  z
L R
L
ee rin
I
max
I I
z max  L
g.n
I
I
min
I
z max 
I
z min L
I
max 
I
L
et
I I I
z min min L
10

Transistor Biasing
Bipolar Junction Transistor
 Current conduction due to both e- & holes

 It is a current controlled current source.
NPN Transistor
ww
w.E
asy
PNP Transistor
En
gin
ee rin
Region of Operation
g.n
i)
Junctions
J  RB
E
Region of operations
cut – off
et Applications
Switch
J  RB
C
ii) J  FB active amplifier
E
J  RB
C
iii) J  FB saturation Switch
E
J  FB
C
iv) J  RB reverse active Attenuation
E
J  FB
C
11

Current gain (α) (common base)
I I I
C nc o
I : injected majority carrier current in collector
nc
I
  nc
I
E
I  I I 1
I  B o ; I  B 
ww
C  1 E 
1   1 o
I
w.E
Current gain β (common emitter)
I  I  1    I
c B
 
o
asy

1
; 
1   
En

gin
These relations are valid for active region of operations.

Characteristics of BJT
Common Base characteristics

ee rin
g.n
input  V , I
BE E
output  V , I
CB C
et
Input characteristics
V vs I when V  cons tant
BE E CB
12

Output characteristics
ww
w.E
asy
 Common emitter characteristics
En
gin 
e
 e
inputs V , I
BE B
outputs V , I
CE C
rin
g.n
et
Input characteristics
13

Output characteristics
ww
w.E
Transistor Biasing
1) Fixed Bias method asy

V I R V 0
cc B B BE En
B
V V
I  cc
R
BE gin
B
Assuming active region of operation
I  I
ee rin
c
V V
CE
B
I R
CC C C g.n

Verification
If V V V  Active Re gion
et
CE  sat  CE CC
If not ; then saturation region
 For saturation region , V  V

CE CE  sat 
V V
CC CE  sat 
I 
C R
C
I
 In saturation region , I  C
B 
min
14

2) Feedback Resistor Bias Method
By KVL
cc 
c B c B B
V  I I R I R V I R 0
BE E E
 
V  I I R I R V  I I R 0
cc c B c B B BE C B B  
ww
Assuming active region
c
w.E
I  I
B
I 
B
V V
cc BE

R  1    R  R
B C E  asy
; I  I
c B

V  V  I  I R R   En
CE CC C B C E
gin
3) Voltage divider bias or self-bias ee rin
By thevenin’s theorem across R
R
2
g.n
V
R
TH
V 2
CC R  R
R R
 2 1
1 2 et
TH R  R
1 2
Apply KVL
V V I R
TH BE B TH
 I I R
B C E  
Assuming active region I  I
C B
V V
I  TH BE
B R  1    R
TH E
V V I R I R
CE CC C C E E
15

FET Biasing
JFET
ww
w.E
 When V
GS
asy
is negative, depletion layer is created between two P – region and that pinches the
channel between drain & source. En

gin
 The voltage at which drain current is reduce to zero is called as pinch off voltage.
 
2
ee
 Transfer – characteristics of JFET is inverted parabola
rin
V
I I
D DSS



1
V
GS 

GS  OFF  
g.n
When V

GS
 0, I  I
D DSS
et
When V V , I 0
GS GS  OFF  D
Pinch of voltage, V  V
p GS  OFF 
 For a N – channel JFET, pinch off voltage is always positive
V 0 & V 0
p GS
16

JFET Parameters
1) Drain Resistance
V
r  DS
d I
DS
It is very high, of the order of M .
ww
2) Trans conductance
I dI
g 
w.E
m V
D 
GS
dV
D
GS
I I

 1
V
GS


2
asy
D DSS 

V 
GS  OFF  
En
dI
D g 
2I
DSS

1 
V
GS
gin 

dV
GS
m V
GS  OFF 
3) Amplification factor


V
ee

GS  OFF  
rin
V
DS  g r
g.n

V
GS
md
et
MOSFET (Metal Oxide Semi-conductor FET)
17

Enhancement Type MOSFET
 No physical channel between source & drain

 To induce a channel Gate – source voltage is applied.
Depletion MOSFET
 Physical channel present between source & drain.
ww
Types of MOSFET
w.E
asy
En
gin
Operating characteristics ee rin
1. For n – channel MOSFET
cut  off region

g.n
 I  0 for V  V
D GS

T
V2 
et
 I  C
D
W
n ox L  GS 
V  V V  DS 
T DS 2 
 (linear region)
 
V
GS
 V and V
T DS
 V V
GS T 
2
 I  C

W VGS  VT  (saturation region)
D n ox L 2
V
GS
 V and V
T DS
 V V
GS T 
18

2. For p – channel MOSFET
 I  0 for V V (cut – off region)

D GS T
 V2 
 I  C
D
W
n ox L  GS T DS 
V  V V  DS 
2 
(linear region)
 
V  V and V V V
GS T DS GS T

ww  
I  C
D
W VGS  VT
n ox L
2
(saturation region)
V
GSw.E
 V and V
T DS
2
V
GS
V
T
Transistor Amplifier
asy
Small signal analysis for BJT
En
 h – parameter model of BJT
gin
ee rin
g.n
V  hI h V
1 i1 r 2
et
I  h I h V
2 f1 o 2
I
 current gain, A   2
I I
1
h R
A  f L
I 1h R
o L
V
 Input Impedance, Z  1 h h A R
i I i r I L
I
19

AR
 Voltage gain, A  I L
V Z
i
1
 Output impedance, Z 
o  hh 
h  f r 
 o h R 
 i s 
Common Emitter (CE) Amplifier
ww
w.E
asy
En
gin
ee rin
g.n
Small signal model
et
V h e
Voltage gain A  o  f R R
v V he c L  
i i
20

High frequency Analysis of BST
ww
w.E
r
bb' asy
= base spreading resistance.
r
b'e
= input resistance.
= feedback resistance. En
r
b'c
r = output resistance.
ce
gin
C
C
b' e
b'c
= diffraction capacitance.
= Transition capacitance.
ee rin
g = Transconductance.
m
g.n
Hybrid π - parameters et
 Ic Q KT
1) g  ; V  ,
m V T q
T
I = dc bias point collector current.

CQ
h
2) r  fe
b'e g
m
21

High Frequency Model
ww
r
w.E
b'c
= open circuited.
asy
En
gin
ee rin
g.n
Low Frequency Model et
22

Voltage gain as frequency
ww
w.E
asy
En
gin
ee rin
g.n

Low Frequency Range
External capacitor C and C are short circuited.

E C
et
 Internal capacitor C and C are open circuited.
b'c b'e
 Circuit becomes like.
= acts as high pass filter.
23

High frequency range
 External capacitors C ,C and C are short circuited.

b c E
 C is open circuited.
b'c
 Equivalent circuit behaves as a low pass filter with cut-off frequency fL.
Mid – band range

ww
All internal and external capacitance are neglected, so gain is independent of frequency.
FET Small Signal parameters
w.E I
Trans conductance, g  D
m V
GS
In non – saturation region
asy
I
g  D  C
W
.V En
m V
In saturation region
GS
n ox L DS
gin
g
ms
 C
W

V V
n ox L GS T ee rin
Small Signal equivalent circuit g.n
et
24

For low frequency
ww
w.E
For high frequency
asy
En
gin
Feedback Amplifiers
ee rin
Ideal Amplifier
Z 
in g.n
Z 0
o
Positive feedback : V  V  V
i s f
et
Negative Feedback : V  V  V
i s f
V A
For negative feedback, o 
V 1  A
s
V A
For positive feedback, o 
V 1  A
s
 Positive feedback is used for unstable system like oscillators.
25

Effects of Negative Feedback
i) Sensitivity
A
Without feedback =
A
A
With feedback = f
A
f
ww
A
A
f
f  1 A
1  A  A
w.E
ii) Input Impedance
Without feedback = Z
i asy
With feedback = Z
if En
Z
if
 Z 1  A 
i gin
iii) Output impedance
Without feedback = Z
ee rin
o
With feedback = Z
of g.n

Z
of
Z
o
1  A 
Negative feedback also leads to increase in band width
et
.
Topologies of Negative feedback
Output Input
Voltage Series
Voltage Shunt
Current Series
Current Shunt
26

1) Voltage Series Topologies
V  V
f o
It is called as series shunt feedback or voltage - voltage feedback.

In this case, input impedance increases & output impedance decreases.
ww
2) Voltage shunt topologies
f
w.E
I  V
o
asy
 = Trans conductance
En
gin
It is called as shunt-shunt or voltage current feedback.
3) Current series Topologies
V  I
f o
ee rin
 = resistance g.n
et
It is called as shunt – shunt or voltage current feedback.
4) Current shunt Topologies
I  I
f o
It is also called as shunt – series or current – current feedback.
27

Circuit Topologies
1) Voltage series
ww
w.E
2) Voltage shunt asy
En
gin
ee rin
g.n
et
3) Current – series
28

4) Current – shunt
ww
w.E
Operational Amplifiers (OP-AMP)
+  Non – inverting terminal
asy
-  inverting terminal
En
Parameters of OP–AMP
gin
1) Input offset voltage
ee rin
Voltage applied between input terminals of OP – AMP to null or zero the output.
2) Input offset current

g.n
et
Difference between current into inverting and non – inverting terminals of OP – AMP.
3) Input Bias Current
Average of current entering the input terminals of OP – AMP.
4) Common mode Rejection Ratio (CMRR)
Defined as ratio of differential voltage gain A to common mode gain A

d cm 
. 
A
CMRR  d
A
cm
29

5) Slew Rate
Maximum rate of change of output voltage per unit time under large signal conditions.
dV
SR  o V s
dt max
Concept of Virtual ground
ww
In an OP – AMP with negative feedback, the potential at non – inserting terminals is same as the
potential at inverting terminal.
w.E
Applications of OP –AMP
1) Inverting Amplifier
asy
R
V  f V
o R in En
1
gin
2) Inverting Summer ee rin
V V V
V  R  a  b  c
 g.n
o f R
 a
R
b
R
c



et
3) Non – inverting Amplifier
 R 
V  1  f V 
o  R in 
 1 
30

4) Non – inverting summer
If R  R  R  R
a b c
V R2
V  a
 
V R2
 b
 
V R2
 c
 
1 R R R R2 R R2
2
 Va  Vb  Vc 
ww
V 
1 3
w.E
o 
 R  V  V  V 
V  1  f   a
R 
1 
3
b c

 
asy
5) Differential Amplifier En
By Super position gin
V
ob 


R
 1  f
R
1
 R


3 V
R  R  b
 2 3
ee rin
V 
R
f V g.n
oa R
1
V V V
o oa ob
a
et
6) Integrator
1 t
o RC o in
V  V dc
31

7) Differentiator
dV
V  RC in
o dt
ww
w.E
8) Voltage to current converter
V
I  in
L R
asy
En
gin
ee rin
9) Current to voltage Converter g.n
V
out
 R I
p IN
et
32

10) Butter – worth Low Pass Filter
 R  V
V  1  f  in
o  R  1  j2fRC 
 1 
V A
o  f
V  f 
ww
in 1  j
 H
f 
w.E
 R 
A  1  f R  ; f 
f  1
1
H 2RC
asy
11) Butter – worth High Pass Filter
En
V  R   j2fRc  gin
V
o  1  f
in 
 R
1
 
  1  j2fRC 
 ee rin
   
 j f f  
 A  
f
L 
 f 
g.n
1  j 
 f 

 L   et
R
A 1 f
f R
1
1
f 
L 2RC
33

12) Active Half – wave rectifier
In this circuit, diode voltage drop between

V
input & output is not V but rather D ,
D A
where A = open loop gain of OP – AMP.
V  V
in o
ww
w.E
asy
En
gin
13) Active Full – wave Rectifier
ee rin
g.n
et
 
This circuit provides full wave rectification with a gain of  R R 
 1
R
V  V
m R m
1
34

14) Active Clipper
V  V , Diode conducts and V  V

IN R o
And when V  V Diode is OFF

IN R
V  V
o IN
ww
w.E
asy
En
gin
15) Active Clamper ee rin
V V V
o IN p g.n
V = peak value of V
p IN
et
35

16) Comparators
ww
w.E
asy
En
gin
ee rin
g.n
et
36

17) Schmitt Trigger
Inverting Schmitt Trigger
ww
w.E
asy


sat
En
When output is  V , then V
ref
 V
When output is V , then V  V

sat
When  
R
2
sat
gin
ref sat

R R
1 2
ee
Upper triggering point utp   V rin
sat
Lower triggering point Ltp   V
sat g.n
 Hystersis voltage = UTP  LTP  2V
sat
et
R1
UTP  V  V
sat R1  R 2 R
R1
LTP   V  V
sat R1  R 2 R
37

Non – Inverting Schmitt Trigger
ww
w.E
asy
En
gin
ee rin

R
R sat
R
Upper trigger Point UTP   2 V , Lower triggering point LTP   2 V
R sat g.n R
,  2
R

1
Hysteric voltage = UTP  LTP  2V
sat
1
et 1
18) Relaxation Oscillator
38

ww
w.E  R
2


R R
 1 2


 asy
1  
T  2RCln   En
1
1 
1
gin
f
T

1  
2RCln 
1 
 ee rin
555 Timer
g.n
Pin Diagram
et
39

 Bistable multi vibrator acts as a FF.

 Monostable Multi vibrator produces pulse output.
 Bistable Multi vibrator acts as free running oscillator.
A stable Multi vibrator
ww
w.E
asy
En
gin

T  0.69 R  R c 
ee rin
c 1 2
T  0.69R c
d 2
g.n
c d 1
T  T  T  0.69 R  2R C
2  et
1 1
f 

T 0.69 R  2R C
1 2 
40

ww
w.E
asy
En
gin
eer
ing
.ne
t

The control system is that means by which any quantity of interest in a machine, mechanism or
other equation is maintained or altered in accordance which a desired manner.
ww
w.E
Mathematical Modeling asy

En
The Differential Equation of the system is formed by replacing each element by
corresponding differential equation.
For Mechanical systems gin
(1) F  M d dt  M
d2 x
dt2 ee rin
g.n
(2) F  K  x1  x2  
t
 K  v1  v 2  dt
 et
(3) F  f  v1  v 2   f  dx1
dt

dx 2
dt 

Jd Jd2 
(4) T 
dt dt2
Jd Jd2 
(5) T 
dt dt2
ww
w.E (6) T  K  1  2   K
t
  1  2  dt

asy
En
Analogy between Electrical & Mechanical systems
 Force (Torque) – Voltage Analogygin

Translation system
Force F
Mass M
ee
Rotational system
Torque T
Moment of Inertia J
Electrical system
Voltage e
rin
Inductance L
Visuals Friction coefficient f Viscous Friction coefficient f Resistant R
Spring stiffness K Tensional spring stiffness K
g.n
Reciprocal of capacitance 1
C
Displacement x
Velocity 
Angular Displacement 
Angular velocity 
Charge q
Current i et
 Force (Torque) – current Analogy
Translation system Rotational system Electrical system
Force F Torque T Current i
Mass M Moment of Inertia J Capacitance C
Visuals Friction coefficient f Viscous Friction coefficient f Reciprocal of Resistant 1/R
Spring stiffness K Tensional spring stiffness K Reciprocal of Inductance 1 L
Displacement x Angular Displacement  Magnetic flux linkage 
Velocity  Angular Velocity  Voltage e

Transfer function
The differential equation for this system is

d2 x dx
F M 2
f  kx
dt dt
Take Laplace Transform both sides
F(s) = Ms2 X  s  fsX  s   kX s  [Assuming zero initial conditions]
X s 1
  Transfer function of the system
ww F s 2
Ms  fs  k
w.E
Transfer function is ratio of Laplace Transform of output variable to Laplace Transform of input
variable.

asy
The steady state-response of a control system to a sinusoidal input is obtained by
replacing ‘s’ with ‘jw’ in the transfer function of the system.
X  jw 
 En 1

1
F  jw  2
gin
M  jw   f  jw   k
2
w M  jwf+K
Block – Diagram Algebra

ee
The system can also be represented graphical with the help of block diagram. rin
g.n
et
Various blocks can be replaced by a signal block to simplify the block diagram.
 =>
 =>

 =>

=>
ww
w.E  =>
asy
En

gin =>
ee rin
g.n
Signal Flow Graphs

et
Node: it represents a system variable which is equal to sum of all incoming signals at
the node. Outgoing signals do not affect value of node.
 Branch: A signal travels along a branch from one node to another in the direction
indicated by the branch arrow & in the process gets multiplied by gain or transmittance
of branch
 Forward Path: Path from input node to output node.
 Non-Touching loop: Loops that do not have any common node.
Mason’s Gain Formula

Ratio of output to input variable of a signal flow graph is called net gain.
1
T   Pk k
 K

Pk = path gain of k th forward path

 = determinant of graph = 1 – (sum of gain of individual loops)
+ (sum of gain product of 2 non touching loops)
– (sum of gain product of 3 non touching loops) +………
 1   Pm1   Pm2   Pm3  ............
K
Pmr = gain product of all ‘r’ non touching loops.
K = the value of  for the part of graph not touching kth forward path.
ww T = overall gain
w.E
Example :
Forward Paths: P1  a12 a23a34 a45
asy
P2  a12 a23a35
Loops : P11  a23a32
P21  a23a34 a42 En
P31  a44
gin
P41  a23a34 a45 a52
P51  a23a35 a52
2-Non – Touching loops
ee rin
P12  a23a32 a44 ; P12  a23a32 a44
  1   a23a32  a23a42  a44  a23a34 a45a52  a23a35a52 

g.n
+  a23a32a44  a23a35a52a44 
First forward path is in touch with all loops
et
1  1
Second forward path does not touch one loop
1  1  a44 
P1 1  P2 2 a12 a23 a34 a45  a12 a23 a35 1  a44 

T 
 

Effect of Feed back

System before feedback
System after feedback
ww
w.E
Effect on Gain asy
Positive feedback
G En
Gain =
Negative feedback
1  GH
gin
 G (gain increases)
Gain =
G
1  GH
G ee
(gain decreases)
rin
g.n
Effect on Stability
et
Feedback can improve stability or be harmful to stability if not applied properly.
G
Eg. Gain = & GH = –1, output is infinite for all inputs.
1  GH
Effect on sensitivity
Sensitivity is the ratio of relative change in output to relative change in input
T
 T T LnT
SG  
 G G LnG

For open loop system

T=G
T G T G
SG   1  1
T G G
For closed loop system
G
T
1  GH
T G T G 1  GH 1 1
SG    2
  1 (Sensitivity decreases)
T G G 1  GH 1  GH
ww
Effect on Noise
w.E Feedback can reduce the effect noise and disturbance on system’s performance.
Open – loop system

asy
En
gin
Y S 
N S 
 G2 ee rin
Closed – loop system
g.n
et
Y S  G2
  G2 (Effect of Noise Decreases)
N S  1  G1 G2H
 Positive feedback is mostly employed in oscillator whereas negative feedback is used in

amplifiers.

Time Response Analysis
 Standard Test signals

 Step signal
r(t) = Au(t)
u(t) = 1; t > 0
= 0; t < 0
R(s) = A
ww s
w.E  Ramp Signal

r(t) = At, t > 0
=0,t<0
R(s) = A
asy
s 2
En
 Parabolic signal
gin
2
r(t) = At 2 ; t > 0
=0;t<0
ee rin
R(s) = A 3
s
g.n
 Impulse
et
 t  0 ; t  0

   t  dt  1


 Time Response of first – order systems
 Unit step input

R(s) = 1
S
1 1 T
C(s) =  
S  Ts  1  S Ts  1
t
C(t) = 1 – e T
ww
w.E
asy
 Unit Ramp input En
R(s) = 1
gin
C(s) =
S
S2
2
1
 Ts  1 
ee rin
C(t) = t – T  1  e

t
T 

 g.n
et
Type of system
Steady state error of system  ess  depends on number of poles of G(s) at s = 0.
This number is known as types of system
Error Constants
For unity feedback control systems
lim
K P (position error constant) = G s
s0

lim
K v (Velocity error constant) = s G s
s0
lim 2
K a (Acceleration error constant) = s G s
s0
Steady state error for unity feedback systems
Type of Error Step input Ramp input Parabolic Input
ww system
j
cons tants
KP K v K a
R
1  Kp
R
Kv
R
Ka
w.E 0
1
K 0 0
 K 0
R
1K
0

R
K


R
2
3
  K
   asy 0
0
0
0
K
0
En

gin
For non-unity feedback systems, the difference between input signal R(s) and feedback
signal B(s) actuating error signal Ea  s  .
Ea  s  
1
1  G sHs
lim sR  s 
ee
R s
rin
ea ss 
s  0 1  G sHs
g.n
Transient Response of second order system
G s 
wn2
et
S  S+2wn 
Y s wn2

R s s2  2wns  wn2
Characteristic Equation:   s  s2  2wns  wn2  0

For unit step input
wn2
Y s 

s s2  2wns  wn2 

if  < 1 (under damp)

ewnt
y(t) = 1  sin  wd t   
1  2
1  2
wd  wn 1  2 ; =tan-1

if  = 1 (critical damp)
y(t) = 1 – (1 + wn t) e wnt
ww if  > 1 (over damp)
w.E 
y(t) = 1  cos h wn 2  1 t 


2
2

 1

sin h wn  2  1

 t e  wnt
asy
Roots of characteristic equation are
En
s1 ,s2  wn  jwn 1  2
  wn
gin
‘  ’ is damping constant which governs
 = cos  ee
decay of response for under damped system.
rin
 = 0, imaginary axis
g.n
If corresponds to “undamped system” or sustained oscillations et

Pole – zero plot Step Response


ww 
w.E 
asy
En 

gin
ee rin


g.n
et
 

Important Characteristic of step Response
 / 12
 Maximum overshoot : 100e %
 1  2 
  tan1  
  
 
 Rise Time :
wn 1   2
ww Peak Time :


wn 1   2
w.E
 Settling Time : ts 
4
wn
3
(for 2% margin)
ts 
asy
wn
(for 5% margin)
En
Effect of Adding poles and zeroes to Transfer Function
gin
1. If a pole is added to forward transfer function of a closed loop system, it increases
maximum overshoot of the system.
ee rin
2. If a pole is added to closed loop transfer function it has effect opposite to that of case–1.
3. If a zero is added to forward path transfer function of a closed loop system, it decreases
rise time and increases maximum overshoot.
g.n
4. If a zero is added to closed loop system, rise time decreases but maximum overshoot
decreases than increases as zero added moves towards origin.
Stability of control system

et
A linear, time-invariant system is stable if following notions of stability are satisfied:
 When system is excited by bounded input, the output is bounded.
 In absence of inputs, output tends towards zero irrespective of initial conditions.
 For system of first and second order, the positive ness of coefficients of characteristic
equation is sufficient condition for stability.
 For higher order systems, it is necessary but not sufficient condition for stability.

Routh stability criterion
 If is necessary & sufficient condition that each term of first column of Routh Array of its
characteristic equation is positive if a0  0 .
 Number of sign changes in first column = Number of roots in Right Half Plane.
 Example :
a0 sn  a1 sn1  ............  an  0
ww sn a0 a2 a 4 …………
w.E sn1
sn2
a1 a3
a1 a2  a0 a3
a5 ………….
a1 a4  a0 a5
sn3 ..
a1
asy a1
.. ..
En
..
s 0
..
an gin
Special Cases ee rin

zero term. g.n
When first term in any row of the Routh Array is zero while the row has at least one non-
et
Solution : substitute a small positive number ‘  ’ for the zero & proceed to evaluate rest
of Routh Array
eg. s5  s4  2s3  2s2  3s  5  0

s5 1 2 3
4
s 1 2 5
s3  2
2  2
s2 5

4  4  5 2
s1  2
2  2
s0 5

2  2
 0 , and hence there are 2 sign change and thus 2 roots in right half plane.

 When all the elements in any one row Routh Array are zero.
Solution : The polynomial whose coefficients are the elements of row just above row of
zeroes in Routh Array is called auxiliary polynomial.
o The order of auxiliary polynomial is always even.
o Row of zeroes should be replaced row of coefficients of polynomial generated by
taking first derivative of auxiliary polynomial.
ww Example : s6  2s5  8s4  12s3  20s2  16s  16  0
w.E s6
s5
1 8
2 12 16
20 16 s6
s5
1
1
8
6
20 16
8
s5
s 4
1 6
2 12 16
8
asy s4
s3
1
4 12
6 8
s 4
1 6 8
En s3
1 3
s 3
0 0
gin s2
s1
3
1
8
ee s 0
8
3
Auxiliary polynomial : A(s) = s4  6s2  8  0 rin

Types of stability g.n



Limited stable : if non-repeated root of characteristic equation lies on jw- axis.
et
Absolutely stable: with respect to a parameter if it is stable for all value of this parameter.
Conditionally stable : with respect to a parameter if system is stable for bounded range
of this parameter.
Relative stability
If stability with respect to a line s  1 is to be judged, then we replace s by  z  1  in
characteristic equation and judge stability based on Routh criterion, applied on new
characteristic equation.

Roots locus Technique

Root – Loci is important to study trajectories of poles and zeroes as the poles & zeroes
determine transient response & stability of the system.
Characteristic equation
1+G(s)H(s) =0
Assume G(s)H(s) = KG1  s  H1  s 
1  KG1  s  H1  s   0
ww G1  s H1  s    1 K
w.E
Condition of Roots locus
G1  s  H1  s  
1
k asy
 k  
G1  s  H1  s    2i  1  
G1  s  H1  s   2i En K  0 = odd multiples of 180°
K  0 = even multiples of 180°
gin
Condition for a point to lie on root Locus

ee rin
The difference between the sum of the angles of the vectors drawn from the zeroes and

those from the poles of G(s) H(s) to s1 is on odd multiple of 180° if K > 0.
g.n
The difference between the sum of the angles of the vectors drawn from the zeroes &
et
those from the poles of G(s)H(s) to s1 is an even multiple of 180° including zero degrees.
Properties of Roots loci of 1  KG1  s  H1  s   0

1. K = 0 points : These points are poles of G(s)H(s), including those at s =  .
2. K =  point : The K =  points are the zeroes of G(s)H(s) including those at s =  .
3. Total numbers of Root loci is equal to order of 1  KG1  s  H1  s   0  equation.
4. The root loci are symmetrical about the axis of symmetry of the pole- zero configuration
G(s) H(s).
5. For large values of s, the RL (K > 0) are asymptotes with angles given by:
2i  1
i   180
nm
for CRL(complementary root loci) (K < 0)

2i
i   180
nm
where i = 0, 1, 2, ………., n  m  1
n = no. of finite poles of G(s) H(s)
m = no. of finite zeroes of G(s) H(s)
6. The intersection of asymptotes lies on the real axis in s-plane.
ww The point of intersection is called centroid (  )
1 =
 real parts of poles G(s)H(s)   real parts of zeroes G(s)H(s)
w.E nm
7. Roots locus are found in a section of the real axis only if total number of poles and zeros
to the right side of section is odd if K > 0. For CRL (K < 0), the number of real poles &
asy
zeroes to right of given section is even, then that section lies on root locus.
En
8. The angle of departure or arrival of roots loci at a pole or zero of G(s) H(s) say s1 is found
gin
by removing term (s – s1) from the transfer function and replacing ‘s’ by ‘s1’ in the
remaining transfer function to calculate G  s1  H  s1 
ee
Angle of Departure (only applicable for poles) = 1800 + G  s1  H  s1 
rin
Angle of Arrival (only applicable for zeroes) = 1800 - G  s1  H  s1 
g.n
9. The crossing point of root-loci on imaginary axis can be found by equating coefficient of
s1 in Routh table to zero & calculating K.
et
Then roots of auxiliary polynomial give intersection of root locus with imaginary axis.
10. Break-away & Break-in points

dk
These points are determined by finding roots of 0
ds
d2k
for breakaway points : 0
ds2
d2k
For break in points : 0
ds2

1
11. Value of k on Root locus is K 
G1  s1  H1  s1 
Addition of poles & zeroes to G(s) H(s)

 Addition of a pole to G(s) H(s) has the effect of pushing of roots loci toward right half
plane.
 Addition of left half plane zeroes to the function G(s) H(s) generally has effect of moving
& bending the root loci toward the left half s-plane.
ww
Frequency Domain Analysis
w.E
 Resonant Peak, Mr
It is the maximum value of |M(jw)| for second order system
1
Mr =
2 1   2
asy
,   0.707  = damping coefficient
 Resonant frequency, wr En
gin
The resonant frequency wr is the frequency at which the peak Mr occurs.
wr  wn 1  2 2 , for second order system
ee rin
 Bandwidth, BW
g.n
The bandwidth is the frequency at which |M(jw)| drops to 70.7% of, or 3dB down from, its
zero frequency value.
for second order system,
1
et
  
BW = wn  1  2 2   4  4 2  2 

2
Note : For  > 0.707, wr = 0 and Mr = 1 so no peak.
Effect of Adding poles and zeroes to forward transfer function

 The general effect of adding a zero to the forward path transfer function is to increase
the bandwidth of closed loop system.
 The effect of adding a pole to the forward path transfer function is to make the closed
loop less stable, which decreasing the band width.

Nyquist stability criterion

In addition to providing the absolute stability like the Routh Hurwitz criterion, the
Nyquist criterion gives information on relative stability of a stable system and the degree of
instability of an unstable system.
Stability condition
 Open – loop stability
If all poles of G(s) H(s) lie in left half plane.
 Closed loop stability
ww If all roots of 1 + G(s)H(s) = 0 lie in left half plane.
w.E
Encircled or Enclosed
A point of region in a complex plane is said to be encircled by a closed path if it is found
inside the path.
asy
A point or region is said to enclosed by a closed path if it is encircled in the counter
En
clockwise direction, or the point or region lies to the left of path.
Nyquist Path
gin

ee
If is a semi-circle that encircles entire right half plane
rin
but it should not pass through any poles or zeroes
of   s   1  G  s  H  s  & hence we draw small
g.n
semi-circles around the poles & zeroes on jw-axis.
et
Nyquist Criterion
1. The Nyquist path s is defined in s-plane, as shown above.

2. The L(s) plot (G(s)H(s) plot) in L(s) plane is drawn i.e., every point s plane is mapped to
corresponding value of L(s) = G(s)H(s).
3. The number of encirclements N, of the (–1 + j0) point made by L(s) plot is observed.

4. The Nyquist criterion is

N= Z – P
N = number of encirclement of the (–1+ j0) point made by L(s) plot.
Z = Number of zeroes of 1 + L(s) that are inside Nyquist path (i.e., RHP)
P = Number of poles of 1 + L(s) that are inside Nyquiest path (i.e., RHP) ; poles of 1 + L(s) are
same as poles of L(s).
For closed loop stability Z must equal 0

For open loop stability, P must equal 0.
∴ for closed loop stability
ww N=–P
i.e., Nyquist plot must encircle (–1 + j0) point as many times as no. of poles of L(s) in RHP
w.Ebut in clockwise direction.
asy
Nyquist criterion for Minimum phase system
En
A minimum phase transfer function does not have poles
or zeroes in the right half s-plane or on – axis excluding origin.
gin
For a closed loop system with loop transfer function L(s)
that is of minimum phase type, the system is closed loop
ee
stable if the L(s) plot that corresponds to the Nyquist path
does not encircle (–1 + j0) point it is unstable.
rin
i.e. N=0
g.n
 Effect of addition of poles & zeroes to L(s) on shape of Nyquiest plot
If L(s) =
K
1  T1 s
et
Addition of poles at s = 0
K
1. L  s  
s 1  T1 s 
Both Head & Tail of Nyquist plot are
rotated by 90° clockwise.

K
2. L  s  
s 1  T1 s 
2
K
3. L  s  
s 1  T1 s 
ww
3
w.E
Addition of finite non-zero poles
K
asy
L s 
1  T1 s 1  T2 s  En
gin
Addition of zeroes
ee
Only the head is moved clockwise by 90° but tail point remains same.
rin
 
g.n
Addition of term 1  Tds in numerator of L(s) increases the phase of L(s) by 90° at w   and
hence improves stability.
et
Relative stability: Gain & Phase Margin
 Gain Margin
Phase crossover frequency is the frequency at which the L(jw) plot intersect the negative
real axis.
or where L  jwP   180
1
gain margin = GM = 20log10
L  jwP 

if L(jw) does not intersect the negative real axis

L  jwP   0 GM = dB
GM > 0dB indicates stable system.

GM = 0dB indicates marginally stable system.
GM < 0dB indicates unstable system.
Higher the value of GM, more stable the system is.
 Phase Margin
ww It is defined as the angle in degrees through which L(jw) plot must be rotated about the
origin so that gain crossover passes through (– 1, j 0) point.
w.EGain crossover frequency is 𝑤𝑔 s.t.
 
L jwg  1
asy 
Phase margin (PM) = L jwg  180 
En
Bode Plots
Bode plot consist of two plots gin


20 log G  jw  vs log w
  w  vs log w ee rin
K 1  T1s 1  T2s 
Assuming G  s  

s 1  Tas   1  2 s 2  s
2 
2
e
 Tds
g.n
 n n 
G  jw  dB  20log G  jw   20log10 K  20log10 1  jwT1 
20log10 1  jwT2  20log10 jw  20log10 1  jwTa

et
w w2
20log10 1  j2  w2
wn n
 2 
G  jw    1  jwT1    1  jwT2   jw   1  jwTa     1  2 jw / wn  w 2   jwTd rad
 wn 

Magnitude & phase plot of various factor
Factor Magnitude plot Phase Plot

K
P
 jw 
ww
w.E
P
 jw 
asy
1  jwTa  En
gin
1
ee rin
1  jwTa 
g.n
G  jw  
1
et
    j2  w w 
 2 2 
1 w w
 n n  



Example : Bode plot for

10  s  10 
G s 
s  s  2  s  5 
10 10  jw 
G  jw  
jw  jw  2  jw  5 
If w = 0.1
102
G  jw    100 ;
0.1  2  5
ww
For 0.1 < w < 2
w.E G  jw  
102
w  25
G  jw   90
 10 w ; slope = –20 dB / dec
For 2 < w < 5

10  10 20
asy
G  jw  
jw  jw  5 w
En
 2 ; G  jw   Slope = –40 dB/ dec
G  jw   180
For 5 < w < 10 gin
G  jw  
10  10
jw  jw  jw
G  jw   270
100
w ee
  j 3 ; G  jw   Slope = – 60 dB/ dec
rin
For w > 10
10  jw
g.n
G  jw  
jw  jw  jw
G  jw   180
 10 2 ; G  jw   slope = – 40 dB/ dec
w
et

Designs of Control systems
 P – controller
The transfer function of this controller is KP.
The main disadvantage in P – controller is that as KP value increases,  decreases &
hence overshoot increases.
As overshoot increases system stability decreases.
ww I – controller
The transfer function of this controller is

ki
s
.
w.E It introduces a pole at origin and hence type is increased and as type increases, the SS
error decrease but system stability is affected.
 D – controller asy
En
It’s purpose is to improve the stability.
The transfer function of this controller is KDS.
gin
It introduces a zero at origin so system type is decreased but steady state error increases.
 PI – controller
ee
It’s purpose SS error without affection stability.
rin
K  SKP  K i 
Transfer function = KP  i 
s S g.n
It adds pole at origin, so type increases & SS error decreases.
It adds a zero in LHP, so stability is not affected. et
Effects:
o Improves damping and reduces maximum overshoot.
o Increases rise time.
o Decreases BW.
o Improves Gain Margin, Phase margin & Mr.
o Filter out high frequency noise.

 PD controller
Its purpose is to improve stability without affecting stability.
Transfer function: KP  KD S
It adds a zero in LHP, so stability improved.
Effects:
o Improves damping and maximum overshoot.
o Reduces rise time & setting time.
o Increases BW
ww o
o
Improves GM, PM, Mr.
May attenuate high frequency noise.

o
w.E
PID controller
Its purpose is to improve stability as well as to decrease ess.
K
asy
Transfer function = KP  i  sKD
s
o
En
If adds a pole at origin which increases type & hence steady state error decreases.
If adds 2 zeroes in LHP, one finite zero to avoid effect on stability & other zero to
o
improve stability of system.
gin
Compensators
ee rin
 Lead Compensator
Ge  s  
  ZS  1  g.n
c1 ;  < 1
 ZS  1
et
 = phase lead
= tan1  w   tan1  w 
For maximum phase shift
w = Geometric mean of 2 corner frequencies
1
=
 
tan m 
1   
2 

Effect
o It increases Gain Crossover frequency
o It reduces Bandwidth.
o It reduces undamped frequency.
 Lag compensators
 1  s 
Ge  s   ;  1
1  s 
1  jw 
Ge  jw  
1  jw 
ww
For maximum phase shift
w.E
w
1
 
 1
tan m 
2 
asy
Effect
En
o
o gin
Increase gain of original Network without affecting stability.
Reduces steady state error.
o Reduces speed of response.
ee rin
 Lag – lead compensator
g.n
 S  1  S  1

Ge  s   
1  


2 
 S  1    S  1  

et
 1  2
 >1;  <1
Ge  jw  
1  jw1 1  jw2 
1  jw1 1  jw2 / 

State Variable Analysis
 The state of a dynamical system is a minimal set of variables (known as state variables)
such that the knowledge of these variables at t = t0 together with the knowledge of input
for t ≥ t0 completely determine the behavior of system at t > t0.
 State variable
 x1  t    y1  t    u1  t  
     
x(t) =  x2  t  
; y(t) =  y 2  t   ; u(t) =  u2  t  
 ..   ..   .. 
ww  
 xn  t  
 
 yp  t  
 
um  t  
w.E
 Equations determining system behavior :
̇ = A x (t) + Bu(t) ; State equation
𝑋(𝑡)
y(t) = Cx (t) + Du (t) ; output equation
State Transition Matrix

asy
En
It is a matrix that satisfies the following linear homogenous equation.
dx  t 
dt
 Ax  t 
Assuming   t  is state transition matrix

gin
1
  t    1  SI  A  
 
ee rin
1 2 2 1 33
Properties:
  t   eAt  I  At 
2!
A t  A t  .........
3!
g.n
1)   0  = I (identity matrix)
2) 1  t     t 
et
3)   t2  t1    t1  t0     t2  t0 
K
4)   t     kt  for K > 0
Solution of state equation

State Equation: X(t) = A x(t) + Bu(t)
t
At A  t 
X(t) = e x  0    e Bu    d
0

Relationship between state equations and Transfer Function

X(t) = Ax (t) + Bu(t)
Taking Laplace Transform both sides

sX(s) = Ax (s) + Bu(s)
(SI – A) X(s) = Bu(s)
X(s) = (SI – A)–1 B u (s)
y(t) = Cx(t) + D u(t)
ww
Take Laplace Transform both sides.
y(s) = Cx(s) + D u (s)
w.E x(s) = (sI – A)–1 B u (s)

y(s) = [C(SI – A)–1 B + D] U(s)
y s
U s
1
asy
 C  SI  A  B  D = Transfer function
En
Eigen value of matrix A are the root of the characteristic equation of the system.
gin
Characteristic equation = SI  A  0
Controllability & Observability


ee rin
A system is said to be controllable if a system can be transferred from one state to

another in specified finite time by control input u(t).
g.n
A system is said to be completely observable if every state of system Xi  t  can be
identified by observing the output y(t).
Test for controllability

et
QC = controllability matrix
= [B AB A2B ………An – 1 B]
Here A is assumed to be a n x n matrix
B is assumed to be a n x 1 matrix
If det  QC  = 0 system is uncontrollable
det  QC   0 , system is controllable

Test for observability

Q0 = observability matrix
C 
 
CA 
 2 
CA 
= . 
 
. 
ww .




C  A n1 

w.E
A is a n x n matrix
C is a (1 x n) matrix
asy
En
If det  Q0   0 , system is unobservable
gin
det  Q0   0 , system is observable
ee rin
g.n
et

ww
w.E
asy
En
gin
ee rin
g.n
et

Contents
Number Systems and Boolean Algebra ................................................... 3
Combinational Logic Circuits ................................................................. 12
ww
Sequential Logic Circuits ....................................................................... 15
A/D and D/A Converters ....................................................................... 25
w.E
Microprocessor ..................................................................................... 31
asy
En
gin
ee rin
g.n
et

Number Systems and Boolean Algebra

 Decimal : Radix = 10; Symbols = (0, 1, 2, 3…………9)
 Binary : Radix = 2; Symbols = (0, 1)
 Hexadecimal : Radix = 16; Symbols = (0, 1, 2……………., 9, A, B,……………., F)
 Octal : Radix = 8; Symbols = (0, 1, 2, …………….., 7)
For radix N, following digits are possible
ww 
(0, 1, 2, ………………, N-1)
To convert a number from radix ‘x’ to bare 10 or decimal.
w.E  
Eg. 136 x   ? 10  1.x2  3.x  6.x0  x2  3x  6
asy
Complimentary Number Representation
En
A – B = A + (- B)  A   compliment of  B 
For a base – r system

gin
r  1 's compliment  rn  r m  N
r 's compliment  rn  N
ee rin
Where r = base g.n
N = given number
n = no. of digits in integer part of N

et
m = no. of digits in decimal part of N
eg. For 378.67 10
N = 378.67 ; m = 3 ; n = 2 ; r = 10

Boolean Algebra
 Compliment
0 1
10
Represented as A  A
ww  
And A  A
w.E AND function
0.0  0 A.A  A
0.1  0
1.0  0
asy A.1  A
A.0  0
1.1  0
En A.A  0
 OR Function
gin
00 0
0 1  1
10 1
ee AAA
A 1  1
A0  A rin
11  1 AA 1
g.n
Laws of Boolean Algebra
1) Commutative Law
et
OR  A  A  B  A
AND  AB  BA
NAND  AB  BA
2) Associative Law
OR   A  B   C  A  B  C 
AND   A B  C  A B C 

3) Consensus Law
AB  AC  BC  AB  AC
4) Distributive Law
A. B  C   AB  AC
.
.
ww Dual : Convert all

10
0 1
w.E A + (BC) = (A+B)(A+C)
5) De – Morgan’s Law
 asy
NOR operation is same as bubbled AND
En
A  B  C...................  A.B.C..............

gin
NAND operation is same as bubbled OR
6) Transposition Law
ee
A  B  C...................  A  B  C..............
rin
A.B  AC   A  C   A  B 
g.n
Operator precedence
1) Parenthesis
et
2) NoT
 Decreasing priority
3) AND
4) OR
Minterms, Maxterms & Properties
Minterm : It is a standard product term i.e. a product term which contains all variables of a given
function either in normal form or compliment form.
Maxterm : it is standard sum term i.e. a sum term which contains all the variables of the function
either in normal or compliment form.

F (A, B, C) = min terms F  A,B,C   max terms

ABC=m  0,0,0  A+B+C=M
0 7
ABC=m  0,0,1  A+B+C=M
1 6
ABC=m 1,1,1  A+B+C=M
7 0
Properties

1) n – variable function  2n minterms & 2n max terms 
ww2) M  m & m  M
j j j j
w.E
3) m  M 2n 1i ; M  m 2n 1i ; D = indicates dual
iD   iD  
4)
a)
2n  1
 mi  1
asy
i0
En
b)
2n  1
j0
m 0
j gin
ee
Note : The output of XOR and XNOR gate contains half the total number of minterms.
rin
Forms of Boolean function
1) Sum of product (SOP) form = DNF (Distinjunctive Normal Form) g.n

2) Canonical SOP form = DCF (Disjunctive Canonical Form)
3) Product of sum (POS) form = CNF (Conjunctive Normal Form)
4) Canonical POS form = CCF (Conjunctive Canonical Form)
et
Eg. Convert F  A,B,C  A  AC  ABC to Canonical SOP form :
F  A  AC  ABC
 ABC  ABC  ABC  ABC  ABC  ABC

     
m m m m m m
0 1 2 3 4 6

F   m  0,1,2,3, 4,6   canonical SOP form
 M 5,7   canonical POS form
Karnaugh Map
3 – variable K – map
Octant  group of 8 minterms
ww
Quad  group of 4 min terms
w.E
Pair  group of 2 min terms
4 – variable k – map
All corners of k – map asy

(0, 2, 8, 10)  Quad En
gin
ee rin
g.n
Eg. F  A,B,C,D   m 0,1, 4,5,6,8,9,10,12,14,15
et
F  AC  AD  BD  BC  ABC

Eg. F  A,B,C   M  0,1,2,3, 4,7 

F  A B  C  B  C 
Implicant : it is the set of all adjacent min terms
ww Eg. Pair, quad, octants
w.E
Prime Implicant : It is an implicant which is not a subset of another implicant.
asy
Essential PI (EPI) : It is a prime implicant which contains at least one min terms which is not
covered by other prime implicant.
1) PI,Non PI
2) PI, EPI En
3) PI, EPI
4) PI, EPI
gin
5) PI, EPI
ee rin
Don’t care condition g.n
et
In a digital system, for a non – occurring input, the output can be taken as either one or zero
during simplification & it is called don’t care condition.
Eg. X  A,B,C,D   m 0,1  d 10,11,12,13,14,15 ;
X  ABC

Logic Gates
1) Equivalence Gate = Ex – NOR Gate
A B F
0 0 1
0 1 0
1 0 0
ww 1 1 1
F  A  B  AB  AB
w.E
2) Staircase connection = Ex – OR Gate
A B F
0 0 0 asy
0 1 1
1 0 1 En
1 1 0
gin
F  A  B  AB  AB

ee
In Ex – OR, output = 1 if input has odd no. of 1’s rin
 In Ex – NOR, output = 1, if input has even no. of 1’s
g.n
3) Inverter
A F
et
0 1 FA
1 0

4) AND GATE
A B F
0 0 0
0 1 0
1 0 0
1 1 1
ww
5) OR GATE
F=A.B
w.E A B F
0
0
0
1
0
1 asy
1
1
0
1 1
1
En
F=A+B gin
6) NAND GATE
A B F
ee rin
0 0 1
0 1 1 g.n
1 0 1
1 1 0
et
F  AB
This gate is equivalent to
10

7) NOR GATE
A B F
0 0 1
0 1 0
1 0 0
1 1 0
ww F  A B
This gate is equivalent to
w.E
asy
CODES :-
En
1) Binary coded decimal code (BCD) :-
gin
a) Each digit of decimal number is represented by binary equivalent.
b) It is 4 bit binary code.
c) eg.  943
decimal

9 4 3
1001 0100 0011
ee rin
 94310  100101000011 2
g.n
2) Gray Code :-
a) Only one bit in the code group changes when going from one step to the next.
et
b) For 3-bit
000  001  011  010  110  111  101  100
11

Combinational Logic Circuits
1) Half Adder
A B S C
0 0 0 0 S  A B
0 1 1 0 C  AB
1 0 1 0
1
ww 1 1 1 1 Half adder = 1 XOR Gate & 1 AND Gate

 w.E
To implement a half adder using NAND Gates, 5 NAND Gates are required.
To implement a half adder using NOR Gates, 5 NOR Gates are required.
2) Half Subtractor
A B D B
asy
0 0 0 0 D  A BEn
0
1
1
1
0
1
1
1
0
1
0
0
gin
B  A B  borrow

ee
To implement a half sub tractor 5 NAND or 5 NOR Gates are required.
rin
g.n
et
12

3) Full Adder :-
A B C S C
i i1
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1
1
1
ww
0
1
1
1
0
1
0
0
1
1
1
1
w.E
C = Carry input
i
C
i1
= Carry Output asy
S  A B  C
En
C
i1
 AB  BC  AC
i i
gin

4) Full Subtractor:-
ee
To implement full adder using NAND & NOR Gates 9 Gates are required.
rin
A B b
i D b
iH g.n
0
0
0
0
0
1
0
1
0
0
1
1
0
1
1
et
0 1 1 0 1
1 0 0 1 0
1 0 1 0 0
1 1 0 0 0
1 1 1 1 1
D  A B b
i
bi1  AB  Bbi  Abi
 To implement full sub tractor using NAND or NOR Gates 9 Gates are required.
13

Magnitude Comparator
For 2 bit Magnitude comparator
A  A1 A0 ; B  B1B0
A1 A0 B1 B0 A B A B A B
0 0 0 0 0 1 0
0 0 0 1 0 0 1
0
0ww 0
0
1
1
0
1
0
0
0
0
1
1
0
0
0
w.E1
1
1
0
0
1
0
1
0
1
0
0
0
1
0
0
0
1
0
1
1
0
1
0
1
0
0
1
0
0
asy
1
0
1 0 0 1 1 0 0
En
1
1
0
0
1
1
0
1
1
0
1
0
0
1 gin
1
1
1
1
1
1
0
0
1
0
1
0
1
1
1
0
0
0
0
0
0
ee rin
1 1 1 1 0 1
 A  B    A1  B1  .  A0  B0 
0
g.n
 A  B  A B   A
1 1 1
B1  A 0B0 et
 A  B  A B   A
1 1 1
B1  A 0B0
Decoder
2 – 4 decoder
 Active high output

0AB
1AB
2AB
3AB
14

 Active low output
0  A B
1  AB
2  A B
3  AB
 Each output of a decoder with active high output represents a min term & hence it can be used
 ww
to implement any SOP expression.
Each output of a decoder with active low output represents a max term and hence can be used
to implement any POS expression if AND Gate is used and SOP expression if NAND Gate is used.
w.E
Multiplexer
4 – 1 MUX
asy
F  ABI0  ABI1  ABI 2  ABI 3 En
2n  1 MUX requires n – select lines.
gin

ee rin
A 2n : 1 MUX can be used to implement any SOP expression with (n+1) variable with n variables
applied at select lines & n  1 th variable & its complement & 1 & 0 serve as input to MUX.
 
g.n
Sequential Logic Circuits
1) SR Latch
et
S R Q
n1
0 0 Qn
0 1 0
1 0 1
1 1 0
 S=1, R=1 and Qn+1=0 is impractical state
15

2) S R Latch
S R Q
n1
0 0 1
0 1 1
1 0 0
1 1 Q
n
 ww
S=1, R=1 and Qn+1 =1 is impractical state
w.E
3) Clocked SR Flip Flop
asy
En
gin
ee rin


When ClK = 0, the flip flop retains its previous state.
When ClK = 1
g.n
S R Q
n1
et
0 0 Qn
0 1 0
1 0 1
1 1
Ambiguous state
 Characteristics equations : Q  S  R.Q

n1 n
16

4) J – K Flip Flop
To convert SR flip flop to a JK flip flop.

S  j Q ; R  KQ
Characteristics equation
Q  jQ K Q
ww n1 n n
w.E
asy
J
0
K
0
Q
Qn
n1
En
0
1
1
0
1
0 gin
1 1 Q
n
ee rin
5) D – Flip Flop
g.n
et
D Qn+1
0 0
1 1
Characteristics equation Q D
n1
17

6) T – Flip Flop
T Qn+1 Characteristics equation

0
1 ww Qn
Q
n
Q
n1
 TQ
n
w.E
Asynchronous or direct input
asy
CLK P C Q En
0
0
0
1
r
1
0
r
1
0
n1
gin
1 1 1
ee rin
o\p depends on characteristic table of flip-flop
Types of Triggering
g.n
Preset and clear input when enabled set or reset the flip flop irrespective of the state of clock.
1) Level Triggered FF et
2) Edge Triggered FF
a) +ve edge triggered
b) – ve edge triggered
18

 Level triggered FF are called as latch and edge triggered FF are called as Flip Flops.
Race around Condition
 When a FF is in toggle mode, then due to propagation delay of gates involved in

construction of FF, output toggles multiple times instead of once & this is called as Race
around condition.
 This only occurs in level triggered FF.
 To avoid this problem, Master – slave configuration is used.
ww
Note: Whenever a FF is in toggle mode, output frequency is half of input frequency.
Applications of FF
w.E
1) Shift Register
asy
En
gin
ee rin
3 – bit shift Register g.n
Q Q Q  parallel output
2 1 0
P P P  parallel input
2 1 0
et
1) Serial input parallel output (SIPO)
ClK serial i / p Q2 Q1 Q0
0  0 0 0
1 1 1 0 0 Parallel output
2 0 0 1 0
3 1 1 0 1
For n – bit, time taken = nxT T=clock period
19

2) Serial input serial output (SISO)
ClK serial o / p Q2 Q1 Q0
0  0 0 0
1 1 1 0 0
2 0 0 1 0 Serial output
3 1 1 0 1
4   1 0
ww 5    1
w.E
For n – bits, time taken = (2n - 1)T, T = clock period
asy
3) Parallel input parallel output (PIPO)
En
Parallel input can be fed to register using preset enable and for input to propagate to parallel
output, it does not require any clock pulse.
4) Parallel input serial output (PISO)

gin
Suppose P P P  101 2
2 1 0
ee rin
ClK Q2 Q1 Q0 g.n

1
2
1


0
1

1
0
1
Serial output
et
For n – bits, (n-1) clock cycles are required.
20

COUNTERS
Asynchronous Counters
 Different ff are applied with different clocks.

 No. of stages in a counter are called as modules of a counter.
MOD – 5 Counter = 5 Stages
 n
2 N
ww N = no. of bits or no. of flip flop required

N = no. of stages in a counter
w.E
 If MOD – M and MOD – N counter are cascaded, resultant counter is MOD – (MN)
Ripple Counter
asy
En
gin
ClK Q
0 0
2
Q
0
1
Q
0
o
ee rin
1
2
0
0
0
1
1
0
g.n
3
4
0
1
1
0
1
0
et
5 1 0 1
6 1 1 0
7 1 1 1
8 0 0 0
This is a MOD – 8 up counter

In a n – bit ripple counter, propagation delay of each ff is t , then time period of ClK is
pd ff
1 1
t  nt => fClK  , f 
ClK pdff nt max n  t
pdff pdff
21

Note:
i) –ve edge trigger  Q as clock  up counter
ii) +ve edge trigger  Q as clock  up counter
iii) –ve edge trigger  Q as clock  down counter
iv) +ve edge trigger  Q as clock  down counter
BCD Counter (Decade Counter)


ww
4 Flip flops are required.
w.E
asy
En
gin
This counter counts from 0000 – 1001
ee rin
And as soon as count is incremented to 1010, then CLR input of ff is asserted and all ff are reset
to 0 and count again becomes 0000, so this counter counts from 0 – 9.
Ring Counter (Synchronous Counter)

g.n
The last FF output is connected to first FF input. et
22

ClK Q Q Q
2 1 0
0 0 0 0
1 0 0 1
2 1 0 0
3 0 1 0
4 0 0 1
A n – bit synchronous counter has n – status.
ww
Johnson Counter (Twisted Ring Counter)
w.E
asy
En
gin
ClK Q
0
1
0
1
2
Q
0
0
1
Q
0
0
0 ee rin
2
3
1
1
1
1
0
1
g.n
4
5
0
0
1
0
1
1
et
6 0 0 0
A n – bit Johnson counter has 2n states.

T = (2n) TCLK
Synchronous counter design for given sequence
 Suppose counting sequence is 0  3  1  2  0

 Using positive edge triggered D – FF
23

State diagram
ww
w.E
Excitation Table
Present state Next State D1 D0
Q
1
Q
0 Q
1
asy
Q
0
0
1
0
1
1
0
1
1 En 1 1
0 1
0
1
1
0
1
0
0
0
gin 1 0
0 0
D Q ; D Q
1 1 2 1
Q
0
ee rin
g.n
et
24

Conversion of different flip flops
From SR JK D T
Flip Flop Flip Flop Flip Flop Flip Flop
SR FF - S  JQ S=D S  TQ
R=kQ R D R = TQ
JK FF J=S - J=D J=T
K=R K D K=T
D FF - D  TQ
ww
T FF
D  S  RQ
T  SQ  RQ
D  JQ  kQ
T  JQ  kQ T DQ -
w.E
A/D and D/A Converters
Digital to Analog Converter (DAC)
asy
 Resolution
En
gin
The change in analog voltage corresponding one LSB increment in digital input.
 Re solution 
n
V
r
2 1 ee rin
V = reference voltage corresponding to logic 1
r
N = no. of bits g.n
V
analog
 Re solution  Decimal equivalent of binary i / p
et

1
%resolution   100%
n
2 1
 Resolution of R – 2R ladder type DAC is
V
Re solution  r
2n
25

1) Weighted Resister DAC (4 - bit)
ww
w.E V
3 R 3
V
2 2R 2
V
1 4R 1 0 8R
V
I  r b ; I  r b ; I  r b ; I  r b
0
0 3 2 1 0 f 
V
asy
8R f 0 1 
V   I  I  I  I R  r R b  2b  4b  8b
2 3
  En
LSB Resistance = 2n  1 MSB Resistance
2) R – 2R ladder
gin
a) 3 – bit Non – inverting R – 2R ladder
ee rin
g.n
et
 R  V n1  R 
V  1  f  V  r  2i b  1  f 
0  R  x 2n i R 
 1  i0  1 
 Resolution  Decimal  gain
26

b) 3 – bit R – 2R Inverting ladder
ww
w.E
V n1  R 
asy
V  r   2i b 
0
2n
i0  i
f 
i R R 
 En
gin
Analog to Digital Converter (ADC)
a) Counter Type ADC

ee rin
g.n
et

Maximum number of clock pulse required for n – bit conversion is 2n  1 

Maxm Conversion time = 2n  1 T 
CLK
27

b) Parallel Comparator Type

 n 
 2  1  comparators required


 For n – bit 2n resistors required
 n
2  n priority encoder

 This is called as Flash ADC.
ww
w.E
asy
En
gin
ee rin
g.n
et
 Fastest ADC of all
 For SAR & Dual slope ADC, refer EMMI K – Notes.
28

Logic Families
1) RTL (Resistor Transistor Logic)
(Wired AND Logic)
ww
w.E
asy
En (Basic NOR Gate)
gin
A B T
1
T
2
V
0
ee rin
0 0
0 1
cut  off
cut  off
cut  off
saturation
1
0 g.n
1 0 saturation cut  off
1 1 saturation saturation
0
0 et
2) DTL (Diode Transistor Logic)
29

A B T Y
1
0 0 OFF 1
0 1 OFF 1 NAND Gate
1 0 OFF 1
1 1 ON 0
 When all input are high then D & D are reverse biased and D , D . Become forward biased
A B 1 2
ww
and T becomes ON and output becomes low.
1
w.E
3) TTL (Transistor Transistor Logic)
asy
En
gin
ee rin
g.n
T : multi – emitter Transistor
1
A B T
1
T
2
T
3
T
4
Y
et
0 0 A C C S 1
0 1 A C C S 1
1 0 A C C S 1
1 1 A S S C 0
A : Active
C : Cut – off
S : Saturation
30

Microprocessor
The 8085 Microprocessor
 It is an 8 bit up (microprocessor)
 It is an 40 – PIN IC
 Its data – bus has 8 bits
 Its address bus has 16 bits
 It is capable of addressing 64 K of memory
ww
Address Bus:



w.E
It is 16 bits of length
It is unidirectional bus.
It is decided in to 2 parts namely
asy
Lower order address bus  A0  A7   is also called ”Line number “
En
Higher order address bus  A8  A15   is also called “page number “
gin
Interrupts and externally initiated operations: -



ee
The 8085 up has 5 interrupts signals that can be used to interrupt a program execution
rin
It also accepts external interrupts to provide acknowledgement (ack) to the external device.
Here TRAP, RST – 7.5, RST – 6.5, RST – 5.5, INTR are called Hardware interrupts.
1. INTR g.n



It is abbreviated as interrupt request
It is used as general purpose interrupt
It has least or 5th priority
et
 It is a non-vectored interrupt
 Address is provided by user or external device
 It is a level triggered signal.
2. INTA
 It is abbreviated as interrupt acknowledge
 It is an output signal.
3. TRAP
 It has highest priority
 It is the only non-maskable interrupt.
31

 It is a vectored interrupt.
 Also called RST 4.5
 This is both edge and level triggered signal.
 Its vectored address =  0024 H
Trick : since it is a RST – 4.5
Hexa  24  0024
So, 4.5 x 8 = 36 
decimal
 H  H
4. RST – 7.5
ww 

Is has 2 nd highest priority
It is maskable interrupt
It is a vectored interrupt.
w.E



It is edge triggered only
It vectored address =  003C H
5. RST – 6.5

asy
It has 3rd highest priority.
 It is a maskable interrupt.
En


It is a vectored interrupt.
It is level triggered. gin

6. RST – 5.5

It vectored address =  0034 H .
If has 4th highest priority.

ee rin


It is a maskable interrupt.
It is a vectored interrupt. g.n


It is level triggered
Its vectored address =  002C H et
8085 Microprocessor Flags
The flags are affected by the arithmetic and logic operations in the ALU :-
In most of these operations the result is stored in accumulator therefore the flags generally
reflect data conditions in the accumulator with some exceptions. The descriptions and
conditions of the flag as follows:
 Sign flag (S) :- After execution of an arithmetic or logic operation, if bit D 7 of the result (usually
in the accumulator ) is 1, the sign flag is set .
32

 Zero Flag (Z) : - The zero flag is set if the ALU operations result in 0, and the flag is reset if the
result is not 0. This flag is modified by the result in the accumulator as well as in other registers.
 Auxiliary carry flag (AC) : - In an arithmetic operation, when a carry is generated by digit D3 and
passed on to digit D4 the AC flag is set.
 Parity Flag (P) : After an arithmetic or logical, operation, if the result has an even number of 1s,
the flag is set. If it has an odd number of 1s, the flag is reset.

ww
Carry flag (CY) : If an arithmetic operation results in a carry, the carry flag is set; otherwise it is
reset.

w.E
asy
En

gin
Among the five flags, the AC flag is used internally for BCD arithmetic the instruction set does
not include any conditional jump instruction based on the AC flag of the remaining four flags,
ee
the Z and CY flags are those most commonly used.
REGISTERS
rin
g.n
General Purpose
Register (GPR)
B (8 bits)
Special Purpose
Register (SPR) et
C (8 bits ) User Not Accessible
User Accessible
D (8 bits)
→ Accumulator (8 bits) → Temporary Register (8 bits)
E (8 bits)
→SR (8 bits)
H( 8bits) → 1 R (8 bits)
→ PC (8 bits)
L (8 bits)
→SP (8 bits)
→ Increment / decrement
address latch (8 bits)
33

 Possible register pairs are :

 B – C (16 bits)
 D – E (16 bits)
 H – L (16 bits)
 Accumulator (A) : -
 It is a 8 – bits SPR and user accessible
ww
 It acts as one source of operand to the ALU and destinations to the result.
 During I/O data transfer, data is transferred between accumulator (A) and I/O device.

w.E
Status register (SR) :-
asy
 It is also called “ Flag registers”
 It is used to store ALU results
En
 “FLAGS” are used for testing of data conditions
 PSW (program status word) = Accumulator + flag register. Also PSW is a 16 bit register.
 Program counter (PC) :-

gin
ee
 It is a a 16 – bit SPR which is accessible
rin
 It is required to keep track of the address of the next instruction to be fetched from the
memory of execution.
g.n
 In other words we can say, PC provides the address of next instruction to memory which has
to be executed
et
 when a byte is fetched then PC automatically incremented by 1 to point to next memory
location.
 when the microprocessor is reset, the PC sets to 0
 Stock pointer :
It is a 16 bit SPR used as memory pointer SP provides the address of stack top or top address of
stack.
 A memory location in R/W memory is called “STACK”. It is a part of RAM, which is used
during subroutines PUSH and POP operations.
34

Instruction Set:
INSTRUCTION SYMBOLIC FORM EXAMPLE MACHINE T-STATE F LAGS

CYCLE AFFECTED
LXI rP , 16 bit Data rp  16 bit data Lx 1H, 2800 H MC=1+2=3 4T + (3T x 2) = NO FLAGS
10T are Affected
(load register pair rh  8 MSB’s of data i.e. |L| ← [00]
immediately) (H) ← [28]
rl  8 LSB’s of data
ww
LDA address (Load
accumulator direct)
A  address LDA 2400 H 1+3=4 4T + (3T x 3) =
13T
No flags are
Affected
(STORE w.E
STA address
accumulator direct)
|[address]| ← |A| STA 2000H MC=1+2+1
=4
4 T + (2x3T) +
3T = 13T
No flags are
affected
LHLD address (load

H – L pair direct)
asy
L  [|address|] LHLD2500 H MC = 1 + 4 4T + (4 x3T) =
16T – states
No flags are
affected
En
H  [|address + 1|]
=5
SHLD address
(Store H – L pair
 address   L
address  1  H gin SHLD 2500 H MC=1+2+2
=5
4T + (2 x 3T) +
(2 x 3T) =16 T
No flags are
affected
direct)
LDAX rP : (Load
accumulator
A  rp ee
LDAX B MC = 1 + 1
=2
states
4T + 3 T = 7T –
rin
States
No flags are
affected
indirect)
STAXrP : (store rp  A STAXD MC = 1 + 1 g.n
4T + 3T = 7T NO Flags
accumator indirect)
XCHG : (Exchange |H – L| ↔ |D – E| XCHG data

=2
MC = 1
et
4T states
are Affected
No flags are
the content of H – Affected
L pair D – E pair)
35


CYCLE AFFECTED
MOV r1 ,r2 (move r1  r2 MOV A, B 1 MC 4 T - STATE NO FLAGS
the content of one Affected
ww
register into
another register )
MOV r, M
w.E
(Move the content
r  M or
r  H  L
MOV B, M MC = 1 + 1
=2
4T + 3T = 7T No flags
Affected
of Memory to
register) asy
MOV M, r
(Move the content
M  r or
H  L  r En MOV M, C MC = 1 + 1
=2
4 T + 3 T = 7T No flags
affected
of register to
memory)
gin
MVI r, data
(Move immediate
r  data ee MVI A, 05 MC = 1 + 1
=2
4T + 3 T = 7 T
rin
No flags
affected
data to register)
g.n
et
36


CYCLE AFFECTED
MVl M, data H  L  data or LXI H, 2400 H MC = 1+ 1 + 1 4 T + 3T+3T No flags
MVl M, 08 = 10T –states are
(move immediate M  data =3
affected
data to memory) HLT  Halt
ww
ADD r (Add register
to accumulator)
A  A  r ADD B MC = 1 4T states All flags
are
w.E
ADC r : (Add
register with carry
A  A  r  cs ADC B MC = 1 4T – states
affected
All flags
are
to accumulator)
asy affected
ADD M : (add
memory to
A  M
or A  En
H  L 
ADD M MC = 1 + 1 =2 4T + 3 T = 7T
– States
All flags
are
accumulator)
ADC M : (add A  A  M  CS gin ADC M MC = 1 + 1 =2 4T + 3 T = 7T
affected
All flags
memory to
accumulator)
or A  A 
ee
H  L  CS
rin
– States are
affected
ADI data : A  A  data ADl 08 MC = 1 + 1 =2 4T + 3T = 7T All Flags

(Add immediate g.n are
Affected
data to
accumulator)
ACI data : |A| ← |A| + data ACI 08 MC = 1 + 1 =2
et
4T +3T = 7T All flags
+ |cs| are
(add with carry
Affected
immediate data to
accumulator)
SUB r : (subtract |A| ← |A| – |r| SUB 08 MC = 1 4T All flags
register from are
accumulator) affected
37


CYCLE AFFECTED
SBB r : (subtract A  A  r  cs MC = 1 4T All flags
register from are
accumulator with affected
Borrow)
SUB M : (subtract A  A  M MC = 1 + 1 =2 4T + 3T =7T All flags
ww
memory from
accumulator)
or A  A   H  L  states are
affected
w.E
SBB M : (subtract
memory from
A  A  M
or A  A   H  L 
MC = 1 + 1 =2 4T + 3 T = 7T
– States
All flags
are
accumulator alone
with borrow) asy affected
SUI data (subtract

immediate data
A  A  data
En MC = 1 + 1 =2 4T + 3 T = 7T
– States
All flags
are
from accumulator)
SBI data (subtract A  A  data  CS
gin MC = 1 + 1 =2 4T + 3T = 7T
affected
All Flags
immediate from
accumulator with
borrow)
ee rin
are
Affected
INR r (increment
register content by
|r| ← |r| + |01| MC = 1
g.n
4T All flags
are
1)
et Affected
except CY
INR M (increment |M| ← |M| + [01] Or MC= 1+1+1=3 4T+3T+3T All flags
memory content by are
[H – L] ← |[H – L]|+ [01] =10T
1) affected
except CY
38


CYCLE AFFECTED
INX rP : (increment rp  rp  0001 INX H MC = 1 4T All flags
the content of INX SP except CY
register pair by 1) INX C are affected
DCR M : M  M  01 MC = 1 + 1 +1 4T + 3T+3T All flags are
(Decrement the =10T affected
ww
content of memory
by 1)
or H  L  H  L  01 =3
except CY
flag
DCX rP:
w.E
(Decrement the
content of Memory
rp  rp  0001 DCX B
DCX SP
MC = 1 6T No flags are
affected
by )1
asy DCX H
DAA : (Decimal
adjust accumulator
DAA
En MC = 1 4T All flags are
affected
after addition)
DAD rP (Double H  L  H  L  rp gin MC = 1 + 2 =3 4T +(2 x 3T) Only carry
addition register
pair)
ANA r: (And |A|←|A|  |r|
ee MC = 1 rin
= 10T
4T – States
(CY) is
affected
All flags are
register with
accumulator) g.n Affected
AC=1,
ANA M : (And
memory with
|A| ← |A|  |M| MC = 1+1 =2
et
4T+3T=7T -
State
CY= 0
All flags are
affected AC
|A| ← |A|  |[H – L]|
accumulator) =1, CY = 0
39

INSTRUCTION SYMBOLIC FORM EXAMPLE MACHINE T-STATE FLAGS

CYCLE AFFECTED
ANI data : (And A  A  data MC = 1+1=2 4T +3T=7T All flags
immediate data affected AC
with accumulator) = 1, CY =0
ORA r (OR register A  A V M MC = 1 4T All flags are
with accumulator) affected CY
ww
ORA M : (OR A  A VM MC = 2 7T
= 0, AC = 0
CY = 0,
w.E
memory with
accumulator)
AC=0
ORI data (or data

immediate with asy
A  A V data MC = 2 7T CY = 0, AC
=0
accumulator)
XRA r : EXOR A  A V r En MC =1 4T All flags are
register with
accumulator gin affected
and AC = 0,
XRA M : EXOR
memory with
A  A V M ee MC =1
rin 4T
CY = 0
All flags are
affected
accumulator
g.n and AC = 0,
CY = 0
XRI data: EXOR
immediate data
with accumulator
A  A V data MC =2 7T
et All flags are
affected AC
=0, CY = 0
CMA : A  A MC = 1 4T No flags are
(Complement with affected
Accumulate)
CMP r: (Compare |A|←|A| – |r| MC = 1 4T All flags are
register with Affected
accumulator)
40


CYCLE AFFECTED
CMP M : (compare |A| ← |A| – |M| MC = 1+1 =2 4T+3T=7T All flags are
memory with affected
accumulator)
CPI data : (compare A  A  data MC =2 4T +3T=7T All flags
immediate data affected
ww
with accumulator)
CMC : CS  CS MC = 1 4T No flags are
w.E
(complement the
carry status)
affected
except carry
flag
STC (Set carry CS  1 asy MC = 1 4T NO flags
status)
En are affected
except CY
RST n: (Restart)  SP  1   PC gin

H
MC = 1+2=3 6T+(3T x
flag
No flags are
 SP  1  PCL
 SP   SP  2
ee rin
2)= 12T –
states
affected
Push rP: (Push the

PC  8 times
SP  1  rh MC =1+2=3 g.n
6T + (3T x No flags are
content of register
pair to stack)
 SP  2
SP  SP  2
 r
et
2) = 12T –
state
affected
POP rP : (POP the r  sp MC =1 +2=3 10T – state No flags are

content of register rh  sp  1 affected
pair which has
sp  sp  2
been saved from
stack)
SPHL : (move the H  L  SP MC = 1 6T No flags are
content of HL pair affected
to SP)
41


CYCLE AFFECTED
ww
XTHL : (Exchange
stock top with H –
| L | ↔ | SP |
| H | ↔ |SP| +1
MC = 5 4T + (3T x
2) + (3T x 2)
No flags are
Affected
L pair)
w.E
IN Port address : |A| ← |port | MC = 1+1+1
= 16 T
4T+3T+3T= No flags are
(Input to
accumulator from
I/O part)
asy =3
10T affected
Out port address : port   A En MC =3 4T+3T+3T= No flags are

(output to
accumulator to I/o gin 10T affected
part)
HLT : (Halt) HLT
ee MC = 1
rin 5 T – state No flags are
affected
PCHL :(jump to PC  H  L MC = 1 g.n

6T – state NO flags
address specified
by H – L pair)
Unconditional
PCH  H
PCL  L
MC = 1+2=3
et
4T+(2 x3T)=
are affected
JMP instruction 10T –states
RLC : (Rotate accumulator left)
Symbolic form :  n1    An 

A 
 A    A7 
 0
CS   A7 
The content of the accumulator is rotated left by one bet
42

RRC : (Rotate accumulator right)
Symbolic form : A7   A0 
CS  A0 
 An   An1 
ww
The content of the accumulator is rotated right by one bit
RAL : (Rotate accumulator left through carry)
w.E
Symbolic form :  n1    An 
A 
asy
CS   A7 
 A   CS 
En
 0
gin
The content of the accumulator is rotated left one bit through carry.
RAR : - (Rotate accumulator right through carry)
Symbolic form :
ee
 An   An1 
CS  A0  rin
 A   CS 
 7
g.n
The content of the accumulator is rotated right one bit through carry.
Conditional JMP instruction : -

et
OPCODE Operand Description
JC 16 – bit jump on carry (if result generate CY = 1)
JNC 16 – bit jump on carry (cy = 0)
JZ 16 – bit jump on zero (if result generate or Z = 1)
JNZ 16 – bit jump one no zero (Z = 0)
43

JP 16 – bit jump on plus (if D7 = 0, s =0)
JM 16 – bit jump on minus (if D7 =1 and S = 1)
JPE 16 – bit jump on even parity (p = 1)
JPO 16 – bit jump on odd parity (P = 0)
ww
Unconditional CALL instruction :
w.E
When it is executed, microprocessor will store address of next instruction is STACK
MC = 1 + 2 + 2 = 5
asy
6T + (3T x 2) + (3T x 2) = 18T – states
No flags are affected
Conditional CALL : En
gin
CC call subroutine if carry flag is set (CY =1)
ee
CNC call subroutine if carry flag is reset (CY = 0)
CZ call subroutine if zero flag is set (z = 1)

rin
CNZ call subroutine if zero flag is reset (z = 0)
CM call subroutine if sign flag is set (s =1, negative number) g.n

CP call subroutine if sign flag is reset (s =0, positive number)
CPE call subroutine if parity flag is set (P =1, even parity)

et
CPC call subroutine if parity flag is reset (P =0, odd parity)
Unconditional RET instruction :
It will change program – sequence from subroutine to main program.
MC = 1 + 2 = 3
4T + (3T x 2) = 10T – states
No flags are affected.
44

Conditional RET instruction :
RC Return if carry flag is set (CY =1)
RNC Return if carry flag is reset (CY = 0)
RZ Return if zero flag is set (z = 1)
ww RNZ Return if zero flag is reset (z = 0)
RM Return if sign flag is set (s =1, negative number)
w.E RP Return if sign flag is reset (s =0, positive number)
asy
RPE Return if parity flag is set (P =1, even parity)
RPC Return if parity flag is reset (P =0, odd parity)
En
RST n : (restart)
Symbolic form : [(Sp – 1) ← [PC]H]

gin
(Sp – 2) ← (PC)L
(Sp ) ← (Sp – 2)
ee rin
[PC] ← 8 times n g.n
MC = 1 + 2 =3
6 T + (3T x 2) = 12 T – states
et
No flags are affected
45

ww
w.E
asy
En
gin
eer
ing
.ne
t

Measurement & Instrumentation

State characteristics of measuring system
1) Accuracy
Degree of closeness in which a measured value approaches a true value of a quality under
measurement .
When accuracy is measured in terms of error :
 Guaranteed accuracy error (GAE) is measured with respect to full scale deflation.
 Limiting error (in terms of measured value)
wwLE 
GAE * Fullscaledeflation
Measuredvalue
w.E
2) Precision
asy
Degree of closeness with which reading in produced again & again for same value of input
quantity.
3) Sensitivity En
gin
Change the output quantity per unit change in input quantity.
qo
4) Resolution
S
qi
ee rin
Smallest change in input which can be measured by an instrument
g.n
5) Threshold
Minimum input required to get measurable output by an instrument et
6) Zero Drift
Entire calibration shifts gradually due to permanent set

7) Span Drift
If there is proportional change in indication all along upward scale is called span drift.
ww
8) Dead zone & Dead time
w.E
The range of input for which there is no output this portion is called Dead zone.
To respond the pointer takes a minimum time is called dead time.
TYPES OF ERROR asy

En
a) Gross Error : Error due to human negligency, i.e. due to loose connection, reading the value
etc.
gin
b) Systematic error : Errors are common for all observers like instrumental errors,
ee
environmental errors and observational errors.
rin
c) Random errors : Error due to unidentified causes & may be positive or negative.
Absolute Errors :
A  Am  Ar
g.n
Am  Measured value et
Ar  True value
Relative Errors :
AbsoluteErrors  A
r = 
Truevalue AT
Am
 A  A  A 1 
1 r  T T m r

Composite Error :
i) Sum of quantities
X  X1  X2
x    x1  x2 
ii) Difference of quantities

X  X1  X2
x    x1  x2 
ww
So for sum & difference absolute errors are added.
w.E
iii) Multiplication of quantities
X  X1  X2  X3
X
X
 X X X 
  1  2  3 
 X1 X2 X3  asy
iv) Division of quantities
X En
X 1
X2
gin
X
X
 X
 X1
X 
  1  2 
X2  ee rin
So, for multiplication & division, fractional or relative errors are added.
X1m Xm2 g.n

If X 
X  X
Xp3
X X 
  m 1  n 2  p 3 
et
X  X1 X2 X3 
Precision Index
Indicates the precision for a distribution
1
h
2

Probable Error
r = 0.6745 
0.4769
r
h
Standard deviation of combination of quantities
2 2 2
 X  2  X  2  X  2
x    x1    x2  ......    xn
 X1   X2   Xn 
wwProbable Error
w.E
rx  
2
 X  2  X  2
 rx1  
 X1 
2
 rx2  ......  
 X 2 
2
 X  2
 rxn
 Xn 
asy
Electro-Mechanical Instruments
En
1) Permanent magnet moving Coil (PMMC)
Deflecting Torque
Td = nIAB gin
Where n = no. of turns
I = current flowing in coil

ee rin
A = Area of coil g.n
B = magnetic flux density
G
et
Deflection   I
k
G = NBA & K = Spring constant
 Eddy current damping & spring control torque in used.

 For pure AC signal, the pointer vibrates around zero position.
 It is used to measured DC or average quantity.
 It can directly read only up to 50mV or 100mA.

Enhancement of PMMC
i) Ammeter
For using PMMC as an ammeter with wide range, we connect a small shunt resistance in
parallel to meter.
I
 m  multiplication factor
Im
ww
w.E
Basically, ‘m’ is ratio of final range (as an ammeter) to initial range of instrument.
R sh 
Rm
; R m = meter resistance
m  1 
asy
ii) Voltmeter
En
gin
A series multiples resistance of high magnitude is connected in series with the meter.
M = multiplication factor
m
V
Vm
ee rin
R s  Rm m  1  g.n
Sensitivity of voltmeter
Rs  Rm   / V
et
1
Sv  
Ifsd V
Application of PMMC
1) Half wave rectifier meter

I
I  Iavg  m


2VRMS

Rs  Rm  Rf  
0.45VRMS
 Iavg   ; For Ac input
R s  R m  R f 
For DC input
VDC
 Iavg  
Rs  Rm  Rf 
ww  I 
avg AC  0.45 Iavg
DC
(Assuming VDC  VRMS )
w.E (Sensitivity)AC  0.45(Sensitivity)DC
2) Full wave rectifier meter
 Iavg  2 2VRMS
asy
AC

Rs  Rm  2R f  
En

0.9VRMS
Rs  Rm  2R f  gin
 Iavg DC 
VDC
Rs  Rm  2Rf 
ee rin
 Iavg   DC (Assuring V
 0.9 Iavg RMS  VDC ) g.n
et
AC
Sensitivity AC  0.9 Sensitivity DC
2) Moving iron meter
1 2 dL
Deflecting torque, Td  I
2 d
I = current flowing throw the meter
L = Inductance
 = deflection
Under steady state

1 2 dL
K  I
2 d
  I2
 MI meter measures both ac & dc quantities. In case of AC, It measures RMS value.
1
1 T  2
IRMS    i2  t  dt 
T 0 
 If i  t   I0  I1 sin wt  I2 sin2wt  .......
ww IRMS  I20 
1 2 2
2
 I1  I2  ....... 
w.E
 Air friction Damping is used
 Condition for linearity

dL
d
 cons tant
asy
En
 MI meter cannot be used beyond 125Hz, as then eddy current error is constant.
3) Elector dynamometer
gin
Deflecting Torque, Td  i1 i2
For DC, i1  i2  I
dM
d ee rin
Td  I2
dM g.n
  I2
d
et
For AC, i1  Im1 sin t
i2  Im2 sin  t  
dM
Tdavg  I1I2 cos 
d
Im1 I2
Where I1  & I2 
2 2

Applications of dynamometer
1) Ammeter
Fixed coils are connected in series.
I1  I2  I
0 (Angel between I1 & I2 )
dM
Td  I2
d
At balance, Tc  Td
ww K  I2
dM
w.E   I2
d
asy
It reads both AC & DC & for AC it reads RMS.
En
gin
2) Voltmeter
Rs  Series multiplier resistance

ee rin
I2  I1 
V
Rs
, 0 g.n
cos   1 et
V 2 dM
Td 
R 2s d
At balance, Td  Tc
V 2 dM
K     V2
R s2 d
It reads both AC & DC & for AC it reads RMS.

3) Wattmeter
Fixed coils carry same current as load & as called as current coils.
Moving coil is connected across voltage and thus current  voltage, a high non-inductive
ww
load is connected in series with MC to limit the current.
w.ETd  I1 I2 cos 
dM
d
I
V
Rs
cos 
d

asy
dM Pavg dM
R s d
At balance, k  Td En
  Pavg gin
Symbol : ee rin
g.n
Two wattmeter method et
W1  VRY IR cos  VRY & IR 
 VL IL cos 30   
W2  VBY IB cos  VBY & IB 
 VL IL cos 30   
Where VL is line to line voltage

IL is line current
These expression remain same for  -connected load.
P3  W1  W2
 3VL IL cos 
Q3  3  W2  W1 
 3VL IL sin 
Q3 3  W2  W1 
ww tan  
P3

 W1  W2 
w.E  3  W2  W1  
  tan1  
  W1  W2  
for lag load
 3  W2  W1  
   tan1  
  W1  W2   asy for lead load
En
= Remember, In our case W1 is wattmeter connected to R-phase and W2 is wattmeter
connected to B-phase.
gin
Errors in wattmeter
ee
= If one of the wattmeter indicates negative sign, then pf < 0.5
rin
a) Due to potential coil connection
g.n
% r 
IL2rc
PT
* 100 et
IL = load current
rC = CC Resistance
PT = True Power
V2
% r  * 100
R sPT
V = voltage across PC

Rs = Series multiplier resistance
PT = True Power
b) Due to self inductance of PC
If PC has finite inductance
 
Zp  Rp  R s  jwLp
Rp  R s Zp  R s  jwLp
ww
% r  tan  tan *100
w.E
 = load pf angle
  tan1 
  Lp 
 Rs 



asy
4) Energy meter En
Energy = Power * Time gin
WT 
VIcos 
*
1000 3600
t
kwhr ee rin
WT = True energy
g.n


It is based on principle of induction.
It is an integrating type instrument.
t
et
 Wm  VIsin     * kwhr
3600
Where Wm = measured Energy
 = angle between potential coil voltage & flux produced by it.
 = load pf angle
 Error = Wm  WT
No.of Re voluations N
 Energy constant = 
kwhr P.t
Totalno.ofrevolutions
 Measured Energy = Wm 
K

VI cos  t
 True Energy = WT  * kw.hr
1000 3600
W  WT
 Error = % r  m * 100
WT
Creeping Error in energy meter
 If friction is over compensated by placing shading loop nearer to PC, then disc starts rotating
slow with only PC excited without connecting any load is creeping.
 Otherwise if over voltage is applied on pressure coil then also creeping may happen due to
 ww
stray magnetic fields.
To remove creeping holes are kept on either side of disc diametrically opposite & the torque
w.E
experienced by both holes is opposite & they stop creeping.
% creeping error =
TotalNo.of Re w / kwhr due to creeping
TotalNo.of Re w / kwhr due to load
* 100
Thermal Instruments asy


En
These instruments work on the principle of heating and are called as Thermal Instruments.

 They can measure both AC & DC. gin
These are used for high frequency measurements.
 In case of AC, they measure RMS value.

ee rin
Electrostatic voltmeter
1 2  dc  g.n
Deflecting torque, Td 
At Balance,
2
V  
 d 
et
Td  Tc
1 2 dc
V  k
2 d
  V2
Condition for linearity

dc
  cons tant
d
For increasing the range, we connect another capacitor in series
To increase the range from Vm to V
Cm V
Cs  ; m
m  1  Vm
ww
Potentiometer / Null Detector
w.E Iw = working current
Iw 
VB
Rh  l.r asy
_____________(1)
Switch at (A) En
If Ig  0 gin
Vs  I w l1r ee rin
Vs
Iw 
l1r
_____________(2)
g.n
Switch at (B)
Vx  I w l2r
et
Vx
Iw  ________(3)
l2r
Vs Vx

l1r l2r
l2
Vx  Vs
l1

r = resistance of slide wire (Ω/ m)
l = Total length of slide wire (m)
l1 = length at which standard cell ( Vs ) is balanced
l2 = length at which test voltage ( Vx ) is balanced
Measuring a low resistance
ww
w.E
R
VR
Vs
S
asy
Instrument Transformer
En
 Current transformer
Equivalent circuit gin
ee rin
g.n
et
N2
Turns Ratio = Nominal Ratio  n 
N1
 X  Xs 
  tan1  l 
 Rl  R s 
I cos   I sin 
R = Actual Ratio  n 
Is

Errors in current transformer
1) Ratio Error :
Ip
Current ratio is not equal to turns ratio due to no-load component of current.
Is
K R
% r  * 100
R
K = n = Nominal Ratio
R = Actual Ratio
ww
2) Phase Angel Ratio :
Ideally, Phase difference between Ip & Is should be 1800 but due to no-load component of
w.E
current, it deviates from that value.
Phase angle error =  

I cos   I sin  180
* degrees
asy nIs
Phase angle between primary & secondary currents

En
= 180    degrees
 Potential Transformer
gin
Equivalent circuit
ee rin
g.n
Turns Ratio = n =
N2
N1
VP
et
Actual Transformation Ratio = R =
VS
1  IS  X 
R  n  RP cos   XP sin    I RP  I XP  , Where   tan1 
R 
VS  n   
 IS 
  XP cos   RP sin    I XP  IRP 
Phases angle error    n 
 nVs 
 
 

AC & DC Bridges
 AC Bridges
Balance condition : ID  0
Z1 Z 4  Z2 Z3
 Z1 Z 4  Z 2 Z3
  1  4     2  3 
Z 2 Z3
  2  3  4 
ww
Z1 
Z4
w.E
Quality Factor & dissipation factor
Quality Factor (Q) Dissipation Factor
1 asy Q
wL
D
(D)
R
En R wL
2 gin Q
R
D
wL
ee wL
rin
R
3
Q
1
wCR g.n D =wcR
4 Q = wcR et D
1
wCR
Measurement of Inductance
(i) Maxwell’s Inductance Bridge

Here, we try to measure R1 & L1

R2R3
R1 
R4
L2L3
L1 
R4
(ii) Maxwell’s Inductance Capacitance Bridge
R2R3
R1 
R4
ww L1  R2R3C4
w.E
This bridge is only suitable for coils where 1 < Q < 10
Q = Quality Factor
(iii) Hay’s Bridge

asy
Used for coils having high Q value
R1 
R 2R 3R 4 2 C24
En
1
1 
Q
2
gin
L1 
R 2R3C 4
1 
1
2
ee rin
Q
1
Q
g.n
R 4 C 4
(iv) Anderson’s Bridge

et
This Bridge is used for low Q coils.
R2R3
R1   r1
R4
CR3
L1  R  R 4  r  R2R3 
R4  2 

(v) Owen’s Bridge
R3C 4
R1 
C2
L1  R 2R3C4
Measurement Of Capacitance

ww
De-Sauty’s Bridge
r1  R2  r2 
R3
 R1
w.E
C1 
R4
C2
R4
R3
D = dissipation factor
asy
= C1r1
En
r1 = internal resistance of C1
gin
 Schering Bridge
R1 
R3C 4
C2
ee rin
C1 
R 4 C2
g.n
R3
dissipation factor = D = C4R 4 et
Measurement of frequency
 Wien Bridge Oscillator
Balancing Condition
R3 R1 C2
 
R4 R2 C1
Frequency of Osculation
1
f
2 R1R2C1C2

Measurement of Resistance
Classification of Resistance
1) Low Resistance : R ≤ 1Ω , Motor and Generator
2) Medium Resistance : 1Ω < R < 100kΩ , Electronic equipment
3) High Resistance : R > 100 kΩ, winding insulation of electrical motor
DC Bridges
ww
Medium Resistance Measurement
1. Wheatstone Bridge
w.E
asy
En
gin
Finding Theremin Equivalent ee rin
Vth
Ig 
R th  R g g.n
VTh  V 
 P

R 

P  Q R  S 
et
PQ RS
R Th  
PQ R S
For Balance Condition

Ig  0
 VTh  0
 PS = RQ

Sensitivities

1) Current sensitivity , Si  mm/mA
Ig
 = deflection of Galvan meter in mm

2) Voltage sensitivity, S   mm/V
VTh

3) Bridge Sensitivity , SB  mm
 R /R 
VThS v
ww SB 
 R / R 
w.E SB 
V.S v
R  S 2
S R 
For Maximum Sensitivity
R S = 1 asy
S R
SB, max 
V.S v En
4
gin
2. Carey –foster slide wire Bridge
r = slide wire resistance in 
ee
m .
rin
for case (1).
At balance g.n
P

R  1r
Q S  L  1  r
For case (2)
………….(1)
et
R & S is reversed
P S  2r
 ………..(2)
Q R  L  2  r
From (1) & (2)
R 1r S 2r

S  L  1 r R  L  2 r

3. Voltmeter Ammeter Method
a) Ammeter near the load

Vv
Rm   RX  RA
IA
Vv = voltage across voltmeter
I A = Ammeter current
R X = Test resistance, R A = Animator resistance
ww % error =
Rm  R T
RT
 100 
RA
Rx
 100%
w.E
b) Voltmeter near the load
Vv VX
Rm  
IA IX  Ivasy
Rm 
1
IX I v

En R XR v
RX  Rv

VX VX
gin
% error =
Rm  R X
RX
 100%
ee
If R X  R aR v , voltmeter is connected near the load rin
R X  RaR v , ammeter is connected near the load g.n
4. Ohmmeter et
a) Series Type
when R X  0
Im  IFSD = Full scale deflection

when R X  
Im  0 = zero deflection
for Half scale deflection
 R .Rm 
R X  Rh  R se   sh
 R  Rm 
 sh 

b) Shunt Type
RS = current limiting resistor
If R X  0
Im  0 = zero deflection
If R x  
Im  IFSD = Full scale deflection
For Half scale Deflection
RmRS
R x  Rh 
ww Rm  R S
w.E
Measurement of Low Resistance
 Kelvin’s Double Bridge Method

Unknown resistance asy
P
R  S
Q
qr  P p 
  
pqr Q q En
P, Q = outer ratio arms
p, q = inner ratio arms
gin
S = standard resistance
r = lead resistance
ee rin
R = Test resistance
g.n
High Resistance Measurement
 Loss of charge Method

et
t
VC  t   Ve Rc
0.4343t
R
 V 
C log10  
 VC 
t = time in (seconds)
V = source voltage
VC = Capacitor voltage

Cathode Ray Oscilloscope (CRO)
 The velocity of e is charged by charging the pre-accelerating & accelerating anode

potential
KE =PE
1
mv 2  qVa
2
2qVa

m

wwDeflection sensitivity
w.E
asy
En
gin
D = deflection height on screen
d = distance between plates
ee rin
d = length of vertical deflecting plates
L = distance between centre of plate & screen g.n
Va = anode potential
Vy = Vertical plate Potential et
L d Vy
D V
2dVa mm
deflection sensitivity
D L d
S  V
Vy 2dVa mm
Lissajous Pattern
If both horizontal & vertical deflection plates of CRT is applied with the sinusoidal signal,
the wave form pattern appearing on screen is called Lissajous Pattern.

Case – 1: Both signals have same frequency

Vx  Vm sin  w x t 

Vy  Vm sin w y t   
Vx  Vy  Vm
wx  w y  w
 = variable
S.No  Lissayous Pattern
1
ww
w.E   0 or 360
2
asy
En
0    90
Or
gin
270    360
3
ee rin
  90 or 270
g.n
4
90    270
et
Or
180    270
  180

 Finding 
1) Lissajous Pattern in Ist & IIIrd Quadrant
X  1  Y1 
  sin1  1   sin  
X
 2   Y2 
for clockwise orientation phase difference = (180 –  )
for anti-clockwise orientation
2) Lissahous Pattern in IInd & IVth Quadrant
ww X 
  180  sin1  1 
 X2 
w.E Y 
 180  sin1  1 
 Y2 
asy for clockwise orientation
for anti-clockwise orientation = 360   
En
Case – 2
wx  w y gin
Vx  Vm sinwx t
Vy  Vm sinwy t
ee rin
wy
 
wx fx
fy
Number of horizental tangencies
Number of vertical tangencies g.n
et
fy 4
 2
fx 2

Digital Meters
Type of converter Maximum Conversion Time

1) Dual slope ADC 2n1 Clocks
2) Successive Approximation Register (ADC) n Clocks
3) Counter ADC 2n Clocks
4) Flash ADC 1 Clock
 Dual slope A/D Converter

Va = analog input
ww VR = Reference input
VR
w.E Va 
T1
T1  2n TCLK
 T2  T1 
asy
Maximum conversion time = 2n1 TCLK
En
 Successive Approximation Register
Suppose = VREF  1a V gin
and Va = 12V
D3 D2 D1ee D0
rin
T1
10
1
5
0
2.5
0
1.25
0  10V < 12V g.n
T2
T3
T4
1
1
1
0
0
1
0
0
 15V > 12 V
 12.5 > 12 V
et
1 0 0 1  11.25 < 12 V
 In first clock cycle, MSB is set to get voltage corresponding to the digital o/p
 If V0 < Va , then in next cycle next bit is set else,
 If V0 > Va , MSB is reset & next bit is set
 We continue the same process till we reach LSB.

Specifications of Digital Voltmeter

1) Resolution
The smallest value of input that can be measured by digital meter is called resolution.
1
R
10n
n = No. of full Digits (0, 1,….., 9)
2) Sensitivity
S = Resolution x Range
3) Over – Ranging
The extra 1
ww 2 digit is called over-ranging
If n = 3, we can measure from 0 – 999
w.E Resolution , R 
1
103
 0.001
if n  3 1 digit, 1 digit can be 0 & 1.

2
asy 2
we can measure from 0 – 1999
En
Resolution, R 
1
2000
 0.005
if 3
gin
4 digit is there than MSB can be 0 – 3.
4) Total Error
ee
Error = (% error in reading) x reading + (NO. of counts) 
Full Scale
rin
Range of meter
Q – meter / Voltage Magnifier g.n

 If works on the principal of series resonance.
At series resonance
et
XL  XC
V
I
R
VC  IX C
XC XL
V V
R R
VC = V. Q
VC  Q

 Practical Q-meter
Also includes series resistance of source (oscillator)
ww True Q T 
wL
R
wL wL QT
w.E
Measured Q, Qm 
R  Rsh 



R  

R  
R 
R  1  sh   1  sh 
R 
asy
 R 
Q T  Qm  1  sh 

En R 
 Measurement of unknown capacitance

gin
Test capacitance is connected at T3 & T4 .
Circuit is resonated at C = C1
fr = 1
ee ………(1) rin
2 2  C1  CT 
C T = Test Capacitance
g.n
 C T is removed & circuit is resonated at C = C2
1
et
fr = ………(2)
2 LC2
from (1) & (2)
CT  C2  C1
 Measurement OF self Capacitance

 Resonance is achieved at C = C1
1
fr1 
2 L  C1  Cd 

At C = C2 , resonance is achieved at fr2

1
fr2  = n fr1,
2 L  C2  Cd 
C1  n2C2
Cd 
n2  1
ww
w.E
asy
En
gin
ee rin
g.n
et

ww
w.E
asy
En
gin
ee rin
g.n
et

Contents

Network Elements .................................................................................. 3
Graph Theory .......................................................................................... 9
Circuit Theorems ................................................................................... 11
ww
Transient Analysis ................................................................................. 15
w.E
Sinusoidal steady state analysis ............................................................ 19
Resonance............................................................................................. 23
asy
Circuits analysis in Laplace domain ....................................................... 25
En
Two Port Network ................................................................................. 26
gin
Magnetically coupled circuits................................................................ 29
ee
Three Phase Circuits.............................................................................. 31
rin
Electrical & magnetic fields ................................................................... 33
g.n
et

Network Elements
Active & Passive Elements
If any elements absorb, dissipate, waste, convert electrical energy it is called as passive element.
Eg. Resistor, Inductor, Capacitor.
If any elements energize, deliver, give out, drive the electrical energy it is called as active element.
Eg. BJT, MOSFET.
Network Technologies
Node : It is a point of interconnection or junction between two or more components.
ww
Branch : It is an elemental connection between two nodes.
Mesh: A mesh is a close path which should not have any further closed path in it.
w.E
Loop : All possible close path.
Ohm’s law
asy
At constant temperature and for uniform cross section of conductor.
J  E
σ= conductivity, En

1

 resistivity . gin
V  IR
R
l
A
ee
Circuit Symbol:
rin
l  lenght of conductor
A = Area of conductor.
g.n
Conductance of circuit elements is
et
1
G
R
Sign Convention
To apply ohm’s law, we must apply following sign convention.

Short circuit & open circuit

Voltage across terminals of a short circuit is always zero, regardless of the value of current which
could be any value. (R = 0)
The current through an open circuit is always zero, regardless of voltage across the terminals
which could be any value. R   
Power of resistor
V2
P  VI   I2R
R
Resistance always absorbs or dissipates power.
ww
Kirchoff’s laws

w.E
Kirchoff’s current law(KCL)
It states that any instant the algebraic sum of current leaving any junction (or node) in a network
is zero.
asy
In other words, current entering a node is equal to current leaving the node.
n in  t   0 En
 ientering   ileaving gin
i1  i3  i5  i2  i4
ee rin
 Kirchoff’s voltage law (KVL) g.n
et
It states that any instant the algebraic sum of the voltage around any closed path (or loop) within
a network is zero. In other words, the sum of voltage drops is equal to sum of voltage rises.
 V t  0
n
n
 Vdrop   Vrise
V1  V2  V3  V4  V5  0

Series resistance or voltage division

Two or more circuit elements are connected in series means that current through all elements in
same. If ‘N’ resistors, with resistance R1 ,R2 ,........Rn are connected in series
R eq  R1  R 2  ...................RN
V R1 
V1 
R1  R 2
V R 2 
V2 
R1  R 2
ww
w.E
Parallel resistance or current division
Two or more circuit elements are connected in parallel means that voltage across all elements is
1

1

1
 ........... 
1 asy
same. If ‘N’ resistors are connected in parallel R1 ,R 2 ,............RN
R eq R1 R 2
I R 2 
RN
En
I1 
R1  R 2 gin
I2 
I R1 
R1  R 2 ee rin
Star Delta Conversion
g.n
Start to Delta
et
R1R 2  R1R 3  R 2R 3
Ra 
R1
R1R 2  R1R 3  R 2R 3
Rb 
R2
R1R 2  R1R 3  R 2R 3
Rc 
R3

Delta to start conversion

RbR c
R1 
R a  Rb  R c
R aR c
R2 
R a  Rb  R c
R aR b
R3 
R a  Rb  R c
ww
Sources
Independent Voltage Source
w.E
An ideal independent voltage source maintains a specified voltage across its terminals. The
voltage is independent of current flowing through it.
Independent current source

asy
An ideal independent current source maintains a specified current to flow through it. The current
En
through this is independent of voltage across it.
Dependent Source
gin
ee
Voltage controlled voltage source (VCVS) ; V  AVX
Current controlled voltage source (CCVS) ; V  AiX
Voltage controlled current source (VCCS) ; i  AVx rin
Current controlled current source (CCCS) ; i  Aix
g.n
Capacitor
et
A capacitor is a combination of a two conducting plates separated by a non-conducting material.
Capacitance is donated by ‘C’
A
C
d
ϵ= Permittivity of medium
A = Area of Plates
D = distance between the plates.
Charge on Plates, Q = CV
V = Potential difference between the plates.

Voltage Current relationship
dq  t 
i t 
dt
dv  t 
i t  C
dt
Sign Convention
Energy Stored in a capacitor
ww  
1
E  cv 2  t  
Q t
2
1
 Q t v t 
w.E
2 2C
Properties of ideal capacitor

2
 asy
If voltage across capacitor is constant (dc) then current through capacitor is zero & it acts as open
circuit.
En dv  t 

gin
The voltage across capacitor must be continuous, if it as discontinuous, then i  C
so voltage across capacitor cannot change instantaneously.

dt
is infinite,

ee
A capacitor never dissipates energy, it only stores energy.
rin
g.n

Capacitor in series & parallel
In ‘n’ capacitors are connected in series C1 ,C2 ,.............Cn

et
1
Ceq 
1 1 1
  .................
C1 C2 Cn
 If ‘n’ capacitors are connected in parallel, C1 ,C2 ,..........................Cn

Ceq  C1  C2  .......................  Cn
In series connection, charge is same whereas in parallel connection voltage is same.

Inductor
It is a two terminals element consisting of winding of ‘N’ turns.
  N2 A
L 0 r
l
 0 = Permeability of free space
r  relative Permeability
N = number of turns
A = area of cross section of coil
l = length of inductor
ww
Current voltage relationship
di  t 
w.E
v t  L
dt
L is constant, called as inductance
Energy Stored asy

1
 
E  L i t
2
2
En
gin
Like, Capacitor, inductor also stores energy but in electro-magnetic terms.
Series & parallel Connection ee

If ‘n’ inductors L1 ,L2 ,...............,Ln are connected in series then rin
Leq  L1  L2  .............  Ln
g.n
In ‘n’ inductors are connected in parallel L1 ,L2 ,.............Ln
1

1

1
 ............. 
1
et
L eq L1 L 2 Ln
In series connection current in same, through all elements & in parallel connection voltage is same
across all elements.
Duality
Two circuits N1 & N2 are called dual circuit if the branches KCL, KVL & branch v - i relationship
becomes respectively KVL, KCL.

Dual Elements
Resistance R Conductance GR
Capacitance CF Inductance L=CH

Inductance LH Capacitance C=LF
Open Circuit Short Circuit
Short Circuit Open Circuit
Voltage Source VS Current Source I  VS
Current Source IS Voltage Source V  IS
ww Series Connection
Parallel Connection
Parallel Connection
Series Connection
w.E Eg.
asy
En
gin
Graph Theory
Network Graph:
ee rin
If all elements of a circuits are replaced a line segment between 2 end points called as nodes.
g.n
et
Directed Graphs:
If the branches of a graph has directions then it is called as a directed graph.

Sub graph
It consists of less or equal number of verticals (nodes) & edges, as in its complete graph.
True & Co-tree
ww
A connected sub-graph of a network which has its nodes same as original graph but does not
contain any closed path is called tree of network.
w.E
A tree always has (n - 1) branches.
Eg. The following trees can be made from graph shown before.
asy
En
gin
ee rin
g.n
et
The set of branches of a network which are remove to form a tree is called co-tree of graph.
Twigs & Links

The branches of a tree are called as its twigs & branches of a co-tree are called as chords or links.
10

Incidence Matrix
The dimension of incidence matrix is (nxb)
N = no. of nodes
B = no. of branches
It is represented by A
aij = + 1 , If jth branch is oriented away from ith node
aij = -1 , If jth branch is oriented into ith node.
aij = 0 , If jth branch is not connected to ith node
 a b c d e f
ww 
1 1 0 1
A  2  1 1
0 0 1
0 1 0 0

w.E
3 0
4  0
1 0 0 1 1 

0 1 1 1 0 
asy
If one of nodes is considered as ground & that particulars row is neglected while writing the
incidence matrix, then it is reduced incidence matrix. Order  n  1   b
 En
Number of trees of any graph  det  Ar  Ar  
T

Ar = reduced incidence matrix
gin
Circuit Theorems
Linearity
ee rin
A system is linear if it satisfies the following two properties.
g.n
1. Homogeneity Property
et
It requires that if input is multiplied by constant hen output is multiplied by same constant.
eg. V = IR
is I becomes KI
V’ = KIR = KV
So, resistance is a linear element & so are inductor & capacitor.
2. Additivity Property
It requires that response to sum of inputs is sum of response to each input applied separately.
V1  I1R
V2  I2R
If we apply I1
 I2 
We get V3   I1  I2  R  V1  V2
11

Superposition
It states that, in any linear circuit containing multiple independent sources, the total current
through or voltage across an element can be determined by algebraically adding the voltage or
current due to each independent source acting alone with all other independent source set to
zero.
Source Transformation
It states that as independent voltage source VS in series with a resistance R is equivalent to
independent current source IS  Vs / R in parallel with a resistance R.
ww Or
An independent current source IS in parallel with a resistance R is equivalent to a dependent
source VS  ISR in series with a resistance R.
w.E
asy
En
Thevenin’s Theorem
gin
It states that any network composed of ideal voltage and current source, and of linear resistor,
with an equivalent resistance R TH .

ee
may be represented by an equivalent circuit consisting of an ideal voltage source VTH in series
rin
Methods to calculate thevein equivalent
g.n
The therein voltage  VTH  is equal to open circuit voltage across load terminals.
et
Therein resistance is input or equivalent resistance at open circuit terminals (load terminals) when
all independent source are set to zero (voltage sources replaced by short circuit & current source
by OC)
Case – 1 : Circuit with independent sources only
12

To calculate VTH , open circuit of RL
ww
Using sources transformation
w.E
asy
En
gin
ee rin
VTH 
2
22
 24  12V
g.n
To calculate Rth
Short I & V sources & open 6mA source
et
R th  1  2 1  1  2k
13

Case – 1 : Circuit with both dependent & independent sources
Methodology 1:
 VTh can be found in same way.
 For R TH set all independent sources to zero.
 Remove load & put a test source Vtest across its terminals, let current through test source is Itest .
Vtest
 Thevenin resistance , R TH 
Itest

ww
This method is must if independent sources are absent.
Methodology 2:


w.E
VTH is calculated in same way.
For R TH short circuit load terminals & leave independent sources as it is


Obtain ISC through load terminals.
R TH  VOC ISC asy
En
Norton’s Theorem
gin
Any network composed ideal voltage & current sources, and of linear resistors, may be
equivalent resistance R N .
ee
represented by an equivalent circuit consisting of an ideal current source IN in parallel with an
rin


RN  R TH
g.n
To calculate IN we short circuit load terminals & calculate short circuit current.
 Therein equivalent & Norton equivalent are dual of each other.
et
14

Maximum Power Transfer Theorem:

A load resistance RL will receive maximum power from a circuit when load resistance is equal to
Thevenin’s/ Norton’s resistance seen at load terminals.
RL  R Th
In case of AC circuit, this condition translates to
ZL  Z*th
 But if load is resistive in AC circuit then
RL  Z Th

ww
w.E For maximum power transfer
asy RL  R2Th   XL  X Th 
2
En
gin

ee For maximum power transfer
XL  XTh  0 rin
g.n
et
Transient Analysis
Time Constant :
It is the time required for the response to delay by a factor of 1 e or 36.8 % of its initial value.
It is represented by τ.
For a RC circuit
  RC
For a RL circuit
  LR
R is the therein resistance across inductor or capacitor terminals.
15

General method of analysis
       
x t  x    x t0  x   e  o  , t  0
  t t 
If switching is done at t=t0
 
x t0  initial value of x  t  at t  t0
x     final value of x  t  at t  
Algorithm
ww
1. Choose any voltage & current in the circuit which has to be determined.
2. Assume circuit had reached steady state before switch was thrown at t  t0 . Draw the circuit at
w
    .E
t  t 0 with capacitor replaced by open circuit and inductor replaced by short circuit. Solve for
v C t0 & iL t0 .

3. Voltage across capacitor asyand inductor current cannot change instantaneously.
   V t   V t 
VC t 
0 C

0
i t   i t   i t 
C 0
En
L

0 L

0 L 0
gin
4. Draw the circuit for t  t  with switches in new position. Replace a capacitor with a voltage source
    ee    
VC t0  VC t0 and inductor with a current source of value iL t0  iL t0 . Solve for initial value
of variable x  t  .
0 rin
5. Draw the circuit for t   , in a similar manner as step-2 and calculate x    .
g.n
Calculate time constant of circuit
6. τ=Rth C or τ=L/Rth
et
7. Substitute all value to calculate x(t).
Example
In the circuit shown below, V1  t  for t > 0 will be given as
16

Solution
Step 1 :
For t < 0
30u  t   0 & 3u  t   0
 
V1 0  0V
For t  
V1     3mA  10k
ww = -30 V
w.E
Step 2 :
At t  0
V1  0   30
 3mA 
V1  0 
asy
0
3
20k
V1  0   1.5mA
10k
En
20k
V1  0   10V
gin
V1  t   30   10  30  e
R TH  30k ;   R THC  0.3s
t
t

ee rin
V1  t    30  20e 


0.3
u t V

g.n
Series RLC circuit
Without Source
et
0
1
V 0   i  t  dt  V0
C 
i  o   I0
By KVL
di  t  1
t
Ri  t   L   i  t  dt  0
dt C 
Difference both sides
d2 i  t  R di  t  1
  i t  0
dt 2
L dt LC
17

Substitute i  t   Aest

Aest S2  R s  1
L LC 0  S2  R s  1  0
L LC
2 2
R  R R 
S1   R    1 , S2     1
2L  2L  LC 2L  2L  LC
1
S1 ,S2     2  w 02 ;   R 2L ; w 0 
LC
ww
1. If   w0 roots are real & unequal (over-damped)
w.E
i  t   Aes1t  Bes2t
2. If   w0 , roots are real & equal (critically damped)
i  t    A  Bt  et
asy
3. If   w0 , roots are complex conjugate (under-damped)
i  t   et  A cos wdt  Bsinw dt  En

wd  w20  2 gin
Calculate A & B using initial conditions.
With a Source
ee rin
v  t   VS  Ae
s1t
 Be
s2t
(Over-damped)
v  t   VS  A  Bt  et (Critically damped)

g.n
 
v  t   VS A cos wdt  Bsinwdt et under  damped et
Parallel RCL Circuit
Without Source
0
1
i 0   v  t  dt
L 
v  0   V0
By KCL
1 1
t dv  t 
v  t    v    d  C 0
R L  dt
18

Characteristics equation
1 1 1 1
s2  s 0 ;  , w0 
RC LC 2RC LC
S1 ,S2    2  w02
v  t   Ae 1  Be  over  damped
st S2t
v  t    A  Bt  et  critically damped
v  t   et  A cos wdt  Bsinwdt  under  damped
ww
 w 
With a step input
i  t   Is  Ae 1  Be
.E st S2 t
Over  damped
asy
i  t   Is   A  Bt  et Critically damped
i  t   Is   A cos wdt  Bsinwdt  et Under  damped

En
Steps:
gin
1. Write differential equation that describe the circuit.
ee
2. From differential equation model, construct characteristics equation & find roots.
rin
3. Roots of characteristics equation determine the type of response over-damped, critically damped
& under-damped.
4. Obtain the constant using initial conditions.
g.n
Sinusoidal steady state analysis
et
Lagging & Leading
We can compare the phases of two sinusoids provided that
 Both V1  t  & V2  t  are expressed in form of either sine function or cosine function.
 Both V1  t  & V2  t  are written with positive amplitude though they may not have same amplitude.
Both V1  t  & V2  t  have same frequency.
19

If V1  t   A sinwt
V2  t   Bsin  wt    ;   00
V2  t  leads v1  t  by an angle 
V1  t  lags v 2  t  by an angle 
PHASORS
A phasor is complex number that represents the amplitude & phase angle information of a
ww
sinusoidal function.
v  t   Vm sin  wt   
w.E
Phasor representation, V  Vrms
magnitude  Vrms
phase  
asy
Networks Elements
En
1. Resistor
V  RI
gin
2. Inductor
ee rin
V   jl I
  2f ; f  frequency of source g.n
3. Capacitor
I   j c  V
et
Impedance & Admittance
V Vrms
Impedance , Z      v  i 
I Irms
Unit of impedance  ohm   
Z  R  jX  Z 
R = resistive component
X = relative component
20

Phase angle,   tan1 X  R

Z  R2  X2
For Resistor ZR  R
For Inductor ZL  jL
1 j
For Capacitor Z C  
j L c
Inductive reactance, XL  L
ww
Capacitive reactance, XL 
1
c
w.E
If X = 0, impedance is resistive; current & voltage are in same phase.
If X > 0, impedance is inductive; current lags voltage.
If X < 0, impedance is capacitive; current leads voltage.
Admittance, Y 
1
Z
 G  jB asy
G = Capacitance
B = Susceptance En
 Series combination gin
Impedance in AC circuits behave like resistance in DC circuits and all the laws remain same like
Zeq  Z1  Z2  ................  Zn ee rin

 Parallel combination
1

1

1
 ...................... 
1 g.n
Z eq Z1 Z 2
Yeq  Y1  Y2  .........  Yn
Zn
et
 Star-delta conversion also remain same here.
Circuits analysis in AC domain
1. Identify the sinusoidal source & note the excitation frequency.

2. Convert source to phasor form.
3. Represent each circuit element by its impedance.
4. Solve circuits using circuit techniques (nodal analysis mesh analysis etc.)
5. All circuits’ theorems are applicable here as well
21

Power analysis
Real Power
P  VrmsIrms cos  v  i 
In a resistance
Vrms
2
P  Irms
2
R
R
Complex Power
*
S  VrmsIrms
ww
 Vrms Irms   v  i 

Real part of S  P  Vrms Irms cos v  i 
w.E
Real part of S  Q  Vrms Irms sin  v  i 
Reactive Power = Q
Q = 0 for resistive loads. asy
En
Q < 0 for capacitive loads  v  i  .
Q > 0 for inductive loads  v  i 

gin


power. ee
If the current goes into an element, then it absorbs power and if current comes out it delivers
rin
Hence, a capacitor absorbs leading reactive power. We can also say it delivers lagging reactive
power.

g.n
Same way, inductor absorbs lagging reactive power & delivers leading reactive power.
Power Factor
pf 
P
 cos  v  i 
et
S
  v  i  power factor angle
If   0 , power factor is lagging
If   0 , power factor is leading
If   0 , power factor is unity
22

Resonance
Series resonance
For resonance
Im  Z   0
Z  R  j L  1 c 
1
L  1   rad s
c LC
ww
The frequency at which impedance of circuits is purely resistive is called resonant frequency.
1
w.E
0 
LC
At resonance
rad s
I 
VS
R asy
VR  IR  VS
En
VL  joL I  joL 
 VS
R




 gin
Vc 
j
0c
I
 j  VS

oC  R




ee rin
At   0 ; XL  XC , net reactance is capacitive so circuits operates at leading pf.
g.n
At   0 ; XL  XC , net reactance is zero, so circuits operates at unity pf.
At   0 ; XL  XC , net reactance is inductive, so circuits operates at lagging pf.

et
Bandwidth: range of frequency for which power delivered to R is half of power at resonance.
Bw  R L
Quality factor
1 2 1 2
I XL I XC
Re active power 2 2
Q  
Average power 1 2 1 2
I R I R
2 2
XL XC 1 L
Q  
R R R C
23

Parallel Resonance
1
Y1   j C
R j L
At resonance
Im  Y   0
1
o  rad s
LC
ww
At resonance V  IS R
IR  IS
w.E
IL 
V IR
 S
j0L j0L
IC  V  j0C   ISR  j0C 

asy
En
Bandwidth 
1
RC
gin
Quality factor, Q 
Re active Power
Average Power
ee rin
V
2 XC
2
V
2 XL
2
R R C
g.n
Q
V
2R
2

V
2R
2

XL

XC
R
L
et
24

Circuits analysis in Laplace domain

For basic of laplace transform, refer to signal & system k-notes. Laplace transform.
Resistor
V(s)  RI(s)
ww
Inductor
w.E
asy
En
gin
Capacitor
sL ee
V(s)  sL  I(s)  Li(0 ) Or I(s)  V(s)  i(0 )

rin
g.n
et
1 V(0  )
I(s)  C sV(s)  V(0  ) Or I(s)  I(s) 
sC s
Methodology
1. Draw circuit in s-domain by substituting s-domain equivalent for each circuit element.
2. Apply circuit analysis to obtain desired voltage or current in s-domain.
3. Take inverse Laplace transform to convert voltage and current back in time-domain.
25

Two Port Network

Impedance Parameters
V1  Z11 I1  Z12 I2
V2  Z21 I1  Z22 I2
 V1   Z11 Z12   I1 
In matrix form    
 V2   Z 21 Z 22  I2 
V1
Z11   open circuit input impedance
I1
ww
Z12 
V1
I2 0
 open circuit transfer impedance form part 1 to part 2
w.E I2
V2
I1 0
Z 21 
I1 I2 0 asy
 open circuit transfer impedance form part 2 to part 1.
Z 22 
V2
En
 open circuit output impedance
I2 I1 0
gin
Admittance parameters
I1  y11 V1  y12 V2
ee rin
I2  y 21 V1  y 22 V2 g.n
In matrix form,
 I1   y11 y12   V1 
et
   
I2   y 21 y 22   V2 
I1
y11  = short circuit input admittance.
V1 V2 0
I1
y12  = short circuit transfer admittance from part 1 to part 2.
V2 V1 0
26

I2
y 21  = short circuit transfer admittance from part 2 to part 1.
V1 V2 0
I2
y 22  = short circuit output admittance.
V2 V1 0
1
 y11 y12   Z11 Z12 
y 
 21 y 22   Z 21 Z 22 
ww
Hybrid parameters
w.E
V1  h11 I1  h12 V2
I2  h21 I1  h22 V2
In matrix form,
 V1  h11 h12   I1  asy
   
 I2  h21 h22   V2 
En
h11 
V1
I1
= short circuit input impedance. gin
h12 
V1
V2
V2 0
= open circuit reverse voltage gain.

ee rin
I2
I1 0
g.n
h21 
I1
I2
V2 0
= short circuit forward current gain.
et
h22  = open circuit output admittance.
V2 I
1 0
Inverse hybrid parameters
 I1  g11 g12   V1 
   
 V2  g21 g22   I2 
1
g11 g12  h11 h12 
g g22  h21 h22 
 21
27

Transmission parameters
V1  AV2  BI2
I1  CV2  DI2
 V1   A B   V2 
 I    C D   I 
 1   2
V1
A = open circuits voltage ratio
V2 I2 0
V1
ww B
I2
I1
V2 0
= negative short circuit transfer impedance.
w.E C
V2 I2 0
= open circuit transfer admittance.
D
I1
I2 V2 0
asy
= negative short circuit current ratio.
Symmetrical & Reciprocal N/w

En
For a reciprocal 2-part Network:
Z12  Z21
gin
Y12  Y21
h12  h21
ee rin
AD  BC  1
g.n
g12  g21
For a symmetric 2-part network:

et
Z11  Z22
Y11  Y22
h11h22  h21h12  1
A=D
g11g22  g21g12  1
28

Interconnection of 2-part networks
 For a series connection of two networks Na & Nb having z-parameters metric  Z a  &  Zb 
Z   Z   Z 
 eq   a   b 
Z – Parameter matrices are added.

ww
For a parallel connection of two networks Na & Nb having y-parameter matrices  ya  &  yo 
w.E
 yeq    ya    yb 
Y – Parameter matrices are added.
asy

En
For a cascade connection of two networks Na & Nb having transmission parameters matrices
 Ta  & Tb 
gin
Teq    Ta  Tb 
Transmission parameter matrices are multiplied.

ee rin
g.n
Magnetically coupled circuits et
If change in flux of one coil induces a voltage in second coil then both coils are said to be
magnetically coupled.
di1  t 
v 2  t   M21
dt
di2  t 
v1  t   M12
dt
M12  M21  M
29

Dot convention
If a current enters the dotted terminals of one coil, then induced voltage in second coil has a
positive voltage reference at dotted terminal of second coil.
If a current enters undotted terminals of one coil, then induced voltage n second coil as a positive
voltage reference at undotted terminals of second coil.
ww
w.E
asy
Series connection of coupled coils
Leq  L1  L2  2M En
gin
Leq  L1  L2  2M ee rin
Parallel connection of coupled coils g.n
et
L1L 2  M2 L1L 2  M2
L eq  L eq 
L1  L 2  2M L1  L 2  2M
M
Coefficient of coupling k 
L1L2
30

Equivalent circuits of linear transformers
T-equivalent circuit
ww
La  L1  M
Lb  L 2  M
w.E
LC  M
π- equivalent circuit
asy
LA 
L1L 2  M
L2  M
2
En
LB 
L1L 2  M2 gin
LC 
L1  M
L1L2  M2
M
ee rin
g.n
Three Phase Circuits
Balanced three phase system et
A system in which all three voltage have equal voltage magnitude and are phase displaced by
1200 with respect to each other.
Positive Sequence (abc)
Van  VP00
Vbn  VP  1200
Vcn  VP  240  VP1200
31

Negative Sequence (acb)
Van  VP00
Vcn  VP  1200
Vbn  VP  2400  VP1200
For both phase sequence,
ww Van  Vbn  Vcn
w.E
Connections
Star Connection
asy
En
gin
ee rin
VL  3VP 300
IL  Ip g.n
Vab = line to line voltage or line voltage
Vab  Van  Vbn  3VP 300

et
So, line voltage Vab , Vbc , Vca are 3 times the phase voltage & lead the respective phase voltage
by 30 0 .
Line currents Ia , Ib , Ic in this connection are equal to phase currents.
Phase current are the currents that flow in individual phases.
32

Delta Connection
VL  VP
IL  3IP   300
ww
w.E
Line current is 3 times phase current & lags respective phase current by 30 0 .
Power in a balanced 3   system
P  3VL IL cos   3VP IP cos 

asy
Q  3VL IL sin   3VP IP sin  En
S  3VL IL *  3VP IP* gin
ee
For power measurement, refer to electrical measurements k-notes, two wattmeter method.
rin
Electrical & magnetic fields g.n
Coulomb’s law et
Coulombs law states that magnitude of force between two point charges is directly proportional
to square of distance between them & direction of force is along the line joining the charges.
Q1 Q2
F 2
aˆR
4  R
or ; o  8.854  1012 F m = permittivity of free space
r = relative permittivity or dielectric constant.
33

Electric field intensity

F Q
E  aˆR
q 4  R 2
Electric field direction is away from a positive charge & towards negative charge.
Charge densities
1) Linear charge density

It is denoted by '  ' . It is equal to charge per unit length.
q
   c m
ww 2) Surface charge density

l
w.E It is denoted by '  ' . It is equal to charge per unit area.

q
c m2 
3) Volume charge density
A
asy
En
It is denoted by '  ' . It is equal to charge per unit volume.

q
V
c m3
gin

1) Infinite line charge

ee
Electric field due to continuous charge distribution
rin
E ˆ
a g.n
Electric field intensity at a distance ‘r’ from a line charge of linear charge density 

2) Infinite sheet charge

2o r r
et
Electric field at a distance ‘h’ from an infinite charged sheet with charge density  is

E aˆ ; aˆ n  Normal unit vector
2 n
3) Conducting sphere
If a conducting sphere of radius ‘R’ is charged with a charge ‘Q’ then electric field.
0 r R

E Q
 r R
 4  r2
Electric field inside conducting sphere is zero.
34

Electrical potential
The amount of work done in bringing a unit positive charge from infinity to a certain point in an
electric field is called electric potential.
A
VA   E.dL

E  V
 = represent gradiant
ww
For vector operations, refer engineering mathematics k-notes.
w.E
Electric Flux Density
D  E
Electrical flux    D.dS

S
asy
SI unit of electric flux is coulomb. En
Gauss’s law gin
surface.
ee
It states that total electric flux through any closed surface is equal to charge enclosed by that
rin
S D.dS  b dV g.n
By Gauss’s Divergence theorem
.D  
et
Magnetic flux Density
Magnetic flux per unit area is called magnetic flux density. It is a vector quantity and denoted by
B & its unit is tesla (T).
Flux    B. dS
35

Magnetic field intensity
Represented by H .
B  H
 = permeability.
  or
r = relative permeability
o = permeability of free space
ww o  4  107 H m
w.E 
Biot – Savart’s law
d H
4 R
I
2
dL  aˆR
asy
Magnetic field due to infinite line current
En H
I
aˆ 
gin 2
 = perpendicular distance of point from line current.
ee
â = Unit vector in cylindrical co-ordinates.
rin
Ampere’s Circuital law
g.n
et
It states that line integral of magnetic field intensity H around any closed path is exactly equal to
net current enclosed by that path.
 H . dL  I enclosed
 H . dL   J . ds
By stokes theorem
 H  J
36

Maxwell equations
d B
1)  E . dL  dt 
B . dS or  E 
t
1
2)  E . dS    dv or  . E  
3)  B . dS  0 or .B 0
d
4)  B . dL  0  J . ds  o o dt  E . ds
or
ww 
  B  o  J  o

E 

t 
w.E 
asy
En
gin
ee rin
g.n
et
37

https://t.me/abcdelectrical Downloaded From : www.EasyEngineering.net
ww
w.E
asy
En
gin
ee rin
g.n
et

Contents

Power Semi-Conductor Devices .............................................................. 3
Phase Controlled converter .................................................................. 10
ww
Chopper ................................................................................................ 15
w.E
Inverters................................................................................................ 21
asy
AC - AC Converters ................................................................................ 26
En
gin
ee rin
g.n
et

Power Semi-Conductor Devices
Properties of ideal switch
1. Conduction state , VON  0,    ION  

2. Blocking state , VOFF  0,    VOFF  
3. Ideal switch can change its state instantaneously TON  0 , TOFF  0
4. No power loss while switching.
5.
ww
Stable under all operating conditions.
1.
w.E
Classification of switches
Uncontrolled switch (Passive switch)
asy
Switching state cannot be controlled by any control signal E.g. Diode
2. Semi-controlled switch
En
gin
Only one switching state can be controlled by an external control signal. E.g. SCR
3. Fully controlled switch

ee rin
If both switching states can be controlled by switchable control signal. E.g. BJT, MOSFET.
Other Classification
g.n
1. Unipolar switch
The switch can block only one polarity of voltage when it is in OFF state.
et
2. Bipolar switch
This switch can block both polarity of voltage when it is in blocking state.
3. Unidirectional switch
This switch can carry current in only one direction when it is in conduction state.
4. Bidirectional switch
This switch can carry current in both the directions when it is in conduction state.

Ideal characteristics of power semiconductor switches
Device Characteristic
Diode
BJT
ww
w.E
MOSFET
asy
En
IGBT
gin
SCR
ee rin
g.n
GTO
et
TRIAC

Power loss in a switch
1) The average power has in a switch is given by

1 T
P   vidt
T o
Where v = instantaneous voltage
i = instantaneous current
ww
2) If the device is modeled as a resistance, as in case of a MOSFET
P  Irms
2
R ON  Vrms
2
R ON
w.E
3) If the device is modeled as a voltage source.
P  V Iavg
Silicon Controlled Rectifier asy

En
gin
ee rin
g.n

 In forward conduction mode, J2 breakdown, J1 , J3 are forward biased.
et
In forward blocking mode, J1 , J3 are forward biased and J2 is reverse biased.
 In reverse blocking mode, J1 , J3 are reverse biased & J2 is forward biased.
Latching Current
This is the minimum value of anode current above which SCR turns ON. This is related to
minimum gate pulse width requirement for SCR.
Holding current
Minimum value of anode current below which SCR turns OFF.

 di 
Slope of characteristics =  
 dt 
If ta  trr
Area under the curve = QR
1
QR  IRM trr
2
 
IRM  di dt trr
ww   QR 
1 di 2
2 dt
trr

w.E
Device & Circuit Turn-off time
Device turn off time, tq  trr  tgr
asy
trr = reverse recovery time
t gr = gate recovery time

En
Circuit turn-off time  t c  is the time period for which communication circuit applies reverse
 For successful communication, tc  tq gin

voltage across SCR after anode current becomes zero.
Turn-ON methods of SCR
1) Forward voltage triggering

ee rin
If VAK  VBO , then J2 breakdown & SCR conducts. This can damage the SCR.
g.n
2)
dV
dt
Triggering
Ic  C j
dv
, if
dv
et
is high, charging current increase and SCR conducts when Ic  Ilatching .
dt dt
3) Light Triggering
If light is incident on J2 , charge carriers are generated and J2 starts conducting.
4) Thermal Triggering
When temperature is increased then charge carriers are generated & SCR conducts.
5) Gate Triggering
By applying gate pulse in SCR, VBO is lowered and SCR can easily conduct.

Static V-I characteristics of SCR
ww
w.E
Communication of thyristor
asy
Communication is defined as process of turning OFF the thyristor.
Types of Commutations:
En
1. Natural or line communication
gin
ee
In this case nature of supply supports the commutation.
E.g. Rectifier, AC voltage controllers, Step-down cyclo-converters.
rin
2. Forced Commutation
1) Class A commutation
g.n
 Circuit should be under-damped.
et
4L
 R2  for damped oscillations.
C
1 R2
 Ringing frequency, r   2
LC 4L

 Thyristor conducts for a period of =
r

2) Class-B commutation or current commutation
a)  ITM peak  Io
C
b)  ITA peak  Vs
L
 IP
c) Time required to turn OFF TM after TA ON

I 
  LC  LC sin1  o 
 Ip 
ww  
d) Conduction time of TA   LC
e) tCM 
w.E CVR
Io
= circuit turn off time


I
Where VR  VS cos sin1  o
 Ip
 asy
 
 
 
Other Implementation En
 I
tCM     2 sin1  o

  LC
gin
  Ip
  
Rest all parameters remains same.

ee rin
g.n
3) Class-C commutation or Impulse commutation
et
V 2V 
  I T1 peak  S  S 
 R1 R 2 
V 2V 
  I T2 peak  S  S 
 R 2 R1 
 tC1  R1 ln2 
 tC2  R 2 ln2 

Class-D commutation or voltage commutation
C
  ITM peak  Io  VS L
  ITA peak  Io
  TON min for TM   LC
CVs
 tCM 

ww Io
Conduction time of TA  2tCM 

2CVs

w.E
 VO avg 
VS
Io
 TON  2tCM  , T = Switching internal

T
Thermal Protection of SCR

asy
 jc = Thermal resistance b/w J & C En
CS = Thermal resistance b/w C & S gin
SA = Thermal resistance b/w S & A
Unit of   0 C / w
ee rin
In electrical circuit representation g.n
et
TjA = Temperature difference b/w J & A

Phase Controlled converter

Form factor
V
FF  or
Vo
Vor : rms value of output voltage.
Vo : Average value of output voltage.
RF =
ww
Ripple Factor
FF2  1
w.E
Distortion factor
V
DF  01
Vor
asy
V01 : rms value of fundamental components of Vo
Vor : rms value of output voltage.En
Total harmonic Distortion gin
THD 
1
DF2
1 ee rin
Single phase half wave uncontrolled rectifier
g.n
VO
R – load
Vm

RL – Load
Vm
2
1  cos  
L – Load
0 et
IO Vm Vm Vm
1  cos  
R 2R L
ϒ      2
IO max  
2   2 ,  
 = Extinction angle, Angle at which ω goes to zero.
 If a free-wheeling diode is connected across the load (RL) that behaves as R-load as output
voltage goes to zero after t   when FD conducts.
10

Single phase half wave controlled rectifier

i) R – load
Vm
 VO avg 
2
1  cos  
Vm
 IO avg 
2R
1  cos  
Vm2  sin2 
 Vor       
ww 4  2 
Vor
2
R Vor

w.E
Input power factor =
VS IS
Vm

VS
 α = firing angle
VS 
asy 2
ii) R – L load En
 Voavg 
Vm
2
 cos   cos   gin
 Io avg 
Vm
2R
 cos   cos   ee rin
 Vor 
2 
Vm
     12  sin2  sin2 
g.n
 Circuit turn off time, t c 
 2   

et
Single phase full – wave rectifier
11

1 1
full converter Semi converter
VO 2Vm Vm

cos 

1  cos  
IS1 2 2 2 2
Io I cos 
  O 2
IS Io 
IO

ww DF 2 2

2 2
   
cos 
2
w.E DPF
IPF
cos  cos 
2
asy 2 2

cos 
2
   
1  cos  
En
gin
DPF: Displacement power factor = cos  angle b w VS & IS1 
IS1 = fundamental components of IS

IPF: Input power factor
IPF = DPF x DF
ee rin
DF: Distortion factor
g.n
In case of continuous conductions, outgoing thyristors stop conduction before incoming
thyristor start
Load 1 1

et
Full converter Semi – converter
R – load V V
Vo  m 1  cos   Vo  m 1  cos  
 
R – L load V V
Vo  m  cos   cos   Vo  m 1  cos  
 
RLE – load V  1
Vo   m  cos   cos    E         Vo   Vm 1  cos    E       
   
12

Three phase half wave controlled rectifier
3Vml
Vo  cos 
2
Vml : Peak value of line voltage
1
1 3 3  2
Vor  Vmp   cos2 
ww  2 8 
w.E
Vmp : Peak value of phase voltage
Three phase full wave rectifier

asy
En
gin
ee rin
g.n
et
13

3 3
Full converter Semi converter
Vo 3Vml 3Vml

cos 
2
1  cos  
Vor 1 3 3 Expression varies for   600 &   600
Vml  cos 2
2 4 For   600 , it becomes 3-pulse converter.
IS1

6
IO
6
 O
I cos  
2
ww
IS 2
3
IO IO


DF
w.E 3

6
   
cos 
2
DPF
IPF
cosα
3
asy cos 
2

cos 
En 6
   x
cos2 
2
gin
IS1 : Fundamental rms value of source current
IS : rms value of source current

ee rin
Effect of source inductance
g.n
Assuming source inductance equal to L S .
Due to source inductance, there is an overlap b/w incoming and outgoing thyristor, given by
et
overlap angle    .
For 2-pulse converter
2Vm L
VO  cos   S IO
 
Vm
VO  cos   cos      
  
Displacement power factor = cos     

 2
14

For 6 – pulse converter
3Vm 3LS
VO  cos   I
  O
3Vm
VO  cos   cos      
2  
Displacement power factor = cos     

 2
ww
w.E
Chopper
asy
En
Buck Converter
gin
When CH is ON  o  t  DT 
Voltage across inductor VL   VS  VO 

ee rin
When CH is OFF (DT < t < T)
Voltage across inductor VL  VO g.n
Applying volt-sec balance across inductor
 VS  VO   DT   VO   T  DT  0
et
 VS  VO  D  VO 1  D   0
VO  DVS
TON
D = duty cycle =
T
Where T = switching period = 1
f
f = switching frequency
15

 Average output voltage = DVS

 rms output voltage = DVS
 Average source current = DIO
 Average current of FD = 1  D  IO
Ripple in output current
ww
When CH is ON  0  t  DT 
VL  VS  VO  1  D  VS
w.E
During this period, since voltage is positive current increase from minimum value to maximum
value.
i  Imax  Imin
t  DT  0  DT
asy
 i  
1  D  V En
L
DT
D 1  D  VS
S
gin

i 
fL ee rin
This formula gives approximate value of output ripple current for maximum ripple, D = 0.5
 imax 
VS
g.n
 Imax  IO 
IL
2
4fL
et
I
 Imin  IO  L
2
Critical Inductance (LC)
Value of inductance at which inductor voltage waveform is just discontinuous.
Lc 
1  D  R
2f
16

Critical Capacitance (CC)
Value of capacitance at which capacitor voltage waveform is just discontinuous.
1
CC 
8fR
Step-up chopper (Boost converter)
ww
when CH is ON  0  t  DT  ,
when CH is OFF DT  t  T  ,

VL  VS
VL   VS  VO 
w.E
asy
VS DT    VS  VO  1  D  T  0
VO 
VS
1  D  En
 Since D < 1, VO  VS gin
 when CH is ON  0  t  DT  ,
when CH is OFF DT  t  T  , IC  IL  IO
ee
IC  IO
rin
Applying Ampere  sec balance across capacitor
IO DT    IL  IO 1  D  T  0
g.n
IL 
IO
1  D 
et
Ripple in inductor current
When CH is ON  0  t  DT  , current increase from Imin to Imax
iL VS DT  DVS

L  VS  iL  
DT L fL
17

Ripple in output voltage
when CH is ON , IC  IO
VC
C.  I O
DT
IO DT 
VO  VC 
C
ww
-ve sign indicates voltage decrease
IO DT 
w.E
 VO 
C
Critical Inductance (Lc)

asy
I
IL  L
2 En
LC 
D 1  D  R
gin
2f
Critical Capacitance (Cc)

ee rin
VO 
VO
2
g.n
CC 
D
2fR
et
If inductor also has an internal resistance, then
 1  D  
VO  VS  
 r  1  D  
2
 R 
r = internal resistance of inductor
R = load resistance
18

Buck-Boost Converter
When CH is ON (O < t < DT)

VL  VS
I C  I O
When CH is OFF (DT < t < T)
VL  VO
ww IC    IL  IO 
w.E
VS DT   VO 1  D  T  0
VO 
DVS asy
1  D 
En
Applying Ampere-sec balance across inductor
gin
IO DT    IL  IO  1  D  T  0
I O
ee rin
IL 
1  D 
g.n
IL 
 VO
R 1  D 

DVS
R 1  D 
2 et
Ripple in inductor current
Inductor current increase from Imin to Imax
IL
L  VS
DT
DVS
IL 
fL
19

Ripple in output voltage

Capacitor discharge & voltage decrease from Vmax to Vmin
CVO
 I O
DT
DIO
VO 
ww fC
w.E
Critical inductance (Lc)
IL 
IL
2 asy
R 1  D 
2
En
LC 
2f
gin
Critical capacitance (Cc)
ee rin
VO 
VO
2 g.n
CC 
I O 1  D  T
2VS
et
If internal resistance (r) of inductor is also considered then
 D 1  D  
VO    VS
 r  1  D  
2
 R 
R = load resistance
20

Inverters
Inverters circuits will convert DC power to AC power at required voltage & required frequency.
Classification
1) Voltage source Inverter

 Input source is a voltage source.
 Switching device is bidirectional & unipolar.
 Load voltage depends on source voltage & load current depends on load parameters.
ww
2) Current source Inverters
w.E
 Input source is a current source.
 Switching device is bidirectional & bipolar

Single phase half bridge VSI asy

Load voltage depends on source current & load voltage on load parameters.
When S1 is ON, VO  0, IO  0 En
When S2 is ON, VO  0, IO  0
gin
When D1 is ON, VO  0, IO  0
When D 2 is ON, VO  0, IO  0
ee rin

V
The output voltage is a square wave of amplitude dc
2 g.n
 The fourier series of output voltage is given by
VO  

n1,3,5
2Vdc
n
sin nt 
et
 rms value of fundamental components is given by
 2V  1 2
Vor1   dc    V
   2  dc
Vdc
 rms value of output voltage Vor 
2
Vor1 2 2
 Distortion Factor(DF) = 
Vor 
1
 % Total Harmonic Distortion THD   1 = 48.43%
DF2
21

 If load power factor is lagging, then it requires forced commutation.

 If load power factor is leading, then natural commutation occurs.
Single phase Full Bridge VSI
When S1 , S2 conduct VO  0, IO  0
When D1 , D 2 conduct, VO  0, IO  0
ww
When S3 , S 4 conduct, VO  0, IO  0

w.E
When D3 ,D 4 conduct, VO  0, IO  0
The output voltage is a square wave of amplitude Vdc


asy
The fourier series of output voltage is given by
 4Vdc
VO  
En
n1,3,5 n
sin nt 
Vor1 
2 gin
rms value of fundamental components is given by
 rms value of output voltage

Vor1
 dc
2 2
ee
Vor  Vdc
rin
 Distortion Factor(DF) =
Vor


g.n
 % Total Harmonic Distortion THD 
1
DF2
 1 = 48.43%
et
Three phase full bridge VSI
22

1800conduction mode
In this mode, each switch will conduct for a period of 1800 and phase displacement between
any two poles is 1200
 Phase voltage
2
V 
ph rms  V
3 dc
ww
VRN  
 2Vdc
n
sin nt 
w.E n6k 1
 VR1  = rms value of fundamental component of V RN
VR1 
2Vdc
 asy
Distortion factor, DF 
VR1

Vph,rms 
3
En
1 gin
THD 
DF2
 1  100  31%
ee rin
 Line voltage
g.n
 VL L rms  2
V
3 dc
et
4Vdc
 3  sinn  t   6 

VRY   sin n
n6k 1 n
6
 VRY 1 = rms value of fundamental component of V RY =  VRY  
1 
Distortion factor = 3

In each phase, each switch conducts for 1800 out of 3600
Io, rms 2Vdc Vdc
 Ir.rms    , Where R = load resistance
2 3R  2 3R
23

Voltage Total RMS Fundamental RMS

Phase 2 2
Vdc Vdc
3 
Line 2 6 V
Vdc  dc
3
 This conversion from total rms to fundamental rms can be performed by multiplication of

ww
3  DF .

This conversion from phase to line voltage can be performed by multiplication of 3.
w.E
1200conduction mode
asy
For each thyristor, conduction angle is 1200 & last 60 0 for commutation.
 Phase Voltage
V 
Vdc En
ph rms



6
2Vdc

sin n    
g ine
sin nt  n 
VRN 
n6k 1
6
n 3
e 6
rin
VR1  V
 dc
Distortion factor, DF  3
g.n
THD = 31%

et
 Line Voltage
Vdc
 VL RMS 
2
3Vdc
 

 VRY    n
sin n t  
3
n6k 1
3
 VRY 1  Vdc
2
24

Distortion factor, = 3 ; THD  31%


In each, phase each switch conducts for 1200 out of 3600
Io, rms Vdc
I T , rms  
3 2R
R = load resistance
Voltage Total RMS Fundamental RMS
ww
Phase
Line
Vdc
6
Vdc

6
3
Vdc
w.E 2 2
Vdc

asy
The conversion factor remain same as in 1800 conduction mode.

harmonics. En
In both 1200 & 1800 conduction mode both phase & line voltages are free from even & triplen
gin
Voltage control using PWM techniques
1) Single PWM techniques

ee rin
In this case, width of positive & negative cycle is not  but rather equal to 2d. g.n
VO  

n1,3,5
4V
n
S
sin n   sin nd sin nt 
To eliminate nth harmonics

2 et
Sin (nd) = 0
d  n
Pulse width, 2d  2 n , 4 n , 6 n ,...................

but 2d  
To eliminate 3rd harmonics
3d   ; d   3 ; 2d  2 3
So pulse width of 1200 is required.
25

2) Multiple PWM techniques

2d
Here a single pulse of ‘2d’ width is divided into ‘n’ pulses each of width .
n
fc
n
2fr
fc = carrier signal frequency
fr = reference signal frequency
ww
AC - AC Converters
w.E
These circuits control AC power. They are of 2 types:
1) AC voltage regulator
2) Cyclo-converter
asy
AC voltage regulator En
gin
These transfer AC power from 1 circuit to another by controlling output voltage & fixed
frequency.
ee rin
Single phase half wave ACVR
g.n
 VO avg 
Vm
2
 cos   1 et
Vm
IO avg 
2R
 cos   1
1
V  1 2
 VOrms  m  2     sin2 
2  2 
1
Vor 1  1 2
 pf    2     sin2 
Vsr 2  2 
26

Single phase fully controlled ACVR
ww
w.E
asy
 Vo avg  0
 
En 1

 
V 
2 
1
Vo rms  m       sin2 
2
2
 gin

 wL 
  tan1  
ee
If R – L load is used, then in steady state I O lags VO by an angle 
rin
 R 
 g.n
If r   , then above formulas remain valid & output voltage is controllable by controlling α.
 If r   , output voltage is not controllable & Vor  Vsr
So, range of firing angle is     1800

et
Integral cycle control (ON/OFF) control
If in fully controlled ACVR, thyristors conduct for m cycle & are OFF for n cycle then
1
 m 2
 VO rms  Vsr  
mn
1
V  m 2
For R – load, pf  or   
Vsr  m  n 
27

Vm  m 
I T1 avg   
  R  m  n 
1
V  m 2
I T1 rms  m 
  2R  m  n 
R = load resistance ; Vm is maximum value of VS
ww
w.E
asy
En
gin
ee rin
g.n
et
28

ww
w.E
asy
En
gin
ee rin
g.n
et

Contents

Transmission Lines .................................................................................. 3
Underground Cables ............................................................................. 14
ww
Overhead Insulators .............................................................................. 16
Distribution Systems ............................................................................. 16
w.E
Per Unit System .................................................................................... 17
asy
Load Flow Study .................................................................................... 18
En
Economic Power Generation ................................................................ 20
gin
Fault Analysis ........................................................................................ 21
ee
Power System Stability.......................................................................... 29
rin
Power System Protection ...................................................................... 33
g.n
et

Transmission Lines
Skin Effect
It is tendency of AC current to be concentrated on the surface of conductor.

Cause: Non-uniform distribution of magnitude flux linkages Due to skin effect, the effective
area of cross section of conductor decrease and hence resistances increases.
In case of DC, There is no skin effect so
RDC  R AC
 With increase in frequency, skin effect increases.
 With increase in r , skin effect increases.
ww
Inductance of a Transmission line
 Single Conductor
w.E Internal inductance

 0 r
8
External inductance from distance ‘ d1 ’ to ‘ d2 ’
Lex  asy
0r  d2 
ln  
En
2  d1 
0 r 0 r  d2 
Total inductance 
8

2  r 
   d     d
gin
ln  
ee
 0 r ln  1   0 r ln  
2  re 4  2  r  
r  0.7788r = Geometric mean radius (GMR)
rin
 Single phase 2 – wire line
 0 rd g.n
Inductance of single wire 
Total inductance = L1  L2
0  d 
ln  
2  r  
et
Lsys  ln  
  r 
If radius of both wire is not same, assume radius of 1st wire ra & that of second wire is rb
0  d 

Lsys  ln
  r r 
 a b 
ra  0.7788ra & rb  0.7788rb
If instead of a single conductor per phase we use multiple conductor, then GMR is
replaced by self GND (Geometric Mean Distance) and ‘d’ by mutual GMD.

Self GMD
ww
w.E
self GMDfwd  D11 D12 ........D1n D21 D22 .........D2n  ....... Dn1 Dn2 ........Dnn 
1
n2
Where Dii  ri  0.7788ri

asy
Self GMDbwd  Di 1 ' '
En  
Di' 2' ........Di'm' .............. Dml' ' ................Dmm 
' '

1
m2
Where Dii  ri  0.7788ri

gin
Mutual GMD
ee
Mutual GMD  D11' D12' ...........D1m'  ................. Dn1' Dn2' .................Dnm'  
1
rin
mn
Now, with these terms all the inductance expressions change to

g.n
Single wire :
0 
ln 
d 

2  self GMD 
0  mutual GMD 
et
1  , 2 wire: ln  
2  Self GMD 
Three – phase Transmission line
Symmetrical configuration
0r  D 
Lph  ln  
2  r 
r  0.7788r

Asymmetrical configurations
If conductors are placed horizontally or vertically.

1
Deq  Dab  Dbc  Dca  3
0r  Deq 
Lph  ln  
2  r 
In case of bundled conductor, more than one conductor per phase
ww
We replace Dab  Dabeq = mutual GMD between a phase & b phase
w.E
Similarly, Dbc  Dbceq
Dca  Dcaeq
In place of GMR, Self GMD is used asy


Self GMD=  Self GMD
a En
 Self GMD Self GMD 
b c
1
3
gin
Example: Calculate inductance per phase of following circuit?
ee rin
Between successive conductors, distance = 3m , Radius of each conductor = 1m
g.n
Solution
Dab eq  Da1b1 . Da1b2 . Da2b1 . Da2b2 

1
4
et
1
 3  12  12  3 4
 6m
1
Dbc eq  3  6  6  3 4  4.24m
1
Dca eq   6  9  9  6  4  7.348m
Deq = mutual GMD

1
 Dab.eq  Dbc.eq  Dca.eq  3
= 5.71m

1
Self GMD   r  D
a a1a2
 Da2a1  r   4
0.7788  0.012  152 

1
4

= 0.341m
1
Self GMD   r  D
b b1b2
 Db2b1  r   4
= 0.2467m
1
Self GMD  r  D c1c2
 Dc2c1  r  4
ww
c
= 0.1528m
w.E
1
Self GMD   Self GMD a Self GMD b Self GMD  c  3
= 0.2398m
L
0  GMD 
ln  
2  GMD Self  asy
 5.71 
 2  10 7 ln    0.634mH / km En
 0.2398 
gin
Remember, Inductance calculated using these formulas is per unit length.
Transposition of Transmission line ee rin

g.n
The position of different lines are changed after regular intervals to reduce radio interference in
neighboring communication lines.
et
Capacitance
Single Phase 2 – Wire System
0 r
Cab 
 D 
ln  
 rr 
 12 
Line to neutral capacitance

20 r 20 r
Can  , Cbn 
D  D 
ln   ln  
 r1   r2 
Three phase single conductor system
20 r
Cph 
 GMD 
ln  
 r 
For bundled conductors
ww
Cph 
20 0
 GMD 
w.E ln  
 Self GMD 
In capacitance calculations, it must always be remembered that there is no concept of r, we
asy
simply use radius in calculating self GMD.
Performance of Transmission line
Classification of lines based on length En
1) Short Line
l < 80 km or
gin
l*f < 4000 , Where f = frequency
2) Medium Line
80 km < l < 200 km
ee rin
4000 < l*f < 10000
g.n
3) Long Line
l > 200 km
l*f > 10000
et
Modeling of transmission lines
Transmission lines are modeled as 2 – port network

Vs  AVR  BIR
Is  CVR  DIR
Under no load
Vs
IR  0 , Vs  AVR , VR 
A

Vs
No Load Voltage  and IR  0 , Is  CVR
A
Vs
 VR
A
Voltage Regulation   100%
VR
This current is called as line charging current and is responsible for as effect is called as “Ferranti
Effect”.
Ferranti Effect
ww
Under no-load or light load conditions receiving end voltage becomes more than sending end
voltage due to presence of line charging current.
w.E
Short transmission line
Vs  VR  IR R  jwL 
asy
 VR  IR Z
En
 Vs  1 z   VR 
 I   0 1   I 
 s   R  gin
A = D (symmetrical)
AD – BC = 1 (reciprocal)
ee rin
Approximate Voltage Regulation
g.n
For lagging pf
VR=
IR
VR
R cos  R
 X sin R 
et
load pf=cosR
For leading pf
IR
VR  R cos R  X sin R 
VR

Medium Transmission Line
Normal – T – Model
 YZ   YZ  
 1   Z 1  
 Vs   2   4    VR 
   
 Is    YZ    IR 
Y 1   
  2  
Here all problems are in actual values & not per unit length.
ww
Nominal-π-Model
 YZ 
w.E
 Vs  
  
1
2
Z 
V 
 R
 Is   Y  1  YZ  1  YZ   IR 
 2 
  4 
asy
Long transmission Line En
Vx  VR cosh X  IR Z c sinh x gin
IR  IR cosh x 
VR
Zc
sinh x ee rin
Where Vx & I x are voltage and current at distance ‘x’ from receiving end.
R  jL g.n
Zc 
G  jC
= surge impedance
In case of long transmission line, we use all promoters’ per-unit length.

et
For loss less line, R=G=0
L
Zc 
C
For distribution less line, RC = LG
For sending end, x = l
Vs  VR cosh l  IR Z c sinh l
VR
Is  IR coshl+ sinh l
Zc

cosh l Z c sinh l

 Vs     VR 
  1  
 Is   Z cosh l   IR 
 c


A = D (symmetric)
AD - BC = 1 (reciprocal)
Power Transfer Equation
Vs Vr A
cos      Vr cos    
2
Pr 
B B
ww Qr 
Vs Vr
sin     
A
Vr sin    
2
w.E
For Short TL
B B
B  Z 
asy  B  Z ; 
A  10  A 
En  A  1, =0
Pr 
Vs Vr
Z
cos       ginVr
Z
2
cos 
Qr 
Vs Vr
sin      
ee
Vr
2
sin 
rin
Z Z
If resistance of line is neglected g.n

Z  jX  X and   900
Vs Vr Vs Vr Vr
2
et
Pr  sin ; QR = cos  
X X X
Remember, the last expression can be applied between any two bases in a power system as long
as transmission line connecting them is loss less.
Wave Propagation
Due to continuous energy transfer between L & C elements of a transmission line we consider
energy propagation from sending to receiving end & hence wave propagation.
Z c = Surge impedance or characteristic impedance.
10

γ = Propagation constant.
 R  jL G  jC 

For loss less line
R=G=O
  j LC
    j
 = attenuation constant
ww  = phase constant
In case of loss less line   0 (no attenuation)
w.E    LC
1
Velocity of wave 
LC
asy
, Where L & C are per unit length
Wavelength  
2


2
 LC En
Surge Impedance Loading
gin
When load impedance = surge impedance
PL 
Vr(L
2
L)
= Surge Impedance Loading
ee rin
ZC
If ZL  ZC g.n
VR  IR Z C
According to long line

et
VX  VR coshx+VR sinhx  2VRex
So no term containing e yx & hence no reflected wave & hence whenever surge impedance is
connected at load, there is no reflection.
11

Surge Traversal
Theremin equivalent circuit
When surge voltage ‘ V ’ is induced on the line & line can be represented as Theremin
equivalent circuit shown.
ZC = Characteristic impedance of line
ZL = load impedance or characteristics impedance of second
line connected in series to first.
ww  ZL 
Transmitted voltage V2  2V   potential divider 
 ZL  Z C 
w.E
Incident Voltage V1  V
Reflected voltage  V
V  V  V2
asy [Voltage continuity]
 Z  ZC 
V  V  L 
 ZL  Z C  En
Reflected current  
V gin V
, Refracted current   2 , Incident current 
V
Reflection coefficient:
ZC
V  ZL  Z C

V ZL  Z C
ee ZL ZC
rin
Refraction coefficient:
V2

2ZL
g.n
Voltage Control
V ZL  Z C
et
 Usually in case of lagging loads, the voltage at receiving end falls below sending end voltage
and to boost the receiving end voltage we connect a shunt capacitor at receiving end.
 Similarly, in case of leading loads, receiving end voltage is higher than sending end voltage
so we connect a shunt reactor to avoid over-voltage.
Usually in GATE, we need to calculate rating of capacitor for voltage control & it is illustrated
through a question shown below:
12

Example: A three phase overhead lines has a resistance & reactance of 5 & 20 respectively.
The load at receiving end is 30MW, 0.85 pf lagging at 33kv & we connect a compensating
equipment at receiving end to maintain voltage at each end equal to 33 Kv. Find rating of
compensating equipment?
Solution:
Assuming base (MVA) = 30 MVA
Base voltage = 33 kv
30Mw
pu power =  1pu
30MVA
ww
Base impedance =
V2
S
 36.3
w.E
pu impedance = 
5  j20
36.3
 0.56875.960
PR 
VS VR
Z
cos      
VR
Z
2
asy
cos   Z  0.568 ; =75.96 0 
1
11
cos  75.96    
12
cos75.96 En  cos  75.96     0.81
0.568
  40.110
0.568
gin
QR 
VS VR
Z
sin      
VR
Z
sin  
ee
1 1
0.568
sin  75.96  40.11 
12
0.568 rin
 sin75.96
QR = - 0.645 pu g.n
QL  PL tan   1  tan  cos1 0.85 
QL = 0.6197 pu
et
QR  QL  QC  QC  1.2647pu
QC  1.2647  30 = 37.9 MVAR
So, we can observe the steps involved

Step – 1 : Calculate  from PL as capacitor does not consume any real power.
Step-2 : Calculate QR using  calculated above
Step-3 : QR  QL  QC than Calculate QC
13

Power Factor Correction
Usually, to improve the supply side power factor we connect a capacitor device like capacitor
bank or synchronous condenser (synchronous motor under over excited condition).
Suppose, initially a load of real power P1 & lagging pf cos 1 is connected & we want to
improve pf to cos 2 lagging  2  1  & we connect a capacitive device which consumes real
power PC  & thus net real power after connection.
P2  P1  PC
Q2  P2 tan 2 ; Q1  P1 tan 1
ww
QC  P1 tan 1  P2 tan 2
w.E
In case of capacitor bank, PC  0  P1  P2
If we wish to calculate capacitance per phase
asy
(in both voltage control & pf correction )
QC
QC  3CV 2
ph
 C
3Vph
2
En
Underground Cables gin
Insulation resistance
R
 R 
ln   
ee rin
2l  r 
L = length of cable g.n

R = Outer radius (sheath radius)
R = conductor radius et
Capacitance Model
CC : Core capacitance
CS : Core to sheath capacitance
14

Capacitance per phase

Cph  CS  3CC
Calculating CS & CC
1) Any of two cores or conductors are connected to

sheath & capacitance is measured between remaining
core & sheath.
C1  CS  2CC
ww2) All three cores are connected together & capacitance is
w.Emeasured between any core & sheath.

C2  3CS
CS 
C2
3 asy
C
2CC  C1  2
3 En
C C 
CC   1  2 
 2 6  gin
Cph  CS  3CC 
3C1 C2
2

6
ee rin
3) Any one of core is connected to sheath & capacitance is
measured between remaining 2 cores. g.n
C3 
3CC CS
2

2
et
Cph  2C3
15

Dielectric loss in a UG cable
P  3Cph Vph
2
tan 
where tan   loss tangent
1
tan  
cphR
R = Insulation resistance
ww
Overhead Insulators
For suspension type string insulator, the model for 3-discs looks like as shown.
w.E C
Let m  m
CS
V2  V1 1  m
V3  V1 1  m2  3m
asy
The voltage of disc nearest to the conductor is highest.
String efficiency  En string voltage
V
gin
No. of discs  voltage across bottom disc
  100%

1
ee
 V2  V3
3  V3
rin
Distribution Systems
 Sources fed from both ends g.n
1) Assume I A from VA
2) Calculate I A from
VA  VB   I A  I1  r1   I A  I1  I2  r2   I A  I1  I2  I3  r3
et
3) Substitute I A in  I A  I1  ,  I A  I1  I2  &  I A  I1  I2  I3  & check for sign change.
4) Node for minimum potential = Node for sign change
5) Calculate minimum potential by KVL
Example: Refer Kuestion power systems for that.
16

Per Unit System

In pu system, energy quantity is expressed as a ratio of some based value.
Absolute value or Actual value

pu value=
Base value
Percentage value = pu value x 100%
Base value
1 -  System
 Sbase , Vbase , Ibase , Zbase
ww

Out of these, 2 value must be known, to convert entire system into pu system.
Sbase  Vbase  Ibase
w.E Ibase 
Sbase
Vbase
, Z base 
Vbase
Ibase

Vbase
2
Sbase

asy
Usually, we assume Sbase & Vbase as known.
3 -  System En
 Sbase & Vbase are assumed gin
 Ibase 
Sbase
3  Vbase
Vbase = line to line voltage
ee rin

Sbase = 3 – phase power
For start connection g.n

V ph Vbase / 3 Vbase
Z base  base
Ibase ph
For delta connection

Ibase

2
Sbase et
V ph Vbase 3V 2
Z base  base   base
Ibase ph Ibase / 3 Sbase
In per unit system, equivalent impedance of transformer referred to primary or

secondary in same.
17

Change of base
If base of system is changed from Vbase  old , Sbase  old  to Vbase new  ,Sbase new 
2
 V  old   Sbase new  
Zpu new   Zpu  old    base   
 Vbase new    Sbase  old  
Load Flow Study

Power System Matrices
ww  YBUS matrix
 y10  y12  y12 0
w.E YBUS    y12

 0
y 20  y12  y 23
 y 23
 y 23 

y 23  y 30 
OBSERVATIONS asy
1)
2) En
The diagonal elements are sum of all admittance connected to that particular bus.
The off-diagonal elements are negative of admittance connected between two buses.
3)
4)
gin
If two buses are not connected to each other than that elements is zero.
YBUS Matrix is a symmetrical matrix.
% sparsity =
Total number of zero elements
Total number of elements
ee
5) Most of the elements are zero & hence it is a sparse matrix.
rin
g.n
 ZBUS matrix
ZBUS   YBUS 
1
et
 ZBUS matrix used in fault analysis.
 Suppose a 3 – phase SC fault occurs on bus ‘k’ then fault current
Vprefault ,k
If 
Zkk  Z f
Vprefault , k  Pr e  fault voltage at bus 'k'
Zkk = elements of ZBUS matrix.
Z f = fault impedance
 Due to fault voltage at other buses are also affected.
18

 V1   I1 
    0
.  .   
.  .  0
    . 
 Vk   Ik   
.
.    Z  .   V    ZBUS   
   BUS    BUS I
.  .   f
    . 
 Vn   In   
    . 
     0 
   
ww Vk  If Zkk
w . E
If 
Vf
 Z  0
Zkk f
Vj  Z jk I"f
Vj 
Z jk
Vf
asy
Zkk
En
 Post – fault voltage at bus j
Z jk gin
Vjf  Vj 
Zkk f
V
ee
If there is generator connected to bus ‘ j ’ then current supplied by generator.
Eg  Vjf rin
I
jX"d
g.n
Classification of buses
At each bus, there are 4 parameter: V , ,P,Q .
et
At any bus, out of these 4 quantities any 2 are specified.
1) Slack Bus / Swing Bus/Reference Bus
V ,  are know quantities.

P, Q are unknown quantities.
Any extra power needed by the system is supplied by slack bus.
2) Generator Bus / PV Bus
P, V is specified
Q,  are unspecified
19

3) Load Bus / PQ Bus

P & Q are constant as specified
V &  are unknown
Generally, newton – Raphson method is used for load flow solution and we form Jacobian
matrix, & the order of Jacobian matrix is
2n  m  2  2n  m  2
N = no. of total buses
M = no. of pv buses
ww
Economic Power Generation
 Incremental cost
w.E If is cost required to generate an additional unit of energy.

 IC i = Incremental cost of ith generator
Ci
 IC i 
PGi
asy
PGi = Power generated by ith generator
Ci = cost of ith generator
En
 Transmission Loss gin
ee
m m
PL    PP
i jBij
rin
i 1 j 1
Pi , Pj : Real power injection at i & j buses

th th
B ij = loss coefficient
m : no. of generator units g.n
Penalty Factor et
1
Li 
 P 
 1  L 
 PGi 
For economic power sharing

 IC i Li  cons tant
 Constant is called as incremental cost of system.
  IC i = incremental cost ith unit
 L i = penalty factor of ith unit
20

 From this expression, for m generator we get ( m – 1) equation and mth equation is
m
P
i 1
Gi  PD  PLOSS
PD = total power demand

For example, refer kuestions on Power systems.
Fault Analysis
Symmetrical Components
ww
For an unbalanced 3 – phase system, the analysis is done better by means of symmetrical
components.
w.E Va0  Zero sequence components
Va1  Positive sequence components
Va2  Negative sequence components
 Va0  1 1
asy
1   Va 
  1
 Va1   3 1 
 
2   Vb 
En ;
0
Where   e j120
V 
 a2 
1 2

Vs   A Vp 
1
   Vc 
gin
Vp = phase voltage
Vs = Symmetrical component
ee rin
1 1 1

A  1  2
1 


 2 
g.n

Power in terms of symmetrical components et
P  3  Va1 Ia1  Va2 Ia2

 Va3 Ia0


Remember, same transformation exist for current also.

Sequence Network
Alternators
 Positive Sequence Network
Z1 positive sequence impedance

Z1  jX"d
21

 Negative Sequence Network
Va2  Ia2 Z2
Z 2 : Negative sequence impedance
 X d " X q " 
Z2  j  
 2 
 Zero Sequence Network
ww Va0  Ia0  Z0  3Zn 

Z 0 = Zero sequence impedance
w.E Z n =Neutral impedance (  in case of delta)

Z0  jXl
X l = leakage reactance
asy
Transformers
En
gin
Z1 = Positive sequence impedance
Z1  jXl ee rin
 Negative Sequence Network
Z 2 = Negative sequence impedance

g.n
Z2  jXl et
 Zero sequence network
Depending upon scheme of connection, we close series or shunt connection & method
of grounding.
22

Shunt connection are closed for delta connection & series connection are closed for star
connection with grounded neutral. If primary & secondary are inter changed then circuit
becomes mirror image.
 Case – 1
If neutral is grounded through an impedance Z n
Z 0  Z T0  3Zn

ww
Case – 2
w.E
asy
En
 Case – 3 gin
ee rin
g.n
et
 Case – 4
23

 Case – 5
Transmission Lines
ww
w.E
 Negative Sequence Network asy
En
gin
 Zero Sequence Network
ee rin
Z1  Z2  Zs  Zm
Z0  Zs  2Zm
g.n
Z s = Self impedance et
Zm = mutual impedance
Remembers, all sequence networks are always drawn in per unit & never in actual values.
Fault Analysis
The following short circuit faults are considered
1. LG (Single Line to ground fault)
2. LL (Line to line fault)
3. LLG (Line to Line to Ground fault)
4. 3-phase short circuit fault.
24

3-phase short circuit fault comes under the category of symmetrical SC fault whereas other 3
faults are called as unsymmetrical SC fault.
Order of severity
LG < LL < LLG < 3 -  SC
But if faults occur at terminal of alternator then LG fault is most severe.
Occurrence of SC fault
LG > LL > LLG > 3 -  SC
ww
Transient on a Transmission line
w.E
Equivalent Circuit
i  t   it  iss
Vm Rtasy
V
sin      e L  m sin  wt     


Z Z
En
  tan1 
 L 
R
gin
 
 ; Z  R  L
2 2
Maximum momentary current


ee rin
imm
2V
 m sin     
Z g.n
If resistance is neglected,   900 et
2Vm
imm  cos 
Z
Short circuit model of a synchronous machine
During initial SC period for 1-2 cycles, current are induced in field & damper winding of machine
so reactance at least & called as sub transient reactance  X d "
After initial sub-transient period, current in damper winding in reduced to zero, and this period
is called as transient period & reactance of machine is called as Transient Reactance  X d "
25

Finally, when current in field winding is also reduced to zero, we enter steady state period &
reactance is called as steady state reactance  Xd  .
Xd "  X d '  X d
Symmetrical Fault Analysis
 We replace alternators by an emf source in series with sub transient reactance and emf
source under no-load is usually 100 pu or terminal voltage in pu.
V 00
Ef  t pu
Vbase
ww

Transformer & Transmission lines are replaced by reactance.
The equivalent circuit can be solved either by finding thevenin equivalent across fault or
by simple network analysis & fault in SC is calculated.
w.E If 
Ef
asy
Z eq  Z f
En
Z f = fault impedance.
 gin
In symmetrical fault analysis, we only consider positive sequence impedance.
 SC MVA  
1
Zeq  Z f
MVA base
pu
ee rin
 SC MVA  
Zeq  Z f
MVA
g.n
For example, refer to kuestion on power systems.
Selection of Circuit Breakers

et
 Usually, circuit breakers are selected on the basis of most severe fault which is 3 – phase
SC fault.
 Three ratings of circuit Breakers are important.
1) Rated momentary current

Momentary current ( rms ) = 1.6  Isc
Isc is symmetrical SC current which we calculated in previous section.
2) Making current
Making current = 2.54  Isc
26

3) Symmetrical Interrupting Current

We need to recalculate Isc by using sub-transient reactance for alternators & transient
reactance for synchronous motors. Induction motors & other loads are neglected.
Then, we multiply it by a factor to calculate symmetrical interrupting current. This factor

depends on speed of circuit breakers which is measured in terms of numbers of cycles it takes to
operate.
Speed Factor
8 Cycles or slower 1.0
ww 5 Cycles
3 Cycles
1.1
1.2
w.E 2 Cycles 1.3

Unsymmetrical Faults Analysis
Line to Ground Fault asy

En
We first draw equivalent positive, negative & zero sequence networks & calculate thevenin
gin
impedance across fault terminals from each network.
Assuming equivalent positive, negative & zero sequence reactance are Z1 , Z 2 & Z 0
respectively.
Here all sequence currents are equal.

ee rin
Ia1  Ia2  Ia0
g.n
Ia1 
Ea
Z1  Z 2  Z 0  3Z f et
Fault current I a
Ia  3Ia1
3  Ea
Ia 
Z1  Z 2  Z 0  3Z f
Short Circuit MVA
SC MVA   3Ea1 , I a1 *
27

3 Ea1 I2

Z1  Z 2  Z 0  3Z f
3
In pu SC MVA   pu
Z1  Z 2  Z 0  3Z f
3 MVA base
 MVA
Z1  Z 2  Z 0  3Z f

ww
Line to Line Fault
w.E
Here, we calculate equivalent positive & negative sequence impedance Z1 & Z 2 respectively.
Ia1 
Ea
Fault current
Z1  Z 2  Z f
asy
 j 3  Ea En
Ib 
Z1  Z 2  Z f
gin
Short Circuit MVA
SC MVA  
3
Z1  Z 2  Z f
pu
ee rin
3 MVA base g.n


Z1  Z 2  Z f
Line to Line to Ground Fault

MVA
et
Ea
Ia1 
Z1  Z 2  Z 0  3Z f  
I  Z2
Ia0  a1
 Z2  Z0 
Fault Current = 3  Iao
28

Short Circuit MVA
3
SC MVA   pu
Z1   Z 2  1 3Z f  Z 0  
3 MVA base
 MVA
Z1   Z 2  Z 0  3Z f 
Remember, all fault analysis will be done in pu system.
Power System Stability

ww
Two types of stability are studied:
w.E
1) Steady State Stability
2) Transient Stability
Steady State Stability
For Steady State Stability

asy
dP
d
0 En
And for this condition to be true.
Pe  Pmax gin
For a loss less machine, Pmax 
E V
XS
ee
If power demand is greater than maximum demand than machine goes out of synchronous.
rin
Transient Stability
Swing Equation
g.n
Md2 
dt2
 Pm  Pe  et
M = inertia constant ( MJ-S / elect - rad)
Pm= mechanical input (MW)
Pe = electrical output (MW)
 = rotor angle
Another Form
H d2 
 Pm  Pe 
f dt2
H = inertia constant ( MJ / MVA)
Pm & Pe both are in pu
29

GH
M (MJ – S / elect - deg)
180f
GH
M (MJ – S / elect - rad)
f
G = machine rating (MVA)
 If two alternators are swinging coherently. Then they can be replaced by a single
alternator having
Meq  M1  M2
But “ H “ cannot be added directly, they must first be on same base.
ww  If machines are not swinging coherently, then

Meq 
M1M2
M1  M2
w.E
 Accelerating Power,
Pa  Pm  Pe 
In steady state Pm  Pe asy
En
In transient, Pm  Pe so rotor accelerate or decelerate.
Equal area criterion

gin
For system to possess transient stability
 Pad  0 ee
There are basically 3 stages in stability analysis rin
 Before Fault
We say maximum power transferrable is Pmax,1
g.n
& Pe  Pmax,1 sin  et
 During fault
Pe  Pmax,2 sin 
 After Fault
Pe  Pmax,3 sin 
30

Critical clearing angle
It is the maximum value of  beyond which if the fault is cleared system will be unstable. The
time instant corresponding to this angle is called as critical clearing time assuming fault occurs
at t = 0.
Case-1 : Fault occurs on TL near to bus
Pmax,2  0
Pmax,3  Pmax,1
Cr  clearing angle
ww
By equal area criteria
2
 Pm  Pmax,1 sin  d  0

w.E 0
 P
0  sin1  m

asy
 Pmax,1
For critical clearing 2  max


max    0 En
tCr 
2H  Cr  0 gin
= Critical Clearing Time
f Pm
ee rin
Case-2 : Fault occurs on one of parallel lines close to bus
Before Fault
g.n
Pmax,1 
E V
Xg   X1 X2 
et
During Fault
E V
Pmax,2  0
Xeq
After Fault
E V
Pmax,3 
Xg  X1
31

 P 
0  sin1  m

 Pmax,1 
 
 P 
max    sin1  m

 Pmax,3 
 
For transient stability

2
 Pad  0
ww 0
2
w.E
c
 Pm  0  d  
0

Pm  Pmax,3 sin  d  0
c
For critical Clearing asy

2  max En
tCr 
2H  Cr  0  gin
f Pm
ee
Case-3 : Fault occurs in middle of one of parallel lines
rin
The equivalent reactance during the fault is highest and thus Pmax,2 is lowest
g.n
Pmax,1  Pmax,3  Pmax,2
2
et
 Pad  0
0
c 2
 Pm  Pmax,2 sin d   Pmax,3 sin  Pm  d

0 c
For critical clearing,
 P 
2  max    sin1  m 
 Pmax,3 
 
32

cr  cos 1 
P
m  max  0   Pmax,3 cos max  Pmax2 cos 0 
 Pmax3  Pmax2 
 
 This is a generic formula and can be applied to other two cases as well after substituting
value of Pmax,1 , Pmax,2 & Pmax,3 .
 But tcr can only be calculated from cr in previous two cases using expression written
before.
Power System Protection
ww  In our current protection, normally a current transformer is connected between

protected elements and the relay.
Plug setting multiplier (PSM)
w.E 
Fault current
 T ratio  Pick  up current 
asy
Usually pick up current = Relay setting x Rated secondary current of CT
Pick-up current is minimum current above which a relay operates.
 Differential Relays
En
gin
The current through operating coil  k  I1  I2 
it operates, else it does not operates.ee

If this current is greater than pick-up current then
K I1  I2  Ipick up  Trip 

rin
K I1  I2  Ipick up Block 
g.n
 We usually provide a restraining coil to avoid relay mal-operation.
Relay operates if
et
 Nr I1  I2 
K I1  I2  K   Ipu
 N0 2 
Ipu = pick up current

Nr = Number of turns in restraining coil
N0 = Number of turns in operating coil
The ratio operating coil current & restraining coil current is called as bias of differential
relay.
33

Protection of Transmission line
1) Mho relay is at least affected by power surges& thus it is used for protection of long
transmission lines. It is inherently directional.
2) Impedance relay is used for protection of medium transmission lines.
3) Reactance relay is unaffected by ground resistance & hence used for earth fault
protection & also for short transmission Lines.
 These relays are collectively called as distance relays.
Protection of Transformers
 Differential relays are used for protection of large transformers and CT are always
ww connected in configuration opposite to power transformer.

Example: 1) If power transformer is   Y then CT is Y  
w.E

: 2) If power transformer is    then CT is Y  Y
Buccholz relay used to prevent any incipient fault below oil level in a transformer of small
KVA.
asy
En
gin
ee rin
g.n
et
34

ww
w.E
asy
En
gin
eer
ing
.ne
t

BASIC CONCEPTS
 In continuous time signals independent variable is continuous and thus these signals are
defined for a continuum of values of independent variable.
 Discrete time signals are only defined at discrete times and consequently for these
signals the independent variable takes discrete set of values.
Representation of continuous time signals

 We use symbol ‘t’ to denote independent variable for continuous time signal.
ww These signals can be represented by a wave form as shown below
w.E

asy
If possible, these can also be represented by a mathematical function like
x(t) = sin t
En
Representation of discrete time signal

gin
We use symbol ‘n’ to denote independent variable for discrete time signal.

ee
These signals can be represented as a series of numbers like
x[n] = [5, 4, 5, 7, 9, 2……]
rin

Arrow indicates reference point or x [0]
If possible, we can represent the same by a function like
 
g.n

x[n] = sin n 4
Also these signals can be represented by a wave form as shown below

et

Energy & Power Signals

Interval   ,  
Energy of continuous time signal
T 
lim 2 2
x t  x t 
T   T
E  dt  dt

Energy of discrete time signal

lim N 2
 2
    x n
ww E 
T   nN
x n 
n
w.E Power of continuous time signals
P 
lim 1
T
 x t
2
dt
T   2T T
asy
Power of discrete time signals
lim 1 N En
gin
2
P  
N   2N  1 nN
x n

ex. x(t) = sint
ee
Signals having non-zero (finite) power and infinite energy are called as Power Signals.
rin
Signals having finite (non-zero) energy and zero power are called as Energy Signals.

ex. x[n] = [1, 2, 3, 4]
g.n

power. et
The bounded signal radiate finite energy and periodic signal radiate finite average
Even & Odd signals

 A signal is said to be “even” if it satisfies the condition
x(t) = x (–t) or x [n] = x[–n]
 A signal is said to be “odd” if it satisfies the condition

x(t) = –x(–t) or x [n] = –x[–n]
 Any signal (even those which are neither odd nor even) can be broken into odd & even
parts

Odd Part
x  t   x  t  x n  x  n
x0  t   ; x0 n 
2 2
Even Part
x  t   x  t  x n  x  n
xe  t   ; xe n 
2 2
Periodic and Aperiodic Signals
ww A signal is said to be periodic with period “T” or “N” if

x(t + T) = x(t)
w.E

x[n + N] = x[n]
Otherwise, the signals are said to be aperiodic.
Classification of systems
asy
En
(i) Linear & Non-Linear Systems
For Linearity gin
if x1  t   y1  t 
x2  t   y 2  t 
then, this condition must be true
ee rin
1x1  t   2 x2  t   1y1  t   2 y 2  t 
g.n
Example : y(t) = t x (t) is linear
y[n] = 2x [n] + 3 is non-linear et
(ii) Time Invariant & Time-variant Systems
For system to be time-invariant the
following condition must hold true
x(t -  )  y(t –  )

It means that following two realizations must be equivalent
ww The simplest way to verify this is to check the coefficient of ‘t’ inside x(t)
eg. y(t) = tx(t) is time invariant
w.E but y(t) = tx(2t) is time variant as coefficient of ‘t’ in side x(t) is not ‘1’

asy
Otherwise, you need to verify the system equivalence shown above.
(iii) Causal & Non-causal Systems

En

gin
The output should depend only on present & past values of input.
ht  0 V t  0
 For discrete time system ee
h[n] = 0 V n < 0 rin
g.n
(iv) Stable & Unstable Systems
 Every Bounded input should produce a bounded output.

et
 
DT : 
K 
h k    ; CT :  h    d  

(v) LTI systems with or without memory

 The output at any time should depend only on value of input at the same time.
 For discrete time system
h[n] = 0 V n  0
 h[n] = k  [n]

 For continuous time system

h(t) = 0 V t  0
 h [t] = k  [t]
(vi) Invertible Systems

The system is invertible if there exists h1(t) such that
Thus h(t) * h1(t) =   t 
ww
w.E For discrete time, h[n] * h1[n] =  n
asy
Shifting and Scaling operations
En
 Shifting
Delay gin
if ee rin
g.n
et
 shift the waveform right by the amount of delay
Advance
if
 shift the waveform left by the amount of advance

 Scaling
Compression
if
Replace upper & lower limit by original limit divided by compression factor
ww
w.E
Expansion asy
if En
gin
ee
Replace upper & lower limit by original limit multiplied by expansion factor.
rin
g.n
et
Note : If both scaling and shifting are given in the question .
Ex. x(3t-2)

1. shift the waveform right by the amount of delay
2. Replace upper & lower limit by original limit divided by compression factor
ww  This method is applicable for both continuous and discrete time signal.
w.E
LTI system (Linear Time Invariant Systems)
 Any continuous time or discrete time system can be represented in terms of impulses.
x t 

asy
 x      t    d
En


x[n]   x k   n  k 

k 
gin
LTI systems are characterized on the basis of Impulse Response h(t) or h[n]
ee rin
g.n

The response of a system with impulse as an input is called as impulse response.
Due to time invariance property of LTI system
if  n  h n
et
 n  k   h n  k 

since x n   x k 
K 
 n  k 

 y n   x k hn  k   x n * hn = convolution sum
k 
for continuous time domain

y t   x   h  t    x  t  * h  t  = convolution integral
k 

 The condition for causality of system then becomes

h[n] =0 V n < 0 ; h(t) = 0 V t < 0
Calculating convolution sum
 Suppose x [n] = u[n]

h[n] = [1, 2, 5, 7, 9]
 Draw plots of both x[n] & h[n]
ww
w.E

Here, we flip x[n] asy
Flip either x[n] or h[n] about y-axis
En
gin
ee rin
For calculating y[n], shift x[–k] to right by amount ‘n’
For y[0] g.n
et
The only overlapping between the two is at k = 0, –1, –2
y [0] = x[0] h [0] + x [1] h [–1] + x [2] h [–2]
=1x5+1x2+1x1
=8
For y [1]

y [1] = x [0] h [1] + x [1] h [0] + x [2] h [–1] + x [3] h [–2]

= 1 x 7 + 1 x 5 + 1 x 1 x 1 x 2 = 15
Similarly, we can calculate all values of y[n]
y[n] = [2, 3, 8, 15, 24, 24……..]
Calculating Convolution Integral

Assume x (t) = u (t)
h (t) =
ww
w.E
 Step 1
Flip either x(t) or h(t)
Here, we flip h(t)
asy
En
 Step 2
gin
h  t   & x   ee
Shift h(  ) by amount “t” to the right to calculate y(t) by calculating overlapping between
rin
g.n
 Overlapping area
et
1 t 
=  1.1d  1  t 
0
if t < – 1
so, overlapping area = 0

if t > 1
overlapping area = 2
y (t) is shown in adjoining figure:
Properties of Convolution Sum
ww
1) Commutative Property
w.E x[n] * h[n] = h[n] * x[n]
2) Distributive Property
y1[n] = x[n] * h1[n] asy
y2[n] = x[n] * h2[n]
En
y [n] = y1[n] + y2[n] = x[n] * h1[n] + x2[n]*h2[n]
gin
= x[n] * { h1[n] + h2[n] }
3) Associative Property ee
{x[n] * h1[n] }* h2[n] = { x[n]* h2[n] } * h1 [n]
rin
Same properties will apply for continuous time domain for convolution integral.g.n
Parallel & Cascade structure of LTI systems
Parallel:
et
y[n] = x[n] * [h1 [n] + h2 [n]]

Cascade:
y[n] = x[n] * ([h1 [n] + h2 [n]])
Frequency Response
The frequency response of any LTI system is given by its Fourier Transform.
ww

DT: H e
jw
  
n
h n e jwn
w.E CT: H  jw    ht e


 jwt
dt
Group delay & Phase delay

asy
Assuming transfer function of system is H(s)
input is x(t)= e
jwt
En
Output: H  jw  e
jwt

gin
  H  jw  e    e jwt
j w

j wt  w  
= H  jw  e
  w   ArgH jw  ee
d  w  rin
Group Delay, g  w   
dw
 w
g.n
Phase Delay,   w   
Continuous – Time Fourier series

w
et
Fourier states that any periodic signal can be represented by a set of complex exponential
signals provided that it satisfies Drichlet Conditions.
Drichlet conditions
(i) Over any period x(t) is absolutely integrable
T
i.e., 0 x  t  dt  
(ii) In a finite time interval, x(t) has a finite number of maxima & minima

(iii) It should have finite number of discontinuities in the given interval
Note : for distortion less transmission of the of a signal with some finite frequency content
through a continuous time LTI system , the frequency response of the system must satisfy these
two conditions.
1. The magnitude response H( j ) must be constant for all frequencies of interest ;
that is, we must have
H( j )  C
For some constant C
ww 2. For the same frequencies of interest, the phase response argH( j) must be linear in
frequency, with slope –to and intercept zero ; that is, we must have
w.E argH( j)  to
 Trigonometric asy
Fourier series as generally expressed in 2 forms.
 Exponential
En
Trigonometric Fourier Series
gin
Analysis equations
a0 
1
T
T 0
x  t  dt ee rin
ak 
2
T
T 0
x  t  cos k0 t dt where 0  2
T g.n
bk 
2
T
T 0
x  t  sin k0 t dt et
Synthesis equations
 
x  t   a0   ak cosk 0t   bk sink 0t
k  - k 
k 0 k 0
Exponential Fourier Series

Analysis equations
T
1  jk0t
Ck   x  t  e dt
T0

Synthesis equations

x t 
jk0t
 CK e where 0  2
k 
T
Relation between T.F.S. and E.F.S.

 co  a0
an  jbn
 Cn 
2
an  jbn
 Cn 
ww 2
Important facts about Trigonometric Fourier series
w.E
(i) Any odd signal contains only sine terms in Fourier series.
(ii) Any even signal contains only cosine terms in Fourier series.
(iii) For half–wave symmetric signal
 
x t  T 2  x  t 
asy
Only odd harmonics are present
i.e., k = 1, 3, 5……. En
Properties of complex exponential Fourier Series gin
(i) Linearity
F.S.
ee rin
If x  t    ak
F.S.
y  t    bk g.n
F.S.
then Ax (t) + By (t)   A ak + B bk
et
(ii) Time-shifting
F.S.
if x  t    ak
F.S. -jk0t0
x  t  t0    e ak where 0  2
T
(iii) Time-Reversal
F.S.
if x  t    ak
x  t  
F.S.
 ak

For odd signal For even signal
x(t) = – x(–t) x(t) = x (–t)

 ak  ak  ak  ak
(iv) Time – Scaling
F.S.
if x  t    ak
x  t  
F.S.
 ak
ww but 0 is replaced by  0   , though Fourier series coefficients remain same.
w.E
(v) Multiplication
F.S.
if x  t    ak
F.S.
y  t  
asy
 bk
F.S.
z  t   x  t  y  t    ck
Ck  

En
bp ak p = convolution sum
P 
gin
(vi) Parseval’s Relation
1 2
 2
ee
Energy in time domain = Energy frequency Domain
rin
 x  t  dt   ak
T T
F.S.
where x  t  
k 
 ak
g.n
Discrete –Time Fourier series et
For a discrete-time signal, with period ‘N’ the following equations are used for Fourier
series.
Analysis equations
 j2Kn
Ck   x n e N
N
0  2 N
 j0Kn
Ck   x n e
N

Synthesis equations
j0Kn
x n   CK e
N
The properties of Fourier series coefficients are same as continuous time Fourier series
with one additional property.
CK N  CK
That is, Fourier series coefficients are periodic
ww
IMPORTANT DUALITY
w.E
A signal discrete in one domain is periodic in other domain & vice versa.
asy
Example: For continuous Time Fourier Series, x (t) is periodic in time domain & hence Fourier
Series exists where coefficients exist for frequency integral multiple of " 0 " & hence is discrete.
En
Fourier Transform
gin
ee
Fourier series exists only for periodic signals, Fourier series converges to Fourier Transform
which is continuous as compared to Fourier series which is discrete.
rin
Continuous Time Fourier Transform
g.n
Analysis equation

 jwt
et
X  jw    x t e dt

Synthesis equation

1
x t   x  jw  e jwt dw
2 

Properties of Continuous Time Fourier Transform
Signal Fourier Transform

x(t) X(jw)
y(t) Y(jw)
Ax(t)+By(t) AX(jw)+BY(jw)
X w
x(t-t0)  jt0
e
x*(t) X*(-w)
ww x(-t)
x(at)
X(-w)
w.E 1  jw 
X 
a  a 
asy
x(t)*y(t)
d
dt
x(t)
X(jw)Y(jw)
jwX(jw)
En
x(t)y(t) 1
X(w) * Y(w)
t gin
 x    d
2
1
X  jw   X  0    w 

tx(t)
ee jw
j
d
dw
X  jw 
rin
Ev{x(t)}
Od{x(t)}
Re{X(jw)}
jIm{X(jw)}
g.n
X(t)
e
j0 t
x t
2πx(-w)
X(w-w0)
et
Parseval’s Relation
 
2 1 2
 x t   x  w  dw
 2 

Some common Fourier Transform Pairs

 
ak    k0 
jkw0t
 ak e
K 
2 
k 
e
jkw0t
2    0 
cos w 0 t      0       0  
ww sin w 0 t               
w.E 
1
j
2  
0
2  
2k 
0 
   t  nT 
n
1, t  T1
asy   
T K  
2sin T1
T 

x t  
0, t  T1
En 
(sin wt)/πt
gin 1,
x    
0,
 w
 w
 t
u(t) ee 1
j
1
   
rin
e
  t  t0 
u  t  ,Re  a  0
at
e
 jt0
1 g.n
Discrete Time Fourier Transform
a  j
et
Analysis equation

 
X e j  
n
x n e jn
Synthesis Equation
x n 
1
2 2
 
X e
j  j n
e d

Properties of Discrete Time Fourier Transform

x[n] X     periodic with
y[n] 
Y     period 2
ax[n] + by [n] aX     bY   
x n  n0   jn0
e X  
ww x*[n]
j0n
X *   
X    0 
w.E e
x [–n]
x n
 x n | k  , if n is multiple of k
X   
X k 
xk n  
asy
 0, is n is not multiple of k
X  Y 
x [n] * y [n]
En
n x [n]
 
gin j
d
dx   
Ev x n
Od {x [n]}
ee Re {X(  )}
j Im {X(  )}
rin
Parseval’s Relation
g.n

 x n
2 1
 
2
et
2 2
 X  d
n

Some common Fourier Transform Pairs


 2 
 2k 
jk  n
 N
2  ak   
 ak e k   N 
K N
j0n 
e 2      0  2 


cos 0n      0  2       0  2  
 

 
ww sin 0n
x [n] = 1

j



     0  2       0  2  



w.E 1, n  N1 2
2




    2 

ak    
2k 

x n  


0,
asy
n  N1 , n 
N
2
k   N 

En
and x [n + N] = x [n]


k  gin
 n  kN
2 

N k  

 
2k 
N 

1,
x n  
 0,
ee
n  N1
n  N1


sin 2

sin   N1  1 2 

rin
 

sin Wn W
n


 Wn 
sinc 
  

1, 0    W
x    
g.n
 0, W <   
 n  n0   jn0
e
et

Laplace Transform
 Laplace Transform is more general than Fourier Transform but can only be computed in
Region of Convergence (ROC), so it cannot be computed V s
S    jw; such that
ROC =  t
  x  t  e dt  
Laplace transform becomes Fourier transform for   0 , if it lies in ROC.
 Analysis Equations
ww for bilateral Laplace Transform
H(s) =

 ht e
st
dt
w.E 
for unilateral Laplace Transform
H(s) =
asy

 ht e
0
st
dt
 Synthesis Equation
 j En
x(t) =
1
2j j
gin
x  s  est ds
Properties of ROC
ee rin
(i) ROC consists of a collection of lines parallel to jw–axis in s–plane.

 x t e
t
such that dt  

(ii) If X (s) is rational, then ROC does not contain any poles. g.n
et
(iii) If x(t) is of finite duration & absolutely integrable, then ROC is entire s-plane.
(iv) If x(t) is right sided signal (i.e., it is zero before some time) and if Re(s) = 0 is in the
ROC, then all values of s for which Re(s) > 0 are also in ROC.
(v) If x(t) is left sided, (i.e., if it is zero after some time), and if Re (s) = 0 is in ROC, then
all values of s for which Re(s) < 0 are also in ROC.
(vi) If x(t) is two–sided signal and if the line Re (S) = 0 is in ROC, then the ROC consists
of a strip in s–plane include the line Re (S) = 0
(vii) If X(s) is rational, and
x(t) is right sided signal, then ROC is right of right most pole.
x(t) is left sided signal, then ROC is left of left most pole.

Properties of Laplace Transform
Signal Transform ROC

x(t) X(s) R
x1(t) X1(s) R1
x2(t) X2(s) R2
ww ax1(t) + bx2(t) aX1(s) + bX2(s) At least R1 Ռ R2
w.E x  t  t0  e
st0
X s R
e 0 x t
st
asy X  s  s0  Shifted version R [i.e., s is in
ROC if  s  s0  is in R]
x (at)
En  1
a
X s
  a
Scaled ROC i.e., s is ROC if
s
x1  t  * x2  t 
gin
X1  s  X2  s 
a
is in R
d eer sX  s 
At least R1 Ռ R2
At least R
dt
x t
tx(t) d ing
x s
R
t
ds
1
X s
.ne At least R
 x   d

s
t

Some common Laplace Transform Pairs

 t 1 All s
u(t) 1 Re {s} > 0
s
–u(–t) 1 Re {s} < 0
s
tn1 1 n Re {s} > 0
ut s
n  1  !
ww tn1
n  1  !
u  t 
1
sn
Re {s} < 0
w.E eatu  t 
- eatu  t 
1
sa
Re {s} > –a
tn1
asy 1
sa
1
Re {s} < –a
Re {s} < –a
n  1  !
eat u  t 
En  s  a n
tn1 at
n  1  !
e ut
gin 1
 s  a n
Re {s} > –a
 t  T
cos 0 t  u  t 
2
ee
esT
s
s  20
All s
Re {s} > 0
rin
sin 0 t  u  t 
2
0
s  0 2
Re {s} > 0
g.n
eat cos 0 t  u  t 
 
sa
2
 s  a  20
Re {s} > –a
et
eat sin 0 t  u  t  0 Re {s} > –a
 
 s  a2  20

Initial and Final Value Theorem
lim
 
x 0 
s
sX  s   initial value
lim
x   s X  s   Final value, first stability should be ensured, else final value does
s0
not exist.
ww
Analysis of LTI system using Laplace Transform
 Stability
w.E 
 h  t  dt  

; ROC of H(s) should include   0 .
 Causality
asy
h(t) = 0, t < 0 i.e., right sided signal
En
ROC should be right sided
ROC should include Right half plane.
but converse is not true.
gin
Z – Transform ee rin
It is generalization of Discrete Time Fourier Transform
g.n
Analysis Equation
H z  

 h k  z k
k 
et
Synthesis Equation
1
h[n]   H  z  zn1dz
2j 
Indicates integration around counter clockwise circular contour centered at origin

& with radius r.

ROC for Z-Transform

Z – Transform also exists only inside ROC

 x n r n
n
  is the condition for ROC.
Mapping from s-plane from z–plane

 The jw-axis is mapped to unit circle in z–plane.
 Right Half plane is mapped to exterior of unit circle.
ww Left Half plane is mapped to interior of unit circle.
w.E
Properties of ROC
(i) The ROC x(z) consists of a ring in the z – plane centered about the origin.
asy
(ii) The ROC does not contain any poles.
(iii) If x[n] is of finite duration, then ROC is the entire z – plane except possibility at z = 0
and/or z = 
En
(iv) If x[n] is a right sided sequence and if the circle, | z | = r0 is in the ROC, then all finite
gin
values of z, for which | z | > r0 will also be in ROC.
ee
(v) If x[n] is a left sided sequence, and the circle | z | = r0 is in ROC, then all finite value of
z, for which 0 < | z | < r0 will be in ROC.
rin
(vi) If x[n] is two sided sequence and if circle | z | = r0 is in the ROC. Then ROC will consist
of a ring in z-plane which consist of ring | z | = r0.
(vii) If X (z) is rational and g.n
x[n] is right sided than ROC is outside of outer most pole.
x[n] is left sided then ROC is inside of inner most pole.
(viii) If x[n] is causal, ROC includes z =  provided x[n] = 0, n < 0.
et
If x [n] is anti – causal, ROC includes z = 0 provided x [n] = 0, n > 0.
(ix) A causal LTI system with rational system function is stable if all poles inside the unit
circle that is have magnitude, | z | < 1.

Properties of z–Transform

x[n] X(z) Rx
x1 n X1  z  R1
x2 n X2  z  R2
ax1 n  bx2 n aX1  z   bX2  z  At least R1 Ռ R2
ww x n  n0  z
n0
X z Rx with addition or
deletion of origin
w.E e
j0n
n
x n
z 0 x n
X e

  j 0

z  Rx
z0R x
x[–n]
asy   X z 
 z 0
X z 1 z 1  s.t z  R x 
 x r  , n=rk
w n  
En  X zk Rx
1  1
k 
 i.e., z s.t z  R x 
0, n  rk for some r
x1 n * x2 n gin X1  z  X2  z 
k

At least R1 Ռ R2

n
nx[n]
ee zdX  z 
dz
Rx except addition or
rin
deletion of zero

k 
x k 
1 z
1
1
X z Rx
g.n  z  1
 
et

Some common Z –Transform pairs

 n  1 All z
u n 1 |z|>1
1
1z
u  n  1 1 |z|<1
1
1z
 n  m z m All z except 0 (if m > 0) or
 (if m < 0)
ww anun 1
1  az 1
|z|>|a|
w.E anu n  1 1
1  az 1
|z|<|a|
n
na u n
asy  az 1
1  az 1
2
|z|>|a|
nanu n  1
E
 n
az 1 |z|<|a|
gin 1  az 1
2
Initial & Final value Theorem
x 0  
lim
ee
X  z   Initial value
rin
z
x   
lim  1 
1   X  z   Final value g.n
z  1 z 
In z – transform also, stability must be verified before using final value theorem. et
Sampling
Continuous Discrete Time

Time signal signal
Nyquist Sampling Theorem

It states that if sampling frequency is greater than twice the maximum frequency in the

signal for the signal to be recovered from its samples.

wS  2wM
Note: For this condition signal spectrum should be centered around y-axis.
Band-pass Sampling Theorem

If the signal spectrum is band-pass which means it has minimum & maximum frequency
fL = lower frequency ; fu = upper frequency
 f 
K   u  , where    indicates Greatest Integer function
 fu  fL 
ww wS  u
2f
K
w.E
 xp (t) = x(t) p(t)
p t 

   t  nT 
n asy
En
T = sampling interval ; xp  t   Sampled signal
x(t) = continuous time signal
xp  t  

 x  t    t  nT gin
XP  w  
1
2 
n
 X  w  * P  w   ee rin
2 
P w     w  kws 
T k 
g.n
XP  w  
1 

T k 
X  w  kw s  ; ws 
2
T et
 The spectrum of sampled signal is just repetition of actual spectrum at integral multiples
of ws .
If w s  2wM , adjacent samples of spectrum overlap, called as aliasing.

Electrical Handbook by Kreatryx

Enviado por

Dados do documento

Direitos autorais

Formatos disponíveis

Compartilhar este documento

Compartilhar ou incorporar documento

Opções de compartilhamento

Você considera este documento útil?

Este conteúdo é inapropriado?

Direitos autorais:

Formatos disponíveis

Electrical Handbook by Kreatryx

Enviado por

Direitos autorais:

Formatos disponíveis

Downloaded From : www.EasyEngineering.

Downloaded From : www.EasyEngineering.net

Manual for K-Notes ................................................................................... 2

© 2014 Kreatryx. All Rights Reserved.

Downloaded From : www.EasyEngineering.net

KVA Rating  (Core Dimension)4

Voltage Rating  (Core Dimension)2

Exact equivalent circuit

Downloaded From : www.EasyEngineering.net

Exact equivalent circuit w.r.t. primary

 Approximately Equivalent Circuit

o Conducted on LV side keeping HV side open circuited

Downloaded From : www.EasyEngineering.net

o Conducted on HV side keeping LV side short circuited

PCu = I12R1  I22R 2

Where I1 = primary current

Downloaded From : www.EasyEngineering.net

R 1 = primary winding resistance

R 2 = secondary winding resistance

Bm = maximum value of flux density

Downloaded From : www.EasyEngineering.net

cos  = power factor

ww PCu,FL = Full load copper losses

For maximum efficiency,

Voltage Regulation of Transformer gin

Full-load voltage  V2

Approximate Voltage Regulation

Downloaded From : www.EasyEngineering.net

cos 2 = power factor of load ZL

+ sign is used for lagging pf load

Condition for zero voltage regulation

Three – Phase Transformers En

Rules to draw Phasor diagram

Downloaded From : www.EasyEngineering.net

Another example gin

Downloaded From : www.EasyEngineering.net

Parallel operation of Transformer

1) Voltage ratings of both transformers should be same.

ww 4) Phase displacement between secondary’s of both transformers must be 0 .

If there are 2 transformers A & B supplying a load power SL .

Auto Transformer gin

KVA rating of auto transfer = 

o KVAconduction = K  Input KVA 

o % Full load losses = 1 - K  %FL losses in2  winding Transformer 

Downloaded From : www.EasyEngineering.net

 = flux per pole  wb 

N = speed of machine rpm

w.E A = number of paralled path

A = 2 for wave winding asy

Downloaded From : www.EasyEngineering.net

(i) Separately excited

Downloaded From : www.EasyEngineering.net

R se : Series Field winding Resistance

R sh : Shunt Field winding Resistance

Rotational loss Copper loss

o This power flow diagram is for a dc generator.

Downloaded From : www.EasyEngineering.net

Rotational loss Copper loss

Friction windage asy

For maximum efficiency

Downloaded From : www.EasyEngineering.net

If no-load voltage is same for all types of generators:

Conditions for voltage build-up in Shunt Generator

Downloaded From : www.EasyEngineering.net