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Protecting Flybacks

Against Short Circuits


By Paul L. Schimel, Field Applications Engineer,
Fairchild Semiconductor, Chicago

Delays in short-circuit protection triggers require


careful selection of the magnetics and over-
current threshold values to prevent component
stress.

I
n any off-line flyback converter design, it is possible that IC with internal current sensing is tripping the overcurrent
the output eventually will be shorted by some event, be comparator circuit and shutting the MOSFET off as fast as
it customer error or a catastrophic failure downstream. possible, as well as surviving a few pulse-by-pulse current
Designers are increasingly using integrated power limit cycles without overstressing the MOSFET. It is the time
switches that offer the additional benefits of space and that it takes to realize a short has occurred and turn off the
cost savings of combining the MOSFET and controller ICs in MOSFET that requires careful consideration in the design.
one package. In these circuits, as in any other, the short-circuit
condition must be safely accommodated by the design. Determining Shutdown Time
Figs. 1 and 2 show a basic schematic and the critical wave- The pulse-by-pulse shutdown mechanism takes time.
forms associated with a discontinuous-conduction-mode From the time the overcurrent threshold is passed to the
flyback converter design, respectively. The key to short- time the MOSFET is turned off is the minimum on-time.
circuit protection using an integrated MOSFET/controller For example, with Fairchild Semiconductor’s Fairchild Power
Switch (FPS) IC, this is effectively the
��� total propagation delay plus the MOSFET

�� �� switching time. As it relates to minimum
���
����������� on-time, the data sheet of this product
� ��� points out a couple of typical values
�� �� ��
�� �� �� that don’t necessarily spell out the total
�� ���� ����
��
���

���������� �� ������� minimum on-time. These values are the
� � leading-edge blanking time and turn-off
� ��� � �

� ���� delay time.

� �� ��
��� � Leading-edge blanking is often used
� �� �� to blank the leading edge of the sensed
current. This avoids false overcurrent
� ��
�� �� �� trips due to gate-drive currents or hard
��
������� switching at the drain. Turn-off delay is
� ��

��
an inclusive term used to capture logic
�� � � delays, current-sense delays and switch-
�� ing delays. Since the MOSFET and driver
��
are internal, the MOSFET switching times
������ �� and driver output currents are not speci-
fied. This makes it difficult to correlate the
MOSFET and/or driver contribution to
Fig. 1. This discontinous-conduction-mode flyback converter with peak current-mode control minimum on-time.
is centered on an integrated Fairchild Power Switch with MOSFET current-sensing and over- Unfortunately, during the automated
current protection. testing of the IC, the test time and site-

Power Electronics Technology August 2006 24 www.powerelectronics.com


PROTECTING FLYBACKS
to-site efficiencies required to screen
����
minimum on-time for packaged parts
���
would make the part cost prohibitive;
therefore, the maximum values are not
listed in the data sheet and the typical �

values are given instead. ����
�������
Short-Circuit Protection
While current-mode control offers a

built-in means to shut off the MOSFET �
���
on a cycle-by-cycle basis, there is often a � ��

secondary protection mechanism. The ���


FPS MOSFET/IC devices force the IC
into a soft-start cycle after a few overcur- �
rent cycles. The part will keep cycling the � � �
���������������� ��
soft-start mechanism until the short is ��
�� � �� �� � ������

removed. The goal of cycling soft-start


is to reduce the stress on the MOSFET Fig. 2. These waveforms illustrate the steady-state operation of the Fig. 1 circuit under normal
operating conditions.
caused by the short circuit.
In general, when the output of the power supply is drive enough amp turns to reset the transformer core in
shorted, the primary current ramps up to higher levels. these few cycles. This may lead to flux walking in the core
Eventually, the overcurrent comparator trips and shuts down and primary current waveforms that appear to be in continu-
the MOSFET after the minimum on-time. In the next few ous-conduction mode. If the short remains after these few
cycles, the MOSFET is only turned on for the minimum cycles, the controller will trigger the secondary protection
on-time assuming the short remains in place. mechanism. These few pulse-by-pulse current-limit cycles
As this is happening, the secondary may not be able to must be survived. To survive these cycles, the minimum on-
time and the transformer behavior beyond the overcurrent
POWER MODULES limit value must be understood. This minimum on-time also
should be tested and quantified as a part of the power-supply
for
development cycle.
High Performance
Applications
Overcurrent Scenario
When the FPS IC senses an overcurrent condition, the
MOSFET is turned off only after the minimum on-time. When
using the FSDM0465 device as an example, if the overcur-
- Very Low Stray Inductance
rent comparator is tripped at 4 A, assuming that the current
- 12 & 17 mm Height
is ramping up at a linear rate—the switch will open at a cur-
- Various Electrical Topologies
rent value greater than 4 A. For the sake of this example, let’s
- 75V to 1700 V - 10A to 600A
assume the transformer is not saturated and the switch opens
- 10 kHz to 500 kHz at 5 A, as in Fig. 3. The FPS IC must withstand this current
- NPT & TRENCH IGBT - MOSFET value. In addition, if the flux in the transformer is walking up
- FREDFET - CoolMOSTM - SiC - FRED from cycle-to-cycle as a result of the short-circuit condition
- Hi-Rel Applications Supported not allowing the core to reset, the FPS IC and transformer
must be able to handle the elevated peak current safely.
It is also possible to drive the transformer into satura-
tion during overcurrent, but it is imperative that the
designer understand the ramifications of this decision
on the switch current. To revisit the recent example, let’s
say that the transformer saturates at 4.5 A, at which point
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the primary inductance drops to 10% of the initial value
size reduction and enchanced performance.
(LLK = (0.1)LMAG). By doing this, assuming a relatively square
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corner on the BH curve, the switch would then open at
CoolMOS is a trademark of Infineon Technologies AG roughly 9.5 A (Fig. 4). Again, the switching MOSFET must
TM

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design, but the consequences must be understood and the

Power Electronics Technology August 2006 26 www.powerelectronics.com


PROTECTING FLYBACKS
the designer has a high crest factor load,
���� this may not be possible. It may then be
��� necessary to choose a minimum current
����� trip value that is much higher than the
� nominal load. The transformer must
� � safely accommodate this higher current,
����� ������
as well as the current value at which the
switch opens on short-circuit testing.
Fig. 3. Due to internal switching delays within the FPS, the MOSFET remains on for a short
duration after an overcurrent condition has been detected in the transformer primary.
Designing for Robustness
���� Short-circuit protection in off-line
converters is a requirement in virtually
��� every design since a short will occur at
some point in the life of the product.
Short-circuit protection in off-line fly-
�����
back converters with Fairchild FPS ICs is
� a viable solution that can be easily used.
� �
����� ���
To use this feature requires a thorough
���
understanding of the overcurrent trip
point and the minimum on-time. The
Fig. 4. MOSFET overcurrent conditions in saturated transformers can become severe due to the minimum on-time of the IC must be
rapid current increases caused by reduced primary winding inductance. verified at design and the transformer
minimum on-time of the FPS must be known. must accommodate this minimum on-time at high line
The design goal is to choose an FPS device such that the conditions. Additionally, the MOSFET must accommodate
minimum stated primary current-limit point falls just above the transformer current with the output shorted for a robust
the worst-case load condition at minimum line voltage. If design. PETech

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www.powerelectronics.com 27 Power Electronics Technology August 2006

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