12-07-18-PCB Material Selection-46 Slides

PCB Stackup Technology Series
PCB
Material
Selection
More than Impedance
Bill Hargin
In-Circuit Design
b.hargin@icd.com.au
425-301-4425
PCB Material Selection © 2012 In-Circuit Design
PCB Material Selection

More than Impedance
1. Intro/Review
2. PCB Materials Properties
3. PCB Material Selection
4. Conclusion/Wrap-up
PCB Material Selection © 2012 In-Circuit Design 2
In-Circuit Design, © 2012 PCB Material Selection - 1

About the Presenter
 High Speed PCB Design

— Author/co-author of a dozen articles on high-speed design
— Hundreds of webinars, seminars, and workshops—including
a “Fundamentals of High-Speed Design” course that has been
taken by over 10,000 engineers in more than 30 different
countries
 HyperLynx
— Product Marketing Director
 PADS Software
— Director of International Business
Development
 Mentor Graphics
— High-Speed Marketing Manager
— Director of Business Development, System-Level Engineering
PCB Design and Profitability

From Lee Ritchey’s “Right the First Time” (Vol. I)
“Engineers design all sorts of innovative, clever products,

but often have no idea what things cost … These same
engineers have the financial success or failure of the
company they work for in their hands, and don’t seem to
know it.
In the area of PCBs, this is especially true. A PCB ... Is

the carrier of all of the (system) components. Its quality
is key to ensuring a product meets its performance and
reliability goals ... If the PCB is bad, it and all of the
components on it are lost.”
Lee Ritchey
Founder, Speeding Edge
Author, Lecturer, Iconoclast

Review:
Steps in High-Speed PCB Stackup Planning
1. Determine how many signal layers are needed

2. Determine how many power planes are needed
— Distribute Power and Ground
3. Arrange signals and planes accordingly
— Partner planes for signal layers
— Parallel plate capacitance between Power and Ground
— Select dielectric materials
4. Set signal height above planes for crosstalk requirements
5. Set trace widths to meet impedance goals
— Differential signals, in particular
6. Set plane spacing to meet capacitance requirements
7. Set spacing between signal layers to meet overall
thickness
Review:
Multi-Layer PCB Materials
 The main components that Outer layer copper foil
make up a multilayer PCB: Single ply 2116 PREPREG
— Copper foils
— Core and prepreg Etched CORE in a ground/ signal
layer configuration
alternate in the stackup
– Core and prepreg are made up Dual ply 1080 PREPREG
of glass weave and resin

Core: Cured laminate with Bonded
under
copper foil on both sides heat & Etched CORE in a ground/ signal
pressure layer configuration
– Prepreg: Uncured
glass/resin sheets that serve
Additional COREs and
as the “glue” during lamination PREPREGS per PCB design
– Core is more expensive
Outer layer copper foil

Review:
PCB Materials Properties
Core S tandard Resin Dk Dk Dk Dk Dk Df Df Df Df Df
Thickness Constructions Content 500 MHz 1 GHz 2.0 GHz 5.0 GHz 10.0 GHz 500 MHz 1 GHz 2.0 GHz 5.0 GHz 10.0 GHz
 Core/Laminates and prepreg are known by:

— Manufacturer; e.g., Isola, Rogers, Nelco, etc.
— Thicknesses; e.g., 1.5 mils (Preg) vs. 60 mils (Core)
— Glass weave styles; e.g., coarse (7628) vs. fine (106)
— Resin systems; e.g., Epoxy, Polyimide, etc.
— Resin content (%); e.g., 32-69%
— Tg: Glass transition temperatures;
e.g., 140 (Low Tg), 180 (Hi Tg), 280 C
— Dk: Dielectric Constant(Er, RelativePermittivity); 3.0-4.8
– A relative measure of a material’s capacitance, or ability to
store a charge, as compared to a vacuum (Er=1.0)
— Df: DissipationFactor (AKA: LossTangent); 0.020-0.001
– A measure of the energy loss in a dielectric per unit length
ICD Stackup Technology Series Schedule
 July 11—The Perfect Stackup: More than Impedance

 July 18—PCB Material Selection
 July 25—Impedance, Transmission Lines, and Termination
 August 1—Intro. to Power Distribution Network (PDN) Planning
 August 15—Material Selection for Multi-Gigabit SERDES Design
 August 22—Signal-Layer Selection:
Microstrip, Buried Microstrip,
Single and Dual Striplines
 August 29—Selecting a PCB Fabricator
 September 5—Decoupling/Bypass
Capacitor Selection


More than Impedance
1. Intro/Review
Multi-Layer PCB Materials
 Laminates and prepreg come as sets

from each material supplier
— Both are known by their thicknesses and the styles of
glass weave used in their makeup
— For a given material type, like FR408, there is a wide
selection of laminates, coupled with a much smaller
selection of prepreg styles
 Typical Prepreg Data:

Typical Laminate Data
Laminates
can have any
combination
of foil
thicknesses
on each side,
but
it’s most
common to
have the same
copper
thickness on
both sides
IS620i low loss laminate
Obtaining Laminate Information

Core S tandard Resin Dk Dk Dk Dk Dk Df Df Df Df Df
Thickness Constructions Content 500 MHz 1 GHz 2.0 GHz 5.0 GHz 10.0 GHz 500 MHz 1 GHz 2.0 GHz 5.0 GHz 10.0 GHz
 First source should be the laminate manufacturer

— www.isola-group.com, www.parknelco.com,
www.rogerscorp.com, and many more, of course …
 Second source of info should be your fabricator(s)
— The amount of information typically maintained by
fabricators ranges from from virtually none to very
complete data sets
 Type of information needed for each core/preg:
— Types of glass cloth, resin, and Resin Content
— Dk vs. frequency
— Df vs. frequency
— Glass Transition temperatures

Selecting Laminates
 Laminate systems are commonly made using “E”

glass for the woven reinforcement
 Laminates are known by their resin systems
— A wide range of resin systems
to choose from
— Each one was formulated to
meet a specific application/need
Example Resin Systems

(Sorted by Tg)
#1 Epoxy based systems (AKA: FR-4; $; easy to mfgr.)

— “High-Tg FR-4” is most common for high-layer count PCBs
Most
Used
 Polyphenylene Oxide (PPO; $$$; e.g., GETEK)

 Bismalamine Triazine (BT; Hi Tg; tough to drill)
 Polyphenyl Ether (PPE; $$$; e.g., Megtron)
 Cyanate Ester (CE; poor water absorption)
 Cyanate Ester-modified epoxy (better WA)
 Proprietary resin systems
Tg
 Polyimide ($$$$$; Tough to mfgr; highest Tg; Mil/Aero)
— Water absorption issue: must be baked dry and sealed with a conformal coating
#2

CTE (Coefficient of Thermal Expansion) and

Glass Transition (Tg) Temperature
 With PCB’s we’re concerned about “Z-axis expansion”

 The linear coefficient of thermal expansion, alpha,
describes how much a material will expand with
increasing temperature
— Expansion is usually quoted in parts per million per rise in temp.
– E.g., um/m/deg.C or ppm/deg.C
— Some references still use the older (and less correct term) TCE,
or “Thermal (or Temperature) Coefficient of Expansion” Break
 Where:
— dl = the change in length of material Z
in the Z direction
— l = overall length of material in the Z direction
— dT = the change in temperature (C) over which dl is measured
Melting point Melting point

for Leaded for Unleaded
alpha 1 = 50 x 10-6 in/in/C Solder (185C) Solder (225C)
alpha 2 = 275 x 10-6 in/in/C
TCE Copper = 16.5 x 10-6 in/in/C
TCE Glass = 11 x 10-6 in/in/C
Excessive Z-axis expansion

stresses plated copper in via
holes or barrels, and can result in
fractures and intermittent open
circuits.

Dielectric Thickness:
Dielectric Breakdown Voltage (DBV)
 Laminate and prepreg are available in thicknesses

as thin as 2 mils (51 microns)
— Some specialty materials are available as thin as 1 mil
(25 microns) and 0.5 mil (13 microns)
 The biggest thing when selecting thin dielectrics
is the design’s breakdown voltage requirement
— For most products in the computers/networking, the
DBV target is 1500 volts (e.g., Ethernet=1700 volts)
— Most commercial laminates have breakdown voltages
around 1000 volts per mil of thickness (25 microns)
— As a result, it’s best to use materials 2 mils and thicker
— 3 mils gives you some margin for material loss in mfg.
Water Absorption (WA)
 Dielectrics absorb water from the atmosphere

during normal use
 If the amount of absorption is large enough—
0.20%, as a rule of thumb—leakage paths can
develop in the laminate, resulting in failure
 Both Polyimide (WA=0.32 - 0.40%)
and Cyanate Ester (WA=0.70%)
require baking prior to soldering,
as well as a conformal coating
to prevent additional
absorption ($$)

Properties of Common PCB Laminates

Tan(f) DBV
Material Tg Er* WA %
** (V/Mil)
Standard Epoxy Glass (FR‐4) 125C 4.1 0.02 1100 0.04
Multifunctional EG (FR‐4) 145C 4.1 0.022 1050 0.14
Tetrafunctional EG (FR_4) 150C 4.1 0.022 1050 0.13
Nelco N4000‐6 Hi Tg FR‐4 170C 4.0 0.012 1300 0.10
Getek (Megtron 4) 180C 4.1 0.011 1100 0.12
BT Epoxy Glass 185C 4.1 0.023 1350 0.20
Nelco 4000‐13SI 210 3.3 0.009 1400 0.09
Cyanate Ester 245C 4.0 0.01 800 0.70
Rogers RO4350 280C 3.5 0.004 780 0.04
Polyamide Glass 285C 4.1 0.015 1200 0.43
Teflon Glass N/A 2.2 0.002 450 0.01
* Er measured at 2 GHz with a resin content of 55%.
** Tan(f) = Loss Tangent, an expression of how much signal is lost in the dielectric.
Note that any glass-reinforced material has a dielectric breakdown voltage at or exceeding 1000 volts per mil.
(Ethernet standard requires 1700 Volts. 3 mils is best, considering manufacturing.)
Materials Comparison (Dk vs. F)

Dielectric Constant (er)
Morgan, Chad & Helster, Dave, “The Impact of PWB

Construction on High-Speed Signals”DesignCon 99.
Frequency (GHz)

Dielectric Constants vs. Frequency
All materials have Resin

Content=42%, except as noted.
FR-4 at 55% Rc.
What Frequency Should I Use for Er?
 Ideally, you would use the Rise Time

(Tr; nanoseconds) for one of your faster digital
signals
90%
Fknee(GHz )  0.5 / Tr (ns )
Fknee  0.5 / 0.250(ns )  2.0GHz

10%
 If you don’t know Tr, ask someone,

or use your fastest clock frequency
Tr
in a pinch
Dr. Howard Johnson, High-Speed Digital Design: Handbook of Black Magic

Layer Construction Example
 A prepreg or core can be constructed using

multiple glass resin combinations
— Note the Dk difference of 3.7 to 4.07 for a 5 mil core
IS415 Non-dicy, Non filled, Non-Phenolic
High Temp, Lower Loss, more stable Dk Tg - 190 C
Dk Td - 375 C
Core Construction Resin Dk Dk Dk
Thickness Content 2.0 Ghz 5 Ghz 10 Ghz
0.0045 1 x 2116 49 3.89 3.88 3.86
0.005 1 x 1652 42 4.07 4.06 4.04
0.005 2 x 1080 57 3.70 3.69 3.68
0.005 106 / 2113 56 3.73 3.71 3.70
0.0055 1 x 1652 46 3.96 3.95 3.94
0.0055 1080/ 2113 51 3.84 3.83 3.82
Source:
Transmission Line Impedance
 Characteristic Impedance is based on:

— Material properties, which impact the Dielectric
Constant (Dk) [July 18 webinar]
– Material family, glass weave, Resin Content (%), Frequency
— Trace geometry [Aug. 22 webinar]
– Dielectric Height, Trace Width, thickness, separation (for Zdiff)
Stackup geometries should be defined before routing the board.

(Vital for proper signal integrity analysis.)

Resin vs. Glass Styles
 Typical glass styles, their thickness, and resin

content
— Using a different glass style changes Resin %
significantly
Glass Style Glass Thickness Finished thickness Typical Resin %
106 .0015” .0020” 64%
1080 .0025” .0025” 57%
2113 .0029” .0036” 52%
2116 .0038” .0040” 45%
1652 .0045” .0050” 42%
7628 .0068” .0071” 41%
This makes intuitive sense … Thicker weaves

mean thicker glass, and less room for resin.
Source:
Er’s Impact on Propagation Velocity
 Glass Styles are related

to Resin content …
 Resin content affects the
overall Dk value …
 Which affects the trace
impedance and 106 glass cloth Thickness - .0015”
propagation velocity
1 1
Vp  c Zo 
Er Er
Source: 7628 glass cloth Thickness - .0068”

Er’s Impact on Propagation Delay
 Propagation Delay increases as Er increases
Pd  85 Er
Er’s Impact on Trace Impedance
 As Er increases, Trace Impedance decreases

Trace Impedance Vs. Er and Plating Thickness
(Trace Width = .005, Dielectric = .0044)
65.0
63.0
61.0
Impedance
1/2 Oz Cu
Zo
59.0
57.0 1 Oz Cu
55.0
53.0 2 Oz Cu
51.0
49.0
47.0
45.0
2.8 3.3 3.8 4.3 4.8
Er
Er L
Zo 
C

Potential Errors in Impedance Calculations
 There are several places errors can creep into

impedance calculations:
— Incorrect dielectric constant for laminate (+/- 15%)
— Non-standard dielectric thickness (+/- 5%)
— IPC Equation inaccuracies (+/-25%)
– If you’re using equations, you’re volunteering for this one!
— Human error – anywhere in the process
– Avoidable, but happens more often than you expect
— Think of impedance-prediction inaccuracies as you
would a dimensional tolerance w
– If manufacturing tolerance is B t
+/- 10%, and your impedance
accuracy is +/- 45%, you could C
be off by as much as 55% B t

More than Impedance
1. Intro/Review

Selecting a Laminate System
 Requirements:
— Lead-free assembly requirement?
— Halogen-free material requirement?
— High-temperature requirement?
— Need for low dielectric loss?
 Sourcing:
— Sensitivity to single-source materials?
— Economic pressure to prototype in one
location, with production in another?
 Cost and price
— They’re different, right?
Example: Isola Materials Positioning

Improving Thermal
Performance (T260/Td/IST)
Improving Electrical Performance (Lower Dk/Df)

Issues with …
Fabrication, Sourcing, and Materials Selection
 Coordinate with fabricator(s) on the front end of the PCB

design process to ensure that you’re using off-the-shelf
materials, where possible
— Or prepare to pay a bit extra,
and factor in some lead time
 Use laminates from a single supplier
— Mixing laminates is the #1 cause
of failure due to warpage
 Avoid materials that are only available
from a single source (for obvious reasons)
 If you prototype in one location, with production in
another, choose materials that are available to both
Selecting Laminates based on

.093” Solder Mask

 PCBs using Lead-free solder
Prepreg
1
220C — Board thicknesses greater than 63 mil
(1.6 mm)
2
Core
3
Prepreg
4
– Use materials with Tg of 220 C or higher
Core
Core
— Board thicknesses up to 63 mil (1.6 mm)
5
170C
.063” Prepreg
6 Hi Tg FR-4 – Use materials with Tg of 170 C (and higher)
Core
Core
7
Prepreg
Core
Core
8
 PCBs with Lead solder
— Board thicknesses greater than 63 mil
9
Prepreg
135C
10
Core
Core
11
Lo Tg FR-4
(1.6 mm)
Prepreg
16 – Use materials with Tg of 220 C or higher
Core
Core
17 — Board thicknesses up to 63 mil (1.6 mm)
– Use materials with Tg of 135 C
Prepreg
18
Solder Mask

Cost and Performance:

Dielectric Material Options
 Different types of FR4

—FR402 Tg140
– Inexpensive
– Tg=140oC – the lowest temp rating
– Wider range of Dk values: i.e., 4.0 to 4.8
– Loss tangent can vary from 0.018 to 0.030
—FR408 Tg180
– Slightly more expensive than FR402
– Higher Temperature rating – 180oC (Tg=180)
– Stable Dk across frequency – 3.7 to 3.8
– Loss tangent around 0.010
Cost and Performance:

Dielectric Material Options …
 More exotic materials offer

— Stable Dk values across a broad frequency range
— Lower loss tangents
 Options include
— ISOLA IS620i/640
— Rogers RO3000/4000
— Nelco N4000, etc.
 Use these when … (Aug. 15 webinar)

— Backplane designs need to accommodate faster signaling in the
future (designing for next generation applications)
— Need a low loss interconnect and super-tight impedance control
— You’ve exhausted all other loss-mitigation options (pre-emphasis,
equalization, etc.)

Loss vs. Cost (Df, $)
Cost
N-6000-21 SI
0.006 Rogers 4003
0.0027, $40
IS 630
0.004 Rogers 4350
N-6000-21
0.009 0.0037, $39
N-4000-13 SI
N-4000-13 0.009, $17
0.014, $16
IS 620
IS 410 0.0086
0.021
Lower
FR 408 Dielectric
IS 370HR 0.013
0.028, $8 FR 406 Loss (Df)
0.018
Comparative Costs and Parameters

for 18x24” x t=0.003” Laminate Sheets
Sheet Dielectric Loss Glass Transition Moisture

Mfgr-Product Cost (.003 Constant Tangent Tem p. Absorption Resin System
Core.) (10 GHz) (10 GHz) (Tg; C) (%)
Isola-IS370HR $8.40 3.74 0.028 220 Epoxy

Nelco-N4000-13 $15.64 3.7 0.014 225 0.1 Modified Epoxy
Nelco-N4000-13 SI $17.06 3.3 0.009 225 0.1 Modified Epoxy
Rogers-4350B $38.92 3.48 0.0037 280 0.04 Hydrocarbon/Cer
Rogers-4003C $39.61 3.38 0.0027 280 0.04 Hydrocarbon/Cer
Rogers-RT/Duroid 5880 $332.14 2.2 0.0009 0.015 PTFE / Glass

Material Price vs.

Glass Transition Temperature (Tg)
Comparative Costs & Parameters

Melting point Melting point
18x24” x t=0.003” Core Sheets

for Leaded for Unleaded
Low Solder (185C) Solder (225C) High
Tg Tg
Material Price vs.

Dielectric Constant (Dk)
Low
Dk
Material Price vs.

Loss Tangent (tan[f])
Low
Loss

More than Impedance
1. Intro/Review

PCB Stackup Planning in the Design Flow
HARDWARE PCB FABRICATOR TEST

ENGINEER DESIGNER
Supported data
formats include
.STK, .CSV,
Clipboard, with
PCB xlators on
the way
ICD Stackup Planner
In-Circuit Design
Stackup Planner
 Industry-leading accuracy meets industry-leading
ease of use
— The easiest tool available for creating 8++ layer boards
— Fast, accurate, single-ended impedance calculations
— Multiple differential-signals on multiple layers; E.g.,
– DDR2/3 = 100 Ohms
– USB 2/3 = 90 Ohms
– LVDS, PCIe, SATA 2/3, etc.
— Editable board-materials library
— DRCs ensure stackup validity
— Trace-current calculations
 In the works:
— Additional Library enhancements
— Ongoing Ease-of-Use enhancements
— Interfaces to all major PCB layout Download from: icd.com.au
environments – provides a universal stackup planner

In-Circuit Design
PDN Planner
 Analyze multiple power supplies
— Today’s high speed, low voltage ICs need
instant access to low-impedance current across all frequencies of
interest
— PDN Planner analyzes the Voltage Regulator Module, PCB
Substrate, and bulk bypass/decoupling capacitors to solve
parameters for the desired effective impedance of the Power
Distribution Network, across the product’s entire frequency range
— Add an unlimited number of bulk bypass/decoupling capacitors
 Comprehensive Capacitor Library

— Includes 300 readily available SMD capacitors, including commonly
used ceramics, ceramic arrays, Low ESR Tantalums, and Tantalum
Organics
— Models include Value, ESR, ESL, Voltage, Tolerance, Dielectric
Material and SMD Package Download from: icd.com.au
In-Circuit Design
PCB Design Services
 ICD’s standard design process:

1. Stackup and PDN optimization
2. IC model acquisition and assessment
3. Pre-layout simulation—eliminating signal integrity issues early,
proactively constrain routing, optimizing clocks, and critical signal
topologies and terminations prior to layout
4. Component placement according to pre-layout simulation
5. Trace routing according to simulation constraints, taking particular
care of critical signals, differential pairs and flight times
6. Whole-board simulation, flagging Signal Integrity, Crosstalk and
EMC hot spots
7. Validating termination values and strategies, reducing the negative
impact of signal reflections
8. Interactive simulation of critical nets, looking at Signal Integrity,
Crosstalk and EMC in detail

In-Circuit Design
Plan B: “Find and Fix”
 Plan B Simulation Services:

1. Whole-board simulation of your PCB
design analyzing Signal Integrity, Crosstalk,
and EMC issues to FCC, CISPR & VCCI Class A & B
standards
2. If we do find Signal Integrity, Crosstalk or EMC
concerns, we can drill deeper, recommending
appropriate solutions
3. Once the board is rerouted, as necessary, ICD will
re-simulate the board, to verify that the changes
produced the desired results
Simulate twice - build once!
References
 “High Speed Digital Design:
A Handbook of Black Magic,”
Dr. Howard Johnson and Martin
Graham, 1993
 “Right The First Time,
A Practical Handbook on
High Speed PCB and System Design, Volume
1,” Speeding Edge, August 2003
 “Right The First Time, A Practical Handbook
on High Speed PCB and System Design,
Volume 2,” Speeding Edge, April 2007
 “Signal and Power Integrity Simplified,” Dr.
Eric Bogatin, Prentice Hall, 2nd Ed., 2009

12-07-18-PCB Material Selection-46 Slides

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PCB Stackup Technology Series

PCB Material Selection © 2012 In-Circuit Design

PCB Material Selection

2. PCB Materials Properties

3. PCB Material Selection

PCB Material Selection © 2012 In-Circuit Design 2

In-Circuit Design, © 2012 PCB Material Selection - 1

About the Presenter

 High Speed PCB Design

PCB Design and Profitability

“Engineers design all sorts of innovative, clever products,

In the area of PCBs, this is especially true. A PCB ... Is

PCB Material Selection © 2012 In-Circuit Design 4

In-Circuit Design, © 2012 PCB Material Selection - 2

1. Determine how many signal layers are needed

 The main components that Outer layer copper foil

make up a multilayer PCB: Single ply 2116 PREPREG

of glass weave and resin

PCB Material Selection © 2012 In-Circuit Design 6

In-Circuit Design, © 2012 PCB Material Selection - 3

 Core/Laminates and prepreg are known by:

ICD Stackup Technology Series Schedule

 July 11—The Perfect Stackup: More than Impedance

PCB Material Selection © 2012 In-Circuit Design 8

In-Circuit Design, © 2012 PCB Material Selection - 4

PCB Material Selection

2. PCB Materials Properties

3. PCB Material Selection

PCB Material Selection © 2012 In-Circuit Design 9

Multi-Layer PCB Materials

 Laminates and prepreg come as sets

PCB Material Selection © 2012 In-Circuit Design 10

In-Circuit Design, © 2012 PCB Material Selection - 5

Typical Laminate Data

IS620i low loss laminate

PCB Material Selection © 2012 In-Circuit Design 11

Obtaining Laminate Information

 First source should be the laminate manufacturer

In-Circuit Design, © 2012 PCB Material Selection - 6

 Laminate systems are commonly made using “E”

PCB Material Selection © 2012 In-Circuit Design 13

Example Resin Systems

#1 Epoxy based systems (AKA: FR-4; $; easy to mfgr.)

 Polyphenylene Oxide (PPO; $$$; e.g., GETEK)

In-Circuit Design, © 2012 PCB Material Selection - 7

CTE (Coefficient of Thermal Expansion) and

 With PCB’s we’re concerned about “Z-axis expansion”

Glass Transition (Tg) Temperature

Melting point Melting point

Excessive Z-axis expansion

PCB Material Selection © 2012 In-Circuit Design 16

In-Circuit Design, © 2012 PCB Material Selection - 8

 Laminate and prepreg are available in thicknesses

PCB Material Selection © 2012 In-Circuit Design 17

Water Absorption (WA)

 Dielectrics absorb water from the atmosphere

In-Circuit Design, © 2012 PCB Material Selection - 9

Properties of Common PCB Laminates

Materials Comparison (Dk vs. F)

Morgan, Chad & Helster, Dave, “The Impact of PWB

PCB Material Selection © 2012 In-Circuit Design 20

In-Circuit Design, © 2012 PCB Material Selection - 10

Dielectric Constants vs. Frequency