Escolar Documentos
Profissional Documentos
Cultura Documentos
INTRODUCTION
In computer engineering, a logic family may refer to one of two
related concepts. A logic family of monolithic digital integrated circuit
devices is a group of electronic logic gates constructed using one of
several different designs, usually with compatible logic levels and
power supply characteristics within a family. Many logic families were
produced as individual components, each containing one or a few
related basic logical functions, which could be used as "building-
blocks" to create systems or as so-called "glue" to interconnect more
complex integrated circuits.
A "logic family" may also refer to a set of techniques used to
implement logic within large scale integrated circuits such as a central
processor, memory, or other complex function. Some such logic
families, such as Complementary Pass-transistor Logic, use static
techniques to minimize power consumption. Other such logic families,
such as domino logic, use clocked dynamic techniques to minimize
size, power consumption, and delay devices.
ECL(Emitter-coupled logic)
Implementation
Operation
TTL(Transistor–transistor logic)
Implementation
Packaging
Sub-types
Applications
Analog applications
CMOS
Composition
Inversion
Duality
An important characteristic of a CMOS circuit is the duality that exists
between its PMOS transistors and NMOS transistors. A CMOS circuit
is created to allow a path always to exist from the output to either the
power source or ground. To accomplish this, the set of all paths to the
voltage source must be the complement of the set of all paths to
ground. This can be easily accomplished by defining one in terms of
the NOT of the other. Due to the De Morgan's laws based logic, the
PMOS transistors in parallel have corresponding NMOS transistors in
series while the PMOS transistors in series have corresponding
NMOS transistors in parallel.
Logic
Analog CMOS
Temperature range
Operation
IIL circuit
The heart of an I2L circuit is the common emitter open collector
inverter. Typically, an inverter consists of an NPN transistor with the
emitter connected to ground and the base biased with a forward
current. The input is supplied to the base as either a current sink (low
logic level) or as a high-z floating condition (high logic level). The
output of an inverter is at the collector. Likewise, it is either a current
sink (low logic level) or a high-z floating condition (high logic level).
Like direct-coupled transistor logic, there is no resistor between the
output (collector) of one NPN transistor and the input (base) of the
following transistor.
I2L is relatively simple to construct on an integrated circuit, and was
commonly used before the advent of CMOS logic by companies such
as Motorola (now Freescale) and Texas Instruments. In the 1975
Sinclair Radionics introduced one of the first consumer-grade digital
watches—the Black Watch which used I2L technology.
To understand how the inverter operates, it is necessary to
understand the current flow. If the bias current is shunted to ground
(low logic level), the transistor turns off and the collector floats (high
logic level). If the bias current is not shunted to ground because the
input is high-z (high logic level), the bias current flows through the
transistor to the emitter, switching on the transistor, and allowing the
collector to sink current (low logic level). Because the output of the
inverter can sink current but cannot source current, it is safe to
connect the outputs of multiple inverters together to form a wired
AND gate. When the outputs of two inverters are wired together, the
result is a two-input NOR gate because the configuration (NOT A)
AND (NOT B) is equivalent to NOT (A OR B). This logical relationship
is known as De Morgan's Theorem.
Generally, I2L gates were constructed with transistors with 1, 2 or 3
separate collectors. This fan-out of up to 3 allowed 3-input NAND or
NOR gates to be constructed very simply.