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MASTER OF TECHNOLOGY
IN
CONTROL SYSTEMS ENGINEERING
By
M.SHANKAR
R.No: 08871D7514
CERTIFICATE
I am also thankful to all staff members in the Department of Electrical and Electronics
Engineering who extended all kinds of cooperation for the completion of this work.
M. SHANKAR
(08871D7514)
ABSTRACT
The previously proposed zero voltage zero current switching full
bridge pulse width modulation converters reduce the primary current
during the freewheeling period in different ways, the primary current is
reset by utilizing a dc blocking capacitor and adding a saturable inductor in
the primary, in spite of simple additional circuit this converter is not
suitable for high power applications due to the core loss of the saturable
inductor, the primary current is reset by employing an active clamp in the
secondary side. The active clamp circuit not only clamps the secondary
rectifier voltage, but also provides zero current switching condition for the
lagging leg switches. Even though the reset time can be controlled
optimally by the active clamp circuit, the additional switch deteriotes the
overall efficiency due to the hard switching and increases cost and
complexity.
Contents iii
List of figures vi
CHAPTER-1 INTRODUCTION
Motivation for the present research work…………………………………..1
1.1 Literature Review………………………………………………………………..2
1.2 Outline of chapters……………...………………..……………………………..3
2) Mathematics
4) Programming
5) Toolboxes
6) User interface
REFERENCES 62
LIST OF FIGURES
Page No.
Fig 2.1 DPS approach for high-power applications using three single
-phase
PFC Converters 7
Fig 2.2 simplified DPS approach for high-power applications
8
Fig 2.3 DPS approach for high-power application using the three-
phase six- switches boost rectifier as a PFC
converter 9
Fig-2.6 ZVS three-level dc/dc converter with PWM control and its
wave
forms 12
Fig2.8.1 L-Type,M-type
21 Fig 2.8.2 Half-wave types, Full-wave types, ZCS circuits
21
Fig 2.9.(a) P W M 22
Fig 3.1 Circuit topology of the proposed zero voltage and zero current
full bridge PWM converter with simple auxiliary circuit
25
Fig 3.6.3(a) Mat lab/simulink main circuit connection for the recent
method converter and its wave forms
54
DECLARATION
This is certify that B.M.Ranjith , R.No.07024D0820,has done project work under my guidance
of Mr.B.J.Rajendra vara Prasad ,technical support towards the fulfillment for the award of
degree M.Tech, with specialization power systems emphasis with High voltage Engineering
External guide
Sri. B.J.Rajendra Vara Prasad
M.Tech,