A B C D E

1 1

2
Compal Confidential 2

HCW51 Schematics Document

AMD/Sempron/ATI RS485MC/SB460
2006 / 04 / 27 Rev:1.0 FOR MP
3 3

4 4

Security Classification Compal Secret Data Compal Electronics, inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期一, 五月 08, 2006 Sheet 1 of 51
A B C D E
 5 4 3 2 1

Compal confidential
Project Code: HCW51
Thermal Sensor Clock Generator AMD Turion/Sempron CPU DDRII 533/667 DDRII-SO-DIMM X2
File Name : LA-3121P
ADM1032ARM ICS951462 Socket S1 638P page 10,11
page 6,7,8,9
page 8 page 17 Dual Channel
D D

H_A#(3..31) H_D#(0..63)
HT 16x16 800MHZ

CRT & TV-OUT

page 24 ATI-RS485MC
LCD CONN 465 BGA
page 12,13,14,15,16
page 25

A-Link Express
2 x PCIE

USB 2.0 USB conn x 2 / New card

C
page 34 C

ATI-SB460 USB 2.0 BT Conn

page 38
PCI BUS 549 BGA
Audio CKT
AC-LINK AMP & Audio Jack
ALC883 page 40
page 18,19,20,21,22 page 39
Mini PCI Socket Realtek 1394 Controller
RTL8100CL ENE Controller MDC Conn.
Mini card RTL8110SCL CB714 VT6311S page 41
page 31 page 26 page 35
page 32
SATA SATA HDD Conn.
page 23
6in1 CardReader LPC BUS
RJ45 CONN Slot 0 1394
B Slot Conn. B
page 27 page 33 page 33 page 35
PATA One Channel HDD Conn.
CDROM Conn.
page 23
Power On/Off CKT / LID switch / Power OK CKT
page 37
SMsC LPC47N207 ENE KB910
page 36 page 28
DC/DC Interface CKT. CIR/LED RTC CKT.
page 41 page 38 page 18

Int. KBD
Power Circuit DC/DC FIR module page 29
page 42~48
page 36 Touch Pad
CONN. page 29
BIOS
A
page 30 A

Security Classification Compal Secret Data Compal Electronics, inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期一, 五月 08, 2006 Sheet 2 of 51
5 4 3 2 1
 5 4 3 2 1

SIGNAL
STATE SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
Voltage Rails
Full ON HIGH HIGH HIGH HIGH ON ON ON ON

Power Plane Description S1 S3 S5 S1(Power On Suspend) LOW HIGH HIGH HIGH ON ON ON LOW

VIN Adapter power supply (19V) N/A N/A N/A S3 (Suspend to RAM) LOW LOW HIGH HIGH ON ON OFF OFF
D D
B+ AC or battery power rail for power circuit. N/A N/A N/A
S4 (Suspend to Disk) LOW LOW LOW HIGH ON OFF OFF OFF
+CPU_CORE Core voltage for CPU ON OFF OFF
+0.9V 0.9V switched power rail for DDR terminator ON ON OFF S5 (Soft OFF) LOW LOW LOW LOW ON OFF OFF OFF
+1.2VS 1.05V switched power rail ON OFF OFF
+1.5VS 1.5V switched power rail ON OFF OFF
+1.8VALW 1.8V always on power rail ON ON ON* Board ID / SKU ID Table for AD channel
+1.8V 1.8V power rail for DDR ON ON OFF Vcc 3.3V +/- 5%
+1.8VS 1.8V switched power rail ON OFF OFF Ra/Rc/Re 100K +/- 5%
+2.5VS 2.5V switched power rail ON OFF OFF Board ID Rb / Rd / Rf V AD_BID min V AD_BID typ V AD_BID max
+3VALW 3.3V always on power rail ON ON ON* 0 0 0 V 0 V 0 V
+3VS 3.3V switched power rail ON OFF OFF 1 8.2K +/- 5% 0.216 V 0.250 V 0.289 V
+5VALW 5V always on power rail ON ON ON* 2 18K +/- 5% 0.436 V 0.503 V 0.538 V
+5VS 5V switched power rail ON OFF OFF 3 33K +/- 5% 0.712 V 0.819 V 0.875 V
+VSB VSB always on power rail ON ON ON* 4 56K +/- 5% 1.036 V 1.185 V 1.264 V
+RTCVCC RTC power ON ON ON 5 100K +/- 5% 1.453 V 1.650 V 1.759 V
C C
6 200K +/- 5% 1.935 V 2.200 V 2.341 V
7 NC 2.500 V 3.300 V 3.300 V

BOARD ID Table
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices Board ID PCB Revision BTO Option Table

Device IDSEL# REQ#/GNT# Interrupts
0 UMA
BTO Item BOM Structure
Ca rdBus(SD) AD20 2 PIRQE/PIRQH
1 DISCRETE
WITH TV-OUT TV@
1 394 AD16 0 PIRQE
2
WITH FIR FIR@
LAN(10/100) AD17 3 PIRQF
3
WITH CARD READER 61@
Mini-PCI(WLAN/TV-Tuner) AD18 1 PIRQG/PORQH
4
WITH 1394 1394@
5
WITH EXPRESS CARD EXPRESS@
6
WITH CIR CIR@
7
WITH LAN(10/100) 100@
B B
WITH LAN(10/100/1000) GIGA@
EC SM Bus1 address EC SM Bus2 address SKU ID Table WITH GIGA LAN(8110SBL) 8110SB@
WITH GIGA LAN(8110SCL) 8110SC@
Device Address Device Address SKU ID SKU WITH PATA HDD PATA@
Smart Battery 0001 011X b ADM1032 1001 100X b 0 W / O SATA WITH SATA HDD SATA@
EEPROM(24C16/02) 1010 000X b 1 WITH SATA WITH BLUETOOTH BT@
(24C04) 1011 000X b 2 WITH USBx2 USB2@
3 WITH LPC47N207 SIO1@
4 WITH SIO1036 SIO2@
5 WITH SIO BOTH SIOALL@
SB460 SM Bus address 6 WITH SSC SPREAD@
7 W/O SSC NOSPREAD@
Device Address DIP CAP 45@
Clock Generator 1101 001Xb
(ICS951462)
A DDR DIMM0 A
1001 000Xb
DDR DIMM2 1001 001Xb

Security Classification Compal Secret Data Compal Electronics inc

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期一, 五月 08, 2006 Sheet 3 of 51
5 4 3 2 1
 5 4 3 2 1

D D

PCI CLK0
LAN RTL8100CL
33MHZ

PCI CLK1 TP_CLK

EC-CB714 TOUCH PAD
33MHZ

HTREFCLK PCI CLK2

MINI PCI SLOT
66MHZ 33MHZ
ATI NB - RS485MC ATI SB
NB-OSC PCI CLK3
14.318MHZ SB460 33MHZ Cardbus
C
NEAR SO-DIMM REV SO-DIMM SD CLK CB714 C

48MHZ

14.318MHZ
SB-OSCIN
2 PAIR MEM CLK

2 PAIR MEM CLK

NB PCIE CLK
100MHZ PCI CLK4
SB PCIE CLK 1394
33MHZ
100MHZ VT6311S
SB-OSCIN SB-OSCIN
EXTERNAL
14.318MHZ 14.318MHZ PCI CLK5
CLK GEN.
33MHZ
SIO CLK SUPER IO
PCIE CLK
ATHLON64 S1 CPU 1 PAIR CPU CLK 14.318MHZ
100MHZ PCI EXPRESS CARD - 1 LANE
200MHZ
LGA638 PACKAGE
PCIE CLK
MINI CARD - 1 LANE
100MHZ
AZALIA_BITCLK
AZALIA CODEC
PCIE CLK
100MHZ
B B
USB CLK

25M Hz
48MHZ

SD CLK
48MHZ

SIO CLK

32.768K Hz
14.318MHZ

14.31818MHz

A A

Security Classification Compal Secret Data Compal Electronics inc

Issued Date 2005/05/09 Deciphered Date 2006/10/10 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期一, 五月 08, 2006 Sheet 4 of 51
5 4 3 2 1
 5 4 3 2 1

D D

C C

B B

A A

Security Classification Compal Secret Data Compal Electronics inc

Issued Date 2005/05/09 Deciphered Date 2006/10/10 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期一, 五月 08, 2006 Sheet 5 of 51
5 4 3 2 1
 5 4 3 2 1

PROCESSOR HYPERTRANSPORT INTERFACE

D D
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE

+1.2V_HT
JP23A
D4 VLDT_A3 VLDT_B3 AE5 1 2 C455
D3 AE4 4.7U_0805_10V4Z
VLDT_A2 VLDT_B2
D2 AE3
D1
VLDT_A1
VLDT_A0
VLDT_B1
VLDT_B0 AE2 FAN Conn
H_CADIP15 N5 T4 H_CADOP15
(12) H_CADIP15 L0_CADIN_H15 L0_CADOUT_H15 H_CADOP15 (12)
H_CADIN15 P5 T3 H_CADON15
(12) H_CADIN15 L0_CADIN_L15 L0_CADOUT_L15 H_CADON15 (12)
H_CADIP14 M3 V5 H_CADOP14
(12) H_CADIP14 L0_CADIN_H14 L0_CADOUT_H14 H_CADOP14 (12)
H_CADIN14 M4 U5 H_CADON14
(12) H_CADIN14 L0_CADIN_L14 L0_CADOUT_L14 H_CADON14 (12)
H_CADIP13 L5 V4 H_CADOP13
(12) H_CADIP13 L0_CADIN_H13 L0_CADOUT_H13 H_CADOP13 (12) +5VS
H_CADIN13 M5 V3 H_CADON13
(12) H_CADIN13 L0_CADIN_L13 L0_CADOUT_L13 H_CADON13 (12)
H_CADIP12 K3 Y5 H_CADOP12
(12) H_CADIP12 L0_CADIN_H12 L0_CADOUT_H12 H_CADOP12 (12)
H_CADIN12 K4 W5 H_CADON12
(12) H_CADIN12 L0_CADIN_L12 L0_CADOUT_L12 H_CADON12 (12)

1
H_CADIP11 H3 AB5 H_CADOP11
(12) H_CADIP11 L0_CADIN_H11 L0_CADOUT_H11 H_CADOP11 (12)
H_CADIN11 H4 AA5 H_CADON11 U1 D3
(12) H_CADIN11 L0_CADIN_L11 L0_CADOUT_L11 H_CADON11 (12)
H_CADIP10 G5 AB4 H_CADOP10 1 8 CH355PT_SOD323
W=40mils
(12) H_CADIP10 L0_CADIN_H10 L0_CADOUT_H10 H_CADOP10 (12) VEN GND
H_CADIN10 H5 AB3 H_CADON10 +5VS 2 7
(12) H_CADIN10 L0_CADIN_L10 L0_CADOUT_L10 H_CADON10 (12) VIN GND +VCC_FAN1
H_CADIP9 F3 AD5 H_CADOP9 +VCC_FAN1 3 6
(12) H_CADIP9 H_CADOP9 (12)

2
H_CADIN9 L0_CADIN_H9 L0_CADOUT_H9 H_CADON9 EN_DFAN1 VO GND
(12) H_CADIN9 F4 L0_CADIN_L9 L0_CADOUT_L9 AC5 H_CADON9 (12) (28) EN_DFAN1 4 VSET GND 5
H_CADIP8 E5 AD4 H_CADOP8 1 FAN1 1 2
(12) H_CADIP8 L0_CADIN_H8 L0_CADOUT_H8 H_CADOP8 (12)
H_CADIN8 F5 AD3 H_CADON8 G993P1U_SOP8L C83 10U_0805_10V4Z
(12) H_CADIN8 L0_CADIN_L8 L0_CADOUT_L8 H_CADON8 (12)

1
C H_CADIP7 N3 T1 H_CADOP7 C47 C
(12) H_CADIP7 L0_CADIN_H7 L0_CADOUT_H7 H_CADOP7 (12)
H_CADIN7 N2 R1 H_CADON7 10U_0805_10V4Z D4
HTT Interface

(12) H_CADIN7 L0_CADIN_L7 L0_CADOUT_L7 H_CADON7 (12) 2

H_CADIP6 L1 U2 H_CADOP6 1N4148_SOT23 1 2
(12) H_CADIP6 L0_CADIN_H6 L0_CADOUT_H6 H_CADOP6 (12)
H_CADIN6 M1 U3 H_CADON6 C90 1000P_0402_50V7K
(12) H_CADIN6 L0_CADIN_L6 L0_CADOUT_L6 H_CADON6 (12)
H_CADIP5 L3 V1 H_CADOP5
(12) H_CADIP5 H_CADOP5 (12)

2
H_CADIN5 L0_CADIN_H5 L0_CADOUT_H5 H_CADON5 JP20
(12) H_CADIN5 L2 L0_CADIN_L5 L0_CADOUT_L5 U1 H_CADON5 (12)
H_CADIP4 J1 W2 H_CADOP4 1
(12) H_CADIP4 L0_CADIN_H4 L0_CADOUT_H4 H_CADOP4 (12) +3VS 1
H_CADIN4 K1 W3 H_CADON4 2
(12) H_CADIN4 L0_CADIN_L4 L0_CADOUT_L4 H_CADON4 (12) 2
H_CADIP3 G1 AA2 H_CADOP3 3
(12) H_CADIP3 L0_CADIN_H3 L0_CADOUT_H3 H_CADOP3 (12) 3
H_CADIN3 H1 AA3 H_CADON3
(12) H_CADIN3 L0_CADIN_L3 L0_CADOUT_L3 H_CADON3 (12)

1
H_CADIP2 G3 AB1 H_CADOP2 1 4
(12) H_CADIP2 L0_CADIN_H2 L0_CADOUT_H2 H_CADOP2 (12) GND
H_CADIN2 G2 AA1 H_CADON2 R34 5
(12) H_CADIN2 L0_CADIN_L2 L0_CADOUT_L2 H_CADON2 (12) GND
H_CADIP1 E1 AC2 H_CADOP1 C92
(12) H_CADIP1 L0_CADIN_H1 L0_CADOUT_H1 H_CADOP1 (12)
H_CADIN1 F1 AC3 H_CADON1 10K_0402_5% 1000P_0402_50V7K ACES_85205-03001
(12) H_CADIN1 L0_CADIN_L1 L0_CADOUT_L1 H_CADON1 (12) 2
H_CADIP0 E3 AD1 H_CADOP0
(12) H_CADIP0 H_CADOP0 (12)

2
H_CADIN0 L0_CADIN_H0 L0_CADOUT_H0 H_CADON0
(12) H_CADIN0 E2 L0_CADIN_L0 L0_CADOUT_L0 AC1 H_CADON0 (12) (28) FAN_SPEED1
H_CLKIP1 J5 Y4 H_CLKOP1
(12) H_CLKIP1 L0_CLKIN_H1 L0_CLKOUT_H1 H_CLKOP1 (12)
H_CLKIN1 K5 Y3 H_CLKON1
(12) H_CLKIN1 L0_CLKIN_L1 L0_CLKOUT_L1 H_CLKON1 (12)
H_CLKIP0 J3 Y1 H_CLKOP0
(12) H_CLKIP0 L0_CLKIN_H0 L0_CLKOUT_H0 H_CLKOP0 (12)
+1.2V_HT H_CLKIN0 J2 W1 H_CLKON0
(12) H_CLKIN0 L0_CLKIN_L0 L0_CLKOUT_L0 H_CLKON0 (12)

R38 1 2 51_0402_1% H_CTLIP1 P3 T5

R37 1 H_CTLIN1 L0_CTLIN_H1 L0_CTLOUT_H1
2 51_0402_1% P4 L0_CTLIN_L1 L0_CTLOUT_L1 R5

H_CTLIP0 N1 R2 H_CTLOP0
(12) H_CTLIP0 L0_CTLIN_H0 L0_CTLOUT_H0 H_CTLOP0 (12)
H_CTLIN0 P1 R3 H_CTLON0
(12) H_CTLIN0 L0_CTLIN_L0 L0_CTLOUT_L0 H_CTLON0 (12)
FOX_PZ63823-284S-41F
B Athlon 64 S1 B
Processor Socket

+1.2V_HT
C145
180P_0402_50V8J
1 1 1 1 1 1
C164 C156 C158 C163
C152
180P_0402_50V8J
2 2 2 2 2 2
4.7U_0805_10V4Z 0.22U_0402_10V4Z
4.7U_0805_10V4Z 0.22U_0402_10V4Z

LAYOUT: Place bypass cap on topside of board

NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
A A
TO OTHER HT POWER PINS
PLACE CLOSE TO VLDT0 POWER PINS

Security Classification Compal Secret Data Compal Electronics inc

Issued Date 2005/05/09 Deciphered Date 2006/10/11 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期一, 五月 08, 2006 Sheet 6 of 51
5 4 3 2 1
 A B C D E

Processor DDR2 Memory Interface

VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED JP23C
(11) DDR_B_D[63..0]
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE DDR_A_D[63..0] (10)
DDR_B_D63 AD11 AA12 DDR_A_D63
DDR_B_D62 MB_DATA63 MA_DATA63 DDR_A_D62
AF11 MB_DATA62 MA_DATA62 AB12
DDR_B_D61 AF14 AA14 DDR_A_D61
DDR_B_D60 MB_DATA61 MA_DATA61 DDR_A_D60
AE14 MB_DATA60 MA_DATA60 AB14
DDR_B_D59 Y11 W11 DDR_A_D59
DDR_B_D58 MB_DATA59 MA_DATA59 DDR_A_D58
AB11 MB_DATA58 MA_DATA58 Y12
DDR_B_D57 AC12 AD13 DDR_A_D57
+1.8V DDR_B_D56 MB_DATA57 MA_DATA57 DDR_A_D56
AF13 MB_DATA56 MA_DATA56 AB13
+0.9VREF_CPU DDR_B_D55 AF15 AD15 DDR_A_D55
4 JP23B +0.9V DDR_B_D54 MB_DATA55 MA_DATA55 DDR_A_D54 4
AF16 MB_DATA54 MA_DATA54 AB15
DDR_B_D53 AC18 AB17 DDR_A_D53
MB_DATA53 MA_DATA53
1

W17 D10 DDR_B_D52 AF19 Y17 DDR_A_D52

R13 M_VREF VTT1 DDR_B_D51 MB_DATA52 MA_DATA52 DDR_A_D51
VTT2 C10 AD14 MB_DATA51 MA_DATA51 Y14
39.2_0402_1%~D PAD TP3 VTT_SENSE Y10 B10 DDR_B_D50 AC14 W14 DDR_A_D50
VTT_SENSE VTT3 DDR_B_D49 MB_DATA50 MA_DATA50 DDR_A_D49
VTT4 AD10 AE18 MB_DATA49 MA_DATA49 W16
W10 DDR_B_D48 AD18 AD17 DDR_A_D48
2

M_ZN VTT5 DDR_B_D47 MB_DATA48 MA_DATA48 DDR_A_D47

AE10 M_ZN VTT6 AC10 AD20 MB_DATA47 MA_DATA47 Y18
M_ZP AF10 AB10 DDR_B_D46 AC20 AD19 DDR_A_D46
M_ZP VTT7 DDR_B_D45 MB_DATA46 MA_DATA46 DDR_A_D45
AA10 AF23 AD21
R22 10:8:10:8:10 VTT8
A10 DDR_B_D44 AF24
MB_DATA45 MA_DATA45
AB21 DDR_A_D44
VTT9 MB_DATA44 MA_DATA44
1

39.2_0402_1%~D DDR_B_D43 AF20 AB18 DDR_A_D43

DDRII Cmd/Ctrl//Clk
DDR_CS3_DIMMA# DDR_A_CLK2 DDR_B_D42 MB_DATA43 MA_DATA43 DDR_A_D42
(10) DDR_CS3_DIMMA# V19 MA0_CS_L3 MA0_CLK_H2 Y16 DDR_A_CLK2 (10) AE20 MB_DATA42 MA_DATA42 AA18
DDR_CS2_DIMMA# J22 AA16 DDR_A_CLK#2 DDR_B_D41 AD22 AA20 DDR_A_D41
(10) DDR_CS2_DIMMA# MA0_CS_L2 MA0_CLK_L2 DDR_A_CLK#2 (10) MB_DATA41 MA_DATA41
DDR_CS1_DIMMA# V22 E16 DDR_A_CLK1 DDR_B_D40 AC22 Y20 DDR_A_D40
(10) DDR_CS1_DIMMA# MA0_CS_L1 MA0_CLK_H1 DDR_A_CLK1 (10) MB_DATA40 MA_DATA40
DDR_CS0_DIMMA# T19 F16 DDR_A_CLK#1 DDR_B_D39 AE25 AA22 DDR_A_D39
(10) DDR_CS0_DIMMA# DDR_A_CLK#1 (10)
2

MA0_CS_L0 MA0_CLK_L1 DDR_B_D38 MB_DATA39 MA_DATA39 DDR_A_D38

AD26 MB_DATA38 MA_DATA38 Y22
DDR_CS3_DIMMB# Y26 AF18 DDR_B_CLK2 DDR_B_D37 AA25 W21 DDR_A_D37
(11) DDR_CS3_DIMMB# MB0_CS_L3 MB0_CLK_H2 DDR_B_CLK2 (11) MB_DATA37 MA_DATA37
DDR_CS2_DIMMB# J24 AF17 DDR_B_CLK#2 DDR_B_D36 AA26 W22 DDR_A_D36
(11) DDR_CS2_DIMMB# MB0_CS_L2 MB0_CLK_L2 DDR_B_CLK#2 (11) MB_DATA36 MA_DATA36
DDR_CS1_DIMMB# W24 A17 DDR_B_CLK1 DDR_B_D35 AE24 AA21 DDR_A_D35
(11) DDR_CS1_DIMMB# MB0_CS_L1 MB0_CLK_H1 DDR_B_CLK1 (11) MB_DATA35 MA_DATA35
PLACE THEM CLOSE TO DDR_CS0_DIMMB# U23 A18 DDR_B_CLK#1 DDR_B_D34 AD24 AB22 DDR_A_D34
(11) DDR_CS0_DIMMB# MB0_CS_L0 MB0_CLK_L1 DDR_B_CLK#1 (11) MB_DATA34 MA_DATA34
DDR_B_D33 AA23 AB24 DDR_A_D33
CPU WITHIN 1" DDR_CKE1_DIMMB DDR_B_ODT1 DDR_B_D32 MB_DATA33 MA_DATA33 DDR_A_D32
(11) DDR_CKE1_DIMMB H26 MB_CKE1 MB0_ODT1 W23 DDR_B_ODT1 (11) AA24 MB_DATA32 MA_DATA32 Y24
DDR_CKE0_DIMMB J23 W26 DDR_B_ODT0 DDR_B_D31 G24 H22 DDR_A_D31
(11) DDR_CKE0_DIMMB MB_CKE0 MB0_ODT0 DDR_B_ODT0 (11) MB_DATA31 MA_DATA31
DDR_CKE1_DIMMA J20 V20 DDR_A_ODT1 DDR_B_D30 G23 H20 DDR_A_D30
(10) DDR_CKE1_DIMMA MA_CKE1 MA0_ODT1 DDR_A_ODT1 (10) MB_DATA30 MA_DATA30
DDR_CKE0_DIMMA J21 U19 DDR_A_ODT0 DDR_B_D29 D26 E22 DDR_A_D29
(10) DDR_CKE0_DIMMA MA_CKE0 MA0_ODT0 DDR_A_ODT0 (10) MB_DATA29 MA_DATA29
DDR_B_D28 C26 E21 DDR_A_D28
(10) DDR_A_MA[15..0] DDR_B_MA[15..0] (11) MB_DATA28 MA_DATA28
DDR_A_MA15 K19 J25 DDR_B_MA15 DDR_B_D27 G26 J19 DDR_A_D27
DDR_A_MA14 MA_ADD15 MB_ADD15 DDR_B_MA14 DDR_B_D26 MB_DATA27 MA_DATA27 DDR_A_D26
K20 MA_ADD14 MB_ADD14 J26 G25 MB_DATA26 MA_DATA26 H24
DDR_A_MA13 V24 W25 DDR_B_MA13 DDR_B_D25 E24 F22 DDR_A_D25

To reverse SODIMM socket

To normal SODIMM socket

DD RII Data
DDR_A_MA12 MA_ADD13 MB_ADD13 DDR_B_MA12 DDR_B_D24 MB_DATA25 MA_DATA25 DDR_A_D24
K24 MA_ADD12 MB_ADD12 L23 E23 MB_DATA24 MA_DATA24 F20
DDR_A_MA11 L20 L25 DDR_B_MA11 DDR_B_D23 C24 C23 DDR_A_D23
DDR_A_MA10 MA_ADD11 MB_ADD11 DDR_B_MA10 DDR_B_D22 MB_DATA23 MA_DATA23 DDR_A_D22
R19 MA_ADD10 MB_ADD10 U25 B24 MB_DATA22 MA_DATA22 B22
DDR_A_MA9 L19 L24 DDR_B_MA9 DDR_B_D21 C20 F18 DDR_A_D21
DDR_A_MA8 MA_ADD9 MB_ADD9 DDR_B_MA8 DDR_B_D20 MB_DATA21 MA_DATA21 DDR_A_D20
L22 MA_ADD8 MB_ADD8 M26 B20 MB_DATA20 MA_DATA20 E18
DDR_A_MA7 L21 L26 DDR_B_MA7 DDR_B_D19 C25 E20 DDR_A_D19
DDR_A_MA6 MA_ADD7 MB_ADD7 DDR_B_MA6 DDR_B_D18 MB_DATA19 MA_DATA19 DDR_A_D18
M19 MA_ADD6 MB_ADD6 N23 D24 MB_DATA18 MA_DATA18 D22
DDR_A_MA5 M20 N24 DDR_B_MA5 DDR_B_D17 A21 C19 DDR_A_D17
3 DDR_A_MA4 MA_ADD5 MB_ADD5 DDR_B_MA4 DDR_B_D16 MB_DATA17 MA_DATA17 DDR_A_D16 3
M24 MA_ADD4 MB_ADD4 N25 D20 MB_DATA16 MA_DATA16 G18
DDR_A_MA3 M22 N26 DDR_B_MA3 DDR_B_D15 D18 G17 DDR_A_D15
DDR_A_MA2 MA_ADD3 MB_ADD3 DDR_B_MA2 DDR_B_D14 MB_DATA15 MA_DATA15 DDR_A_D14
N22 MA_ADD2 MB_ADD2 P24 C18 MB_DATA14 MA_DATA14 C17
DDR_A_MA1 N21 P26 DDR_B_MA1 DDR_B_D13 D14 F14 DDR_A_D13
DDR_A_MA0 MA_ADD1 MB_ADD1 DDR_B_MA0 DDR_B_D12 MB_DATA13 MA_DATA13 DDR_A_D12
R21 MA_ADD0 MB_ADD0 T24 C14 MB_DATA12 MA_DATA12 E14
DDR_B_D11 A20 H17 DDR_A_D11
DDR_A_BS#2 MB_DATA11 MA_DATA11
(10) DDR_A_BS#2 K22 MA_BANK2 MB_BANK2 K26 DDR_B_BS#2 DDR_B_BS#2 (11)
DDR_B_D10 A19 MB_DATA10 MA_DATA10 E17 DDR_A_D10
DDR_A_BS#1 R20 T26 DDR_B_BS#1 DDR_B_D9 A16 E15 DDR_A_D9
(10) DDR_A_BS#1 MA_BANK1 MB_BANK1 DDR_B_BS#1 (11) MB_DATA9 MA_DATA9
DDR_A_BS#0 T22 U26 DDR_B_BS#0 DDR_B_D8 A15 H15 DDR_A_D8
(10) DDR_A_BS#0 MA_BANK0 MB_BANK0 DDR_B_BS#0 (11) MB_DATA8 MA_DATA8
DDR_B_D7 A13 E13 DDR_A_D7
DDR_A_RAS# MB_DATA7 MA_DATA7
(10) DDR_A_RAS# T20 MA_RAS_L MB_RAS_L U24 DDR_B_RAS# DDR_B_RAS# (11)
DDR_B_D6 D12 MB_DATA6 MA_DATA6 C13 DDR_A_D6
DDR_A_CAS# U20 V26 DDR_B_CAS# DDR_B_D5 E11 H12 DDR_A_D5
(10) DDR_A_CAS# MA_CAS_L MB_CAS_L DDR_B_CAS# (11) MB_DATA5 MA_DATA5
DDR_A_WE# U21 U22 DDR_B_WE# DDR_B_D4 G11 H11 DDR_A_D4
(10) DDR_A_WE# MA_WE_L MB_WE_L DDR_B_WE# (11) MB_DATA4 MA_DATA4
DDR_B_D3 B14 G14 DDR_A_D3
FOX_PZ63823-284S-41F DDR_B_D2 MB_DATA3 MA_DATA3 DDR_A_D2
A14 MB_DATA2 MA_DATA2 H14
Athlon 64 S1 DDR_B_D1 A11 F12 DDR_A_D1
Processor DDR_B_D0 MB_DATA1 MA_DATA1 DDR_A_D0
C11 MB_DATA0 MA_DATA0 G12
Socket
(11) DDR_B_DM[7..0] DDR_A_DM[7..0] (10)
DDR_B_DM7 AD12 Y13 DDR_A_DM7
DDR_B_DM6 MB_DM7 MA_DM7 DDR_A_DM6
AC16 MB_DM6 MA_DM6 AB16
DDR_B_DM5 AE22 Y19 DDR_A_DM5
DDR_B_DM4 MB_DM5 MA_DM5 DDR_A_DM4
AB26 MB_DM4 MA_DM4 AC24
DDR_A_CLK2 DDR_B_CLK2 DDR_B_DM3 E25 F24 DDR_A_DM3
DDR_B_DM2 MB_DM3 MA_DM3 DDR_A_DM2
1 1 A22 MB_DM2 MA_DM2 E19
DDR_B_DM1 B16 C15 DDR_A_DM1
C66 C35 DDR_B_DM0 MB_DM1 MA_DM1 DDR_A_DM0
A12 MB_DM0 MA_DM0 E12
1.5P_0402_50V8C 1.5P_0402_50V8C
DDR_A_CLK#2 2 DDR_B_CLK#2 2 DDR_B_DQS7 DDR_A_DQS7
(11) DDR_B_DQS7 AF12 MB_DQS_H7 MA_DQS_H7 W12 DDR_A_DQS7 (10)
DDR_B_DQS#7 AE12 W13 DDR_A_DQS#7
(11) DDR_B_DQS#7 MB_DQS_L7 MA_DQS_L7 DDR_A_DQS#7 (10)
DDR_A_CLK1 DDR_B_CLK1 DDR_B_DQS6 AE16 Y15 DDR_A_DQS6
(11) DDR_B_DQS6 MB_DQS_H6 MA_DQS_H6 DDR_A_DQS6 (10)
1 1 DDR_B_DQS#6 AD16 W15 DDR_A_DQS#6
(11) DDR_B_DQS#6 MB_DQS_L6 MA_DQS_L6 DDR_A_DQS#6 (10)
DDR_B_DQS5 AF21 AB19 DDR_A_DQS5
(11) DDR_B_DQS5 MB_DQS_H5 MA_DQS_H5 DDR_A_DQS5 (10)
C132 C173 DDR_B_DQS#5 AF22 AB20 DDR_A_DQS#5
1.5P_0402_50V8C 1.5P_0402_50V8C (11) DDR_B_DQS#5 MB_DQS_L5 MA_DQS_L5 DDR_A_DQS#5 (10)
DDR_B_DQS4 AC25 AD23 DDR_A_DQS4
2 2 (11) DDR_B_DQS4 MB_DQS_H4 MA_DQS_H4 DDR_A_DQS4 (10)
DDR_A_CLK#1 DDR_B_CLK#1 DDR_B_DQS#4 AC26 AC23 DDR_A_DQS#4
(11) DDR_B_DQS#4 MB_DQS_L4 MA_DQS_L4 DDR_A_DQS#4 (10)
DDR_B_DQS3 F26 G22 DDR_A_DQS3
(11) DDR_B_DQS3 MB_DQS_H3 MA_DQS_H3 DDR_A_DQS3 (10)
DDR_B_DQS#3 E26 G21 DDR_A_DQS#3
(11) DDR_B_DQS#3 MB_DQS_L3 MA_DQS_L3 DDR_A_DQS#3 (10)
PLACE CLOSE TO PROCESSOR PLACE CLOSE TO PROCESSOR DDR_B_DQS2 A24 C22 DDR_A_DQS2
2 (11) DDR_B_DQS2 MB_DQS_H2 MA_DQS_H2 DDR_A_DQS2 (10) 2
DDR_B_DQS#2 A23 C21 DDR_A_DQS#2
WITHIN 1.2 INCH WITHIN 1.2 INCH (11) DDR_B_DQS#2
DDR_B_DQS1 MB_DQS_L2 MA_DQS_L2 DDR_A_DQS1
DDR_A_DQS#2 (10)
(11) DDR_B_DQS1 D16 MB_DQS_H1 MA_DQS_H1 G16 DDR_A_DQS1 (10)
DDR_B_DQS#1 C16 G15 DDR_A_DQS#1
(11) DDR_B_DQS#1 MB_DQS_L1 MA_DQS_L1 DDR_A_DQS#1 (10)
DDR_B_DQS0 C12 G13 DDR_A_DQS0
(11) DDR_B_DQS0 MB_DQS_H0 MA_DQS_H0 DDR_A_DQS0 (10)
DDR_B_DQS#0 B12 H13 DDR_A_DQS#0
(11) DDR_B_DQS#0 MB_DQS_L0 MA_DQS_L0 DDR_A_DQS#0 (10)

FOX_PZ63823-284S-41F
Athlon 64 S1
Processor Socket

A1 A26
+1.8V

Athlon 64 S1g1
1

R33
uPGA638
1K_0402_1% +0.9VREF_CPU
Top View
2

CPU_VREF_REF

1 1 1 1 1
1

C32 C33 C34 C29 C28

1 R23 AF1 1
1000P_0402_50V7K 0.1U_0402_16V4Z 1U_0402_6.3V4Z
1K_0402_1% 2 2 2 2 2
2

1000P_0402_50V7K 1000P_0402_50V7K

VDD_VREF_SUS_CPU Security Classification Compal Secret Data Compal Electronics inc

LAYOUT:PLACE CLOSE TO CPU Issued Date 2005/05/09 Deciphered Date 2006/10/11 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期一, 五月 08, 2006 Sheet 7 of 51
A B C D E
 5 4 3 2 1

ATHLON Control and Debug +1.8V

LAYOUT: ROUTE VDDA TRACE APPROX.

1
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
R7 R78
+2.5VS 300_0402_5% 300_0402_5%
W=50mils JP23D

2
1 1 2 L4 F8 VDDA2 THERMTRIP_L AF6 H_THERMTRIP_S#
C506 1 1 1 F9 VDDA1 PROCHOT_L AC7 CPU_PROCHOT#_1.8
+ FCM2012C-800_0805 C189 C187 R372 1 2 300_0402_5%
C136
12/22 Modify CPU_HT_RESET# B7 RESET_L
150U_D2_6.3VM 3300P_0402_50V7K R582 1 2 @ 300_0402_5% CPU_ALL_PWROK A7
2 2 2 2 +1.8VS PWROK
R583 1 2 @ 300_0402_5% CPU_LDTSTOP# F10
D 4.7U_0805_10V4Z 0.22U_0603_16V7K LDTSTOP_L VID5 D
VID5 A5 VID5 (48)
R584 1 2 @ 0_0402_5% CPU_SIC_R AF4 C6 VID4
(18) CPU_SIC SIC VID4 VID4 (48)
R585 1 2 @ 0_0402_5% CPU_SID_R AF5 A6 VID3
(18) CPU_SID SID VID3 VID3 (48)
A4 VID2
VID2 VID2 (48)
+1.2V_HT R36 1 2 44.2_0603_1% CPU_HTREF1 P6 C5 VID1
HTREF1 VID1 VID1 (48)
R35 1 2 44.2_0603_1% CPU_HTREF0 R6 B5 VID0
HTREF0 VID0 VID0 (48)
5:10 AC6 CPU_PRESENT#
+1.8VS +3VS +1.8V CPU_VCC_SENSE CPU_PRESENT_L
(48) CPU_VCC_SENSE F6 VDD_FB_H
place them to CPU within 1" CPU_VSS_SENSE E6 A3 PSI#
(48) CPU_VSS_SENSE VDD_FB_L PSI_L PSI# (48)

1
R64 PAD TP2 W9
@ 4.7K_0402_5% C147 0.1U_0402_16V4Z PAD TP1 VDDIO_FB_H
Y9 VDDIO_FB_L
1

1 2
R63 C5011 2 CPU_CLKIN_SC_P A9
(17) CPUCLK CLKIN_H

5
300_0402_5% U5 CPU_CLKIN_SC_N A8
2
CLKIN_L

1
2 3900P_0402_50V7K

P
B R70 1 CPU_ALL_PWROK R389 C PU_DBRDY CPU_DBREQ#
4 2 G10 E10
2

Y 0_0402_5% 169_0402_1% DBRDY DBREQ_L

(18,19) CPU_PWRGD 1 A

G
CPU_TMS AA9
NC7SZ08P5X_NL_SC70-5 CPU_TCK TMS CPU_TDO
AC9 AE9
3

2
C5021 CPU_TRST# TCK TDO
(17) CPUCLK# 2 AD9 TRST_L
CPU_TDI AF9
R543 1 TDI
2 0_0402_5% @ 3900P_0402_50V7K R68
CPU_TEST25_H_BYPASSCLK_H E9 C9 CPU_TEST29_H_FBCLKOUT_P 1 2
CPU_TEST25_L_BYPASSCLK_L TEST25_H TEST29_H CPU_TEST29_L_FBCLKOUT_N 80.6_0402_1%
E8 TEST25_L TEST29_L C8 ROUTE AS 80 Ohm DIFFERENTIAL PAIR
+1.8VS CPU_TEST19_PLLTEST0 PLACE IT CLOSE TO CPU WITHIN 1"
+1.8V CPU_TEST18_PLLTEST1
G9
H10
TEST19 5:5:5

MISC
C155 0.1U_0402_16V4Z TEST18
AA7 TEST13
1

1 2 C2 TEST9
R88 D7 AE7
TEST17 TEST24
5

300_0402_5% U8 E7 AD7
TEST16 TEST23
2 F7 AE8
P

B R79 1 CPU_LDTSTOP# TEST15 TEST22 CPU_TEST21_SCANEN

4 2 C7 AB8
2

Y 0_0402_5% TEST14 TEST21

(14,19) LDT_STOP# 1 A AC8 TEST12 TEST20 AF7
G

NC7SZ08P5X_NL_SC70-5 C3 J7
3

TEST7 TEST28_H
AA6 TEST6 TEST28_L H8
C CPU_THERMDC C
W7 THERMDC TEST27 AF8
R544 1 2 0_0402_5% @ CPU_THERMDA W8 AE6 CPU_TEST26_BURNIN#
THERMDA TEST26
10:10 Y6
AB6
TEST3 TEST10 K8
C4
+1.8VS TEST2 TEST8
P20 RSVD0 RSVD8 H16
P19 RSVD1 RSVD9 B18
N20 RSVD2
1

N19 RSVD3 RSVD10 B3

R71 +1.8V C1
300_0402_5% C282 0.1U_0402_16V4Z RSVD11
1 2 RSVD12 H6
G6
2

RSVD13
5

U6 D5
SB_PWROK_R RSVD14
1 2 2
P

(19,37) SB_PWROK B
R82 0_0402_5% 4 R65 1 2 CPU_HT_RESET# R24
LDT_RST# Y 0_0402_5% RSVD15
(18) LDT_RST# 1 A RSVD16 W18
G

R26 RSVD4 RSVD17 R23

NC7SZ08P5X_NL_SC70-5 R25 AA8
3

RSVD5 RSVD18
P22 RSVD6 RSVD19 H18
R22 RSVD7 RSVD20 H19

R545 1 2 0_0402_5% @
FOX_PZ63823-284S-41F

AMD NPT S1 SOCKET

Processor Socket

+1.8V
R361 1@ 220_0402_5%

R362 1@ 220_0402_5%

R363 1@ 220_0402_5%

R364 1@ 220_0402_5%

R365 1@ 220_0402_5%

HDT Connector
+1.8V
+3VALW
B +1.8V B

1
JP4 +1.8V +3VALW

1
R4
1 2 +3VS +3VALW R2
3 4

1
1K_0402_5% @ 1K_0402_5%
2

CPU_DBREQ# 5 6 R3

2
C PU_DBRDY 7 8 R5

2 2
9 10
1

CPU_TCK R572 300_0402_5% 10K_0402_5%

11 12

2
CPU_TMS 220_0402_5% Q2

2
13 14
@

CPU_TDI Q3 @ MMBT3904_SOT23
CPU_TRST# 15 16 H_THERMTRIP_S#
17 18 3 1H_THERMTRIP# 3 1 MAINPWON (42,43,45)
2

CPU_TDO MMBT3904_SOT23
G
2

19 20
21 22 H_THERMTRIP# (19)
3V_LDT_RST# 1 3 CPU_HT_RESET#
23 24
D

26
NOTE: HDT TERMINATION IS REQUIRED
FOR REV. Ax SILICON ONLY. SAMTEC_ASP-68200-07 Q33
@ @ 2N7002_SOT23 +1.8V

CPU_TEST26_BURNIN# R366 1 2 300_0402_5% +1.8V

CPU_PRESENT# R369 1 2 1K_0402_5%
CPU_TEST25_H_BYPASSCLK_H R47 1 2 510_0402_5%

1
+3VS
R8
+3VS
10K_0402_5%

CPU_PH_G 2
1
1

C454

1
R374
0.1U_0402_16V4Z @ 10K_0402_5% CPU_TEST21_SCANEN R368 1 2 300_0402_5% R6
2 CPU_TEST25_L_BYPASSCLK_L R54 1 510_0402_5% 4.7K_0402_5%
1 2
C451 CPU_TEST19_PLLTEST0 R92 1 2 300_0402_5% @
2

U38 CPU_TEST18_PLLTEST1 R91 1 2 300_0402_5%

2
2
B
2200P_0402_50V7K CPU_THERMDA 2 1 Q4
A 2 D+ VDD1 A

E
CPU_THERMDC 3 6 CPU_PROCHOT#_1.8 3 1
D- ALERT# EC_THERM# (19,28)

C
MMBT3904_SOT23
EC_SMB_CK2 8 4
(28) EC_SMB_CK2 SCLK THERM#
EC_SMB_DA2 7 5
(28) EC_SMB_DA2 SDATA GND

ADM1032ARM_RM8

U4524 CLOSE CPU,

Security Classification Compal Secret Data Compal Electronics, Inc.
CPU_THERMDA&CPU_THERMDC PLACE Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
CLOSE TO PROCESSOR WITHIN 1" INCH SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 五月 10, 2006 Sheet 8 of 51
5 4 3 2 1
 5 4 3 2 1

+CPU_CORE

1 1 1 1
+ C505 + C504 + C453 + C452
@ @
330U_D2E_2.5VM_R9 330U_D2E_2.5VM_R9 330U_D2E_2.5VM_R9 330U_D2E_2.5VM_R9
2 2 2 2

D D

+CPU_CORE +CPU_CORE

10U_0805_10V6M 10U_0805_10V6M 10U_0805_10V6M

1 1 1 1 1 1 1 1 1
C195 C17 C194 C193 C192 C97 C16
+ C450 + C449
10U_0805_10V6M 820U_E9_2.5V_M_R7 820U_E9_2.5V_M_R7
2 2 2 2 2 2 2 45@ 45@
10U_0805_10V6M 10U_0805_10V6M 10U_0805_10V6M 2 2

AA4
JP23F
VSS1 VSS66 J6 CPU SOCKET S1 DECOUPLING
AA11 VSS2 VSS67 J8
+CPU_CORE +CPU_CORE AA13 J10
JP23E VSS3 VSS68
AA15 VSS4 VSS69 J12
AC4 VDD1 V12 AA17 J14 +CPU_CORE
VDD43 VSS5 VSS70
AD2 VDD2 VDD44 V14 AA19 VSS6 VSS71 J16
G4 VDD3 VDD45 W4 AB2 VSS7 VSS72 J18
H2 VDD4 VDD46 Y2 AB7 VSS8 VSS73 K2 1 1 1 1 1 1 1 1 1
J9 VDD5 J15 AB9 K7 C73 C76 C86 C118 C109 C96 C89 C113 C124
VDD47 VSS9 VSS74
J11 VDD6 VDD48 K16 AB23 VSS10 VSS75 K9
J13 VDD7 L15 AB25 K11 22U_0805_6.3V6M 22U_0805_6.3V6M 10U_0805_10V6M 22U_0805_6.3V6M 10U_0805_10V6M 10U_0805_10V6M 10U_0805_10V6M 10U_0805_10V6M 22U_0805_6.3V6M
VDD49 VSS11 VSS76 2 2 2 2 2 2 2 2 2
K6 VDD8 VDD50 M16 AC11 VSS12 VSS77 K13
K10 VDD9 VDD51 P16 AC13 VSS13 VSS78 K15
K12 VDD10 VDD52 T16 AC15 VSS14 VSS79 K17
K14 VDD11 VDD53 U15 AC17 VSS15 VSS80 L6
L4 VDD12 VDD54 V16 AC19 VSS16 VSS81 L8
L7 VDD13 +1.8V AC21 L10
VSS17 VSS82
L9 VDD14 AD6 VSS18 VSS83 L12
L11 VDD15 H25 AD8 L14 +CPU_CORE +1.8V
VDDIO1 VSS19 VSS84
L13 VDD16 VDDIO2 J17 AD25 VSS20 VSS85 L16
M2 VDD17 VDDIO3 K18 AE11 VSS21 VSS86 L18
C C
M6 VDD18 VDDIO4 K21 AE13 VSS22 VSS87 M7 1 1 1 1 1 1 1 1
M8 VDD19 K23 AE15 M9 C70 C120 C82 C102 C72 C116
VDDIO5 VSS23 VSS88 C100 C91
M10 VDD20 K25 AE17 M11
Power

VDDIO6 VSS24 VSS89 0.22U_0402_10V4Z 0.22U_0402_10V4Z 180P_0402_50V8J 0.01U_0402_16V7K 10U_0805_10V6M 10U_0805_10V6M 0.22U_0402_10V4Z 0.22U_0402_10V4Z
N7 VDD21 VDDIO7 L17 AE19 VSS25 VSS90 M17
2 2 2 2 2 2 2 2
N9 VDD22 VDDIO8 M18 AE21 VSS26 VSS91 N4
N11 VDD23 VDDIO9 M21 AE23 VSS27 VSS92 N8
P8 VDD24 VDDIO10 M23 B4 VSS28 VSS93 N10
P10 VDD25 VDDIO11 M25 B6 VSS29 VSS94 N16
R4 VDD26 N17 B8 N18

Ground
VDDIO12 VSS30 VSS95
R7 VDD27 VDDIO13 P18 B9 VSS31 VSS96 P2
R9 VDD28 VDDIO14 P21 B11 VSS32 VSS97 P7
R11 VDD29 VDDIO15 P23 B13 VSS33 VSS98 P9
T2 VDD30 VDDIO16 P25 B15 VSS34 VSS99 P11
T6 VDD31 VDDIO17 R17 B17 VSS35 VSS100 P17
T8 VDD32 VDDIO18 T18 B19 VSS36 VSS101 R8
T10 VDD33 VDDIO19 T21 B21 VSS37 VSS102 R10
T12 VDD34 VDDIO20 T23 B23 VSS38 VSS103 R16
T14 VDD35 VDDIO21 T25 B25 VSS39 VSS104 R18
U7 VDD36 U17 D6 T7
U9 VDD37
VDDIO22
VDDIO23 V18 D8
VSS40
VSS41
VSS105
VSS106 T9 DECOUPLING BETWEEN PROCESSOR AND DIMMs
U11 VDD38 VDDIO24 V21 D9 VSS42 VSS107 T11
U13 VDD39 V23 D11 T13
V6 VDD40
VDDIO25
VDDIO26 V25 D13
VSS43
VSS44
VSS108
VSS109 T15 PLACE CLOSE TO PROCESSOR AS POSSIBLE
V8 VDD41 VDDIO27 Y25 D15 VSS45 VSS110 T17
V10 VDD42 D17 VSS46 VSS111 U4
D19 VSS47 VSS112 U6
FOX_PZ63823-284S-41F D21 U8 +1.8V
VSS48 VSS113
D23 VSS49 VSS114 U10
Athlon 64 S1 D25 U12
Processor Socket VSS50 VSS115
E4 VSS51 VSS116 U14 1 1 1 1 1 1 1
F2 U16 C472 C471 C479 C480 C104 C84 C129
VSS52 VSS117
F11 VSS53 VSS118 U18
F13 V2 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z
VSS54 VSS119 2 2 2 2 2 2 2
F15 VSS55 VSS120 V7
F17 VSS56 VSS121 V9
F19 VSS57 VSS122 V11
F21 VSS58 VSS123 V13
F23 VSS59 VSS124 V15 1 1 1 1 1
B C127 C128 C85 B
F25 VSS60 VSS125 V17
H7 W6 C68 C105
VSS61 VSS126 0.22U_0402_10V4Z 0.01U_0402_16V7K 0.01U_0402_16V7K 180P_0402_50V8J 180P_0402_50V8J
H9 VSS62 VSS127 Y21
2 2 2 2 2
H21 VSS63 VSS128 Y23
H23 VSS64 VSS129 N6
J4 VSS65
FOX_PZ63823-284S-41F
+0.9V
Athlon 64 S1
Processor Socket
1 1 1 1 1 1 1 1
C188 C30 C36 C181 C184 C185 C27 C23

4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 4.7U_0805_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z 0.22U_0402_10V4Z

2 2 2 2 2 2 2 2

1 1 1 1 1 1 1 1
C39 C41 C178 C22
C179 C26 C175 C182
1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 1000P_0402_50V7K 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J 180P_0402_50V8J
2 2 2 2 2 2 2 2

A1 A26

Athlon 64 S1g1
uPGA638
Top View
A PROCESSOR POWER AND GROUND A

AF1

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS C 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 五月 10, 2006 Sheet 9 of 51
5 4 3 2 1
 5 4 3 2 1

+1.8V +1.8V +DIMM_VREF +1.8V +1.8V

C640 C642 C644 C646 C648 C650

1
0.1U_0402_16V4Z
R398 4.7U_0805_6.3V6K4.7U_0805_6.3V6K0.01U_0402_16V7K10P_0402_25V8K 0.22U_0603_16V7K0.22U_0603_16V7K
JP19 C507 1 1 1 1 1 1 1 1 1 1 1 1 1 1
1 VREF VSS 2 1 1
3 4 DDR_A_D4 1K_0402_1% C652
VSS DQ4

C503
4.7U_0805_10V4Z
DDR_A_D0 5 6 DDR_A_D5 0.22U_0603_16V7K

2
DDR_A_D1 DQ0 DQ5 2 2 2 2 2 2 2 2 2 2 2 2 2 2
7 DQ1 VSS 8
DDR_A_DM0 2 2 C639 C641 C643 C645 C647 C649 C651
9 VSS DM0 10
D DDR_A_DQS#0 4.7U_0805_6.3V6K4.7U_0805_6.3V6K0.01U_0402_16V7K10P_0402_25V8K 0.22U_0603_16V7K0.22U_0603_16V7K0.22U_0603_16V7K D
11 DQS0# VSS 12
DDR_A_DQS0 13 14 DDR_A_D6
DQS0 DQ6

1
15 16 DDR_A_D7 R397
DDR_A_D2 VSS DQ7
17 DQ2 VSS 18
DDR_A_D3 19 20 DDR_A_D12
DQ3 DQ12 DDR_A_D13 1K_0402_1%
21 VSS DQ13 22
DDR_A_D8 23 24

2
DDR_A_D9 DQ8 VSS DDR_A_DM1 +1.8V
25 DQ9 DM1 26
27 VSS VSS 28
DDR_A_DQS#1 29 30 DDR_A_CLK1
DQS1# CK0 DDR_A_CLK1 (7)
DDR_A_DQS1 31 32 DDR_A_CLK#1
DQS1 CK0# DDR_A_CLK#1 (7)
33 VSS VSS 34
DDR_A_D10 35 36 DDR_A_D14
DQ10 DQ14

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z
DDR_A_D11 37 38 DDR_A_D15 1
DQ11 DQ15
39 VSS VSS 40 1 1 1 1 1 1 1 1 1 1
+ C477
220U_D2_4VM_R15

C470

C475

C473

C463
C62

C77

C98

C55

C57

C58
41 VSS VSS 42
DDR_A_D16 DDR_A_D20 2 2 2 2 2 2 2 2 2 2 2
43 DQ16 DQ20 44
DDR_A_D17 45 46 DDR_A_D21 DDR_A_D[0..63]
DQ17 DQ21 (7) DDR_A_D[0..63]
47 VSS VSS 48
DDR_A_DQS#2 49 50 DDR_A_DM[0..7]
DQS2# NC (7) DDR_A_DM[0..7]
DDR_A_DQS2 51 52 DDR_A_DM2
DQS2 DM2 DDR_A_DQS[0..7]
53 VSS VSS 54 (7) DDR_A_DQS[0..7]
DDR_A_D18 55 56 DDR_A_D22
DDR_A_D19 DQ18 DQ22 DDR_A_D23 DDR_A_MA[0..15]
57 DQ19 DQ23 58 (7) DDR_A_MA[0..15]
59 VSS VSS 60
DDR_A_D24 61 62 DDR_A_D28 DDR_A_DQS#[0..7]
DDR_A_D25 DQ24 DQ28 DDR_A_D29 (7) DDR_A_DQS#[0..7] +0.9V
63 DQ25 DQ29 64
65 VSS VSS 66
C DDR_A_DM3 DDR_A_DQS#3 C
67 DM3 DQS3# 68
69 70 DDR_A_DQS3
NC DQS3

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
71 VSS VSS 72
DDR_A_D26 73 74 DDR_A_D30 1
DDR_A_D27 DQ26 DQ30 DDR_A_D31 C636
75 DQ27 DQ31 76 1 1 1 1 1 1 1 1 1 1 1 1 1 1
77 78 +
DDR_CKE0_DIMMA VSS VSS DDR_CKE1_DIMMA
(7) DDR_CKE0_DIMMA 79 CKE0 NC/CKE1 80 DDR_CKE1_DIMMA (7)
81 82 150U_D2_6.3VM
DDR_CS2_DIMMA# VDD VDD DDR_A_MA15 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
(7) DDR_CS2_DIMMA# 83 NC NC/A15 84

C114

C107

C101
C63

C67

C71

C80

C95

C69

C74

C88

C45

C65

C51
DDR_A_BS#2 85 86 DDR_A_MA14
(7) DDR_A_BS#2 BA2 NC/A14
87 VDD VDD 88
DDR_A_MA12 89 90 DDR_A_MA11
DDR_A_MA9 A12 A11 DDR_A_MA7
91 A9 A7 92
DDR_A_MA8 93 94 DDR_A_MA6 Layout Note:
A8 A6
95 96
DDR_A_MA5 97
VDD VDD
98 DDR_A_MA4 Place one cap close to every 2 pullup
DDR_A_MA3 A5 A4 DDR_A_MA2
99 A3 A2 100 resistors terminated to +0.9V
DDR_A_MA1 101 102 DDR_A_MA0
A1 A0
103 VDD VDD 104
DDR_A_MA10 105 106 DDR_A_BS#1 +0.9V
A10/AP BA1 DDR_A_BS#1 (7)
DDR_A_BS#0 107 108 DDR_A_RAS#
(7) DDR_A_BS#0 BA0 RAS# DDR_A_RAS# (7)
DDR_A_WE# 109 110 DDR_CS0_DIMMA#
(7) DDR_A_WE# WE# S0# DDR_CS0_DIMMA# (7)
111 112 DDR_CKE0_DIMMA 1 4
DDR_A_CAS# VDD VDD DDR_A_ODT0 DDR_CS2_DIMMA#
(7) DDR_A_CAS# 113 CAS# ODT0 114 DDR_A_ODT0 (7) 2 3
DDR_CS1_DIMMA# 115 116 DDR_A_MA13 RP28 47_0404_4P2R_5%
(7) DDR_CS1_DIMMA# NC/S1# NC/A13
117 118 DDR_A_BS#2 1 4 1 4 DDR_A_MA15
DDR_A_ODT1 VDD VDD DDR_CS3_DIMMA# DDR_A_MA12 DDR_CKE1_DIMMA
(7) DDR_A_ODT1 119 NC/ODT1 NC 120 DDR_CS3_DIMMA# (7) 2 3 2 3
121 122 RP25 47_0404_4P2R_5% RP22 47_0404_4P2R_5%
DDR_A_D32 VSS VSS DDR_A_D36 DDR_A_MA9 DDR_A_MA7
123 DQ32 DQ36 124 1 4 1 4
DDR_A_D33 125 126 DDR_A_D37 DDR_A_MA8 2 3 2 3 DDR_A_MA14
B DQ33 DQ37 RP21 47_0404_4P2R_5% RP17 47_0404_4P2R_5% B
127 VSS VSS 128
DDR_A_DQS#4 129 130 DDR_A_DM4 DDR_A_MA5 1 4 1 4 DDR_A_MA6
DDR_A_DQS4 DQS4# DM4 DDR_A_MA3 DDR_A_MA11
131 DQS4 VSS 132 2 3 2 3
133 134 DDR_A_D38 RP18 47_0404_4P2R_5% RP14 47_0404_4P2R_5%
DDR_A_D34 VSS DQ38 DDR_A_D39 DDR_A_MA1 DDR_A_MA2
135 DQ34 DQ39 136 1 4 1 4
DDR_A_D35 137 138 DDR_A_MA10 2 3 2 3 DDR_A_MA4
DQ35 VSS DDR_A_D44 RP13 47_0404_4P2R_5% RP10 47_0404_4P2R_5%
139 VSS DQ44 140
DDR_A_D40 141 142 DDR_A_D45 DDR_A_BS#0 1 4 1 4 DDR_A_BS#1
DDR_A_D41 DQ40 DQ45 DDR_A_WE# DDR_A_MA0
143 DQ41 VSS 144 2 3 2 3
145 146 DDR_A_DQS#5 RP9 47_0404_4P2R_5% RP6 47_0404_4P2R_5%
DDR_A_DM5 VSS DQS5# DDR_A_DQS5 DDR_A_CAS# DDR_CS0_DIMMA#
147 DM5 DQS5 148 1 4 1 4
149 150 DDR_CS1_DIMMA# 2 3 2 3 DDR_A_RAS#
DDR_A_D42 VSS VSS DDR_A_D46 RP5 47_0404_4P2R_5% RP2 47_0404_4P2R_5%
151 DQ42 DQ46 152
DDR_A_D43 153 154 DDR_A_D47 DDR_A_ODT1 R32 1 2 47_0402_1% 1 4 DDR_A_MA13
DQ43 DQ47 DDR_CS3_DIMMA# R28
155 VSS VSS 156 1 2 47_0402_1% 2 3 DDR_A_ODT0
DDR_A_D48 157 158 DDR_A_D52 RP1 47_0404_4P2R_5%
DDR_A_D49 DQ48 DQ52 DDR_A_D53
159 DQ49 DQ53 160
161 VSS VSS 162
163 164 DDR_A_CLK2 +0.9V +1.8V
NC,TEST CK1 DDR_A_CLK2 (7)
165 166 DDR_A_CLK#2
VSS CK1# DDR_A_CLK#2 (7)

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
DDR_A_DQS#6 167 168
DDR_A_DQS6 DQS6# VSS DDR_A_DM6
169 DQS6 DM6 170
171 VSS VSS 172 1 1 1 1 1 1 1 1 1
DDR_A_D50 173 174 DDR_A_D54
DDR_A_D51 DQ50 DQ54 DDR_A_D55
175 DQ51 DQ55 176
177 VSS VSS 178
DDR_A_D56 DDR_A_D60 2 2 2 2 2 2 2 2 2
179 DQ56 DQ60 180

C616

C617

C618

C619

C620

C621

C622

C623
C56
DDR_A_D57 181 182 DDR_A_D61
DQ57 DQ61
183 VSS VSS 184
DDR_A_DM7 185 186 DDR_A_DQS#7
A DM7 DQS7# DDR_A_DQS7 A
187 VSS DQS7 188
DDR_A_D58 189 190 Layout Note:
DDR_A_D59 DQ58 VSS DDR_A_D62
191 192
193
DQ59 DQ62
194 DDR_A_D63 Place one 0.1uF cap close to every 2 pullup
SB_CK_SDAT VSS DQ63
(11,17,19,31,34) SB_CK_SDAT 195 SDA VSS 196 resistors terminated to +0.9V
SB_CK_SCLK 197 198 R12 1 2 10K_0402_5%
(11,17,19,31,34) SB_CK_SCLK SCL SAO
199 200 R10 1 2 10K_0402_5%
+3VS
1
C448
VDDSPD SA1 Security Classification Compal Secret Data Compal Electronics. inc.
Issued Date 2005/05/09 Deciphered Date 2006/10/11 Title
P-TWO_A5692C-A0G16 SCHEMATIC, M/B LA-3121P
0.1U_0402_16V4Z
2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 五月 10, 2006 Sheet 10 of 51
5 4 3 2 1
 5 4 3 2 1

DDR_B_D[0..63]
+1.8V +1.8V +DIMM_VREF (7) DDR_B_D[0..63]
DDR_B_DM[0..7]
(7) DDR_B_DM[0..7]
DDR_B_DQS[0..7]
(7) DDR_B_DQS[0..7]

0.1U_0402_16V4Z
4.7U_0805_10V4Z

C202

C198
JP18 DDR_B_MA[0..15]
(7) DDR_B_MA[0..15]
1 VREF VSS 2 1 1
3 4 DDR_B_D4 DDR_B_DQS#[0..7]
DDR_B_D0 VSS DQ4 DDR_B_D5 (7) DDR_B_DQS#[0..7]
5 DQ0 DQ5 6
DDR_B_D1 7 8
DQ1 VSS DDR_B_DM0 2 2
9 VSS DM0 10
D DDR_B_DQS#0 D
11 DQS0# VSS 12
DDR_B_DQS0 13 14 DDR_B_D6
DQS0 DQ6 DDR_B_D7 +1.8V
15 VSS DQ7 16
DDR_B_D2 17 18
DDR_B_D3 DQ2 VSS DDR_B_D12
19 DQ3 DQ12 20
21 22 DDR_B_D13
DDR_B_D8 VSS DQ13
23 DQ8 VSS 24
DDR_B_D9 25 26 DDR_B_DM1
DQ9 DM1

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z

4.7U_0805_10V4Z
27 VSS VSS 28 1
DDR_B_DQS#1 29 30 DDR_B_CLK1 1 1 1 1 1 1 1 1 1 1
DQS1# CK0 DDR_B_CLK1 (7) + C633
DDR_B_DQS1 31 32 DDR_B_CLK#1
DQS1 CK0# DDR_B_CLK#1 (7)
33 34 220U_D2_4VM_R15
VSS VSS

C103

C125
C52

C99

C59

C64

C53

C81

C78

C61
DDR_B_D10 35 36 DDR_B_D14
DDR_B_D11 DQ10 DQ14 DDR_B_D15 2 2 2 2 2 2 2 2 2 2 2
37 DQ11 DQ15 38
39 VSS VSS 40

41 VSS VSS 42
DDR_B_D16 43 44 DDR_B_D20
DDR_B_D17 DQ16 DQ20 DDR_B_D21
45 DQ17 DQ21 46
47 VSS VSS 48
DDR_B_DQS#2 49 50
DDR_B_DQS2 DQS2# NC DDR_B_DM2
51 DQS2 DM2 52
53 54 +0.9V
DDR_B_D18 VSS VSS DDR_B_D22
55 DQ18 DQ22 56
DDR_B_D19 57 58 DDR_B_D23
DQ19 DQ23
59 VSS VSS 60

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
DDR_B_D24 61 62 DDR_B_D28
DDR_B_D25 DQ24 DQ28 DDR_B_D29
63 DQ25 DQ29 64
65 VSS VSS 66 1 1 1 1 1 1 1 1 1 1 1 1
C DDR_B_DM3 DDR_B_DQS#3 C
67 DM3 DQS3# 68
69 70 DDR_B_DQS3
NC DQS3
71 VSS VSS 72
DDR_B_D26 DDR_B_D30 2 2 2 2 2 2 2 2 2 2 2 2
73 DQ26 DQ30 74

C4

C7

C8

C9
C10

C13

C18

C11

C14

C19

C15

C20
DDR_B_D27 75 76 DDR_B_D31
DQ27 DQ31
77 VSS VSS 78
DDR_CKE0_DIMMB 79 80 DDR_CKE1_DIMMB
(7) DDR_CKE0_DIMMB CKE0 NC/CKE1 DDR_CKE1_DIMMB (7)
81 VDD VDD 82
DDR_CS2_DIMMB# 83 84 DDR_B_MA15 Layout Note:
(7) DDR_CS2_DIMMB# NC NC/A15
DDR_B_BS#2 85 86 DDR_B_MA14
(7) DDR_B_BS#2 BA2 NC/A14 Place one cap close to every 2 pullup
87 VDD VDD 88
DDR_B_MA12 89 90 DDR_B_MA11 resistors terminated to +0.9V
DDR_B_MA9 A12 A11 DDR_B_MA7
91 A9 A7 92
DDR_B_MA8 93 94 DDR_B_MA6
A8 A6
95 VDD VDD 96
DDR_B_MA5 97 98 DDR_B_MA4 +0.9V
DDR_B_MA3 A5 A4 DDR_B_MA2
99 A3 A2 100
DDR_B_MA1 101 102 DDR_B_MA0
A1 A0 DDR_CS2_DIMMB#
103 VDD VDD 104 1 4
DDR_B_MA10 105 106 DDR_B_BS#1 DDR_CKE0_DIMMB 2 3
A10/AP BA1 DDR_B_BS#1 (7)
DDR_B_BS#0 107 108 DDR_B_RAS# RP27 47_0404_4P2R_5%
(7) DDR_B_BS#0 BA0 RAS# DDR_B_RAS# (7)
DDR_B_WE# 109 110 DDR_CS0_DIMMB# DDR_B_MA12 1 4 1 4 DDR_CKE1_DIMMB
(7) DDR_B_WE# WE# S0# DDR_CS0_DIMMB# (7)
111 112 DDR_B_BS#2 2 3 2 3 DDR_B_MA15
DDR_B_CAS# VDD VDD DDR_B_ODT0 RP24 47_0404_4P2R_5% RP26 47_0404_4P2R_5%
(7) DDR_B_CAS# 113 CAS# ODT0 114 DDR_B_ODT0 (7)
DDR_CS1_DIMMB# 115 116 DDR_B_MA13 DDR_B_MA8 1 4 1 4 DDR_B_MA14
(7) DDR_CS1_DIMMB# NC/S1# NC/A13
117 118 DDR_B_MA9 2 3 2 3 DDR_B_MA11
DDR_B_ODT1 VDD VDD DDR_CS3_DIMMB# RP19 47_0404_4P2R_5% RP23 47_0404_4P2R_5%
(7) DDR_B_ODT1 119 NC/ODT1 NC 120 DDR_CS3_DIMMB# (7)
121 122 DDR_B_MA3 1 4 1 4 DDR_B_MA7
DDR_B_D32 VSS VSS DDR_B_D36 DDR_B_MA5 DDR_B_MA6
123 DQ32 DQ36 124 2 3 2 3
DDR_B_D33 125 126 DDR_B_D37 RP15 47_0404_4P2R_5% RP20 47_0404_4P2R_5%
B DQ33 DQ37 DDR_B_MA10 DDR_B_MA4 B
127 VSS VSS 128 1 4 1 4
DDR_B_DQS#4 129 130 DDR_B_DM4 DDR_B_MA1 2 3 2 3 DDR_B_MA2
DDR_B_DQS4 DQS4# DM4 RP11 47_0404_4P2R_5% RP16 47_0404_4P2R_5%
131 DQS4 VSS 132
133 134 DDR_B_D38 DDR_B_WE# 1 4 1 4 DDR_B_MA0
DDR_B_D34 VSS DQ38 DDR_B_D39 DDR_B_BS#0 DDR_B_BS#1
135 DQ34 DQ39 136 2 3 2 3
DDR_B_D35 137 138 RP8 47_0404_4P2R_5% RP12 47_0404_4P2R_5%
DQ35 VSS DDR_B_D44 DDR_CS0_DIMMB# DDR_B_CAS#
139 VSS DQ44 140 1 4 1 4
DDR_B_D40 141 142 DDR_B_D45 DDR_B_RAS# 2 3 2 3 DDR_CS1_DIMMB#
DDR_B_D41 DQ40 DQ45 RP7 47_0404_4P2R_5% RP3 47_0404_4P2R_5%
143 DQ41 VSS 144
145 146 DDR_B_DQS#5 DDR_B_ODT1 R29 1 2 47_0402_1% 1 4 DDR_B_ODT0
DDR_B_DM5 VSS DQS5# DDR_B_DQS5 DDR_CS3_DIMMB# R30
147 DM5 DQS5 148 1 2 47_0402_1% 2 3 DDR_B_MA13
149 150 RP4 47_0404_4P2R_5%
DDR_B_D42 VSS VSS DDR_B_D46
151 DQ42 DQ46 152
DDR_B_D43 153 154 DDR_B_D47
DQ43 DQ47
155 VSS VSS 156
DDR_B_D48 157 158 DDR_B_D52
DDR_B_D49 DQ48 DQ52 DDR_B_D53
159 DQ49 DQ53 160
161 162 +0.9V +1.8V
VSS VSS DDR_B_CLK2
163 NC,TEST CK1 164 DDR_B_CLK2 (7)

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z
165 166 DDR_B_CLK#2
VSS CK1# DDR_B_CLK#2 (7)
DDR_B_DQS#6 167 168
DDR_B_DQS6 DQS6# VSS DDR_B_DM6
169 DQS6 DM6 170 1 1 1 1 1 1 1 1 1 1 1
171 VSS VSS 172
DDR_B_D50 173 174 DDR_B_D54
DDR_B_D51 DQ50 DQ54 DDR_B_D55
175 DQ51 DQ55 176
2 2 2 2 2 2 2 2 2 2 2
177 VSS VSS 178

C624

C625

C626

C627

C12

C628

C629

C630

C631
C5

C6
DDR_B_D56 179 180 DDR_B_D60
DDR_B_D57 DQ56 DQ60 DDR_B_D61
181 DQ57 DQ61 182
183 VSS VSS 184
DDR_B_DM7 185 186 DDR_B_DQS#7 Layout Note:
A DM7 DQS7# DDR_B_DQS7 A
187 188
DDR_B_D58 189
VSS DQS7
190 Place one 0.1uF cap close to every 2 pullup
DDR_B_D59 DQ58 VSS DDR_B_D62
191 DQ59 DQ62 192 resistors terminated to +0.9V
193 194 DDR_B_D63
SB_CK_SDAT VSS DQ63
(10,17,19,31,34) SB_CK_SDAT 195 SDA VSS 196
SB_CK_SCLK 197 198 R11 1 2 10K_0402_5% +3VS
(10,17,19,31,34) SB_CK_SCLK SCL SAO
199 200 R9 1 2 10K_0402_5%
+3VS
1
C21
VDDSPD SA1 Security Classification Compal Secret Data Compal Electronics. inc.
Issued Date 2005/05/09 Deciphered Date 2006/10/11 Title
P-TWO_A5652C-A0G16 SCHEMATIC, M/B LA-3121P
0.1U_0402_16V4Z
2 THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 五月 10, 2006 Sheet 11 of 51
5 4 3 2 1
 5 4 3 2 1

U39A

D H_CADOP15 R19 P21 H_CADIP15 D

(6) H_CADOP15 HT_RXCAD15P HT_TXCAD15P H_CADIP15 (6)
H_CADON15 R18 PART 1 OF 5 P22 H_CADIN15
(6) H_CADON15 HT_RXCAD15N HT_TXCAD15N H_CADIN15 (6)
H_CADOP14 R21 P18 H_CADIP14
(6) H_CADOP14 HT_RXCAD14P HT_TXCAD14P H_CADIP14 (6)
H_CADON14 R22 P19 H_CADIN14
(6) H_CADON14 HT_RXCAD14N HT_TXCAD14N H_CADIN14 (6)
H_CADOP13 U22 M22 H_CADIP13
(6) H_CADOP13 HT_RXCAD13P HT_TXCAD13P H_CADIP13 (6)
H_CADON13 U21 M21 H_CADIN13
(6) H_CADON13 HT_RXCAD13N HT_TXCAD13N H_CADIN13 (6)
H_CADOP12 U18 M18 H_CADIP12
(6) H_CADOP12 HT_RXCAD12P HT_TXCAD12P H_CADIP12 (6)
H_CADON12 U19 M19 H_CADIN12
(6) H_CADON12 HT_RXCAD12N HT_TXCAD12N H_CADIN12 (6)
H_CADOP11 W19 L18 H_CADIP11
(6) H_CADOP11 HT_RXCAD11P HT_TXCAD11P H_CADIP11 (6)
H_CADON11 W20 L19 H_CADIN11
(6) H_CADON11 HT_RXCAD11N HT_TXCAD11N H_CADIN11 (6)
H_CADOP10 AC21 G22 H_CADIP10
(6) H_CADOP10 HT_RXCAD10P HT_TXCAD10P H_CADIP10 (6)
H_CADON10 AB22 G21 H_CADIN10
(6) H_CADON10 HT_RXCAD10N HT_TXCAD10N H_CADIN10 (6)
H_CADOP9 AB20 J20 H_CADIP9

HYPER TRANSPORT CPU

(6) H_CADOP9 HT_RXCAD9P HT_TXCAD9P H_CADIP9 (6)
H_CADON9 AA20 J21 H_CADIN9
(6) H_CADON9 HT_RXCAD9N HT_TXCAD9N H_CADIN9 (6)
H_CADOP8 AA19 F21 H_CADIP8
(6) H_CADOP8 HT_RXCAD8P HT_TXCAD8P H_CADIP8 (6)
H_CADON8 Y19 F22 H_CADIN8
(6) H_CADON8 HT_RXCAD8N HT_TXCAD8N H_CADIN8 (6)
H_CADOP7 T24 N24 H_CADIP7
(6) H_CADOP7 HT_RXCAD7P HT_TXCAD7P H_CADIP7 (6)
H_CADON7 R25 N25 H_CADIN7
(6) H_CADON7 HT_RXCAD7N HT_TXCAD7N H_CADIN7 (6)
H_CADOP6 U25 L25 H_CADIP6
(6) H_CADOP6 HT_RXCAD6P HT_TXCAD6P H_CADIP6 (6)
H_CADON6 U24 M24 H_CADIN6
(6) H_CADON6 HT_RXCAD6N HT_TXCAD6N H_CADIN6 (6)
H_CADOP5 V23 K25 H_CADIP5
(6) H_CADOP5 HT_RXCAD5P HT_TXCAD5P H_CADIP5 (6)
H_CADON5 U23 K24 H_CADIN5
(6) H_CADON5 HT_RXCAD5N HT_TXCAD5N H_CADIN5 (6)
H_CADOP4 V24 J23 H_CADIP4
(6) H_CADOP4 HT_RXCAD4P HT_TXCAD4P H_CADIP4 (6)
H_CADON4 V25 K23 H_CADIN4
(6) H_CADON4 HT_RXCAD4N HT_TXCAD4N H_CADIN4 (6)
H_CADOP3 AA25 G25 H_CADIP3
(6) H_CADOP3 HT_RXCAD3P HT_TXCAD3P H_CADIP3 (6)
H_CADON3 AA24 H24 H_CADIN3
(6) H_CADON3 HT_RXCAD3N HT_TXCAD3N H_CADIN3 (6)
H_CADOP2 AB23 F25 H_CADIP2
(6) H_CADOP2 HT_RXCAD2P HT_TXCAD2P H_CADIP2 (6)
H_CADON2 AA23 F24 H_CADIN2
(6) H_CADON2 HT_RXCAD2N HT_TXCAD2N H_CADIN2 (6)
H_CADOP1 AB24 E23 H_CADIP1
C (6) H_CADOP1 HT_RXCAD1P HT_TXCAD1P H_CADIP1 (6) C
H_CADON1 AB25 F23 H_CADIN1
(6) H_CADON1 HT_RXCAD1N HT_TXCAD1N H_CADIN1 (6)
H_CADOP0 AC24 E24 H_CADIP0
(6) H_CADOP0 HT_RXCAD0P HT_TXCAD0P H_CADIP0 (6)
H_CADON0 AC25 E25 H_CADIN0
(6) H_CADON0 HT_RXCAD0N HT_TXCAD0N H_CADIN0 (6)
H_CLKOP1 W21 L21 H_CLKIP1

I/F
(6) H_CLKOP1 HT_RXCLK1P HT_TXCLK1P H_CLKIP1 (6)
H_CLKON1 W22 L22 H_CLKIN1
(6) H_CLKON1 HT_RXCLK1N HT_TXCLK1N H_CLKIN1 (6)
H_CLKOP0 Y24 J24 H_CLKIP0
(6) H_CLKOP0 HT_RXCLK0P HT_TXCLK0P H_CLKIP0 (6)
H_CLKON0 W25 J25 H_CLKIN0
(6) H_CLKON0 HT_RXCLK0N HT_TXCLK0N H_CLKIN0 (6)
H_CTLOP0 P24 N23 H_CTLIP0
(6) H_CTLOP0 HT_RXCTLP HT_TXCTLP H_CTLIP0 (6)
H_CTLON0 P25 P23 H_CTLIN0
(6) H_CTLON0 HT_RXCTLN HT_TXCTLN H_CTLIN0 (6)
R382 1 2 49.9_0402_1% HT_RXCALP A24 C25 HT_TXCALP 1 R379 2
R380 1 HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
+1.2V_HT 2 49.9_0402_1% C24 HT_RXCALN HT_TXCALN D24 100_0402_1%

216MSA4ALA11FG RS485MC_BGA465

B B

A A

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 五月 10, 2006 Sheet 12 of 51
5 4 3 2 1
 5 4 3 2 1

U39B

G5 GFX_RX0P PART 2 OF 5 GFX_TX0P J1

G4 GFX_RX0N GFX_TX0N H2
J8 GFX_RX1P GFX_TX1P K2
J7 GFX_RX1N GFX_TX1N K1
J4 GFX_RX2P GFX_TX2P K3
J5 GFX_RX2N GFX_TX2N L3
D L8 L1 D
GFX_RX3P GFX_TX3P
L7 GFX_RX3N GFX_TX3N L2
L4 GFX_RX4P GFX_TX4P N2
L5 GFX_RX4N GFX_TX4N N1
M8 GFX_RX5P GFX_TX5P P2
M7 GFX_RX5N GFX_TX5N P1
M4 GFX_RX6P GFX_TX6P P3
M5 GFX_RX6N GFX_TX6N R3
P8 GFX_RX7P GFX_TX7P R1
P7 GFX_RX7N GFX_TX7N R2
P4 GFX_RX8P GFX_TX8P T2
P5 GFX_RX8N GFX_TX8N U1

PCIE I/F GFX

R4 GFX_RX9P GFX_TX9P V2
R5 GFX_RX9N GFX_TX9N V1
R7 GFX_RX10P GFX_TX10P V3
R8 GFX_RX10N GFX_TX10N W3
U4 GFX_RX11P GFX_TX11P W1
U5 GFX_RX11N GFX_TX11N W2
W4 GFX_RX12P GFX_TX12P Y2
W5 GFX_RX12N GFX_TX12N AA1
Y4 GFX_RX13P GFX_TX13P AA2
Y5 GFX_RX13N GFX_TX13N AB2
V9 GFX_RX14P GFX_TX14P AB1
W9 GFX_RX14N GFX_TX14N AC1
AB7 GFX_RX15P GFX_TX15P AE3
AB6 GFX_RX15N GFX_TX15N AE4

R18 1 2 0_0402_5% PCIE_MRX_PTX_P0_R W11 AD8 PCIE_MTX_PRX_P0 C457 1 2 0.1U_0402_10V6K PCIE_MTX_C_PRX_P0

(31) PCIE_MRX_PTX_P0 GPP_RX0P GPP_TX0P PCIE_MTX_C_PRX_P0 (31)
R19 1 2 0_0402_5% PCIE_MRX_PTX_N0_R W12 AE8 PCIE_MTX_PRX_N0 C458 1 2 0.1U_0402_10V6K PCIE_MTX_C_PRX_N0
(31) PCIE_MRX_PTX_N0 GPP_RX0N GPP_TX0N PCIE_MTX_C_PRX_N0 (31)
C R16 1 2 0_0402_5% PCIE_MRX_PTX_P1_R AA11 AD7 PCIE_MTX_PRX_P1 C466 1 2 0.1U_0402_10V6K PCIE_MTX_C_PRX_P1 C
(34) PCIE_MRX_PTX_P1 GPP_RX1P GPP_TX1P PCIE_MTX_C_PRX_P1 (34)
R17 1 2 0_0402_5% PCIE_MRX_PTX_N1_R AB11 AE7 PCIE_MTX_PRX_N1 C467 1 2 0.1U_0402_10V6K PCIE_MTX_C_PRX_N1
(34) PCIE_MRX_PTX_N1 GPP_RX1N GPP_TX1N PCIE_MTX_C_PRX_N1 (34)
PCIE I/F GPP
Y7 GPP_RX2P GPP_TX2P AD4
AA7 GPP_RX2N GPP_TX2N AE5

AB9 GPP_RX3P GPP_TX3P AD5

AA9 GPP_RX3N GPP_TX3N AD6

A_MRX_STX_P0 W14 AE9 A_MTX_SRX_P0 C465 1 2 0.1U_0402_10V6K A_MTX_C_SRX_P0

(18) A_MRX_STX_P0 SB_RX0P SB_TX0P A_MTX_C_SRX_P0 (18)
A_MRX_STX_N0 W15 PCIE I/F SB AD10 A_MTX_SRX_N0 C464 1 2 0.1U_0402_10V6K A_MTX_C_SRX_N0
(18) A_MRX_STX_N0 SB_RX0N SB_TX0N A_MTX_C_SRX_N0 (18)
A_MRX_STX_P1 AB12 AC8 A_MTX_SRX_P1 C468 1 2 0.1U_0402_10V6K A_MTX_C_SRX_P1
(18) A_MRX_STX_P1 SB_RX1P SB_TX1P A_MTX_C_SRX_P1 (18)
A_MRX_STX_N1 AA12 AD9 A_MTX_SRX_N1 C469 1 2 0.1U_0402_10V6K A_MTX_C_SRX_N1
(18) A_MRX_STX_N1 SB_RX1N SB_TX1N A_MTX_C_SRX_N1 (18)
R14 1 2 10K_0402_1% AA14 AD11 R375 1 2 150_0402_1% +1.2V_HT
R15 PCEH_ISET PCEH_PCAL
R14: 10KOhm FOR RS485 1 2 8.25K_0402_1% AB14 PCEH_TXISET PCEH_NCAL AE11 R376 1 2 100_0402_1%
1.47KOhm FOR RS690
R375: 150 Ohm FOR RS485
R15: 8.25KOhm FOR RS485 216MSA4ALA11FG RS485MC_BGA465
562 Ohm FOR RS690
DNI FOR RS690
R215: 82.5 Ohm FOR RS485
2KOhm FOR RS690

B B

A A

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 五月 10, 2006 Sheet 13 of 51
5 4 3 2 1
 5 4 3 2 1

2005/12/30 Added
+3VS VGA_TV_CRMA
VGA_TV_LUMA
VGA_TV_COMPS
R575
4.7K_0402_5%

1
R590 R592

1
R540 1 2 0_0805_5% +3VS AVDD 150_0402_1% 150_0402_1% TV@
L43 TV@
1 2 R576
CHB2012U121_0805 1 1 4.7K_0402_5% R591

2
+1.8VS C483 C487 150_0402_1% TV@

2
AVDDQ
D L52 AVSSQ_GND 1U_0603_10V4Z 4.7U_0805_10V4Z D
2.2U_0805_10V6K 2 2
1 2
CHB2012U121_0805
1 1 1
C495 C489 C484
10U_0805_10V4Z

@ U39C
1U_0603_10V4Z
2 2 2 +1.8VS LVDS_TXLP0
B22 AVDD1 TXOUT_L0P B14 LVDS_TXLP0 (25)
L44 C22 PART 3 OF 5 B15 LVDS_TXLN0
AVDD2 TXOUT_L0N LVDS_TXLN0 (25)
1 2 G17 B13 LVDS_TXLP1
AVSSN1 TXOUT_L1P LVDS_TXLP1 (25)
1 CHB2012U121_0805 1 1 H17 A13 LVDS_TXLN1
AVSSN2 TXOUT_L1N LVDS_TXLN1 (25)
C490 C496 A20 H14 LVDS_TXLP2
+ AVDDDI TXOUT_L2P LVDS_TXLP2 (25)
AVSSQ_GND C186 B20 G14 LVDS_TXLN2
AVSSDI TXOUT_L2N LVDS_TXLN2 (25)
150U_D2_6.3VM 1U_0603_10V4Z 2.2U_0805_10V6K D17
PLLVDD 2 2 TXOUT_L3P
A21 AVDDQ TXOUT_L3N E17
2 AVDDQ A22 AVSSQ
L53 A15 LVDS_TXUP0
TXOUT_U0P LVDS_TXUP0 (25)
1 2 R230-R232 CLOSE TO NB VGA_TV_CRMA C21 B16 LVDS_TXUN0
(24) VGA_TV_CRMA C_R TXOUT_U0N LVDS_TXUN0 (25)

CRT/TVOUT
CHB2012U121_0805
1 1 1 1 VGA_TV_LUMA C20 C17 LVDS_TXUP1
(24) VGA_TV_LUMA Y_G TXOUT_U1P LVDS_TXUP1 (25)
C499 C485 C492 VGA_TV_COMPS D19 C18 LVDS_TXUN1
(24) VGA_TV_COMPS COMP_B TXOUT_U1N LVDS_TXUN1 (25)
10U_0805_10V4Z

C183 + @ B17 LVDS_TXUP2

TXOUT_U2P LVDS_TXUP2 (25)
4.7U_0805_10V4Z CRT_R AVSSQ_GND E19 A17 LVDS_TXUN2
2 2 2 (24) CRT_R RED TXOUT_U2N LVDS_TXUN2 (25)
CRT_G F19 A18
2 (24) CRT_G GREEN TXOUT_U3P
CRT_B G19 B18
(24) CRT_B BLUE TXOUT_U3N
150U_D2_6.3VM 1U_0603_10V4Z VGA_CRT_VSYNC C6
(24) VGA_CRT_VSYNC DACVSYNC

1
150_0402_1%

150_0402_1%

150_0402_1%
8mils TRACE VGA_CRT_HSYNC A5 E15 LVDS_TXLCKP
(24) VGA_CRT_HSYNC DACHSYNC TXCLK_LP LVDS_TXLCKP (25)
R75 R76 R74 D15 LVDS_TXLCKN RS485: LVDDR18A=1.8V
TXCLK_LN LVDS_TXLCKN (25)
1 2 B21 H15 LVDS_TXUCKP +1.8VS
RSET TXCLK_UP LVDS_TXUCKP (25)
R386 715_0402_1% G15 LVDS_TXUCKN L54
TXCLK_UN LVDS_TXUCKN (25)
+1.8VS R55 1 2 0_0402_5% B6 1 1 1 1 2
(24) VGA_DDC_CLK

2
HTPVDD R56 DACSCL
(24) VGA_DDC_DATA 1 2 0_0402_5% A6 DACSDA LPVDD D14 C154 C172 CHB2012U121_0805

1
C E14 0.1U_0402_16V4Z C177 C
L56 LPVSS 4.7U_0805_10V4Z
PLLVDD A10 PLLVDD
+1.8VS +3VS 2 2 2 +1.8VS
1 2 B10 PLLVSS LVDDR18D_1 A12 LPVSS_GND
CHB2012U121_0805 1U_0603_10V4Z L57

PM PLL PWR
LVDDR18D_2 B12
1 1 1 HTPVDD B24 HTPVDD LVDDR18A_1 C12 1 2

1
10U_0805_10V4Z

@ C493 C498 C488 R568 2 1 10K_0402_5% R46 B25 C13 CHB2012U121_0805

2
1K_0402_5% HTPVSS LVDDR18A_2 L55
2
B

4.7U_0805_10V4Z C10 A16 C491 CHB2012U121_0805

2 2 2 (18,23,28,31,36) NB_RST# SYSRESET# LVSSR1

4.7U_0805_10V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4.7U_0805_10V4Z
Q27 R62 1 2 0_0402_5% C11 A14 C171 1 1 1 1 1 1
(37) NB_PWROK POWERGOOD LVSSR3
E

1U_0603_10V4Z
3 1 LDT_STOP#_NB C5 D12 C176 C481 C131 C497
(8,19) LDT_STOP#
2
LDTSTOP# LVSSR5
C

1U_0603_10V4Z
1U_0603_10V4Z B5 C19
(18) ALLOW_LDTSTOP ALLOW_LDTSTOP LVSSR6
MMBT3904_SOT23 C15
R383 2 LVSSR7 2 2 2 2 2 2
1 10K_0402_5% C23 HTTSTCLK LVSSR8 C16
(17) HTREFCLK B23 HTREFCLK
C2 TVCLKIN LVSSR12 F14
LVSSR13 F15

CLOCKs
(17) NB_OSC B11 OSCIN
R388 1 2 @ 22_0402_5% SB_OSC_INT_R A11
(17,19) SB_OSCIN OSCOUT

(17) NBSRC_CLKP F2 GFX_CLKP

E1 E12 EN VDD LVSSR_GND
(17) NBSRC_CLKN GFX_CLKN LVDS_DIGON ENVDD (25)
+3VS G12 ENBKL
LVDS_BLON ENBKL (28)
G1 F12 TP4 PAD
(17) SBLINK_CLKP SB_CLKP LVDS_BLEN
+3VS G2
(17) SBLINK_CLKN SB_CLKN
DVO_D0 AD14
R73 1 2 @ 2.7K_0402_5% DFT_GPIO0 D6 AD15
DFT_GPIO0 DVO_D1
1

(16) LOAD_ROM# D7 DFT_GPIO1 DVO_D2 AE15

R569 R60 1 2 @ 2.7K_0402_5% DFT_GPIO2 C8 AD16
10K_0402_5% R57 @ 2.7K_0402_5% DFT_GPIO3 DFT_GPIO2 DVO_D3
1 2 C7 DFT_GPIO3 DVO_D4 AE16
2

2
4.7K_0402_5%

4.7K_0402_5%

4.7K_0402_5%

B R58 1 2 @ 2.7K_0402_5% DFT_GPIO4 B8 AC17 B

R50 R51 R49 R59 @ 2.7K_0402_5% DFT_GPIO5 DFT_GPIO4 DVO_D5
D27 1 2 A8 AD18
2

MIS.
DFT_GPIO5 DVO_D6
DVO_D7 AE19
(18) BMREQ# 2 1 B2 BMREQb DVO_D8 AD19
EDID_LCD_CLK A2 AE20 R541 1 2 0_0805_5%
(25) EDID_LCD_CLK
1

EDID_LCD_CLK EDID_LCD_DAT I2C_CLK DVO_D9

1N4148_SOT23 (25) EDID_LCD_DAT B4 I2C_DATA DVO_D10 AD20
AA15 THERMALDIODE_P DVO_D11 AE21
EDID_LCD_DAT 1 AB15 THERMALDIODE_N
DVO_VSYNC AD13
DDC_DATA C635 PAD TP5 C14 AC13 LPVSS_GND
18P_0402_50V8J DDC_DATA TMDS_HPD DVO_DE
B3 DDC_DATA DVO_HSYNC AE13
2
C3 TESTMODE DVO_IDCKP AE17
STRP_DATA A3 AD17 R542 1 2 0_0805_5%
STRP_DATA DVO_IDCKN
1

R377
4.7K_0402_5% 216MSA4ALA11FG RS485MC_BGA465

+3VS +3VS
2

LVSSR_GND
1

R40
10K_0402_5% R41
U2 @ 2K_0402_5%
1 8 @
2

A0 VCC
2 7
2

A1 WP EDID_LCD_CLK
3 A2 SCL 6
4 5 STRP_DATA
A VSS SDA A
AT24C04N-10SI-2.7_SO8
1

@
1 R39
C117 2K_0402_5%
@
0.1U_0402_16V4Z
Security Classification Compal Secret Data Compal Electronics. inc.
2

2 @
Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
NOTE: ACCESS TO STRAP_DATA and I2C_CLK PINS THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number R ev
IS MANDATORY. AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom 401411 D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 五月 10, 2006 Sheet 14 of 51
5 4 3 2 1
 5 4 3 2 1

NB RS485 POWER STATES

Power Signal S0 S1 S3 S4/S5 G3
VDDHT ON ON OFF OFF OFF
VDDR ON ON OFF OFF OFF
VDD18 ON ON OFF OFF OFF
VDDC ON ON OFF OFF OFF
D VDDA18 ON ON OFF OFF OFF D

VDDA12 ON ON OFF OFF OFF

AVDD ON ON OFF OFF OFF
AVDDDI ON ON OFF OFF OFF
PLLVDD ON ON OFF OFF OFF
HTPVDD ON ON OFF OFF OFF
VDDR3 ON ON OFF OFF OFF
LPVDD ON ON OFF OFF OFF
LVDDR18D ON ON OFF OFF OFF +1.2V_HT
L63 +1.2V_HT
CHB2012U121_0805 LVDDR18A ON ON OFF OFF OFF
1 2
2 1 L59 CHB2012U121_0805 U39E

L64 1 2 A25 M3
CHB2012U121_0805 L60 CHB2012U121_0805 VSS1 VSSA1
F11 VSS2 PAR 5 OF 5 VSSA2 V12
2 1 CURRENT MEASUREMENT D23 VSS3 VSSA3 V11
E9 VSS4 VSSA4 V14
VDDA12 G11 F3
VDD_HT U39D VSS5 VSSA5
Y23 VSS6 VSSA6 V15
CURRENT MEASUREMENT AE24 VDD_HT1 PART 4 OF 5 VDDA_12_1 D1 P11 VSS7 VSSA7 A1
1U_0402_6.3V4Z AD24 G7 1 1 1 1 1 1 R24 H1
VDD_HT2 VDDA_12_2 VSS8 VSSA8
10U_0805_10V4Z

1U_0402_6.3V4Z
C AD22 E2 C110 C130 C112 C93 C106 C75 AE18 G3 C
1 1 1 1 1 1 VDD_HT5 VDDA_12_3 VSS9 VSSA9
C37 C46 C54 C50 C49 C48 AB17 C1 + M15 J2
VDD_HT6 VDDA_12_4 10U_0805_10V4Z 10U_0805_10V4Z VSS10 VSSA10
AE23 VDD_HT9 VDDA_12_5 E3 J22 VSS11 VSSA11 H3
2 2 2 2 2 150U_D2_6.3VM
Y17 VDD_HT10 VDDA_12_6 D2 G23 VSS12 VSSA12 AE10
2 2 2 2 2 2 2
W17 VDD_HT11 VDDA_12_7 M9 J12 VSS13 VSSA13 J6
1U_0402_6.3V4Z 1U_0402_6.3V4Z AC18 F4 1U_0402_6.3V4Z L12 AE6
VDD_HT12 VDDA_12_8 VSS14 VSSA14
2006/4/14 FOR EMI 1U_0402_6.3V4Z 1U_0402_6.3V4Z AD21 VDD_HT13 VDDA_12_9 B1 1U_0402_6.3V4Z L14 VSS15 VSSA15 F1
AC19 VDD_HT14 VDDA_12_10 D3 L20 VSS16 VSSA16 L6
+1.8VS L2 VDD18 AC20 L9 L23 M2
VDD_HT15 VDDA_12_11 VSS17 VSSA17
1 2 AB19 VDD_HT16 VDDA_12_12 E6 M11 VSS18 VSSA18 M6
CHB2012U121_0805 1 1 1 1 AD23 +1.2V_HT M20 J3
C330 C141 C142 C123 VDD_HT17 VSS19 VSSA19
AA17 VDD_HT18 VDDC_1 L11 M23 VSS20 VSSA20 P6
AE25 VDD_HT19 VDDC_2 L13 1 1 1 1 1 1 M25 VSS21 VSSA21 T1
820P_0603_50V7K 2.2U_0805_10V6K L15 C115 C126 C87 C94 C60 C79 N12 N3
2 2 2 2 VDDC_3 VSS22 VSSA22

GROUND
J14 VDD18_1 VDDC_4 M12 N14 VSS23 VSSA23 P9
+1.8VS 2.2U_0805_10V6K 1U_0402_6.3V4Z J15 R15 1U_0402_6.3V4Z B7 R6
L58 VDDA18 VDD18_2 VDDC_5 2 2 2 2 2 2 VSS24 VSSA24
VDDC_6 M14 L24 VSS25 VSSA25 U2
1 1 2 AE2 N11 10U_0805_10V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z P13 T3
VDDA18_1 VDDC_7 VSS26 VSSA26

POWER
CHB2012U121_0805 1 1 1 1 1 1 1 AB3 N13 10U_0805_10V4Z 1U_0402_6.3V4Z P20 U3
VDDA18_2 VDDC_8 VSS27 VSSA27
10U_0805_10V4Z

+ C25 C44 C40 C459 C460 C462 C456 C461 U7 N15 P15 U6
VDDA18_3 VDDC_9 1 1 1 VSS28 VSSA28
W7 J11 C108 C138 C135 R12 AC4
150U_D2_6.3VM VDDA18_4 VDDC_10 VSS29 VSSA29
AB4 VDDA18_5 VDDC_11 H11 R14 VSS30 VSSA30 Y1
2 2 2 2 2 2 2 2
AC3 VDDA18_6 VDDC_12 P12 R20 VSS31 VSSA31 Y15
10U_0805_10V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z 2 2 2
AD2 VDDA18_7 VDDC_13 P14 W23 VSS32 VSSA32 W6
1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z AE1 R11 1 1U_0402_6.3V4Z 1U_0402_6.3V4Z Y25 AC2
+3VS L3 VDDR3 VDDA18_8 VDDC_14 C24 1U_0402_6.3V4Z VSS33 VSSA33
VDDC_15 R13 1 AD25 VSS34 VSSA34 Y3
1 2 E11 A19 + C31 U20 Y9
CHB2012U121_0805 VDDR3_2 VDDC_16 10U_0805_10V4Z VSS35 VSSA35
1 1 D11 VDDR3_1 VDDC_17 B19 H25 VSS36 VSSA36 Y11
C161 C160 U11 150U_D2_6.3VM W24 Y12
VDDC_18 2 2 VSS37 VSSA93
AC12 VDDR_1 VDDC_19 U14 Y22 VSS38 VSSA94 Y14
B 1U_0402_6.3V4Z 4.7U_0805_10V4Z AD12 P17 AC23 AA3 B
2 2 VDDR_2 VDDC_20 VSS39 VSSA95
AE12 VDDR_3 VDDC_21 L17 D25 VSS40 VSSA37 R9
VDDC_22 J19 G24 VSS41 VSSA38 AD1
VDDR E7 D20 AC14 AC5
+1.8VS L1 VDDA12/VDDPLL_1 VDDC_23 VSS42 VSSA39
F7 VDDA12/VDDPLL_2 VDDC_24 G20 H12 VSS43 VSSA40 AC6
1 2 F9 VSSA12/VSSPLL_1 VDDC_25 A9 AC22 VSS44 VSSA41 AC7
CHB2012U121_0805 1 1 1 G9 B9 R23 AD3
VSSA12/VSSPLL_2 VDDC_26 VSS45 VSSA42
1U_0402_6.3V4Z

C38 C42 C43 C9 C4 AC9

VDDC_27 VSS46 VSSA43
+1.2V_HT D22 VDDHT_PKG VDDC_28 D9 AE22 VSS47 VSSA44 AC10
VDDA12_PKG1 M1 VDDA12_PKG1 VDDC_29 A7 T23 VSS48 VSSA45 G6
2 2 2
+1.2V_HT AC11 VDDA12_PKG2 VDDC_30 A4 T25 VSS49
1U_0402_6.3V4Z U12 AE14
1U_0402_6.3V4Z VDDC_31 VSS50
VDDC_32 U15 R17 VSS51
H23 VSS52
VDDA12 VDDPLL VDDA12_PKG1 216MSA4ALA11FG RS485MC_BGA465 M17 VSS53
A23 VSS54
1 AC15 VSS55
1 1 F17 VSS56
4.7U_0805_10V4Z

C140 C168 C134 D4

10U_0805_10V4Z VSS57
AC16 VSS58
1U_0402_6.3V4Z 2
M13 VSS59
2 2

216MSA4ALA11FG RS485MC_BGA465

RS485: 0 Ohm RESISTOR

RS690: 220 Ohm 500mA FERRITE BEAD
A A

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/10/10 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 五月 10, 2006 Sheet 15 of 51
5 4 3 2 1
 5 4 3 2 1

R67
1 2 H1 H2 H4 H21 H22
(14) LOAD_ROM#
H_S394D138 H_S394D138 H_S394D138 H_S394D138 H_S394D138
@ 3K_0402_5%
D D
@ @ @ @ @

1
LOAD_ROM#: LOAD ROM STRAP ENABLE

High, LOAD ROM STRAP DISABLE H23 H14 H15 H28 H7

H_S394D138 H_S394D138 H_S394D138 H_S394D138 H_C236D165
Low, LOAD ROM STRAP ENABLE
@ @ @ @ @

1
H8 H9 H10 H3 H6
H_C236D165 H_C236D165 H_C236D165 H_C236D161 H_C236D161

@ @ @ @ @

1
H29 H31 H11 H12 H17
H_C236D161 H_S315D118 H_O134X118D55X39 H_O134X118D55X39 H_O134X118D55X39

@ @ @ @ @

1
C +5VS +1.8VALW +5VS +3VALW +1.8VS +3VS +1.8VALW +3VS C

1 1 1 1
C653 C654 C655 C656 H18 H16 H19 H13 H24
H_O134X118D55X39 H_C276D118 H_C276D118 H_S354D138 H_S354D138
@ @ @ @
2 2 2 2
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z @ @ @ @ @

1
H25 H32 H33 H35 H34
H_S354D138 H_S315D138 H_C315D236 H_C163D163N H_O217X157D217X157N

@ @ @ @ @

1
B B

FD2 FD1 FD3 FD5 FD4 FD6

@ @ @ @ @ @
1

1
CF20 CF8 CF21 CF7 CF10 CF12 CF4 CF6

@ @ @ @ @ @ @ @
1

1
CF9 CF1 CF2 CF3 CF5 CF11

@ @ @ @ @ @
1

A A

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 五月 10, 2006 Sheet 16 of 51
5 4 3 2 1
 5 4 3 2 1

+3VS
CLK_VDD
L8
1 2 +3VS
1 1 1 1 1 1 1 1 1 L10

10U_0805_10V4Z
CHB2012U121_0805 C277 C272 C263 C276 C268 C259 C254 C248 C279 CLK_VDDA 1 2
2 1 CHB2012U121_0805
C261 C260
2 2 2 2 2 2 2 2 2
0.1U_0402_16V4Z 10U_0805_10V4Z
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2
D 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z D

+3VS

1- PLACE ALL SERIAL TERMINATION L9 CLK_VDD

RESISTORS CLOSE TO U800 1 2
CHB2012U121_0805 U40
2- PUT DECOUPLING CAPS CLOSE TO U800 1 R427
POWER PIN C252 54 50 261_0402_1%
VDDCPU VDDA
14 VDDSRC GNDA 49 1 2
+3VS 2.2U_0805_10V6K 23 47_0402_1%
2 VDDSRC CPUCLK_EXT_R R423 1
28 VDDSRC CPUCLK8T0 56 2 CPUCLK (8)
L6 44 55 CPUCLK#_EXT_R R429 1 2 47_0402_1%
VDDSRC CPUCLK8C0 CPUCLK# (8)
1 2 CLK_VDD48 5 52
CHB2012U121_0805 VDD48 CPUCLK8T1
39 VDDATIG CPUCLK8C1 51
1 CLK_VDDREF 2
C246 VDDREF SBLINK_CLKP_R R435 33_0402_1%
60 VDDHTT SRCCLKT6 16 1 2 SBLINK_CLKP (14)
17 SBLINK_CLKN_R R437 1 2 33_0402_1%
SRCCLKC6 SBLINK_CLKN (14)
2.2U_0805_10V6K 53 41 NBSRC_CLKP_R R450 1 2 33_0402_1%
2 GNDCPU ATIGCLKT0 NBSRC_CLKP (14)
15 40 NBSRC_CLKN_R R456 1 2 33_0402_1%
GNDSRC ATIGCLKC0 NBSRC_CLKN (14)
22 GNDSRC ATIGCLKT1 37
Parallel Resonance Crystal 29
45
GNDSRC ATIGCLKC1 36
35
+3VS C511 1 GNDSRC ATIGCLKT2
2 8 GND48 ATIGCLKC2 34
38 GNDATIG ATIGCLKT3 30

2
22P_0402_50V8J 1 31
R412 GNDREF ATIGCLKC3 SBSRC_CLKP_R R443 33_0402_1%
58 GNDHTT SRCCLKT5 18 1 2 SBSRC_CLKP (18)
Y5 @ 19 SBSRC_CLKN_R R449 1 2 33_0402_1%
SRCCLKC5 SBSRC_CLKN (18)
1

CLK_X1 3 20 CLK_PCIE_CARD_R R454 1 2 33_0402_1%

CLK_PCIE_CARD (34)

2
R415 22P_0402_50V8J 1M_0402_5% X1 SRCCLKT4 CLK_PCIE_CARD#_R R459 33_0402_1%
21 1 2 CLK_PCIE_CARD# (34)

1
C CLK_X2 SRCCLKC4 C
10K_0402_5% 1 2 2 1 4 X2 SRCCLKT3 24
C510 14.31818MHz_20P_1BX14318BE1A 25
R417 0_0402_5% SRCCLKC3
26
2

SRCCLKT2
SRCCLKC2 27
11 47 CLK_PCIE_MINI_R R438 1 2 33_0402_1%
RESET_IN# SRCCLKT0 CLK_PCIE_MINI (31)
61 46 CLK_PCIE_MINI#_R R444 1 2 33_0402_1%
NC SRCCLKC0 CLK_PCIE_MINI# (31)
SRCCLKT1 43
SRCCLKC1 42

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%

49.9_0402_1%
SRCCLKT7 12
SRCCLKC7 13

2
SB_CK_SCLK R425 1 2 0_0402_5% 9 57 R426 1 2 0_0402_5% @ +3VS
(10,11,19,31,34) SB_CK_SCLK SMBCLK CLKREQA#

1 R445

1 R439

1 R458

1 R453

1 R448

1 R442

1 R457

1 R451

1 R436

1 R434
SB_CK_SDAT R431 1 2 0_0402_5% 10 32 R460 1 2 0_0402_5%
(10,11,19,31,34) SB_CK_SDAT SMBDAT CLKREQB# EXP_CLKREQ# (34)
33 R461 1 2 0_0402_5%
CLKREQC# MINI_CLKREQ# (31)
48 7 CLK_SD_48M_R
IREF 48MHz_1 CLK_48M_USB_R
Ioh = 5 * Iref 48MHz_0 6
(2.32mA) 2 CLK_VDD 2.2K_0402_5%
R433 R421 1 2 33_0402_1% CLK_SD_48M (32)

1
Voh = 0.71V @ 60 ohm 475_0402_1% 63 R416 1 2 33_0402_1%
FS1/REF1 CLK_USB_48M (19)
64 R402 R401 R409
FS0/REF0
62
1

FS2/REF2 2.2K_0402_5% 2.2K_0402_5%

HTTCLK0 59

2
R404 1 2 8.2K_0402_5% R400 2 1 @ 0_0402_5%
ICS951462AGLFT_TSSOP64 R403 1 2 8.2K_0402_5% R399 2 1 @ 0_0402_5%
R413 1 2 8.2K_0402_5% R410 2 1 @ 0_0402_5%

SB_OSCIN_R R407 1 2 33_0402_1% SB_OSCIN (14,19)

LPC_OSCIN_R R406 1 2 33_0402_1%
B CLK_14M_SIO (36) B
NB_OSCIN_R R418 1 2 33_0402_1% NB_OSC (14)
HTREFCLK_R R419 1 2 33_0402_1% HTREFCLK (14)

1
R420
51.1_0402_1%
EXT CLK FREQUENCY SELECT TABLE(MHZ)

2
FS2 FS1 FS0 CPU SRCCLK HTT PCI USB COMMENT
[2:1]

0 0 0 Hi-Z 100.00 Hi-Z Hi-Z 48.00 Reserved

0 0 1 X 100.00 X/3 X/6 48.00 Reserved
0 1 0 180.00 100.00 60.00 30.00 48.00 Reserved
0 1 1 220.00 100.00 36.56 73.12 48.00 Reserved
1 0 0 100.00 100.00 66.66 33.33 48.00 Reserved
1 0 1 133.33 100.00 66.66 33.33 48.00 Reserved
1 1 1 200.00 100.00 66.66 33.33 48.00 Normal ATHLON64 operation

A A

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期三, 五月 10, 2006 Sheet 17 of 51
5 4 3 2 1
 5 4 3 2 1

2005/12/30 Change net to +3VALW U18A

A_RST# R178 1 2 33_0402_5% AG10

SB460 U2 CLK_PCI_LAN_R 2005/10/27 Added, Near U4520, Need equal length
A_RST# PCICLK0 CLK_PCI_LAN_R (22)
Part 1 of 4 T2 CLK_PCI_LPC_R
PCICLK1 CLK_PCI_LPC_R (22)
R174 10K_0402_5% CLK_PCI_MINI_R

PCI CLKS
(17) SBSRC_CLKP J24 PCIE_RCLKP PCICLK2 U1 CLK_PCI_MINI_R (22)
1 2 J25 V2 CLK_PCI_PCM_R CLK_PCI_LAN_R R252 1 2 22_0402_5% NOSPREAD@
(17) SBSRC_CLKN PCIE_RCLKN PCICLK3 CLK_PCI_PCM_R (22) CLK_PCI_LAN (26)
+3VALW W3 CLK_PCI_1394_R CLK_PCI_LPC_R R255 1 2 22_0402_5% NOSPREAD@
PCICLK4 CLK_PCI_1394_R (22) CLK_PCI_LPC (28)
A_MRX_STX_P0 C509 1 2 0.01U_0402_16V7K A_MRX_C_STX_P0 P29 U3 CLK_PCI_SIO_R CLK_PCI_MINI_R R247 1 2 22_0402_5% NOSPREAD@
(13) A_MRX_STX_P0 PCIE_TX0P PCICLK5 CLK_PCI_SIO_R (22) CLK_PCI_MINI (31)
C296 A_MRX_STX_N0C508 1 2 0.01U_0402_16V7KA_MRX_C_STX_N0 P28 V1 R237 1 2 22_0402_5% CLK_PCI_PCM_R R226 1 2 22_0402_5% NOSPREAD@
(13) A_MRX_STX_N0 PCIE_TX0N PCICLK6 PCI_CLK6 (22) CLK_PCI_PCM (32)
1 2 0.1U_0402_16V4Z (13) A_MRX_STX_P1
A_MRX_STX_P1 C216 1 2 0.01U_0402_16V7K A_MRX_C_STX_P1 M29 PCIE_TX1P SPDIF_OUT/GPIO41 T1 R228 1 2 0_0402_5% SB_SPDIF (22)
CLK_PCI_1394_R R223 1 2 22_0402_5% NOSPREAD@
CLK_PCI_1394 (35)
A_MRX_STX_N1C217 1 2 0.01U_0402_16V7KA_MRX_C_STX_N1 M28 CLK_PCI_SIO_R R217 1 2 22_0402_5% NOSPREAD@
(13) A_MRX_STX_N1 PCIE_TX1N CLK_PCI_SIO (36)
K29 AJ9 R183 1 2 33_0402_5% PCIRST#
PCIE_TX2P PCIRST#
5
1

K28 PCIE_TX2N
D PLACE THESE PCIE AC COUPLING H29 PCI_AD[31..0] D
P
OE#

PCIE_TX3P PCI_AD[31..0] (22,26,31,32,35)

A_RST# 2 4 NB_RST# NB_RST# (14,23,28,31,36) CAPS CLOSE TO U600 H28 W7 PCI_AD0
A Y PCIE_TX3N AD0/ROMA18 PCI_AD1
AD1/ROMA17 Y1
G

U15 A_MTX_C_SRX_P0 T25 W8 PCI_AD2 +3VS +3VS

(13) A_MTX_C_SRX_P0 PCIE_RX0P AD2/ROMA16
2

SN74AHCT1G125GW_SOT353-5 A_MTX_C_SRX_N0 T26 W5 PCI_AD3

(13) A_MTX_C_SRX_N0
3

PCIE_RX0N AD3/ROMA15

PCI EXPRESS INTERFACE

R570 R177 A_MTX_C_SRX_P1 T22 AA5 PCI_AD4
(13) A_MTX_C_SRX_P1 PCIE_RX1P AD4/ROMA14

1
10K_0402_5% 47K_0402_5% A_MTX_C_SRX_N1 T23 Y3 PCI_AD5
(13) A_MTX_C_SRX_N1 PCIE_RX1N AD5/ROMA13

1
@ R408 1 2 49.9_0402_1% A_MTX_C_SRX_P2 M25 AA6 PCI_AD6 R256
@ R405 49.9_0402_1% A_MTX_C_SRX_N2 PCIE_RX2P AD6/ROMA12 PCI_AD7 L49 10K_0402_5% @
1 2 M26 AC5
1

@ R414 49.9_0402_1% A_MTX_C_SRX_P3 PCIE_RX2N AD7/ROMA11 PCI_AD8

1 2 M22 PCIE_RX3P AD8/ROMA9 AA7 FBM-L11-160808-800LMT_0603
@ R411 1 2 49.9_0402_1% A_MTX_C_SRX_N3 M23 AC3 PCI_AD9 U42

2
PCIE_RX3N AD9/ROMA8 PCI_AD10 CLKOUT1 R231
AD10/ROMA7 AC7 8 DLY CNTRL CLKOUT1 2 1SPREAD@2 22_0402_5%
CLK_PCI_LAN (26)
R137 1 2 150_0402_1% E29 AJ7 PCI_AD11 CLK_PCI_LAN_R 1 CLKIN CLKOUT2 R229 1SPREAD@2 22_0402_5%
CLKOUT2 6 CLK_PCI_LPC (28)

2
R138 PCIE_CALRP AD11/ROMA6
PCIE_VDDR 1 2 150_0402_1% E28 PCIE_CALRN AD12/ROMA5 AD4 PCI_AD12 3 VDD CLKOUT3 7
CLKOUT3 R230 1SPREAD@2 22_0402_5%
CLK_PCI_MINI (31)
AB11 PCI_AD13 13 VDD 10 CLKOUT4 R232 1SPREAD@2 22_0402_5%
AD13/ROMA4 CLKOUT4 CLK_PCI_PCM (32)
R136 1 2 4.12K_0402_1% E27 AE6 PCI_AD14 R2141 2 10K_0402_5% 9 SSON 11 CLKOUT5 R238 1SPREAD@2 22_0402_5%
+1.8VS PCIE_CALI AD14/ROMA3 CLKOUT5 CLK_PCI_1394 (35)
L5 AC9 PCI_AD15 4 SS% CLKOUT6 R487 22_0402_5%
AD15/ROMA2 PCI_AD16 CLKOUT6 14 1
SPREAD@
2 CLK_PCI_SIO (36)
1 2 U29 PCIE_PVDD AD16/ROMD0 AA3 5 GND CLKOUT7 15

1
1 1 AJ4 PCI_AD17 12 GND 16
KC FBM-L11-201209-221LMAT_0805 C244 C249 AD17/ROMD1 PCI_AD18 CLKOUT8
U28 PCIE_PVSS AD18/ROMD2 AB1 1 C326
AH4 PCI_AD19 1U_0402_6.3V4Z ASM3P623S00EF-16-TR_TSSOP16
10U_0805_10V4Z 1U_0603_10V6K AD19/ROMD3 PCI_AD20 R253 SPREAD@
PCIE_VDDR F27 PCIE_VDDR_1 AD20/ROMD4 AB2
2 2 PCI_AD21 10K_0402_5%
FOR SB600 VCC_SB= 1.2V F28 AJ3

2
PCIE_VDDR_2 AD21/ROMD5 PCI_AD22 2
FOR SB460 VCC_SB= 1.8V C608 AND C609 CLOSE F29 PCIE_VDDR_3 AD22/ROMD6 AB3
TO U600.U29 G26 AH3 PCI_AD23 2005/12/30 Change net to +3VALW
PCIE_VDDR_4 AD23/ROMD7 PCI_AD24 +3VALW
R601 CALRP: SB600=562R 1%, SB460=150R 1% G27 PCIE_VDDR_5 AD24 AC1
R603 CALRN: SB600=2.05K 1%, SB460=150R 1% G28 AH2 PCI_AD25
PCIE_VDDR_6 AD25 PCI_AD26 C299
R603 CALRN: SB600=0R 1%, SB460=4.12K 1% G29 PCIE_VDDR_7 AD26 AC2
J27 AH1 PCI_AD27 1 2 0.1U_0402_16V4Z
PCIE_VDDR_8 AD27 PCI_AD28
J29 PCIE_VDDR_9 AD28 AD2
C +1.8VS PCIE_VDDR L25 AG2 PCI_AD29 C
PCIE_VDDR_10 AD29

5
L7 L26 AD1 PCI_AD30
PCIE_VDDR_11 AD30

PCI INTERFACE
1 2 L29 AG1 PCI_AD31 PCI_CBE#[3..0] PCIRST# 1

P
PCIE_VDDR_12 AD31 PCI_CBE#[3..0] (26,31,32,35) IN1
1 1 1 1 1 1 N29 AB9 PCI_CBE#0 4 PCI_RST# PCI_RST# (26,31,32,34,35)
KC FBM-L11-201209-221LMAT_0805 C515 C516 C512 C247 C250 C514 PCIE_VDDR_13 CBE0#/ROMA10 PCI_CBE#1 O
CBE1#/ROMA1 AF9 2 IN2

G
AJ5 PCI_CBE#2
CBE2#/ROMWE#

1
22U_0805_6.3V6M 1U_0603_10V6K AG3 PCI_CBE#3

3
CBE3#

2
2 2 2 2 2 2 AA2 PCI_FRAME# R190
FRAME# PCI_FRAME# (26,31,32,35)
1U_0603_10V6K 1U_0603_10V6K AH6 PCI_DEVSEL# PCI_DEVSEL# (26,31,32,35) R193 47K_0402_5%
1U_0603_10V6K 1U_0603_10V6K DEVSEL#/ROMA0 PCI_I RDY# 10K_0402_5%
IRDY# AG5 PCI_IRDY# (26,31,32,35)
AA1 PCI_TRDY# PCI_TRDY# (26,31,32,35) U16

2
TRDY#/ROMOE# PCI_PAR SN74AHC1G08DCKR_SC70
AF7 PCI_PAR (26,31,32,35)

1
PAR/ROMA19 PCI_STOP#
STOP# Y2 PCI_STOP# (26,31,32,35)
AG8 PCI_PERR# PCI_PERR# (26,31,32,35)
20M_0603_5% 2 PERR#
1 R244 SERR# AC11 PCI_SERR# PCI_SERR# (26,31,32)
AJ8 PCI_REQ#0 PCI_REQ#0 (35)
18P_0402_50V8J C314 REQ0# PCI_REQ#1
REQ1# AE2 PCI_REQ#1 (31)
1 2 32K_X1 AG9 PCI_REQ#2 PCI_REQ#2 (32) SB460 ONLY RP33
REQ2# PCI_REQ#3 +3VS PCI_SERR#
REQ3#/PDMA_REQ0# AH8 PCI_REQ#3 (26) +3VS 1 8
Y3 AH5 PCI_REQ#4 2 7 PCI_TRDY#
REQ4#/PLL_BP33/PDMA_REQ1#
2

3 4 AD11 PCI_GNT#0 PCI_GNT#0 (35) 3 6 PCI_FRAME#

NC OUT R218 GNT0# PCI_GNT#1 LPC_DRQ#0 R124 10K_0402_5% PCI_STOP#
GNT1# AF2 PCI_GNT#1 (31) 1 2 4 5
2 1 10M_0402_5% AH7 PCI_GNT#2 PCI_GNT#2 (32) LPC_DRQ#1 R122 1 2 10K_0402_5%
NC IN GNT2# PCI_GNT#3 LPC_AD3 R128 100K_0402_5% 8.2K_1206_8P4R_5%
GNT3#/PLL_BP66/PDMA_GNT0# AB12 PCI_GNT#3 (26) 1 2
AG4 LPC_AD2 R127 1 2 100K_0402_5%
1

32.768KHZ_12.5P_1TJS125DJ2A073 GNT4#/PLL_BP50/PDMA_GNT1# PM_CLKRUN# LPC_AD1 R126 100K_0402_5%

CLKRUN# AG7 PM_CLKRUN# (26,31,36) 1 2
1 2 32K_X2 AF6 PCI_PLOCK# LPC_AD0 R121 1 2 100K_0402_5%
LOCK# PM_CLKRUN# R120 10K_0402_5% RP31
1 2
18P_0402_50V8J C307 AD3 PCI_PIRQE# PCI_PIRQE# (32,35) SERIRQ R123 1 2 10K_0402_5% 1 8 PCI_PLOCK#
INTE#/GPIO33 +3VS
AF1 PCI_PIRQF# PCI_PIRQF# (26) 2 7 PCI_I RDY#
B INTF#/GPIO34 PCI_PIRQG# PCI_PERR# B
PLACE THESE COMPONENTS CLOSE TO U600, AND 32K_X1 INTG#/GPIO35 AF4
PCI_PIRQH#
PCI_PIRQG# (31) LPC PULL UPS 3 6
PCI_DEVSEL#
D2 X1 INTH#/GPIO36 AF3 PCI_PIRQH# (26,31,32) 4 5
USE GROUND GUARD FOR 32K_X1 AND 32K_X2
8.2K_1206_8P4R_5%

XTAL
FOR SB600, CONNECT TO CPU_PG/LDT_PG 32K_X2 C1 +RTCBATT
FOR SB460, CONNECT TO SSMUXSEL/GPIO0
(8,19) CPU_PWRGD
R440 1 2 @ 0_0402_5% AC26
X2

CPU_PG
LAD0
LAD1
AG24
AG25
LPC_AD0
LPC_AD1
LPC_AD0 (28,36)
LPC_AD1 (28,36)
- BATT1
+ +3VS 1
RP32
8 PCI_PIRQE#
W26 AH24 LPC_AD2 LPC_AD2 (28,36) 2 7 PCI_PIRQF#
INTR/LINT0 LAD2 LPC_AD3 +RTCBATT PCI_PIRQG#
W24 NMI/LINT1 LAD3 AH25 LPC_AD3 (28,36) 2 1 3 6
W25 AF24 LPC_FRAME# LPC_FRAME# (22,28,36) 4 5 PCI_PIRQH#
INIT# LFRAME#

L PC
AA24 AJ24 LPC_DRQ#0 LPC_DRQ#0 (36)
SMI# LDRQ0#

1
AA23 AH26 LPC_DRQ#1 8.2K_1206_8P4R_5%
NC LDRQ1#

C PU
AA22 W22 BMREQ# (14) RTCBATT D7
(8) CPU_SIC IGNNE# BMREQ#
(8) CPU_SID AA26 A20M# SERIRQ AF23 SERIRQ (28,32,36)
Y27 BAS40-04_SOT23 RP34
FERR# +RTCVCC PCI_REQ#0
(14) ALLOW_LDTSTOP AA25 STPCLK#/ALLOW_LDTSTP RTCCLK D3 RTC_CLK (22) +3VS 1 8
AH9 F5 RTC_IRQ# (22) 2 7 PCI_REQ#1

2
R446 1 CPU_STP#/DPSLP_3V# RTC_IRQ#/ACPWR_STRAP
(19) AZ_DOCK_EN# 2 0_0402_5% B24 NC 3 6 PCI_REQ#2
W23 E1 VBAT_IN R240 2 1 4 5 PCI_REQ#3
RTC
DPRSLPVR VBAT +CHGRTC
AC25 D1 1 1 1K_0402_5%
(8) LDT_RST# LDT_RST# RTC_GND
R447 1 2 10K_0402_5% C322 1 1 8.2K_1206_8P4R_5%
+3VS

2
FOR SB460, THIS BALL C315 C317
@ IS LDT_RST# ONLY 218S4RBSA11G SB460_BGA549 0.1U_0402_16V4Z R250 @ C327
2 2 0.1U_0402_16V4Z RP30
0_0402_5%
1U_0402_6.3V4Z 2 2 PCI_REQ#4
+3VS 1 8
2 7 PCI_PAR

1
2

2 1 3 6
R452 J2 JOPEN 4.7U_0805_10V4Z 4 5
10K_0402_5%
A @
@
Please Closed RAM
RTC Battery 8.2K_1206_8P4R_5% A
1

Door

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number Re v
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: ¬P期四, 五月 11, 2006 Sheet 18 of 51
5 4 3 2 1
 5 4 3 2 1

SB460 ONLY
+3VS

R144 2 1 10K_0402_5% GPIO5 U18D

R432 2 1 10K_0402_5% LPC_SMI#
R140 10K_0402_5% GPIO4 Part 4 of 4
R125
2
2
1
1 10K_0402_5% SB460_GPIO31 SB460
EC_SWI# A3 A17 CLK_USB_48M
(28) EC_SWI# PCI_PME#/GEVENT4# USBCLK CLK_USB_48M (17)
R152 2 1 10K_0402_5% GPIO7 EC_SCI# B2
(28) EC_SCI# RI#/EXTEVNT0#
R180 2 1 10K_0402_5% EC_THERM# (28) PM_SLP_S3# PM_SLP_S3# F7 A14 R164 2 1 11.3K_0402_1%
PM_SLP_S5# SLP_S3# USB_RCOMP
(28) PM_SLP_S5# A5

ACPI / WAKE UP EVENTS

PWRBTN_OUT# SLP_S5#
(28) PWRBTN_OUT# E3 PWR_BTN# USB_ATEST1 A11
SYS_PWROK B5 A10
D (8,37) SB_PWROK SUS_STAT# PWR_GOOD USB_ATEST0 D
(30) SUS_STAT# B3 SUS_STAT#
+3VS F9 H12
R179 2 NC NC
1 10K_0402_5%
R424 2 1 2.2K_0402_5% SB_CK_SCLK R484 2 1 10K_0402_5%
E9
G9
TEST1 NC G12
0103 Change to 11.3K
R430 2 SB_CK_SDAT EC_GA20 TEST0
1 2.2K_0402_5% (28) EC_GA20 AF26 GA20IN NC E12
R567 2 1 10K_0402_5% REQ5# EC_KBRST# AG26 D12
(28) EC_KBRST# LPC_PME# KBRST# NC
D7 LPC_PME#/GEVENT3#
LPC_SMI# C25 E14
LPC_SMI#/EXTEVNT1# USB_HSDP7+
(28) S3_STATE
@ R577 2 1 0_0402_5% S3_STATE_R D9 D14

USB INTERFACE
+3VALW SYS_RESET# S3_STATE/GEVENT5# USB_HSDM7-
F4 SYS_RESET#/GPM7#
SB_PCIE_WAKE# E7 G14 USB20_P6 USB20_P6 (38)
R475 10K_0402_5% SYS_RESET# (31,34) SB_PCIE_WAKE# BLINK/GPM6# WAKE#/GEVENT8# USB_HSDP6+ USB20_N6
2 1 C2 BLINK/GPM6# USB_HSDM6- H14 USB20_N6 (38)
R468 2 1 10K_0402_5% LPC_PME# H_THERMTRIP# G7
(8) H_THERMTRIP# SMBALERT#/THRMTRIP#/GEVENT2#
R479 2 1 10K_0402_5% PWRBTN_OUT# D16 USB20_P5 USB20_P5 (38)
R464 10K_0402_5% EC_SMI# USB_HSDP5+ USB20_N5
2 1 USB_HSDM5- E16 USB20_N5 (38)
R466 2 1 10K_0402_5% SB_PCIE_WAKE# EC_RSMRST# E2
(28) EC_RSMRST# RSMRST#
R470 2 1 4.7K_0402_5%PM_SLP_S3# OSC / RST D18 USB20_P4 USB20_P4 (38)
R184 4.7K_0402_5%PM_SLP_S5# SB_OSC_INT USB_HSDP4+ USB20_N4
2 1 (14,17) SB_OSCIN B23 14M_OSC USB_HSDM4- E18 USB20_N4 (38)
R465 2 1 4.7K_0402_5%S3_STATE_R
R463 2 1 4.7K_0402_5%CP_PE# C28 G16 USB20_P3 USB20_P3 (31)
@ R192 10K_0402_5% SUS_STAT# R578 2 NC USB_HSDP3+ USB20_N3
2 1 1 10K_0402_5% A26 ROM_CS#/GPIO1 USB_HSDM3- H16 USB20_N3 (31)
R197 2 1 10K_0402_5% BLINK/GPM6# R141 2 1 10K_0402_5% B29
R267 10K_0402_5% EC_SWI# GPIO7 GHI#/GPIO6 USB20_P2
2 1 A23 VGATE/GPIO7 USB_HSDP2+ G18 USB20_P2 (34)
R44 2 1 10K_0402_5% USB_OC#0 R579 2 1 0_0402_5% GPIO4 B27 H18 USB20_N2 USB20_N2 (34)
(30) EC_FLASH# GPIO4 USB_HSDM2-
R172 2 1 10K_0402_5% USB_OC#1 R428 2 1 0_0402_5% @ GPIO5 D23
(28,30) SB_INT_FLASH_SEL# GPIO5
R507 2 1 10K_0402_5% USB_OC#2 B26 D19 USB20_P1 USB20_P1 (34)
(39) SB_SPKR SPKR/GPIO2 USB_HSDP1+
R134 10K_0402_5% USB_OC#3 SB_CK_SCLK USB20_N1

GPIO
2 1 (10,11,17,31,34) SB_CK_SCLK C27 SCL0/GPOC0# USB_HSDM1- E19 USB20_N1 (34)
SB_CK_SDAT B28
(10,11,17,31,34) SB_CK_SDAT SDA0/GPOC1#
R571 2 1 10K_0402_5% EC_SCI# C3 NC USB_HSDP0+ G19 USB20_P0 USB20_P0 (34)
R574 2 1 10K_0402_5% USB_OC#6 F3 NC USB_HSDM0- H19 USB20_N0 USB20_N0 (34)
C R441 2 1 10K_0402_5% D26 AVDD_USB +3VALW C
R145 2 DDC1_SCL/GPIO9
1 10K_0402_5% C26 DDC1_SDA/GPIO8
L46
R142 1 2 0_0402_5% A27 B9 1 2
(8,18) CPU_PWRGD LDT_PG/SSMUXSEL/GPIO0 AVDDTX_0
R203 2 1 10K_0402_5% GPIO3 A4 B11 1 1 1 1 1 1 1 1
NC AVDDTX_1 C533 C535 C542 C537 C546 C284 C525 C545 KC FBM-L11-201209-221LMAT_0805
AVDDTX_2 B13
R474 2 1 10K_0402_5% ACZ_SDIN0 BALLS(C6 AND C5) ARE FOR SB600 ONLY (NC FOR SB460) B16
R358 10K_0402_5% ACZ_SDIN1 AVDDTX_3 0.1U_0402_16V4Z
2 1 C6 NC AVDDTX_4 B18
R485 2 2 2 2 2 2 2 2
2 1 @ 10K_0402_5% ACZ_SDIN2 C5 NC AVDDRX_0 A9
R334 2 1 10K_0402_5% SB_AC_BITCLK EC_SMI# C4 B10 10U_0805_10V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
(28) EC_SMI# USB_OC7#/GEVENT7# AVDDRX_1
USB_OC#6 10U_0805_10V4Z 1U_0402_6.3V4Z 0.1U_0402_16V4Z

USB OC
B4 USB_OC6#/GEVENT6# AVDDRX_2 B12
SB_AZ_RST# B6 B14
R171 USB_OC5#/AZ_RST#/GPM5# AVDDRX_3 +3VALW
(34) CP_PE# 2 1 0_0402_5% A6 USB_OC4#/GPM4# AVDDRX_4 B17 +3.3V_AVDDC
R139 2 1 0_0402_5% @ USB_OC#3 C8 L12
(30) EC_FLASH# USB_OC3#/GPM3#
R298 2 1 10K_0402_5% SB_AZ_RST# EC_LID_OUT# R506 2 1 0_0402_5% USB_OC#2 C7 A12 1 2
(28) EC_LID_OUT# USB_OC2#/FANOUT1/LLB#/GPM2# AVDDC
R296 2 1 10K_0402_5% SB_AZ_SYNC R580 2 1 0_0402_5% @ USB_OC#1 B8 1 1 1
(28,30) SB_INT_FLASH_SEL# USB_OC1#/GPM1#
R294 2 1 10K_0402_5% SB_AZ_SDOUT USB_OC#0 A8 A13 C286 C292 KC FBM-L11-201209-221LMAT_0805
(34) USB_OC#0 USB_OC0#/GPM0# AVSSC
R333 2 1 10K_0402_5% SB_AZ_BITCLK C294
R489 2 1 10K_0402_5% SB_AC_RST# A16 1U_0402_6.3V4Z
SB_AZ_BITCLK AVSS_USB_1 2 2 2
N2 AZ_BITCLK AVSS_USB_2 C9
SB_AZ_SDOUT 0.1U_0402_16V4Z

AZALIA
M2 AZ_SDOUT AVSS_USB_3 C10
K2 C11 2.2U_0603_6.3V6K
SB_AZ_SYNC NC AVSS_USB_4
L3 AZ_SYNC AVSS_USB_5 C12
K3 NC AVSS_USB_6 C13
AVSS_USB_7 C14 PLACE C286 AND

USB PWR
SB_AC_BITCLK L1 C16 C294 CLOSE TO
SB_AC_SDOUT AC_BITCLK/GPIO38 AVSS_USB_8
(22) SB_AC_SDOUT L2 AC_SDOUT/GPIO39 AVSS_USB_9 C17 U18
R482 2 1 33_0402_5% SB_AZ_BITCLK ACZ_SDIN0 L4 C18
(39) AZ_BITCLK (39) ACZ_SDIN0 ACZ_SDIN0/GPIO42 AVSS_USB_10
ACZ_SDIN1

AC97
(38) ACZ_SDIN1 J2 ACZ_SDIN1/GPIO43 AVSS_USB_11 C19
R234 2 1 33_0402_5% 2 1 ACZ_SDIN2 J4 C20
(38) AC_BITCLK (28,45) ACIN R581 0_0402_5% @ ACZ_SDIN2/GPIO44 AVSS_USB_12
M3 AC_SYNC/GPIO40 AVSS_USB_13 D11
B R505 2 1 33_0402_5% SB_AZ_SYNC SB_AC_RST# L5 D21 B
(39) AZ_SYNC AC_RST#/GPIO45 AVSS_USB_14
AVSS_USB_15 E11
R236 2 1 33_0402_5% E21
(38) AC_SYNC AVSS_USB_16
AVSS_USB_17 F11
R175 2 1 33_0402_5% SB_AZ_RST# GPIO3 E23 F12
(39) AZ_RST# FANOUT0/GPIO3 AVSS_USB_18
SB460_GPIO31 AC21 F14
(23) IDE_HRESET# GPIO31 AVSS_USB_19
R483 2 1 33_0402_5% REQ5# AD7 F16
(38) AC_RST# (22) SB460_GPIO13 GPIO13 AVSS_USB_20
R187 2 1 0_0402_5% @ AE7 F18
(18) AZ_DOCK_EN# DPSLP_OD#/GPIO37 AVSS_USB_21
R235 2 1 33_0402_5% SB_AZ_SDOUT AA4 F19
(39) AZ_SDOUT (22) SB460_GPIO14 GPIO14 AVSS_USB_22
R185 2 1 0_0402_5% T4 F21
(8,28) EC_THERM# TALERT#/GPIO10 AVSS_USB_23
R233 2 1 33_0402_5% R477 2 1 0_0402_5% D4 G11
(38) AC_SDOUT (8,14) LDT_STOP# SLP#/LDT_STP# AVSS_USB_24
AB19 NC AVSS_USB_25 G21
AVSS_USB_26 H11
SB460 ONLY AVSS_USB_27 H21
AVSS_USB_28 J11
AVSS_USB_29 J12
AVSS_USB_30 J14
AVSS_USB_31 J16
AVSS_USB_32 J18
AVSS_USB_33 J19

218S4RBSA11G SB460_BGA549

A A

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 11, 2006 Sheet 19 of 51
5 4 3 2 1
 5 4 3 2 1

D D

PLACE SATA AC COUPLING

CAPS CLOSE TO SB460
U18B
SATA@
SATA_STX_C_DRX_P0 0.01U_0402_16V7K 1 2 C554 SATA_STX_DRX_P0
(23) SATA_STX_C_DRX_P0
SATA_STX_C_DRX_N0 0.01U_0402_16V7K 1 2 C556 SATA_STX_DRX_N0
AH21
AJ21
SATA_TX0+ SB460 AB29 IDE_IOR DY
(23) SATA_STX_C_DRX_N0 SATA_TX0- PIDE_IORDY IDE_IORDY (23)
SATA@ Part 2 of 4 AA28 IDE_IRQ IDE_IRQ (23)
SATA_DTX_C_SRX_N0 0.01U_0402_16V7K 1 SATA_DTX_SRX_N0 PIDE_IRQ IDE_A0
(23) SATA_DTX_C_SRX_N0 2 C564 AH20 SATA_RX0- PIDE_A0 AA29 IDE_A0 (23)
SATA_DTX_C_SRX_P0 0.01U_0402_16V7K 1 2 C565 SATA_DTX_SRX_P0 AJ20 AB27 IDE_A1 IDE_A1 (23)
(23) SATA_DTX_C_SRX_P0 SATA_RX0+ PIDE_A1
SATA@ Y28 IDE_A2 IDE_A2 (23)
PIDE_A2 IDE_DACK#
SATA@ AH18 SATA_TX1+ PIDE_DACK# AB28 IDE_DACK# (22,23)
R5461 2 0_0402_5% PATA@ AJ18 AC27 IDE_DREQ IDE_DREQ (23)
SATA_TX1- PIDE_DRQ IDE_IOR#
PIDE_IOR# AC29 IDE_IOR# (23)
SATA_X1 C297 1 2 27P_0402_50V8J AH17 AC28 IDE_IOW# IDE_IOW# (23)
SATA_RX1- PIDE_IOW# IDE_CS1#
AJ17 SATA_RX1+ PIDE_CS1# W28 IDE_CS1# (23)
1

1
R176 SATA@ W27 IDE_CS3# IDE_CS3# (23)
Y2 PIDE_CS3#

SERIAL ATA
AH13 SATA_TX2+
10M_0402_5% 25MHZ_20P IDE_D0

ATA 66/100
AH14 SATA_TX2- PIDE_D0 AD28
SATA@ SATA@ AD26 IDE_D1
2

PIDE_D1 IDE_D2
AH16 AE29
2

SATA_X2 C295 1 SATA_RX2- PIDE_D2 IDE_D3

2 AJ16 SATA_RX2+ PIDE_D3 AF27
AG29 IDE_D4
27P_0402_50V8J PIDE_D4 IDE_D5
AJ11 SATA_TX3+ PIDE_D5 AH28
SATA@ AH11 AJ28 IDE_D6
+3VS
AH12
SATA_TX3-

SATA_RX3-
PIDE_D6
PIDE_D7
PIDE_D8
AJ27
AH27
IDE_D7
IDE_D8
IDE_D9
NOTE:
AJ13 SATA_RX3+ PIDE_D9 AG27
C SATA@ IDE_D10 C
PIDE_D10 AG28 IF THERE IS NO IDE, TEST
1

R462 2 1 1K_0402_1% SATA_CAL AF12 AF28 IDE_D11

R146 SATA_CAL PIDE_D11 IDE_D12
POINTS FOR DEBUG BUS
PIDE_D12 AF29
4.7K_0402_5% 1 2 C544 SATA_X1 AD16 AE28 IDE_D13 IS MANDATORY
2.2U_0603_6.3V6K SATA_X1 PIDE_D13 IDE_D14
PIDE_D14 AD25
@ SATA_X2 AD18 AD29 IDE_D15
2

SATA_X2 PIDE_D15 IDE_D[15..0]

IDE_D[15..0] (23)
(28) SATA_LED# SATA_LED# 2 1 SATA_ACT# AC12
R143 0_0402_5% SATA ACTIVITY LED SATA_ACT#
SATA@ PLLVDD_ATA AD14 PLLVDD_SATA_1
PLACE SATA_CAL AJ10 PLLVDD_SATA_2 NC J3
J6
RES & CAP VERY AC16
NC
G3
XTLVDD_ATA XTLVDD_SATA NC

SPI ROM
CLOSE TO BALL NC G2
OF U18 AVDD_SATA AE14 AVDD_SATA_1 NC G6
AE16 AVDD_SATA_2
AE18 AVDD_SATA_3 NC C23
NOTE: AE19
AF19
AVDD_SATA_4 NC G5
AVDD_SATA_5
VCC_SB=1.2V WHEN SB600 R462 IS 1K 1% FOR 25MHz AF21 AVDD_SATA_6 NC M4
AG22 T3
VCC_SB 1.8V WHEN SB460 XTAL, 4.99K 1% FOR 100MHz AG23
AVDD_SATA_7 NC
V4
AVDD_SATA_8 NC
INTERNAL CLOCK AH22 AVDD_SATA_9
AH23 AVDD_SATA_10 NC N3
AJ12 AVDD_SATA_11 NC P2
AJ14 W4

SERIAL ATA POWER

AVDD_SATA_12 NC
AJ19 AVDD_SATA_13
+1.8VS AJ22 P5
PLLVDD_ATA AVDD_SATA_14 NC
AJ23 AVDD_SATA_15 NC P7
NC P8
B L13 B

HW MONITOR
AB14 AVSS_SATA_1 NC T8
1 2 AB16 AVSS_SATA_2 NC T7
1

CHB2012U121_0805 1 1 AB18 AVSS_SATA_3

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C293 C291 R547 AC14 V5

AVSS_SATA_4 NC
C650 CLOSE TO THE 0_0402_5% AC18 AVSS_SATA_5 NC L7
BALL OF U600 SATA@ SATA@ PATA@ AC19 M8
SATA@ 2 2 AVSS_SATA_6 NC
AD12 V6
2

AVSS_SATA_7 NC
AD19 AVSS_SATA_8 NC M6
AD21 AVSS_SATA_9 NC P4
AE12 AVSS_SATA_10 NC M7
AE21 AVSS_SATA_11 NC V7
AF11 AVSS_SATA_12
AF14 AVSS_SATA_13
AF16 AVSS_SATA_14
AF18 AVSS_SATA_15 NC N1
AG11 AVSS_SATA_16
AG12 AVSS_SATA_17 NC M1
+1.8VS XTLVDD_ATA AG13 AVSS_SATA_18
AG14 AVSS_SATA_19
AG16 AVSS_SATA_20
AG17 AVSS_SATA_21
AG18 AVSS_SATA_22
L47 1 2 AG19 AVSS_SATA_23
1

CHB2012U121_0805 1 AG20
SATA@ C534 R548 AVSS_SATA_24
AG21 AVSS_SATA_25
C534 CLOSE TO THE 0_0402_5% AH10 AVSS_SATA_26
BALL OF U18 1U_0402_6.3V4Z PATA@ AH19
2 AVSS_SATA_27
SATA@
2

A +1.8VS 218S4RBSA11G SB460_BGA549 A

AVDD_SATA

L45 1 2
1

CHB2012U121_0805 1 1 1 1 1
SATA@ C539 C529 C522 C543 C524 R549
0_0402_5%
2
22U_0805_6.3V6M
SATA@2 2
SATA@
2
SATA@ 1U_0402_6.3V4Z
2 PATA@
Security Classification Compal Secret Data Compal Electronics. inc.
SATA@ Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
2

0.1U_0402_16V4Z 0.1U_0402_16V4Z SCHEMATIC, M/B LA-3121P

SATA@ 0.1U_0402_16V4Z
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 11, 2006 Sheet 20 of 51
5 4 3 2 1
 5 4 3 2 1

+3VS U18C

A25
A28
VDDQ_1 SB460 VSS_1 A1
A20
VDDQ_2 VSS_2
C29 VDDQ_3 Part 3 of 4 VSS_3 A21
D24 VDDQ_4 VSS_4 A29
L9 VDDQ_5 VSS_5 B1
L21 VDDQ_6 VSS_6 B7
PLACE ALL THE DECOUPLING CAPS ON M5 VDDQ_7 VSS_7 B25
D P3 C21 D
THIS SHEET CLOSE TO SB AS POSSIBLE. VDDQ_8 VSS_8
P9 VDDQ_9 VSS_9 C22
T5 VDDQ_10 VSS_10 C24
V9 VDDQ_11 VSS_11 D6
+3VS W2 E24
C513 VDDQ_12 VSS_12
W6 VDDQ_13 VSS_13 F2
220U_D2_4VM_R15 W21 F23
VDDQ_14 VSS_14
1 W29 VDDQ_15 VSS_15 G1
1 1 1 1 1 1 AA12 VDDQ_16 VSS_16 J1
+ C521 C526 C523 C518 C519 C517 AA16 J8
VDDQ_17 VSS_17
AA19 VDDQ_18 VSS_18 L6
AC4 VDDQ_19 VSS_19 L8
2 2 2 2 2 2 2
AC23 VDDQ_20 VSS_20 M9
1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z AD27 M12
1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z VDDQ_21 VSS_21
AE1 VDDQ_22 VSS_22 M15
AE9 VDDQ_23 VSS_23 M18
AE23 VDDQ_24 VSS_24 N13
AH29 VDDQ_25 VSS_25 N17
+1.8VALW AJ2 P1
VDDQ_26 VSS_26
AJ6 P6
VCC_SB=1.8V WHEN SB460 +1.8VS AJ26
VDDQ_27
VDDQ_28
VSS_27
VSS_28 P21
1 1 1 1 VSS_29 R12
C532 C541 C536 C553 M13 R15
VDD_1 VSS_30
M17 VDD_2 VSS_31 R18
0.1U_0402_16V4Z 0.1U_0402_16V4Z N12 T6
2 2 2 2 VDD_3 VSS_32
N15 VDD_4 VSS_33 T9
0.1U_0402_16V4Z N18 U13
0.1U_0402_16V4Z VDD_5 VSS_34
R13 VDD_6 VSS_35 U17
R17 VDD_7 VSS_36 V3
U12 VDD_8 VSS_37 V8
C +1.8VS U15 V12 C
VDD_9 VSS_38
U18 VDD_10 VSS_39 V15
V13 VDD_11 VSS_40 V18
+3VALW V17 V21
1 1 1 1 1 VDD_12 VSS_41
C527 C528 C531 C540 W1
VSS_42
A2 S5_3.3V_1 VSS_43 W9
C538 A7 Y29
2 22U_0805_6.3V6M
2 2 2 2 S5_3.3V_2 VSS_44
F1 S5_3.3V_3 VSS_45 AA11

POWER
1U_0402_6.3V4Z 1U_0402_6.3V4Z 1U_0402_6.3V4Z J5 AA14
1U_0402_6.3V4Z S5_3.3V_4 VSS_46
J7 S5_3.3V_5 VSS_47 AA18
+1.8VALW K1 AC6
S5_3.3V_6 VSS_48
VSS_49 AC24
+1.8VS AVDDCK_1.8V
L11 VCC_SB=1.8V WHEN SB460 G4
H1
S5_1.8V_1
S5_1.8V_2
VSS_50
VSS_51
AD9
AD23
1 2 H2 S5_1.8V_3 VSS_52 AE3
+1.8VALW H3 AE27
1 S5_1.8V_4 VSS_53
CHB2012U121_0805 AG6
C262 VSS_54
A18 USB_PHY_1.8V_1 VSS_55 AJ1
2.2U_0805_10V6K A19 AJ25
2 USB_PHY_1.8V_2 VSS_56
B19 USB_PHY_1.8V_3 VSS_57 AJ29
B20 USB_PHY_1.8V_4
+1.2V_HT B21
CPU_PWR=1.2V WHEN SB460 USB_PHY_1.8V_5
PCIE_VSS_1 D27
PCIE_VSS_2 D28
AA27 CPU_PWR PCIE_VSS_3 D29
PCIE_VSS_4 F26
+5VS R173 2 1 V5_VREF AE11 G23
1K_0402_5% V5_VREF PCIE_VSS_5
PCIE_VSS_6 G24
+3VS AVDDCK_1.8V A24 AVDDCK PCIE_VSS_7 G25
D6 PCIE_VSS_8 H27
B A22 J23 B
NC PCIE_VSS_9
2 1 2 2 PCIE_VSS_10 J26
C520 C298 B22 J28
AVSSCK PCIE_VSS_11
PCIE_VSS_12 K27
CH751H-40PT _SOD323 0.1U_0402_16V4Z V29 L22
+1.8VALW 1 1 PCIE_VSS_42 PCIE_VSS_13
V28 PCIE_VSS_41 PCIE_VSS_14 L23
V27 PCIE_VSS_40 PCIE_VSS_15 L24
V26 PCIE_VSS_39 PCIE_VSS_16 L27
1U_0402_6.3V4Z
2006/4/13 modify V25
V24
PCIE_VSS_38 PCIE_VSS_17 L28
M21
PCIE_VSS_37 PCIE_VSS_18
1 1 1 1 1 V23 PCIE_VSS_36 PCIE_VSS_19 M24
C530 C551 C552 C550 V22 M27
PCIE_VSS_35 PCIE_VSS_20
U27 PCIE_VSS_34 PCIE_VSS_21 N27
C548 T29 N28
2 22U_0805_6.3V6M
2 2 2 2 PCIE_VSS_33 PCIE_VSS_22
T28 PCIE_VSS_32 PCIE_VSS_23 P22
0.1U_0402_16V4Z 0.1U_0402_16V4Z T27 P23
0.1U_0402_16V4Z 0.1U_0402_16V4Z PCIE_VSS_31 PCIE_VSS_24
T24 PCIE_VSS_30 PCIE_VSS_25 P24
T21 PCIE_VSS_29 PCIE_VSS_26 P25
P27 PCIE_VSS_28 PCIE_VSS_27 P26

+3VALW 218S4RBSA11G SB460_BGA549

1 1 1
C555 C558

C563
2 22U_0805_6.3V6M
2 2
0.1U_0402_16V4Z
A 0.1U_0402_16V4Z A

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 11, 2006 Sheet 21 of 51
5 4 3 2 1
 5 4 3 2 1

NOTE: R751 PU RESISTOR FOR

REQUIRED STRAPS RTC_IRQ# IS REQUIRED FOR SB600
SB600 HAS 15K INTERNAL PD FOR AC_SDATA_OUT, TO KEEP THE INPUT FROM FLOATING. SB460 ONLY
15K PU FOR RTC_CLK, EXTERNAL PU/PD IS
NOT REQUIRED; FOR SB460, EXTERNAL PU/PD ARE +3VALW +3VS +3VS +3VS +3VS
REQUIRED

1
D +3VS +3VALW +3VS +3VS +3VS +3VS R473 R498 R495 R488 R257 D
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
@

2
R499
(18) RTC_IRQ#
2.2K_0402_5%
(18) SB_SPDIF

1
@ (18) CLK_PCI_MINI_R
R202 R249 R248 R496 R497
(18) CLK_PCI_PCM_R

2
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
(19) SB_AC_SDOUT (18) CLK_PCI_SIO_R
@ @
(18,28,36) LPC_FRAME#

1
(18) RTC_CLK
R469 R493 R491 R503 R481 R262
(18) CLK_PCI_1394_R
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
(18) PCI_CLK6
@ @ @ @
(18) CLK_PCI_LAN_R

2
(18) CLK_PCI_LPC_R
1

1
R494 R245 R504 R492
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
@
2

2
ACPWRON SPDIF_OUT PCI_MINI_R PCI_PCM_R PCI_SIO_R LFRAME#

PULL MANUAL SIO 24MHz XTAL MODE USB PHY PCIE_CM_SET ENABLE
SB600 SB460 HIGH PWR ON POWERDOWN LOW THERMTRIP#
N OT
C SUPPORTED DISABLE C

AC_SDOUT RTC_CLK PCI_1394_R PCI_CLK6 PCI_LAN_R PCI_LPC_R PCI_LAN_R PCI_LPC_R DEFA ULT DEFA ULT DEFA ULT DEFA ULT

PULL USE INTERNAL USE INT. CPU IF=K8 ROM TYPE: ROM TYPE: PULL AUTO SIO 48MHz 48MHZ OSC USB PHY PCIE_CM_SET DISABLE
HIGH DEBUG RTC PLL48 LOW PWR MODE POWERDOWN HIGH THERMTRIP#
H, H = PCI ROM H, H = PCI ROM
STRAPS DEFA ULT ON ENABLE
DEFA ULT H, L = SPI ROM H, L = LPC I ROM DEFA ULT DEFA ULT DEFA ULT

L, H = LPC ROM DEFA ULT L, H = LPC II ROM

PULL IGNORE EXTERNAL USE EXT. CPU IF=P4
LOW DEBUG RTC 48MHZ L, L = FWH ROM L, L = FWH ROM
STRAPS NOTE: FOR SB460, PCICLK[8:7] ARE
DEFA ULT DEFA ULT CONNECTED TO SUBSTRATE
BALLS PCICLK[1:0] OVERLAP COMMON PADS WHERE
POSSIBLE FOR DUAL-OP RESISTORS.
DEBUG STRAPS
SB600 HAS 15K INTERNAL PU FOR PCI_AD[28:23]
+3VS +3VS +3VS +3VS +3VS +3VS +3VS
1

R118 R215 R211 R220 R188 R239 R196

10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5%
B @ @ B
+3VS
2

(20,23) IDE_DACK#
(18,26,31,32,35) PCI_AD28

2
(18,26,31,32,35) PCI_AD27 1
C302 R198
(18,26,31,32,35) PCI_AD26
0.1U_0402_16V4Z 1K_0402_5%
(18,26,31,32,35) PCI_AD25
@ @ U20
(18,26,31,32,35) PCI_AD24 2
(18,26,31,32,35) PCI_AD23 8 1

1
VCC A0
7 WP A1 2
1

2.2K IF USED FOR SB600. R199 1 2 0_0402_5% @ 6 3

(19) SB460_GPIO14 SCL A2
R119 R216 R212 R221 R189 R241 R195 R200 1 2 0_0402_5% @ 5 4
(19) SB460_GPIO13 SDA VSS
10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K_0402_5% 10K IF USED FOR SB460.
@ @ @ @ @ @ @ AT24C04N-10SI-2.7_SO8
SB600 = PCI REQ4#/GNT4# @
2

SB460 = GPIO13 (NC3), GPIO14 (NC5)

IDE_DACK# PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23
SB PCIE EEPROM STRAPS
USE USE USE PCI USE ACPI USE IDE USE DEFAULT BOOTFAILTIMER
PULL LONG LONG PLL BCLK PLL PCIE STRAPS DISABLED SB600 ONLY
HIGH RESET RESET
DEFA ULT DEFA ULT DEFA ULT DEFA ULT DEFA ULT DEFA ULT DEFA ULT

NOTE: FOR
PULL USE USE BYPASS BYPASS BYPASS IDE USE EEPROM BOOTFAILTIMER SB460,
A A
LOW SHORT SHORT PCI PLL ACPI PLL PCIE STRAPS ENABLED PCI_AD23 IS
RESET RESET BCLK RESERVED

SB460 ONLY SB600 ONLY Security Classification Compal Secret Data Compal Electronics. inc.
Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 11, 2006 Sheet 22 of 51
5 4 3 2 1
 5 4 3 2 1

HDD CONN
IDE_D[0..15]
(20) IDE_D[0..15]
IDE_A[0..2]
(20) IDE_A[0..2]
+3VS

D JP27 C324 D
IDE_RESET# 1 2 1 2 0.1U_0402_16V4Z
IDE_D7 1 2 IDE_D8
3 3 4 4
IDE_D6 5 6 IDE_D9
5 6

5
IDE_D5 7 8 IDE_D10 U23
IDE_D4 7 8 IDE_D11 IDE_HRESET#
9 10 1

P
9 10 (19) IDE_HRESET# IN1
IDE_D3 11 12 IDE_D12 4 IDE_RESET#
IDE_D2 11 12 IDE_D13 NB_RST# O
13 13 14 14 (14,18,28,31,36) NB_RST# 2 IN2

G
IDE_D1 15 16 IDE_D14
+5VS IDE_D0 15 16 IDE_D15 SN74AHC1G08DCKR_SC70
17 18

3
17 18
19 19 20 20
IDE_DREQ 21 22
(20) IDE_DREQ 21 22
IDE_IOW# 23 24
(20) IDE_IOW# 23 24
1

IDE_IOR# 25 26
(20) IDE_IOR# 25 26
R293 ID E_IORDY 27 28 IDE_CSEL R282 1 2 475_0402_1%
(20) IDE_IORDY 27 28
100K_0402_5% IDE_DACK# 29 30 PATA@
(20,22) IDE_DACK# 29 30
IDE_IRQ 31 32
(20) IDE_IRQ 31 32
PATA@ IDE_A1 33 34 IDE_PDIAG# R259 33_0402_5%
2

IDE_A0 33 34 IDE_A2
35 35 36 36 1 2
IDE_CS1# 37 38 IDE_CS3#
(20) IDE_CS1# 37 38 IDE_CS3# (20)
IDE_LED# IDE_LED# 39 40
(28) IDE_LED# 39 40
+5VS 41 41 42 42 +5VS @
80mils 43 43 44 44 80mils
1
OCTEK_HDD-22SG1G_NR 2006/05/03 modify
C371 +
150U_D2_6.3VM PATA@
2
C +5VS C
PATA@

0.1U_0402_16V4Z

1 1 1 1
C150 C149
C153 C148
10U_0805_10V4Z
2 2 2 2
+5VS +3VS 1U_0402_6.3V4Z
1000P_0402_50V7K

0.1U_0402_16V4Z 0.1U_0402_16V4Z

1 1 1 1 1 1 1 1
C351 C349 C347 C346
C360
C363 C366 C368
10U_0805_10V4Z 10U_0805_10V4Z
2 2 2 2 2 2 2 2

0.1U_0402_16V4Z 1000P_0402_50V7K 0.1U_0402_16V4Z 1000P_0402_50V7K

CDROM CONN
JP24
CDROM_L 1 2 CDROM_R
(39) INT_CD_L 1 2 INT_CD_R (39)
CD_AGND 3 4
(39) CD_AGND 3 4
IDE_RESET# 5 6 IDE_D8
IDE_D7 5 6 IDE_D9
7 7 8 8
B IDE_D6 IDE_D10 B
9 9 10 10
IDE_D5 11 12 IDE_D11
SATA HDD CONN IDE_D4
IDE_D3
13
15
11
13
12
14 14
16
IDE_D12
IDE_D13
JP29 IDE_D2 15 16 IDE_D14
17 17 18 18
IDE_D1 19 20 IDE_D15
IDE_D0 19 20 IDE_DREQ
1 GND 21 21 22 22
SATA_STX_C_DRX_P0 2 23 24 IDE_IOR#
(20) SATA_STX_C_DRX_P0 SATA_STX_C_DRX_N0 HTX+ IDE_IOW# 23 24
(20) SATA_STX_C_DRX_N0 3 HTX- 25 25 26 26
4 ID E_IORDY 27 28 IDE_DACK#
SATA_DTX_C_SRX_N0 GND +5VS IDE_IRQ 27 28
(20) SATA_DTX_C_SRX_N0 5 HRX- 29 29 30 30
SATA_DTX_C_SRX_P0 6 IDE_A1 31 32 IDE_PDIAG#
(20) SATA_DTX_C_SRX_P0 HRX+ IDE_A0 31 32 IDE_A2
7 GND 1 33 33 34 34
C370 IDE_CS1# 35 36 IDE_CS3#
+ IDE_LED# 35 36
37 37 38 38 +5VS
L16 39 40 80mils
+5VS 39 40
+3VS 1 2 8 VCC3.3 41 41 42 42
@ 150U_D2_6.3VM 2
9 VCC3.3 43 43 44 44
FBM-L11-201209-121LMT_0805 10 45 46
VCC3.3 SD_CSEL 45 46
11 GND 2 1 47 47 48 48
12 R48 470_0402_5% 49 50 1 2
SATA@ GND 49 50 +5VS
L17 13 SATA@ R45
GND OCTEK_CDR-50JL1G 100K_0402_5%
+5VS 1 2 14 VCC5
15 VCC5
Close to SATA HDD @
FBM-L11-201209-121LMT_0805 16 VCC5
17 GND If CDROM is Slave
18 RESERVED
SATA@ 19 GND then SD_CSEL= Floating
A 20 VCC12 A
21 VCC12 else SD_CSEL= Low
22 VCC12

OCTEK_SAT-22SG1G_NR
SATA@
Compal Electronics, Inc.
Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
Size Document Number Rev
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS 401411
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 11, 2006 Sheet 23 of 51
5 4 3 2 1
 A B C D E

CRT Connector D18 D20

@ DAN217_SC59 @ DAN217_SC59
D19
DAN217_SC59
+5VS +R_CRT_VCC
W=40mils
+CRT_VCC

D17 F1 W=40mils

1
2 1 1 2

CH411DPT_SOT23 1.1A_6VDC_FUSE
1
@ C407

3
0.1U_0402_16V4Z
2
+3VS

1 1

JP15
CRT_R 1 2 CRT_R_L 6
(14) CRT_R
L32 11
FCM2012C-800_0805 1
CRT_G 1 2 CRT_G_L 7
(14) CRT_G
L34 12
FCM2012C-800_0805 2
CRT_B 1 2 CRT_B_L 8
(14) CRT_B
L33 13
FCM2012C-800_0805 3

1
1 1 1 1 1 1 DDC_MD2 9
R339 R338 R340 C408 C412 C414 14
C413 C409 4
6P_0402_50V8C 6P_0402_50V8C 10
150_0402_1% 150_0402_1% 150_0402_1% 2 8P_0402_50V8K 2 8P_0402_50V8K 2 2 2 2
15

2
8P_0402_50V8K C410 C406 5
10P for GMCH 6P_0402_50V8C 100P_0402_50V8J
SUYIN_070549FR015S208CR

16

17
+CRT_VCC HSYNC_L
1 2 (CL55)
L38 FCM1608C-121T_0603
1 2 2 1 D_DDC_DATA
C434 0.1U_0402_16V4Z R360 10K_0402_5% 1 2 VSYNC_L
L37 FCM1608C-121T_0603 1

5
1
1 1

OE#
P
VGA_CRT_HSYNC 1 2 CRT_HSYNC 2 4 D_CRT_HSYNC C424 C423
(14) VGA_CRT_HSYNC A Y
R354 0_0402_5% 10P_0402_25V8K 10P_0402_25V8K C411 2

G
U36 68P_0402_50V8K D_DDC_CLK
SN74AHCT1G125GW_SOT353-5 2 2

3
2 +CRT_VCC 1 2
C422
1 2 68P_0402_50V8K
C433 0.1U_0402_16V4Z 2

5
1
OE#
P
VGA_CRT_VSYNC 1 2 CRT_VSYNC 2 4 D_CRT_VSYNC
(14) VGA_CRT_VSYNC A Y
R356 0_0402_5%

G
U35
SN74AHCT1G125GW_SOT353-5

3
+CRT_VCC
R359 1 2 0_0402_5% +3VS
4.7K_0402_5%

1
R355
4.7K_0402_5% R344

2
G
TV-OUT Conn. D_DDC_DATA 1 3 VGA_DDC_DATA
VGA_DDC_DATA (14)

S
D23 D22 D24

2
@ @ @ Q26

G
DAN217_SC59 DAN217_SC59 DAN217_SC59 BSS138_SOT23 Q24
3 D_DDC_CLK 1 3 BSS138_SOT23 VGA_DDC_CLK 3
VGA_DDC_CLK (14)
1

S
Place closed to chipset
2

3
+3VS

C427 1 2 22P_0402_50V8J TV@ JP16

1 2 VGA_TV_LUMA_R 1 2 3
(14) VGA_TV_LUMA
R351 L41 FCM1608C-121T_0603 TV@ TV_CRMA_L 6
0_0402_5% TV@ C421 1 2 22P_0402_50V8J TV@ TV_COMPS_L 7
1 2 VGA_TV_CRMA_R 1 2 5
(14) VGA_TV_CRMA
R350 L39 FCM1608C-121T_0603 TV@ 2
0_0402_5% TV@ C429 1 2 22P_0402_50V8J TV@ TV_LUMA_L 4
1 2 VGA_TV_COMPS_R 1 2 1
(14) VGA_TV_COMPS
R349 L40 FCM1608C-121T_0603 TV@ 8
0_0402_5% TV@ C425 9
220P_0402_50V7K
1

R348 R346 R352 1 1 TV@ 1 1 1 1

C428 C419 C418 C417 SUYIN_030107FR007SX08FU
220P_0402_50V7K 220P_0402_50V7K 220P_0402_50V7K 220P_0402_50V7K TV@
150_0402_1% TV@ C430 TV@ TV@ TV@ TV@
150_0402_1% TV@ 2 220P_0402_50V7K
2 2 2 2 2 (ECQ60)
2

TV@
150_0402_1% TV@

2005/12/30 Change to 220P

4 4

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 11, 2006 Sheet 24 of 51
A B C D E
 5 4 3 2 1

LCD POWER CIRCUIT

D D

+LCDVDD +3VALW
1

2
R343
R341 +3VS
300_0603_1% 1K_0402_5%
W=60mils
1 2

R342

3
D S
G
Q22 2 2 1 2 Q23
2N7002_SOT23 G SI2301BDS_SOT23
S 1
3

100K_0402_5%
2
+LCDVDD
D W=60mils

1
R347 C431 +LCDVDD
2 0.047U_0402_16V7K LCD/PANEL CONN.
1

D 100K_0402_5% 1 1
1

ENVDD 2 C415 C420 04/17 modify

(14) ENVDD
G
1

S 4.7U_0805_10V4Z 0.1U_0402_16V4Z L36

3

R345 Q25 2 2 FBMA-L11-201209-121LMA40T _0805 JP1

10K_0402_5% 1 2 DAC_BRIG
B+ 40 20 DAC_BRIG (28)
BSS138_SOT23 INVT_PWM
39 19 INVT_PWM (28)
C FBMA-L11-201209-121LMA40T _0805 DISPOFF# C
2

L42 38 18
+3VS 1 2 37 17
(14) EDID_LCD_CLK EDID_LCD_CLK L35 1 2 +LCDVDD
EDID_LCD_DAT 36 16 FBMA-L11-201209-121LMA40T _0805
(14) EDID_LCD_DAT 35 15
LVDS_TXUN0 34 14 LVDS_TXLN0
(14) LVDS_TXUN0 33 13 LVDS_TXLN0 (14)
LVDS_TXUP0 LVDS_TXLP0
(14) LVDS_TXUP0 32 12 LVDS_TXLP0 (14)
+3VS +3VS LVDS_TXUP1 31 11 LVDS_TXLN1
(14) LVDS_TXUP1 30 10 LVDS_TXLN1 (14)
LVDS_TXUN1 LVDS_TXLP1
(14) LVDS_TXUN1 29 9 LVDS_TXLP1 (14)
28 8

1
1 LVDS_TXUP2 LVDS_TXLP2
(14) LVDS_TXUP2 27 7 LVDS_TXLP2 (14)
R1 LVDS_TXUN2 LVDS_TXLN2
(14) LVDS_TXUN2 26 6 LVDS_TXLN2 (14)
C426
@ 0.1U_0402_16V4Z 4.7K_0402_5% LVDS_TXUCKN 25 5 LVDS_TXLCKN
2 (14) LVDS_TXUCKN 24 4 LVDS_TXLCKN (14)
D2 LVDS_TXUCKP LVDS_TXLCKP
(14) LVDS_TXUCKP LVDS_TXLCKP (14)

2
BKOFF# 23 3
(28) BKOFF# 1 2 CH751H-40PT _SOD323 DISPOFF#
22 2
21 1
ACES_88107-4000G

INVT_PWM
1

1 (SAME AS ACES_87216-4016)
C416
D21 1U_0402_6.3V4Z @
@ 1N4148_SOT23
2
2

B B

A A

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 11, 2006 Sheet 25 of 51
5 4 3 2 1
 5 4 3 2 1

1
R24
PCI_AD[0..31] 0_0402_5%
(18,22,31,32,35) PCI_AD[0..31]
R132 1 2 3.6K_0402_5% +3VALW @ PIN 8100CL(10/100 LAN) 8110SB/CL(10/100/1000 LAN)
U12 U11

2
PCI_AD0 104 108 LAN_EEDO 4 5 1 RSET 5.6K 2.49K
PCI_AD1 AD0 EEDO LAN_EEDI DO GND
103 AD1 AUX/EEDI 109 3 DI NC 6
PCI_AD2 102 111 LAN_EECLK 2 7 C211 0.1U_0402_16V4Z
PCI_AD3 AD2 EESK LAN_EECS SK NC
D 98 AD3 EECS 106 1 CS VCC 8 +3VALW D
PCI_AD4 2
97 AD4 BOM structure 8100CL(10/100 LAN) 8110SB/CL(10/100/1000 LAN)
PCI_AD5 96 117 ACTIVITY# AT93C46-10SI-2.7_SO8
PCI_AD6 AD5 LED0 LINK_100# LAN_ACTIVITY# (27)
95 AD6 LED1 115 1 2 LAN_LINK# (27) 100@ Stuff No_Stuff No_Stuff
PCI_AD7 93 114 R131 0_0402_5%
PCI_AD8 AD7 LED2 LINK_1000#
90 AD8 NC/LED3 113 2 1 8110SB@ No_Stuff Stuff No_Stuff
PCI_AD9 89 R129 @ 0_0402_5%
PCI_AD10 AD9 LAN_MIDI0+
87 AD10 TXD+/MDI0+ 1 LAN_MIDI0+ (27) 8110SC@ No_Stuff No_Stuff Stuff
PCI_AD11 86 2 LAN_MIDI0-
AD11 TXD-/MDI0- LAN_MIDI0- (27)
PCI_AD12 85 5 LAN_MIDI1+ @ No_Stuff No_Stuff No_Stuff
AD12 RXIN+/MDI1+ LAN_MIDI1+ (27)
PCI_AD13 83 6 LAN_MIDI1-
AD13 RXIN-/MDI1- LAN_MIDI1- (27)
PCI_AD14 82
PCI_AD15 AD14 LAN_MIDI2+
79 AD15 NC/MDI2+ 14 LAN_MIDI2+ (27)
PCI_AD16 59 15 LAN_MIDI2-
AD16 NC/MDI2- LAN_MIDI2- (27)
PCI_AD17 58 18 LAN_MIDI3+
AD17 NC/MDI3+ LAN_MIDI3+ (27)
PCI_AD18 57 19 LAN_MIDI3-
AD18 NC/MDI3- LAN_MIDI3- (27)
PCI_AD19 55
PCI_AD20 AD19 LAN_X1
53 AD20 X1 121
PCI_AD21 50 122 LAN_X2
PCI_AD22 AD21 X2
49 AD22

PCI I/F
PCI_AD23 47 105 R154 1 2 1K_0402_5%
PCI_AD24 AD23 LWAKE R153 +3VS
43 AD24 ISOLATE# 23 1 2 15K_0402_5%
PCI_AD25 42 127 1 2 100@ 5.6K_0603_1% RSET 5.6K for 8100CL
PCI_AD26 AD25 RTSET R149
40 72
PCI_AD27 39
AD26 NC/SMBCLK
74 1 2 GIGA@ 2.49K_0603_1%
2.49K for 8110S(B/C)
PCI_AD28 AD27 NC/SMBDATA R150
37 AD28
PCI_AD29 36 88
PCI_AD30 AD29 NC/M66EN
PCI_AD31
34 AD30 +LAN_AVDDH
20mils +2.5V_LAN +1.8V_LAN
33 AD31 NC/AVDDH 10 1 R133 2 +3VALW
C 120 1 GIGA@ 0_0805_5% C
AVDDH +1.2V_LAN +1.5V_LAN
(18,31,32,35) PCI_CBE#0 92 C/BE#0 1
77 11 2 GIGA@
1 0_0402_5% C270 C251 +3VALW
(18,31,32,35) PCI_CBE#1 C/BE#1 NC/HSDAC+

1
60 123 R151 GIGA@ 0.1U_0402_16V4Z
(18,31,32,35) PCI_CBE#2 C/BE#2 NC/HG 2
44 124 GIGA@ 0.1U_0402_16V4Z C273 R166 R165
(18,31,32,35) PCI_CBE#3 C/BE#3 NC/LG2 2 +3VALW
2 1 0_0805_5% 0_0805_5%

1
PCI_AD17 1 2 LAN_IDSEL 46 100@ 8110SC@
R135 100_0402_5% IDSEL 1U_0402_6.3V4Z R148 R163

2
3
(18,31,32,35) PCI_PAR 76 PAR
LAN I/F E GIGA@ 0_0805_5% 0_0805_5%
61 9 CTRL25 2 Q9 2SB1197K_SOT23 8110SB@ 8110SC@
(18,31,32,35) PCI_FRAME# FRAME# NC/VSS

3
63 13 B 2SB1197K_SOT23 E
(18,31,32,35) PCI_IRDY#

2
IRDY# NC/VSS C CTRL12 Q8
(18,31,32,35) PCI_TRDY# 67 2

1
TRDY# B
(18,31,32,35) PCI_DEVSEL# 68 DEVSEL# Y1
40mils C
(18,31,32,35) PCI_STOP# 69 22

1
STOP# NC/GND LAN_X1 1 LAN_X2
NC/GND 48 2 1
C281
40mils
(18,31,32,35) PCI_PERR# 70 PERR# NC/GND 62
75 73 1 25MHZ_20P 1
(18,31,32) PCI_SERR# SERR# NC/GND
112 10U_0805_10V6M 1 1
NC/GND C255 C258 2
(18) PCI_REQ#3 30 REQ# NC/GND 118
29 27P_0402_50V8J 27P_0402_50V8J C271 C275
(18) PCI_GNT#3 GNT# 2 2
1 2 GIGA@ 4.7U_0805_10V4Z
(18) PCI_PIRQF# R5021 0_0402_5% 2 2
GIGA@ 0.1U_0402_16V4Z
(18,31,32) PCI_PIRQH# 2 25 INTA#
R501 0_0402_5% @ 8 CTRL25
CTRL25
(28) LAN_PME# 31 PME# CTRL12
2006/02/20 Change to 10uF
CTRL12 125
(18,31,32,34,35) PCI_RST# 27 RST#
VDD33 26 +3VALW
CLK_PCI_LAN 28 41 1 1 1 1 1
(18) CLK_PCI_LAN CLK VDD33
PM_CLKRUN# 65 56 8110SC@ 0_0805_5%
B (18,31,36) PM_CLKRUN# CLKRUN# VDD33 C213 C215 C209 C207 C206 R158 1 B
VDD33 71 2 +1.8V_LAN
84 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
VDD33 2 2 2 2 2
VDD33 94
VDD33 107
4 +LAN_AVDDL R157 1 2 +3VALW
GND/VSS 100@ 0_0805_5%
17 GND/VSS 1 1 1 1 40mils
128 GND/VSS
AVDDL 3 1 2 +1.8V_LAN C269 C266 C264 C265 8110SB@ 0_0805_5%
7 R162 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z R159 1 2
AVDDL 2 2 2 2 +2.5V_LAN
21 20 8110SC@ 0_0402_5%
CLK_PCI_LAN GND/VSSPST AVDDL +LAN_AVDDL25
38 GND/VSSPST AVDDL 16 1 2 +2.5V_LAN
51 20mils R161 R115 1 2 +1.5V_LAN
GND/VSSPST
1

66 126 8110SB@ 0_0402_5% 8110SC@ 0_0805_5%

GND/VSSPST VDD12 +LAN_DVDD R110 1
81 GND/VSSPST VDD12 32 2 +1.2V_LAN
R155 91 54 1 1 1 1 40mils 8110SB@ 0_0805_5%
@ 10_0402_5% GND/VSSPST VDD12
101 GND/VSSPST VDD12 78
119 99 C257 C205 C208 C218 100@ 0_0805_5%
2

GND/VSSPST VDD12 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z R107 1

1 2 +2.5V_LAN
2 2 2 2
Power

C274 35 24 R130 1 2 +1.2V_LAN

@ 18P_0402_50V8J GND NC/VDD12 8110SB@ 0_0805_5%
52 GND NC/VDD12 45 2 2 2 2 2
2 C256 C219 C267 C214 C212
80 GND NC/VDD12 64
100 110 R117 1 2 +1.5V_LAN
GND NC/VDD12 GIGA@ 0.1U_0402_16V4Z GIGA@ 8110SC@ 0_0805_5%
NC/VDD12 116
1 1 1 1 1
0.1U_0402_16V4Z
GIGA@ 0.1U_0402_16V4Z GIGA@ 0.1U_0402_16V4Z
12 V_12P R160 1 2 +2.5V_LAN GIGA@ 0.1U_0402_16V4Z
NC
RTL8110SBL_LQFP128
20mils1 C278 R156 100@ 0_0402_5% +LAN_AVDDH
A 1 2 A
100@ GIGA@ 0_0402_5%
0.1U_0402_16V4Z
2
RTL8110SBL change to Ver.D

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/07/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期一, 五月 08, 2006 Sheet 26 of 51
5 4 3 2 1
 5 4 3 2 1

T1

LAN_MIDI1- 1 16 RJ45_MDI1-
LAN RTL8110SB/C & RTL8100CL LAN_MIDI1+ 2
3
RD+
RD-
CT
RX+
RX-
CT
15
14
RJ45_MDI1+
MCT3
4 NC NC 13
5 NC NC 12
6 11 MCT4
LAN_MIDI0- CT CT RJ45_MDI0-
D 7 TD+ TX+ 10 D
LAN_MIDI0+ 8 9 RJ45_MDI0+
TD- TX-
C321
1 0.1U_0402_16V4Z
1 LF-H80P_16P
100@

C316
2 2 0.1U_0402_16V4Z

unpop when use RTL8100CL(10/100) 100@ @

1 1
C486 C482

GIGA@ 0.1U_0402_16V4Z GIGA@ 0.1U_0402_16V4Z JP22

2 2 +2.5V_LAN 24HST1041A-3(SP050002110) for RTL8110SB/CL(GbE) (26) LAN_ACTIVITY#
LAN_ACTIVITY# 12 Amber LED-
TST1284-LF (SP050001X10) for RTL8100CL(10/100) +3VALW
R52 2 1 300_0603_5% 11 Amber LED+
24ST0023-3: Half port(TD[3:4], MX[3:4]) SHLD4 16

1
RJ45_MDI3- 8 PR4-
1

R384 R95 15
GIGA@ 49.9_0402_1% R378 GIGA@ 0_0603_5% RJ45_MDI3+ SHLD3
7 PR4+
C R385 R381 GIGA@ 49.9_0402_1% C
GIGA@ 49.9_0402_1% GIGA@ 49.9_0402_1% RJ45_MDI1- 6

2
PR2-
2

RJ45_MDI2- 5
LAN_MIDI3- RJ45_MDI3- PR3-
(26) LAN_MIDI3-
(26) LAN_MIDI3+ LAN_MIDI3+ RJ45_MDI3+ RJ45_MDI2+ 4 PR3+
RJ45_MDI1+ 3
LAN_MIDI2- RJ45_MDI2- PR2+
(26) LAN_MIDI2-
(26) LAN_MIDI2+ LAN_MIDI2+ RJ45_MDI2+ RJ45_MDI0- 2 PR1-
SHLD2 14
MCT3 RJ45_MDI0+ 1
LAN_MIDI1- RJ45_MDI1- PR1+
(26) LAN_MIDI1- SHLD1 13
(26) LAN_MIDI1+ LAN_MIDI1+ RJ45_MDI1+ LAN_LINK# 10
(26) LAN_LINK# Green LED-
1 2 MCT4 R101 2 1 300_0603_5% 9
+3VALW Green LED+
(26) LAN_MIDI0- LAN_MIDI0- R90 GIGA@ 0_0402_5% RJ45_MDI0-
(26) LAN_MIDI0+ LAN_MIDI0+ RJ45_MDI0+ SUYIN_100073FR012S100ZL
HBL-50
1

R387 R390 R391 R395

1
49.9_0402_1% 49.9_0402_1% GIGA@ 0.01U_0402_16V7K
49.9_0402_1% 49.9_0402_1%
R87 RJ45_GND 1 2 LANGND
2

1 1 1 1 75_0402_1% R86 1 1
C170 C159 C146 C180 75_0402_1% C190

2
1 1 1000P_1206_2KV7K C199 C200
C494 C500 0.01U_0402_16V7K 4.7U_0805_10V4Z
2 2 2 2 GIGA@ 2 2
B 0.01U_0402_16V7K 0.01U_0402_16V7K 0.01U_0402_16V7K B
2 2 0.01U_0402_16V7K 0.1U_0402_16V4Z
GIGA@

GIGA@

RJ45_MDI3+ R69 1 2 100@ 0_0402_5%

RJ45_MDI3- R66 1 2 100@ 0_0402_5%

RJ45_MDI2+ R83 1 2 100@ 0_0402_5%

RJ45_MDI2- R77 1 2 100@ 0_0402_5%
1

reseved for RTL8100CL(10/100)

R72 R61
75_0402_1% 75_0402_1%
2

RJ45_GND

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/07/29 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期一, 五月 08, 2006 Sheet 27 of 51
5 4 3 2 1
 5 4 3 2 1

+3VALW
KBA[0..19]
KBA[0..19] (30) L14 +3VALW For EC Tools
ADB[0..7] 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2+EC_VCCA
ADB[0..7] (30) +3VALW
1 1 C585 1 1 2 2 FBM-L11-160808-800LMT_0603 20mil
C323 1 JP8
C310 C586 C584 C590 KSI[0..7]
1000P_0402_50V7K 1000P_0402_50V7K C305
20mil KSI[0..7] (29) 1 1
E51_RXD
1 1 2 2
L15 2 2 2 2 1 1 C341 C337 KSO[0..15] E51_TXD
KSO[0..15] (29) 3 3

ECAGND
ECAGND 0.1U_0402_16V4Z 0.1U_0402_16V4Z 2 0.1U_0402_16V4Z
1 2 4 4
FBM-L11-160808-800LMT_0603 20mil 0.1U_0402_16V4Z 1U_0603_10V4Z
2 2 @ ACES_85205-0400

123
136
157
166

161

159
D D

16
34
45

95

96
U27
LPC_AD0 15

VCCA
VCC
VCC
VCC
VCC
VCC
VCC
VCC

AGND

BATGND
VCCBAT
(18,36) LPC_AD0 LAD0
C591 LPC_AD1 14 49 KSO0
(18,36) LPC_AD1 LAD1 GPOK0/KSO0
@ 22P_0402_50V8J LPC_AD2 13 50 KSO1 Analog Board ID definition, SKU ID definition,
(18,36) LPC_AD2 LAD2 GPOK1/KSO1
2 1 R518 2 1 @ 33_0402_5% LPC_AD3 10 51 KSO2
(18,36) LPC_AD3 LAD3 GPOK2/KSO2 Please see page 3. Please see page 3.
KSO3
(18,22,36) LPC_FRAME# 9 LFRAME# LPC Interface GPOK3/KSO3 52
KSO4
(14,18,23,31,36) NB_RST# 165 LRST#/GPIO2C GPOK4/KSO4 53

ENE-KB910-B4
18 56 KSO5
(18) CLK_PCI_LPC LCLK GPOK5/KSO5
7 57 KSO6 +3VALW +3VALW
(18,32,36) SERIRQ SERIRQ GPOK6/KSO6 KSO7
25 CLKRUN#/GPIO0C * GPOK7/KSO7 58
24 59 KSO8
LPCPD#/GPIO0B * GPOK8/KSO8

2
+3VALW 60 KSO9
FR D# GPOK9/KSO9 KSO10 R210 R246
(30) FRD# 150 RD# GPOK10/KSO10 61
FWR# KSO11 @ 100K_0402_5% @ 100K_0402_5%

Internal Keyboard
(30) FWR# 151 WR# GPOK11/KSO11 64 Ra Rc
2

FSEL# 173 65 KSO12

(30) FSEL# MEMCS# GPOK12/KSO12
R514 SELIO# 152 66 KSO13

1
10K_0402_5% ADB0 IOCS# GPOK13/KSO13 KSO14 AD_BID0 SKU_ID
138 D0 GPOK14/KSO14 67
ADB1 139 68 KSO15
D1 GPOK15/KSO15

2
R516 0_0402_5% ADB2 140 153 KSO16 1 1
KSO16 (29)
1

ADB3 D2 GPOK16/KSO16 KSO17 R201 C304 R227 C320

(31) MINI_PME# 2 1 141 D3 GPOK17/KSO17 154 KSO17 (29)
R515 0_0402_5% ADB4 144 Rb Rd
EC_PME# +3VALW ADB5 D4 KSI0 0_0402_5% 0_0402_5% 0.1U_0402_16V4Z
(26) LAN_PME# 2 1 145 D5 GPIK0/KSI0 71
2 2

X-BUS Interface
ADB6 146 72 KSI1 0.1U_0402_16V4Z

1
ADB7 D6 GPIK1/KSI1 KSI2
147 D7 GPIK2/KSI2 73
+3VALW KBA0 124 74 KSI3
A0 GPIK3/KSI3
1 2 BTSW_EN# KBA1 125 A1/XIOP_TP GPIK4/KSI4 77 KSI4
R511 100K_0402_5% KBA2 126 78 KSI5 2006/04/26 modify, for reserve
A2 GPIK5/KSI5
2

1 2 WLSW_EN# KBA3 127 A3 GPIK6/KSI6 79 KSI6 R611

R258 R522 100K_0402_5% KBA4 128 80 KSI7 2 1 VLDT_EN_P
10K_0402_5% A4/DMRP_TP GPIK7/KSI7 VLDT_EN_P (47)
KBA5 131 0_0402_5%
KBA6 A5/EMWB_TP INVT_PWM
132 A6 GPOW0/PWM0 32 INVT_PWM (25)
C KBA7 BEEP# R573 C
133 33 BEEP# (39)
1

D9 KBA8 A7 GPOW1/PWM1 VLDT_EN

143 A8 FAN2PWM/GPOW2/PWM2 36 2 1 VLDT_EN (37)
KBA9 142 37 ACOFF 0_0402_5%
EC_RCIRRX KBA10 A9 GPOW3/PWM3 ACOFF (42,44)
(38) RCIRRX 1 2 135 A10 Pulse Width GPOW4/PWM4 38 USB_EN# (34,38)
KBA11 134 39 EC_ON
A11 GPOW5/PWM5 EC_ON (37)
KBA12 130 40 EC_LID_OUT#
CH751H-40PT _SOD323 KBA13 129
A12 GPOW6/PWM6
43 EC_MUTE
EC_LID_OUT# (19) Board ID SKU ID
A13 FAN1PWM/GPOW7/PWM7 EC_MUTE (40)
KBA14
KBA15
121
120
A14
2 ON/OFF
0 UMA W / O SATA
A15 GPWU0 ON/OFF (37)
KBA16
KBA17
113
112
A16 GPWU1 26
29
ACIN (19,45) 1 DISCRETE WITH SATA
KBA18 A17 GPWU2 PM_SLP_S3#
KBA19
104
103
A18
Wake Up Pin
GPWU3 30
44 PM_SLP_S5#
PM_SLP_S3# (19) 2
A19 GPWU4 PM_SLP_S5# (19)
+5VS 108 76 EC_RCIRRX
RP29 2 1 105
A20/GPIO23 GPWU5
172 EC_PME#
3
+3VALW E51CS#/GPIO20/ISPEN TIN1/GPWU6
1 8 KB_CLK R209 100K_0402_5% 176 S3_STATE
KB_DATA KB_CLK TIN2/FANFB2/GPWU7 S3_STATE (19) ECAGND
2 7 110 PSCLK1 2 1
3 6 PS_CLK KB_DATA 111 81 BATT_TEMP C328 0.01U_0402_16V7K
PSDAT1 GPIAD0/AD0 BATT_TEMP (45)
4 5 PS_DATA PS_CLK 114 82 SKU_ID
PS_DATA PSCLK2 GPIAD1/AD1 BATT_OVP
4.7K_1206_8P4R_5% TP_CLK
115 PSDAT2PS2 Interface GPIAD2/AD2 83 BATT_OVP (44)
(29) TP_CLK 116 PSCLK3 GPIAD3/AD3 84
+3VALW TP_DATA 117 Analog To Digital 87
(29) TP_DATA PSDAT3 GPIAD4/AD4 +3VS
RP35 88 TV_THERM# R222
GPIAD5/AD5 TV_THERM# (31)
1 8 EC_SMB_CK1 163 89 AD_BID0 100K_0402_5%
(30,45) EC_SMB_CK1 SCL1 GPIAD6/AD6
2 7 FR D# EC_SMB_DA1 164 90 TV_THERM# 2 1
(30,45) EC_SMB_DA1 SDA1 GPIAD7/AD7 POUT (48)
3 6 SELIO# EC_SMB_CK2 169 SMBus
(8) EC_SMB_CK2 SCL2
4 5 FSEL# EC_SMB_DA2 170 99 DAC_BRIG R612
(8) EC_SMB_DA2 SDA2 GPODA0/DA0 DAC_BRIG (25)
100 2 1 VLDT_EN_P
GPODA1/DA1 VLDT_EN_P (47)
10K_1206_8P4R_5% EMPWR_BTN# 8 101 IR EF
(38) EMPWR_BTN# GPIO04 GPODA2/DA2 IREF (44)
+3VALW EC_SCI# 20 102 EN_DFAN1 @ 0_0402_5% 2006/04/26 modify, for reserve
(19) EC_SCI# GPIO07 GPODA3/DA3 EN_DFAN1 (6)
RP37 E-MAIL_BTN# 21 Digital To Analog 1
(38) E-MAIL_BTN# GPIO08 GPODA4/DA4 WL_OFF# (31)
1 8 IE_BTN# IE_BTN# 22 42
B (38) IE_BTN# GPIO09 GPODA5/DA5 MINI1_OFF# (31) B
2 7 EMPWR_BTN# (14) ENBKL ENBKL 27 47
E-MAIL_BTN# BKOFF# GPIO0D GPODA6/DA6
3 6 (25) BKOFF# 28 GPIO0E GPODA7/DA7 174
4 5 USER_BTN# FSTCHG 48
(44) FSTCHG GPIO10
EC_SMI# 62 85 PWR_LED# PWR_LED (38)
(19) EC_SMI# GPIO13 * GPIO18/XIO8CS#
100K_1206_8P4R_5% IDE_LED# 63 86 PWR_SUSP_LED# PWR_SUSP_LED# (38)
(23) IDE_LED# USER_BTN# GPIO14 * GPIO19/XIO9CS# BATT_FULL_LED#
(38) USER_BTN# 69 GPIO15 91 BATT_FULL_LED# (38)
+3VS *GPIO1A/XIOACS# BATT_CHGI_LED# C RY1 C RY2
(19) EC_SWI# 70 GPIO16 GPIO * GPIO1B/XIOBCS# 92 BATT_CHGI_LED# (38)
VGATE 75 Expanded I/O * GPIO1C/XIOCCS# 93 WL_ON_LED# WL_ON_LED# (38)
(48) VGATE GPIO17
1 2 5IN1_LED# (19,30) SB_INT_FLASH_SEL#
R594 2 1 @ 0_0402_5% 109 GPIO24 94 BT_ON_LED# BT_ON_LED# (38) 1 1
R510 10K_0402_5% LID_SW# 118 * GPIO1D/XIODCS# 97 E-MAIL_LED# C344 C343
(29) LID_SW# GPIO25 E-MAIL_LED# (38)
* GPIO1E/XIOECS#

4
BT_ON# 119 98 MEDIA_LED# MEDIA_LED# (38)
(38) BT_ON# GPIO26 * GPIO1F/XIOFCS#
SYSON 148 10P_0402_25V8K 10P_0402_25V8K

IN

OUT
(34,41) SYSON GPIO27 2 2
SUSP# 149 171 FAN_SPEED1
+5VALW (30,34,41) SUSP# GPIO28 GPIO2E/TOUT1/FANFB1 FAN_SPEED1 (6)
VR_ON 155 12 DPLL_TP
(48) VR_ON GPIO29 DPLL_TP/GPIO06/FANFB3
RP36 156 FANTEST_TP/GPIO05/FAN3PWM 11 TEST_TP X1
(32) 5IN1_LED# GPIO2A
EC_SMB_CK1 BTSW_EN#

NC

NC
1 8 (38) BTSW_EN# 162 GPIO2B
2 7 EC_SMB_DA1 PBTN_OUT# 168 175 EC_THERM#
(19) PWRBTN_OUT# GPIO2D TOUT2/GPIO2F EC_THERM# (8,19)
3 6 EC_SMB_CK2 Timer Pin

3
4 5 EC_SMB_DA2 55 3
C589 0.1U_0402_16V4Z CAPS_LED# FnLock#/GPIO12 * E51IT0/GPIO00 WLSW_EN# EC_RSMRST# (19)
(38) CAPS_LED# 54 CapLock#/GPIO011 * E51IT1/GPIO01 4 WLSW_EN# (38)
4.7K_1206_8P4R_5% 2 1 NUM_LED# 23 106 E51_RXD 1 2 EAPD
(38) NUM_LED# NumLock#/GPIO0A * E51RXD/GPIO21/ISPCLK EAPD (39)
(20) SATA_LED# SATA_LED# 41 107 E51_TXD R191 0_0402_5% 32.768KHZ_12.5P_1TJS125DJ2A073
+5VS ScrollLock#/GPIO0F * E51TXD/GPIO22/ISPDAT
+3VALW 2 1 19 ECRST# MISC
R517 47K_0402_5% 5 158 C RY2
TP_CLK (19) EC_GA20 GA20/GPIO02 XCLKI C RY1
2 1 (19) EC_KBRST# 6 KBRST#/GPIO03 XCLKO 160
4.7K_0402_5% R208 31
GND
GND
GND
GND
GND
GND

ECSCI#
2 1 TP_DATA
4.7K_0402_5% R207 R213 +3VS
KB910Q B4_LQFP176 100K_0402_5%
17
35
46
122
137
167

EAPD 2 1
+3VALW
KB910 C1 VERSION @
A KBA1 ENBKL A
2 1 1 2
1K_0402_5% R206 R519 100K_0402_5%
2 1 KBA4 1 2 DPLL_TP
1K_0402_5% R205 R520 1K_0402_5%
2 1 KBA5 1 2 TEST_TP
1K_0402_5% R204 R521 1K_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期一, 五月 08, 2006 Sheet 28 of 51
5 4 3 2 1
 Scroll Up
SW2
EVQPLHA15_4P
+3VALW SCRL_U 3 1
Lid Switch 4 2 SCRL_R

1
BTN_R

5
6
R337
Scroll Left Scroll Right

3
100K_0402_5%

SW5 SW6 D14

2
EVQPLHA15_4P EVQPLHA15_4P @
JP5 SCRL_L 3 1 SCRL_R 3 1 PSOT24C_SOT23
SW1
3 1 LID_SW# (28)

1
1
2 4 2 4 2
3

5
6

5
6
4

3
KSO17 SCRL_L
4 2
(28) KSO17
KSI2 5
6
Scroll Down
D16 KSI5 SCRL_U
MPU-101-81_4P @ KSO16 7 SW7
(28) KSO16 8

3
PSOT24C_SOT23 KSI3 EVQPLHA15_4P
KSI4 9 SCRL_D 3 1

1
10 D13
ACES_85201-10051 4 2 @
MEDIA@ PSOT24C_SOT23

5
6

1
Left Right
SW3 SW4 SCRL_D
EVQPLHA15_4P EVQPLHA15_4P
BTN_L 3 1 BTN_R 3 1 BTN_L

3
4 2 4 2
KSO16 KSO17 D15

5
6

5
6
@
PSOT24C_SOT23

1
KSI2 PLAY
KSI3 STOP VOL_UP
KSI4 NEXT VOL_DOWN To TP/B Conn.
KSI5 REV ARCADE_TV JP6 BTN_R C139 1 2 100P_0402_50V8J
+5VS 1 SCRL_R C157 1 100P_0402_50V8J
2 2
TP_DATA
+5VS (28) TP_DATA 3
TP_CLK SCRL_U C162 1 2 100P_0402_50V8J
(28) TP_CLK 4
5 SCRL_L C151 1 100P_0402_50V8J
6 2
C137 BTN_R
SCRL_R 7 SCRL_D C167 1 100P_0402_50V8J
8 2
0.1U_0402_16V4Z SCRL_U
SCRL_L 9 BTN_L C144 1 100P_0402_50V8J
10 2
SCRL_D
BTN_L 11 TP_DATA C169 1 100P_0402_50V8J
12 2

ACES_87151-1207 TP_CLK C174 1 2 100P_0402_50V8J

INT_KBD Conn.
(Right) JP7
KSO15
KSO15 C243 1 100P_0402_50V8J KSO7 C231 1 100P_0402_50V8J KSO14 24 TP_DATA
2 2 23
KSO13
KSO14 C242 1 100P_0402_50V8J KSO6 C230 1 100P_0402_50V8J KSO12 22 TP_CLK
2 2 21
KSI0
20

3
KSO13 C241 1 2 100P_0402_50V8J KSO5 C229 1 2 100P_0402_50V8J KSO11
KSO10 19
KSO12 C240 1 100P_0402_50V8J KSO4 C228 1 100P_0402_50V8J KSI1 18 D26
2 2 17
KSI2 @
KSO9 16 PSOT24C_SOT23
KSI0 C239 1 100P_0402_50V8J KSO3 C227 1 100P_0402_50V8J KSI3 15
2 2

1
KSO8 14
KSO11 C238 1 100P_0402_50V8J KSI4 C226 1 100P_0402_50V8J KSO7 13
2 2 12
KSO6
KSO10 C237 1 100P_0402_50V8J KSO2 C225 1 100P_0402_50V8J KSO5 11
2 2 10
KSO4
KSI1 C236 1 100P_0402_50V8J KSO1 C224 1 100P_0402_50V8J KSO3 9
2 2 8
KSI4
KSO2 7
KSI2 C235 1 100P_0402_50V8J KSO0 C223 1 100P_0402_50V8J KSO1 6
2 2 5
KSO0
KSO9 C234 1 100P_0402_50V8J KSI5 C222 1 100P_0402_50V8J KSI5 4
2 2 3
KSI6
KSI3 C233 1 100P_0402_50V8J KSI6 C221 1 100P_0402_50V8J KSI7 2
2 2 1
KSO8 C232 1 100P_0402_50V8J KSI7 C220 1 100P_0402_50V8J
(Left) ACES_85201-24051
2 2

KSI[0..7]
KSI[0..7] (28)
KSO[0..15]
KSO[0..15] (28) Security Classification Compal Secret Data Compal Electronics. inc.
Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 11, 2006 Sheet 29 of 51
 +3VALW

SB_INT_FLASH_SEL# (19,28)

14
1
KBA[0..19] U24A
(28) KBA[0..19]

P
OE#
ADB[0..7] INT_FLASH_SEL 3 2
(28) ADB[0..7] O I SUS_STAT# (19)

G
74LVC125APW_TSSOP14

7
+3VALW

2
U21 C301 +3VALW 0.1U_0402_16V4Z
0.1U_0402_16V4Z +3VALW +3VALW C333
KBA18 1
1 A18 VDD 32 C313 1 2

2
KBA16 2 31 FWE#
A16 WE#

1
KBA15 3 30 KBA17 1 2 R219 R264
KBA12 A15 A17 KBA14 100K_0402_5% INT_FLASH_EN#
4 A12 A14 29 SUSP# (28,34,41) 10K_0402_5% 1 2
KBA7 5 28 KBA13 0.1U_0402_16V4Z @
A7 A13

2
KBA6 KBA8 R266

G
6 27

1
A6 A8

5
KBA5 7 26 KBA9 U19 100K_0402_5%

2
A5 A9

4
KBA4 8 25 KBA11 2 1 3 U24B

P
A4 A11 I0 EC_FLASH# (19) @
KBA3 9 24 FR D# FWE# 4 @

OE#
KBA2 A3 OE# KBA10 FRD# (28) O INT_FSEL# FSEL#
10 A2 A10 23 I1 1 1 2 6 O I 5

G
KBA1 11 22 FSEL# Q13 R265 22_0402_5%
KBA0 A1 CE# ADB7 FSEL# (28) TC7SH32FU_SSOP5 2N7002_SOT23
12 21 @

3
ADB0 A0 DQ7 ADB6
13 DQ0 DQ6 20
ADB1 14 19 ADB5 74LVC125APW_TSSOP14
DQ1 DQ5 FWR# (28)
ADB2 15 18 ADB4
DQ2 DQ4 ADB3
16 VSS DQ3 17
@
R593 1 2 0_0402_5%
SST39VF040-70-4C-NH_PLCC32
@
(CL55)

1MB Flash ROM

U17
+3VALW 1MB ROM Socket
KBA0 21 31
KBA1 A0 VCC0 +5VALW +5VALW
20 A1 VCC1 30 1
KBA2 19 C318
KBA3 A2 JP10
18 A3

1
KBA4 17 25 ADB0 0.1U_0402_16V4Z KBA16 KBA17
KBA5 A4 D0 ADB1 2 KBA15 1 2 C348 1
16 A5 D1 26 3 4 2 0.1U_0402_16V4Z R284
KBA6 15 27 ADB2 KBA14
KBA7 A6 D2 ADB3 KBA13 5 6 KBA19 100K_0402_5%
14 A7 D3 28 7 8
KBA8 8 32 ADB4 KBA12 KBA10

2
KBA9 A8 D4 ADB5 KBA11 9 10 ADB7 U31
7 A9 D5 33 11 12
KBA10 36 34 ADB6 KBA9 ADB6 8 1
KBA11 A10 D6 ADB7 KBA8 13 14 ADB5 VCC A0
6 A11 D7 35 15 16 7 WP A1 2
KBA12 5 FWE# ADB4 6 3
A12 17 18 (28,45) EC_SMB_CK1 SCL A2
KBA13 4 RESET# +3VALW 5 4
A13 19 20 (28,45) EC_SMB_DA1 SDA GND
KBA14 3 10 RESET# 1 2 +3VALW INT_FLASH_EN#
KBA15 A14 RP# R225 INT_FLASH_SEL 21 22 AT24C16AN-10SI-2.7_SO8
2 A15 NC 11 23 24
KBA16 1 12 100K_0402_5% KBA18 ADB3
KBA17 A16 READY/BUSY# KBA7 25 26 ADB2
40 A17 NC0 29 27 28
KBA18 13 38 KBA6 ADB1
KBA19 A18 NC1 KBA5 29 30 ADB0
37 A19 31 32
KBA4 FR D#
33 34

1
INT_FSEL# 22 KBA3
FR D# CE# KBA2 35 36 FSEL# R277
24 OE# GND0 23 37 38
FWE# 9 39 KBA1 KBA0
WE# GND1 39 40 100K_0402_5%
@ SUYIN_80065AR-040G2T

2
SST39VF080-70_TSOP40

SST part : SA390800000

MXIC part : SA290080120

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 11, 2006 Sheet 30 of 51
 A B C D E

+3VALW
+5VS +3VS

0.1U_0402_16V4Z 1000P_0402_50V7K 0.1U_0402_16V4Z

W=40mils

1 1 1 1 1 1 1 1 1 1 1
C579
C572 C578 C569 C580 C575 C573 C574 C576 C581 C577
10U_0805_10V4Z 4.7U_0805_10V4Z 1000P_0402_50V7K 0.1U_0402_16V4Z
2 2 2 2 2 2 2 2 2 2 2

1 1000P_0402_50V7K 1000P_0402_50V7K 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1

PCI_AD[0..31]
PCI_AD[0..31] (18,22,26,32,35)

JP28
TIP 1 2 RING +3VS +1.5VS +3VALW
1 2
KEY KEY
3 3 4 4
5 5 6 6 1 1 1 1 1 1
7 8 C442 C441 C439 C438 C440 C437
7 8
9 9 10 10
D8 4.7U_0805_10V4Z 0.1U_0402_16V4Z 4.7U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z
11 11 12 12
WL_OFF# 1 2 2 2 2 2 2
(28) WL_OFF# 2 13 13 14 14
CH751H-40PT _SOD323 15 16
15 16
(18,26,32) PCI_PIRQH# 17 17 18 18 W=40mils +5VS
+3VS W=40mils 19 19 20 20 PCI_PIRQG# (18)
S_YIN 21 22 S_CIN
(38) S_YIN 21 22 S_CIN (38)
23 23 24 24 W=40mils +3VALW
CLK_PCI_MINI 25 26
(18) CLK_PCI_MINI 25 26 PCI_RST# (18,26,32,34,35)
27 27 28 28 W=40mils +3VS
PCI_REQ#1 29 30 PCI_GNT#1
(18) PCI_REQ#1 29 30 PCI_GNT#1 (18)
31 32 JP17
2 PCI_AD31 31 32 SB_PCIE_WAKE# 2
33 33 34 34 MINI_PME# (28) (19,34) SB_PCIE_WAKE# 1 1 2 2 +3VS
PCI_AD29 35 36 WLAN_BT_CLK WLAN_BT_DATA 3 4
35 36 WLAN_BT_CLK (38) 3 4
37 38 PCI_AD30 WLAN_BT_CLK 5 6 +1.5VS
PCI_AD27 37 38 5 6
39 39 40 40 (17) MINI_CLKREQ# 7 7 8 8
PCI_AD25 41 42 PCI_AD28 9 10
WLAN_BT_DATA 41 42 PCI_AD26 9 10
(38) WLAN_BT_DATA 43 43 44 44 (17) CLK_PCIE_MINI# 11 11 12 12
45 46 PCI_AD24 13 14
(18,26,32,35) PCI_CBE#3 45 46 (17) CLK_PCIE_MINI 13 14
PCI_AD23 47 48 MINI_IDSEL1 1 2 R509 PCI_AD18 15 16
47 48 100_0402_5% 15 16
49 49 50 50
PCI_AD21 51 52 PCI_AD22
PCI_AD19 51 52 PCI_AD20
53 53 54 54 17 17 18 18
55 56 19 20 MINI1_OFF#
55 56 PCI_PAR (18,26,32,35) 19 20 MINI1_OFF# (28)
PCI_AD17 57 58 PCI_AD18 21 22 NB_RST#
57 58 21 22 NB_RST# (14,18,23,28,36)
PCI_CBE#2 59 60 PCI_AD16 PCIE_MRX_PTX_N0 23 24 +3VALW
(18,26,32,35) PCI_CBE#2 59 60 (13) PCIE_MRX_PTX_N0 23 24
PCI _IRDY# 61 62 PCIE_MRX_PTX_P0 25 26
(18,26,32,35) PCI_IRDY# 61 62 (13) PCIE_MRX_PTX_P0 25 26
63 64 PCI_FRAME# 27 28
63 64 PCI_FRAME# (18,26,32,35) 27 28
65 66 PCI_TRDY# 29 30 ICH_SMBCLK SB_CK_SCLK (10,11,17,19,34)
(18,26,36) PM_CLKRUN# 65 66 PCI_TRDY# (18,26,32,35) 29 30
PCI_SERR# 67 68 PCI_STOP# (13) PCIE_MTX_C_PRX_N0 31 32 ICH_SMBDATA SB_CK_SDAT (10,11,17,19,34)
(18,26,32) PCI_SERR# 67 68 PCI_STOP# (18,26,32,35) 31 32
69 69 70 70 (13) PCIE_MTX_C_PRX_P0 33 33 34 34
PCI_PERR# 71 72 PCI_DEVSEL# 35 36
(18,26,32,35) PCI_PERR# 71 72 PCI_DEVSEL# (18,26,32,35) 35 36
PCI_CBE#1 73 74 37 38
(18,26,32,35) PCI_CBE#1 PCI_AD14 73 74 PCI_AD15 37 38
75 75 76 76 39 39 40 40
77 78 PCI_AD13 41 42
PCI_AD12 77 78 PCI_AD11 41 42 (MINI1_LED#)
79 79 80 80 43 43 44 44
PCI_AD10 81 82 45 46
81 82 PCI_AD9 45 46
83 83 84 84 47 47 48 48
PCI_AD8 85 86 PCI_CBE#0 49 50
PCI_AD7 85 86 PCI_CBE#0 (18,26,32,35) 49 50
87 87 88 88 51 51 52 52
89 90 PCI_AD6
PCI_AD5 89 90 PCI_AD4

G1
G2
G3
G3
91 91 92 92
CVBS_IN 93 94 PCI_AD2
(38) CVBS_IN 93 94
PCI_AD3 95 96 PCI_AD0 FOX_AS0B226-S99N-7F

53
54
55
56
3 95 96 3
+5VS W=40mils 97 97 98 98 TV_THERM# (28)
PCI_AD1 99 100
99 100
101 101 102 102
103 103 104 104 MINI@
105 105 106 106
107 107 108 108
109 109 110 110
111 112 AUDIO_INR
111 112 AUDIO_INR (38)
113 113 114 114
115 115 116 116 W=30mils
117 117 118 118
119 120 R605
AUDIO_INL 119 120 +CAM_VDD
(38) AUDIO_INL 121 121 122 122 +3VS 1 2
+5VS 123 123 124 124 +3VALW 1
W=30mils W=20mils 0_0805_5%
P-TWO_A53921-A0G16-P C657
0.1U_0402_16V4Z
JP35 2

1 1
(Change to SP070003200) 2 2 USB20_N3 (19)
3 3 USB20_P3 (19)
4 4
5 5
GND1 6
GND2 7
CLK_PCI_MINI
ACES_88266-05001
Mini Card Power Rating
1

R254 Power Primary Power (mA) Auxiliary Power (mA)

@ 10_0402_5%
2006/02/20 Added
4
Peak Normal Normal 4
2

1
C329
+3VS 1000 750

@ 10P_0402_25V8K
+3VALW 330 250 250 (wake enable)
2
+1.5VS 500 375 5 (Not wake enable)
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/05/09 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期一, 五月 08, 2006 Sheet 31 of 51
A B C D E
 A B C D E

+S1_VCC +3VS
VPPD0
(33) VPPD0
VPPD1
(33) VPPD1
VCCD0#
+3VS (33) VCCD0#
40mil VCCD1#
(33) VCCD1#

M13

M12

G13
N13

N12

D12
H11
S1_A[0..25]

G1
C8

N4
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z

A7

B4

K2

F3
L9
L6
S1_A[0..25] (33)
U30
1 1 1 1 1 1 1 S1_D[0..15]

VCCD1#
VCCD0#

VPPD1
VPPD0

VCCA2
VCCA1

VCC10
VCC9
VCC8
VCC7
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1
S1_D[0..15] (33)
C604 C597 C599 C603 C594 C592 C593

0.1U_0402_16V4Z
2 2 2 2 2 2 2
PCI_AD31 C2 B2 S1_D10
1 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z PCI_AD30 AD31 CAD31/D10 S1_D9 1
C1 AD30 CAD30/D9 C3
PCI_AD29 D4 B3 S1_D1
PCI_AD28 AD29 CAD29/D1 S1_D8
D2 AD28 CAD28/D8 A3
PCI_AD27 D1 C4 S1_D0 +3VS
PCI_AD26 AD27 CAD27/D0 S1_A0
E4 AD26 CAD26/A0 A6
PCI_AD25 E3 D7 S1_A1
PCI_AD24 AD25 CAD25/A1 S1_A2
E2 AD24 CAD24/A2 C7 1 1
PCI_AD23 F2 A8 S1_A3 C362 C602
PCI_AD[0..31] PCI_AD22 AD23 CAD23/A3 S1_A4
(18,22,26,31,35) PCI_AD[0..31] F1 AD22 CAD22/A4 D8
PCI_AD21 G2 A9 S1_A5 4.7U_0805_10V4Z 0.1U_0402_16V4Z
PCI_CBE#[0..3] PCI_AD20 AD21 CAD21/A5 S1_A6 2 2
(18,26,31,35) PCI_CBE#[0..3] G3 AD20 CAD20/A6 C9
PCI_AD19 H3 A10 S1_A25
PCI_AD18 AD19 CAD19/A25 S1_A7
H4 AD18 CAD18/A7 B10
PCI_AD17 J1 D10 S1_A24
PCI_AD16 AD17 CAD17/A24 S1_A17
J2 AD16 CAD16/A17 E12
PCI_AD15 N2 F10 S1_IOWR#
AD15 CAD15/IOWR# S1_IOWR# (33)
CLK_PCI_PCM CLK_SD_48M PCI_AD14 M3 E13 S1_A9
PCI_AD13 AD14 CAD14/A9 S1_IORD# +S1_VCC
N3 AD13 CAD13/IORD# F13 S1_IORD# (33)

1
PCI_AD12 K4 F11 S1_A11
R283 R525 PCI_AD11 AD12 CAD12/A11 S1_OE#
M4 AD11 CAD11/OE# G10 S1_OE# (33)
@ 10_0402_5% @ 10_0402_5% PCI_AD10 K5 G11 S1_CE2# 1 1
+3VS AD10 CAD10/CE2# S1_CE2# (33)
PCI_AD9 L5 G12 S1_A10 C598 C605
PCI_AD8 AD9 CAD9/A10 S1_D15
M5 H12

2
SM_CD# PCI_AD7 AD8 CAD8/D15 S1_D7 0.1U_0402_16V4Z 0.1U_0402_16V4Z
1 2 1 1 K6 AD7 CAD7/D7 H10
R523 61@ 43K_0402_5% C352 C596 PCI_AD6 S1_D13 2 2
M6 AD6 CAD6/D13 J11
PCI_AD5 N6 J12 S1_D6
@ 15P_0402_50V8J @ 15P_0402_50V8J PCI_AD4 AD5 CAD5/D6 S1_D12
M7 AD4 CAD4/D12 K13
2 2 PCI_AD3 S1_D5
N7 J10

PCI Interface
PCI_AD2 AD3 CAD3/D5 S1_D11
L7 AD2 CAD2/D11 K10

CARDBUS
PCI_AD1 K7 K12 S1_D4
PCI_AD0 AD1 CAD1/D4 S1_D3
N8 AD0 CAD0/D3 L13
2 PCI_CBE#3 S1_REG# 2
E1 CBE3# CCBE3#/REG# B7 S1_REG# (33)
PCI_CBE#2 J3 A11 S1_A12
PCI_CBE#1 CBE2# CCBE2#/A12 S1_A8
N1 CBE1# CCBE1#/A8 E11
PCI_CBE#0 N5 H13 S1_CE1#
CBE0# CCBE0#/CE1# S1_CE1# (33)
PCI_RST# G4 B9 S1_RST
(18,26,31,34,35) PCI_RST# PCIRST# CRST#/RESET S1_RST (33)
(18,26,31,35) PCI_FRAME# J4 B11 S1_A23
FRAME# CFRAME#/A23 S1_A15
(18,26,31,35) PCI_IRDY# K1 IRDY# CIRDY#/A15 A12
(18,26,31,35) PCI_TRDY# K3 A13 S1_A22
TRDY# CTRDY#/A22 S1_A21
(18,26,31,35) PCI_DEVSEL# L1 DEVSEL# CDEVSEL#/A21 B13
L2 C12 S1_A20
(18,26,31,35) PCI_STOP# STOP# CSTOP#/A20
L3 C13 S1_A14
(18,26,31,35) PCI_PERR# PERR# CPERR#/A14
M1 A5 S1_WAIT#
(18,26,31) PCI_SERR# SERR# CSERR#/WAIT# S1_WAIT# (33)
(18,26,31,35) PCI_PAR M2 D13 S1_A13
PCI_REQ#2 PAR CPAR/A13 S1_INPACK#
(18) PCI_REQ#2 A1 PCIREQ# CREQ#/INPACK# B8 S1_INPACK# (33)
B1 C11 S1_WE#
(18) PCI_GNT#2 PCIGNT# CGNT#/WE# S1_WE# (33)
CLK_PCI_PCM H1 B12 1 2 S1_A16
(18) CLK_PCI_PCM PCICLK CCLK/A16 R286 33_0402_5%
L8 C5 S1_BVD1
RIOUT#_PME# CSTSCHG/BVD1_STSCHG# S1_BVD1 (33)
+3VS 1 2 L11 D5 S1_WP
SUSPEND# CCLKRUN#/WP_IOIS16# S1_WP (33)
R524 10K_0402_5%
PCI_AD20 1 2 F4 D11 S1_A19
R527 100_0402_5% IDSEL CBLOCK#/A19
K8 D6 S1_RDY# S1_CD2# S1_CD1#
(18,35) PCI_PIRQE# MFUNC0 CINT#/READY_IREQ# S1_RDY# (33)
R272 1 2 SD_PULLHIGH N9 2 2
(33) MS_PWREN# MFUNC1
0_0402_5% K9 M9 PCM_SPK# C361 C595
(18,26,31) PCI_PIRQH# MFUNC2 SPKROUT PCM_SPK# (39)
@ N10 B5 S1_BVD2
(18,28,36) SERIRQ MFUNC3 CAUDIO/BVD2_SPKR# S1_BVD2 (33)
SM_CD# L10 10P_0402_25V8K 10P_0402_25V8K
5IN1_LED# R595 1 MFUNC4 S1_CD2# 1 1
(28) 5IN1_LED# 2 0_0402_5% N11 MFUNC5 CCD2#/CD2# A4 S1_CD2# (33)
M11 L12 S1_CD1#
MFUNC6 CCD1#/CD1# S1_CD1# (33)
SDOC# J9 D9 S1_VS2
(33) SDOC# MFUNC7 CVS2/VS2# S1_VS2 (33)
C6 S1_VS1
3 CVS1/VS1 S1_VS1 (33) 3
A2 S1_D2
PCI_RST# CRSV3/D2 S1_A18
M10 GRST# CRSV2/A18 E10
MFUNC5[3:0] = (0 1 0 1) J13 S1_D14
CRSV1/D14
MFUNC5[4] = 1
E7
SD/MMC/MS/SM H7
+VCC_SD VCC_SD MSINS# MS_INS# (33)
J8 XD_PWREN#
MSPWREN#/SMPWREN# XD_PWREN# (33)
SD_CD# E8 H8 MSBS_XDD1
(33) SD_CD# SDCD# MSBS/SMDATA1 MSBS_XDD1 (33)
SD_WP# F8 E9 MS_CLK R529 1 2 33_0402_5%
(33) SD_WP# SDWP/SMWPD# MSCLK/SMRE# MSCLK_XDRE# (33)
SD_PWREN# G7 G9 MSD0_XDD2 61@
(33) SD_PWREN# SDPWREN33# MSDATA0/SMDATA2 MSD0_XDD2 (33)
H9 MSD1_XDD6
MSDATA1/SMDATA6 MSD1_XDD6 (33)
CLK_SD_48M H5 G8 MSD2_XDD5
(17) CLK_SD_48M SDCLKI MSDATA2/SMDATA5 MSD2_XDD5 (33)
F9 MSD3_XDD3
MSDATA3/SMDATA3 MSD3_XDD3 (33)
R528 1 2 61@ 33_0402_5% SD_CLK F6
(33) SDCK_XDWE# SDCLK/SMWE#
SDCM_XDALE E5
(33) SDCM_XDALE SDCMD/SMALE
SDDA0_XDD7 E6 H6
(33) SDDA0_XDD7 SDDAT0/SMDATA7 SMBSY# XD_BSY# (33)
SDDA1_XDD0 F7 J7 XD_CD#
(33) SDDA1_XDD0 SDDAT1/SMDATA0 SMCD# XD_CD# (33)
SDDA2_XDCL F5 J6 XD_WP#
(33) SDDA2_XDCL SDDAT2/SMCLE SMWP# XD_WP# (33)
SDDA3_XDD4 G6 J5
(33) SDDA3_XDD4 SDDAT3/SMDATA4 SMCE# XD_CE# (33)

2
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
G5 GND_SD R526
2.2K_0402_5%
CB714_LFBGA169 61@
D3
H2
L4
M8
K11
F12
C10
B6

1
**CB714 use B0 version

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期一, 五月 08, 2006 Sheet 32 of 51
A B C D E
 A B C D E

PCMCIA Socket 1
JP9
GND
35 GND
S1_D3 2
S1_CD1# DATA3
(32) S1_CD1# 36 CD1#
S1_D4 3
+S1_VCC S1_D11 DATA4
37
PCMCIA Power Control S1_D5
S1_D12
4
38
DATA11
DATA5
S1_D6 DATA12
1 1 5 DATA6
+S1_VCC C332 C336 S1_D13 39
S1_D7 DATA13
6 DATA7
10U_0805_10V4Z 0.1U_0402_16V4Z S1_D14 40
2 2 S1_CE1# DATA14
1 U26
40mil (32) S1_CE1# S1_D15
7 CE1# 1
41 DATA15
13 S1_A10 8
VCC S1_CE2# ADD10
VCC 12 (32) S1_CE2# 42 CE2#
9 11 S1_OE# 9
12V VCC +S1_VPP (32) S1_OE# S1_VS1 OE#
(32) S1_VS1 43 VS1#
40mil S1_A11 10
+5VS +S1_VPP S1_IORD# ADD11
(32) S1_IORD# 44 IORD#
W=40mil 1 S1_A9 11
S1_IOWR# ADD9
VPP 10 (32) S1_IOWR# 45 IOWR#
1 1 C340 1 1 S1_A8 12
C339 0.1U_0402_16V4Z C601 C600 S1_A17 ADD8
5 5V 46 ADD17
C338 2 S1_A13
6 5V 13 ADD13
10U_0805_10V4Z 0.1U_0402_16V4Z S1_A[0..25] S1_A18 47
2 2 2 2 (32) S1_A[0..25] ADD18
0.1U_0402_16V4Z 1 VCCD0# 10U_0805_10V4Z S1_A14 14
VCCD0 VCCD0# (32) S1_D[0..15] ADD14
2 VCCD1# (32) S1_D[0..15] S1_A19 48
+3VS VCCD1 VCCD1# (32) ADD19
15 VPPD0 S1_WE# 15
VPPD0 VPPD0 (32) (32) S1_WE# WE#
14 VPPD1 S1_A20 49
VPPD1 VPPD1 (32) ADD20
W=40mil S1_RDY# 16
(32) S1_RDY# S1_A21 READY
3 3.3V 50 ADD21
1 1 4 3.3V OC 8 +S1_VCC 17 VCC
SHDN
C334 C335 51
GND

+S1_VCC VCC
+S1_VPP 18 VPP
10U_0805_10V4Z +S1_VPP 52 VPP
1

2 2
0.1U_0402_16V4Z CP2211FD3_SSOP16 S1_OE# S1_A16
1 2 +S1_VCC 19
7

16

R263 R276 43K_0402_5% S1_A22 ADD16

53 ADD22
10K_0402_5% S1_WP 2 1 S1_A15 20
+S1_VCC ADD15
R305 43K_0402_5% S1_A23 54
S1_RST S1_A12 ADD23
1 2 +S1_VCC 21
2

R292 43K_0402_5% S1_A24 ADD12

55 ADD24
S1_CE1# 1 2 +S1_VCC S1_A7 22
R271 43K_0402_5% S1_A25 ADD7
56 ADD25
S1_CE2# 1 2 +S1_VCC S1_A6 23
2 R274 43K_0402_5% S1_VS2 ADD6 2
(32) S1_VS2 57 VS2#
VCCD0# 1 2 S1_A5 24
R260 10K_0402_5% S1_RST ADD5
(32) S1_RST 58 RESET
VCCD1# 1 2 S1_A4 25
R261 10K_0402_5% S1_WAIT# ADD4
(32) S1_WAIT# 59 WAIT#
S1_A3 26
S1_INPACK# ADD3
(32) S1_INPACK# 60 INPACK#
S1_A2 27
+VCC_SD S1_REG# ADD2
(32) S1_REG# 61 REG#
S1_A1 28
S1_BVD2 ADD1
(32) S1_BVD2 62 BVD2
1 1 1 S1_A0 29
SD/MS Power Control C280 C283 C285
0.1U_0402_16V4Z (32) S1_BVD1
S1_BVD1
S1_D0
63
30
ADD0
BVD1 (NEW)
XD Power Control 10U_0805_10V4Z 0.1U_0402_16V4Z
61@ 2 61@ 2 2
61@ S1_D8
S1_D1
64
31
DATA0
DATA8
S1_D9 DATA1
65 DATA9 GND 69
+3VS S1_D2 32 70
+3VS S1_D10 DATA2 GND
40mil S1_WP
66 DATA10
xD PU and PD. Close to Socket (32) S1_WP 33 WP
2

+3VS +VCC_XD S1_CD2# 67

(32) S1_CD2# CD2#
2

R85 +3VS +VCC_XD 34

R81 U9 GND
68 GND
61@ 10K_0402_5% 1 8 61@ 10K_0402_5% 2 1 XD_CD#
GND OUT R99 @ 43K_0402_5% SANTA_130601-7_LT
2 7 1 1
1

IN OUT C201 C191

3 6
1

XD_PWREN# IN OUT SDOC# +VCC_XD 0.1U_0402_16V4Z

4 5
(32) XD_PWREN# EN# FLG SDOC# (32)
61@ 6 IN 1 Socket
1

G528_SO8 2
10U_0805_10V4Z 2
(HDQ70)
1

61@ R80 1 2 MSCLK_XDRE# 61@ JP25

R84 300_0402_5% R102 61@ 2.2K_0402_5% +VCC_XD 41 15 +VCC_SD
0_0402_5% SDCK_XDWE# XD-VCC SD-VCC
1 2 MS-VCC 9
3 R103 61@ 2.2K_0402_5% SDDA1_XDD0 3
61@ (32) SDDA1_XDD0 33
1 2

XD_CE# MSBS_XDD1 XD-D0 SDCK_XDWE#

1 2 (32) MSBS_XDD1 34 4 IN 1 CONN 16
2

D R97 61@ 2.2K_0402_5% MSD0_XDD2 XD-D1 SD_CLK SDDA0_XDD7

(32) MSD0_XDD2 35 XD-D2 SD-DAT0 19
SD_PWREN# XD_PWREN# 2 Q7 1 2 XD_BSY# MSD3_XDD3 36 20 SDDA1_XDD0
(32) SD_PWREN# (32) MSD3_XDD3 XD-D3 SD-DAT1
G 2N7002_SOT23 R98 61@ 2.2K_0402_5% SDDA3_XDD4 37 11 SDDA2_XDCL
(32) SDDA3_XDD4 XD-D4 SD-DAT2
S 61@ MSD2_XDD5 38 12 SDDA3_XDD4
(32) MS_PWREN# (32) MSD2_XDD5
3

MSD1_XDD6 XD-D5 SD-DAT3 SDCM_XDALE

(32) MSD1_XDD6 39 XD-D6 SD-CMD 13
SDDA0_XDD7 40 21 SD_CD#
(32) SDDA0_XDD7 XD-D7 SD-CD-SW SD_CD# (32)
SD-CD-COM 22
SDCK_XDWE# 30 43 SD_WP#
(32) SDCK_XDWE# XD-WE SD-WP-SW SD_WP# (32)
XD_WP# 31 44
(32) XD_WP# XD-WP SD-WP-COM
Reserve for SD,MS CLK. SDCM_XDALE 29
(32) SDCM_XDALE XD-ALE
XD_CD# 23 8 MSCLK_XDRE#
Close to Socket (32) XD_CD# XD-CD MS-SCLK
XD_BSY# 25 4 MSD0_XDD2
(32) XD_BSY# XD-R/B MS-DATA0
+VCC_XD 1 2 +VCC_SD MSCLK_XDRE# 26 3 MSD1_XDD6
(32) MSCLK_XDRE# XD-RE MS-DATA1
R96 0_0603_5% SDCK_XDWE# 1 2 XD_CE# 27 5 MSD2_XDD5
(32) XD_CE# XD-CE MS-DATA2
61@ C196 10P_0402_25V8K 61@ SDDA2_XDCL 28 7 MSD3_XDD3
(32) SDDA2_XDCL XD-CLE MS-DATA3
6 MS_INS#
MS-INS MS_INS# (32)
MSCLK_XDRE#1 2 32 2 MSBS_XDD1
C197 10P_0402_25V8K @ XD-GND MS-BS
24 XD-GND SD-GND 14
2006/4/27 Modify to @ SD-GND 17
R610 42 1
N.C. MS-GND
1 2 18 N.C. MS-GND 10

TAITW_R007-530-L3
0_0402_5%
61@
61@

2006/4/13 modify

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期一, 五月 08, 2006 Sheet 33 of 51
A B C D E
 A B C D E

New Card Power Switch

New Card Socket (Left)
U32
+3VALW_CARD1 +3VS_CARD1 +1.5VS_CARD1
60mils JP30
+3VS 5 3.3Vin1 3.3Vout1 7 +3VS_CARD1 Imax = 0.275A Imax = 1.35A Imax = 0.75A
6 3.3Vin2 3.3Vout2 8
1 GND-1
1 1 1 1 1 1 USB20_N1 R596 1 2 0_0402_5% USB20_N1_R 2
(19) USB20_N1 USB_D-
40mil C357 C350 C365 C367 C354 C355 USB20_P1 R597 1 2 0_0402_5% USB20_P1_R 3
1 (19) USB20_P1 USB_D+ 1
+3VALW 21 20 +3VALW_CARD1 0.1U_0402_16V4Z CP_USB# 4
3.3Vaux_in Aux_out 10U_0805_10V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z EXPRESS@ CPUSB#
2 2 EXPRESS@ 10U_0805_10V4Z
2 2 EXPRESS@ 2 2 2005/12/30 Modify 5 RSV-5
40mil EXPRESS@ 6
EXPRESS@ 10U_0805_10V4Z RSV-6
+1.5VS 18 1.5Vin1 1.5Vout1 16 +1.5VS_CARD1 (10,11,17,19,31) SB_CK_SCLK 7 SMB_CLK
19 17 EXPRESS@ (10,11,17,19,31) SB_CK_SDAT 8
1.5Vin2 1.5Vout2 SMB_DATA
+1.5VS_CARD1 9 +1.5V-9
EXPRESS@ 10 +1.5V-10
+3VALW R285EXPRESS@
1 2 100K_0402_5% CP_USB# 14 CPUSB# (19,31) SB_PCIE_WAKE# 11 WAKE#
R287 1 2 100K_0402_5% CP_PE# 15 23 +3VALW_CARD1 12
SUSP# CPPE# OC# PERST1# +3.3VAUX
(28,30,41) SUSP# 4 STBY# 13 PERST#
SYSON 3 22 RCLKEN1 +3VS_CARD1 14
(28,41) SYSON SHDN# RCLKEN +3.3V-14
PCI_RST# 2 9 PERST1# +3VS +3VS 15
(18,26,31,32,35) PCI_RST# SYSRST# PERST# +3.3V-15
CLKREQ1# 16
CP_PE# CLKREQ#
17

GND
(19) CP_PE#

NC1
NC2
NC3
NC4
NC5
CPPE#

1
+3VS 1 18
(17) CLK_PCIE_CARD# REFCLK-
R273 C345 19
(17) CLK_PCIE_CARD REFCLK+
TPS2231PWPR_PWP24 10K_0402_5% 0.1U_0402_16V4Z 20

11

1
10
12
13
24
GND-20

1
EXPRESS@ EXPRESS@ EXPRESS@ PCIE_MRX_PTX_N1 21
2 (13) PCIE_MRX_PTX_N1 PERn0
R275 PCIE_MRX_PTX_P1 22
(13) PCIE_MRX_PTX_P1

2
PERp0

5
10K_0402_5% U29 23
EXPRESS@ CLKREQ1# GND-23
2 24

P
I0 (13) PCIE_MTX_C_PRX_N1 PETn0
4 EXP_CLKREQ# (17) (13) PCIE_MTX_C_PRX_P1 25

2
O PETp0
1 I1 26 GND-26

G
1
D TC7SH32FU_SSOP5 EXPRESS@ 27

3
RCLKEN1 2 Q16 GND-27
28 GND-28
G 2N7002_SOT23
+3VS +3VALW +1.5VS S EXPRESS@ SANTA_130832-1_LB

3
EXPRESS@

C364
1
C356
1
C353
1 (NEW)
2 2
10U_0805_10V4Z 10U_0805_10V4Z 10U_0805_10V4Z
12/22 Modify U29 Package
2 2 2

+3VALW

+5VALW
1

+USB_VCCA
U4
1 8 R42
GND OUT 100K_0402_5%
2 IN OUT 7
3 6
2

IN OUT R43
1 4 EN# FLG 5
C111 1K_0402_5%

4.7U_0805_10V4Z
G528_SO8 1 2 USB_OC#0 (19) USB CONN. 1 & 2
2 1
C133

USB_EN# 0.1U_0402_16V4Z +USB_VCCA +USB_VCCA

(28,38) USB_EN# 2
+USB_AS
W=80mils +USB_BS
W=80mils
1 1
1 1
+ C478 C474 + C1 C2
USB2@ USB2@
3 150U_D_6.3VM 470P_0402_50V7K 150U_D_6.3VM 470P_0402_50V7K 3
2 2 2 2
2005/12/30 Modify 2005/12/30 Modify
JP21 JP14
1 USB2@ 1
USB20_N0 R598 1 VCC VCC
(19) USB20_N0 2 0_0402_5% USB20_N0_R 2 D- 8 8 (19) USB20_N2
USB20_N2 R599 1 2 0_0402_5% USB20_N2_R 2 D- 8 8
USB20_P0 R600 1 2 0_0402_5% USB20_P0_R 3 7 USB20_P2 R601 1 2 0_0402_5% USB20_P2_R 3 7
(19) USB20_P0 D+ 7 (19) USB20_P2 D+ 7
4 USB2@ 4
GND GND
5 GND1 5 GND1
6 GND2 6 GND2
SUYIN_020173MR004S512ZL SUYIN_020173MR004S512ZL
USB2@

2005/12/30 Modify D1
D25 1 4 +USB_VCCA
GND VCC
1 GND VCC 4 +USB_VCCA
USB20_P2 2 3 USB20_N2
USB20_P0 USB20_N0 I/O I/O
2 I/O I/O 3
@ PRTR5V0U2X_SOT143
@ PRTR5V0U2X_SOT143

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期一, 五月 08, 2006 Sheet 34 of 51
A B C D E
 A B C D E

+3VS +2.5VS_1394
+3VS

1 1 1 1 1 1 1 1 U13
C319 C300 C290 C311 C549 C289 C308 C288 1 8
A0 VCC
2 A1 WP 7
0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 0.1U_0402_16V4Z 3 6 EECK
A2 SCL

1
2 2 2 2 2 2 2 2 EEDI
1394@ 1394@ 1394@ 1394@ 1394@ 1394@ 1394@ 1394@ 4 GND SDA 5
R170
AT24C02N-10SU-2.7_SO8 510_0402_5%
@ @

2
EECK and EEDI is pull high internal
1 +2.5VS_1394 +3VS External pull high circuit is unnecessary 1

20mils L48
MBK1608301YZF_0603
+1394_PLLVDD 0.1U_0402_16V4Z 0.1U_0402_16V4Z 1 2 +3VS
1 1 1 1 1394@
C312 C567 C566 C571 When use external EEPROM
4.7U_0805_10V4Z
Populate U13, R170, R186

111

122
110
U14 2 2 2 2 1394@ Un-populate R169

46
30
21

99
36
17

87
86
73
72
62
59
1394@ 1394@ 1394@

5
0.1U_0402_16V4Z

VDD4
VDD3
VDD2
VDD1
VCC6
VCC5
VCC4
VCC3
VCC2
VCC1

PVA5
PVA4
PVA3
PVA2
PVA1
PVA0
+3VS

PCI_AD31 94
VT6311S EECS 26
27
EECS R169 1 2 4.7K_0402_5% 1394@

PCI_AD30 AD31 EEDO EEDI

PCI_AD29
95
96
AD30
AD29
EEPROM SDA/EEDI
SCL/EECK
28
29 EECK
PCI_AD[0..31] PCI_AD28 97
(18,22,26,31,32) PCI_AD[0..31] PCI_AD27 AD28 C557 1
98 AD27 PHYRST# 55 2 1U_0402_6.3V4Z 1394@
PCI_AD26 101 81 R490 1 2 @ 4.7K_0402_5% +3VS
PCI_AD25 AD26 BJT_CTL I2CEEN R186 1 4.7K_0402_5% @ +3VS
102 AD25 I2CEN 43 2
PCI_AD24 103 32 R168 1 2 4.7K_0402_5% 1394@
PCI_AD23 AD24 PWRDET C287 1 0.1U_0402_16V4Z 1394@
PCI_AD22
106
107
AD23
AD22
others REG_FB 84 REG_FB
2

3
PCI_AD21 109 E
PCI_AD20 AD21 REG_OUT REG_OUT Q28
113 AD20 REG_OUT 85 2
PCI_AD19 114 C303 B 2SB1197K_SOT23
PCI_AD18 AD19 R480 1 C
115 60 2 1K_0402_5% 1394@ 10P_0402_25V8K @

1
PCI_AD17 AD18 XCPS XREXT R486 1 6.19K_0603_1% 1394@
116 AD17 XREXT 63 2 1 2 1394@
2 PCI_AD16 C568 1 47P_0402_50V8J 2
117 AD16 10mils 2

2
PCI_AD15 2 57 1394_XI 1394@ Y4 REG_FB +2.5VS_1394
PCI_AD14 AD15 XI 24.576MHZ_16P_X8A024576FG1H
PCI_AD13
3
4
AD14
AD13
OSCILLATOR XO 58 1394_XO 1394@ When use external BJT
PCI_AD12 7 Populate Q28, R490

1
PCI_AD11 AD12 TPB0-
8 AD11 XTPB0M 67 1 2
PCI_AD10 9 68 TPB0+
PCI_AD9 AD10 XTPB0P TPA0- C309
PCI_AD8
10
11
AD9
AD8
PHY PORT0 XTPA0M
XTPA0P
69
70 TPA0+ 10P_0402_25V8K
IDSEL:PCI_AD16 PCI_AD7 14 71 TPBIAS0 1394@
PCI_AD6 15
AD7
AD6
PCI I/F XTPBIAS0
PCI_AD16 1 2 1394_IDSEL PCI_AD5 16 74
R194 1394@ 100_0402_5% PCI_AD4 AD5 XTPB1M
18 AD4 XTPB1P 75
PCI_AD3
PCI_AD2
19
20
AD3
AD2
PHY PORT1XTPA1M
XTPA1P
76
77
PCI_AD1 24 78
PCI_AD0 AD1 XTPBIAS1
25 AD0
(18,26,31,32) PCI_CBE#3 104 CBE3# NC17 83
(18,26,31,32) PCI_CBE#2 119 CBE2# NC16 82
(18,26,31,32) PCI_CBE#1 1 CBE1# NC15 64
(18,26,31,32) PCI_CBE#0 12 CBE0# NC14 54
PCI_STOP# 125 53
(18,26,31,32) PCI_STOP# STOP# NC13
PCI_PERR# 127 52
(18,26,31,32) PCI_PERR# PERR# NC12
PCI_PAR 128 51
(18,26,31,32) PCI_PAR PAR NC11
PCI_PIRQE# 88 50
(18,32) PCI_PIRQE# INTA# NC10
(18,26,31,32,34) PCI_RST# 89 PCIRST# NC9 49
CLK_PCI_1394 90 48
(18) CLK_PCI_1394 PCICLK NC8
PCI_GNT#0 92 45
(18) PCI_GNT#0 GNT# NC7
PCI_REQ#0 93 44
(18) PCI_REQ#0 REQ# NC6
1394_IDSEL 105 42
IDSEL NC5
34 PME# NC4 41
PCI _IRDY# 121 40
3 (18,26,31,32) PCI_IRDY# IRDY# NC3 3
PCI_TRDY# 123 39
(18,26,31,32) PCI_TRDY# TRDY# NC2
PCI_DEVSEL# 124 37
(18,26,31,32) PCI_DEVSEL# DEVSEL# NC1
PCI_FRAME# 120 35
(18,26,31,32) PCI_FRAME# FRAME# NC0
GNDARX1

GNDARX2
GNDATX1

GNDATX2

15mils
GND19
GND18
GND17
GND16
GND15
GND10
GND9
GND8
GND7
GND6
GND5
GND4
GND3
GND2
GND1
GND0

1
C561
VT6311S_LQFP128 R478 R476 0.33U_0603_10V7K
66
65
80
79
118
112
108
100
91
61
56
47
38
33
31
23
22
6
13
126

54.9_0402_1% 54.9_0402_1% 1394@

1394@ 1394@ 1394@ 2

2
TPBIAS0 JP26
TPA0+ 4
CLK_PCI_1394 TPA0- 4
VIA 1394 with Sn-Bi part : SA00000P510 3 3 6 6
TPB0+ 2 5
2 5
1

TPB0- 1
R251 1

1
@ 10_0402_5% FOX_UV31413-4R1-TR
R472 R467 1394@
54.9_0402_1% 54.9_0402_1%
(ECQ60)
2

1 1394@ 1394@
C325

2
@ 10P_0402_25V8K

1
2
1
C547 R471
270P_0402_50V7K 4.99K_0402_1%
1394@ 1394@
2

2
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期一, 五月 08, 2006 Sheet 35 of 51
A B C D E
SUPER I/O SMsC LPC47N207
+3VS

0.1U_0402_16V4Z

1 1 1
C587 C588 C582
SIOALL@ SIOALL@ SIOALL@
0.1U_0402_16V4Z
2 2 2

0.1U_0402_16V4Z

+3VS

17
31
42
60

48
5
U28

3.3V
3.3V
3.3V
3.3V
3.3V

VTR
LPC_AD0 64 +3VS
(18,28) LPC_AD0 LAD0 +3VS
LPC_AD1 2 27 U25
(18,28) LPC_AD1 LAD1 GPIO10
LPC_AD2 4 28
(18,28) LPC_AD2 LAD2 GPIO11
LPC_AD3 7 30 1 2 3 15 IRRX
(18,28) LPC_AD3 LAD3 GPIO12/IO_SMI# VCC IRRX
32 R269 SIO1@10K_0402_5% 14 FIR 16 IRTXOUT
GPIO13/IRQIN1 VCC IRTX IRMODE
GPIO14/IRQIN2 33 1 2 22 VCC IRMODE/ALT_IRRX 17
10 34 R513 SIO1@10K_0402_5%
LPC_CLK_33 GPIO15
12 LDRQ1# GPIO16 35
LPC_DRQ#0 24 36 LPC_FRAME# 7 19
(18) LPC_DRQ#0 LPC_FRAME# LDRQ0# GPIO17 LPC_DRQ#0 LFRAME# INIT#

GPIO
(18,22,28) LPC_FRAME# 14 LFRAME# GPIO30 38 8 LDRQ# SLCTIN# 20
PM_CLKRUN# LPC_AD0

LPC I/F

LPC I/F
(18,26,31) PM_CLKRUN# 16 CLKRUN# GPIO31 39 2 LAD0 PD0 21
SERIRQ 19 40 LPC_AD1 4 23
(18,28,32) SERIRQ CLK_PCI_SIO SERIRQ GPIO32 LPC_AD2 LAD1 PD1
(18) CLK_PCI_SIO 21 PCI_CLK GPIO33 41 5 LAD2 PD2 24
NB_RST# 22 43 LPC_AD3 6 25
(14,18,23,28,31) NB_RST#

PARALLEL I/F
CLK_14M_SIO PCIRST# GPIO34 LAD3 PD3
(17) CLK_14M_SIO 23 SIO_14M GPIO35 44 PD4 26
1 2 SIO_PD# 25 46 NB_RST# 9 27
+3VS R336 1 SIOALL@210K_0402_5% SIO_PME# LPCPD# GPIO36 PCI_RESET# PD5
+3VS 47 IO_PME# GPIO37 61 PD6 28
R335 SIO1@ 10K_0402_5% SIO_PD# 10 29
LPCPD# PD7
SLCT 30
PM_CLKRUN# 11 31
CLKRUN# PE
BUSY 32
SERIRQ 13 33
RXD1 SER_IRQ ACK#
63 DLAD0 RXD1 52 ERROR# 34
TXD1 CLK_PCI_SIO
SERIAL I/F

1 DLAD1 TXD1 53 12 PCI_CLK ALF# 35

3 54 DSR#1 36
DLAD2 DRSR1# RTS#1 CLK_14M_SIO STROBE#
6 DLAD3 RTS1#/SYSOPT0 55 1 2 1 CLOCKI
CTS#1 R279 SIO1@10K_0402_5%
DLPC I/F

CTS1# 56
57 DTR#1 1 2 +3VS 1 2 BASE_ADDRESS 18 GPIO/SYSOPT1 37
DTR1#/SYSOPT1 RI#1 R280 SIO1@10K_0402_5% R242 @ 10K_0402_5% VSS
9 DLPC_CLK_33 RI1# 58 GROUND PAD
11 59 DCD#1 1 2
DLDRQ1# DCD1# R243 10K_0402_5% SIO1036-AEZG_QFN36
13 DLFRAME#
15 49 IRTXOUT SIO2@ Base I/O Address SIO2@
DCLKRUN# IRTX2 IRRX
18 DSER_IRQ IRRX2 50 1 2 * 0 = 004Eh
IRMODE R278 FIR@
IR

26 DSIO_14M IRMODE/IRRX3 51
10K_0402_5%
GND0
GND1
GND2
GND3
GND4
GND5

LPC47N207-JN_STQFP64
8
20
29
37
45
62

SIO1@

RTS#1
Base I/O Address
CLK_14M_SIO CLK_PCI_SIO * 0 = 02Eh
1 = 04Eh
2

R512 R268
@ 10_0402_5% @ 33_0402_5%
1

2 2
C583 C342 +IR_ANODE
@ 15P_0402_50V8J @ 22P_0402_50V8J
1 1
+3VS 1 FIR@ 2
R114 0_1206_5%
1 1 FIR@ 2
C210 R116 0_1206_5%
FIR@
4.7U_0805_10V4Z
FIR Module 2
W=60mil
Place on the BOT side(near MINIPCI conn.)
IR1
+5VS 1
JP11 +3VS +IR_3VS IRED_A IRTXOUT
2 IRED_C TXD 3 T = 12mil
RP38 IRRX 4 5 T = 12mil IRMODE
1 DCD#1 RXD SD/MODE
2 1 8 +3VS 1 FIR@ 2 +IR_3VS 6 VCC MODE 7
RXD1 RI#1 2 7 R147 W=40mil 8
TXD1 3 CTS#1 47_1206_5% GND
4 3 6 1 1
DSR#1 DSR#1 4 5 C253 C245 TFDU6102-TR3_8P
RTS#1 5 FIR@ FIR@
6 FIR@
CTS#1 4.7K_1206_8P4R_5% 10U_0805_10V4Z 0.1U_0402_16V4Z
DTR#1 7 SIO1@ 2 2
RI#1 8
DCD#1 9
10
ACES_85201-10051
@

For SW debug use when no seial port

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期一, 五月 08, 2006 Sheet 36 of 51
 A B C D E

+3VS +3VALW +3VALW +3VALW +3VALW +3VALW

Power ON Circuit R111

1
10K_0402_5%
D5 @
@ 1N4148_SOT23 U10A U10E U10F
SN74LVC14APWR_TSSOP14 SN74LVC14APWR_TSSOP14 SN74LVC14APWR_TSSOP14

14

14

14

14
R100 R112 R104

2
47K_0402_1% 100K_0402_1% 10_0402_5%

P
1 1
VLDT_EN 1 2 1
(28) VLDT_EN I O 2 3 I O 4 11 I O 10 13 I O 12 1 2 SB_PWROK (8,19)

G
+3V POWER +3V POWER +3V POWER +3V POWER
1 2

7
R105
R106 U10B C204
10K_0402_5% SN74LVC14APWR_TSSOP14 1U_0805_25V4Z 100K_0402_5% @
C203 2 1
1U_0603_10V4Z

R108
10_0402_5%
1 2 NB_PWROK (14)
+3VALW +3VALW

2006/02/22 Change R100 to 47K U10D

SN74LVC14APWR_TSSOP14

14

14
P

P
1 2 5 I O 6 9 I O 8 2 1

G
R109 R113
@ 10_0402_5% @ 180K_0402_5% note:T1 minimum 15ms,T2 minimum 33ms/maximum 500ms,

7
U10C
SN74LVC14APWR_TSSOP14 SUSP# goes to low after SB_PWRGD goes to low for power
down.
2 T1 2

VLDT_EN

NB_PWRGD

SB_PWRGD
T2
SUSP#

+1.8VS
TOP Side +3VALW
2 1
J3 JOPEN Power Button
2

2 1 R281
J4 JOPEN
Bottom Side 100K_0402_5%
1

D10
2 ON/OFF (28)
3 ON/OFFBTN# 3
(38) ON/OFFBTN# 1
3 51ON#
51ON# (42)
CHN202UPT_SC70

RD 11/2 Modify
1

2
C358 D11
1000P_0402_50V7K RLZ20A_LL34
1
2
1

D
EC_ON 2N7002_SOT23
(28) EC_ON 2
G Q17
R290 S
3

10K_0402_5%

4 4

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 11, 2006 Sheet 37 of 51
A B C D E
 MDC Conn.
JP3

1 GND1 RES0 2
AC_SDOUT 3 4 20mil
(19) AC_SDOUT IAC_SDATA_OUT RES1
5 GND2 3.3V 6 +3VALW
(19) AC_SYNC AC _SYNC 7 8
R357 1 IAC_SYNC GND3
(19) ACZ_SDIN1 2 33_0402_5% 9 IAC_SDATA_IN GND4 10
AC_RST# 11 12 AC_BITCLK
(19) AC_RST# IAC_RESET# IAC_BITCLK AC_BITCLK (19)
R538 LED5 1
300_0402_5% +3VALW C432
PWR_LED# 1 2 2 1 PWR_LED#

GND
GND
GND
GND
GND
GND
+5VS
3 1 22P_0402_50V8J
C3 2
HT-110UYG_1204 ACES_88018-124G

13
14
15
16
17
18
1U_0603_10V4Z

1
D 2
2N7002_SOT23
(28) PWR_LED 2 Connector for MDC Rev1.5
G Q1
S

3
R331 LED4
300_0402_5%
1 2 2 1 PWR_SUSP_LED# +5VALW
+5VALW PWR_SUSP_LED# (28)
3

HT-110UD_1204 1
C435
+ C436
0.1U_0402_16V4Z
To LED/B Conn. 2
150U_D2_6.3VM

R332 LED2
300_0402_5%
1 2 2 1 BATT_FULL_LED# +5VS
+5VALW BATT_FULL_LED# (28)
3 JP2
1 1 2 2 +5VALW
HT-110UYG_1204 PWR_LED# 3 4
3 4
(28) MEDIA_LED# 5 5 6 6
(28) CAPS_LED# 7 7 8 8
9 10 USB20_N4
+3VALW (28) NUM_LED# 9 10 USB20_N4 (19)
(28) E-MAIL_LED# 11 12 USB20_P4
11 12 USB20_P4 (19)
(37) ON/OFFBTN# 13 13 14 14
15 16 USB20_N6
(28) E-MAIL_BTN# 15 16 USB20_N6 (19)
1

Update Part Number to SCR36236000 R537 LED6 17 18 USB20_P6

(28) IE_BTN# 17 18 USB20_P6 (19)
R539 300_0402_5% 19 20
(28) USER_BTN# 19 20
100_0805_5% 1 2 2 1 BATT_CHGI_LED# 21 22
CIR@ CIR +5VALW
3
BATT_CHGI_LED# (28) (28) EMPWR_BTN#
23
21
23
22
24 24
USB_EN# (28,34)

(31) CVBS_IN 25 26
2

IR2 HT-110UD_1204 25 26
(31) S_YIN 27 27 28 28 AUDIO_INL (31)
3 4 RCIRRX 29 30

GND
GND
GND
GND
GND
GND
Vs OUT RCIRRX (28) (31) S_CIN 29 30 AUDIO_INR (31)
1 GND GND 2
1
C614 TSOP36236TR_4P 1 ACES_88018-304G

31
32
33
34
35
36
CIR@ CIR@ C615
4.7U_0805_10V4Z CIR@
2 1000P_0402_50V7K
2

+5VS +5VS
Bluetooth Conn.
+3VALW
1

R330 R329

1
300_0402_5% 300_0402_5% 1
C395
2

C634 BT@ +BT_VCC

0.1U_0402_16V4Z 1U_0603_10V4Z BT@
3
2

3
2

@ 2 L65 WCM2012F2S-900T04_0805 JP31

2
LED1 LED3 R564 USB20_P5 1
100K_0402_5%
(19) USB20_P5 1 2 2 1
HT-110NBQA_BULE_1204 HT-110UD_1204 2

3
S
BT@ USB20_P5_R
G
Q21 USB20_N5 USB20_N5_R 3
(28) BT_ON# 2 (19) USB20_N5 4 4 3 3 4
BT@
1

SI2301BDS_SOT23 5
(31) WLAN_BT_DATA 6
BT_ON_LED# WL_ON_LED#
BT_ON_LED# (28) WL_ON_LED# (28) D (31) WLAN_BT_CLK 7

1
8
W=40mils ACES_87212-0800
+BT_VCC
BT@
1
C399 C398
2006/02/27 Added
BT@ BT@
4.7U_0805_10V4Z 0.1U_0402_16V4Z
2

BT_SW WL_SW
5

2005/09/12
1 1
5

1 1

2 2 2 2

3 3 3 3

4 BTSW_EN# 4 WLSW_EN#
4 BTSW_EN# (28) 4 WLSW_EN# (28)
6

SW8 SW9
6

HSS110_4P HSS110_4P
Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/05/09 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期一, 五月 08, 2006 Sheet 38 of 51
 A B C D E F G H

+VDDA
28.7K for Module Design (VDDA = 4.702)

1
R309 +5VAMP (output = 250 mA)
10K_0402_5% 60mil U34
+5VS L19 1 2 4 VIN VOUT 5 40mil 30K_0402_1% +VDDA
KC FBM-L11-201209-221LMAT_0805

2
1U_0603_10V4Z 1 1 2 6 1 4.85V
L21 1 C390 C397 DELAY SENSE or ADJ R313
1 2 2
C387 KC FBM-L11-201209-221LMAT_0805 7 1 C388
ERROR CNOISE

1
10U_0805_10V4Z
R307 2 2 2
8 3 1

1
10K_0402_5% 10U_0805_10V4Z SD GND
1 SI9182DH-AD_MSOP8 1
R304

1
C378 1 2 1 2 0.1U_0402_16V4Z C396
(28) BEEP#

2
1U_0603_10V4Z C380 2
R303 560_0402_5% 1 2 MONO_IN R312
1 2 0.1U_0402_16V4Z 10K_0402_1%
1U_0603_10V4Z

2
1
47K_0402_5% C 1 2
C372 1 R299 Q20
(32) PCM_SPK# 2 1 2 2 R308
1U_0603_10V4Z B
R295 560_0402_5% E 2SC2411K_SC59 2.4K_0402_5%

3
1 2

47K_0402_5%
C376 1 R302
(19) SB_SPKR 2 1 2
1U_0603_10V4Z

1
R300 560_0402_5%
1 2 D12
R301 CH751H-40PT _SOD323
47K_0402_5% 10K_0402_5%

2
HD Audio Codec
+AVDD_AC97
20mil 0.1U_0402_16V4Z L50 1 2 +3VS
FBM-L11-160808-800LMT_0603
L18 1 2 0.1U_0402_16V4Z 40mil 1 1 1
+VDDA
FBM-L11-160808-800LMT_0603 1 1 1 C375 C373 C369
C389 C384
2 C381 10U_0805_10V4Z 2
10U_0805_10V4Z 2 2 2

25

38

9
2 2 2 U33
0.1U_0402_16V4Z 0.1U_0402_16V4Z

AVDD1

AVDD2

DVDD1

DVDD2
14 35 R606 1 2 0_0402_5% AMP_LEFT
LINE2_L FRONT_OUT_L AMP_LEFT (40)
15 36 R607 1 2 0_0402_5% AMP_RIGHT
LINE2_R FRONT_OUT_R AMP_RIGHT (40)
16 MIC2_L SURR_OUT_L 39

1
17 41 R608 R609
MIC2_R SURR_OUT_R 47K_0402_5% 47K_0402_5%
LINE_L 1 2 LINE_C_L 23 45 @ @
(40) LINE_L LINE1_L SIDESURR_OUT_L
C393 1U_0603_10V4Z

2
LINE_R 1 2 LINE_C_R 24 46
(40) LINE_R LINE1_R SIDESURR_OUT_R
R310 2 1 20K_0402_5% C394 1U_0603_10V4Z
(23) INT_CD_L
R311 2 1 6.8K_0402_5% CD_L_R 1 2 CD_L_RC 18 43 2006/02/27 Added
R320 6.8K_0402_5% C377 1U_0603_10V4Z CD_L CEN_OUT
2 1
R318 2 1 20K_0402_5% CD_R_R 1 2 C D_R_RC 20 44
(23) INT_CD_R CD_R LFE_OUT
C385 1U_0603_10V4Z
R314 2 1 20K_0402_5% CD_AGND_R 1 2 CD_AGND_RC19 C374 1 2 22P_0402_50V8J
(23) CD_AGND CD_GND
C379 1U_0603_10V4Z 6
BIT_CLK AZ_BITCLK (19)
MIC1_L 1 2 MIC1_C_L 21
(40) MIC1_L MIC1_L
1

C386 1U_0603_10V4Z
R316 R317 MIC1_R 1 2 MIC1_C_R 22 8 R297 1 2 33_0402_5% ACZ_SDIN0 (19)
(40) MIC1_R MIC1_R SDATA_IN
@ C392 1U_0603_10V4Z
0_0402_5% MONO_IN 12 37
PCBEEP PIN37_VREFO
2005/09/12
2

6.8K_0402_5% 29
3 LINE1_VREFO 3
(19) AZ_RST# 11 RESET#
LINE2_VREFO 31
(19) AZ_SYNC 10 SYNC 10mil
MIC1_VREFO_L 28 MIC1_VREFO_L
(19) AZ_SDOUT 5 SDATA_OUT
MIC1_VREFO_R 32 MIC1_VREFO_R
2 GPIO0
(40) NBA_PLUG 3 GPIO1 MIC2_VREFO 30
1
R319
2
0_0603_5%
13 SENSE A AC97_VREF
10mil
34 SENSE B VREF 27
1
(28) EAPD 47 SPDIFI/EAPD JDREF 40
1 2 C391

1
R324 0_0603_5% 48 33 10U_0805_10V4Z
(40) SPDIF SPDIFO VAUX R306 2
4 26 20K_0402_1%
DVSS1 AVSS1
1 2 7 DVSS2 AVSS2 42 @
R328 0_0603_5%
2

ALC883-LF_LQFP48

1 2
R565 0_0603_5% DGND AGND
1 2
R566 0_0603_5%

GND GNDA
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期一, 五月 08, 2006 Sheet 39 of 51
A B C D E F G H
 A B C D E

JP12
SPKL+ L20 1 2 FBM-11-160808-700T_0603 SPK_L+
SPKL- L22 FBM-11-160808-700T_0603 SPK_L- 1
1 2 2
+5VAMP SPKR+ L29 1 2 FBM-11-160808-700T_0603 SPK_R+
SPKR- L30 FBM-11-160808-700T_0603 SPK_R- 3
1 2 4

1
20mil ACES_85204-0400
R531 Speaker Conn.
10K_0402_5%
1 1

2
VOL_AMP +5VAMP
(0.65V -> 10dB ) W=40mil +5VAMP

1
R534 R532 1 1

1
@ +5VAMP
5.1K_0402_1% 1.5K_0402_1% C609 C613 R535
0.1U_0402_16V4Z 4.7U_0805_10V4Z 100K_0402_5% +5VAMP
1 2

1
2 2
D R536 R533

2
SPDIF_PLUG# 2 100K_0402_5% 100K_0402_5%

3
S
Q30 G 1 2 G
2N7002_SOT23 @ S U43 2 SPDIF_PLUG#
3

2
10 1 EC_MUTE NBA_PLUG
VDD MUTE EC_MUTE (28) (39) NBA_PLUG
15 2 Q31
VDD SHUTDOWN#

1
C608 2 D
1 0.1U_0402_16V4Z D SI2301BDS_SOT23
9 SPKL- 2 SPDIF_PLUG#

1
VOL_AMP LOUT- G Q32
7 VOLUME
16 SPKR- S 2N7002_SOT23

3
VOLMAX ROUT-
2
R530
1
0_0402_5%
8 VOLMAX SPKL+
+5VSPDIF 20mil
LOUT+ 11
NBA_PLUG 13 SE/BTL# SPKR+
(39) AMP_LEFT 1 2 ROUT+ 14
C610 1U_0603_10V4Z AMP_LEFT_C 6
AMP_RIGHT_C LIN-
(39) AMP_RIGHT 1 2 3 RIN-
C612 1U_0603_10V4Z 5
BYPASS GND
4 BYPASS GND 12
20mil
1 APA2068KAI-TRL_SOP16

C611
4.7U_0805_10V4Z
2 2 2
2 2
C400 C401

330P_0402_50V7K
S/PDIF Out JACK
330P_0402_50V7K
1 1

JP32
1
SPKL+ 2 HPOUT_L_1 HPOUT_L_2 HPOUT_L_3

+
1 1 2 1 2 2
C383 150U_D_6.3VM R321 47_0603_5% L27 FBM-11-160808-700T_0603 6
SPKR+ 2 HPOUT_R_1 HPOUT_R_2 HPOUT_R_3

+
1 1 2 1 2 3
C382 150U_D_6.3VM R322 47_0603_5% L28 FBM-11-160808-700T_0603
+5VAMP 2 1 SPDIF_PLUG# 5
R323 100K_0402_5%
L51 FBM-L11-160808-800LMT_0603 4
SPDIF1 2 7
(39) SPDIF
+5VSPDIF 8
1 10

C306 9
@ 220P_0402_50V7K
2 ACES_20234-0101

01/03 Added
LINE-IN JACK
JP33
5

4
3 L26 FBM-11-160808-700T_0603 3
LINE_R 1 2 LINE_R_R 3
(39) LINE_R
6
LINE_L 1 2 LINE_L_R 2
(39) LINE_L
L25 FBM-11-160808-700T_0603 1
1 1
SUYIN_010164FR006G118ZL
C402 C403
220P_0402_50V7K 220P_0402_50V7K
2 2

MIC1_VREFO_L MIC1_VREFO_R
MIC JACK
1

1
JP34
Int MIC Conn. R326 R327
5

2.2K_0402_5% 2.2K_0402_5% 4
2005/09/06
2

2
JP13 15mil 1 2 FBM-11-160808-700T_0603 MIC1_R_1 3
(39) MIC1_R
1 2 INT_MIC_L L24 6
1 R325 MIC1_L_1
2 (39) MIC1_L 1 2 FBM-11-160808-700T_0603 2
0_0402_5% L23 1
ACES_85204-0200 1 1
SUYIN_010164FR006G118ZL
C404 C405
220P_0402_50V7K 220P_0402_50V7K
4 2 2 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/06/20 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期一, 五月 08, 2006 Sheet 40 of 51
A B C D E
 A B C D E

+1.8VALW TO +1.8V
+3VALW TO +3VS
+1.8V
+3VS

1 1 1 1
+3VALW C559 C562 C121 C122

U41 10U_0805_10V4Z 1U_0805_25V4Z +1.8VALW 1U_0805_25V4Z 10U_0805_10V4Z

2 2 2 2
8 D S 1
1 7 2 R508 U3 1
D S 100K_0402_5%
6 D S 3 8 D S 1
5 4 2 1 5VS_GATE 1 2 +VSB 7 2 R289
D G R562 20K_0402_5% D S 100K_0402_5%
6 D S 3
SI4800BDY_SO8 5 4 SYSON_ALW 1 2 +VSB
D G

1
1 1 SI4856ADY-T1-E3_SO8
2

1
C560 R500 D C119 R288 D
C570 @ 1M_0402_1% 2 SUSP C359 @ 1M_0402_1% 2 SYSON#
10U_0805_10V4Z 0.1U_0603_25V7K G 10U_0805_10V4Z 0.1U_0603_25V7K G
1

1
2 S Q29 2 S Q18

3
2N7002_SOT23 2N7002_SOT23

+3VS +1.8VS +5VS

12/30 Change U3 to SI4856ADY

2
R224 R270 R181
470_0402_5% 470_0402_5% 470_0402_5%

1
1

1
D D D

+5VALW TO +5VS 2 SUSP 2 SUSP 2 SUSP

G G G
S Q14 S Q15 S Q10
+1.8VALW TO +1.8VS

3
2 2N7002_SOT23 2N7002_SOT23 2N7002_SOT23 2
+1.8VALW +5VALW +5VS
U7
U37 8 1
D S
8 D S 1 +1.8VS 7 D S 2
7 D S 2 6 D S 3 1 1
6 3 5 4 C166 C165
D S D G +5VALW
5 D G 4 1 1
C447 C446 1 SI4800BDY_SO8 4.7U_0805_10V4Z 1U_0805_25V4Z
SI4800BDY_SO8 2 2

2
1 4.7U_0805_10V4Z 1U_0805_25V4Z C143
2 2 4.7U_0805_10V4Z +1.8V R167
C443 2 10K_0402_5%
4.7U_0805_10V4Z

2
2 5VS_GATE

1
R26 SUSP
470_0402_5% (46) SUSP

2
1 2 R563 5VS_GATE
60.4K_0402_1% 12/30 Change R563 to 60.4K C658

1
0.1U_0603_25V7K D

1
2

(28,30,34) SUSP# 2

1
C632 D G

1
0.1U_0603_25V7K 2 SYSON# Q12 S
1

3
G
S Q6 R586 2N7002_SOT23

3
2006/2/22 Add C658 0.1uF 2N7002_SOT23 100K_0402_5%

2
2006/4/13 modify package for lead-free part
3 3

12/22 Added +5VALW

Near PU8 Near PU12

2
R31
+0.9V +2.5VS +1.5VS 10K_0402_5%

1
2

2
SYSON#
(46) SYSON#
R604 R587 R588
470_0402_5% @ 470_0402_5% 470_0402_5%

1
D
SYSON 2
(28,34) SYSON
1

1
G

1
Q5 S

3
1

1
D D D
2 SYSON# 2 SUSP 2 SUSP R589 2N7002_SOT23
G G G 100K_0402_5%
S Q36 S Q34 S Q35
3

2
2N7002_SOT23 @ 2N7002_SOT23 2N7002_SOT23

4 4

12/22 Change Q5,Q12 to 2N7002

Security Classification Compal Secret Data Compal Electronics. inc.

Issued Date 2005/05/09 Deciphered Date 2006/03/08 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS B 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 11, 2006 Sheet 41 of 51
A B C D E
 A B C D

PJP1
SINGA_2DC-G756-I06 PL1
ADPIN VIN
FBMA-L18-453215-900LMA90T_1812
1 1 2

1
PR1
G 2 10_1206_5%

12P_0402_50V8J
560P_0402_50V7K
G

12P_0402_50V8J

560P_0402_50V7K
1 3 PR2 1

1 2
1

1
PC1
1K_1206_5%

PC2

PC3

PC4
1 2
PD1 PQ1

2
RLZ24B_LL34 TP0610K_SOT23
PR3
VIN PD2 1K_1206_5%
B+

2
2 1 1 2 3 1

RLS4148_LLDS2 PR4
1K_1206_5%
1 2

100K_0402_5%

100K_0402_5%
1

1
PR5
PR7

PR6
1K_1206_5%

2
1 2

2
VIN

1
PD3
PR8

1
PD4 100K_0402_5%
RB751V-40TE17_SOD323-2 RLS4148_LLDS2 PQ2

1 1
2 1 DTC115EUA_SC70

1 2
BATT+
2 PR9 (28,44) ACOFF 2 2

PQ4 33_1206_5% VS
TP0610K_SOT23
PQ3
2 2 DTC115EUA_SC70

3
CHGRTCP 3 1
0.22U_1206_25V7K
1

3
1

PR10
PC5

100K_0402_5% PC6
0.1U_0603_25V7K
2

PR11
B+
2

22K_0402_5% PR12
(37) 51ON# 1 2 VL 2.2M_0402_5%
2 1

1
VS PR13
499K_0402_1%

1
1

PR14

2
RTCVREF PR15 100K_0402_1%
PU1 200_0805_5% PU2A
3.3V G920AT24U_SOT89 LM393DR_SO8

8
(8,43,45) MAINPWON PD5
2

PR16 PR17 2 3

P
3 3
+
1 2 1 2 3 OUT IN 2 1 1 O

0.01U_0402_25V7K
+CHGRTC (44) ACON 3 2
-
1

1
4.7U_0805_6.3V6K

560_0603_5% 560_0603_5%
1

1
GND
PC8

PC9
32.3
1000P_0402_50V7K
PC7 RB715F_SOT323 PR18

4
1

1
1U_0805_25V4Z 191K_0402_1%
2

PC11
PC10 PR19
2

2
0.1U_0603_25V7K

PRG++ 2

2
499K_0402_1%

ACIN PQ5
PR20 2N7002W T/R7 1N SOT-323 PR21
Precharge detector

1
34K_0402_1% D 47K_0402_5%
Min. typ. Max. RTCVREF 2 1
G
2 2 1
PACIN (44,45)

1
H-->L 14.589V 14.84V 15.243V S

3
1
PQ6
L-->H 15.562V 15.97V 16.388V @ PR22 DTC115EUA_SC70
66.5K_0402_1% 2 +5VALW
BATT ONLY

2
Precharge detector

3
Min. typ. Max.
4
H-->L 6.138V 6.214V 6.359V 4

L-->H 7.196V 7.349V 7.505V

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/0926 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期四, 五月 11, 2006 Sheet 42 of 51
A B C D
 A B C D

B+

FBMA-L11-322513-151LMA50T_1210
2
PL2

PD6
CHP202UPT_SOT323-3
PC12 PC13
1

0.1U_0603_25V7K 0.1U_0603_25V7K

2
1 2 BST5B BST3B 1 2

1 B+++ 1

30.6
2200P_0402_50V7K

PQ7 VL

4.7U_1206_25V6K
8 1

1
G2 D2
7 D1/S2/K D2 2
1

2
PC15

6 3 DL5
D1/S2/K G1
PC14

5 4 PR23 B+++
D1/S2/K S1/A

47_0402_5%
0_0603_5% B+++ PQ8
2

1
4.7_1206_5%

4.7_1206_5%

2200P_0402_50V7K
AO4916_SO8 1 8
D2 G2

4.7U_1206_25V6K
PR24
PR27 PC16 2 7

1
D2 D1/S2/K

PR25

PR26
0_0603_5% 0.1U_0603_25V7K 3 6

2
G1 D1/S2/K

1
5HG 1 2 DH5 4 5

1
S1/A D1/S2/K

PC17

PC18
@

1 2

2
AO4916_SO8

2
2
1U_1206_25V7K
PC19

0.1U_0603_25V7K
LX5
VL PR28

2
0_0603_5%
2VREF_1999

4.7U_0805_10V4Z

1 PC22

100K_0402_1%
3HG

1
1U_0805_16V7K

100K_0402_1%
1

2
PC20
1

PR29

PR30
BST3A

PC21
LX3

2
PR31

2
0_0603_5%

2 1

2 1
2

499K_0402_1%
18

20

13

17

10UH_SIL104R-100PF_4.4A_30%
499K_0402_1%
PL3

PR32

PR33
10UH_SIL104R-100PF_4.4A_30% BST5A 14

V+
LD05

TON

VCC

1
BST5
2
ILIM3 5 2

16 DL3
DH5
+5VALWP
1

2
15 LX5
19 DL5 ILIM5 11

PL4
21 OUT5
9 PU3 28
FB5 BST3
10.2K_0402_1%

1 26 DH3
N.C.MAX8734AEEI+_QSOP28 DH3
2

24

1
DL3
PR34

6 SHDN# LX3 27
VS 4 22
1 ON5 OUT3
@ 1 2 3 ON3
150U_D_6.3VM

+ PR35 7
1

FB3
PC23

0_0402_5% 12 2 +3VALWP
SKIP# PGOOD
2 2VREF_19998

PRO#

3.57K_0402_1%
LDO3
PZD1 PR37

GND
REF
2

2
0_0402_5%

RLZ5.1B_LL34 47K_0402_5% PR38

PR36

@ PR39
1 2 1 2 1 2

23

25

10
2

0.047U_0603_16V7K

0.22U_0603_16V7K
100K_0402_5%

0_0402_5% 1

150U_D_6.3VM
PR40

PC24

4.7U_0805_10V4Z
1

1
1

PC26

PC25
+
2

2
PC27
(45) SPOK
1

2
2

PR42
0_0402_5%
PR41
0_0402_5%

2
PR43

1
1 2
3 3

47K_0402_5%
1

PC28
0.047U_0603_16V7K
+3.3V Iocp = 5.36A ~ 9.03A
2

Ipeak=4.5A
+5V Iocp = 5.35A ~ 8.65A
Ipeak=4.5A Imax=3.5A
Imax=3.5A
MAINPWON (8,42,45)
1

PC29
1U_0603_16V6K
2

4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/09/26 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期四, 五月 11, 2006 Sheet 43 of 51
A B C D
 A B C D E

Charger
Iadp=0~3.25A(65W)

P2
PQ9 PQ10 PR44 B+ PL5 CHG_B+ PQ11
AO4407_SO8 AO4407_SO8 P3 0.02_2512_1% AO4407_SO8
FBMA-L18-453215-900LMA90T_1812
VIN 8
7
1
2
1
2
8
7
1 4 1 2 1
2
8
7

2200P_0402_50V7K
0.1U_0603_25V7K
6 3 3 6 2 3 3 6

4.7U_1206_25V6K

4.7U_1206_25V6K
5 5 5

1
1 1

PC30

PC31

PC32

PC33
4

4
PR45

2
1

1
PC34 PC35 47K_0402_1%

1
0.1U_0603_25V7K 0.1U_0603_25V7K 1 2
PR46 VIN

2
1

10K_0402_1%
0.1U_0603_25V7K

SI4810BDY-T1-E3_SO8
200K_0402_1%

2
PR47

5
6
7
8
47K_0402_5%

2
1

PR48
D
D
D
D
3

PC36
1SS355_SOD323 CSSN
2

PQ12
PQ13 CSSP
PD9
2

1
47K
DTA144EUA_SC70 ACOFF#

G
S
S
S
2 47K VIN 2 1

4
3
2
1

1
(45) 6C/8C#

2
G
PC37 PQ15 PQ14
0.1U_0603_25V7K SI2301BDS_SOT23 DTC115EUA_SC70

SI4810BDY-T1-E3_SO8
3 1
1

2
1

D
ACOFF

S
1 DCIN 2 ACOFF (28,42)

5
6
7
8
CSSP 27
PC38 0_0402_5%

D
D
D
D

1
1U_0603_10V6K @ PR49 29

2
TP

PQ17
2 PQ16 2 1 17 @ PC39

3
DTC115EUA_SC70 PR50 CELLS 1000P_0402_50V7K
26

2
CSSN

G
S
S
S
10K_0402_0.1%
2 1 4

4
3
2
1
REF
150K_0402_5%

25 charger_DHI PR52
3

DHI
1

3 0.015_2512_1%
CLS
PR51

1908LDO BATT+
1

D
0.1U_0402_16V7K

23 charger_LX 1 2 1 4
LX
1
64.9K_0402_0.1%

2 PQ18 2 1 2 1 12 REFIN
1
PC40

2 G 2N7002W T/R7 1N SOT-323 PU4 2

2 3
2

10U_LF919AS-100M-P3_4.5A_20%
PR55

S PR53 PR54 MAX1908ETI+T_QFN28 21 charger_DLO

3

DLO

4.7U_1206_25V6K

4.7U_1206_25V6K

4.7U_1206_25V6K
PL6
9.31K_0402_1% 15K_0402_1% PR56 PC41
2

15 0_0402_5% 0.1U_0603_25V7K
2

1
VCTL

1
PC42

PC43

PC44
13 24 charger_BST 1 2
ICTL BST

1
11

2
ACOK#

0.01U_0402_25V7K
8 22 charger_DLOV PD10
SHDN# DLOV
1

D PR58 PR57
10 ACIN 1SS355_SOD323
2 PQ19 24.9K_0402_1% 9 2 2 1
ICHG LDO

1
PC45
G 2N7002W T/R7 1N SOT-323 2 1

2
S (28) IREF 28 33_1206_5%
3

IINP 1908LDO
7

2
CCV
CSIP 19
1

2
PGND
PD11 18 PC46

GND
CCS
CSIN

CCI
RLS4148_LLDS2 PR59 16 1U_0603_10V6K
BATT

2
ACOFF# 1 2 100K_0402_1%

1
10K_0402_1%
PC47

14

20
2
1U_0805_25V4Z
2

1
PR60
PR61 MAX1908-CCS
22K_0402_5%

0.01U_0402_25V7K

0.01U_0402_25V7K
(42,45) PACIN 1 2

1
CSIP

2
0.1U_0402_16V7K

PC48

PC49
1
PC50

1
CSIN
(42) ACON

2
3 BATT+ 3

CP Point: PR62
0_0402_5%
Charge voltage
Iinput=(64.9K/74.9K)*(75/20)=3.249A (28) FSTCHG
1 2
BATT+
VS 4S CC-CV MODE : 16.8V
2

1
10K_0402_5%

1
PR64

PR65

0.01U_0402_25V7K
PR63 PC51 845K_0603_1%
100K_0402_5% 0.1U_0402_16V7K
2

LI-4S:17.8V---BATT-OVP=1.9785
1

2
1

PC52
+3VALW
BATT-OVP=0.111*BATT+

1
2
PR66

1
300K_0603_0.1%
IREF=0.832*Icharge PR68 PR67

8
PU5A 511K_0402_1% 10K_0402_5%

2
IREF=0.73~3.3V 3 1 2

P
+
1

2
0
VS (28) BATT_OVP - 2 PQ20

1
D 2N7002W T/R7 1N SOT-323

1
PU5B LM358ADR_SO8 2

1
LM358ADR_SO8 PR69 PC53 G
2P4S:4800mAH/cell
8

200K_0402_1% 0.01U_0402_25V7K S PQ21

1
D 2N7002W T/R7 1N SOT-323
0.8C=3.84A 5
P

2
+
7 2 6C/8C# (45)

2
0 G
- 6
G

3
4 4
4

OVP voltage :
LI-3S :17.8V----BATT-OVP=1.9758V
BATT-OVP=0.111*BATT+ Security Classification Compal Secret Data Compal Electronics, Inc.
Issued Date 2005/05/09 Deciphered Date 2006/09/26 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期四, 五月 11, 2006 Sheet 44 of 51
A B C D E
 A B C D

PR70
100K_0402_5%
1 2
PH1 under CPU botten side :
+3VALWP
BATT+ BATT++ CPU thermal protection at 90 degree C
PR71
PL7 1K_0402_5%
Recovery at 70 degree C

BATT+
2 1
FBMA-L18-453215-900LMA90T_1812 6C/8C# (44)
1 2 BATT++
1
VL 1

2
VS VL
1

1
PC54 @PR72
0.01U_0402_25V7K PC55 1K_0402_5%

2
1000P_0402_50V7K
2

1
PR75 PC56 PR76 PR73

1
1K_0402_5% 0.1U_0603_25V7K 442K_0603_1% 150K_0402_1%
1 2 BATT_TEMP PR74 1 2

2
BATT_TEMP (28) 9.76K_0402_1%

1
2
PR77

8
82.5K_0603_1%
PR78 1 2 5

P
7 1K_0402_5% + MAINPWON (8,42,43)
PJP2 battery connector 6 O 7

100K_0603_1%_TH11-4H104FT
2 1 TM_REF1 6
5 -

G
PU2B
4

1
SM ART PR79 LM393DR_SO8

4
3 6.49K_0402_1%
Batter y: 2

PH1
1 1 2 +3VALWP
1 .GND

1U_0805_16V7K
2. SMC

2
1

1
SUYIN_200275MR007G161ZL

PC58
PC57 PR80
PJP2 PR81 1000P_0402_50V7K 150K_0402_1%
3.SMD 100_0402_5% 2 1 VL

2
4.TS 1 2 EC_SMB_DA1 (28,30)
5 . B/I
6. ID

1
2 7 .BA TT+ PR83 PR82 2

100_0402_5% 150K_0402_1%
1 2 EC_SMB_CK1 (28,30)

2
Vin Detector
Min. typ. Max.
PQ22 H-->L 16.976V 17.257V 17.728V
TP0610K_SOT23
L-->H 17.430V 17.901V 18.384V
B+ 3 1 +VSBP PR84
1M_0402_1%
1 2
1

1
PR85 VIN VIN
100K_0402_5% PC59 PC60
0.22U_1206_25V7K 0.1U_0603_25V7K PR87
2

1
PR88 10K_0402_5% PR89
2

22K_0402_5% PR86 VS 10K_0402_5%

VL 1 2 84.5K_0402_1% 1 2 AC IN
ACIN (19,28)
PR91

2
2

8
22K_0402_5% PU6A
PR90 1 2 3

P
3 3

100K_0402_5% + PACIN
O 1 PACIN (42,44)

20K_0402_1%
2 -

G
PR93
1

1
D

PR92
0_0402_5% PC61 LM393DR_SO8

4
1 2 2 PQ23 1000P_0402_50V7K PC62 PZD2 PR94
(43) SPOK G 2N7002W T/R7 1N SOT-323 0.1U_0603_25V7K RLZ4.3B_LL34 10K_0402_5%

2
S
3

2
1

2
@ PC63
0.1U_0402_16V7K PR95
2

10K_0402_5%
2 1 RTCVREF

8
PU6B
5

P
+
O 7
6 -

G
LM393DR_SO8

4
4 4

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/09/26 Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
SCHEMATIC, M/B LA-3121P
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
B D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期四, 五月 11, 2006 Sheet 45 of 51
A B C D
 5 4 3 2 1

+3VALW

1
PJP3

1
JUMP_43X79
+1.8VALW

22
1

2
4.7U_1206_25V6K
PJP4

PC64
D JUMP_43X79 D

+5VALW

1
2
RTCVREF
+1.8V

2
PU8
PU7 CM8562IS_PSOP8
1 6
VIN VCNTL +3VALW 1 8
VIN PGND
2 GND NC 5

1
1

2
1U_0603_16V6K
PC65 3 7 PC66 2 7
VREF NC +2.5VSP VFB AGND

PC67
10U_1206_25VAK 1U_0603_6.3V6M

2
PR96 4 8

1
1K_0402_1% VOUT NC
3 VTT VCCA 6

10_0603_1%
9

2
TP

AGND
4 VTT REFEN 5

PR97
APL5331KAC-TRL_SO8 2 1

1K_0402_1%

0.1U_0402_16V7K
@ PR162 PC68

9
+0.9VP
1

2
D

0.047U_0402_16V7K
0_0402_5% 2N7002W T/R7 1N SOT-323 22U_1206_10V6M PR98

2
1

200K_0402_1%
PQ24

PR99

PC69
1 2 2 60.4K_0402_1%

1
0.1U_0603_25V7K

PC71
(41) SYSON# G

PR100
S @ PC70
3

PC72
22U_1206_10V6M
2

2
PQ25

1
D 2N7002W T/R7 1N SOT-323
2 1 2
G SUSP (41)
C S PR163 C

3
0_0402_5%

PJP5 PJP6
+1.8VALW
2 1 2 1
+3VALWP 2 1
+3VALW +1.8VALWP 2 1
+1.8VALW
JUMP_43X113 JUMP_43X113

1
PJP13

1
JUMP_43X79
PJP7 PJP8

2
2 1 2 1
+5VALWP 2 1
+5VALW +2.5VSP 2 1
+2.5VS

2
JUMP_43X113 JUMP_43X113

2
4.7U_1206_25V6K
PC123

1
PJP10 PJP11
+5VALW
2 1 2 1 RTCVREF
+1.2VP_HT 2 1
+1.2V_HT +1.5VSP 2 1
+1.5VS PU12
CM8562IS_PSOP8
JUMP_43X113 JUMP_43X113
1 VIN PGND 8
B PJP12 PJP14 B
2 1 2 1 2 7
+0.9VP 2 1
+0.9V +VSBP 2 1
+VSB VFB AGND

2
1U_0603_16V6K
+1.5VSP

PC124
JUMP_43X113 JUMP_43X113
3 6

1
VTT VCCA

AGND
10_0603_1%
1
4 VTT REFEN 5

PR164
2 1

9
PC125

0.047U_0402_16V7K
22U_1206_10V6M PR165

51K_0402_1%
60.4K_0402_1%

1
0.1U_0603_25V7K

PC126
1

PR166
PC127
1

2
PQ40

1
D 2N7002W T/R7 1N SOT-323
2 1 2
G SUSP (41)
S PR167

3
0_0402_5%

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/09/26 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星 薔|, 五月 11, 2006 Sheet 46 of 51
5 4 3 2 1
 5 4 3 2 1

PL8
FBMA-L11-322513-151LMA50T_1210
ISL6227B+ 1 2 B+

2200P_0402_25V7K
D D

1
10U_1206_25VAK

10U_1206_25VAK

10U_1206_25VAK

2200P_0402_25V7K
1

10U_1206_25VAK
1

1
PC78

PC79

PC80

PC81
PR104

PC82

PC83
51_1206_5%

2
+5VALW

1
PC84

2
4.7U_0805_6.3V6K

1
PR105 PC86

2
PC85 2.2_0603_5% 2.2U_0805_10V6K
PD12 0.1U_0603_25V7K

2
DAP202U_SOT323

1
2

3
8
7
6
5
PQ27
SI4800BDY-T1-E3_SO8 BST_1.8VP

D
D
D
D

BST_1.2VSP
PC87 PC88

14

28
G
S
S
S
0.01U_0402_25V7K 0.01U_0402_25V7K
+1.2VP_HT

8
7
6
5
PL9 2 1 12 17 2 1

VIN

VCC
1
2
3
4
1.8UH_SIL104R-1R8PF_9.5A_30% SOFT1 SOFT2 PQ28

D
D
D
D
1 2 PC89 PR106 PR107 PC90 SI4800BDY-T1-E3_SO8
0.1U_0402_16V7K 0_0603_5% 0_0603_5% 0.1U_0402_16V7K
C 1 2 1 1 2BST_1.2VSP-1
6 BOOT1 BOOT2 23 BST_1.8VP-1
1 2 2 1 C

8
7
6
5

G
S
S
S
PC91 +

D
D
D
D

1
2
3
4
220U_D2_4VM_R15 PQ29
2
SI4810BDY-T1-E3_SO8 DH_1.2VSP 5
UGATE1 UGATE2 24 DH_1.8VP PL10
1.8UH_SIL104R-1R8PF_9.5A_30%
+1.8VALWP
G
S
S
S LX_1.2VSP LX_1.8VP
4 PHASE1 PHASE2 25 1 2
0.01U_0402_25V7K
3.48K_0402_1%

1
1
2
3
4
1

PR110 PR111
1

5
6
7
8
PR108

PC93

1.27K_0402_1% PU10 1.5K_0402_1% PQ30 + PC92

PR109 1 2 ISE_1.2VSP 7 ISL6227CAZ-T_SSOP28 22 ISE_1.8VP 1 2 SI4810BDY-T1-E3_SO8 220U_D2_4VM_R15

D
D
D
D
ISEN1 ISEN2

0_0402_5%
0_0402_5%
2

1
2

PR112
DL_1.2VSP 2 27 DL_1.8V PC94
2

LGATE1 LGATE2 0.01U_0402_25V7K

2

1
S
S
S

2
4
3
2
1
3 26 PR113

2
PGND1 PGND2 10.2K_0402_1%

2
9 VOUT1 VOUT2 20
VSE_1.2VSP 10 19 VSE_1.8VP
VSEN1 VSEN2
10K_0402_1%

1 2 8 21 1 PR115 2 +3VALW
(28) VLDT_EN_P EN1 EN2
1
PR116

PR114 10K_0402_1% 15 16
PG1 PG2/REF

1
0.1U_0402_16V7K
@ 10K_0402_1%

GND

DDR

1
PC95
11 OCSET1 OCSET2 18
1

0.1U_0402_16V7K

@ PR118 PR117

1
@ PR119
0_0402_5%

PC96

1 2 0_0402_5% 10K_0402_1%
+5VALW
2

13

2
1

1
PR120

2
PR121 56.2K_0402_1% PR168

2
B 56.2K_0402_1% 10K_0402_5% B
2

2
2

Ipeak=8.5A, Imax=6A
Iocpmin=8.76A
Ipeak=6.47A, Imax=6.47*0.7=4.53A
Iocpmax=13.46A
Iocpmin=7.79A
Iocpmax=11.83A

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/09/26 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期四, 五月 11, 2006 Sheet 47 of 51
5 4 3 2 1
 5 4 3 2 1

B+
CPU_B+
+5VS
PL11

PR122 10_0402_5%
FBMA-L18-453215-900LMA90T_1812
+3VS
1 2

0.01U_0402_25V7K
4.7U_1206_25V6K

4.7U_1206_25V6K

2200P_0402_50V7K
1

100U_25V_M
1

1
PC99

PC100

PC101
+

PC97

PC98
2

2
D D

2
1
2

2.2U_0603_6.3V6K
10K_0402_5%
@ PR123

2
PC102

0.01U_0402_25V7K
2

2
PC103

5
0.22U_0603_16V7K
PC104
2.2U_0603_10V6K
PQ31

1
SI7840DP-T1-E3_SO8

PC105
MAX8774_VCC
19 25
VCC VDD

2
2 1 31 5 PR126 4
(8) VID0 PR124 0_0402_5% D0 THRM 0_0603_5%
2 1 32 30 1 2 PR128
(8) VID1 D1 BST1
PR125 0_0402_5% 0_0603_5% +CPU_CORE
2 1 33 29 DH1 1 2 PL12

3
2
1
(8) VID2 PR127 0_0402_5% D2 PU11 DH1 0.36UH_PCMC104T-R36MN1R17_30A_20%
2 1 34 28 LX1 1 2
(8) VID3 D3 MAX8774GTL+_TQFN40
LX1

SKS30-04AT_TSMA
1000P_0603_50V7K 3.3_1206_5%
PR129 0_0402_5%

PR131
2 1 35 26 DL1
(8) VID4 D4 DL1

5
6
7
8

D 5
D 6
D 7
D 8

1
FDS6676AS_SO8

FDS6676AS_SO8

4.22K_0402_1%
4700P_0402_25V7K
PR130 0_0402_5%

PD13
2 1 36 27

D
D
D
D
(8) VID5 D5 PGND1

1
PR134
PQ33
PR132 0_0402_5% J1 SHORT PADS

1 1
1
PC106

PQ32
1 2 1 2 1 16
(28) VGATE PR133 0_0402_5% For EC ATE
PWRGD CSP1

2
G

4 G
S
S
S

3 S
2 S
1 S

PC107
+3VS 1 2 17 15

2
PR135 100K_0402_1% PHASEGD CSN1 @ PR136 PH2

4
3
2
1

1
PR138 MAX8774_VCC 37 18 AGND 2.1K_0402_1% 10KB_0603_5%_ERTJ1VR103J
C 0_0402_5% TWO-PH GND PR137 C
1 2 1 2

2
28) VR_ON 1 2 38 40 PR141 PC108 10_0402_5%
@ PR139 PR140 71.5K_0402_1% SHDN# IC 2K_0603_1% 4700P_0402_25V7K

PR142
100_0402_1%
1 2 2 1 6 11 FB 1 2 1 2 1 2

2
PC110 TIME FB PR143 20K_0402_1%
100K_0402_5% 2 1 8 9 1 2 1 2 PR144 0_0402_5% PC109
PR145 10K_0402_1% CCV CCI PC111 470P_0402_50V8J 0.22U_0603_16V7K
1 2
(28) POUT 1 2 150P_0402_50V8J 3 20
POUT BST2 PR146
1 2 1 2 MAX8774_REF 10 21 DH2 0_0402_5%
PC112 PR147 PC113 0.1U_0603_16V7K REF DH2
1 2
0.1U_0402_16V7K CPU_B+ 1 2 7 22 LX2
200K_0402_1% TON LX2
MAX8774_REF1 2 2 24 DL2
PR148 OFS DL2
31.6K_0402_1% PR150 4 23
VRHOT# PGND2
1

2N7002W T/R7 1N SOT-323

0_0402_5%
PR149 2 1 39 13 CSP2
169K_0603_1% SKIP# CSP2

2
CPU_B+

0_0603_5%
CSN2 14
GNDS

PR151
PQ34
1 2

EP

4.7U_1206_25V6K

4.7U_1206_25V6K

0.01U_0402_25V7K
2200P_0402_50V7K
2 (8) CPU_VCC_SENSE
+3VS
41

12

1
G PQ35

PC117
S SI7840DP-T1-E3_SO8
3

PC114

PC115

PC116
2

2
1

0.22U_0603_16V7K
4
1

1
B PR152 PC118 PR153 B

PC119
PR154 200K_0402_1% 4700P_0603_50V7K 100_0402_1%
2

200K_0402_1% PR155

2
0_0603_5%
2

3
2
1
1 2
2

PL13
1

D 0.36UH_PCMC104T-R36MN1R17_30A_20%
2 PQ36 1 2

3.3_1206_5%
G 2N7002W T/R7 1N SOT-323

FDS6676AS_SO8

FDS6676AS_SO8
S
3
1

D 5
D 6
D 7
D 8

D 5
D 6
D 7
D 8

2
SKS30-04AT_TSMA
PR156

1
PR157
1

PD14
PQ38

PQ39
4.22K_0402_1%
PR158
(8) PSI# 2 10_0402_5% PH3

1
G

1
S
S
S

S
S
S

1000P_0603_50V7K
PR159 10KB_0603_5%_ERTJ1VR103J

2
PC120
2.1K_0402_1%
2

4
3
2
1

4
3
2
1
@ PC121 1 2 1 2

2
PQ37 4700P_0402_25V7K
FDV301N_NL 1N SOT23-3
3

1 2 PC122
(8) CPU_VSS_SENSE 0.22U_0603_16V7K
1 2

CSP2

PR160
A 1 2 A

0_0402_5%

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/09/26 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number Rev
Custom D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
401411
Date: 星期四, 五月 11, 2006 Sheet 48 of 51
5 4 3 2 1
 5 4 3 2 1

Version change list (P.I.R. List) Page 1 of 1

for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List VER Phase

D Schematic update. Because schematic update, we don't need this two parts. Delete PQ24 SB000005M10. D

1 0.1 46 0.1 EVT

2 Schematic update. Because schematic update, we don't need this two parts.
0.1 46 Delete PR162 SD028000080. 0.1 EVT

3 BOM error BOM error 0.1 44 Change PQ15 from SB923010010 to SB923010020. 0.1 EVT

4 BOM error BOM error 0.1 48 Change PQ37 from SB503010004 to SB503010010 0.1 EVT
Because we need to reduce MOSFET teperature of
5 MOSFET thermal issue high side mos. 0.1 48
Change PQ31 and PQ35 from SB562940000 to SB578400080.
0.1 EVT
Change PL1,PL5,PL7 and PL11 form SM010018210 to

6 BOM error BOM error

0.1
42
SM010020720. 0.1
EVT

7
C C

BOM error BOM error 0.1 47 Change PR121 from SD000001500 to SD000001580. 0.1 EVT

8 BOM error BOM error 0.1 48 Change PR149 from SD014169300 to SD014169380. 0.1 EVT

9 BOM error BOM error 0.1 44 Change PR55 from SD034100380 to SD034100280. 0.1 EVT

10 BOM error BOM error 0.1 Change PR50 from SD034576280 to SD034140280. 0.1 EVT
44

11 BOM error BOM error 0.1 48 Change PR148 from SD034316200 to SD034316280. 0.1 EVT

Change PC52,PC53,PC54,PC87,PC88,PC93 and PC94 from

B 12 BOM error
BOM error 0.1 44
SE075103Z00 to SE075103K80.
0.1 EVT B

Change PC70 from SE153106K80 to SE116226M80.

13 BOM error BOM error 0.1 46 0.1 EVT

14 High limit issue.

Because the high is limited, we need to reduce space.
0.1 48 Change PC101 from SF22004M210 to SF10004M080. 0.1 EVT

15 BOM error BOM error 0.1 48 Add PR137 and PR158 SD028100A80. 0.1 EVT

16 Power sequence adjust. Power sequence adjust. 0.1 47 Add PR168 SD034100280. 0.1 EVT

17 Power sequence adjust. Power sequence adjust. 0.1 47 Delete PR115 SD034100280.
0.1 EVT
Change PQ5,PQ18,PQ19,PQ20,PQ21,PQ23,PQ25,PQ34,PQ36,PQ40
18 BOM cost issue. BOM cost issue. 0.1 42 from SB000005M10 to SB000006800.
0.1 EVT
A A

Compal Electronics, Inc.

Title
SCHEMATIC, M/B LA-3121P
Size Document Number Rev
401411 D

Date: 星 薔|, 五月 11, 2006 Sheet 49 of 51

5 4 3 2 1
 5 4 3 2 1

Version change list (P.I.R. List) Page 2 of 2

for PWR
Item Fixed Issue Reason for change Rev. PG# Modify List VER Phase

D D

1 Charger accuracy issue. Increase changer accuracy to meet customer request. 0.2 44 Change PR44 from SE000001E00 to SE000001F00. 0.1 EVT

2 Charger accuracy issue. Increase changer accuracy to meet customer request. 0.2 44 Change PR50 form SD034140280 to SD000008B00. 0.1 EVT

3 Charger accuracy issue. Increase changer accuracy to meet customer request. 0.2 44 Change PR55 from SD034100280 to SD00000CL80. 0.1 EVT

4 Improve IC risk. Improve IC risk. 0.2 44 Change PR60 from SD034100180 to SD034100280. 0.1 EVT

5 Improve OCP point. Improve OCP point. 0.3 43 Change PR29 and PR30 from SD034200380 to SD034100380 0.1 EVT

6 Improve OCP point. Improve OCP point. 0.3 47 Change PR120 from SD034499280 to SD000001580.
0.1
EVT

7
C C

Improve ripple voltage. Improve ripple voltage. 0.4 46 Change PC68 and PC125 from SE142475K80 to SE116226M80. 0.2 DVT

8 Incresr +1.2VP_HT voltage. Incresr +1.2VP_HT voltage. 0.4 47 Change PR108 from SD034340180 to SH034348180. 0.2 DVT

9 Incresr +1.8VALWP voltage. Incresr +1.8VALWP voltage. 0.4 47 Change PR113 from SD034100280 to SD028102280. 0.2 DVT

Change PQ32, PQ33, 38, PQ39 from SB000003W00 to

10 Improve thermal issue. Improve thermal issue. 0.4 48
0.2 DVT
SB578320010

Improve thermal issue. Improve thermal issue. 0.4 48 Change PL12, PL13 from SH12056BM00 to SH000005680. 0.2 DVT
11

Improve +CPU_CORE OCP point. Improve +CPU_CORE OCP point. 0.4 48 Change PR134, PR157 from SD034150280 to SD034422180
B 12 0.2 DVT B

Improve +CPU_CORE OCP point. Improve +CPU_CORE OCP point. 0.4 48 Change PR136 and PR159 from SD034150280 to SH034210180.
13 0.2 DVT

14 Improve +CPU_CORE OCP point. Improve +CPU_CORE OCP point. 0.4 48 Change PC109 and PC122 from SE042333K80 to SE026224K80 0.2 DVT

15 Improve CPU load line Improve CPU load line 0.4 48 Change PR141 from SD014255180 to SD014200180 0.2 DVT

16 Improve CPU load line Improve CPU load line 0.4 48 Change PR142 and PR153 from SD034100A80 to SD034100080. 0.2 DVT

17

18
A A

Compal Electronics, Inc.

Title
SCHEMATIC, M/B LA-3121P
Size Document Number Rev
401411 D

Date: 星 薔|, 五月 11, 2006 Sheet 50 of 51

5 4 3 2 1
 5 4 3 2 1

Page 1 of 2 for RD Modify

Item Fixed Issue PG# Modify List VER Phase

D
1 ATI Recommand. 13 Change R376 82.5 ohm to 100 ohm. 0.2 DVT D

2 TV-OUT 阻抗匹配 . 14 Increase R590,R591,R592 150 ohm pull down resister. 0.2 DVT

3 解決 PCI_R ST# 漏電問題 . 18 Change U15,U16 voltage source +3VS to +3VALW. 0.2 DVT

4 Fixed USB2.0 EYE Diagram . 19 Change R164 11.8K ohm to 11.3K ohm. 0.2 DVT

5 IMPROVE TV-OUT SIGNAL QUALITY. 24 Change C417,C418,C419,C425,C428,C430 to 220P. 0.2 DVT

6 SB_INT_FLASH_SEL# 改為 E C可以控制 . 28 Add R594. 0.2 DVT

7 解 M 插 AC 電源 , LED 會閃一下的問題 . 41 Add R586,R589,Q5,Q12 change to 2N7002. 0.2 DVT

8 增加 +1.5VS, +2.5VS, +0 .9V 放電線路 . 41 Add R587,Q34(+2.5VS),R588,Q35(+1.5VS),R604,Q36(+0.9V). 0.2 DVT

9 ¹w 留 .
C C
41 Add C658 0.1uF 0.3 PVT

10 Sometimes run S3 test program will interrupt . 37 Change R100 to 47K(Ori : 100K) 0.3 PVT

11 改 ?+2.5V_LAN Power. 26 C281 change to 10uF 0.3 PVT

12 改善 LAN 訊號品 ? 27 Change R387,R390,R391,R395,C494,C500 placement to near

0.3
PVT
Transformer.

13 減少 Speaker 訊號增益 ( 預留 ). 39 Add R606(0 ohm),R607(0 ohm),R608(47K未上),R609(47K未上) 0.3 PVT

14 Add Camera Connect. 31 Add R605,C657,JP35 0.3 PVT

15 Bluetooth 加 chock. 38 Add L65 0.3 PVT

16
B B
For EMI request 15 Add C330 0.4 PVT2

17 JP25 5-in-1 connector Spec update (Pin18 from NC to SD-GND) 33 Add R610 0.4 PVT2

18 Modify Package for Lead-free part 41 Modify C658 package from 0402 to 0603 0.4 PVT2

19 Reserve 28 Add R611, R612, EC_Pin-100 1.0 MP

20 for solve MS detect issue 33 Remove C197 1.0 MP

A A

Security Classification Compal Secret Data Compal Electronics, Inc.

Issued Date 2005/05/09 Deciphered Date 2006/10/10 Title
SCHEMATIC, M/B LA-3121P
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Size Document Number R ev
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom 401411 D
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date: 星期四, 五月 11, 2006 Sheet 51 of 51
5 4 3 2 1
www.s-manuals.com