sanchez@ee.tamu.

edu

T
e

CO
x

TE MMO
a

CH
S

N
Edgar Sánchez-Sinencio

NI -
QU MOD
A

ES E F
&

:A EE
M

TU DB
TO AC
U

RI K
n

AL v
i

e
s
i
t

y
 Why do we need to use Common-Mode Feedback Circuits ?

• In the past, circuits have mainly one input and one output and both
referred to ground.
• Low voltage power supply make single ended circuits very difficult
to perform optimally. An alternative to single-ended circuits is to
use fully differential circuits.
• To double the output swing a fully differential circuit are used.
• The output terminals of fully differential circuits are equal and
opposite polarity.
• Additional properties of fully differential circuits are: improved
output swing, linearity and common-mode rejection ratio.
• How are the differential outputs referred to ?
• How are the common-mode signals eliminated in a Fully differential
circuit ?
· A CMFB circuit, in a fully differential circuit, is
generally needed for two reasons:

(1) To control the common mode voltage at different nodes

that cannot be stabilized by the negative differential
feedback. This is usually chosen as a reference voltage
yielding maximum differential voltage gain and/or
maximum output voltage swing

(2) To suppress the common mode components, that tends

to saturate different stages, through applying common
mode negative feedback.
Background and motivation .

VDD Vo1 = VDD - IDR VDD

R Vb M2
ID
Vo1 Vo1
Vin M1 Vin M1

VSS=0 VSS=0

Can we determine the DC operating points for V o1 and V o2?

Let us first consider the case of one transistor and one resistor.
Vo1
ID1 saturation
omhic VGSn
M1 VDD
saturation R
VGS2
Vo1 = Vin - VT1 VGS1

M1 ohmic

Vin VDS
M1 Vo2 VDD
OFF Analog and Mixed-Signal Center
Second case: Two transistors one n-type and one p-type Vo1
ID1 M1 triode M1 saturation VDD I II III IV
P2 VGS1 = VIB
VDD - (VSG - P1’
P1 |Vtp|)
V =V GS1 IA

Vo1B P2’
VDS
Vo2B VDD - VSG VDD VI
I M1 cutoff
For VSS ≠ 0 VDD - (VSG - |Vtp|) II M1 sat, M2 triode
III M1 sat, M2 sat
IV M1 triode, M2 sat
K ′pW2
K ′N W1
2 L1
( )
Vin − V SS − VT1 (1 + λ N (V01 − VSS )) =
2
2 L2
( )[
VDD − Vb − VT2 2 1 + λ p (VDD − V01 ) ]
KCL
I D1 = I D2
• Small variations due to process (or to the input) could force the operations in III to
move to regions II or IV.

• V01 is difficult to fix and the regions of operation of M1 and M2 a re very sensitive
to process variations and input variations.

Analog and Mixed-Signal Center (AMSC)

What is the effect of mismatch between the p-type current
source and the n-type current source?

Ip
rop
Ip - In
Vo ro = rop // ron
In ron

Vo due to the transistor mismatches, in ID1 and ID2 , is

given by

Vo=(Ip - In) ro = ∆ IRo

For instance for ∆Ι=15µΑ and ro = 266 kΩ, this results in

Vo = 4V. Since this error can not be produced M2 is forced
into triode region.
We will study techniques to make ∆I close to zero.

Analog and Mixed-Signal Center (AMSC)

Examples of voltage amplifiers types
• Single-Input Single-Output Amplifiers

Vin MD Is Ic Ib2
Vo
Vb Vin MD M2
- M3 V Vb
Vo Vo in MD
Vref + Vo M4
Vin MD R Vin MD Vo
Ib Vc Ib1

• Pseudo Differential Amplifiers

Vin+ Vin-
Vin+ Vin- Vin+
VB
- -
+ +
- Vo + - Vo +
Vb - Vo + VB

Fully-Differential
Vb3
Vb2
Vin+ Vin- Vin+
Vo+ Vin- Vin- - Vo +
-Vo + -Vo +
Vb
Vb4
How is the common source amplifier related to common-mode
feedback?
• Fully differential (FD) circuits need common-mode feedback to
operate properly and to fix the DC of the output nodes.

• FD amplifiers consist of common source circuits embedded

in differential pairs. Thus, the properties of the single-input
common source circuits are part of the FD amplifiers.

VDD VDD
Vb
RD RD M2 M2’
- +
Vo Vo
- + - +
Vin+ Vin Vo Vin+
M1 M1’ Vin- M1 M1’ Vin-
+ -

ISS ISS

Analog and Mixed-Signal Center (AMSC)

 • In a number of applications the inputs and output are short circuited, i.e.,
• From previous slide, for the load resistor RD, the
- input and output common-mode levels is well defined
+
Vin Vo

+ - Vo,cm = VDD − I SSR D / 2

• For the case of a current source load implemented by PMOS

transistors M2 and M2’ the common-mode level is not well
defined.
VDD • CM Levels depend on how close IDM2 and IDM2’
Vb
M2
M2’
are to ISS/2.
P- P+
- Vo + • In practice ISS is implemented by a NMOS current
Vin+ M1 M1’ Vin-
source, and similarly for M2 and M2’ by means
of a PMOS current source.
ISS Vb2
M3
• These two current sources are not ideal creating a
finite error between ID, M2, M2’ and ISS/2.

Reference.-J.F. Duque-Carrillo, “ Control of the Common-Mode Component in CMOS Continuous-Time Fully Differential
Signal Processing, Analog Integrated and Signal Processing,Vol. 4, No.2, pp131-140, Sept. 1993
 Effects of drain current mismatches on the DC output
voltage: An example of a FD “resistor equivalent”:

VDD
W
W M2 M2’ L
L
P- MB2
+ -
P-
-
Vo
+
P+

Vo
- + P+
Rb M1 M1’

MB3 M3 ISS
W W
2
L L

Suppose that the drain currents of M2 and M2’ (in the saturation
region) are slightly smaller than ISS /2, to satisfy KVL at nodes P - and
P+, then V p- and Vp+ must drop forcing M3 to enter in triode region,
producing only 2IDM2, DM2’.
Also if drain currents of M2 and M2’ are slightly greater than
ISS/2 then both M2 and M2’ must enter into the triode region, so
that their drain currents remain ISS /2.
Analog and Mixed-Signal Center (AMSC)
 Closed loop negative feedback effects on the DC output voltage

• The high impedance nodes are difficult to fix their DC operating

points. This is the case of Single-Ended Differential Amplifiers
(Op Amps and OTAs).

• Op Amps in open loop yield

VDD
Vo = or
-VSS
Fortunately, Linear Applications of single ended circuits are based on
negative feedback, and this feedback circuitry also fixes the DC
operating point, i.e.,
R2 Vo = A (0 - V-)
R1
− Vo R 1
- but V =
V- A Vo R1 + R 2
+ and
Vo,dc = 0
Closed-Loop Negative Feedback for symmetric power supplies.

Analog and Mixed-Signal Center (AMSC)

I/0 characteristics of a FD Amplifier.
Vo,dm = Vo + - Vo - = A (V+ - V-)
R1
Vo,dm = AVo, dm
R1 + R 2
Therefore Vo,dm = 0 if V+ = V - (well defined)
But
Vo,cm = 1/2 (Vo + + Vo -) = ? (undefined)

Where should the value of Vo,cm be set? Determined?

Output
V o+
This is the region where
Vo,cm must be fixed. Yielding
maximum output voltage
V+ - V-
swing and (maximum)
differential voltage gain.
V o-
Slew Linear Slew
Region Region Region

I/0 characteristics of a FD Amplifier.

Analog and Mixed-Signal Center (AMSC)
Vo,cm is usually fixed by an additional negative (common-mode) feedback
circuit such that the differential voltage gain is maximized.
• Basic Operations
Vin+ Vo+
Fully — Sensing the output CM level,
Differential
Amplifier
i.e.,
Vin -
(H1)
- Vo
Vo+ + Vo−
= Vo ,cm
VCMC CM (H2) 2
H3 Level
+ Sense
— Comparison with a voltage
Vcorrection Circuit reference i.e.,
- CM Detector
Reference
Voltage
Vo,cm − Vref
Conceptual Architecture of — Injecting the error correct-
Common-Mode Feedback ing level to the amplifier bias
circuitry.

Stability requires to have negative — Avoid injection of CM signals

feedback: to nodes of the amplifier
which do not correct the
PHASE (H1H2 H3) < 135º FOR ω < ω u
Vo,cm.
Analog and Mixed-Signal Center (AMSC)
If the output signals are current signals, the CMF architecture
could be represented as follows:
Vin+ Vo+
Fully
Differential
Vin- Amplifier Vo-

ICMC
-
CM +
Sense +
Current -
Iref
Amp - +

Transconductance
Level Sense Circuit

CM Sense Current Amp

io+ Vo+
Icmc icm

MY’ MX’ MY MX
io- Vo-
Iref

A conceptual current mode implementation of Level Sense

Circuit, CM Sense Current Amplifier (Comparator)
 CM signal detectors : two conventional cases
Performance Observations
VS = α1vo ,cm + α 2vo ,dm + α 3vo ,dm α1 = 1
∆R ∆I B ∆β • High DC offset due to source
+ +
∆R 1 2 R 4I B 4β followers
CM Detector 2 α2 =
4R
+
8βI B
⋅
2
• Other buffers can be used to
2R + reduce the DC offset
βI B • Mismatching between the
Vo- Vo+
∆I B 2I B passive resistors is the dominant
R1 R2 ∆VT + error in α 2
1 2I B β
+ ⋅
IB1 VS 8 βI B 
2
IB2
2 
I B  2 R +
 βI B 
1 1 1
α3 = ⋅ ⋅
2I B 8βI B  
2

 2R + 2 
 βI B 
 

CM Detector 3
α1 = 1 • High DC offset
Vo- Vo+ • Highly non-linear CM signal
∆β ∆VT β detector
VS α2 = + ⋅
4β 4 IB

1 β
α3 = J.F. Duque-Carrillo, “ Control of the Common-Mode Component in CMOS
8 IB Continuous-Time Fully Differential Signal Processing, Analog Integrated
and Signal Processing,Vol. 4, No.2, pp131-140, Sept. 1993
 Amplifier performance with CM control by current steering.
ACM GBWCM THD VDD
STRUCTURE
*
ADC =
ADM GBWDM ± 1V p − p @ 100KHz M1A Vbias1 M1B
M2A
Vbias2 M2B
To gates Vo- Vo+
of M1A- + mean=8.2 dB
Vi+ Vi -
MA M3A
M1B CM
Vo
- σ=11.1 dB 1.1 0.05 % MB Vbias3 M3B
Vref detector Vo WC=21 dB
M4C M4A
Vbias4 M4B
2
Vbias5
VSS

To gates
of M1A- +
Vo
mean=20 dB
1.2
A folded amplifier as an
M1B CM σ=9.5 dB 0.22 %
Vref -
detector Vo WC=33.7 dB example of a FD amplifier
3

To
To gates gates
of M1A- mean=22.1 dB
+ - σ=9.6 dB of M1A-
M1B Vo Vo 1.3 0.06 %
Vref WC=36.2 dB M1B -
+ Vo
Vbias Vo Vref
Vbias

To gates
of M1A- mean=9.4 dB Low-distortion CM steering loop.
M1B - σ=8.5 dB 1.2 0.015 %
+ Vo
Vo WC=23 dB
Vref
Vbias
Example of a compensated Op Amp and a CM sense circuit
Vi1 Vo1
-
+ -
Vcm +

Vi2 - + -
Vo2 Vcm +

VCMC VCMC
VDD
VB1 VB1
M10 M5 M7 M25
ICMS
Vo2

Vo1 VCM
Vi1 Vi2
M1 M2 M21 M22 M23 M24

C C
VB2 VB3 VB3
M9 M3 M4 M6 M26 M27

-VSS

op amp CM sense
 What is a common-mode feed-forward
correction circuit ?

A common mode feed-forward circuit is a circuit sensing

the input voltage. Then this input common-mode current is
added at each of the two output terminals (or applied to
an internal node of the amplifier) with the purpose to
cancel the output common-mode current component.
Next we consider two examples, one with a BiCMOS OTA
implementation and another one with a fully balanced
fully symmetric CMOS OTA.

We will discuss the advantages and limitations of this

feed-forward versus the common-mode feedback.
 Cancellation of the output common mode current signal
Vin+ I +C,d +
I0
gm
Vin−
d I −0
I −C , d
IC I C = g mc Vcm
gmd = gmc
gm Note that the output of gm has two identical current copies
c c

(a)

Vbias
Vin+ = Vcm + Vin / 2 I −0 I +0
Vin− = Vcm − Vin / 2 VC
(
I +C , d = g md Vcm + Vin / 2 ) M1
(
I −C , d = g md Vcm − Vin / 2 )
Vin+ M2
Vin−
M1 M2
 W  W  W
I +0 = I C+ , d − I C = g md Vin / 2      
 L  L  2L 
I −0 = I C− ,d − I C = − g md Vin / 2
(b)
Pseudodifferential BiCMOS transconductor with feed-forward common-mode
cancellation. (a) Conceptual idea. (b) BiCMOS implementation.

[*] F. Rezzi, A. Baschiroto, and R. Castello, “A 3V 12-55 MHz BiCMOS Pseudo Differential Continuous-Time
Filter”, IEEE Trans. Circuits Systems I, vol. 42, pp 896-903, November 1995.
 Let us explore how a common-mode feedforward can be sensed and then
applied. Consider a fully differential OTA with two current-mirrors

aIo+ aIo-
Vcm
Icm
Io- Io- level sensing
V o+ V o- circuit

Vin+ Vin-

Itail
Ibias CM
Ibias
correcting Sense
signal Amp Iref

FD OTA
• Correcting signal can be voltage or current. Note that Io+, and Io- are
equal to gmDRIVER (Vin+- Vin-) and gmDRIVER( Vin- -Vin+) , respectively. That is, we
are sensing the input voltage. We are not sensing the output voltage.
• aIo + and aIo - are copies of Io + and Io -, respectively. In practice the value
of aIo is a = 1 or a = 1/2.
FD OTA with common-mode feedforward (current-mode)

M3 M4 M2 M3 M4
M2

io- io- io+ io+

V o- V o+
Vin- Vin+

Vcm
Vcm
Itail
MX’ MY’ Vb Vb MY MX

current addition transformed into a Vcm

• Since Vreference = 0, V correction = Vcm and can be applied to MY’ and MY.

Analog and Mixed-Signal Center (AMSC)

 FD OTA CMFF (current-mode)

M4 M3 M3 M4
M2 M2

io- io+
Vo- Vo+
M1 M1
Vin- Vin+

Iref

MY’ MX’ MX MY
VREF Mref

• OTA FD CMFF Implementation (Self-Bias)

• We can eliminate Iref and still keep a good CMRR
and to increase the current through M1 if is needed.
Analog and Mixed-Signal Center (AMSC)
 Common feedback of more than one amplifier and their interconnections

• Observe that only one CMFB circuit is needed per output.

If the Amp 1 is connected with a CMFB, any other amplifier connected
to this amplifier does not need the extra CMFB.

• Furthermore, in some architectures the CM detector is a feedforward

and forms part of the amplifier. An example of this type has been
discussed before i.e., the Fully Balanced 4 current-mirror OTA

Complete Amplifier 1 Complete Amplifier 2

Vin1+ Vo+, previous = V in+ V o+

Common- Common-

Am
Am

Mode Mode

pli
pli

Feedforward Feedforward V o-

fie
fie

Vin1- Vo-, previous = V in-

r
r

Detector Detector

V cm
 g m5
+
g m1 V1 I1
Vin +
Io1
g m2
g m3 g m6 -

1 Vx= Vc m
+ 2 g m4

g m1 V2 I2
Vin- g m3 g m6 - Io2
g m2
+
g m5

Block Diagram Representation

VDD

M3 V1 V2 M3
Vref M7 M5 M2 M2 M5 M7 Vref
I 2 − I1
I1 I1 I1 I2 I2
Io1 I2 2
Vo+ Vo-
I1 − I 2
vin+ M1 M1 vin -
Io2
I1 + I 2
2 2 I1 + I 2
M4 2
VCMFB M8 M6 M6 M8 VCMFB
M4 Vx
(from next stage)

NEXT OTA IS DETECTING THE COMMON MODE FROM THIS OTA AND
FEEDING BACK TO THIS OTA
Common-Mode Rejection Ratio (CMRR):
a) CMFF b) CMFB c) CMFB & CMFF
Transient Response
Total Harmonic Distortion
(Single-ended)
Total Harmonic Distortion
(Double-ended)
COMMON-MODE FEEDBACK AMPLIFIERS:
Characterization and Simulation

Ideal Response
Merged Amplifiers
1
v s = α 1v o,cm ; α1 =
Vi +
Vi −
+
-
. Vo+
2
Taking into account mismatches on the

VREF +
H1
. Vo−
Amplifiers H1 and H i yields:

- v s = α 1v o,cm + α 2v o, dm + α 3 vo2, dm
VS H 1'
H 1'
H2
CM +
Detector +

Fully Differential Amplifier

With Common-Mode Feedback

Analog and Mixed-Signal Center TAMU (ESS)

Let assume the linearized ideal case α 1 ≠ 0, α 3=0 and α 2 ≠ 0.
Note here that the notation is changed to α 1 = ACS ,α 2 = ADS
Vi,dm ADD Vo,dm
ADC ASD

vs . ADS
ACS
Vi,cm ACD ASC Vo,cm
ACC

Using MASON’s Rule

ADD (1 − LGCM ) + ADC ∆ LGCM

LGCM = ASC ACS ADD , effective = ≅ ADD
D
LG DM = ASD ADS A (1 − LG DM ) + ACD ∆ LG DM
ACC ,effective = CC
∆ LGCM = ACS ASD D
∆ LG DM = ADS AS ADS
ADC , effective ≅ − ADD
ACS
D = 1 − LGCM − LGDM ACD , effective ≅ ACD
To investigate the non-linear effects, assume α 1 ≠ 0, α 3 ≠ 0 and α 2 = 0. Thus
The following expressions can be approximated.
vo, dm = ADD g m vi, dm − ADD f vo,dm + ASD v2
vo,cm = ADC g m v i ,dm − ADC f vo, dm + ASC v s
where
v s ≅ ACS vo ,cm + α 3 vo, dm ; α1 = ACS
It can be shown that:
vi ,dm FD with vo, dm
gm Σ CMFB vo ,cm
vi ,dm = vi cos ωt f

1 α 3 ASD ACL 1 α 32 ASD

2
ACL2
HD2 ≅ Vi ; HD3 ≅ 2 2
2 LGCM LG DM ,ex 2 LGCM LG DM , ex

gm
ACL = ; LG DM ,ex = f ADD
f

Analog and Mixed-Signal Center TAMU (ESS)

 COMMON-MODE FEEDBACK LOOP
Vo+
Vin+ + + + Common-
vocm
Fully Differential Mode
Amplifier Vo− Detector
-
Vin− -
H1
+
H2
vCM, control = v CMC

+
(vOCM − VCM )
- VREF = VCM
• Negative Feedback, H1H 2 H 3 < 1 H3

VOC H1CM H1CM ( s)

H CM = = = In Common - Mode
VinC 1 + H1H 2 H 3 1 + H1' ( s ) H 2 ( s) H3 ( s)
'

H DM = H1 In Differential - Mode
• Stability determined by open loop H1' H x H 3
• H3 is the CM-sense (or comparator) Amplifier.
• Goal to force vOCM = VREF
 (
• H 1' is defined as the gain between input vCMC and the output Vo+ − Vo− )
i.e. two examples
VDD
Vbias
Vo+ VFIX determines the current for
vCMC = 0.
Vo−
vin+ vin−

vCMC VFIX
− VSS
A Simple Fully-Differential Op Amp
VDD
Vbias1
• Inherent CM detector
Vbias2 Vbias2
vOCM • vOCM ≅ −VGS ?
vi+ vi−
Vo+ Vo−
Vbias3 Vbias3

vCMCV
− VSS
A Simplified Folded-Cascode Fully Differential Op Amp
 STABILITY REMARKS
• The poles of the common-mode feedback are given by the open loop gain
H1' ( s ) H 2 ( s ) H 3 ( s )

• The bandwidth of the common-mode gain and the differential-mode gain.

• For differential inputs in an ideal amplifier

vind Vo+ Differential-Mode.

+ + CM
2 Detector How to simulate this D-M?
v - -
− ind Vo−
2 +
- Vref Common-Mode
H1CM 1
H1 H CM = i.e. H 2 =
+ + CM H2 1 + H1' H 2 H3 2
vicm Detector
- -
Hi Vo−cm
+
- Vref
H3
 How to check stability of this loop?

+ L
+ + .
Vocm
. CM
L Detector
- -
V
.−
ocm

+- v i ,cm +

- Vref

Analog and Mixed-Signal Center TAMU (ESS)

 How to use a Common Feedback Circuit to
yield a very LV rail-to-rail Amplifier?
VDD
VDD
Vbias I Vx I

Vi+ Vi,p+ Vi+ Vi-

A
CM R R
-- ++
Adapter RMCM V Vi,p+ Vref
Vi- out Vi,p-
Vi,p-
I I

Conceptual circuit schematic for illustrating

Very LV operational amplifier based on a single the operation of the input CM adapter.
differential pair with an input CM adapter.

How does it operate? ( )

Vx = A[ 2Vref − Vi+,p + Vi−,p ] = 2A(Vref − Vi ,p,cm )
Vi+, p + Vi−, p Vi , cm
Vi ,p,cm = ≅ Vref +
2 2 ⋅ R ⋅Gm ⋅ A
Vi+ + Vi−
Vi ,p,dm = Vi ,dm ; Vi ,cm =
where 2
G m = −Vx / I Vi,dm is the DM component of the input
Vi,p,dm is the DM component of the output
 VDD

Vi,p+ Vi,p-
Vref Vref Vx
CL

IT IT

Vi,p+ Vi,p-
Vref
- - + +
A

CL Vx

Implementation of the error amplifier

 One possible implementation of the input
V CM adapter follows
DD
I V xI

Vi + Vi -
A
R -- ++ R
Vref Main Transistor Aspect Ratios (in µm) and
Vi,p+ Vi,p- Element Values of the Amplifier
Based on a Single Input Pair (Fig 3).
I I
M1A, M1B 1000/6 M6 1600/2
M2A, M2B 600/4 M7 - M10 300/4
VDD
MA1 - MA4 50/2 M11 700/2
MA5, MA6 300/4 R1 - R2 15 kΩ
M1B
MA5 M1A MA6 M2D 150/2 RM 5 kΩ
Vi + Vi - M1, M2 200/2 CM 5 pF
M3 - M5 400/2 IB = IT/2 10 µA
R1 MA1 MA2R2
Vi,p+ Vi,p-
Vref M2D
MA3MA4
CL Vx
IT IT
M2A M2C
M2B

Fig 3. Circuit implementation of the input CM adapter in Fig 2.

Stability conditions must be established in designing this circuit.

J.F. Duque-Carillo, J.L. Ausin, G. Torelli, J.M. Valverde and M.A. Dominguez, “1-V Rail-to-Rail Operational Amplifiers in
Standard CMOS Technology,” IEEE Journal Solid-State Circuits, Vol. 35, No. 1, pp. 33-44, Jan. 2000.
 Input CM Adapter

CM input voltage

Shifted CM input voltage Vi,p+ and Vi,p-

CM input voltage
Input CM voltage and shifted CM voltage
Very LV Op Amp based on CM Adapter

• Pros
– The amp could work as low as 1V for conventional CMOS
technology
– The DC gain and unity gain frequency are not much affected by
the extra circuitry
• Cons
– Power consumption, input DC offset voltage and current, and input
referred noise are increased due to the resistive dynamic voltage
shifter
– Input resistance is in the order of output resistance of a MOS
transistor instead of infinity compared with conventional CMOS
amplifier
 DC Sweep

Input output DC characteristic

( including the DC adapter )

DC gain = 75.13 dB

VDD
M4 M5
Vbias M6
Vi + Vi,p+
CM
M1 M2 M7 M8
Adapter RM CM
Vi - Vout
Vi,p-
M9 M10 M11
 Frequency Response

Unity gain freq. = 2.336 MHz

Frequency Response - Amplitude ( including the CM adapter )

 Phase Margin

Phase Margin = 59.56 degree

Frequency Response - Phase ( including the DC adapter )

 LV Common-Mode Feedback Techniques
VDD

VBIAS1
−
ICMFB V
o
+
Vi − Vi + V
i
VBIAS2 V
ref,i
Rail-to-rail very LV amplifier in unity-gain
configuration with input common-mode
feedback (ICMFB)
A simple PMOS input stage
R V
2 DD
V+ V
ref,i
o +
V+x V-
Vin+
R
1 +
− −
+ −
+ I Rs
Vin- Vx •
Vref,i- ICMFB OCMFB V s • V-
ref,o
−
−
+ +
I • V+
Vx-• −
Rs
R V+ s +
1
Vo− I I
Vx - s s
R
2

FD LV rail-to-rail amplifier with

ICMFB and OCMFB ICMFB (shadowed area) for rail-to-rail LV
amplifier operation
LV CMFB FOR OTAS VDD

VB1 VB2

IB IB IB IB
Typical OTA connection in
fully differential OTA-C
based circuits.
Vin+ Vin-
The common-mode voltage
is obtained from the input of - + VC

the following stage. Poor

PSRR IB IB VREF IB IB

VSS

VDD

IB IB IB IB

Vo IB

Vin- GND
Vin+
R1 R1
MC M1 M1

IB IB IB IB IB

VSS

Pseudo-differential OTAs including the

CMFB for the first one with good PSRR
 Final Remarks
• DC operating points for high impedances are difficult to
fix

• Fully differential amplifiers with high output impedance

nodes must use common-mode feedback circuits .

• Common mode circuits can fix the DC operating points as

well as eliminate the common mode output component.

• Low voltage constraints impose optimal bias conditions at

both the input and output ports of an amplifier.

• Common mode circuits for LV should be used both at the

input and output