Apostila Aulas Praticas

ELETRÔNICA IV
Apostila de Aulas Práticas
Autor: Fernando Antônio Pinto Barúqui

2
Sumário
1. INTRODUÇÃO.............................................................................................................................. 3
2. AMPLIFICADOR “PUSH-PULL” COM SAÍDA COMPLEMENTAR.................................. 4
3. AMPLIFICADOR SINTONIZADO ............................................................................................ 7
4. MODULADOR DE AMPLITUDE............................................................................................. 10
5. MULTIPLICADORES ANALÓGICOS.................................................................................... 12
6. MODULADOR DE FREQÜÊNCIA .......................................................................................... 14
7. FONTES CHAVEADAS ............................................................................................................. 16

DATASHEETS................................................................................................................................. 20
3
1. INTRODUÇÃO
O conteúdo desta apostila consiste das aulas experimentais do curso de Eletrônica IV, ministrado no
Departamento de Eletrônica da Escola de Engenharia. Cada capítulo corresponde a um experimento a ser
montado e estudado em laboratório. Esses experimentos foram, ao longo dos anos, sendo aprimorados
didaticamente, de forma a apresentar ao aluno a constatação experimental dos conceitos básicos, e essenciais,
estudados na disciplina teórica. Também são fornecidos todos os manuais dos componentes usados nos
experimentos, disponibilizando ao aluno todas as informações necessárias à realização dos projetos.
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2. AMPLIFICADOR “PUSH-PULL” COM SAÍDA COMPLEMENTAR
ASSUNTO
Projeto de um amplificador de potência, classe AB, com transistores de saída em simetria com-
plementar.
OBJETIVO
Familiarizar o aluno com as condições de operação e características particulares do circuito.
PROJETO
Fase 1- Projete o circuito da Figura 2.1 obedecendo as seguintes especificações:
1 - Potência C.A. de saída de 1W.
2 - Carga de 8Ω.
3 - Eficiência superior a 40%.
4 - Freqüência de corte inferior menor que 50Hz.
5 - Ganho de tensão o maior possível.
6 - Considerar nos cálculos os transistores: TIP29C, TIP30C, BC547 e BC557.
Considerações:
1 - Calcule os ganhos de tensão e potência.
2 - Mostre que a eficiência máxima real do estágio de saída é dada por:
πV op
η= onde Vop é a tensão de pico de saída.
4V cc
3 - Explique a função dos seguintes componentes do circuito: R1, R2, D1, D2, D3, D4, C2 e C5.
4 - Considere R1=R2=0.5Ω.
5 - Ajuste P1 até obter a tensão DC no ponto A igual a zero.
Medidas:
1 - Medir a polarização após os ajustes necessários.
2 - Medir os ganhos de tensão e de potência.
3 - Medir e traçar o gráfico de resposta em freqüência.
6 - Medir a eficiência do circuito para a máxima tensão de saída, sem saturação.

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7 - Curto-circuitar os pontos B e C, e observar as alterações na forma de onda de saída. Explicar estas
alterações.
Fase 2- Projete o circuito da Figura 2.2 obedecendo as seguintes recomendações:
1 - Conservar os valores dos componentes calculados para o circuito da Figura 2.1, exceto o capacitor
C1.
2 - Identificar o tipo de realimentação empregada.
3 - Calcular R6 para se obter um ganho de tensão realimentado de 4. Este ganho é necessário para que
um sinal de entrada com 1V de amplitude produza potência máxima na saída do amplificador. Esta é
uma especificação comum aos amplificadores de potência comerciais.
4 - Recalcular C1 para manter a freqüência de corte inferior menor que 50Hz.
Medidas:
1 - Medir a tensão DC no ponto A e comparar com a da Fase 1.
2 - Medir o ganho de tensão.
3 - Medir e traçar o gráfico de resposta em freqüência.
6 - Curto-circuitar os pontos B e C, e observar as alterações na forma de onda de saída. Comparar com o

observado na Fase 1.
Fase 3- Projete o circuito da Figura 2.4 obedecendo as seguintes recomendações:
1 - Monte o circuito da Figura 2.3 (a) utilizando um microfone de eletreto e um resistor R10=10kΩ.
2 - Fale ao microfone e observe a amplitude máxima do sinal AC em VMic.
3 - Com a tensão VMic, projete o pré-amplificador da Figura 2.3 (b) de tal forma a se obter uma tensão
máxima Vpré=1V e freqüência de corte inferior menor que 50Hz. Conecte o pré-amplificador ao
amplificador da Fase 2, conforme a Figura 2.4, substitua a carga RL por um alto-falante de 8Ω, fale
ao microfone e relate suas impressões.
Figura 2.1: Amplificador Push-Pull.

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Figura 2.2: Amplificador Push-Pull com realimentação.
Figura 2.3: Microfone de eletreto. a) Polarização. b) Microfone mais amplificador.
Figura 2.4: Amplificador Push-Pull mais microfone de eletreto.

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3. AMPLIFICADOR SINTONIZADO
OBJETIVO
Estudo de um amplificador sintonizado e sua aplicação como amplificador seletivo, multiplicador de
freqüências e conversor.
ESPECIFICAÇÕES
Projetar um amplificador sintonizado, tomando por base, a Figura 3.1, com as seguintes
características:
1 - Vcc = 12V.
( )
2 - Freqüência da portadora ( eci ω c = 400kHz ).
eco (ω c )
3 - Ganho de tensão AV = ≅ 20 .
eci (ω c )
4 - Seletividade igual a 10.
PROCEDIMENTOS
1 - Medida das relações de espiras das bobinas.
2 - Medidas dos fatores de Qualidade e de LX, segundo o esquema abaixo.
onde:
Cv é uma década capacitiva;
Cp é a capacitância parasita, que inclui a capacitância do osciloscópio, da fiação, residual da década e da
própria bobina;
1
ωo = Î Fazer as medidas de Lx em dois valores, ωo1 e ωo2, em torno de ωc, de
(
L x Cv + C p )
modo que seja anulada a capacitância Cp.
- Medida de Qb.
8
Z( ω o )
Vo = Vi
R s + Z( ω o )
Z( ω o ) = ω o LQb (Qb >> 1)

( )
Dados Vi e Rs medir Vo máximo com o osciloscópio (ponta atenuadora) e calcular Z ω o .
3 - Calcule os componentes para atender as especificações dadas;
4 - Calcule a seletividade do circuito;
5 - Responda:
Qual o sinal observado na saída quando a entrada:

- for um sinal senoidal de 400kHz;
- for um sinal senoidal de 800 kHz;
- for um sinal quadrado de 200kHz;
6 - Monte o circuito e compare os valores previstos e calculados com os medidos.
Medidas:
- o ganho máximo em ωc;
- a curva de resposta, assinalando os pontos de meia potência;
- a seletividade;
- os sinais de saída de acordo com as entradas especificadas no item 5;
- explique os resultados;
- faça as observações que julgue necessárias;
7 - No circuito já montado, aplique à base outro gerador de sinais, conforme a Figura 3.2.
- através do gerador G1 um sinal de 800kHz;

- através do gerador G2 um sinal de 1200kHz;
8 - Qual o sinal que será observado na saída (sobre RL)?
9 - Comente e apresente as explicações teóricas para o observado.

9
Figura 3.1: Amplificador sintonizado.
Figura 3.2: Amplificador sintonizado como mixer.

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4. MODULADOR DE AMPLITUDE
OBJETIVO
Estudo de um circuito Modulador de Amplitude (AM).
ESPECIFICAÇÕES
Projetar um circuito Modulador de Amplitude, tomando por base, o circuito da Figura 4.1, de forma
a atender as especificações abaixo:
1 - Freqüência da portadora igual a 400kHz.
2 - Freqüência de corte inferior, para o sinal modulador, de 50Hz.
3 - Freqüência de corte superior, para o sinal modulador, de 5kHz.
PROCEDIMENTOS
1 - Meça a indutância L da bobina, sua relação de espiras e seu fator de qualidade Qb.
2 - Calcule os capacitores C1 e C2 para que o circuito oscile na freqüência de 300kHz.
3 - Calcule R1, R2, P, C3, C5 de forma a atender os itens 2 e 3 das especificações.
4 - Mostre que para se obter simetria nos ciclos positivo e negativo do sinal modulado Vo(t), é
V
necessário que a resistência equivalente no coletor de Q2 seja R eq = cc . Calcule Ro para se obter
2 Icq
Req.
5 - Calcule C4 de tal forma que: na freqüência da portadora o capacitor seja um curto-circuito; nas fre-
qüências moduladoras o capacitor seja um circuito aberto.
MEDIDAS
1 - Meça a freqüência da portadora.
2 - Com um sinal de entrada de 1kHz, ajuste sua amplitude para um índice de modulação de 50% e
esboce o sinal de saída Vo(t) para as formas de onda quadrada, senoidal e triangular.
3 - Meça o maior índice de modulação que pode ser obtido sem que haja distorção no sinal de saída.
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Figura 4.1: Modulador de amplitude.

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5. MULTIPLICADORES ANALÓGICOS
OBJETIVO
Familiarizar o aluno quanto às técnicas de multiplicação de sinais analógicos variantes no tempo e
sua aplicação como moduladores em amplitude com e sem portadora, detectores síncronos, detectores de
fase, dobradores de freqüência, extratores de raiz quadrada, etc.
INTRODUÇÃO
Durante muito tempo a multiplicação analógica foi conseguida através de várias técnicas como:
- método do quadrado da soma usando dispositivos não lineares que apresentem características
quadráticas, predominantes ou não, como FET’s, diodos ou transistores de junção, seguidos de
filtros passa-faixa.
- método do quadrado da soma balanceada, usando os mesmos dispositivos anteriores, mas em cir-
cuitos onde a portadora é suprimida (mais de 40dB) ou reduzida (mais de 20dB). Em baixas fre-
qüências pode-se simular um dispositivo com características quadráticas com operacionais e redes
de realimentação providas de resistores e diodos em série. Para cada tensão de entrada o ganho
será diferente e aproximação por partes poderá ser quadrática.
- método da modulação por largura de pulsos.
- método dos amplificadores logarítmicos.
- método dos amplificadores de transcondutância variável [1].
Todas estas técnicas serão analisadas nas aulas teóricas.
A presente prática será sobre os moduladores balanceados de transcondutância variável e com os co-
letores dos diferenciais cruzados, conhecidos como células de Gilbert [1]. Estas células são comuns a vários
integrados como multiplicadores de quatro quadrantes, moduladores, etc.
TRABALHO PREPARATÓRIO
1 - Estudar as características técnicas do modulador balanceado MC1496.
2 - Estudar os circuitos apresentados com as funções:
- Modulador AM DSB
- Modulador AM DSB SC
3 - Usando a identidade
1 1
sen( a ) sen( b) = sen( a + b) + sen( a − b)
2 2
sendo a = ω c t + Φ e b = ω c t
idealizar um circuito que possa fornecer uma tensão de saída proporcional ao desvio de fase entre os
sinais a e b, sendo Φ < π 4 , onde sen( Φ) ≅ Φ .
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PRÁTICA
1 - Montar um circuito modulador em amplitude da Figura 5.1 que possa funcionar como AM DSB e
AM DSB SC numa freqüência de portadora ω c = 2π × 100 × 10 3 rad s e freqüência da moduladora
ω m = 2πf m , fm variando de 100Hz a 3kHz.
2 - Meça as polarizações e observe no osciloscópio as formas de onda do item 1, medindo os índices de

modulação em amplitude para AM DSB.
3 - Observe no analisador de espectro as formas de onda do item 1, anotando os resultados. Varie o poten-
ciômetro que reduz a portadora, medindo o melhor resultado.
4 - Montar o circuito projetado como detector de fase. Caso necessite de um defasador de π 2 utilize re-
des RC.
Figura 5.1: Modulador balanceado.
Responda:
- Em que se baseia a modulação síncrona? Onde é usada?
- Como se poderia obter um oitavador musical?
- Como se poderia obter um extrator de raiz quadrada?
Referências
[1] Manual da Motorola em anexo.
[2] Design of Analog Integrated Circuits. P. Gray, M. Meyer. John Wiley, Mp.
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6. MODULADOR DE FREQÜÊNCIA
OBJETIVO
Estudo de um circuito Modulador de Freqüência (FM).
ESPECIFICAÇÕES
Projetar um circuito Modulador de Freqüência, tomando por base o circuito da Figura 6.1, de forma
a atender as especificações abaixo:
1 - Freqüência da portadora igual a 40MHz.
2 - Freqüência de corte inferior, para o sinal modulador, de 50Hz.
3 - Freqüência de corte superior, para o sinal modulador, de 50kHz.
PROCEDIMENTOS
1 - Determine R4 e C4 de forma a atender as especificações de freqüências de corte inferior e superior
para o sinal modulador. Considere a capacitância do diodo varactor em torno de 15pF.
2 - Calcule C1, C2 e L para que o circuito oscile na freqüência de 40MHz. Para isto, reflita todas as ca-
pacitâncias e resistências para o coletor do transistor BF494. A freqüência pode ser determinada pela
fórmula abaixo:
1
f= .
2π LCeq
3 - A bobina deve ser confeccionada com fio rígido esmaltado (fio de enrolar motor), com uma única ca-
mada de espiras e com forma cilíndrica. Para o cálculo do número de espiras e das dimensões da bo-
bina, deve ser usada a fórmula abaixo:
0. 394 r 2 N 2
L=
9 r + 10 h
onde
L - é a indutância em µH.
r - é o raio da bobina em cm.
N - é o número de espiras.
h - é o comprimento da bobina em cm.
MEDIDAS
1 - Sem aplicar o gerador de sinais, varie o potenciômetro P entre o mínimo e o máximo. Faça um
gráfico da freqüência de oscilação pela tensão no ponto A (que é a tensão que polariza o diodo
varactor), e calcule a constante ko do oscilador.
2 - Conecte o gerador de sinais ao modulador, e com o auxílio do Analisador de Espectro, observe e

anote a forma do sinal Vo(t) no domínio da freqüência. Fixe a freqüência do gerador de sinais em
15
30kHz, e aumente a amplitude do sinais até que se observe o primeiro apagamento da portadora, que
∆f
ocorre quando mf ≅ 2.4 , sendo mf = o índice de modulação, ∆f = k oVB o desvio de freqüência
fm
e fm a freqüência de modulação. Anote o valor da amplitude do sinal modulador.
3 - Retire os capacitores C1 e C2, de forma que o circuito pare de oscilar. Meça a atenuação
H ( jω ) = VB ( jω ) V A ( jω ) na freqüência de 30kHz. Com a amplitude anotada no item 4, calcule
2.4 f m
ko = e compare com o valor obtido no item 1.
H ( jω m ) V A max
Figura 6.1: Circuito modulador de freqüência.
OBS: Na modulação FM temos:
f i ( t ) = f c + ∆f cos( f m t )
Φ i ( t ) = 2π ∫ f i ( t )dt
∆f
Φ i ( t ) = 2πf c t + sen(2πf m t )
fm
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7. FONTES CHAVEADAS
OBJETIVO
Projetar e verificar o funcionamento dos conversores BOOST, FLYBACK e BUCK.
PRÁTICA
a) Conversor BOOST
O circuito da Figura 7.1 é um conversor BOOST operando no modo descontínuo. Dimensione RL e CL

de forma a se obter VL=20V com α=0.5 e uma variação máxima de 0.1V. A tensão VCC deve ser ajustada em
5V, e Vp conforme a Figura 7.2. Assuma uma freqüência de chaveamento de 10kHZ.
- equações de projeto:
Tempo de carregamento do indutor L, TC=αT, 0≤α≤0.5

Tempo de descarregamento do indutor L, TD=α1T, 0≤α1≤(1-α)
α
Tensão de saída V L = (VCC − VT ) − V D + VCC , onde VT e VD são as tensões de condução do transistor e
α1
diodo D1 respectivamente.
A corrente no indutor na fronteira do modo contínuo para o descontínuo é
(V − VT )α (1 − α )T
I L _ fronteira = CC
2L
(VCC − VT ) αα 1T
2
Indutor L = , onde IL é a corrente DC na carga RL, e T o período de chaveamento.

2I L
α (VCC − VT )T
Corrente máxima acumulada no indutor L, I max =
L
I LT
Capacitor em função da máxima variação de tensão na saída, C =
∆VL
- medidas:
1) Simule o circuito.
2) Meça a tensão de saída (ripple).
3) Meça a variação de tensão na saída.
4) Registre a tensão no ponto B.
5) Verifique a corrente de carga e descarga do indutor, observando a tensão no ponto A. V A = VCC − 100 I .
6) Varie α de 0.1 a 0.5, e plote um gráfico de VL em função de α.
7) Compare os resultados práticos com os calculados e os obtidos previamente por simulação. Justifique as
discrepâncias.
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Figura 7.1: Conversor BOOST.
Figura 7.2: Fonte de excitação dos conversores BOOST e FLYBACK.
b) Conversor FLYBACK
O circuito da Figura 7.3 é um conversor FLYBACK operando no modo descontínuo. Dimensione RL e

CL de forma a se obter VL=-20V com α=0.5 e uma variação máxima de 0.1V. A tensão VCC deve ser ajustada
em 5V, e Vp conforme a Figura 7.2. Assuma uma freqüência de chaveamento de 10kHZ.
Tempo de carregamento do indutor L, TC=αT, 0≤α≤0.5

Tempo de descarregamento do indutor L, TD=α1T, 0≤α1≤(1-α)
α
Tensão de saída V L = (VCC − VT ) − V D , onde VT e VD são as tensões de condução do transistor e diodo
α1
D respectivamente.
α 2 (VCC − VT ) T
2
Indutor L = , onde IL é a corrente DC na carga RL, e T o período de chaveamento.

2(V D − V L ) I L
α (VCC − VT )T
Corrente máxima acumulada no indutor L, I max =
L
I LT
Capacitor em função da máxima variação de tensão na saída, C =
∆VL
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- medidas:
1) Simule o circuito.
2) Meça a tensão de saída (ripple).
4) Registre a tensão no ponto A.
5) Verifique a corrente de carga e descarga do indutor, observando a tensão no ponto B. V B = 100 I .
6) Varie α de 0.1 a 0.5, e plote um gráfico de VL em função de α.
discrepâncias.
Figura 7.3: Conversor FLYBACK.
c) Conversor BUCK
O circuito da Figura 7.4 é um conversor BUCK. Dimensione RL e CL de forma a se obter VL=5V com
α=0.5 e uma atenuação mínima, do filtro LC, de 0.01 na freqüência de chaveamento. A tensão VCC deve ser
ajustada em 10V, e Vp conforme a Figura 7.5. Assuma uma freqüência de chaveamento de 10kHZ. Considere
também a possibilidade α poder variar de um valor mínimo de 0.2 a um máximo de 1.
Tempo de carregamento do indutor L, TC=αT, 0.2≤α≤1

Tensão de saída VL = (VCC − VT )α − VD (1 − α ) , onde VT e VD são as tensões de condução do transistor e
diodo D respectivamente.
T2
Capacitor C = , onde A é a atenuação do filtro LC na freqüência de chaveamento, T é o
(2π )2 AL
período de chaveamento.
A corrente mínima na carga ILmin que garante a corrente I no indutor maior que zero, com α mínimo é
α (1 − α min )T
I L _ min = min (VCC + V D − VT ) .
2L
V L _ min
O resistor máximo admissível é R L _ max =
I L _ min
19
- medidas:
1) Simule o circuito (ripple).

2) Meça a tensão de saída.
4) Registre a tensão no ponto A.
5) Varie α de 0.2 a 1, e plote um gráfico de VL em função de α.
discrepâncias.
Figura 7.4: Conversor BUCK.
Figura 7.5: Fonte de excitação do conversor BUCK.

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DATASHEETS
Philips Semiconductors Product specification
High-speed diodes 1N4148; 1N4448
FEATURES DESCRIPTION
• Hermetically sealed leaded glass The 1N4148 and 1N4448 are high-speed switching diodes fabricated in planar
SOD27 (DO-35) package technology, and encapsulated in hermetically sealed leaded glass SOD27
• High switching speed: max. 4 ns (DO-35) packages.
• General application
• Continuous reverse voltage:
max. 75 V
• Repetitive peak reverse voltage: k
handbook, halfpage a
max. 75 V
• Repetitive peak forward current: MAM246
max. 450 mA.

The diodes are type branded.
APPLICATIONS
Fig.1 Simplified outline (SOD27; DO-35) and symbol.
• High-speed switching.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VRRM repetitive peak reverse voltage − 75 V
VR continuous reverse voltage − 75 V
IF continuous forward current see Fig.2; note 1 − 200 mA
IFRM repetitive peak forward current − 450 mA
IFSM non-repetitive peak forward current square wave; Tj = 25 °C prior to
surge; see Fig.4
t = 1 µs − 4 A
t = 1 ms − 1 A
t=1s − 0.5 A
Ptot total power dissipation Tamb = 25 °C; note 1 − 500 mW
Tstg storage temperature −65 +200 °C
Tj junction temperature − 200 °C
Note
1. Device mounted on an FR4 printed circuit-board; lead length 10 mm.
1999 May 25 2
ELECTRICAL CHARACTERISTICS
Tj = 25 °C unless otherwise specified.

VF forward voltage see Fig.3
1N4148 IF = 10 mA − 1 V
1N4448 IF = 5 mA 0.62 0.72 V
IF = 100 mA − 1 V
IR reverse current VR = 20 V; see Fig.5 25 nA
VR = 20 V; Tj = 150 °C; see Fig.5 − 50 µA
IR reverse current; 1N4448 VR = 20 V; Tj = 100 °C; see Fig.5 − 3 µA
Cd diode capacitance f = 1 MHz; VR = 0; see Fig.6 4 pF
trr reverse recovery time when switched from IF = 10 mA to 4 ns
IR = 60 mA; RL = 100 Ω;
measured at IR = 1 mA; see Fig.7
Vfr forward recovery voltage when switched from IF = 50 mA; − 2.5 V
tr = 20 ns; see Fig.8
THERMAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS VALUE UNIT

Rth j-tp thermal resistance from junction to tie-point lead length 10 mm 240 K/W
Rth j-a thermal resistance from junction to ambient lead length 10 mm; note 1 350 K/W
Note
1. Device mounted on a printed circuit-board without metallization pad.
1999 May 25 3
GRAPHICAL DATA
MBG451 MBG464
300 600
handbook, halfpage handbook, halfpage
IF IF
(mA) (mA)
200 400
(1) (2) (3)
100 200
0 0
0 100 Tamb (oC) 200 0 1 VF (V) 2
(1) Tj = 175 °C; typical values.

Device mounted on an FR4 printed-circuit board; lead length 10 mm.
(2) Tj = 25 °C; typical values.
(3) Tj = 25 °C; maximum values.
Fig.2 Maximum permissible continuous forward
current as a function of ambient Fig.3 Forward current as a function of forward
temperature. voltage.
MBG704
102
handbook, full pagewidth
IFSM
(A)
10
10−1
1 10 102 103 tp (µs) 104
Based on square wave currents.

Tj = 25 °C prior to surge.
Fig.4 Maximum permissible non-repetitive peak forward current as a function of pulse duration.
1999 May 25 4
MGD290 MGD004
103
handbook, halfpage 1.2
IR handbook, halfpage
Cd
(µA)
2 (pF)
10
1.0
(1) (2)
10
0.8
1
0.6
10−1
10−2 0.4
0 100 200 0 10 20
Tj (oC) VR (V)
(1) VR = 75 V; typical values.

(2) VR = 20 V; typical values.
f = 1 MHz; Tj = 25 °C.
Fig.5 Reverse current as a function of junction Fig.6 Diode capacitance as a function of reverse
temperature. voltage; typical values.
1999 May 25 5

tr tp
t
D.U.T. 10%
RS = 50 Ω IF IF t rr
SAMPLING t
OSCILLOSCOPE
V = VR I F x R S R i = 50 Ω
90% (1)
VR
MGA881
input signal output signal
(1) IR = 1 mA.
Fig.7 Reverse recovery voltage test circuit and waveforms.
I 1 kΩ 450 Ω
I V
90%
R S = 50 Ω OSCILLOSCOPE V fr
D.U.T.
R i = 50 Ω
10%
MGA882 t t
tr tp
input output
signal signal
Fig.8 Forward recovery voltage test circuit and waveforms.
1999 May 25 6
NPN general purpose transistors BC546; BC547
FEATURES PINNING
• Low current (max. 100 mA) PIN DESCRIPTION
• Low voltage (max. 65 V). 1 emitter
2 base
APPLICATIONS 3 collector
• General purpose switching and amplification.
DESCRIPTION handbook, halfpage1 3

2
NPN transistor in a TO-92; SOT54 plastic package. 3
2
PNP complements: BC556 and BC557.
1
MAM182
Fig.1 Simplified outline (TO-92; SOT54)

and symbol.
LIMITING VALUES
VCBO collector-base voltage open emitter
BC546 − 80 V
BC547 − 50 V
VCEO collector-emitter voltage open base
BC546 − 65 V
BC547 − 45 V
VEBO emitter-base voltage open collector
BC546 − 6 V
BC547 − 6 V
IC collector current (DC) − 100 mA
ICM peak collector current − 200 mA
IBM peak base current − 200 mA
Ptot total power dissipation Tamb ≤ 25 °C; note 1 − 500 mW
Tamb operating ambient temperature −65 +150 °C
Note
1. Transistor mounted on an FR4 printed-circuit board.
1999 Apr 15 2

Rth j-a thermal resistance from junction to ambient note 1 0.25 K/mW
Note
CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

ICBO collector cut-off current IE = 0; VCB = 30 V − − 15 nA
IE = 0; VCB = 30 V; Tj = 150 °C − − 5 µA
IEBO emitter cut-off current IC = 0; VEB = 5 V − − 100 nA
hFE DC current gain IC = 10 µA; VCE = 5 V;
BC546A see Figs 2, 3 and 4 − 90 −
BC546B; BC547B − 150 −
BC547C − 270 −
DC current gain IC = 2 mA; VCE = 5 V;
BC546A see Figs 2, 3 and 4 110 180 220
BC546B; BC547B 200 290 450
BC547C 420 520 800
BC547 110 − 800
BC546 110 − 450
VCEsat collector-emitter saturation IC = 10 mA; IB = 0.5 mA − 90 250 mV
voltage IC = 100 mA; IB = 5 mA − 200 600 mV
VBEsat base-emitter saturation voltage IC = 10 mA; IB = 0.5 mA; note 1 − 700 − mV
IC = 100 mA; IB = 5 mA; note 1 − 900 − mV
VBE base-emitter voltage IC = 2 mA; VCE = 5 V; note 2 580 660 700 mV
IC = 10 mA; VCE = 5 V − − 770 mV
Cc collector capacitance IE = ie = 0; VCB = 10 V; f = 1 MHz − 1.5 − pF
Ce emitter capacitance IC = ic = 0; VEB = 0.5 V; f = 1 MHz − 11 − pF
fT transition frequency IC = 10mA; VCE = 5 V; f = 100 MHz 100 − − MHz
F noise figure IC = 200 µA; VCE = 5 V; − 2 10 dB
RS = 2 kΩ; f = 1 kHz; B = 200 Hz
Notes
1. VBEsat decreases by about 1.7 mV/K with increasing temperature.
2. VBE decreases by about 2 mV/K with increasing temperature.
1999 Apr 15 3
MBH723
250
hFE
200
VCE = 5 V
150
100
50
0
10−2 10−1 1 10 102 IC (mA) 103
BC546A.
Fig.2 DC current gain; typical values.
MBH724
300
hFE VCE = 5 V
200
100
0
10−2 10−1 1 10 102 IC (mA) 103
BC546B; BC547B.
1999 Apr 15 4
MBH725
600
VCE = 5 V
hFE
400
200
0
10−2 10−1 1 10 102 IC (mA) 103
BC547C.
1999 Apr 15 5
PNP general purpose transistors BC556; BC557
FEATURES PINNING
• Low voltage (max. 65 V). 1 emitter
2 base
• General purpose switching and amplification.
DESCRIPTION handbook, halfpage1 3

2
PNP transistor in a TO-92; SOT54 plastic package. 3
NPN complements: BC546 and BC547. 2
1
MAM281
Fig.1 Simplified outline (TO-92; SOT54)

and symbol.
LIMITING VALUES
VCBO collector-base voltage open emitter
BC556 − −80 V
BC557 − −50 V
VCEO collector-emitter voltage open base
BC556 − −65 V
BC557 − −45 V
VEBO emitter-base voltage open collector − −5 V
IC collector current (DC) − −100 mA
ICM peak collector current − −200 mA
IBM peak base current − −200 mA
Ptot total power dissipation Tamb ≤ 25 °C − 500 mW
1999 Apr 15 2

Rth j-a thermal resistance from junction to ambient note 1 250 K/W
Note
CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

ICBO collector cut-off current IE = 0; VCB = −30 V − −1 −15 nA
IE = 0; VCB = −30 V; Tj = 150 °C − − −4 µA
IEBO emitter cut-off current IC = 0; VEB = −5 V − − −100 nA
hFE DC current gain IC = −2 mA; VCE = −5 V;
BC556 see Figs 2, 3 and 4 125 − 475
BC557 125 − 800
BC556A 125 − 250
BC556B; BC557B 220 − 475
BC557C 420 − 800
VCEsat collector-emitter saturation IC = −10 mA; IB = −0.5 mA − −60 −300 mV
voltage IC = −100 mA; IB = −5 mA − −180 −650 mV
VBEsat base-emitter saturation voltage IC = −10 mA; IB = −0.5 mA; note 1 − −750 − mV
IC = −100 mA; IB = −5 mA; note 1 − −930 − mV
VBE base-emitter voltage IC = −2 mA; VCE = −5 V; note 2 −600 −650 −750 mV
IC = −10 mA; VCE = −5 V; note 2 − − −820 mV
Cc collector capacitance IE = ie = 0; VCB = −10 V; f = 1 MHz − 3 − pF
Ce emitter capacitance IC = ic = 0; VEB = −0.5 V; f = 1 MHz − 10 − pF
fT transition frequency IC = −10 mA; VCE = −5 V; f = 100 MHz 100 − − MHz
F noise figure IC = −200 µA; VCE = −5 V; RS = 2 kΩ; − 2 10 dB
f = 1 kHz; B = 200 Hz
Notes
1. VBEsat decreases by about −1.7 mV/K with increasing temperature.
2. VBE decreases by about −2 mV/K with increasing temperature.
1999 Apr 15 3
MBH726
300
hFE
200
VCE = −5 V
100
0
−10−1 −1 −10 −102 IC (mA) −103
BC556A.
MBH727
400
hFE
VCE = −5 V
300
200
100
0
−10−2 −10−1 −1 −10 −102 IC (mA) −103
BC556B; BC557B.
1999 Apr 15 4
MBH728
600
hFE
500
VCE = −5 V
400
300
200
100
0
−10−2 −10−1 −1 −10 −102 IC (mA) −103
BC557C.
1999 Apr 15 5
NPN medium frequency transistors BF494; BF495
FEATURES PINNING
• Low voltage (max. 20 V). 1 base
2 emitter
• HF applications in radio and television receivers
• FM tuners
• Low noise AM mixer-oscillators handbook, halfpage1 3
2
• IF amplifiers in AM/FM receivers. 3
1
DESCRIPTION 2
MAM258
NPN medium frequency transistor in a TO-92; SOT54

plastic package. Fig.1 Simplified outline (TO-92; SOT54)
and symbol.
QUICK REFERENCE DATA

VCBO collector-base voltage open emitter − 30 V
VCEO collector-emitter voltage open base − 20 V
Ptot total power dissipation Tamb ≤ 25 °C − 300 mW
hFE DC current gain IC = 1 mA; VCE = 10 V
BF494 67 220
BF495 35 125
fT transition frequency IC = 1 mA; VCE = 10 V; f = 100 MHz 120 − MHz
1997 Jul 08 2
NPN medium frequency transistors BF494; BF495
LIMITING VALUES
VCBO collector-base voltage open emitter − 30 V
VCEO collector-emitter voltage open base − 20 V
VEBO emitter-base voltage open collector − 5 V
IC collector current (DC) − 30 mA
Ptot total power dissipation Tamb ≤ 25 °C; note 1 − 300 mW
Note

Rth j-a thermal resistance from junction to ambient note 1 420 K/W
Note
CHARACTERISTICS
Tamb = 25 °C unless otherwise specified.

ICBO collector cut-off current IE = 0; VCB = 20 V − 100 nA
IE = 0; VCB = 20 V; Tamb = 150 °C − 4 µA
IEBO emitter cut-off current IC = 0; VEB = 4 V − 100 nA
hFE DC current gain IC = 1 mA; VCE = 10 V
BF494 67 220
BF494B 100 220
BF495 35 125
BF495B 100 125
VBE base-emitter voltage IC = 1 mA; VCE = 10 V 650 740 mV
Cre feedback capacitance IC = 0; VCB = 10 V; f = 1 MHz − 1 pF
fT transition frequency IC = 1 mA; VCE = 10 V; f = 100 MHz 120 − MHz
1997 Jul 08 3
TIP29, TIP29A, TIP29B, TIP29C
NPN SILICON POWER TRANSISTORS
Copyright © 1997, Power Innovations Limited, UK JULY 1968 - REVISED MARCH 1997
● Designed for Complementary Use with the

TIP30 Series TO-220 PACKAGE
(TOP VIEW)
● 30 W at 25°C Case Temperature
● 1 A Continuous Collector Current B 1
● 3 A Peak Collector Current C 2
E 3
● Customer-Specified Selections Available
Pin 2 is in electrical contact with the mounting base.

MDTRACA
absolute maximum ratings at 25°C case temperature (unless otherwise noted)

RATING SYMBOL VALUE UNIT
TIP29 80
TIP29A 100
Collector-base voltage (IE = 0) VCBO V
TIP29B 120
TIP29C 140
TIP29 40
TIP29A 60
Collector-emitter voltage (IB = 0) VCEO V
TIP29B 80
TIP29C 100
Emitter-base voltage V EBO 5 V
Continuous collector current IC 1 A
Peak collector current (see Note 1) ICM 3 A
Continuous base current IB 0.4 A
Continuous device dissipation at (or below) 25°C case temperature (see Note 2) Ptot 30 W
Continuous device dissipation at (or below) 25°C free air temperature (see Note 3) Ptot 2 W
Unclamped inductive load energy (see Note 4) ½LIC 2 32 mJ
Operating junction temperature range Tj -65 to +150 °C
Storage temperature range Tstg -65 to +150 °C
Lead temperature 3.2 mm from case for 10 seconds TL 250 °C
NOTES: 1. This value applies for tp ≤ 0.3 ms, duty cycle ≤ 10%.
2. Derate linearly to 150°C case temperature at the rate of 0.24 W/°C.
3. Derate linearly to 150°C free air temperature at the rate of 16 mW/°C.
4. This rating is based on the capability of the transistor to operate safely in a circuit of: L = 20 mH, IB(on) = 0.4 A, R BE = 100 Ω,
VBE(off) = 0, RS = 0.1 Ω, VCC = 20 V.
PRODUCT INFORMATION
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
1
JULY 1968 - REVISED MARCH 1997
electrical characteristics at 25°C case temperature

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TIP29 40
Collector-emitter TIP29A 60
V (BR)CEO IC = 30 mA IB = 0 V
breakdown voltage TIP29B 80
(see Note 5)
TIP29C 100
VCE = 80 V VBE = 0 TIP29 0.2
Collector-emitter V CE = 100 V V BE = 0 TIP29A 0.2
ICES mA
cut-off current V CE = 120 V V BE = 0 TIP29B 0.2
V CE = 140 V V BE = 0 TIP29C 0.2
Collector cut-off VCE = 30 V IB = 0 TIP29/29A 0.3
ICEO mA
current V CE = 60 V IB = 0 TIP29B/29C 0.3
Emitter cut-off
IEBO VEB = 5V IC = 0 1 mA
current
Forward current VCE = 4V IC = 0.2 A 40
hFE (see Notes 5 and 6)
transfer ratio V CE = 4V IC = 1A 15 75
Collector-emitter
VCE(sat) IB = 125 mA IC = 1A (see Notes 5 and 6) 0.7 V
saturation voltage
Base-emitter
VBE VCE = 4V IC = 1A (see Notes 5 and 6) 1.3 V
voltage
Small signal forward
hfe VCE = 10 V IC = 0.2 A f = 1 kHz 20
current transfer ratio
|hfe| VCE = 10 V IC = 0.2 A f = 1 MHz 3
NOTES: 5. These parameters must be measured using pulse techniques, tp = 300 µs, duty cycle ≤ 2%.
6. These parameters must be measured using voltage-sensing contacts, separate from the current carrying contacts.
thermal characteristics
PARAMETER MIN TYP MAX UNIT
RθJC Junction to case thermal resistance 4.17 °C/W
RθJA Junction to free air thermal resistance 62.5 °C/W
resistive-load-switching characteristics at 25°C case temperature

†
ton Turn-on time IC = 1 A IB(on) = 0.1 A IB(off) = -0.1 A 0.5 µs
toff Turn-off time V BE(off) = -4.3 V RL = 30 Ω tp = 20 µs, dc ≤ 2% 2 µs
†
Voltage and current values shown are nominal; exact values vary slightly with transistor parameters.
PRODUCT INFORMATION
2
TYPICAL CHARACTERISTICS
TYPICAL DC CURRENT GAIN COLLECTOR-EMITTER SATURATION VOLTAGE

vs vs
COLLECTOR CURRENT BASE CURRENT
TCS631AD TCS631AE
1000 10
VCE(sat) - Collector-Emitter Saturation Voltage - V

VCE = 4 V IC = 100 mA
TC = 25°C IC = 300 mA
tp = 300 µs, duty cycle < 2% IC = 1 A
hFE - DC Current Gain
100 1·0
10 0·1
1 0·01
0·001 0·01 0·1 1·0 0·1 1·0 10 100 1000
IC - Collector Current - A IB - Base Current - mA
Figure 1. Figure 2.
BASE-EMITTER VOLTAGE
vs
COLLECTOR CURRENT
TCS631AF
1·0
VCE = 4 V
TC = 25°C
VBE - Base-Emitter Voltage - V
0·9
0·8
0·7
0·6
0·5
0·01 0·1 1·0
IC - Collector Current - A
Figure 3.
PRODUCT INFORMATION
3
MAXIMUM SAFE OPERATING REGIONS
MAXIMUM FORWARD-BIAS
SAFE OPERATING AREA
SAS631AC
100
tp = 300 µs, d = 0.1 = 10%
tp = 1 ms, d = 0.1 = 10%
tp = 10 ms, d = 0.1 = 10%
DC Operation
10
1·0
0·1
TIP29
TIP29A
TIP29B
TIP29C
0·01
1·0 10 100 1000
VCE - Collector-Emitter Voltage - V
Figure 4.
THERMAL INFORMATION
MAXIMUM POWER DISSIPATION

vs
CASE TEMPERATURE
TIS631AB
40
Ptot - Maximum Power Dissipation - W
30
20
10
0
0 25 50 75 100 125 150
TC - Case Temperature - °C
Figure 5.
PRODUCT INFORMATION
4
TIP30, TIP30A,TIP30B, TIP30C
PNP SILICON POWER TRANSISTORS
Copyright © 1997, Power Innovations Limited, UK JULY 1968 - REVISED MARCH 1997
● Designed for Complementary Use with the

TIP29 Series TO-220 PACKAGE
(TOP VIEW)
● 30 W at 25°C Case Temperature
● 1 A Continuous Collector Current B 1
● 3 A Peak Collector Current C 2
● Customer-Specified Selections Available E 3
Pin 2 is in electrical contact with the mounting base.

MDTRACA
absolute maximum ratings at 25°C case temperature (unless otherwise noted)

RATING SYMBOL VALUE UNIT
TIP30 -80
TIP30A -100
Collector-base voltage (IE = 0) VCBO V
TIP30B -120
TIP30C -140
TIP30 -40
TIP30A -60
Collector-emitter voltage (IB = 0) VCEO V
TIP30B -80
TIP30C -100
Emitter-base voltage V EBO -5 V
Continuous collector current IC -1 A
Peak collector current (see Note 1) ICM -3 A
Continuous base current IB -0.4 A
Continuous device dissipation at (or below) 25°C case temperature (see Note 2) Ptot 30 W
Continuous device dissipation at (or below) 25°C free air temperature (see Note 3) Ptot 2 W
Unclamped inductive load energy (see Note 4) ½LIC 2 32 mJ
Operating junction temperature range Tj -65 to +150 °C
Storage temperature range Tstg -65 to +150 °C
Lead temperature 3.2 mm from case for 10 seconds TL 250 °C
NOTES: 1. This value applies for tp ≤ 0.3 ms, duty cycle ≤ 10%.
2. Derate linearly to 150°C case temperature at the rate of 0.24 W/°C.
3. Derate linearly to 150°C free air temperature at the rate of 16 mW/°C.
4. This rating is based on the capability of the transistor to operate safely in a circuit of: L = 20 mH, IB(on) = -0.4 A, RBE = 100 Ω,
VBE(off) = 0, RS = 0.1 Ω, VCC = -20 V.
PRODUCT INFORMATION
Information is current as of publication date. Products conform to specifications in accordance
with the terms of Power Innovations standard warranty. Production processing does not
necessarily include testing of all parameters.
1
electrical characteristics at 25°C case temperature

TIP30 -40
Collector-emitter TIP30A -60
V (BR)CEO IC = -30 mA IB = 0 V
breakdown voltage TIP30B -80
(see Note 5)
TIP30C -100
VCE = -80 V VBE = 0 TIP30 -0.2
Collector-emitter V CE = -100 V V BE = 0 TIP30A -0.2
ICES mA
cut-off current V CE = -120 V V BE = 0 TIP30B -0.2
V CE = -140 V V BE = 0 TIP30C -0.2
Collector cut-off VCE = -30 V IB = 0 TIP30/30A -0.3
ICEO mA
current V CE = -60 V IB = 0 TIP30B/30C -0.3
Emitter cut-off
IEBO VEB = -5 V IC = 0 -1 mA
current
Forward current VCE = -4 V IC = -0.2 A 40
hFE (see Notes 5 and 6)
transfer ratio V CE = -4 V IC = -1 A 15 75
Collector-emitter
VCE(sat) IB = -125 mA IC = -1 A (see Notes 5 and 6) -0.7 V
saturation voltage
Base-emitter
VBE VCE = -4 V IC = -1 A (see Notes 5 and 6) -1.3 V
voltage
hfe VCE = -10 V IC = -0.2 A f = 1 kHz 20
|hfe| VCE = -10 V IC = -0.2 A f = 1 MHz 3
NOTES: 5. These parameters must be measured using pulse techniques, tp = 300 µs, duty cycle ≤ 2%.
6. These parameters must be measured using voltage-sensing contacts, separate from the current carrying contacts.
thermal characteristics
PARAMETER MIN TYP MAX UNIT
RθJC Junction to case thermal resistance 4.17 °C/W
RθJA Junction to free air thermal resistance 62.5 °C/W
resistive-load-switching characteristics at 25°C case temperature

†
ton Turn-on time IC = -1 A IB(on) = -0.1 A IB(off) = 0.1 A 0.3 µs
toff Turn-off time V BE(off) = 4.3 V RL = 30 Ω tp = 20 µs, dc ≤ 2% 1 µs
†
Voltage and current values shown are nominal; exact values vary slightly with transistor parameters.
PRODUCT INFORMATION
2
TYPICAL DC CURRENT GAIN COLLECTOR-EMITTER SATURATION VOLTAGE

vs vs
COLLECTOR CURRENT BASE CURRENT
TCS632AD TCS632AE
1000 -10
VCE(sat) - Collector-Emitter Saturation Voltage - V

VCE = -4 V IC = -100 mA
TC = 25°C IC = -300 mA
t p = 300 µs, duty cycle < 2% IC = -1 A
hFE - DC Current Gain
100 -1·0
10 -0·1
1 -0·01
-0·001 -0·01 -0·1 -1·0 -0·1 -1·0 -10 -100 -1000
IC - Collector Current - A IB - Base Current - mA
Figure 1. Figure 2.
BASE-EMITTER VOLTAGE
vs
COLLECTOR CURRENT
TCS632AF
-1·0
VCE = -4 V
TC = 25°C
VBE - Base-Emitter Voltage - V
-0·9
-0·8
-0·7
-0·6
-0·5
-0·01 -0·1 -1·0
Figure 3.
PRODUCT INFORMATION
3
MAXIMUM SAFE OPERATING REGIONS
MAXIMUM FORWARD-BIAS
SAFE OPERATING AREA
SAS632AB
-100
tp = 300 µs, d = 0.1 = 10%
tp = 1 ms, d = 0.1 = 10%
tp = 10 ms, d = 0.1 = 10%
DC Operation
-10
-1·0
-0·1
TIP30
TIP30A
TIP30B
TIP30C
-0·01
-1·0 -10 -100 -1000
VCE - Collector-Emitter Voltage - V
Figure 4.
THERMAL INFORMATION
MAXIMUM POWER DISSIPATION

vs
CASE TEMPERATURE
TIS631AB
40
Ptot - Maximum Power Dissipation - W
30
20
10
0
0 25 50 75 100 125 150
TC - Case Temperature - °C
Figure 5.
PRODUCT INFORMATION
4
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080D – SEPTEMBER 1978 – REVISED AUGUST 1996
D Low Power Consumption D Low Noise

D Wide Common-Mode and Differential Vn = 18 nV/√Hz Typ at f = 1 kHz
Voltage Ranges D High Input Impedance . . . JFET Input Stage
D Low Input Bias and Offset Currents D Internal Frequency Compensation
D Output Short-Circuit Protection D Latch-Up-Free Operation
D Low Total Harmonic Distortion D High Slew Rate . . . 13 V/ µs Typ
0.003% Typ D Common-Mode Input Voltage Range
Includes VCC +
description
The JFET-input operational amplifiers in the TL07_ series are designed as low-noise versions of the TL08_
series amplifiers with low input bias and offset currents and fast slew rate. The low harmonic distortion and low
noise make the TL07_ series ideally suited for high-fidelity and audio preamplifier applications. Each amplifier
features JFET inputs (for high input impedance) coupled with bipolar output stages integrated on a single
monolithic chip.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from – 40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of – 55°C to 125°C.
AVAILABLE OPTIONS
PACKAGE
VIOmax SMALL CHIP CERAMIC CERAMIC PLASTIC PLASTIC TSSOP FLAT
TA
AT 25°C OUTLINE CARRIER DIP DIP DIP DIP PACKAGE PACKAGE
(D)† (FK) (J) (JG) (N) (P) (PW) (W)
10 mV TL071CD TL071CP TL071CPWLE
6 mV TL071ACD — — — — TL071ACP — —
3 mV TL071BCD TL071BCP —
10 mV TL072CD TL072CP TL072CPWLE
0°C to
6 mV TL072ACD — — — — TL072ACP — —
70°C
3 mV TL072BCD TL072BCP —
10 mV TL074CD TL074CN TL074CPWLE
6 mV TL074ACD — — — TL074ACN — — —
3 mV TL074BCD TL074BCN —
TL071ID — TL071IP
– 40°C to
6 mV TL072ID — — — — TL072IP — —
85°C
TL074ID TL074IN —
6 mV TL071MFK — TL071MJG — — —
– 55°C to
6 mV — TL072MFK — TL072MJG — TL072MP — —
125 C
125°C
9 mV TL074MFK TL074MJ — TL074MN — TL074MW
† The D package is available taped and reeled. Add the suffix R to the device type (e.g., TL071CDR). The PW package is only available left-ended
taped and reeled (e.g., TL072CPWLE).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Copyright  1996, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
TL071, TL071A, TL071B TL072, TL072A, TL072B TL074, TL074A, TL074B

D, JG, P, OR PW PACKAGE D, JG, P, OR PW PACKAGE D, J, N, OR PW PACKAGE
(TOP VIEW) (TOP VIEW) TL074 . . . W PACKAGE
(TOP VIEW)
OFFSET N1 1 8 NC 1OUT 1 8 VCC +
IN – 2 7 VCC + 1IN – 2 7 2OUT 1OUT 1 14 4OUT
IN + 3 6 OUT 1IN + 3 6 2IN – 1IN – 2 13 4IN –
VCC – 4 5 OFFSET N2 VCC – 4 5 2IN + 1IN + 3 12 4IN +
VCC + 4 11 VCC –
2IN + 5 10 3IN +
2IN – 6 9 3IN –
2OUT 7 8 3OUT
TL071 TL072 TL074

FK PACKAGE FK PACKAGE FK PACKAGE
(TOP VIEW) (TOP VIEW) (TOP VIEW)
OFFSET N1
VCC +
1OUT
1OUT
4OUT
1IN –
4IN –
NC
NC
NC
NC
NC
NC
NC
NC
3 2 1 20 19 3 2 1 20 19
NC 4 18 NC 1IN+ 4 18 4IN+
3 2 1 20 19 1IN – 5 17 2OUT NC 5 17 NC
NC 4 18 NC NC 6 16 NC VCC+ 6 16 VCC –
IN – 5 17 VCC + 1IN + 7 15 2IN – NC 7 15 NC
NC 6 16 NC NC 8 14 NC 2IN+ 8 14 3IN+
IN + 7 15 OUT 9 10 11 12 13 9 10 11 12 13
NC 8 14 NC
VCC –
2IN–
3IN–
2IN+
NC
NC
NC
2OUT
NC
3OUT
9 10 11 12 13
VCC –
OFFSET N2
NC
NC
NC
NC – No internal connection
symbols
TL071
TL072 (each amplifier)
OFFSET N1 TL074 (each amplifier)
IN + + IN + +
OUT OUT
IN – – IN – –
OFFSET N2
2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
schematic (each amplifier)
VCC +
IN +
IN – 64 Ω
128 Ω
OUT
64 Ω
C1
18 pF
1080 Ω
ÎÎÎ
1080 Ω
ÁÁÁÁÁ ÁÁÁ
VCC –
ÁÁÁÁÁ OFFSET
ÁÁÁ OFFSET
ÁÁÁÁÁ ÁÁÁ
NULL NULL
(N1) (N2)
TL071 Only
All component values shown are nominal.
COMPONENT COUNT†
COMPONENT
TL071 TL072 TL074
TYPE
Resistors 11 22 44
Transistors 14 28 56
JFET 2 4 6
Diodes 1 2 4
Capacitors 1 2 4
epi-FET 1 2 4
† Includes bias and trim circuitry

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC + (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Supply voltage, VCC – (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 18 V
Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 30 V
Input voltage, VI (see Notes 1 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±15 V
Duration of output short circuit (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, TA: C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: J, JG, or W package . . . . . . . . . . . . 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, P, or PW package . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between VCC+ and VCC – .
2. Differential voltages are at IN+ with respect to IN –.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to ground or to either supply. Temperature and /or supply voltages must be limited to ensure that the
dissipation rating is not exceeded.
DISSIPATION RATING TABLE

TA ≤ 25°C DERATING DERATE TA = 70°C TA = 85°C TA = 125°C
PACKAGE
POWER RATING FACTOR ABOVE TA POWER RATING POWER RATING POWER RATING
D (8 pin) 680 mW 5.8 mW/°C 33°C 465 mW 378 mW N/A
D (14 pin) 680 mW 7.6 mW/°C 60°C 604 mW 490 mW N/A
FK 680 mW 11.0 mW/°C 88°C 680 mW 680 mW 273 mW
J 680 mW 11.0 mW/°C 88°C 680 mW 680 mW 273 mW
JG 680 mW 8.4 mW/°C 69°C 672 mW 546 mW 210 mW
N 680 mW 9.2 mW/°C 76°C 680 mW 597 mW N/A
P 680 mW 8.0 mW/°C 65°C 640 mW 520 mW N/A
PW (8 pin) 525 mW 4.2 mW/°C 70°C 525 mW N/A N/A
PW (14 pin) 700 mW 5.6 mW/°C 70°C 700 mW N/A N/A
W 680 mW 8.0 mW/°C 65°C 640 mW 520 mW 200 mW

electrical characteristics, VCC± = ±15 V (unless otherwise noted)
TL071C TL071AC TL071BC TL071I
TL072C TL072AC TL072BC TL072I
PARAMETER TEST CONDITIONS† TA‡ TL074C TL074AC TL074BC TL074I UNIT
MIN TYP MAX MIN TYP MAX MIN TYP MAX MIN TYP MAX
25°C 3 10 3 6 2 3 3 6
VIO Input offset voltage VO = 0
0, RS = 50 Ω mV
Full range 13 7.5 5 8
Temperature
αVIO coefficient of input VO = 0, RS = 50 Ω Full range 18 18 18 18 µV/°C
offset voltage
25°C 5 100 5 100 5 100 5 100 pA
IIO Input offset current VO = 0
Full range 10 2 2 2 nA
25°C 65 200 65 200 65 200 65 200 pA
IIB Input bias current§ VO = 0
Full range 7 7 7 20 nA
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
–12
12 –12
12 –12
12 –12
12
Common-mode
Common mode
VICR 25°C ±11 to ±11 to ±11 to ±11 to V
in ut voltage range
input
15 15 15 15

Maximum peakeak RL = 10 kΩ 25°C ±12 ±13.5 ±12 ±13.5 ±12 ±13.5 ±12 ±13.5
VOM output voltage RL ≥ 10 kΩ ±12 ±12 ±12 ±12 V
swing Full range
RL ≥ 2 kΩ ±10 ±10 ±10 ±10
Large-signal 25°C 25 200 50 200 50 200 50 200
AVD differential voltage VO = ±10 V
V, RL ≥ 2 kΩ V/mV
Full range 15 25 25 25
TL072A, TL072B, TL074, TL074A, TL074B

amplification
Unity-gain
B1 25°C 3 3 3 3 MHz
bandwidth

ri Input resistance 25°C 1012 1012 1012 1012 Ω
Common-mode VIC = VICRmin,
TL071, TL071A, TL071B, TL072

CMRR 25°C 70 100 75 100 75 100 75 100 dB
rejection ratio VO = 0, RS = 50 Ω
Supply-voltage
VCC = ± 9 V to ± 15 V,
kSVR rejection ratio 25°C 70 100 80 100 80 100 80 100 dB
VO = 0, RS = 50 Ω
(∆VCC ± /∆VIO)
Supply
y current
ICC VO = 0
0, No load 25°C 14
1.4 25
2.5 14
1.4 25
2.5 14
1.4 25
2.5 14
1.4 25
2.5 mA
(each amplifier)
Crosstalk
VO1/ VO2 AVD = 100 25°C 120 120 120 120 dB
attenuation
† All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified.
‡ Full range is TA = 0°C to 70°C for TL07_C,TL07_AC, TL07_BC and is TA = – 40°C to 85°C for TL07_I.
§ Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 4. Pulse techniques must be used
that maintain the junction temperature as close to the ambient temperature as possible.
5
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
electrical characteristics, VCC ± = ± 15 V (unless otherwise noted)

TL071M
TL074M
PARAMETER TEST CONDITIONS† TA‡ TL072M UNIT
MIN TYP MAX MIN TYP MAX
25°C 3 6 3 9
VIO Input offset voltage VO = 0
0, RS = 50 Ω mV
Full range 9 15
Temperature coefficient of
αVIO VO = 0, RS = 50 Ω Full range 18 18 µV/°C
input offset voltage
25°C 5 100 5 100 pA
IIO Input offset current VO = 0
Full range 20 20 nA
25°C 65 200 65 200 pA
IIB Input bias current‡ VO = 0
50 50 nA
–12 –12
Common-mode input
VICR 25°C ±11 to ±11 to V
voltage range
15 15
RL = 10 kΩ 25°C ±12 ±13.5 ±12 ±13.5
Maximum
M i peakk output
t t
VOM RL ≥ 10 kΩ ±12 ±12 V
voltage swing Full range
RL ≥ 2 kΩ ±10 ±10
Large-signal
g g differential 25°C 35 200 35 200
AVD VO = ±10 V
V, RL ≥ 2 kΩ V/mV
voltage amplification 15 15
B1 Unity-gain bandwidth TA = 25°C 3 3 MHz
ri Input resistance TA = 25°C 1012 1012 Ω
Common-mode rejection VIC = VICRmin,
CMRR 25°C 80 86 80 86 dB
ratio VO = 0, RS = 50 Ω
Supply-voltage rejection VCC = ± 9 V to ± 15 V,
kSVR 25°C 80 86 80 86 dB
ratio (∆VCC ± /∆VIO) VO = 0, RS = 50 Ω
Supply current (each
ICC VO = 0, No load 25°C 1.4 2.5 1.4 2.5 mA
amplifier)
VO1/ VO2 Crosstalk attenuation AVD = 100 25°C 120 120 dB
† Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in
Figure 4. Pulse techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible.
‡ All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. Full range is
TA = – 55°C to 125°C.

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
operating characteristics, VCC ± = ± 15 V, TA = 25°C

TL07xM ALL OTHERS
PARAMETER TEST CONDITIONS UNIT
MIN TYP MAX MIN TYP MAX
VI = 10 V, RL = 2 kΩ,
SR Slew rate at unity gain 5 13 8 13 V/µs
CL = 100 pF, See Figure 1
Rise time overshoot VI = 20 mV,, RL = 2 kΩ,, 0.1 0.1 µs
tr
factor CL = 100 pF, See Figure 1 20% 20%
Equivalent
q input noise f = 1 kHz 18 18 nV/√Hz
Vn RS = 20 Ω
voltage f = 10 Hz to 10 kHz 4 4 µV
Equivalent input noise
In RS = 20 Ω, f = 1 kHz 0.01 0.01 pA/√Hz
current
VIrms = 6 V, AVD = 1,
Total harmonic
THD RL ≥ 2 kΩ, RS ≤ 1 kΩ , 0.003% 0.003%
distortion
f = 1 kHz
PARAMETER MEASUREMENT INFORMATION
10 kΩ
–
VO
1 kΩ –
VI + VI
VO
CL = 100 pF RL = 2 kΩ +
RL CL = 100 pF
Figure 1. Unity-Gain Amplifier Figure 2. Gain-of-10 Inverting Amplifier
– TL071
IN –
OUT
+ N2
IN +
N1
100 kΩ
1.5 kΩ
VCC –
Figure 3. Input Offset Voltage Null Circuit

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
Table of Graphs
FIGURE
IIB Input bias current vs Free-air temperature 4
vs Frequency 5, 6, 7
vs Free-air temperature 8
VOM Maximum output voltage
vs Load resistance 9
vs Supply voltage 10
AVD Large signal differential voltage amplification
Large-signal
vs Frequency 12
Phase shift vs Frequency 12
Normalized unity-gain bandwidth vs Free-air temperature 13
Normalized phase shift vs Free-air temperature 13
CMRR Common-mode rejection ratio vs Free-air temperature 14
vs Supply
y voltage
g 15
ICC Supply current
PD Total power dissipation vs Free-air temperature 17
Normalized slew rate vs Free-air temperature 18
Vn Equivalent input noise voltage vs Frequency 19
THD Total harmonic distortion vs Frequency 20
Large-signal pulse response vs Time 21
VO Output voltage vs Elapsed time 22

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
TYPICAL CHARACTERISTICS†
INPUT BIAS CURRENT MAXIMUM PEAK OUTPUT VOLTAGE

vs vs
FREE-AIR TEMPERATURE FREQUENCY
100
± 15
VCC± = ± 15 V VCC ± = ± 15 V RL = 10 kΩ
VOM – Maximum Peak Output Voltage – V

TA = 25°C
± 12.5 See Figure 2
ÎÎÎÎÎ
IB Input Bias Current – nA
10
ÎÎÎÎÎ
± 10 VCC ± = ± 10 V
1 ± 7.5
±5 VCC ± = ± 5 V
0.1
IIIB–
ÁÁÁ
ÁÁÁ
± 2.5
0.01 VOM 0
– 75 – 50 – 25 0 25 50 75 100 125 100 1k 10 k 100 k 1M 10 M
TA – Free-Air Temperature – °C f – Frequency – Hz
Figure 4 Figure 5
MAXIMUM PEAK OUTPUT VOLTAGE MAXIMUM PEAK OUTPUT VOLTAGE

vs vs
FREQUENCY FREQUENCY
± 15 ± 15
ÎÎÎÎÎ ÎÎÎÎ
RL = 2 kΩ VCC ± = ± 15 V
ÎÎÎÎÎ ÎÎÎÎ
TA = 25°C RL = 2 kΩ
± 12.5 VCC ± = ± 15 V ± 12.5
TA = 25°C
See Figure 2 See Figure 2
± 10 ± 10
ÎÎÎÎÎ
ÎÎÎÎÎ
TA = – 55°C
VCC ± = ± 10 V
± 7.5 ± 7.5
TA = 125°C
±5 ±5
ÁÁ VCC ± = ± 5 V
ÁÁÁ
ÁÁ ± 2.5
ÁÁÁ ± 2.5
VOM
VOM
ÁÁ 0
100 1k 10 k 100 k 1M 10 M
ÁÁÁ 0
10 k 40 k 100 k 400 k 1 M 4M 10 M
f – Frequency – Hz f – Frequency – Hz
Figure 6 Figure 7
† Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
MAXIMUM PEAK OUTPUT VOLTAGE MAXIMUM PEAK OUTPUT VOLTAGE

vs vs
FREE-AIR TEMPERATURE LOAD RESISTANCE
± 15 ± 15
RL = 10 kΩ VCC ± = ± 15 V
ÎÎÎÎ

TA = 25°C
± 12.5 ± 12.5
ÎÎÎÎ
See Figure 2
RL = 2 kΩ
± 10 ± 10
± 7.5 ± 7.5
±5 ±5
ÁÁ ± 2.5
ÁÁ ± 2.5
ÁÁ ÁÁ
VOM
VCC ± = ± 15 V VOM
See Figure 2
0 0
– 75 – 50 – 25 0 25 50 75 100 125 0.1 0.2 0.4 0.7 1 2 4 7 10
TA – Free-Air Temperature – °C RL – Load Resistance – kΩ
Figure 8 Figure 9
LARGE-SIGNAL
MAXIMUM PEAK OUTPUT VOLTAGE DIFFERENTIAL VOLTAGE AMPLIFICATION
vs vs
SUPPLY VOLTAGE FREE-AIR TEMPERATURE
± 15 1000
RL = 10 kΩ
TA = 25°C 400
± 12.5
VD – Large-Signal Differential
Voltage Amplification – V/mV
200
± 10 100
40
± 7.5
20
±5 10
ÁÁ
AVD
ÁÁ
4 VCC ± = ± 15 V
A
± 2.5
VOM
VO = ± 10 V
ÁÁ
2 RL = 2 kΩ
0 1
0 2 4 6 8 10 12 14 16 – 75 – 50 – 25 0 25 50 75 100 125
|VCC ±| – Supply Voltage – V TA – Free-Air Temperature – °C
Figure 10 Figure 11

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
AND PHASE SHIFT
vs
FREQUENCY
106
VCC± = ± 5 V to ± 15 V
RL = 2 kΩ
VD – Large-Signal Differential 105 TA = 25°C
Voltage Amplification
104 0°
Phase Shift
Differential
Voltage
Amplification
103 45°
102 90°
AVD
Phase Shift
A
101 135°
1 180°
1 10 100 1k 10 k 100 k 1M 10 M
f – Frequency – Hz
Figure 12
NORMALIZED UNITY-GAIN BANDWIDTH

AND PHASE SHIFT
vs
FREE-AIR TEMPERATURE
1.3 1.03
Unity-Gain Bandwidth
Normalized Unity-Gain Bandwidth
1.2 1.02
Normalized Phase Shift
1.1 1.01
Phase Shift
1 1
0.9 0.99
VCC ± = ± 15 V
0.8 0.98
RL = 2 kΩ
f = B1 for Phase Shift
0.7 0.97
– 75 – 50 – 25 0 25 50 75 100 125
TA – Free-Air Temperature – °C
Figure 13

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
COMMON-MODE REJECTION RATIO SUPPLY CURRENT PER AMPLIFIER

vs vs
FREE-AIR TEMPERATURE SUPPLY VOLTAGE
89 2
VCC ± = ± 15 V
CMRR – Common-Mode Rejection Ratio – dB
TA = 25°C
ICC± – Supply Current Per Amplifier – mA

RL = 10 kΩ 1.8 No Signal
88 No Load
1.6
1.4
87
1.2
86 1
0.8
85
0.6
ÁÁ 0.4
ÁÁ
84
I CC 0.2
83 0
– 75 – 50 – 25 0 25 50 75 100 125 0 2 4 6 8 10 12 14 16
TA – Free-Air Temperature – °C |VCC ±| – Supply Voltage – V
Figure 14 Figure 15
SUPPLY CURRENT PER AMPLIFIER TOTAL POWER DISSIPATION

vs vs
FREE-AIR TEMPERATURE FREE-AIR TEMPERATURE
2 250
VCC ± = ± 15 V VCC ± = ± 15 V
ICC± – Supply Current Per Amplifier – mA
1.8 No Signal 225 No Signal

PD – Total Power Dissipation – mW
No Load No Load
1.6 200
1.4 175
TL074
1.2 150
1 125
ÎÎÎÎ
ÎÎÎÎ
0.8 100
TL072
ÁÁÁ
0.6 75
ÁÁÁ
TL071
PD
0.4 50
ÁÁÁ
I CC
0.2 25
0 0
– 75 – 50 – 25 0 25 50 75 100 125 – 75 – 50 – 25 0 25 50 75 100 125
TA – Free-Air Temperature – °C TA – Free-Air Temperature – °C
Figure 16 Figure 17

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
NORMALIZED SLEW RATE
ÁÁÁ
EQUIVALENT INPUT NOISE VOLTAGE
vs vs
ÁÁÁ
FREE-AIR TEMPERATURE FREQUENCY
ÁÁÁ
1.15 50
nV/ Hz
VCC ± = ± 15 V
n – Equivalent Input Noise Voltage – nV/Hz

VCC ± = ± 15 V
ÁÁÁ
AVD = 10
RL = 2 kΩ RS = 20 Ω
1.10
Normalized Slew Rate – V/µ s
CL = 100 pF 40 TA = 25°C
1.05
30
20
0.95
10
0.90
Vn
V
0.85 0
– 75 – 50 – 25 0 25 50 75 100 125 10 40 100 400 1 k 4 k 10 k 40 k 100 k
TA – Free-Air Temperature – °C f – Frequency – Hz
Figure 18 Figure 19
TOTAL HARMONIC DISTORTION

vs VOLTAGE-FOLLOWER
FREQUENCY LARGE-SIGNAL PULSE RESPONSE
1 6
VCC ± = ± 15 V VCC ± = ± 15 V
VI and VO – Input and Output Voltages – V
AVD = 1 RL = 2 kΩ
THD – Total Harmonic Distortion – %
0.4
VI(RMS) = 6 V 4 CL = 100 pF
TA = 25°C TA = 25°C
Output
0.1 2
0.04
0
0.01
ÁÁ –2
ÎÎÎ
0.004 ÁÁ
ÁÁ –4
ÎÎÎ Input
0.001
100 400 1k 4 k 10 k 40 k 100 k
ÁÁ –6
0 0.5 1 1.5 2 2.5 3 3.5
f – Frequency – Hz t – Time – µs
Figure 20 Figure 21

TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
OUTPUT VOLTAGE
vs
ELAPSED TIME
28
24
Overshoot
O – Output Voltage – mV
20
90%
16
12
ÁÁÁ
8
ÁÁÁ
VO
4
V
10% VCC ± = ± 15 V
0 RL = 2 kΩ
tr
TA = 25°C
–4
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
t – Elapsed Time – µs
Figure 22

Order this document by MC1496/D

BALANCED

MODULATORS/DEMODULATORS
These devices were designed for use where the output voltage is a
product of an input voltage (signal) and a switching function (carrier). Typical SEMICONDUCTOR
applications include suppressed carrier and amplitude modulation, TECHNICAL DATA
synchronous detection, FM detection, phase detection, and chopper
applications. See Motorola Application Note AN531 for additional design
information.
• Excellent Carrier Suppression –65 dB typ @ 0.5 MHz D SUFFIX
Excellent Carrier Suppression –50 dB typ @ 10 MHz PLASTIC PACKAGE
CASE 751A
• Adjustable Gain and Signal Handling 14 (SO–14)
• Balanced Inputs and Outputs 1
• High Common Mode Rejection –85 dB typical
P SUFFIX
This device contains 8 active transistors. PLASTIC PACKAGE 14
CASE 646
1
PIN CONNECTIONS
Signal Input 1 14 VEE

Figure 1. Suppressed Gain Adjust 2 13 N/C
Carrier Output
Waveform Gain Adjust 3 12 Output
Signal Input 4 11 N/C
IC = 500 kHz, IS = 1.0 kHz Bias 5 10 Carrier Input

Output 6 9 N/C
N/C 7 8 Input Carrier
0
IC = 500 kHz ORDERING INFORMATION

IS = 1.0 kHz
Log Scale Id
Operating
20 Device Temperature Range Package
Figure 2. Suppressed
Carrier Spectrum MC1496D SO–14
TA = 0°C to +70°C
MC1496P Plastic DIP
40 MC1496BP TA = –40°C to +125°C Plastic DIP
60
499 kHz 500 kHz 501 kHz
Figure 4. Amplitude–Modulation Spectrum

10
IC = 500 kHz
8.0 IS = 1.0 kHz
Linear Scale
6.0
Figure 3. Amplitude
Modulation Output 4.0
Waveform
2.0
IC = 500 kHz 0
IS = 1.0 kHz 499 kHz 500 kHz 501 kHz
 Motorola, Inc. 1996 Rev 4

MOTOROLA ANALOG IC DEVICE DATA 1
MC1496, B
MAXIMUM RATINGS (TA = 25°C, unless otherwise noted.)

Rating Symbol Value Unit
Applied Voltage ∆V 30 Vdc
(V6 – V8, V10 – V1, V12 – V8, V12 – V10, V8 – V4,
V8 – V1, V10 – V4, V6 – V10, V2 – V5, V3 – V5)
Differential Input Signal V8 – V10 +5.0 Vdc
V4 – V1 ±(5 + I5Re)
Maximum Bias Current I5 10 mA
Thermal Resistance, Junction–to–Air RθJA 100 °C/W
Plastic Dual In–Line Package
Operating Temperature Range TA 0 to +70 °C
Storage Temperature Range Tstg –65 to +150 °C
NOTE: ESD data available upon request.
ELECTRICAL CHARACTERISTICS (VCC = 12 Vdc, VEE = –8.0 Vdc, I5 = 1.0 mAdc, RL = 3.9 kΩ, Re = 1.0 kΩ, TA = Tlow to Thigh,
all input and output characteristics are single–ended, unless otherwise noted.)
Characteristic Fig. Note Symbol Min Typ Max Unit
Carrier Feedthrough 5 1 VCFT µVrms
VC = 60 mVrms sine wave and fC = 1.0 kHz – 40 –
offset adjusted to zero fC = 10 MHz – 140 –
VC = 300 mVpp square wave: mVrms
offset adjusted to zero fC = 1.0 kHz – 0.04 0.4
offset not adjusted fC = 1.0 kHz – 20 200
Carrier Suppression 5 2 VCS dB
fS = 10 kHz, 300 mVrms
fC = 500 kHz, 60 mVrms sine wave 40 65 –
fC = 10 MHz, 60 mVrms sine wave – 50 – k
Transadmittance Bandwidth (Magnitude) (RL = 50 Ω) 8 8 BW3dB MHz
Carrier Input Port, VC = 60 mVrms sine wave – 300 –
fS = 1.0 kHz, 300 mVrms sine wave
Signal Input Port, VS = 300 mVrms sine wave – 80 –
|VC| = 0.5 Vdc
Signal Gain (VS = 100 mVrms, f = 1.0 kHz; | VC|= 0.5 Vdc) 10 3 AVS 2.5 3.5 – V/V
Single–Ended Input Impedance, Signal Port, f = 5.0 MHz 6 –
Parallel Input Resistance rip – 200 – kΩ
Parallel Input Capacitance cip – 2.0 – pF
Single–Ended Output Impedance, f = 10 MHz 6 –
Parallel Output Resistance rop – 40 – kΩ
Parallel Output Capacitance coo – 5.0 – pF
Input Bias Current 7 – µA
I
bS
+ I1 )2 I4 ; I
bC
+ I8 )2 I10 IbS
IbC
–
–
12
12
30
30
Input Offset Current 7 – µA

IioS = I1–I4; IioC = I8–I10  IioS – 0.7 7.0
IioC – 0.7 7.0
Average Temperature Coefficient of Input Offset Current 7 –  TCIio – 2.0 – nA/°C
(TA = –55°C to +125°C)
Output Offset Current (I6–I9) 7 –  Ioo – 14 80 µA
Average Temperature Coefficient of Output Offset Current 7 –  TCIoo – 90 – nA/°C
(TA = –55°C to +125°C)
Common–Mode Input Swing, Signal Port, fS = 1.0 kHz 9 4 CMV – 5.0 – Vpp
Common–Mode Gain, Signal Port, fS = 1.0 kHz, |VC|= 0.5 Vdc 9 – ACM – –85 – dB
Common–Mode Quiescent Output Voltage (Pin 6 or Pin 9) 10 – Vout – 8.0 – Vpp
Differential Output Voltage Swing Capability 10 – Vout – 8.0 – Vpp
Power Supply Current I6 +I12 7 6 ICC – 2.0 4.0 mAdc
Power Supply Current I14 IEE – 3.0 5.0
DC Power Dissipation 7 5 PD – 33 – mW
2 MOTOROLA ANALOG IC DEVICE DATA

MC1496, B
GENERAL OPERATING INFORMATION

Carrier Feedthrough switching devices. This swing is variable depending on the
Carrier feedthrough is defined as the output voltage at particular circuit and biasing conditions chosen.
carrier frequency with only the carrier applied (signal
Power Dissipation
voltage = 0).
Power dissipation, PD, within the integrated circuit package
Carrier null is achieved by balancing the currents in the
should be calculated as the summation of the voltage–current
differential amplifier by means of a bias trim potentiometer
products at each port, i.e. assuming V12 = V6, I5 = I6 = I12
(R1 of Figure 5).
and ignoring base current, PD = 2 I5 (V6 – V14) + I5)
Carrier Suppression V5 – V14 where subscripts refer to pin numbers.
Carrier suppression is defined as the ratio of each
Design Equations
sideband output to carrier output for the carrier and signal
The following is a partial list of design equations needed to
voltage levels specified.
operate the circuit with other supply voltages and input
Carrier suppression is very dependent on carrier input
conditions.
level, as shown in Figure 22. A low value of the carrier does
not fully switch the upper switching devices, and results in A. Operating Current
lower signal gain, hence lower carrier suppression. A higher The internal bias currents are set by the conditions at Pin 5.
than optimum carrier level results in unnecessary device and Assume:
I5 = I6 = I12,
circuit carrier feedthrough, which again degenerates the
suppression figure. The MC1496 has been characterized IB ttIC for all transistors
with a 60 mVrms sinewave carrier input signal. This level then :
provides optimum carrier suppression at carrier frequencies
in the vicinity of 500 kHz, and is generally recommended for R5 + **f *
V
I5
500 W
where: R5 is the resistor between
where: Pin 5 and ground
balanced modulator applications. where: φ = 0.75 at TA = +25°C
Carrier feedthrough is independent of signal level, VS. The MC1496 has been characterized for the condition
Thus carrier suppression can be maximized by operating I5 = 1.0 mA and is the generally recommended value.
with large signal levels. However, a linear operating mode
B. Common–Mode Quiescent Output Voltage
must be maintained in the signal–input transistor pair – or
harmonics of the modulating signal will be generated and V6 = V12 = V+ – I5 RL
appear in the device output as spurious sidebands of the
Biasing
suppressed carrier. This requirement places an upper limit on
The MC1496 requires three dc bias voltage levels which
input–signal amplitude (see Figure 20). Note also that an
must be set externally. Guidelines for setting up these three
optimum carrier level is recommended in Figure 22 for good
levels include maintaining at least 2.0 V collector–base bias
carrier suppression and minimum spurious sideband
on all transistors while not exceeding the voltages given in
generation.
the absolute maximum rating table;
At higher frequencies circuit layout is very important in
30 Vdc w
[(V6, V12) – (V8, V10)] w 2 Vdc
order to minimize carrier feedthrough. Shielding may be
30 Vdc w
[(V8, V10) – (V1, V4)] w 2.7 Vdc
necessary in order to prevent capacitive coupling between
the carrier input leads and the output leads.
30 Vdc w
[(V1, V4) – (V5)] w2.7 Vdc
The foregoing conditions are based on the following
Signal Gain and Maximum Input Level approximations:
Signal gain (single–ended) at low frequencies is defined
V6 = V12, V8 = V10, V1 = V4
as the voltage gain,
Bias currents flowing into Pins 1, 4, 8 and 10 are transistor
A
VS
+ + )
Vo
V
R
L
R e 2r e
where r e +
26 mV
I5(mA)
base currents and can normally be neglected if external bias
S dividers are designed to carry 1.0 mA or more.
A constant dc potential is applied to the carrier input terminals Transadmittance Bandwidth
to fully switch two of the upper transistors “on” and two Carrier transadmittance bandwidth is the 3.0 dB bandwidth
transistors “off” (VC = 0.5 Vdc). This in effect forms a cascode of the device forward transadmittance as defined by:
differential amplifier.
Linear operation requires that the signal input be below a
critical value determined by RE and the bias current I5.
g21C +
i o (each sideband)
v s (signal)  Vo + 0
VS p I5 RE (Volts peak) Signal transadmittance bandwidth is the 3.0 dB bandwidth
of the device forward transadmittance as defined by:
g21S + vos (signal)  Vc + 0.5 Vdc, +0

Note that in the test circuit of Figure 10, VS corresponds to a i (signal)
maximum value of 1.0 V peak. Vo
Common Mode Swing
The common–mode swing is the voltage which may be
applied to both bases of the signal differential amplifier,
without saturating the current sources or without saturating
the differential amplifier itself by swinging it into the upper

MC1496, B
Coupling and Bypass Capacitors Signal Port Stability

Capacitors C1 and C2 (Figure 5) should be selected for a Under certain values of driving source impedance,
reactance of less than 5.0 Ω at the carrier frequency. oscillation may occur. In this event, an RC suppression
network should be connected directly to each input using
Output Signal
short leads. This will reduce the Q of the source–tuned
The output signal is taken from Pins 6 and 12 either circuits that cause the oscillation.
balanced or single–ended. Figure 11 shows the output levels
Signal Input
of each of the two output sidebands resulting from variations (Pins 1 and 4)
in both the carrier and modulating signal inputs with a 510
single–ended output connection. 10 pF
Negative Supply
VEE should be dc only. The insertion of an RF choke in
An alternate method for low–frequency applications is to
series with VEE can enhance the stability of the internal
insert a 1.0 kΩ resistor in series with the input (Pins 1, 4). In
current sources.
this case input current drift may cause serious degradation of
carrier suppression.
TEST CIRCUITS
Figure 5. Carrier Rejection and Suppression Figure 6. Input–Output Impedance
VCC
12 Vdc Re = 1.0 k
1.0 k 1.0 k
Re 2 3
RL RL 0.5 V 8
51 C1
1.0 k 3.9 k 3.9 k + – 10
C2 0.1 µF 2 3 + Vo
Carrier 8 1 MC1496 6 Zout
Input 0.1 µF 10 I9 I6 Zin 4 – Vo
VC + Vo 12
1 MC1496 6
VS – Vo 14 5
Modulating 4 12
Signal Input 14 5 6.8 k
10 k 10 k 51 51
50 k I5 6.8 k
I10 –8.0 Vdc
R1 V–
Carrier Null
–8.0 Vdc NOTE: Shielding of input and output leads may be needed
VEE to properly perform these tests.
Figure 7. Bias and Offset Currents Figure 8. Transconductance Bandwidth

VCC VCC
12 Vdc 1.0 k 1.0 k 12 Vdc
Re = 1.0 k Re 2.0 k
1.0 k 51 0.1 µF 1.0 k 0.01
2 3 Carrier 2 3 µF
2.0 k 8 50 50
I7 8 I6 Input 0.1 µF
I8 10 10 + Vo
VC
1.0 k 6 1 MC1496 6
I1 1 MC1496 I9 VS
4 – Vo
I4 4 Modulating 12
12
Signal Input 5
14 5 10 k 10 k 51 51 14
I10 50 k 6.8 k
6.8 k
V–
Carrier Null
–8.0 Vdc –8.0 Vdc
VEE VEE

MC1496, B
Figure 9. Common Mode Gain Figure 10. Signal Gain and Output Swing
VCC VCC
12 Vdc 12 Vdc
Re = 1.0 k Re = 1.0 k
1.0 k 1.0 k
3.9 k 3.9 k 3.9 k 3.9 k
0.5 V 8 2 3 0.5 V 2 3
1.0 k 8
+ – 10 + – 10
1.0 k + Vo + Vo
1 MC1496 6 1 MC1496 6
VS 4 – Vo VS – Vo
12 4 12
14 5 14 5
50
6.8 k I5 =
50 6.8 k
1.0 mA
–8.0 Vdc
A
CM
+ V 
20 log o
V
S –8.0 Vdc
VEE
VEE
Typical characteristics were obtained with circuit shown in Figure 5, fC = 500 kHz (sine wave),
VC = 60 mVrms, fS = 1.0 kHz, VS = 300 mVrms, TA = 25°C, unless otherwise noted.
Figure 11. Sideband Output versus Figure 12. Signal–Port Parallel–Equivalent

VO , OUTPUT AMPLITUDE OF EACH SIDEBAND (Vrms)
Carrier Levels Input Resistance versus Frequency

2.0 1.0 M
rip, PARALLEL INPUT RESISTANCE (k Ω) 500
1.6 +rip
–rip
Signal Input = 600 mV 100
1.2
50
400 mV
0.8
300 mV 10
200 mV 5.0
0.4
100 mV
0 1.0
0 50 100 150 200 1.0 5.0 10 50 100
VC, CARRIER LEVEL (mVrms) f, FREQUENCY (MHz)
Figure 13. Signal–Port Parallel–Equivalent Figure 14. Single–Ended Output Impedance

Input Capacitance versus Frequency versus Frequency
cop, PARALLEL OUTPUT CAPACITANCE (pF)

cip , PARALLEL INPUT CAPACITANCE (pF)
5.0 140 14
rop , PARALLEL OUTPUT RESISTANCE (k Ω)
120 12
4.0
100 10
3.0 rop
80 8.0
2.0 60 cop 6.0
40 4.0
1.0
20 2.0
0 0 0
1.0 2.0 5.0 10 20 50 100 0 1.0 10 100
f, FREQUENCY (MHz) f, FREQUENCY (MHz)

MC1496, B
TYPICAL CHARACTERISTICS (continued)
Typical characteristics were obtained with circuit shown in Figure 5, fC = 500 kHz (sine wave),
VC = 60 mVrms, fS = 1.0 kHz, VS = 300 mVrms, TA = 25°C, unless otherwise noted.
Figure 15. Sideband and Signal Port Figure 16. Carrier Suppression
Transadmittances versus Frequency versus Temperature
1.0 0
γ 21, TRANSADMITTANCE (mmho)
0.9 Signal Port
VCS, CARRIER SUPPRESION (dB)

10
0.8
0.7 20
0.6 Side Band MC1496
30
0.5 Sideband Transadmittance (70°C)
+  +
I out (Each Sideband) 40
0.4 g21 V out 0
V (Signal)
0.3 in
50
0.2 Signal Port Transadmittance
+  + +
I out 60
0.1 g21 V out 0 |V | 0.5 Vdc
V C
in 70
0
0.1 1.0 10 100 1000 –75 –50 –25 0 25 50 75 100 125 150 175
fC, CARRIER FREQUENCY (MHz) TA, AMBIENT TEMPERATURE
(°C)
Figure 18. Carrier Suppression

Figure 17. Signal–Port Frequency Response versus Frequency
0
SUPPRESSION BELOW EACH FUNDAMENTAL
20
AVS , SINGLE-ENDED VOLTAGE GAIN (dB)
RL = 3.9 k
Re = 500 Ω 10
10
CARRIER SIDEBAND (dB)
20
RL = 3.9 k (Standard
0 Re = 1.0 k Test Circuit) RL = 3.9 k 30 2fC
Re = 2.0 k
– 10 40
RL = 500 Ω
|VC| = 0.5 Vdc Re = 1.0 k 50
– 20 fC
A
V
+ Re ) 2re
R
L 60 3fC
– 30 70
0.01 0.1 1.0 10 100 0.05 0.1 0.5 1.0 5.0 10 50
f, FREQUENCY (MHz) fC, CARRIER FREQUENCY (MHz)
Figure 19. Carrier Feedthrough Figure 20. Sideband Harmonic Suppression

versus Frequency versus Input Signal Level
VCFT , CARRIER OUTPUT VOLTAGE (mVrms)
10 0
10
20
1.0
30
40
fC ± 3fS
50
0.1
60 fC ± 2fS
70
0.01 80
0.05 0.1 0.5 1.0 5.0 10 50 0 200 400 600 800
fC, CARRIER FREQUENCY (MHz) VS, INPUT SIGNAL AMPLITUDE (mVrms)

MC1496, B
Figure 21. Suppression of Carrier Harmonic Figure 22. Carrier Suppression versus
Sidebands versus Carrier Frequency Carrier Input Level
0 0
V CS , CARRIER SUPPRESSION (dB)

10 10
3fC ± fS
20 20
30 30 fC = 10 MHz
2fC ± fS
40 40
50 2fC ± 2fS 50
fC = 500 kHz
60 60
70 70
0.05 0.1 0.5 1.0 5.0 10 50 0 100 200 300 400 500
fC, CARRIER FREQUENCY (MHz) VC, CARRIER INPUT LEVEL (mVrms)
OPERATIONS INFORMATION
The MC1496, a monolithic balanced modulator circuit, is and have an amplitude which is a function of the product of
shown in Figure 23. the input signal amplitudes.
This circuit consists of an upper quad differential amplifier For high–level operation at the carrier input port and linear
driven by a standard differential amplifier with dual current operation at the modulating signal port, the output signal will
sources. The output collectors are cross–coupled so that contain sum and difference frequency components of the
full–wave balanced multiplication of the two input voltages modulating signal frequency and the fundamental and odd
occurs. That is, the output signal is a constant times the harmonics of the carrier frequency. The output amplitude will
product of the two input signals. be a constant times the modulating signal amplitude. Any
Mathematical analysis of linear ac signal multiplication amplitude variations in the carrier signal will not appear in the
indicates that the output spectrum will consist of only the sum output.
and difference of the two input frequencies. Thus, the device The linear signal handling capabilities of a differential
may be used as a balanced modulator, doubly balanced mixer, amplifier are well defined. With no emitter degeneration, the
product detector, frequency doubler, and other applications maximum input voltage for linear operation is approximately
requiring these particular output signal characteristics. 25 mV peak. Since the upper differential amplifier has its
The lower differential amplifier has its emitters connected emitters internally connected, this voltage applies to the
to the package pins so that an external emitter resistance carrier input port for all conditions.
may be used. Also, external load resistors are employed at Since the lower differential amplifier has provisions for an
the device output. external emitter resistance, its linear signal handling range
may be adjusted by the user. The maximum input voltage for
Signal Levels
linear operation may be approximated from the following
The upper quad differential amplifier may be operated expression:
either in a linear or a saturated mode. The lower differential V = (I5) (RE) volts peak.
amplifier is operated in a linear mode for most applications. This expression may be used to compute the minimum
For low–level operation at both input ports, the output value of RE for a given input voltage amplitude.
signal will contain sum and difference frequency components
Figure 23. Circuit Schematic Figure 24. Typical Modulator Circuit

(–) 12
Vo, 1.0 k 1.0 k 12 Vdc
Output
(+) 6 0.1 µF RL RL
2 Re 1.0 k 3
10 (–) 51 3.9 k 3.9 k
Carrier V 8
Input C V 0.1 µF 10
+Vo
8 (+) Carrier C 6
Input 1 MC1496
4 (–) VS
Signal V 2 4
S 1 (+) Gain Modulating –Vo
Input 12
Adjust Signal 10 k 10 k 51 51
3 Input 14 5
Bias 5 50 k
(Pin numbers I5 6.8 k
500 500 500 per G package)
Carrier Null –8.0 Vdc
VEE 14 VEE

MC1496, B
Figure 25. Voltage Gain and Output Frequencies

Carrier Input Signal (VC) Approximate Voltage Gain Output Signal Frequency(s)
ǒǓ
R V
L C
Low–level dc
2(R
E
) 2re) KT
q
fM
R
) 2re
High–level dc L fM
R
E
ǒǓ
R V (rms)
L C
Low–level ac
Ǹ
2 2 KT (R
q E
2r e) ) fC ± fM
0.637 R
) 2re
High–level ac L fC ± fM, 3fC ± fM, 5fC ± fM, . . .
R
E
NOTES: 1. Low–level Modulating Signal, VM, assumed in all cases. VC is Carrier Input Voltage.
2. When the output signal contains multiple frequencies, the gain expression given is for the output amplitude of
each of the two desired outputs, fC + fM and fC – fM.
3. All gain expressions are for a single–ended output. For a differential output connection, multiply each
expression by two.
4. RL = Load resistance.
5. RE = Emitter resistance between Pins 2 and 3.
6. re = Transistor dynamic emitter resistance, at 25°C;
re [
26 mV
I5 (mA)
7. K = Boltzmann′s Constant, T = temperature in degrees Kelvin, q = the charge on an electron.
KT
q [26 mV at room temperature
The gain from the modulating signal input port to the All that is required to shift from suppressed carrier to AM
output is the MC1496 gain parameter which is most often of operation is to adjust the carrier null potentiometer for the
interest to the designer. This gain has significance only when proper amount of carrier insertion in the output signal.
the lower differential amplifier is operated in a linear mode, However, the suppressed carrier null circuitry as shown in
but this includes most applications of the device. Figure 27 does not have sufficient adjustment range.
As previously mentioned, the upper quad differential Therefore, the modulator may be modified for AM operation
amplifier may be operated either in a linear or a saturated by changing two resistor values in the null circuit as shown in
mode. Approximate gain expressions have been developed Figure 28.
for the MC1496 for a low–level modulating signal input and
Product Detector
the following carrier input conditions:
The MC1496 makes an excellent SSB product detector
1) Low–level dc (see Figure 29).
2) High–level dc This product detector has a sensitivity of 3.0 microvolts
3) Low–level ac and a dynamic range of 90 dB when operating at an
4) High–level ac intermediate frequency of 9.0 MHz.
These gains are summarized in Figure 25, along with the The detector is broadband for the entire high frequency
frequency components contained in the output signal. range. For operation at very low intermediate frequencies
down to 50 kHz the 0.1 µF capacitors on Pins 8 and 10
APPLICATIONS INFORMATION should be increased to 1.0 µF. Also, the output filter at Pin 12
Double sideband suppressed carrier modulation is the can be tailored to a specific intermediate frequency and audio
basic application of the MC1496. The suggested circuit for amplifier input impedance.
this application is shown on the front page of this data sheet. As in all applications of the MC1496, the emitter resistance
In some applications, it may be necessary to operate the between Pins 2 and 3 may be increased or decreased to
MC1496 with a single dc supply voltage instead of dual adjust circuit gain, sensitivity, and dynamic range.
supplies. Figure 26 shows a balanced modulator designed This circuit may also be used as an AM detector by
for operation with a single 12 Vdc supply. Performance of this introducing carrier signal at the carrier input and an AM signal
circuit is similar to that of the dual supply modulator. at the SSB input.
The carrier signal may be derived from the intermediate
AM Modulator frequency signal or generated locally. The carrier signal may
The circuit shown in Figure 27 may be used as an be introduced with or without modulation, provided its level is
amplitude modulator with a minor modification. sufficiently high to saturate the upper quad differential

MC1496, B
amplifier. If the carrier signal is modulated, a 300 mVrms Figures 31 and 32 show a broadband frequency doubler
input level is recommended. and a tuned output very high frequency (VHF) doubler,
Doubly Balanced Mixer respectively.
The MC1496 may be used as a doubly balanced mixer Phase Detection and FM Detection
with either broadband or tuned narrow band input and output The MC1496 will function as a phase detector. High–level
networks. input signals are introduced at both inputs. When both inputs
The local oscillator signal is introduced at the carrier input are at the same frequency the MC1496 will deliver an output
port with a recommended amplitude of 100 mVrms. which is a function of the phase difference between the two
Figure 30 shows a mixer with a broadband input and a input signals.
tuned output. An FM detector may be constructed by using the phase
Frequency Doubler detector principle. A tuned circuit is added at one of the inputs
The MC1496 will operate as a frequency doubler by to cause the two input signals to vary in phase as a function
introducing the same frequency at both input ports. of frequency. The MC1496 will then provide an output which
is a function of the input signal frequency.
TYPICAL APPLICATIONS
Figure 26. Balanced Modulator
(12 Vdc Single Supply) Figure 27. Balanced Modulator–Demodulator
VCC
1.0 k 820 1.3 k 12 Vdc 1.0 k 1.0 k VCC
12 Vdc
RL
0.1 µF 0.1 µF 2 Re 1.0 k 3 3.9 k RL
3.0 k 3.0 k 51
25 µF
+ 2 1.0 k 3 8 3.9 k
51 8 DSB VC 0.1 µF 10 6
+Vo
15 V 0.1 µF
Carrier Input 6 Carrier
10 0.1 µF Output Input 1 MC1496
60 mVrms
1 MC1496 VS 4
–Vo
Modulating – 4 Modulating 12
+ Signal 10 k 10 k 51 51 14 5
12
Signal Input 10 µF 25 µF 14 5 Input 50 k
300 mVrms 15 V 15 V 10 k R1 I5 6.8 k
+ – VEE
Carrier Carrier Null –8.0 Vdc
Null 50 k 10 k 10 k 100 100
Figure 29. Product Detector

Figure 28. AM Modulator Circuit (12 Vdc Single Supply)
VCC
VCC 820 1.3 k
1.0 k 1.0 k 12 Vdc
12 Vdc
RL 0.1 µF
0.1 µF 2 Re 1.0 k 3 3.9 k RL 1.0 k 100
51 2 3.0 k 3.0 k
3.9 k 3
8
VC 0.1 µF
51 8
10 6 +Vo Carrier Input 0.1 µF 6
Carrier 10 0.005
1 MC1496 300 mVrms µF
Input 1 MC1496 AF
1.0 k 1.0 µFOutput
VS 4
12 SSB Input 0.1 µF 1.0 k 4
Modulating
Signal 750
Input
750 51 51 14 5
–Vo
1.0 k
0.1
14 5
12 RLq 10 k
50 k
µF 10 k
0.005 0.005
15 6.8 k µF µF
VEE
Carrier Adjust –8.0 Vdc

MC1496, B
Figure 30. Doubly Balanced Mixer
(Broadband Inputs, 9.0 MHz Tuned Output) Figure 31. Low–Frequency Doubler
VCC
VCC 12 Vdc
1.0 k 1.0 k +8.0 Vdc
0.001 µF 0.01 + 100 µF
1.0 k –
µF RFC
25 Vdc 1.0 k
Local 2 3 2 3 3.9 k
Oscillator 100 µH 8
51 8 1.0 k 3.9 k
Input 6 C2 100
10 10 6
100 mVrms 0.001 µF 1 0.001 µF
MC1496 100 µF – C2+ Output
RF Input 4 9.5 µF 9.0 MHz Input 15 Vdc Max
MC1496
Output 15 mVrms 100 µF 15 Vdc 1
10 k 12 L1
51 14 5 5.0–80 RL = 50Ω 4 12
10 k 51
pF 90–480 pF
50 k 14 5
6.8 k 10 k 10 k 100 100
Null Adjust VEE
–8.0 Vdc 50 k
6.8 k
L1 = 44 Turns AWG No. 28 Enameled Wire, Wound I5
on Micrometals Type 44–6 Toroid Core.
Balance VEE
–8.0 Vdc
Figure 32. 150 to 300 MHz Doubler

VCC
1.0 k 1.0 k V+ +8.0 Vdc
0.001
18 pF
µF
0.001 RFC L1
100 µF 0.68 µH 18 nH
2 3 1.0–10 pF 300 MHz
8 6
Output
0.001 µF 10 RL = 50Ω
150 MHz 1 MC1496 1.0–10 pF
Input
4
10 k 12
100
10 k 100 14 5
50 k
6.8 k
L1 = 1 Turn AWG
No. 18 Wire, 7/32″ ID
Balance VEE
–8.0 Vdc
(fC – f S )
(fC + f S )
AMPLITUDE
(2fC + 2f S )
(2fC – 2f S )
(3fC + f S )
(3fC – fS )
(2fC – 2f S )
(2fC + 2f S )
(3fC + 2f S )
(3fC – 2f S )
(fC – 2f S )
(f + 2f )
S
(2fC )
(3f C )
(fC )
Frequency Balanced Modulator Spectrum

DEFINITIONS
fC Carrier Fundamental fC ± nfS Fundamental Carrier Sideband Harmonics
fS Modulating Signal nfC Carrier Harmonics
fC ± fS Fundamental Carrier Sidebands nfC ± nfS Carrier Harmonic Sidebands

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ELETRÔNICA IV

Apostila de Aulas Práticas

Autor: Fernando Antônio Pinto Barúqui

2. AMPLIFICADOR “PUSH-PULL” COM SAÍDA COMPLEMENTAR.................................. 4

3. AMPLIFICADOR SINTONIZADO ............................................................................................ 7

6. MODULADOR DE FREQÜÊNCIA .......................................................................................... 14

7. FONTES CHAVEADAS ............................................................................................................. 16

2. AMPLIFICADOR “PUSH-PULL” COM SAÍDA COMPLEMENTAR

Fase 1- Projete o circuito da Figura 2.1 obedecendo as seguintes especificações:

1 - Potência C.A. de saída de 1W.

3 - Eficiência superior a 40%.

4 - Freqüência de corte inferior menor que 50Hz.

5 - Ganho de tensão o maior possível.

6 - Considerar nos cálculos os transistores: TIP29C, TIP30C, BC547 e BC557.

1 - Calcule os ganhos de tensão e potência.

2 - Mostre que a eficiência máxima real do estágio de saída é dada por:

5 - Ajuste P1 até obter a tensão DC no ponto A igual a zero.

1 - Medir a polarização após os ajustes necessários.

2 - Medir os ganhos de tensão e de potência.

3 - Medir e traçar o gráfico de resposta em freqüência.

6 - Medir a eficiência do circuito para a máxima tensão de saída, sem saturação.

Fase 2- Projete o circuito da Figura 2.2 obedecendo as seguintes recomendações:

2 - Identificar o tipo de realimentação empregada.

4 - Recalcular C1 para manter a freqüência de corte inferior menor que 50Hz.

1 - Medir a tensão DC no ponto A e comparar com a da Fase 1.

2 - Medir o ganho de tensão.

3 - Medir e traçar o gráfico de resposta em freqüência.

6 - Curto-circuitar os pontos B e C, e observar as alterações na forma de onda de saída. Comparar com o

Fase 3- Projete o circuito da Figura 2.4 obedecendo as seguintes recomendações:

2 - Fale ao microfone e observe a amplitude máxima do sinal AC em VMic.

Figura 2.1: Amplificador Push-Pull.

Figura 2.2: Amplificador Push-Pull com realimentação.

Figura 2.3: Microfone de eletreto. a) Polarização. b) Microfone mais amplificador.

Figura 2.4: Amplificador Push-Pull mais microfone de eletreto.

4 - Seletividade igual a 10.

1 - Medida das relações de espiras das bobinas.

2 - Medidas dos fatores de Qualidade e de LX, segundo o esquema abaixo.

Z( ω o ) = ω o LQb (Qb >> 1)

3 - Calcule os componentes para atender as especificações dadas;

4 - Calcule a seletividade do circuito;

Qual o sinal observado na saída quando a entrada:

6 - Monte o circuito e compare os valores previstos e calculados com os medidos.

- através do gerador G1 um sinal de 800kHz;

8 - Qual o sinal que será observado na saída (sobre RL)?

9 - Comente e apresente as explicações teóricas para o observado.

Figura 3.1: Amplificador sintonizado.

Figura 3.2: Amplificador sintonizado como mixer.

1 - Freqüência da portadora igual a 400kHz.

2 - Freqüência de corte inferior, para o sinal modulador, de 50Hz.

3 - Freqüência de corte superior, para o sinal modulador, de 5kHz.

2 - Calcule os capacitores C1 e C2 para que o circuito oscile na freqüência de 300kHz.

3 - Calcule R1, R2, P, C3, C5 de forma a atender os itens 2 e 3 das especificações.

1 - Meça a freqüência da portadora.

Figura 4.1: Modulador de amplitude.

- método da modulação por largura de pulsos.

- método dos amplificadores logarítmicos.

- método dos amplificadores de transcondutância variável [1].

Todas estas técnicas serão analisadas nas aulas teóricas.

1 - Estudar as características técnicas do modulador balanceado MC1496.

2 - Estudar os circuitos apresentados com as funções:

2 - Meça as polarizações e observe no osciloscópio as formas de onda do item 1, medindo os índices de

Figura 5.1: Modulador balanceado.

- Em que se baseia a modulação síncrona? Onde é usada?