SUBMITTED TO : SUBMITTED BY:

MAHANTESH M AJAY MANKOTIA

KODABAGI ROLL NO: RD3002A04
SECTION:D3002
MCA (2nd sem )
 HOME WORK NO :1
Q 1:-Identify at least two application areas (discuss their roles also)
for:----
(a) Encoder/Decoder
(b)Multiplexer/De multiplexers
(c)Flip flops

ANS:
(a) Application of Encoder:
1.The radio frequency spectrum is filled with noise and other signals,
especially those frequencies where unlicensed transmitter operation. When
using a wireless remote control system it is desirable to have a way of
filtering out or ignoring those unwanted signals to prevent false data from
being received. A simple way to accomplish this is to use an encoder IC at
the transmitter and a decoder IC at the receiver. The encoder generates
serial codes that are automatically sent three times and must be received
at least twice before data is accepted as valid by the decoder circuit.

2. One of the applications of encoder is to convert octal to binary.

3. Encoder is used in integrated circuits.

Application of Decoder:

1. First application of decoder is it converts binary to octal.

2. Used in multiplexer.

(b) Application of Multiplexer:

1. It is used in communication system.

2. Multiplexer is used in parallel to series conversion and logic function
generator.

Application of Demultiplexer:

1. The demultiplexer enables the bidirectional 800 mbit/s-High-speed-data-

transmission accordingly to the IEEE 1394-standard.
2. The demultiplexer contains a patent pending optical lenses system
correctiveing geometric aberrations in a large spectral range.

(c) Application of flip flop:

1. A flip-flop in combination with a Schmitt trigger can be used for the

Implementation of an arbiter in asynchronous circuits.
2. One use is to build finite state machines from electronic logic. The flip-
flops remember the machine's previous state, and digital logic uses that
state to calculate the next state.
3. It stores smallest unit of memory.

Q2: Discuss the basic logic behind counters i.e. how will you obtain
1000(8) from 0111(7)?
How will you implement the same?

Ans :-
The counters discussed are all synchronous counter. This means the
operation of the flip-flops is synchronized by a common clock pulse so that
when several flip-flops must change state, the state changes occur
simultaneously. Binary counter constructed using three T flip-flops to count
clock pulses.
A binary 0 is zero or ‘off’ and a binary 1 is one or ‘on’. Binary numbers, as
the name suggests, have a value in decimal of two because the binary
number can either be on or off. Binary is calculated from the place value
that the 1 holds. An example of this is the binary number: 00000001.
Starting from the left we record the position of the 1 as the decimal number
one.
The lower-order bit is completed from one count to the next if and only if
all its lower order bits are equal to 1.for example binary count from 0111(7)
to 1000(8) is obtained by
1 Complimenting the lower order bit.
2 Compliment the second-order bit because the first bit of 0111 is 1.
3 Complimenting the third-order bit because the first two bits of 0111 are
1’s.
4 Complimenting the forth-order bit because the first three bits of 0111 are
1’s.
5 Three flip-flop be complimented to reach the next count after
1001100111

Q3: State and prove De-Morgan's Theorem by taking a suitable

example.
Ans:-
DeMorgan's Theorems:
a) (A + B)’ = A’* B’
b) (A*B)’ = A’ + B’

Proof of DeMorgan's :
For any theorem X=Y, if we can show that X’ Y = 0, and that X’ + Y = 1,
then
by the complement postulates, A’ A = 0 and A’ + A = 1,
X’ = Y’. By the uniqueness of the complement, X = Y.
Thus the proof consists of showing that (A*B)*( A’ + B’) = 0; and also that
(A*B) + ( A’ + B’)=1.

Prove: (A*B)*( A’ + B’) = 0

(A*B)*A’ +
(A*B)*( A’ + B’) = by distributive postulate
(A*B)*B’)
(A*A’)*B +
= by associativity postulate
A*(B*B’)
= 0*B + A*0 by complement postulate
=0+0 by nullity theorem
=0 by identity theorem
(A*B)*( A’ + B’) = 0
Prove: (A*B)+( A’ + B’) =1
by distributive B*C + A =
(A*B)+( A’ + B’) =(A + A’ + B’))*(B
(B + A)*(C + A)
+ A’ + B’)

(A*B)+( A’ + B’) =(A + A’ + B’))*(B by associativity postulate

+ B’ + A’)
=(1 + B’)*(1 + A) by complement postulate
 =1*1 by nullity theorem
=1 by identity theorem
(A*B)+( A’ + B’) =1

Since (A*B)*( A’ + B’) = 0, and (A*B) + ( A’ + B’) =1,

A*B is the complement of A’ + B’, meaning that A*B=(A’ + B’)';
(note that ' = complement or NOT - double bars don't show in HTML)
Thus (A*B)’= (A’ + B’)''.
The involution theorem states that A'' = A. Thus by the involution theorem,
(A’ + B’)'' = A’ + B’.

Q4: Multiply any 2 binary numbers of 4-bits each, using Booch's

Method and show step by step values.

ANS:-
Booch’s algorithm:- Booch’s algorithm is used to multiply to signed or
unsigned numbers. It is invented by Andrew D. booch.
STEPS OF BOOCH’S MULTIFICTION:-
1) Change the number into binary coded form. If number is negative
then find out its 2’s compliment.
2) Initialized the values to the QR and AC registers.
3) AC initialized the zero. Sets the value Q1 = zero.
4) Initialized the SC register’s equal to the number of bits in QR.
5) If Q0Q1 are 00 or 11 then apply the arithmetic right shift operation
(ARSH). If Q0Q1 is the values 01then add the contents BR into
register AC and if the contents of Q0Q1 are 10 then subtract the
contents of BR from AC.
6) Detriment the SC by 1.
7) This step is continuing until the value of sc become 00.
8) Then at the end combine the result of BR and AC. Then the result
is the binary number of the multiplicand’s mortification number.

Example: - we take the example of 2*3.

The binary number of 2 is 0010 and the binary number of 3 is 0011.
The 2’s complement of 2 is 0010

1101 (1’s complement)

+1
 -------------
1110 (2’s complement)
--------------
Q 0 Q1 BR= 1110 AC QR Q1
SC
0010
Initial 0000 0011 0 100
1 0 sub BR 1110

---------
1110
ARSH 1111 0001 1 011
1 1 ARSH 1111 1000 1 010
0 1 add BR 0010
---------
0001
ARSH 0000 1100 0 001
0 0 ARSH 0000 0110 0 000

Now multiply the AC and QR. The result is 00000110 which is the binary
number of 6 (2*3).

Q5: Perform BCD addition and subtraction of 1254 and 456.

Ans:-
BCD Addition

BCD ADDITION
Carry bit 1 1 11
1254 0001 10 0101 0100
00
+456 0000 00 0101 0110
01
1710 0001 111 0 1011(>9) 1010(>9)
0110 0110
0001 0000
sum 1 7 1 0
 BCD SUBTRACTION
1254 0001 0010 0101 0100
-456 0000 0100 0101 0110
798 1101 1111 1110(>9)
0110 0110 0110
0000 0111 1001 1000
sub 0 7 9 8

Q6: Show the contents of E, A, Q and SC during the process of

division of two binary numbers, 10100011 by 1011.
Ans:-
The below explained procedure shows the contents of E, A, Q and SC
during the process of division.
10100011/1011= 1110 + 1001/1011163/11 = 14 + 9/11
B = 1011
B + 1 = 0101DVF = 0

Divisor B=1011 BC+1 = 0101 Where BC is the Complement of B

E A Q SC
Dividend in AQ 0 1010 0011
100
Shl EAQ 1 0100 0110
Add BC+1, Suppress Carry +0101
E=1 1 1001
E=1,Set Qn=1 1 1001 0111
011
Shl EAQ 1 0010 1110
Add BC+1, Suppress Carry +0101
E=1 1 0111
E=1, Set Qn=1 1 0111 1111
010
Shl EAQ 0 1111 1110
Add BC+1, Carry To E 0 +0101
E=1 1 0100 1110
E=1, Set Qn=1 1 0100 1111
001
Shl EAQ 0 1001 1110
Add BC+1, Carry To E 0 +0101
E=0 0 1110 1110
E=0, Leave Qn=0 0 1110 1110
Add B, Carry To E 0 +1011
E=1 1 1001
Restore Remainder 1 1001 1110
100
Neglect E
Remainder in A: 1001
Quotient in Q: 1110

Q7: Why is it necessary to consider the case of divide overflow?

Ans:-
The division operation may result in a quotient overflow when we have a
fixed length of register and it cannot hold a number exceeds the standard
length.
The divide overflow condition must be avoided in normal computer
operations because the entire quotient will be too long for transfer into a
memory unit that has words of standard length that is the same as the
length of registers.
When the dividend is twice as long as divisor, the condition for overflow is:
A divide overflow condition occurs if the high order half bits of the dividend
constitute a number greater than or equal to the divisor. Another problem is
that division by zero must be avoided. This occurs because any dividend
will be greater than or equal to a divisor which is equal to zero.