HITEC University Taxila

Department of Electrical Engineering

Assignment # 03
ASIC Design

Submitted To:
Mr Fahad Islam Chema

Submitted By:
Nisar Ahmed Rana
07-HITEC-EE-94
Q1)a:- Signal transforms require intensive calculation so I recommend Xilinx Spartan III series for this type of DSP algorithms.
The reason behind its selection is its low cost and high performance.
Q1)b:- I recommend ALTERA Statrix III form ALTERA series for the implementation of highly computational DSP algorithms.
Stratix IV provides with high speed and advanced features at a low cost.
Q1)c:- I recommend Spartan III as my final selection due to its low cost and high performance. The reason behind its high
performance is that Xilinx Spartan III has extreme DSP slices.
Q2)a:- Spartan 3A,6 & Vertex 4, 5, 7 and Altera series have XtremeDSP slices.
Q2)b:- The Xilinx slice is composed of a pair of LUTs, a pair of FFs, carry chain and some other miscellaneous logic to optimize 5
input functions and other similar operations. It has High performance DSP48 slices which allow designers to implement multiple
slower operations using time-multiplexing methods. They provide: Improved flexibility and utilization.

Q3) Define the purpose of following subtools of xilinx ISE in 2 to 3 points each?
Core generator
Xilinx Core generator provides us a library of both parameterizable and point solution logic IP cores with detailed datasheet
specification.
XPS
XPS offers customization of tool flow configuration options. It also provides a graphical system editor for connection of
processors, peripherals and buses.
PACE
PACE is a sub tool of Xilinx. The PACE window consists of Design Browser Panel, Design Object List Panel, Device Architecture
and Panel and Pin Type Panel.
Constraint Editor
The Xilinx Constraints Editor is a graphical user interface (GUI) tool for entering timing constraints and pin location constraints.
Chip Viewer
Chip viewer is used to view the chip. And is used for assigning pins and then we Implement our program
FloorPlaner
The Floorplanner is a graphical placement tool that gives you control over placing a design into a target FPGA.
PlanAhead
The PlanAhead tool is employed between synthesis and place-and-route, enabling designers to rapidly analyze, modify and
achieve superior performance on each of the individual design blocks.
SateCAD
StateCAD is a tool which automatically generates simulatable and synthesizable HDL code directly from the diagram.
iMPACT
iMPACT is a file generation and device programming tool. iMPACT enables you to program through several parallel
cables.
XPOWER
XPower is used to estimate the power consumption of an FPGA design we must first implement our design into an
FPGA device.

Q4) What is the difference between RocketIO and SelectIO?

Rocket I/O: Rocket I/O transceivers have several modes of operation. The Rocket I/O transceiver’s flexible, programmable
features allow a multi-gigabit serial transceiver to be easily integrated into any Virtex-II Pro design.
Selectable I/O: Selectable I/O allows direct connections to external signals of varied voltages and thresholds. It optimizes the
speed/noise tradeoff.