IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 49, NO.
3, JUNE 2002
Charge-Sensitive Preamplifier With Continuous Reset
by Means of the Gate-to-Drain Current of the JFET
Integrated on the Detector
C. Fiorini, Member, IEEE, and P. Lechner
Abstract—In this paper, we present a charge-sensitive pream-
plifier designed for a silicon drift detector (SDD), where both
input n-JFET and feedback capacitor are integrated directly on
the detector chip. The integration of these devices allows obtaining
a capacitive matching between detector and front-end transistor
and to minimize the stray capacitances of the connections. A
continuous discharging mechanism for the leakage current and
for the signal charge is obtained by means of the gate-to-drain
current of the front-end JFET. This current is originated by
a “weak” avalanche breakdown mechanism, which occurs in
a high-field region of the transistor channel. The advantage
arising from the use of this mechanism is that the discharge is
obtained directly by means of the front-end transistor without the
need of any additional integrated device. A feedback loop in the
charge preamplifier sets the suitable value of drain-gate voltage
necessary to compensate for variations of the leakage current to be
discharged. The first results of the experimental characterization
+
of the SDD preamplifier system are presented here.
Index Terms—Charge preamplifier, JFET, reset mechanism.
I. INTRODUCTION
I N the development of semiconductor detectors for high-res-
olution X-ray spectroscopy, like silicon drift detector (SDD)
[1], a relevant improvement in energy resolution performances
has been achieved by means of the integration of the front-end
transistor of the amplifying electronics directly on the detector
wafer. This solution gives a better capacitive matching between
detector and front-end transistor, minimizes the stray capac-
itances of the connections, and reduces microphonic noise.
For this purpose, different transistor configurations have been
studied, like n-channel JFET [2], p-channel JFET [3], DEPFET,
and DEPMOS [4].
To fully exploit the integration of the front-end input devices,
all devices required for the discharge of the signal charge and
leakage current also have to be integrated on the detector chip.
Different integrated discharging methods have been recently ex-
perimented, like a pulsed reset through a discharging electrode
[5], a forward-biased diode [6], a bipolar transistor [7], or a
MOSFET in subthreshold condition [8]. All these mechanisms
require the integration and operation of a custom reset device. A
Manuscript received November 25, 2001; revised February 18, 2002.
C. Fiorini is with Politecnico di Milano, Dipartimento di Elettronica e Infor-
mazione, 20133 Milano, Italy (e-mail: carlo.fiorini@polimi.it).
P. Lechner is with KETEK GmbH, D-85764 Oberschleissheim, Germany
(e-mail: pel@hll.mpg.de).
Publisher Item Identifier S 0018-9499(02)06151-8.
0018-9499/02$17.00 © 2002 IEEE
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1147
mechanism that is based only on the front-end JFET already in-
tegrated on the detector exploits the gate-to-source forward-bi-
ased junction of a p-JFET [3]. However, a solution based on
a p-JFET, necessary to implement this mechanism in the case
of a detector collecting electrons (e.g., SDD on n-type silicon),
shows inferior noise performances with respect to a n-JFET of
the same dimensions and current.
Recently, a continuous discharging mechanism based on a
“weak” avalanche breakdown generated in the gate-to-channel
junction of an integrated n-channel JFET has been proposed [9].
The advantage of this mechanism is that it does not require the
integration and operation of additional resetting devices and can
also be implemented by means of a n-JFET in the case of a
detector collecting electrons.
In the previous work, this mechanism was exploited by using
the JFET in a source follower configuration. As advantage, this
configuration is self adapting to new values of leakage current.
As disadvantage, the source follower configuration does not
provide stable gain at different temperatures, detector biasing
conditions, and rates of incoming events, because the charge to
voltage conversion is obtained by means of the detector capac-
itance.
In this work, we study the possibility of using the same dis-
charging mechanism by using a charge preamplifier which is a
more stable front-end configuration. The setting of the suitable
drain-gate voltage to compensate for variations of the leakage
current is obtained not by a self biasing of the gate electrode, as
in the source-follower configuration, but by means of a second
feedback loop in the charge preamplifier, which “senses” the
output voltage of the preamplifier and sets the suitable value of
drain voltage.
This restoration technique called the “drain feedback” was
proposed several years ago by Elad, by using a fully external
preamplifier [10]. In this work, we implement this method by
using an input JFET and a feedback capacitor which are directly
integrated on the detector chip. This solution therefore allows to
combine the simplicity of the integrated “discharging” n-JFET
with the performances offered by a charge-sensitive preampli-
fier.
II. GATE-TO-DRAIN “AVALANCHE” CURRENT IN THE
INTEGRATED N-JFET
Fig. 1 shows a schematic cross section of the n-channel JFET
integrated on the detector chip. The gate current is originated
by a “weak” avalanche breakdown mechanism that occurs in a
1148
Fig. 1. Multiplication mechanism in the integrated JFET.
Fig. 2. Increase of the gate current with drain voltage for the avalanche
mechanism, measured for V = 0. The corresponding values of dynamic
resistance are reported. For comparison, the dynamic resistance calculated from
the measured gate current, considering a forward-biased junction mechanism
is also shown.
high-field region of the transistor channel. In this region, the
electrons flowing in the channel create holes by impact ioniza-
tion. A fraction of the holes is collected at the guard elec-
trode through the deep implant, while the remaining holes are
collected at the gate. These holes can be exploited to compen-
sate for the leakage electrons generated in the detector bulk and
collected at the anode. The described effect was observed for
the first time on external JFETs by Goulding et al. in 1970 [11].
A complete characterization of the mechanism occurring on an
n-channel JFET integrated on high-resistivity silicon was given
in our previous paper [9].
In Fig. 2, a plot of the measured gate current versus drain
voltage for a JFET integrated on high-resistivity n-type silicon,
with gate length of 4 m and width of 50 m, is shown. Both
source and gate voltages are kept to 0 V during the measure-
ment. By increasing the drain voltage in the range from 6 to
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IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 49, NO. 3, JUNE 2002
10 V, the gate current increases from few pA up to more than
100 pA, by means of the avalanche mechanism. This current
range is sufficient to compensate for a typical leakage currents
of present SDDs, at room temperature or with a small degree of
cooling [1].
In Fig. 2, the dynamic resistance associated with the
discharging mechanism, calculated as the ratio between
and , is plotted versus the drain voltage.
The present mechanism shows a very high value of dynamic
resistance, from 10 Gohm up to 1000 Gohm in the examined
current range. As a reference, the dynamic resistance calculated
in the case of a forward-biased junction, discharging the
same current, is also reported. The resistance in this last case
ranges between one to two orders of magnitude less than in
the previous case. A larger dynamic resistance could represent
an advantage when using a charge preamplifier configuration.
In fact, charge preamplifiers based on a discharge mechanism
through a forward-biased junction are characterized by a short
decay time in the output response, determined by the value of
the dynamic resistance [12]. The compensation for this decay
time by the pole-zero network in the shaping amplifier has to
be continuously adjusted for variations of the leakage current
in the detector. When a large dynamic resistance is used,
on the contrary, the short decay time constant of the charge
preamplifier is no more determined by this resistance but can
be fixed by a suitable choice of the components of the circuit.
III. “DRAIN FEEDBACK” CHARGE PREAMPLIFIER WITH
ON-CHIP JFET AND FEEDBACK CAPACITOR
In Fig. 3, the working principle of the proposed preamplifier
is shown. It consists of a conventional charge preamplifier where
the output voltage is used to provide an active low-frequency ad-
justment of the drain voltage, according to the so-called “drain
feedback” principle [10]. When, for instance, the gate voltage
of the input JFET begins to decrease because of an increasing
of the detector leakage current, the output of the preamplifier
increases as a consequence of a decreasing drain current and
FIORINI AND LECHNER: CHARGE-SENSITIVE PREAMPLIFIER WITH CONTINUOUS RESET
Fig. 3. Working principle of the preamplifier with the active adjustment of the
drain voltage (drain feedback).
Fig. 4. Schematic of the charge preamplifier.
forces the drain voltage of the JFET to increase in order to
compensate for the variation of the gate voltage through the
gate-drain dynamic resistance.
A very simple circuit has been designed to implement the
mentioned principle. The preamplifier scheme is reported in
Fig. 4. It consists of a cascode configuration where a current
gain provided by T2 has been inserted in the signal path in order
to achieve a high loop gain even when using a low-transconduc-
tance input JFET ( mS) [13]. The “drain feedback”
principle is implemented simply by the use of three devices,
T3, RA, and CA. The drain voltage is controlled by acting di-
rectly on the base of the cascode transistor T1. For instance,
when the gate voltage is decreased because of an increasing of
the leakage current, the JFET current will decrease, more cur-
rent will flow in T1, T2, and T3 and, therefore, the base voltage
of T1 will rise up. Correspondingly also the drain voltage will
increase through T1. Finally, the gate voltage will be risen up
by means of the drain-gate dynamic resistance. The excess of
leakage current will now flow in the discharging path, thanks to
an increase of the drain voltage and without a significant change
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1149
(a)
(b)
Fig. 5. (a) Schematic drawing of the SDD with integrated n-JFET and
feedback capacitor. (b) Central region of the detector where the JFET and the
feedback capacitor have been integrated.
Fig. 6. Schematic drawing of the structure of the feedback capacitor.
of the gate voltage and, therefore, of the drain current. In the fre-
quency range of interest for the signal, CA will short the base
of T1 to ground and the configuration will work properly as a
charge preamplifier.
In order to test the proposed method, an n-channel JFET
and a feedback capacitor have been integrated on an SDD. The
schematic drawing of the detector with the integrated devices
is shown in Fig. 5. The JFET has been designed with a gate
length of 5 m and width of 50 m. The sum of the anode,
JFET, and connection strays capacitances have been estimated
to be within 150 and 200 fF. The feedback capacitor has been
obtained by overlapping a metal strip over the anode ring,
using a layer of nitride as insulator between them (see Fig. 6).
A capacitor value of about 15 fF have been estimated from
the X-ray measurements reported in the following section.
The detector has been produced at the MPI Semiconductor
Laboratory (Munich, Germany). A photograph of the layout of
the device is shown in Fig. 7.
1150
Fig. 7. Photograph of the SDD with JFET and Cf.
Fig. 8. Increase of the drain voltage in correspondence of an increase of the
natural light illumination on the detector. The behavior of the drain current is
also reported.
IV. EXPERIMENTAL RESULTS
A first experimental characterization of the proposed pream-
plifier has been carried out in order to verify the functionality
of the drain feedback loop. The SDD detector has been irradi-
ated with natural light at different intensities in order to pro-
vide different values of current to be discharged at the detector
anode. The corresponding values of drain voltage and drain cur-
rent have been measured. As shown in Fig. 8, the drain voltage
is increased by the drain feedback loop in the circuit in corre-
spondence of the increased level of illumination. In the same
figure it can be noted that the drain current is only slightly re-
duced (about 5%), demonstrating that the circuit is able to adjust
the drain voltage to held new values of current to be discharged
without a relevant change of the FET current (and, therefore, of
the gate voltage).
The SDD-preamplifier (SDD area of 5 mm ) had been also
used for the detection of X-rays from a Fe source. Preamplifier
output signals as a response to detected events are reported in
Fig. 9. According to the measured amplitudes, a value of about
15 fF for the feedback capacitor has been estimated. The spec-
trum measured at 20 C with a shaping time of 3 s is reported
in Fig. 10. An energy resolution at the line (5.89 keV)
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IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 49, NO. 3, JUNE 2002
Fig. 9. Fe events measured with the SDD and the charge preamplifier.
Fig. 10. Fe spectrum measured with the SDD detector and the charge
preamplifier. A shaping time of 3 s has been used.
of 192 eV FWHM has been measured, corresponding to an elec-
tronic noise of 17.8 e- root mean square (rms).
V. CONCLUSION
In this paper, we have proposed a charge-sensitive preampli-
fier based on the “drain feedback” method, using an n-JFET in-
tegrated directly on the detector chip. This solution allows to
combine the well-known advantages of the charge preamplifier
configuration in terms of gain stability with the simplicity of the
proposed avalanche reset mechanism which does not require the
integration and operation of additional resetting devices.
The results of the first measurements on a prototype of SDD
where both n-JFET and feedback capacitor have been integrated
have shown the feasibility of the proposed solution.
ACKNOWLEDGMENT
The authors would like to thank L. Strüder for stimulating
discussions and the MPI Halbleiterlabor for the realization of
the devices used in this work.
FIORINI AND LECHNER: CHARGE-SENSITIVE PREAMPLIFIER WITH CONTINUOUS RESET
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