S2eTRDARAA) Weltrend Semiconductor, Inc. WT7527 PC POWER SUPPLY SUPERVISOR Data Sheet Version 1.20 June 22, 2007 The information in this document is subject to change without notice. ©Weltrend Semiconductor, Inc. All Rights Reserved. wi ET SETAE TRL 4 2F, No. 24, Industry E. 9" RD., Science-Based Industrial Park, Hsin-Chu, Taiwan TEL:886-3-5780241 FAX:886-3-5794278.5770419 Email:support@weltrend.com.twWetend wr7s2r eemeeneee Rev. 1.20 GENERAL DESCRIPTION ‘The WT7527 provides protection circuits, power good output (PGO), fault protection latch (FPOB), and a protection detector function (PSONB) control. It can minimize external components of switching power supply systems in personal computer. ‘The Over Voltage Detector (OVD) monitors VX, V33, V5, V12A and V128 input voltage level. The Under Voltage Detector (UVD) monitors V33, V5, V12A and V12B input voltage level. The Over Current Detector (OCD) monitor 133833, I5&V5, 112A&V12A and 112B8V12B input current sense. The pin VX provides an extra protection function, When OVD or UVD or OCD or VX detect the fault voltage level, the FPOB is latched HIGH and PGO go low. The latch can be reset by PSONB go HIGH. There is 4 ms delay time for PSONB turn off FPOB. When OVD and UVD and OCD detect the right voltage level, the power good output (PGO) will be issue. FEATURES The Over Voltage Detector (OVD) monitors VX, V33, VS, V12A and V12B input voltage. The Under Voltage Detector (UVD) monitors V33, V5, V12A and V'12B input voltage. The Over Current Detector (OCD) monitors 133833, IS&V5, 112A&V12A and I12B&V128 input pins. The VX > 1.2V provide an extra protection Both of the power good output (PGO) and fault protection latch (FPOB) are Open Drain Output. 75 / 600 ms time delay for UVD / OCD / VX 300 ms time delay for PGO. 38 ms for PSONB input signal De-bounce. 14.us for OVD internal signal De-gltch. 60 us for UVD / VX internal signal De-gltch. 20 ms for OCD internal signal De—glitch. 73 us for PGI internal signal De-glitch 4 ms for PSONB turn-off FPOB. PIN ASSIGNMENT AND PACKAGE TYPE Pin assignment WT7527 pci 1 16 |) eco eno} 2 15 1) vec Fpop (13 14 [vs psonp 4 43 1 v33 nals 12 F viza Oe 11 Piss we O7 101s vies 9 Dv Weltrend Semiconductor, Inc. Page 2WT7527 Rev. 1.20 ORDERING INFORMATION Part Number I Package Type Note WT7527-NN160—1D W17527-NN161—1D 16-Pin Plastic DIP, Pb-free W17527-SN160-1D WT7527-SN16" 16-Pin Plastic SOP, Pb-free PIN DESCRIPTION Pin Name | VO Description PGI |__|Power good input signal pin’ GND P__|Ground FPOB © [Fault protection output pin, open drain output PSONB 1__[On/Off switch input 128 1__[12VA over current protection sense input RI 1__ |Current sense adjust input 1128 1__|12VB over current protection sense input Vi2B 1 |12VB over voltage & under voltage & over current sense input pin Vx |__ |Extra protection sense input 15 |__[5V over current protection sense input 133 1__[3.3V over current protection sense input V12A 1 |12VAover voltage & under voltage & over current sense input pin v33 1__[3.3V over voltage & under voltage & over current sense input pin V5 1__[5V over voltage & under voltage & over current sense input pin vec 1__|Power supply PGO © _ [Power good output signal pin, open drain output Weltrend Semiconductor, Inc. Page 3WT7527 Rev. 1.20 BLOCK DIAGRAM 2 wot > obs th * \, ool He “ C we beac th. =—_ nn py tine o pth} Ik fo 2 . eh” Weltrend Semiconductor, Inc. Page 4Welirend: WT7527 eee eeeeee Rev. 1.20 ABSOLUTE MAXIMUM RATINGS IPGI, PSONB- VCC + 0.3 (Max. 7V) Vv Input voltage |V5, 15, V33, 133 0.3 V12A + 0,3 (Max. 7V) Vv loutput voltage |PGO. 0.3 VCC + 0.3 (Max. 7V) Vv [Operating temperature -40) 725 c [Storage temperature $5 150 c RECOMMENDED OPERATING CONDITIONS Parameter Conditions Min. Typ. _| Max. | Unit Vi2A, V12B 16 Vv |FPOB 16 Vv [xerey [0.3V 10 mA ELECTRICAL CHARACTERISTICS, at Ta=25°C and Vcc=5V. Parameter Condition Min. Typ. Max. Unit lLcaxace Leakage current (FPOB) \V(FPOB) = 5V_ 5 uA Input threshold voltage(PGl) 1.176 1.20 1.224 Vv lheskage Leakage current(PGO) IPGO = 5V_ 5 uA [Offset Voltage of OCP comparators 6 6 mV PSONB Weltrend Semiconductor, Inc. Page 5he a ee eee WT7527 :Neltrend: meeps Rev. 1.20 TOTAL DEVICE Parameter Condition [Win [Typ [Wax [Unt icc Supply current iPSONB= 5V 4 mA vec operation startup voTage waa ae [Vv Nec under lockout votlage za [30-[ 32 DV ‘SWITCHING CHARACTERISTICS, at Ta=-40°C~125°C Parameter Ton Win [Typ] Wax [Oat [PGT to PGO Delay Time rat 200 [300 [400 [ms [Td2 49 75 100 ms |Short circuit Delay Time [For 160 392 600_| 800 | mS fraa-t For 16 = ms IPGO to FPOB Delay Time Tas 2 4 7 6 mS [Under Votage-Delay Time Irae ao [60 [ats lOver Gurrent Delay Time [ras 1s 9037 ms lover Votlage Delay Time ——|Ta6 3p te [us WX Delay Time har a0 [eos IPSONB De-bouncs Tine [bt 2438 [52 mS PGI De-bounce Time rz a7 [100 Fs APPLICATION CIRCUIT NOTE1 : The series resistor RS at PSONB can not be omitted, (R5 = 3000 NOTE2 : The series resistor R4 = 1000 and diode D1 at PGO Is suggested. Weltrend Semiconductor, Inc. Page 6 is suggested )Welirend! wr7827 Rev. 1.20 APPLICATION NOTE I Oia v When the load current increased, the voltage (VL) cross the inductor is increased. And when inductor voltage exceeds the resistor voltage (VR), the OCP is active, Sometimes power-on or load dynamics will cause false output of over-current detection. It can be solved by connecting a capacitor between VS pin and IS pin. In typical case, C > 0.47uF is suggested. OCP point can be calculated by the following equation: Let VR = VL Rx IR = RL* IL IR = 8x IREF = 8x UEP RLxIL 8x RI For example = Assume RI=30KQ, RL=5mQ, OCP IL=20A, Sol: R= (IL * RL) /(8 * IREF ) = (20 * 5mQ)/{ 8 * (1.2 /30KQ)} =312.5Q Weltrend Semiconductor, Inc. Page 7WT7527 Rev. 1.20 APPLICATION TIMMING 1.) PGI (UNDER_VOLTAGE) : PSONB tes FPOB —"l “| tartlez tartlee PGO ———_ ——T PGI Weltrend Semiconductor, Inc. Page 8WT7527 Rev. 1.20 2.) V33, V5, V12 (UNDER_VOLTAGE) or 133, IS, 112 (OVER_CURRENT) or VX (OVER_VOLTAGE) : PSONB | tes FPOB I of turtle PGo — —" V33IV5IV12 are 133/15/112IVX ta2=75mS PSONB toottaa / tas / tor tas, FPOB _——| — | ter ter tarttee PGO —— PGI Of NY TF7uh vsvsviz2 XN 133/15/1121VX te2-1=600mS PSONB faarttag / tas! tor tos FPOB je —r}¢e—— le | <> tor tot tarttoe PGO —) +> tor PGI YN V33/V5IV12 Ne 133/151 2IVX. Weltrend Semiconductor, Inc. Page 9WT7527 Rev. 1.20 3.) V33, V5, V12 (OVER_VOLTAGE) : PSONB tas. FPOB il =| tartte2 PGo — el vasvi2 XN PSONB tas tas FPOB —| be] —| | tot tot tartte2 PGO s——f > vasivsiviz 4 \ Weltrend Semiconductor, Inc. Page 10:Weltrend: MECHANICAL INFORMATION PLASTIC DUAL-IN-LINE PACKAGE WT7527 Rev. 1.20 pas] |e | ow | oo a MAX —_ a aa a s www | Gash | Ga Samer Pe canturaunc o1e35(080) max 0.020 (0,51) iN 200 (5.8) MAX x26(.18) MN | att == Sse (SHORTT) os s00¢r.e2) r 00184038) to 0100026 NOM -r{sxeconnn NOTE 1 : All inear dimensions are in inches (millimeters ) NOTE 2 : This drawing is subject to change without notice, NOTE 3 : Falls within JEDEC MS-001 Weltrend Semiconducto1 Inc. Page 11WT7527 Rev. 1.20 a rQae igi: Men: PLASTIC SMALL-OUTLINE PACKAGE 20031 4 fr ana 2008 0.20) Nom t 024s (6.20) a226,5.80) 0157 400) 0950/3.) ‘Goge Plane je | Enoweds ue 1.12) ‘076 (00) 010,025) 0.069175) max Sone 0 oa ame | 20) | 3s | dee aun | guar | gas | osse NOTE 1 : All inear dimensions are in inches (millimeters) . NOTE 2 : This drawing is subject to change without notice. NOTE 3 : Falls within JEDEC MS-012 Weltrend Semiconductor, Inc. Page 12