GPGT Addendum

ICS08GPGTAD/D
February 2002
ADDENDUM
TO THE
M68ICS08 OPERATOR’S MANUAL
M68ICS08SOM/D
for ICS08GPGT
( APPENDIX G )
©P&E Microcomputer Systems, Inc., 2000, 2002; All Rights Reserved

Purchase Agreement
P&E Microcomputer Systems, Inc. reserves the right to make changes without further notice to any products herein to
improve reliability, function, or design. P&E Microcomputer Systems, Inc. does not assume any liability arising out of
the application or use of any product or circuit described herein.
This software and accompanying documentation are protected by United States Copyright law and also by
International Treaty provisions. Any use of this software in violation of copyright law or the terms of this agreement
will be prosecuted.
All the software described in this document is copyrighted by P&E Microcomputer Systems, Inc. Copyright notices
have been included in the software.
P&E Microcomputer Systems authorizes you to make archival copies of the software and documentation for the sole
purpose of back-up and protecting your investment from loss. Under no circumstances may you copy this software or
documentation for the purpose of distribution to others. Under no conditions may you remove the copyright notices
from this software or documentation.
This software may be used by one person on as many computers as that person uses, provided that the software is
never used on two computers at the same time. P&E expects that group programming projects making use of this
software will purchase a copy of the software and documentation for each user in the group. Contact P&E for volume
discounts and site licensing agreements.
P&E Microcomputer Systems does not assume any liability for the use of this software beyond the original purchase
price of the software. In no event will P&E Microcomputer Systems be liable for additional damages, including any
lost profits, lost savings or other incidental or consequential damages arising out of the use or inability to use these
programs, even if P&E Microcomputer Systems has been advised of the possibility of such damage.
By using this software, you accept the terms of this agreement.
Portions of this manual are reprinted with permission, from M68ICS08RKSOM/D, Copyright 1999; Motorola, Inc.
MS-DOS & Windows are registered trademarks of Microsoft Corporation. Motorola is a registered trademark of
Motorola, Inc. IBM is a registered trademark of IBM corporation.
P&E Microcomputer Systems, Inc.

P.O. Box 2044
Woburn, MA 01888
617-353-9206
www.pemicro.com
Manual version 1.07

P&E Microcomputer
Systems, Inc.
APPENDIX G M68ICS08GPGT CONTENTS AND USAGE

G.1 PACKAGE COMPONENTS AND INSTALLATION PROCEDURE ...................... G-1
G.1.1 M68ICS08GPGT PACKAGE COMPONENTS ....................................................................... G-1
G.1.2 ICS08GPGT INTERFACE SOFTWARE PACKAGE ............................................................. G-1
G.1.3 INSTALLING THE ICS08GPGT SOFTWARE PACKAGE................................................... G-2
G.2 TARGET CONNECTION AND SECURITY DIALOG ............................................ G-4
G.2.1 TARGET HARDWARE TYPE ................................................................................................ G-4
G.2.2 PC SERIAL PORT CONFIGURATION ................................................................................ G-12
G.2.3 TARGET MCU SECURITY BYTES ..................................................................................... G-13
G.2.4 STATUS .................................................................................................................................. G-14
G.2.5 ADDITIONAL DIALOG BUTTONS..................................................................................... G-16
G.3 EXAMPLE PROJECT............................................................................................... G-17
G.3.1 OVERVIEW ............................................................................................................................ G-17
G.3.2 WINIDE AND THE DEMOGPGT APPLICATION.............................................................. G-17
G.3.3 ABOUT THE DEMOGPGT APPLICATION ........................................................................ G-18
G.3.4 APPLICATION FRAMEWORK ............................................................................................ G-18
G.3.5 ASSEMBLING THE DEMO APPLICATION ....................................................................... G-21
G.3.6 SIMULATING THE DEMO APPLICATION........................................................................ G-22
G.3.7 PROGRAMMING THE DEMO APPLICATION IN FLASH ............................................... G-22
G.3.8 RUNNING THE DEMO APPLICATION IN REAL-TIME .................................................. G-24
G.4 ICD08SZ IN-CIRCUIT DEBUGGER....................................................................... G-24
G.5 ICS08GPGTZ IN-CIRCUIT SIMULATOR ............................................................. G-24
G.5.1 COMMANDS.......................................................................................................................... G-24
G.5.2 MEMORY MAPS ................................................................................................................... G-35
G.5.3 PERIPHERALS ....................................................................................................................... G-38
G.5.4 PORTS..................................................................................................................................... G-42
G.5.5 IEEE695 SUPPORT ................................................................................................................ G-42
G.6 PROG08SZ - M68HC908GP32/GT16/GT8 PART-SPECIFIC FEATURES........... G-42
G.6.1 PROGRAMMING THE DEMO APPLICATION IN FLASH ............................................... G-42
G.6.2 68HC08 SECURITY MODE .................................................................................................. G-44
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APPENDIX G
M68ICS08GPGT CONTENTS AND USAGE
G.1 PACKAGE COMPONENTS AND INSTALLATION PROCEDURE
G.1.1 M68ICS08GPGT PACKAGE COMPONENTS

The complete ICS system includes hardware, software, and documentation.
Table G-1 shows a list of product components for the M68ICS08GPGT
package.
Table G-1. M68ICS08GPGT Product Components
Part Number Description
ICS08GPGT Complete software development package
MC68HC908GP32/ MCU
GT16/GT8
ICS08GP32/GT16/GT8 Hardware board
M68ICS08SOM/D M68ICS08 IN-CIRCUIT SIMULATOR SOFTWARE

OPERATOR’S MANUAL
M68ICS08GPHOM/D M68ICS08GP IN-CIRCUIT SIMULATOR HARDWARE

OPERATOR’S MANUAL
Manual Addendum Addendum containing information specific to the

( APPENDIX G ) ICS08GPGT software package.
G.1.2 ICS08GPGT INTERFACE SOFTWARE PACKAGE

The ICS08GPGT software package component, listed in Table G-1 above, is
itself an integration of several pieces of Windows-optimized software. These
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APPENDIX G – M68ICS08GPGT CONTENTS AND USAGE P&E Microcomputer
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include:
• WINIDE.EXE — Integrated development environment (IDE)
software interface to the MC68HC908-based
hardware for editing and performing software or
in-circuit simulation
• CASM08Z.EXE — CASM08Z command-line cross-assembler
• ICS08GPGTZ.EXE— In-circuit/stand-alone simulator software for the
MC68HC908GP32/GT16/GT8 MCUs
• PROG08SZ.EXE — FLASH memory programming software
• ICD08SZ.EXE — Limited, real-time, in-circuit debugging software
G.1.3 INSTALLING THE ICS08GPGT SOFTWARE PACKAGE

The ICS08GPGT software package is supplied on three 3.5-inch floppy disks
or one CD-ROM. Floppy disk 1 contains a setup program that automatically
installs the software into the host PC’s hard drive. The CD-ROM will auto-run
the installation procedure.
G.1.3.1 Installation Steps

To install the software on the host computer’s hard drive, follow these steps:
1. Insert floppy disk 1 or CD into the appropriate drive:
2. From the Start Menu, select the Run option.
3. In the Run dialog box, enter Setup (or click the BROWSE button to select
a different drive and/or directory) and press OK.
4. In the ICS08GPGT Setup Wizard, follow the instructions that appear
on the screen.
Table G-2 lists the files and directories required to control the ICS08GPGT
program modules:
Table G-2. ICS08GPGT Software Files
Filename Description
casm08z.exe Windows cross assembler for the 68HC08

casm08z.hlp Help for CASM08Z
icd08sz.exe Windows in-circuit debugger

icd08sz.hlp Help for ICD08SZ
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Table G-2. ICS08GPGT Software Files
ics08gpgtz.exe Windows in-circuit simulator (ICS08Z)

ics08gpgtz.hlp Help for ICS08GPGTZ
prog08sz.exe Windows FLASH programmer

prog08sz.hlp Help for PROG08SZ
winide.exe Windows integrated development

environment (WinIDE)
winide.hlp Help for WinIDE
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G.2 TARGET CONNECTION AND SECURITY DIALOG

The following is an explanation of each part of the target connection dialog.
For information on passing security mode, read this topic carefully, and refer to
Section G.6.2 68HC08 SECURITY MODE.
Figure G-1. Initial Target Connection And Security Dialog Box
G.2.1 TARGET HARDWARE TYPE

This section of the dialog allows you to select the type of hardware
configuration to which you are trying to connect, as well as modify specific
protocol settings.
Note: If you select Class V, VI, or VII in the Target Hardware Type selection box, the
second section of the Target Connection and Security Dialog changes. Please
refer to Figure G-3 and Section G.2.1.2 Class V, VI, VII Options for a
depiction and description..
G.2.1.1 Class Of Target Board

There are several different configurations of target boards, and P&E’s
MON08-based applications communicate to each type of hardware a little
differently. Almost all configurations are Class I or Class II. The options are:
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Class I
ICS Board with processor installed. This is the standard and most common
configuration of the ICS08 boards. In this configuration, the processor is
resident in one of the sockets on the ICS board itself. The processor can be
debugged and programmed in this configuration, and an emulation cable
containing all the processor I/O signals can be connected to the user’s
target board. In this configuration, the ICS board hardware can
automatically power up and down the processor in order to pass security in
the simplest fashion. The user has to be sure not to provide power from the
target, up through the emulation cable, to the processor pins themselves,
when this dialog appears. This is so that the software, when attempting to
establish communications, can fully power the processor down. The
software running on the PC controls power to the target via the serial port
DTR line. This configuration can be specified at startup in the software by
using the ICS08 command-line parameter; otherwise the software will
remember the hardware configuration from session to session.
Class II
ICS Board without processor, connected to target via MON08 Cable.
In this configuration, there is no processor resident in any of the sockets
of the ICS board itself. The processor is mounted down in the target
system. The connection from the ICS board to the target is
accomplished via the 16-pin MON08 connector. In this configuration,
since the ICS does not control power to the processor, the user will be
prompted to turn the processor’s power supply on and off. Turning off
the power supply is necessary in order to be able to pass the initial
security mode check and access the flash on the processor. A simple
reset is not enough; to pass the security check, you must first force the
processor to encounter a POR (power-on reset) which requires that the
processor’s voltage dip below 0.1v. Once security has been passed,
resetting the device or re-entering the software should be easier. This
configuration can be specified at startup in the software by using the
MON08 command-line parameter; otherwise the software will
remember the hardware configuration from session to session.
Class III
Custom Board (no ICS) with MON08 serial port circuitry built in. In
this configuration, the ICS board is not used at all. The user must
provide a serial port connection from the PC, and provide all hardware
configuration necessary to force the processor into MON08 mode upon
reset. This includes resets both internal and external to the processor. In
this configuration, because the software does not directly control power
to the processor, the user will be prompted to turn the processor’s
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power supply on and off . The use will also be prompted to turn power
on and off to reset the target processor, as the PC doesn’t have control
of the target reset. Turning off the power supply is necessary mainly to
be able to pass the initial security mode check and access the flash on
the processor. A simple reset is not enough; to pass the security check,
you must first force the processor to encounter a POR (power-on reset)
which requires that the processor’s voltage dip below 0.1v. Once
security has been passed, resetting the device or re-entering the
software should be easier. This configuration can be specified at startup
in the software by using the NODTR command-line parameter;
otherwise the software will remember the hardware configuration from
session to session. The Class III selection also applies to use of the ICS
board with the two-pin blank part programming connector.
Class IV
Custom Board (no ICS) with MON08 serial port circuitry and
additional auto-reset circuit built in. In this configuration, the ICS
board is not used at all. The user must provide a serial port connection
from the PC and all hardware configuration necessary to force the
processor into MON08 mode upon reset. In addition, the user must
include an extra circuit which allows the reset line of the processor to
be driven low from the DTR line of the serial port connector (Pin 4 on a
DB9). The following diagram shows the additional connection needed
to reset from a DB9 serial connector.
Figure G-2. Additional Connection To Reset From DB9
In this configuration, because the software does not directly control power to
the processor, the user will be prompted to turn the processor’s power supply
on and off. Turning off the power supply is necessary in order to be able to
pass the initial security mode check and access the flash on the processor. A
simple reset is not enough; to pass the security check, you must first force the
processor to encounter a POR (power-on reset) which requires the processor’s
voltage to dip below 0.1v. Once security has been passed, resetting the device
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should be facilitated by the above circuitry. This configuration can be specified

at startup in the software by using the NODTRADD command-line parameter;
otherwise the software remembers the hardware configuration from session to
session.
Class V
P&E MON08 Interface connect to target via ribbon cable. Allows Auto-
Baud and Auto-Power.
Class VI
P&E POWER08 Interface to target w/MON08 serial port circuitry built in.
Class VII
P&E MON08 Multilink Cable connect to target via ribbon cable. Allows
Auto-Baud and Auto-Power.
Note: If you select Class V, VI, or VII in the Target Hardware Type selection box, the
second section of the Target Connection and Security Dialog changes. Please
refer to Figure G-3 and Section G.2.1.2 Class V, VI, VII Options for a
depiction and description.
Also:
For the simulator, the /SIM08 command-line parameter causes the software to
disconnect from the target and enter Simulation Only mode.
For information on passing security mode, read this topic carefully and also
refer to Section G.6.2 68HC08 SECURITY MODE.
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G.2.1.2 Class V, VI, VII Options

If you select Class V, VI, or VII in the Target Hardware Type selection box, the
second section of the Target Connection and Security Dialog changes to appear
as below.
Figure G-3. Class V, VI, VII Target And Security Dialog
The options presented to the user are as follows:

Device Type
Figure G-4. Device Type Selection Box
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The device type selection box allows the user to specify what type of HC08
they are communicating with. The dialog will then display the appropriate
pinout to be implemented on the MON08 connector, so that the P&E interface
can talk to it properly. The values given (1 or 0) are for informational purposes
only and are driven by the P&E interface.
Device Power
Figure G-5. Device Power Dialog
The device power selection allows the user to specify whether the target is 2, 3,
or 5 Volts, and whether this power is switched/generated by the P&E interface
or if it is separately supplied to the target and under user control. If it is under
user control, the software will use dialog boxes to ask the user to power the
target up and down when necessary (similar to Class II-IV).
Device Clock
Figure G-6. Device Clock Selection Box
The device clock menu allows three options:

1) P&E provides clock to target
2) The target has its own clock (1-32MHz)
3) The target has a slow crystal (30KHz-100KHz) with PLL circuitry. P&E
tries to enable the PLL to allow programming and debug at higher speeds.
Baud
There is no need to set baud rate for Class V, VI, or VII targets, as it is auto-
detected from the target.
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G.2.1.3 Advanced Settings Dialog

The Advanced Button brings up a dialog which allows the user to set specific
protocol settings. The following is an explanation of each part of the advanced
settings dialog.
Figure G-7. Target Hardware Type: Advanced Settings Dialog
G.2.1.3.1 Tpd and Tpu Timing

These timing parameters are mostly designed for Class I boards, although the
delays are valid for all classes of boards. Many of the ICS boards and user
target boards need time to power down and power up.
Whenever power is automatically switched off, or is manually requested to be
switched off, the software waits for an amount of time equal to the Tpd delay
time before proceeding to the connection protocol. This is because a board or
power supply may have capacitance which holds the power up for a short time
after the supply has been switched off, but the supply voltage must reach less
than 0.1v before it is turned back on if a Power-On reset is to occur.
Whenever power is automatically switched on, or is manually requested to be
switched on, the software waits for an amount of time equal to the Tpu delay
time before attempting to contact the 68HC08 processor. This is to allow time
not only for power to be fully available, but to wait until any reset driver has
finally released the RESET line. On many ICS08 boards (such as the
ICS08RK, M68ICS08JL3, M68ICS08JLJK, and ICS08GP32) the Tpu can be
decreased to as little as 250ms with no adverse affects .
Target has RESET button (class III boards only): The software
occasionally needs to get control of the target. On systems which are Class III
boards with the monitor mode circuitry built-in (including RS-232 driver),
there is no means to reset the target to gain control. If the board has a reset
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button, the software can use this to gain control of the target system. If this
option is checked, the software will prompt the user to push the target reset
button when a reset of the target system is desired. If the option is unchecked,
the software will ask the user to power cycle the target system to achieve a
reset.
G.2.1.3.2 MON08 Cable connection communications type (Class II boards

Only)
This selection box is valid only for Class II hardware configurations using the
MON08 cable. It allows the user to specify the sequence that the software uses
to power up the ICS system. When the software tries to create a power-on
reset condition, two events must occur:
1. Power of the target MCU must go below 0.1v. This means that the
processor can not be receiving power from its power pins, nor can it have a
significant voltage being driven on port pins or the IRQ line, as these will
drive the MCU power back through these pins. It is crucial, therefore, to
have the ICS and the Target both powered down at some point in time.
2. The processor MON08 configuration pins, including IRQ, must be
properly driven when the target processor resets to drive it into monitor
mode. If these pins are not set up properly before the processor powers up,
the processor may start up in user mode.
Power Down ICS, Ask the user to power down their board, Power Up ICS,
Ask the user to power up their board
This is the default option and should work for most, if not all, ICS08/Target
Board solutions. Refer to the manual addendum under startup for the settings
for a specific ICS board. It requires the user go through two dialog stages, and
requires more time than simply cycling the power.
1. Software automatically powers down the ICS.
2. Software Asks the user to power down the board as follows:
Figure G-8. Power Down Dialog
3. Software automatically powers up the ICS, which configures the

processor’s MON08 configuration pins.
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4. Software asks the user to power up the board as follows:
Figure G-9. Power Up Dialog
Power Down ICS, Ask the user to power cycle their board, Power UP ICS
This option will work for many ICS boards as well, but relies on the fact that
while the ICS is powered off, it will hold the target in reset until it is powered
up itself and has configured the MON08 configuration pins. The sequence of
events in this mode is:
1. Software automatically powers down the ICS.
2. Software asks the user to power cycle their board as follows:
Figure G-10. Power Cycle Dialog
3. Software automatically powers up the ICS, which configures the

processors MON08 configuration pins.
G.2.2 PC SERIAL PORT CONFIGURATION

This allows configuration of the COM port and baud rate that the PC uses to
attempt communication to the target. The baud rate depends on the processor’s
port pin values during reset, and the frequency of the oscillator connected to
the processor. Refer to your microcontroller part specification for information
on baud rates for particular processor frequencies.
A sample list of ICS boards with targets of different frequencies is listed here:
M68ICS08JL3 4.9152MHZ 9600 Baud

M68ICS08JL3 9.8304MHZ 19200 Baud
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M68ICS08JLJK 4.9152MHZ 4800 Baud

M68ICS08JLJK 9.8304MHZ 9600 Baud
ICS08GP32 4.9152MHZ 9600 Baud
ICS08GP32 9.8304MHZ 19200 Baud
If the “Port” and “Baud” setting are grayed out and cannot be changed, this is
because the COM port is currently open by the software. Click the “Close
COM Port” button and you will then be able to change these values.
Note that if you are using a Class II or III board and you are connecting to a
target without an oscillator or crystal (i.e., the processor has an internal
oscillator such as the 68HRC08JL3), you will have to provide an external
clock source to the processor because, in monitor mode, an internal oscillator
is automatically bypassed.
For information on passing security mode, read this topic carefully and also
refer to Section G.6.2 68HC08 SECURITY MODE.
G.2.3 TARGET MCU SECURITY BYTES

One of the steps that is necessary to properly bypass security is to provide the
proper security code for the information that is programmed into the part. This
holds true even when the part is blank.
The security code consists of the 8 values which are currently stored in flash
locations $FFF6 - $FFFD of the processor. The PROG08SZ flash
programming software continually records any changes to these security bytes
and stores them in the file SECURITY.INI. The information in this file is
shared with P&E's In-Circuit Debugger and In-Circuit Simulator software, and
will appear in the dialog box. This allows the user to specify which security
code to use to pass security.
This dialog can also be used by the user to manually enter the proper security
bytes via the USER setting, or to load the security bytes from the same .S19
file which was programmed. The bytes are loaded from an .S19 file by
clicking the “Load from S19” button.
IGNORE security failure and enter monitor mode
This checkbox can be used to cause the software to ignore a failure to
properly pass the 68HC08 security check. If the checkbox is set, the
software will attempt to establish monitor mode communications
regardless of the security status. As long as the Baud and Port are correct,
and the device has been properly powered, this will allow monitor mode
entry. Note that by ignoring the security check failure, you may use
monitor mode, but the ROM/Flash will not be accessible.
The checkbox can be set to be checked on startup via the
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FORCEBYPASS command-line parameter, which will cause the software

to ignore security check failure. This checkbox can be overridden to be
unchecked on startup via the FORCEPASS command-line parameter,
which will cause the software to pop-up the connection dialog when the
security check has failed. Note that if a connection is not established for a
reason other than security failure, the connection dialog will always
appear.
G.2.4 STATUS
The status area consists of one status string following the “Status:” label, and
seven items which list the state of the last attempt to connect to a target and
pass security. The description for these items is as follows:
0 – ICS Hardware loopback detected:
Every ICS or board which supports MON08 has a serial loopback in
hardware which, by connecting the transmit and receive lines,
automatically echoes characters from the PC. A valid character transmitted
from the PC should be echoed once by the loopback circuitry on the board
and once by the monitor of the target processor itself. This status indicates
whether or not the first echoed character from the hardware loopback was
received when one of the security bytes was transmitted. If the status is
‘N’, which indicates that the character was not received, it is most likely
due to one of the following reasons:
1. Wrong Com Port specified.
2. The baud rate specified was incorrect (probably too low).
3. The ICS/Target is not connected.
4. No Power to the ICS.
If this status bit responded with an ‘N’, you must correct this before
analyzing the reset of the status bits.
1 – Device echoed some security bytes :
The monitor resident in a 68HC08 device automatically echoes every
incoming character when it is in monitor mode. A valid character
transmitted from the PC should be echoed once by the loopback circuitry
on the board and once by the monitor of the target processor itself. This
status indicates whether or not the second echoed character from the
monitor response was received when one of the security bytes was
transmitted. If the status is ‘N’, which indicates that the character was not
received, or not received properly, it is most likely due to one of the
following reasons:
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1. The baud rate specified was incorrect.

2. The part did not start the monitor mode security check on reset.
Signals to force monitor mode may be incorrect.
3. No Power to the ICS.
If this status bit responded with an ‘N’, you must correct this before
analyzing the reset of the status bits.
2 – Device echoed all security bytes:
In order to pass security, the software must send 8 security bytes to the
processor. The processor should echo each of these eight bytes twice. If
all 8 bytes did not get the proper two-byte echo, this flag will be ‘N’.
Reasons for this include:
1. The part did not start the monitor mode security check on reset.
Signals to force monitor mode may be incorrect.
3. The processor was not reset properly. Check the “Target Hardware
Type” and if you are connecting to a class II board, check the “MON08
cable communication connections type” in the “advanced settings”
dialog.
3 – Device signaled monitor mode with a break:
Once the processor has properly received the 8 bytes from the PC software
to complete its security check, it should transmit a break character to the
PC signaling entry into monitor mode. This break should be sent
regardless of whether the security check was successfully passed. If a
break was not received from the processor, this flag will be ‘N’. Reasons
for this include:
Type”. If you are connecting to a class II board, check the “MON08
dialog.
4 – Device entered monitor mode:
Once the software has received, or failed to receive, a break from the
processor, it attempts to communicate with the monitor running on the
68HC08 processor. It tries to read the monitor version number by issuing a
monitor mode read. If the processor fails to respond properly to this
command, this flag will be ‘N’.
5 – Reset was Power-On Reset:
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If the device properly entered monitor mode (4), the software will read the
reset status register (RSR). This read does not affect the security sequence,
and occurs purely for diagnostic reasons. The reset status register indicates
the conditions under which the processor underwent the last reset. For the
software to pass the security check properly, it MUST first cause the
processor to undergo a Power-On Reset. The software reads the reset
status register to determine if the last reset was indeed caused by power-on.
The result of the reset status register is indicated in parentheses after the
flag value. If the highest bit is not set then the reset was not a power on
reset, and the flag will indicate ‘N’. Reasons for this include:
1. The processor did not power all the way down because power was
being supplied to the processor through either the port pins, IRQ line,
RESET line, or power pins.
2. The voltage driven on the power pin of the processor did not go
below 0.1 volts.
Type”. If you are connecting to a class II board, check the “MON08
dialog.
6 – ROM is accessible (un-secured):
If the device properly entered monitor mode (4), the software reads
locations $FFF6-$FFFF to determine if the processor passes the security
check. Memory locations which are invalid or protected read back from the
device as $AD. If all bytes from $FFF6-$FFFF read a value of $AD, it is
assumed the device is secure, and the flag value is an ‘N’. If all flags 0-5
register a value of ‘Y’ and flag 6 register a value of ‘N,’ then the reset
process has gone correctly except that the security code used to pass
security was incorrect. Specify the correct security code and try again, or
IGNORE the security failure and erase the device. Once you erase a
secured device, you must exit the software and restart it in order to pass
security.
G.2.5 ADDITIONAL DIALOG BUTTONS

The following buttons are also available:
Contact target with these settings – This causes the software to attempt to
cause a power on reset of the target, and to attempt to pass security with the
settings in this dialog.
Simulation Only – This button is only visible in In-Circuit Simulation. This
causes the In-Circuit Simulator not to use the target and, instead, to do
completely software-based simulation. The /SIM08 command-line parameter
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has the same function.

Halt – This causes the software to terminate and return to the calling
environment.
G.3 EXAMPLE PROJECT

ICS08GPGTZ EXAMPLE PROJECT
For the M68HC908GP32 and M68HC908GT16/GT8
©Copyright 1999, 2000 P&E Microcomputer Systems, Inc.
http://www.pemicro.com
G.3.1 OVERVIEW
This section provides information that will guide you through a first-time use
of the ICS08GPGTZ software package. This section explains the included
demo program and also how to use different software components in the
development package to work with the demo. The demo will work for the
M68HC908GP32 and M68HC908GT16/GT8 processors.
G.3.2 WINIDE AND THE DEMOGPGT APPLICATION

WinIDE is an editing application which allows seamless integration of several
different programs into one development environment. Hotkeys are provided
which allow one touch code assembly (F4), as well as switching to other
applications such as the Simulator(F6), Programmer(F7), and Debugger(F8).
WinIDE can be run by clicking on the ICON titled “WinIDE Development
Environment”.
WinIDE is shipped so that it will open the HC08GPGT.PPF demo project
when it is run for the first time. A project in WinIDE keeps track of what
editing files are open, as well as settings for what external programs are
currently configured to run from WinIDE. Upon running WinIDE, two files
will be open for the user to edit:
WELCOME_GPGT.ASM - This file contains overview information of the
ICS08GPGTZ package, and briefly describes the different software
components installed in the package. It is strongly recommended that the user
read this file before continuing.
DEMOGPGT.ASM - This is a sample M68HC908GP32/GT16/GT8
application which can be compiled and run, and provides a framework for the
user to create their own application.
The following file is not open, but is used in the assembly process:
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GPGTREGS.INC - This is an include file which is used by the

DEMOGPGT.ASM sample application. It defines symbols for all the registers
on the M68HC908GP32/GT16/GT8 processors.
G.3.3 ABOUT THE DEMOGPGT APPLICATION

The DEMOGPGT application provides a framework for what an application
should look like and demonstrates some MCU features such as the on-chip
timer, serial communications interface, and A/D converter. An output
compare channel of the timer is used to create a time base for the application
by continually interrupting the processor when the timer reaches a certain
value. The DEMOGPGT application sets an output compare to happen every
2ms by continually setting the channel up every time the interrupt occurs.
Based upon this interrupt interval, three general purpose timeouts are created,
each with a resolution of 2ms and a maximum timeout of 510 ms (1-255). Each
of the [timeout1..timeout3] variable is decremented every time the output
compare interrupt occurs, and if a value goes to zero, the
[t1_handler..t3_handler] routine is run. If the timeout variable is already zero,
it will not be decremented.
The timeout 1 variable is set to three during initialization, so the t1_handler
will run after 6ms. When t1_handler is run, the A/D converter is set up to do a
single conversion and cause an interrupt. After starting the conversion, the
timeout 1 routine schedules another timeout 1 routine in 6ms (timeout=3).
When the A/D converter interrupt occurs signaling that the conversion is
complete, we take the value in the A/D data register and transmit it out the SCI
serial port.
G.3.4 APPLICATION FRAMEWORK

This section explains the framework of the DEMOGPGT application.
G.3.4.1 Initializing Constants

One of the many conveniences of the CASM08Z assembler is defining a
constant name with a fixed value. This makes code very easy to read and
makes code maintenance much easier. The EQU pseudo-op is what assigns a
numerical value to a label. Refer to the CASM08Z chapter for more detailed
information. In the following code snippet, we create constants for the memory
locations as well as include the GPGTREGS.INC file which defines constants
for all the on-chip peripheral registers. Note that the label name must start in
the first column.
RAMStart EQU $0040
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RomStart EQU $E000 ; This is valid ROM on the GP32 and

; GT16/GT8
VectorStart EQU $FFDC
ADC_Channel EQU 5t
ADC_ENABLE_INT EQU 01000000q ; Bit mask for interrupt enable bit
; in the ADC status/control Reg
$Include 'gpgtregs.inc'
… etc …
G.3.4.2 Creating RAM Variables

Creating a RAM variable is as simple as telling the assembler you want to
reserve space at a certain address, and want to assign a name to it. The reserved
space should be in RAM. The ORG pseudo-op tells the assembler to start
compiling instructions and pseudo-ops following it at the address specified.
For example, an ORG $40 would cause the assembler to compile following
lines starting at address $0040. The ORG pseudo-op cannot be in the first edit
column. The DS pseudo-op stands for “define space”. The value following the
DS pseudo-op is the number of bytes to reserve. Here is the code snippet
setting up some variables from DEMOGPGT.ASM:
org RamStart
temp_long ds 4
temp_word ds 2
temp_byte ds 1
… etc …
G.3.4.3 Specifying the ROM Code Location

Specifying when the assembler should place your code is the same as setting
the location for variables. The ORG pseudo-op is used to specify where the
code following the pseudo-op line is to be assembled. The DEMOGPGT.ASM
application places the “ORG ROMSTART” line right before all the assembly
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code which goes into ROM.
org RomStart
**************************************************************
* Init_Timer - Turns on timer 1 channel 0 for an Output *
* Compare in approximately 2ms. The timer *
* interrupt service routine continually sets *
* the next interrupt to occur 2ms later. *
**************************************************************
Init_Timer:
mov #$36,TSC ; Timer 1 - Cleared + Stopped.
; Clicks once every 64 BUS Cycles
; 200t Clicks ~ 2ms
mov #$0,TCH0H ; Set Output Compare to happen 77T clicks
mov #77T,TCH0L ; after we start the timer. (~2ms). The
; timer interrupt will set OC for
; another ~2ms.
… etc …
G.3.4.4 Assigning the Vectors

The vector table on the 68HC08 specifies what code is to be executed when the
MCU resets or processes an interrupt. The reset vector should contain the
address of the start of your application. The other vectors, such as the timer
channel vectors, should contain the addresses of your exception handlers. The
DEMOGPGT application specifies all vectors, but only three execute useful
code. The reset vector points to the main_init routine which handles
initialization and has the main application loop. The timer channel 0 vector
points to an interrupt service routine which keeps the time base for the sample
application. The ADC conversion complete vector points to the atod_isr
routine which transmits the converted value out the serial port. All other
vectors point to the dummy_isr routine which simply executes a return from
interrupt.
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**************************************************************
* Vectors - Specifying Reset and Timer Interrupt Routines *
**************************************************************
org VectorStart
dw dummy_isr ; Time Base Vector

dw atod_isr ; ADC Conversion Complete
dw dummy_isr ; Keyboard Vector
dw dummy_isr ; SCI Transmit Vector
dw dummy_isr ; SCI Receive Vector
dw dummy_isr ; SCI Error Vector
dw dummy_isr ; SPI Transmit Vector
dw dummy_isr ; SPI Receive Vector
dw dummy_isr ; TIM2 Overflow Vector
dw dummy_isr ; TIM2 Channel 1 Vector
dw dummy_isr ; TIM1 Overflow Vector
dw t_isr ; TIM1 Channel 0 Vector
dw dummy_isr ; PLL Vector
dw dummy_isr ; ~IRQ1 Vector
dw dummy_isr ; SWI Vector
dw main_init ; Reset Vector
G.3.5 ASSEMBLING THE DEMO APPLICATION

After reading the WELCOME.ASM file, make the DEMOGPGT.ASM
window the currently active window. This is done either by clicking the edit
window which has DEMOGPGT.ASM in the title bar, or by using CTRL-TAB
to switch between editing windows. If the DEMOGPGT.ASM is not currently
open in the editor, use the File|Open menu item to select the file and open it. At
this point press the F4 function key. You will see an assembly window pop up
and then disappear. The assembly result is shown in the bottom status bar of
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WinIDE, and should say “successful assembly”. If there was an error, the line
causing the error would be highlighted, and the status bar would contain a
description of the error reported by the assembler. Note that by default
assembly creates a listing file (.LST), a debug map file (.MAP), and an object
file (.S19).
G.3.6 SIMULATING THE DEMO APPLICATION

Make sure the DEMOGPGT.ASM file is the currently active window in
WinIDE. If you have not yet assembled the DEMOGPGT application, do so
now. To simulate this application in the ICS08GPGTZ in-circuit simulator
(ICS), simply run the ICS08GPGTZ by using the F6 function key. The ICS
application will start up, and you should see the DEMOGPGT source-code
appear in the code window. This happens because the WinIDE passes the
filename to load to the simulator automatically. Also, when the simulator loads
the DEMOGPGT object file, it sets the PC to the reset vector specified in the
file. In this case, you should see the PC pointing to the MAIN_INIT routine.
You can use the BR command to set breakpoints in the timer routine and use
the cycle counter to verify the time between timer interrupts when you run the
demo using the GO command. The CAPTURE command is very useful for
tracking when and if a memory location's value changes. If you capture the
temp_byte variable, the capture file will contain the cycle count of each time
temp_byte was modified. If you execute the GO command you should see
execution stop and the part reset after $20000 cycles due to the COP watchdog.
The COP can be disabled in the demo application by uncommenting the
COPCTL write instruction in the main application loop(sta copctl). Note that
when the simulation runs, the speed will be much slower that real-time
execution. To see real-time execution, use the flash programmer and in-circuit
debugger.
G.3.7 PROGRAMMING THE DEMO APPLICATION IN FLASH

The programming steps in this section illustrate a typical sequence to program
the DEMOGPGT application into the flash on the M68HC908GP32/GT16/
GT8 MCUs. If you have not yet assembled the DEMOGPGT application, do
so now. Now run the PROG08SZ programmer by using the F7 function key.
When PROG08SZ starts, it performs an automatic REset (section 8.3.13) and
brings up the Choose Module selection window. Follow the following steps:
1. Using the Choose Module window, select the proper programming
algorithm file for programming the particular MCU:
908_GP32.08P ;Programming file for the M68HC908GP32. This
algorithm is included for use with very slow computers.
If possible, the 908_GP32_HIGHSPEED algorithm
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should be used instead.

908_GP32_HIGHSPEED.08P
;Programming file for the M68HC908GP32. This
algorithm uses advanced communications techniques to
program the MCU at a faster data rate than
908_GP32.08P.
908_GT16.08P ;Programming file for the M68HC908GT16. This
If possible, the 908_GT16_HIGHSPEED algorithm
908_GT16_HIGHSPEED.08P
;Programming file for the M68HC908GT16. This
908_GT16.08P.
908_GT8.08P.
2. Execute the Blank-check Module command (section 8.3.1).
3. If the results from the BM command indicate that the module is not blank,
execute the Erase Module command (section 8.3.3). Then repeat the BM
command, which should now indicate that the module is blank.
4. With the Specify S-record command (section 8.3.7), select the
DEMOGPGT.S19 S-record file to load into the module.
5. Execute the Program Module command (section 8.3.5). This command
should complete with the message PROGRAMMED. This command also does
a verify of the device while it is programming.
At this point the device is programmed with the demo application. If the part is
powered in a system without monitor mode circuitry, the application will start
automatically. For the ICS board, use the ICD08SZ in-circuit debugger to start
the application which was just programmed into flash.
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G.3.8 RUNNING THE DEMO APPLICATION IN REAL-TIME

To run this application in real-time, you first have to use the PROG08SZ
application to program the S19 into the GP32/GT16/GT8's on-chip flash block.
Make sure you have first added code to disable the COP. Once you have put
the application in flash, run the ICD08SZ in-circuit debugger by using the F8
function key from WinIDE. Next, you should load the debug information for
the application now programmed into the flash. Type "LOADMAP
DEMOGPGT.MAP" in the status window. Reset the processor by typing the
“RESET” command. At this point you should see the DEMOGPGT.ASM
source code in the source window. To run the application real-time, use the
“GO” command. After the GO command has been issued, you should be able
characters rapidly coming out of the MCU’s TXD transmitter. To stop
execution, hit the spacebar. At this point you will be prompted to reset the
device to regain control of the processor. The only ways a running processor
will stop is if it hits a hardware breakpoint, or if it is reset from the HOST. If
you set breakpoints, remember that only the first breakpoint (the hardware one)
set is valid in flash. To make sure you are using the first breakpoint, use the
NOBR command before you set the breakpoint.
G.4 ICD08SZ IN-CIRCUIT DEBUGGER

Additional Limitations
The M68ICS08SOM/D Manual Chapter 7 lists a series of MON08 limitations
the user should be aware of when using the ICD08SZ debugger. The ICD08SZ
debugger allows direct control of the target M68HC908GP32/GT16/GT8
device via the MON08 on chip monitor. This additional limitation applies to
using ICD08SZ with M68HC908GP32/GT16/GT8 devices:
(1) You must not change the data direction or data value of PORTA Bit 0.
When written, these bits should be set to 0. The PORTA0 pin is used as the
MON08 communications pin. When writing address $0001 (PORTA) or
$0005 (DDRA) the user should be aware of this limitation.
Note: These limitations apply to the ICD08SZ software only. ICS08GPGTZ
limitations are covered separately.
G.5 ICS08GPGTZ IN-CIRCUIT SIMULATOR
G.5.1 COMMANDS
In addition to the commands listed in Chapter 8 of your M68ICS08SOM/D
manual, the following commands are operational in the ICS08GPGTZ
software.
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G.5.1.1 ADDI Command

The ADDI command allows the user to input data into the A/D converter. If a
data parameter is given, the value is placed into the next slot in the circular
input buffer. Otherwise if no parameter is given, a window is displayed with
the input buffer values. Input values can be entered while the window is open.
An arrow points to the value that will be used next as input to the A/D. The
maximum number of input values is 256 bytes.
Note: If the ICS08 circuit board is connected, A/D inputs are received from the
board, so this command has no effect.
Syntax:
ADDI [<n>]
Where:
<n> The value to be entered into the next location in the input buffer.
Example:
>ADDI $55 Set the next input value to the ADDI to $55.
>ADDI Pull up the data window with all the input values.
G.5.1.2 ADCLR Command

The ADCLR command can be used to flush the input buffer for A/D
simulation. This will reset the circular buffer and clear out all values. Notice
that if the A/D is currently using a value, this command will not prevent the A/
D from using it. See ADDI for accessing the input buffer of the A/D interface.
Note: If the ICS08 circuit board is connected, A/D inputs are received from the
board, so this command has no effect.
Syntax:
ADCLR
Example:
>ADCLR Clear the input buffer for A/D simulation.
G.5.1.3 DDRA Command

The DDRA command assigns the specified byte value to the port A data
direction register (DDRA).
Note: If the ICS08 circuit board is connected, the system sends the n parameter value
of this command to the board.
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Syntax:
DDRA <n>
Where:
<n> The byte value to be placed into DDRA.
Examples:
>DDRA FF Set all port A pins as outputs.
>DDRA 00 Set all port A pins as inputs.
G.5.1.4 DDRB Command

The DDRB command assigns the specified byte value to the port B data
direction register (DDRB).
Syntax:
DDRB <n>
Where:
<n> The byte value to be placed into DDRB.
Examples:
>DDRB 00 Set all port B pins as inputs.
>DDRB FF Set all port B pins as outputs.
G.5.1.5 DDRC Command

The DDRC command assigns the specified byte value to the port C data
direction register (DDRC).
Syntax:
DDRC <n>
Where:
<n> The byte value to be placed into DDRC.
Examples:
>DDRC 00 Set all port C pins as inputs
>DDRC FF Set all port C pins as outputs. command assigns the specified
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byte value to the port C data direction register (DDRC).
G.5.1.6 DDRD Command

The DDRD command assigns the specified byte value to the port D data
direction register (DDRD).
Syntax:
DDRD <n>
Where:
<n> The byte value to be placed into DDRD.
Examples:
>DDRD 00 Set all port D pins as inputs
>DDRD FF Set all port D pins as outputs.
G.5.1.7 DDRE Command

The DDRE command assigns the specified byte value to the port E data
direction register (DDRE).
Note:
If the ICS08 circuit board is connected, the system sends the n parameter value
Syntax:
DDRE <n>
Where:
<n> The byte value to be placed into DDRE.
Examples:
>DDRE 00 Set all port E pins as inputs
>DDRE FF Set all port E pins as outputs.
G.5.1.8 INPUTA Command

The INPUTA command sets the simulated inputs to port A. The CPU reads
this input value when port A is set as an input port.
Note:
If the ICS08 circuit board is connected, port A inputs come from the board, so
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this command has no effect.

Syntax:
INPUTA <n>
Where:
<n> Eight-bit simulated value for port A.
Example:
>INPUTA AA Simulate the input AA on port A.
G.5.1.9 INPUTB Command

The INPUTB command sets the simulated inputs to port B. The CPU reads this
input value when port B is set as an input port.
Note:
If the ICS08 circuit board is connected, port B inputs come from the board, so
Syntax:
INPUTB <n>
Where:
<n> Eight-bit simulated value for port B.
Example:
>INPUTB 01 Simulate the input 01 on port B.
G.5.1.10 INPUTC Command

The INPUTC command sets the simulated inputs to port C. The CPU reads this
input value when port C is set as an input port.
Note:
If the ICS08 circuit board is connected, port C inputs come from the board, so
Syntax:
INPUTC <n>
Where:
<n> Eight-bit simulated value for port C.
Example:
>INPUTC 01 Simulate the input 01 on port C.
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G.5.1.11 INPUTD Command

The INPUTD command sets the simulated inputs to port D. The CPU reads
this input value when port D is set as an input port.
Note:
If the ICS08 circuit board is connected, port D inputs come from the board, so
Syntax:
INPUTD <n>
Where:
<n> Eight-bit simulated value for port D.
Example:
>INPUTD 01 Simulate the input 01 on port D.
G.5.1.12 INPUTE Command

The INPUTE command sets the simulated inputs to port E. The CPU reads this
input value when port E is set as an input port.
Note:
If the ICS08 circuit board is connected, port E inputs come from the board, so
Syntax:
INPUTE <n>
Where:
<n> Eight-bit simulated value for port E.
Example:
>INPUTE 01 Simulate the input 01 on port E.
G.5.1.13 INPUTS Command

The INPUTS command shows the simulated input values to applicable ports
(entered via the INPUT[x] commands).
Note:
If the ICS08 circuit board is connected, this command shows input values from
the board.
Syntax:
INPUTS
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Example:
>INPUTS Show I/O port input values.
shows:
Port A - AA Port B - 01 Port D - 33 IRQ = 1
G.5.1.14 PORTA or PRTA Command

The PORTA command assigns the specified value to the port A output register
latches. (The PRTA command is an alternate form of the PORTA command).
Syntax:
PORTA <n>
Where:
<n> The new value for the port A output latches.
Example:
>PORTA FF Set all port A output latches high.
G.5.1.15 PORTB or PRTB Command

The PORTB command assigns the specified value to the port B output register
latches. (The PRTB command is an alternate form of the PORTB command).
Syntax:
PORTB <n>
Where:
<n> The new value for the port B output latches.
Example:
>PORTB 03 Set the port B output latches to 03.
G.5.1.16 PORTC or PRTC Command

The PORTC command assigns the specified value to the port C output register
latches. (The PRTC command is an alternate form of the PORTC command).
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Syntax:
PORTC <n>
Where:
<n> The new value for the port C output latches.
Example:
>PORTC 03 Set the port C output latches to 03.
G.5.1.17 PORTD or PRTD Command

The PORTD command assigns the specified value to the port D output register
latches. (The PRTD command is an alternate form of the PORTD command).
Note: If the ICS08 circuit board is connected, the system sends the parameter value
Syntax:
PORTD <n>
Where:
<n> The new value for the port D output latches.
Example:
>PORTD 03 Set the port D output latches to 03.
G.5.1.18 PORTE or PRTE Command

The PORTE command assigns the specified value to the port E output register
latches. (The PRTE command is an alternate form of the PORTE command).
Syntax:
PORTE <n>
Where:
<n> The new value for the port E output latches.
Example:
>PORTE 03 Set the port E output latches to 03.
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G.5.1.19 SCCLR Command

The SCCLR command can be used to flush the input and output buffers for
SCI simulation. This will reset the circular buffers and clear out all values.
Notice that if the SCI is currently shifting a value, this command will not
prevent the SCI from finishing that transfer. See SCDI and SCDO for
accessing the input and output buffers of the SCI interface.
Note:
If the ICS08 circuit board is connected, SCI inputs and outputs are directed
from the board, so this command has no effect.
Syntax:
SCCLR
Example:
>SCCLR Clear input and output buffers for SCI simulation.
G.5.1.20 SCDI Command

The SCDI command allows the user to input data into the SCI. If a data
parameter is given, the value is placed into the next slot in the circular input
buffer. Otherwise if no parameter is given, a window is displayed with the
input buffer values. Input values can be entered while the window is open. An
arrow points to the value that will be used next as input to the SCI. The
Note:
Syntax:
SCDI [<n>]
Where:
Example:
>SCDI $55 Set the next input value to the SCI to $55.
>SCDI Pull up the data window with all the input values.
G.5.1.21 SCDO Command

The SCDO command displays the output circular buffer from the SCI. A
window is opened that shows all the data that the SCI has shifted out. An arrow
is used to point to the last output value transmitted. The maximum number of
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output values that the buffer holds is 256 bytes.

Note:
Syntax:
SCDO
Example:
>SCDO View data from the output buffer for SCI simulation.
G.5.1.22 SPCLR Command

The SPCLR command can be used to flush the input and output buffers for SPI
simulation. This will reset the circular buffers and clear out all values. Notice
that if the SPI is currently shifting a value, this command will not prevent the
SPI from finishing that transfer. See SPDI and SPDO for accessing the input
and output buffers of the SPI interface.
Note:
If the ICS08 circuit board is connected, SPI inputs and outputs are directed
Syntax:
SPCLR
Example:
>SPCLR Clear input and output buffers for SPI simulation.
G.5.1.23 SPFREQ Command

The SPFREQ command lets the user set the frequency of the SPI slave input
clock. If the SPI is configured for slave mode, this command allows the user to
enter the number of cycles (n) that the period of the input clock will be. If no
value is given, a popup window will appear and the user will be prompted for a
value. If this command is not used, then clocking is assumed to be set by the
SPI control register.
Note:
Syntax:
SPFREQ [<n>]
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Where:
<n> The number of cycles for the period of the input clock.
Example:
>SPFREQ 8 Set the period of the input slave clock to 8 cycles (total shift =
8*8 =64 cycles).
G.5.1.24 SPDO Command

The SPDO command displays the output circular buffer from the SPI. A
window is opened that shows all the data that the SPI has shifted out. An arrow
is used to point to the last output value transmitted. The maximum number of
output values that the buffer holds is 256 bytes.
Note:
Syntax:
SPDO
Example:
>SPDO View data from the output buffer for SPI simulation.
G.5.1.25 SPDI Command

The SPDI command allows the user to input data into the SPI. If a data
parameter is given, the value is placed into the next slot in the circular input
buffer. Otherwise if no parameter is given, a window is displayed with the
input buffer values. Input values can be entered while the window is open. An
arrow points to the value that will be used next as input to the SPI. The
Note:
Syntax:
SPDI [<n>]
Where:
Example:
>SPDI $55 Set the next input value to the SPI to $55.
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>SPDI Pull up the data window with all the input values.
G.5.1.26 XTAL Command

The XTAL command is used to change the value of the simulated external
oscillator. This in turn will affect the input to the PLL/DCO and therefore the
bus frequency. The P&E HC908GPGT simulator is a cycle based simulator, so
changing the XTAL value will not affect the speed of simulation; it will,
however, affect the ratio in which peripherals receive cycles. Certain
peripherals which run directly from the XTAL will run at different speeds than
those that run from the bus clock-- in essence, this command will change the
ratio of XTAL:BUS cycles based on the value of the external oscillator and the
relevant clock generator values.
Format:
XTAL <n> where n, by default, is a hexadecimal number. Adding the suffix
"t" to the n parameter will force the input value to be interpreted as base 10.
XTAL with no parameters will bring up an input window; the default base for
this input value is ten, but can be forced to a hexadecimal value through use of
the suffix "h".
G.5.2 MEMORY MAPS

This section contains the memory maps for the 68HC908GP32 and GT16/GT8
parts.
G.5.2.1 M68HC908GP32 Memory Map

$0000 - $003F I/O Registers: 64 Bytes
$0040 - $023F RAM 512
$0240 - $7FFF Unimplemented 32,192 bytes
$8000 - $FDFF FLASH Memory: 32,256 bytes
$FE00 SIM Break Status Register (SBSR)
$FE01 SIM Reset Status Register (SRSR)
$FE02 Reserved (SUBAR)
$FE03 SIM Break Flag Control Register (SBFCR)
$FE04 Interrupt Status Register 1 (INT1)
$FE07 Reserved (FLTCR)
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$FE08 FLASH Control Register

$FE09 Break Address Register High (BRKH)
$FE0A Break Address Register Low (BRKL)
$FE0B Break Status And Control Register (BRKSCR)
$FE0C LVI Status Register (LVISR)
$FE0D - $FE0F Unimplemented: 3 bytes
$FE10 - $FE1F Unimplemented: 16 bytes
Note: Reserved for compatibility with monitor code
for A-Family parts
$FE20 - $FF52 Monitor ROM: 307 bytes
$FF53 - $FF7D Unimplemented: 43 bytes
$FF7E Flash Block Protect Register (FLBPR)
$FF7F - $FFDB Unimplemented: 93 bytes
$FFDC - $FFFF Flash Vectors: 36 bytes
G.5.2.2 M68HC908GT16 Memory Map

$0040 - $023F RAM 512
$0240 - $1B4F Unimplemented 6416 bytes
$1B50 - $1E1F FLASH Programming Routines ROM: 720 bytes
$1E20 - $BFFF Unimplemented 41,440 Bytes
$C000 - $FDFF Flash Memory: 15,872 Bytes
$FE07 Reserved
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for A-Family parts
$FE20 - $FF4F Monitor ROM: 304 bytes
$FF7F Unimplemented: 1 byte
$FF80 ICG User Trim Register 5V (ICGTR5)
$FF82 - $FFDB Unimplemented: 90 bytes
G.5.2.3 M68HC908GT8 Memory Map

$0040 - $023F RAM 512
$0240 - $1B4F Unimplemented 6416 bytes
$1B50 - $1E1F FLASH Programming Routines ROM: 720 bytes
$1E20 - $BFFF Unimplemented 41,440 Bytes
$C000 - $DFFF Unimplemented
$E000 - $FDFF Flash Memory: 7680 Bytes
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$FE07 Reserved
for A-Family parts
$FE20 - $FF4F Monitor ROM: 304 bytes
$FF7F Unimplemented: 1 byte
$FF82 - $FFDB Unimplemented: 90 bytes
G.5.3 PERIPHERALS
The following peripherals are specific to the M68HC908GP32/GT16/GT8
microcontroller units. For information on the difference between Simulation
Only and In-Circuit Simulation, consult Section 5.2.1 - ICS08 Simulation
Speed of your M68ICS08SOM/D manual.
G.5.3.1 A/D Converter - Analog/Digital Converter

Simulation Only Mode
To simulate the A/D converter interface, the commands ADCLR and ADDI
can be used. Sample values that the user expects the A/D converter to put out
can be entered into an input buffer by using the ADDI command. These values
are placed into the A/D data register when the next conversion completes. If no
value has been specified, following the conversion the A/D data register will
remain undefined. Attempts to read this location will result in an uninitialized
memory error. ADCLR will clear the input buffer values.
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In-Circuit Simulation Mode

In this mode, all reads of the analog-to-digital converter data register come
from the board itself. If you read the data register, it will give you the digital
value of the analog voltage on the selected pin. All timing for the analog-to-
digital conversion, including conversion completion time, is simulated.
G.5.3.2 IRQ - Causing Interrupts

The IRQ pin is simulated as either an edge or an edge and level triggered
interrupt. The default state out of reset is edge and level sensitive only.
To set a value for the pin, use the IRQ command.
Example:
>IRQ 0 This will set the IRQ pin low. If the I bit in the CCR is cleared and
the IRQ Interrupt Enable bit is set, an interrupt will occur after the
next instruction is simulated.
The reset pin is simulated by the RESET command.
The IRQ status and control register used in simulation is the actual register on
the ICS board processor itself. The IRQ command allows the user to see the
current value of the IRQ pin, but doesn’t allow the user to set the IRQ pin
level.
G.5.3.3 I/O Pins - Setting Input and Output Pins

Inputs for I/O pins are simulated with INPUT commands (i.e. INPUTA,
INPUTB, etc...) from the status window or a macro file. For example, to
simulate an input of $A3 on Port A, the following command can be entered:
Example:
>INPUTA A3
It is important to remember that port inputs cannot be changed by using
instructions that store a value to that port (i.e. STA PORTA). Doing so will
only set the value for port outputs. For more information, refer to the I/O
diagram shown in the technical data manual for the device.
Note that inputs may not show in the memory or variables window. The values
shown in these windows depend on the value of the data direction register for
that port. To see the port inputs, type the command INPUTS. If an input has
not been specified, the value will show as XX (uninitialized).
ICS08GPGTAD/D G-39
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Outputs for the ports can be set through code or from the PRT commands (i.e.
PRTA, PRTB, etc...).
Outputs from the I/O ports can be stored and observed in a capture file through
use of the CAPTURE command.
All port and data direction values, with the exception of PORTA/DDRA Bit 0,
are the actual registers on the ICS board processor itself. So using the PORTA
command writes the PORTA output latches on the ICS board processor.
Likewise, simulation code which does a write to the PORTA register will
actually write the PORTA output latches on the ICS board processor.
G.5.3.4 KBI Module - Keyboard Interrupt Module

The software allows simulation of the KBI (Keyboard Interrupt Module).
INPUTA, DDRA, and PORTA are all involved in the process of the KBI
module generating an interrupt as per the peripheral itself. Consult your
M68HC908GP32 or GT16/GT8 technical data manual for more details on the
function of the module.
The KBI simulation model uses the Keyboard Status and Control register on
the ICS board processor itself. This way, transients on interrupt enabled
keyboard lines will be properly latched in the status register. Consult your
M68HC908GP32 or GT16/GT8 technical data manual for more details on the
function of the module.
G.5.3.5 CGMC Module (GP32 ONLY)

The software offers full simulation of the CGMC module. Due to
inconsistencies in the actual hardware, a nominal settling time of 2000 bus
cycles has been chosen for the PLL; this settling time will occur after any
change which affects the PLL's VCO output frequency or center frequency.
The clock select circuit simulation will take 4 bus cycles, and then immediately
switch frequencies.
G.5.3.6 COP Timer - Computer Operating Properly

The COP (Computer Operating Properly) timer is integrated into the simulator
in both Simulation Only and In-Circuit Simulation modes. It contains a
counter that generates a reset upon overflow. COP resets can be prevented by
clearing the COP counter periodically. The COPD bit in the CONFIG register
allows disable of the COP module.
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G.5.3.7 ICG Module (GT16/GT8 ONLY)

The software offers a non-comprehensive yet robust simulation of the ICG
module. Due to inconsistencies in the actual hardware, a nominal settling time
of 100 bus cycles has been chosen for the DCO; this settling time will occur
after any change to a register which affects the DCO's output frequency,
excluding a write to the TRIM register (the change will be implemented with
no transition time 100 cycles after any of the affected registers are written).
The external clock source settling time is eqivalent to [(4096*bus_frequency)/
crystal_frequency] bus cycles. The clock select circuit simulation will take 5
cycles, and then immediately switch clock sources. The DSTG and DDIV
registers are not written by the simulator, however they may be modified by
the user with the "MM" (memory modify) command for a more accurate
simulation of the hardware. The Clock Monitor circuitry is also not simulated,
though a memory modify of the CMF bit in the ICGCR register will result in
an MCU interrupt. The nominal frequency of the DCO has been chosen as
exactly 307.2 kHz.
G.5.3.8 LVI Module

For simulation of the LVI (Low Voltage Inhibit Module), which monitors the
voltage on the Vdd pin, the user should be aware that the LVIOUT bit is not set
and must set manually using the memory modify command. Consult your
MCU manual for more details on the function of the module.
G.5.3.9 SCI Module

To simulate the serial communications interface (SCI) the commands SCDI,
SCDO, and SCCLR can be used. To enter values into an input buffer which are
shifted into the RDI pin, use the SCDI command. To see outputs shifted out of
the TDO pin, use the SCDO command. SCCLR clears both input and output
buffers.
G.5.3.10 SPI Module

To simulate the serial peripheral interface (SPI) the commands SPDI, SPDO,
SPFREQ, and SPCLR can be used. To enter values into an input buffer which
are shifted into the SDI pin, use the SPDI command. To see outputs shifted out
of the SPI interface, use the SPDO command. SPCLR clears both input and
output buffers. If the SPI is placed in slave mode, the frequency in which data
is shifted can be set through the SPFREQ command. In both master and slave
mode, the user must make sure that the slave-select (SS) pin is set accordingly
through INPUTD commands.
ICS08GPGTAD/D G-41
Systems, Inc.
G.5.3.11 TIM - Timer Interface Module

The software allows simulation of the Timer Interface Module (TIM). The
TIM contains a 16-bit counter which provides the timing reference for two
input capture / output compare channels. Software can always read the counter
value without altering the counting sequence.
If the PWM and Output Compare functions are used, the port data bits will
automatically change according to the timer function specified and the current
cycle count. This allows the user to see and use the functionality of the timer
itself. Consult your manual for more details on the function of the module.
If the PWM and Output Compare functions are used, the ICS board pins and
the port data bits will change according to the time function specified and the
current cycle count. The lines will toggle at the proper cycle in the simulation,
and as such the timer channel outputs will change but not in real-time. Consult
your manual for more details on the function of the module.
G.5.4 PORTS
The PORTA, PORTB, and PORTD I/O ports exist in both Simulation Only
and In-Circuit Simulation mode. See the PORTA, PORTB, PORTC, PORTD,
PORTE, DDRA, DDRB, DDRC, DDRD, and DDRE commands listed in
Section G.5.1 COMMANDS.
G.5.5 IEEE695 SUPPORT

For information regarding IEEE695 support, please consult the accompanying
help file, ICS08GPGTZ.HLP.
G.6 PROG08SZ - M68HC908GP32/GT16/GT8 PART-SPECIFIC

FEATURES
G.6.1 PROGRAMMING THE DEMO APPLICATION IN FLASH

The programming steps in this section illustrate a typical sequence to program
the DEMOGPGT application into the flash on the M68HC908GP32/GT16/
GT8 MCU. If you have not yet assembled the DEMOGPGT application, do so
now. Now run the PROG08SZ programmer by using the F7 function key.
When PROG08SZ starts, it performs an automatic REset (section 8.3.13) and
brings up the Choose Module selection window. Follow the following steps:
1. Using the Choose Module window, select the proper programming
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algorithm file for programming the particular MCU:

908_GP32.08P ;Programming file for the M68HC908GP32. This
If possible, the 908_GP32_HIGHSPEED algorithm
908_GP32_HIGHSPEED.08P
;Programming file for the M68HC908GP32. This
908_GP32.08P.
908_GT16.08P.
908_GT8.08P.
Note: The PM (Program Module) function of these algorithms does both a

program and verify. The VM (verify module) function is only needed if the
user wants to do a second verify of programming.
2. Execute the Blank-check Module command (section 8.3.1).
3. If the results from the BM command indicate that the module is not blank,
execute the Erase Module command (section 8.3.3). Then repeat the BM
command, which should now indicate that the module is blank.
4. With the Specify S-record command (section 8.3.7), select the
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DEMOGPGT.S19 S-record file to load into the module.

5. Execute the Program Module command (section 8.3.5). This command
should complete with the message PROGRAMMED. This command also does
a verify of the device while it is programming.
At this point the device is programmed with the demo application. If the part is
powered in a system without monitor mode circuitry, the application will start
automatically. For the ICS board, use the ICD08SZ in-circuit debugger to start
the application which was just programmed into flash.
G.6.2 68HC08 SECURITY MODE

Monitor mode is a special mode on the 68HC08 device which allows an
external host to control the 68HC08 microcontroller via an asynchronous serial
interface. This feature allows a host computer to query and modify the state of
the processor including to load, debug, and program code. Without any
protection mechanism, this same feature could be used to read out the internals
of the microcontroller’s Rom.
The M68HC08 microcontrollers have a additional built-in mechanism to
protect a programmed device from being read and disassembled. The
mechanism allows a user who knows the security unlock code to enter monitor
mode and access the internal Rom/flash. This is often desirable to allow real-
time debugging of a programmed device. The ICD08SZ allows just such
functionality.
The security mechanism also allows a user who doesn’t know the security code
to enter monitor mode, but doesn’t give them access to the ROM. Upon failing
the security protocol, the Rom/Flash is removed from the memory map until
the next POWER-ON reset, in which case the host has to bypass security
again. The advantage of this is that even though any on-chip flash is not READ
accessible, it is erasable. Forgotten what you programmed into your device?
The answer is simple: erase it.
A device is automatically protected in this manner. The 8 bytes from address
$FFF6 to $FFFD constitute the security unlock code which can be used to pass
the security check and get access to the Rom/Flash. Hence, if a user knows
what has been programmed into a device, they implicitly know the security
unlock code.
In order to facilitate passing the security check on a 68HC08 device, the
PROG08SZ software continually records any changes to these security bytes
and stores them in the file SECURITY.INI. The information in this file is also
shared with P&E's In-Circuit Debugger and In-Circuit Simulator Software.
This allows the user to reset the device and still have access to the monitor
mode.
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Sometimes the case comes up where the software can’t pass security mode.
The Target Connection and Security Dialog section has a “STATUS” section
which describes the different failures and what to check in each case.
The most common reasons for not passing security are:
- You are not choosing the proper security code to pass security.
- On a power on reset, the device is not powering down to below 0.1
volts. With a class I board (ICS with processor), you may be driving
the pins on the emulation header while the device is being powered
down. This back-drives current through the ports and doesn’t let the
device fully power down. On other classes of boards, when prompted
to power down the device, the supply voltage might not be dropping
lower than 0.1v which it must to have a power-on reset.
- Make sure the “Target hardware type” is set to the proper class of
hardware.
There are several ways you can specify the proper security bytes:
- If you know the programmed security bytes, i.e. the bytes from $fff6-
$fffd, you can enter them in the edit box listed “User:” and click
OK(Retry).
- You can use the “Load from S19” to specify the s-record file which
contains the object information currently programmed into the MCU.
P&E’s software will automatically extract the security information
from this file and use it to pass security. Once you have specified the
s-record file, click the OK(Retry) button.
- You can erase the device. Run the PROG08SZ application, and when
the above box appears, select the “IGNORE security failure…”
option and click OK. Use the Choose Module command to select the
appropriate programming algorithm, and select Erase Module. This
should erase the device. You will have to execute the Choose Module
command again before you can access the blank device. Note: on
some older revisions of silicon, you can’t ignore the security failure,
and it will bring this box back up every time you click OK(Retry). If
this is the case, you should obtain the latest silicon revision from
Motorola.
ICS08GPGTAD/D G-45
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G-46 ICS08GPGTAD/D

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ICS08GPGTAD/D

©P&E Microcomputer Systems, Inc., 2000, 2002; All Rights Reserved

P&E Microcomputer Systems, Inc.

Manual version 1.07

APPENDIX G M68ICS08GPGT CONTENTS AND USAGE

G.1 PACKAGE COMPONENTS AND INSTALLATION PROCEDURE

G.1.1 M68ICS08GPGT PACKAGE COMPONENTS

Table G-1. M68ICS08GPGT Product Components

Part Number Description

ICS08GPGT Complete software development package

ICS08GP32/GT16/GT8 Hardware board

M68ICS08SOM/D M68ICS08 IN-CIRCUIT SIMULATOR SOFTWARE

M68ICS08GPHOM/D M68ICS08GP IN-CIRCUIT SIMULATOR HARDWARE

Manual Addendum Addendum containing information specific to the

G.1.2 ICS08GPGT INTERFACE SOFTWARE PACKAGE

G.1.3 INSTALLING THE ICS08GPGT SOFTWARE PACKAGE

G.1.3.1 Installation Steps

casm08z.exe Windows cross assembler for the 68HC08

icd08sz.exe Windows in-circuit debugger

Table G-2. ICS08GPGT Software Files

ics08gpgtz.exe Windows in-circuit simulator (ICS08Z)

prog08sz.exe Windows FLASH programmer

winide.exe Windows integrated development

G.2 TARGET CONNECTION AND SECURITY DIALOG

Figure G-1. Initial Target Connection And Security Dialog Box

G.2.1 TARGET HARDWARE TYPE

G.2.1.1 Class Of Target Board

Figure G-2. Additional Connection To Reset From DB9

should be facilitated by the above circuitry. This configuration can be specified

G.2.1.2 Class V, VI, VII Options

Figure G-3. Class V, VI, VII Target And Security Dialog

The options presented to the user are as follows:

Figure G-4. Device Type Selection Box

Figure G-5. Device Power Dialog

Figure G-6. Device Clock Selection Box

The device clock menu allows three options:

G.2.1.3 Advanced Settings Dialog

Figure G-7. Target Hardware Type: Advanced Settings Dialog

G.2.1.3.1 Tpd and Tpu Timing

G.2.1.3.2 MON08 Cable connection communications type (Class II boards

Figure G-8. Power Down Dialog

3. Software automatically powers up the ICS, which configures the

4. Software asks the user to power up the board as follows:

Figure G-9. Power Up Dialog

Figure G-10. Power Cycle Dialog

3. Software automatically powers up the ICS, which configures the

G.2.2 PC SERIAL PORT CONFIGURATION

M68ICS08JL3 4.9152MHZ 9600 Baud

M68ICS08JLJK 4.9152MHZ 4800 Baud

G.2.3 TARGET MCU SECURITY BYTES

FORCEBYPASS command-line parameter, which will cause the software

1. The baud rate specified was incorrect.

G.2.5 ADDITIONAL DIALOG BUTTONS

has the same function.

G.3 EXAMPLE PROJECT

G.3.2 WINIDE AND THE DEMOGPGT APPLICATION

GPGTREGS.INC - This is an include file which is used by the

G.3.3 ABOUT THE DEMOGPGT APPLICATION

G.3.4 APPLICATION FRAMEWORK

G.3.4.1 Initializing Constants

RomStart EQU $E000 ; This is valid ROM on the GP32 and

G.3.4.2 Creating RAM Variables