Escolar Documentos
Profissional Documentos
Cultura Documentos
By
Bill Pray
Mike Perry
5-4-99
Project Number 40
ii
Abstract
For the Senior Design Project a buck-boost converter will be designed to supply a
load with a constant –16V output and at a range of 2W to 20W. The converter will have
an input range of 10V to 15V and a tolerance of +/- 1% voltage ripple. A gate drive
circuit is used to control the FET in the converter. The power consumption of the gate
drive will give an indication of what the efficiency of the overall circuit will be. In the
final stage of the design, the converter will be operated over the ranges of the specified
TABLE OF CONTENTS
PAGE
1. Introduction…………………………………………………………………… 1-2
5. Conclusion.…………………………………………………………………… 12
6. Cost……...……………………………………………………………………. 13
Appendix 1. Reference……………………………………………………….. 14
Introduction
DC-DC converters have a wide range of uses today and are becoming
increasingly more important in every day use. Dc power supplies are probably the largest
use of the converters and are much more compact and efficient than the old method of
conversion with transformers. These converters can have an output of any range; for
instance, one can run logic gates or large dc motor drives with a simple converter. The
largest problem with these converters is still efficiency although there is also an interest
to make these converters as small as possible and to control the heat dissipation. We have
chosen to build the buck-boost converter because of its versatility and wide range of uses
in today’s market.
There are two circuit diagrams attached one is the basic Buck-Boost circuit Figure
1 and the other is the gate drive circuit Figure 2 which will drive the FET gate at a certain
input voltage from a separate source. The drain and source of the FET will be connected
to the Buck-Boost circuit with the source at the output side of the converter the buck is
achieved in part by placing a polarized capacitor at the out put with the negative side at
For the converter that to be build will have a range of inputs of 10v-15v and an
out put range of –16v. The output ripple is specified to be less than +/-1%. The output
power requirements will range from 2w to 20w. A 90% efficiency rating will be
attempted and a thermal dissipation in the FET of less than 75 degrees Celsius which is
voltages. At each value of input and output the data will be documented. The power-out,
power-in, duty ratio, and thermal readings will also be recorded. These values will allow
provides a loss less transfer of energy between different circuits at different voltage
levels. When dc-dc conversion is needed there is also a need for control and a need for
higher efficiencies. If the latter were not important we could just use a voltage divider
and get the change in voltage we are looking for. In modern dc electronics we need more
than just voltage reduction. What really are needed are voltage transfers, polarity
reversals, and increased and decreased voltages with control. One method of building a
function requires a duty ratio, which will give us the control that has been needed.
The buck boost converter has two main restrictions. They are KVL and KCL has to be
satisfied. This means that only one switch is on at a time. When switch 1 (FET) is on the
voltage Vt (Figure 1) is just Vin and when switch 2 (diode) is on Vt is just -Vout. Then the
D1 * Vin
duty ratio can be related to Vout by saying Vout = . The input and output currents
1 − D1
are determined by the switching action. Since Is =<iout>+<iin> then D1 *<iout>= D2 *<iin>
and because of the cascading process this converter requires a negative output with
respect to the input. In theory if D1 is 0 then the output is zero and if D1 is 1 then the
1
output is infinity and if D1 is then the output is equal in magnitude to the input. The
2
capacitor at the output is there to give the output voltage source properties. The method
of determining the other elements of the circuit is discussed in some depth in the results.
Probably the most important consideration of all the elements is the inductor. The
inductor value is important to not be below the critical value so that the converter will not
have a discontinuous mode. This happens when the inductor is too small to maintain
current flow at all times. When the converter is in discontinuous mode its output becomes
load dependent.
Figure 1
Design Details
Since the objective of building a converter that will supply a constant –16 volts
the decision to use a buck boost design was chosen due to the polarity reversal (see figure
1). The first thing to do was to find the value of the switching frequency for which
L>Lcrit. To do this the values of the load current, the time period and the duty ratio must
be known since the value of Lcrit is dependant upon them. To obtain the load current we
P=VI (2)
Table-1
The relationship between switch 1 and switch 2 is called the Duty Ratio and can
Now to consider the duty ratio and since a polarity shift needs to occur, then these terms
will need to considered in terms of absolute values. For the 10 volt caseD1 = 62% and D2
= 38%. For the 15 volt case D1 = 52% and D2 = 48%. Now to solve for the value of ∆ t
(4)
(5)
Given ∆ i = .125A (from Table 1) and since ∆ t=D1*T where T is the period and is equal
to 1/f we can solve for T and substitute values of Lcrit and solve for the period and then for
the frequency. Typically we would like a frequency between 20kHz and 100kHz. If we
begin with a 200µ h inductor we get frequencies of 82.6kHz at the 15 volt range and
10kHz for the 10 volt range so the switching frequency is fmax>82.67kHz. The next step is
to choose a load and looking at the power requirements and the voltage output using the
P=V2/R (6)
For the 2-watt case we get a load of 128.8Ω and for the 20-watt load we get 12.8Ω . In
choosing the capacitor the tolerance specification of +/- 1% will help determine the
capacitor value that will allow us to achieve this range. To do this the change in output
voltage will be determined by the specifications given in the proposal and determined by
After obtaining the Vripple = .36v we can use this value to determine the value of the
(8)
Then in the 10 volt case yields C>1.5µ f and for the 15 volt case we get C>18.9µ f in
this converter a 47µ f capacitor will be used. Now that all of the components have been
selected for the converter it is time to choose the components of the gate drive. And
finally the inductor used will be a 300µ h because it is larger than the 200µ h that was
In choosing the components needed for the gate drive circuit it is considered that
the greatest control of the gate is needed to obtain the output range specified. For the
Pulse Width Modulation chip the UC3843 was chosen because it allows control of the
duty ratio from 0 to 100% and it also allows the frequency to be controlled over a range
of 10kHz to 500kHz. This PWM chip also has a wide range of inputs available and the
output is capable of driving the FET into saturation where the switching losses are
minimized. The Irf520 was chosen for the FET and the MBR 1045 for the diode. The
Irf520 has a current rating of 8A continuous and a 32A-peak value and a voltage rating of
100 volts and a Rdson value of .3 ohms. Since the value of Rdson is so important to the
thermal dissipation factor the Motorola MTD 3302 Wave FET will also be used and
compared with the Irf520. The MBR 1045 has a current rating of 10A and a voltage
rating of 45 volts. There will be two variable resistors used in the gate drive. The first one
will be a 25kohm 15-turn pot to be used for frequency adjustment and the other one will
be a 500 ohm 15 turn pot used to adjust the duty ratio. The final gate drive design is
The next step is to build the converter and to begin testing as specified by the
proposal. The testing began with the 2-watt load and was ran at 1-volt intervals over the
range of inputs and continued on with the 20-watt load. While doing this data was
collected to compare the duty ratio, efficiency and the output. Data taken in the 2-watt
Test Data
Frequency 85khz
Low
output
With
Vin Vout Wave Fet
Pin Pout Efficiency Duty Ratio
10.08 15.98 2.7 2 74.07 20
11.03 16.1 3.6 2.7 75.00 18
12.03 15.94 3.1 2.4 77.42 16
13.01 16.1 3.1 2.3 74.19 14
14 16.1 3.2 2.3 71.88 12
15.01 16.1 3 2.2 73.33 9
Table 2
The data in Table 2 is data taken with the Wave FET. As shown in the data the –16v at 2-
watts output was achieved and the efficiency achieved is in the mid 70% range, not as
high as we had anticipated but it is better than the efficiencies that were taken with the
With
Vin Vout Standard
Pin Pout Efficiency Duty Ratio
10 16 3.3 2.1 63.64 21
11.01 16.01 3.5 2.3 65.71 19
12.03 16.1 3.6 2.5 69.44 17
13.02 16 3.6 2.4 66.67 16
14 15.98 3.2 2.1 65.63 14
15.03 15.99 3.4 2.2 64.71 10
Table 3
In Table 3 one can explicitly see the relationship between the value of Rdson and the
efficiency of the converter with the Wave FET the efficiency is approximately 10%
higher than the efficiency with the standard Irf520 FET. This is directly related to the
The data taken for the high power output looks similar to the data taken above
except that the efficiencies are lower and the duty ratios are higher. This is common for
the fact that there is more thermal dissipation in the FET and the The fact that at the high
power range the currents being pushed through the converter is much higher than the
current that was pushed into the converter at the low power range. This is where the
lower value of R dson becomes very important to lower the switching losses in the FET and
at the same time lowering the thermal dissipation reducing the need for a heat sink. This
In table 4 this is the data taken with the wave FET and the data in table 5 is with the
After analyzing the data it becomes very clear that there is a definite relationship between
the duty ratio and the input voltage and the efficiency.
W / Heat W / Heat
sink sink
# of FET 1 2 (parallel) # of FET 1 2 (parallel)
2 Watts 46 34 2 Watts 31 29
20 Watts 101 87 20 Watts 86 69
Table 6
As shown in the data to operate in the high power range the use of heatsinks were
required but the objective was met with two Wave FETs in parallel.
Figure 3
An ideal switching trajectory would have a more linear slope in the turn on and
turn off time there for this one is not to far off. Altering the switching trajectory is the
sole job of the snubber circuit. The capacitor and resistor in the snubber should be
sufficient enough to avoid the voltage over shoot and to provide an RC time constant
large enough to totally dissipate the stored energy during the turn on time. The snubber
needed to be incorporated to operate the converter at the high power end of the output
due to the fact that the FET was not turning on soon enough to allow the converter to
inputs of the converter were very small compared to the output requirements. The
efficiencies rise as the input voltage rises and the duty ratio decreases. This is because as
the input voltage rises and the duty ratio decreases the switching losses in the FET are
reduced and the current driving the converter is reduced. There could have been some
changes in the design of the converter in the early stages to possibly increase the
efficiencies but this would have had to be set forth in the beginning. Such as, if we had
chose to build the converter for a specified load we could have chosen the input to be
more helpful to the gate drive and therefore increasing the efficiency. As it stands the
efficiency of the converter ranges from the low 50% to the mid 70% this is not terrible
given the fact that the converter was built for a general range of inputs and outputs. The
Wave FET did help the thermal dissipation and the value of less than 75 degrees Celsius
was achieved with minimal use of heat sinks. Over all the circuit could have been built in
a relatively small package of two inches by three inches with the FET mounted to the
back of the heat sink. This is close to industry standards, an average dc-dc converter will
Pa
rts
Line Quantity Discription Cost Total
1 1 25k Ohm Resistor $0.17 $0.17
2 1 500 Ohm Pot Resistor $0.93 $0.93
3 1 1k Ohm Resistor $0.06 $0.06
4 1 12k Resistor $0.09 $0.09
5 2 (2) 68k Resistor $0.31 $0.62
6 1 0.0047mF Capacitor $0.34 $0.34
7 2 (2) 0.01mF Capacitor $0.27 $0.54
8 2 (2) RN60D Diodes $0.43 $0.86
9 1 47k Resistor $0.29 $0.29
10 1 1mF Capacitor $0.23 $0.23
11 1 MBR1045 Diode $0.53 $0.53
12 1 49mF Capacitor $0.78 $0.78
13 1 128 Ohm Power Resistor $0.18 $0.18
14 1 12.8k Ohm Power Resistor $0.19 $0.19
15 1 0.220mF Capacitor $0.44 $0.44
16 1 IRF520 Fet $0.56 $0.56
17 1 UC3843 PWM IC $1.67 $1.67
Tot $8.48
al
Total labor is projected at about 32 hours of lab time and 10 hours of design and
review for a total of 42 hours per person and at a salary of $30 an hour. Total price of
$6,300.00 for labor and parts are $8.48 for a grand total of $6,308.48.
Appendix 1
Books
P. T. Krein, Elements of Power Electronics. New York: Oxford, 1998
pp.119-205, 534-548