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AN-934

APPLICATION NOTE
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com

60 dB Wide Dynamic Range, Low Frequency AGC Circuit Using a Single VGA
by James Staley

INTRODUCTION Controllable Gain Element


Low frequency automatic gain control (AGC) circuits are used A VGA is a special type of amplifier, which controls its gain by
in audio and power equipment for applications such as sensitive electronic means instead of by a set of fixed resistors, as is the
microphone preamplifiers (preamps) and regulators. An AGC case with the classic op amp circuit. VGAs are the familiar and
circuit, a closed-loop feedback system, is shown in Figure 1. The preferred solution for automatic gain control circuits in a
loop consists of a controllable gain element, a detector, a stable variety of communications applications.
reference and a comparison circuit. VGAs operate at frequencies from hundreds of kilohertz up to
CONTROLLABLE hundreds of megahertz. An ideal VGA performs as a linear
GAIN
ELEMENT amplifier, without introducing distortion or otherwise
INPUT OUTPUT
corrupting the desired signal.
GAIN CONTROL When a VGA is used, the gain element is an amplifier combined
VOLTAGE
with electronic volume control. In this example, the controllable
– DETECTOR gain element is further reduced to an electronic potentiometer
+
and a fixed gain amplifier and it adjusts the loop gain by
06975-001

REFERENCE attenuating the input signal, without contributing significant


Figure 1. AGC Circuit Using a Variable Gain Amplifier distortion. The other fundamental elements of the loop are the
detector, a stable reference, and a summing circuit that senses
This application note describes a low frequency AGC circuit
the state of the loop, compares it to the stable reference, and
using a wide dynamic range AD8336 variable gain amplifier
adjusts the output accordingly.
(VGA) as the gain control element, an AD736 rms-to-dc
converter as the detector, a low cost rail-to-rail AD8551 op amp, A functional block diagram of the AD8336 is shown in Figure 2.
and an ADP3339 LDO as the reference. Because of its wide
controllable gain range and circuit flexibility, the AD8336 is
featured in this application note.

PRAO VGAI
8 9

INPP 4
ATTENUATOR
PrA 34dB 1 VOUT
INPN 5 –60dB TO 0dB
AD8336

PWRA 2 BIAS GAIN CONTROL


INTERFACE
06975-002

10 13 3 11 12
VNEG VPOS VCOM GPOS GNEG
Figure 2. AD8336 Functional Block Diagram

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AN-934

TABLE OF CONTENTS
Introduction ...................................................................................... 1 AGC Circuit Design Example......................................................3
Circuit Design ................................................................................... 3 AGC Circuit Operation ................................................................4

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AN-934
70
CIRCUIT DESIGN GAIN CHARACTERISTICS
60 COMPOSITE GAIN
An audio AGC requires the following features: VGA STAGE GAIN
50
• Wide dynamic range, which is the ability to amplify very FOR PREAMP GAIN = 26dB
40 USEABLE GAIN RANGE
low level signals and very large signals. OF AD8336
30

GAIN (dB)
• Amplification with low distortion over the entire operat-
20
ing range.
10
• A means of adjusting the minimum and maximum
0
gain limits.
–10 FOR PREAMP GAIN = 12dB
The AD8336 described in this application note uses the Analog FOR PREAMP GAIN = 6dB

06975-004
–20
Devices, Inc. exclusive X-AMP® architecture, consisting of a
–30
ladder network with multiple taps spaced in equi-resistive –0.7 –0.5 –0.3 –0.1 0.1 0.3 0.5 0.7
increments, and accessed by an array of differential amplifiers. VG (V)

See Figure 3. Figure 4. Gain Characteristics of the AD8336


for Various Operating Conditions
OUTPUT GAIN INTERPOLATOR FIXED GAIN
AMPLIFIER AGC CIRCUIT DESIGN EXAMPLE
Gm Signal Voltage levels
The range of signal voltages to be controlled, the supply voltages
VGA –6dB –6dB
IN
60dB and input and output voltage levels, all highly interactive factors,
influence the topology of an AGC circuit. In this example, the
goal is to fully exploit the full 60 dB gain control range of the
06975-003

10 SECTION LADDER NETWORK AD8336. First, assume power supply voltages of ±5 V.


Figure 3. AD8336 Ladder Network With a known power supply voltage, the stabilized output
This circuit architecture offers several important advantages: voltage is established. Because saturation in either the
preamplifier or the 34 dB fixed gain stage limits the available
• A passive resistor ladder network performs the gain control output swing to about 7 V p-p, a nominal maximum swing of
function, introducing no distortion. 5 V p-p is easily attainable. With a preamp output-voltage swing
• The gain element is a fixed gain op amp. Because the gain of 5 V p-p and the X-AMP attenuator set for −26 dB (0.05×),
of the op amp remains unchanged, the application benefits the output voltage is 250 mV p-p. If the preamp gain is set at
from constant bandwidth, distortion, and overload per- −1× (unity inverting gain (equivalent to a noise gain of 2×),
formance optimized over a wide range of operating the maximum input voltage is 5 V p-p. Finally, with a gain
conditions. range of 60 dB, the minimum input voltage is 5 mV p-p. The
The AD8336 features a wide gain range (60 dB) and extended AGC circuit operates with an input voltage range of 60 dB
supply voltage, capable of operating with power supplies up to (5 mV p-p to 5 V p-p), with a fixed output voltage of 250 mV p-p.
±15 V. It features an uncommitted preamplifier and permits Control Voltage Levels
inverting, noninverting, or differential input configurations. The differential gain control input of the AD8336 performs any
The preamplifier and VGA sections are completely independ- level shifting required for the available control voltages consid-
ent, and the VGA can be used as a standalone element if no erably simplifying the gain control drive circuitry. In this
preamp is needed. The gain control inputs are fully differential. example, the GNEG input (Pin 12) is biased at 0.75 V and the
Figure 4 shows the gain characteristic for the VGA, for two gain range voltage at GPOS is 1.5 V.
values of preamplifier gain. Detector
The detector is an AD736 rms-to-dc converter and provides an
accurate dc control voltage directly proportional to the rms
value of the output signal. The output of the AD736 drives the
inverting input of an op amp connected for very high dc gain
for accurate loop control.

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AN-934
Comparison Circuit Table 1.
The AD8551 is a single-supply rail-to-rail op amp with a very EIN EOUT (mV p-p)
low offset voltage. The voltage applied to the noninverting input (V rms) 20 Hz 100 Hz 1 kHz 5 kHz 10 kHz 20 kHz
is the reference voltage, and establishes the rms value of the 0.001 125 130 136 135 140 140
output. The voltage to be compared is the detector voltage from 0.002 245 255 253 253 260 265
the rms–to-dc converter. When the comparison input falls 0.003 251 250 251 253 257 258
below the reference the comparison output voltages increases to 0.005 250 250 250 251 256 258
restore the output to its nominal level. 0.01 250 250 250 251 255 255
0.1 250 250 250 251 254 254
AGC CIRCUIT OPERATION
1 250 250 250 251 254 254
Table 1 lists the data for the AGC control for six frequencies 1.5 250 250 250 251 254 254
from 1 mV to 2 V rms input. Refer to Figure 6 for a plot 1.8 250 249 250 250 254 254
showing the flat output level vs. input for the typical audio 2 250 256 261 266 266 266
frequency range of 20 Hz to 20 kHz. The output level is flat
over the 2 mV rms to 2 V rms range.

1kΩ GAIN RANGE:


–26 TO +34dB
8 9 (0.05× TO 50×)

4 10µF NP
100Ω
PrA ATTENUATOR
INPUT 1kΩ 0dB 34dB OUTPUT
5 –60dB TO 0dB 1
AD8336 4.7nF
0dB

0.1µF
2 GAIN CONTROL 1 8
BIAS CC COM
INTERFACE
2 7
VIN +VS +5V
10 13 3 12 11
1MΩ 3
AD736 6
2.2µF 10kΩ CF OUTPUT
+5V –5V +5V
4 5
ADP3339AKC-1.5 1.5V –5V –VS CAV
0.022µF
0.1µF 0.1µF 1kΩ
0.75V
+5V 33µF
3 2 1
1kΩ
IN OUT GND 7 2 10kΩ
6
9.09kΩ 3
AD8551 4
OUT 88mV
1kΩ 06975-005
TAB

Figure 5. AGC Circuit Using the AD8336

300

290

280

270
OUTPUT (mV p-p)

260

250

240

230

220
20Hz 5kHz
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210 100Hz 10kHz


1kHz 20kHz
200
0.001 0.01 0.1 1 10
INPUT (V rms)

Figure 6. AGC Performance at Various Frequencies


©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
AN06975-0-11/07(0)

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