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T las Semiconductor DS1820 one-wire the data via R2. If an overvoltage peak oc- The short pulse from the pullup circuit
digital thermometer in a multipoint curs, R2 prevents mC latch-up by limiting improves the signal’s rising edge. It’s ob-
temperature-measurement system. The the current to the mC pin. During the vious that, when the pullup circuit turns
DS1820 sensor allows distributed tem- temperature conversion, the DS1820 on, Q3 must be off. However, the circuit
perature measurement and uses only one needs an effective pullup circuit to pro- protects itself against unintended signal
wire for both data communication and vide an accurate conversion. Transistors corruption. If Q3 is open, the power volt-
the power supply. You can easily connect Q1, Q2, and R1 provide an effective pullup age does not connect to the sensor’s data
the one-wire interface to a mC (in this ex- function, which the mC activates by line. If you replace R4 with a 1-mA cur-
ample, a PIC16C63). The application ac- grounding the input signal to Q3. rent source, you can obtain effective data
commodates as many as 16 DS1820 sen- The pullup function also improves the transmission with lengths as great as
sors in a 100m-long network, dubbed rising edge of the transmitted data. If the 500m (empirically verified). (DI #2317).
MicroLAN by Dallas. Unfortunately, with sensor connects to the mC through a long
such long wires near high-current pow- wire, the capacitance of the line degrades To Vote For This Design,
er cables, inductively coupled high-volt- the rising edge of the data signals, because Circle No. 395
age peaks can cause mC latch-up, because
the transient-voltage suppressor, D1, can-
not limit the line voltage below
9.8V. The interface circuit in Fig- Figure 1
VCC VCC
ure 1 prevents such faults.
The sensor needs only one data line, Q1
but the interface circuit in Figure 1 needs R4 C1
two CPU-control signals. The first is the 4.7k
inverted-output data line, connected to 47 pF Q2
DS1820
Simple circuit prevents processor
latch-up ..........................................................107 2 D1
Dual one-shot makes rising- and Q3 R3 22k OUTPUT
falling-edge detector ..................................108 1
Simple circuit measures diesel’s
rotations per minute ..................................108
Fast, compact routine interfaces
PSOTO5LC
EEPROM to mC ............................................112
Photodetector sorts objects........................114
Single-button lock provides
high security ..................................................116 A simple three-transistor circuit provide both latch-up protection and signal conditioning in this
one-wire sensor/mmC interface.
Figure 2
R1
10M 100k
C1
100k R6 +
9V
100 pF
C2
R4
IC1
10M 10M ICL7611
2 7 5 8
IN+ 1 +
6 Q2 7
R2 R3 VOUT
3 + BC857C 61
IN1 4
SENSOR- 8 Q1 4 IC2
TLC393
CLAMP BC847C R8
INPUTS 511k
1N4004
C3
100k R5 100 nF R7 100k 1 mF R9
5.11M
A CMOS integrator and comparator condition the signal from Figure 1’s sensor for interpretation by a DMM or an oscilloscope.
5V
5V
Figure 1 5V
R9 C5 R11 IC4A
R6 IC2B
R4 620k 0.01 mF 10k CD4093
5.1k CD4082
100k SMALL
BOX
C3 R5 Q3
2N3904 IC1
0.1 mF 100k CA339
+
2
5V C4
1 mF R10
10k
Q4
8 SDP8406 R8 R7
18k 10k IC2A
5V
4 CD4082
5V
5V 4
10 Q6
5 CK
6
Q7
R3
C1 IC5 IC4B
180 IC3
0.01 mF ICM7555 CD4093 LARGE
Q1 CD4020
SEP8706 13 BOX
6 Q8
2 3 C6
Q2 IC4C 1000 pF
1 R2 2N3906 CD4093
11
4.3k
RESET
R12
R1 10k
C2 18k NOTE: ALL ICs NEED TO HAVE A 0.1-mF CAPACITOR
0.01 mF FROM VCC TO GND.
5V
An oscillator circuit allows a photodetector to both count and sort objects according to size.
114 edn | March 4, 1999 www.ednmag.com
design
ideas
Single-button lock provides high security
Maxwell Strange, Fulton, MD
igure 1 is the block diagram of select gate, IC5. The initial entry also sets compromise of security arises under any
Figure 1 LONG
PULSE- LONG/ CLOCK
CODE DEBOUNCE SHORT DECODED UNLOCK
WIDTH
ENTER SHORT SELECT COUNTER COMMAND
SEPARATOR
LONG/SHORT
ADDRESS RESET
10
R-2
SEC
1
ENTRY 2
WINDOW, T1 3
(8 SEC)
CLOCK 4 OR
DECODER
R-1 COUNTER 5 GATE
6
7
FIRST 8
TRIGGER
RESET
R-1 COMBINATION
R-2
SET
(SEE TEXT)
TRIGGER CODE-
LOCKOUT, T2 TRIGGER ENTRY
(10 SEC MINIMUM) WINDOW
TIMER
(T1)
RETRIGGER-
TRIGGER
LOCKOUT
TIMER
(T2)
A handful of timers and counters configures a highly secure, single-button combination lock.
116 edn | March 4, 1999 www.ednmag.com
design
ideas
quence would also be secure; you can im- 1/4 CD4093
plement a shorter code by simply + +
Figure 3
taking the unlock pulse from a
"SHORT" PULSES 1M ~600 mSEC
lower count on IC6. IC6’s output returns
FROM IC1, PIN 10 R2
low after 10 sec when T2 resets. If desired, 24k 14
1
you can generate a lock command, which 3
need not be secure, by adding the simple 2
7
circuit in Figure 3. (DI #2327). 1 mF
~7 mSEC
LOCK
COMMAND
To Vote For This Design, You can generate a lock command with this additional circuit by rapidly entering four or more
Circle No. 400 short pulses.
IC1
CD4093
Figure 2
+ "LONG"
+ IC6
A (>0.3 SEC) IC5
1 3 240k 14 CD4019 CD4011
12 0
2 11
13 1 16 16
100k
1 mF C
7 9
+ 0
13 14
UNLOCK
100k B 0.082 mF 100k
"SHORT" COMMAND
5 9 8
10 (<0.3 SEC)
NO 15
6 100k 8 8 13
4
CODE- 43Ok 22k D 14 9 15
ENTRY ~7 mSEC
BUTTON 0
1 mF
+
LONG/SHORT
ADDRESS 10 mF + + POWER
LINES 20V (5 TO 15V)
TANTALUM
20-mSEC CLOCK
DELAY
COMBINATION SET
TRIGGER 22k 1000 pF (LLSSLSSL SHOWN)
DUAL TIMER +
(T1 AND T2) +
0
+
+ 22k +
4 14 16
1 22 mF
3 2 + 1M
2 20V
11 12 4 14 9 TANTALUM
3 2
8.2M 10 IC3 7 1 10 13
10M 13 220k 4 3 A
CD4017 10 11 B POWER-ON
16 IC2 4
5 12 RESET
CD4538 5 1 5 7
2 6
5
14 7 15 7
R-1 6
8
1 mF 1 8 15 9 IC4
1 mF 8 13 CD4072
R-2
NOTE: ALL DIODES=1N4148.
You program your combination by hard-wiring the IC3-IC4 output-to-input connections, LLSSLSSL, where L and S are long and short inputs, respective-
ly, in this example.
118 edn | March 4, 1999 www.ednmag.com
design
ideas
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