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Applications of microcontrollers in security systems.

Ramjee prasad

RH6802B54

10804900

B.Tech (LEET)

ECE-310

A Low-Power Low-Cost Microcontroller The aim of this paper is to present a


for Security Systems: microcontroller that will provide high security
without the need for any database access,
ABSTRACT: hence eliminating the high cost disadvantage
of a network based system but providing a
The aim of this paper is to describe the moderate to high level of security depending
implementation of a low power, low-cost 16- on the data encryption algorithm used. The
bit RISC microcontroller that will act as the microcontroller is designed for consumers that
core of a stand-alone security system. The need moderate to high degree of security
controller is designed to provide moderate- without the need for a networked access
high security at very low cost and to be able to control system. The microprocessor is also
operate independent of a database. It is designed as a low power system using the low
designed using 1.5-mm SCMOS process from power static CMOS design with several chip-
MOSIS and operates at a frequency of specific low-power components and features.
12.5MHz.
OPERATION:
INTRODUCTION:
The microcontroller-based system described in
Current access control systems that authorize this paper is to be set up at the site which
access to a building or a room are either needs authorization before entry. The user
relatively insecure or costly to implement and needs to swipe his/her card through the card
set up. Many of the security systems used to reader and then enter a 4-digit PIN on the
provide secure access to a site require database keypad in order to enter the site. The users of
access to check the authentication status of the the site are to be given a card, which is
user, which requires the system to have preloaded with a 32-bit. When the card is
network compatibility. This increases not only swiped, the data on the card is read serially via
the setup cost of the security system but also an RS-232 interface into two special registers
the implementation cost of the microcontroller inside the microcontroller. After reading in the
used in the security system. Besides, such data, the controller waits for the user to enter
systems are vulnerable to network failures and the 4-digit PIN. If the PIN is not entered in a
congestion, which may be quite disconcerting specific amount of time determined by the
to the users if not critical to the security and program running on the microcontroller, the
successful operation of the system. On the card reader ignores the data in the card
other hand, many of the existing stand-alone registers and waits for another swipe. If the
systems fail to provide a high level of security. PIN is entered in time, the microcontroller
These systems usually only consist of a single reads in the PIN via the serial RS-232
cardreader. If the card user is authorized to interface, converts each digit to a 4-bit number
access the site, access will be granted without in two’s complement and stores the whole PIN
requiring any further identification. There are in a single special register. Then the controller
systems that require some kind of operates on the input data from the card as
identification, such as fingerprint matching, well as the PIN and carry out a decryption
but these systems are too costly to implement. process. If the result of the decryption matches
the processed PIN entered by the user, access number by taking the alternating bits of this
to the site will be granted by sending an encrypted version. Logically shifting this
“open” signal to the door which lasts for 10 number three bits to the right will ensure that
seconds. four decimal digits are sufficient to represent
the result, which is password of the card user.
Data Encryption/Decryption Algorithms: Finally, in order to compare the result of
encryption with the keypad entry we need to
It is obvious that the security of such a system convert the BCD number storing in the key-
highly depends on the encryption algorithm input register into a binary number. Using this
used in the process of assigning PIN’s to the scheme, we can determine 32-bit codes and
site users. The requirement of a PIN map them into 4-digit passwords. Although
(password) after the user swipes the card is an there is considerable redundancy in this
important high-security feature of the system. mapping, our simulations proved that we could
In case the card is stolen or lost, any obtain at least 350 of these unique code-
unauthorized user will not be able to enter the password pairs
system without the acknowledgment of the
password. This feature is similar to the ARCHITECTURE
authentication mechanisms used in the bank Overview
ATM’s to provide more security than a bare The chip proposed is built as a 16-bit load-
card reader, but different from the ATM’s in store architecture which uses two-operand
that it does not require a network for access instructions. The ISA for the processor is
authorization. shown in Table 1. Memory operations use
register indirect addressing. PC-relative
SAMPLE ALGORITHM: addressing is used by conditional and
unconditional branches. Several instructions
In our system, we employ a data encryption are to be noted in the ISA. ADDC (add with
scheme based on the DES (Data Encryption carry) and SUBC instructions are implemented
Standard) algorithm. The original DES in order to be able to manipulate 32-bit
algorithm is targeted to encode and decode a quantities on our 16-bit architecture. This
64-bit number, encoding and decoding in 16 allows the processor to decrypt the 32-bit data
steps each. However, in our system we operate more easily. Arithmetic shift instructions
on 32-bit numbers since the code coming from (ASHU, ASHUI) are included in the
the card is 32-bit. We limit the number of steps instruction set to allow the use of more
to 4 since this level of encryption provides us complex decryption schemes. There is also a
with sufficient level of security in our system multiply instruction which will speed up the
(For more security, more sophisticated complex decryption process.
techniques can be used). For our application,
the 32-bit number, acquired when the user
swipes his/her card, is split into 16 left-hand Table 1. Instruction Set Architecture:
bits (L1) and 16 right-hand bits (R1). At each
step, the 16 right-hand bits are assigned to be Instruction type(uses) COMMENT
the 16 left-hand bits of the next step. The 16 S
righthand bits of the next step come from the ADD, ADDI Arithmetic
current 16 left-hand bits added to the current (alu)
16 right-hand bits processed with a key (Kn). ADDU,ADD Arithmetic Does not
This Kn is a function of the current step. The UI (alu) affect psr
equations we use are as follows:
For n=2, 3, 4 5. ADDC,ADD Arithmetic Add with
Ln=Rn-1 (Eq. 1) CI (alu) carry
Rn=Ln-1 + (Rn-1 Å Kn) (Eq. 2)
where K2, 3, 4, 5= {0x000a, 0x00a0, 0x0a00, MUL, Multiplier Only register
0xa000}, POSMUL ops.
Respectively. After completion of these four
steps, we obtain a 32-bitencrypted version of SUB, SUBI Arithmetic
the original reading. We can then a 16-bit (alu)
SUBC, Arithmetic Subtract w/ to achieve low power consumption, higher
SUBCI (alu) carry speed (for fast decryption), and smaller area.
Included in the datapath are the program
CMP, CMPI Arithmetic Compare counter, instruction register, register file,
(alu) ALU, and shifter (See Figure 1 and 2). The
AND, ANDI Logic (ALU) ALU of the processor embodies a carry-
OR, ORI Logic (ALU) lookahead adder to increase the clock
XOR, XORI Logic (ALU) frequency at which the processor can run at.
MOV, MOVI Data Manip. Although this makes the area occupied by the
ALU larger, it is necessary that we make fast
LSH, LSHI Shifter Logical the decryption process, which heavily relies on
left/right the ALU.
ASHU, Arithmetic
ASHUI left/right

LUI Load upper


imm.
LOAD Data manip Load from
mem.
STOR Data manip Store to
mem.
Bcond Reg+displace 16
m conditions
Jcond Reg. Indirect 16
conditions
JAL Reg. Indirect Jump and
link

KRD Special Input ready

PEND Special Switch to


idlemode

The processor has eight general purpose


registers and three special purpose registers.
Two of the special registers are used to hold
the 32-bit input from the card, whereas the
third one is used to hold the input from the
keypad. These special purpose registers cannot
be used as general purpose registers. Our RISC
processor is two-stage pipelined. In the first
stage, instruction is fetched from memory and
in the second stage it is decoded and executed,
and register file or memory is accessed for
write or read operation. For the specific
modules in each stage please refer to the
system-level block diagram of Figure 1. Low-Power Features:
Architectural Components: Aside from the low-power characteristics of
The datapath of the processor was designed the static CMOS family used for most of the
using a full-custom design technique in order parts in the microprocessor, there are several
components and features that are specifically usefulness of such a prediction scheme is
customized for low energy consumption. The minimal. More complicated branch prediction
shifter used is a power-on/off logarithmic mechanism is not implemented because that
shifter. Since the shifter consumes unnecessary requires considerable amount of logic, which
power when it is not being used, it is turned on is unfeasible for a two-stage pipelined
only when the instruction is a shift. This application-specific processor.
reduces the overall dynamic power
consumption of the chip by zeroing out the Memory:
unnecessary switching activity in the shifter The microcontroller includes an on-chip
when no shift is being executed. The same DRAM-based memory of 512 words. An on-
mechanism is used to avoid unnecessary chip memory is included to facilitate the data
energy consumption by turning off the manipulations during the decryption process
counters in the serial input interface when the and also perhaps to store the input from the
serial input is not performed. To further reduce card temporarily. The proposed system does
the power consumption of the processor, two not need a large amount of storage, because it
operation modes are introduced. In the idle is mainly used for data manipulation.
mode, the processor executes NOOP’s, which Therefore, having an off-chip data memory
reduces the switching activity to a minimum and interfacing it to the chip is not cost
according to the following average power efficient. For that reason, a small-sized on-chip
estimation equation for CMOS and hence memory is preferred. The memory used is a
reduces the power consumption. word-addressible DRAM of 1 Kbytes.
Pav = CLVDD
2 f ,where f is operating frequency. On the other hand, the instruction memory of
the system is kept off the chip. The suggested
The shifter is also turned off in the idle mode. instruction memory to be used by the
The processor starts in the idle mode and stays microcontroller is an EEPROM (Electrically
in that mode until the user swipes the card and Erasable Programmable Read Only Memory)
enters the PIN. Once all the required data is memory so that it can easily be re-
placed in the special registers, the processor programmed in case encryption/decryption
starts to execute the program. KRD instruction algorithm is to be changed. As there is a
is used to check whether all required data is possibility that these algorithms (hence the
ready. When the data is ready, an interrupt programs) need to be changed, it is more
signal is sent to the PC and the instruction feasible to leave the instruction memory off-
register to start executing the decryption chip to increase the flexibility of the system.
program. The processor returns to idle mode An EEPROM instruction memory meets the
after the execution of the PEND (program end) flexibility and low-cost goals of our design.
instruction, which sends another interrupt The size of the instruction memory depends on
signal to the instruction register. the encryption scheme used in the program,
but a memory of 8 Kbytes would suffice.
Our processor also performs simple static Serial I/O:
branch prediction in order to reduce power
dissipation. Although branch prediction is used The microcontroller receives serial input from
to increase performance in deeply-pipelined two different devices. One is the card reader
high performance general purpose which sends the 32-bit information stored in
microprocessors, it can also serve to the card. The other is the keypad, which sends
reduce the power consumption in application the 4 characters PIN in ASCII format. It is
specific processors. Branches are assumed not necessary that the card reader and the keypad
taken in our system. When a branch is interfaced to the system using the RS-232
predicted correctly, the processor will not protocol. The ASCII input sent by the keypad
incur the overhead of inserting a noop after the is converted into a binary representation of
branch. Hence, the overall power consumption each number by truncating the higher 4 bit of
in the flow of the program will be reduced. the ASCII code and then storing the resulting
The effectiveness of this approach depends on 16 bits in a special register for further
the behavior of branches in the program. If manipulation.
most of the branches are taken, then the Multiplier
automatically to a so-called “transparent”
A two’s complement 8-bit by 8-bit multiplier mode, when a specific access code issued by a
is included in the microcontroller in order to test card is recognized. In this mode, the read
facilitate the password decryption process. The or write instructions for a memory area, issued
multiplier uses a modified version of Booth’s by the test card, are interpreted by the
algorithm to produce a series of partial microcontroller as being read or write
products, which are then summed by a instructions for a memory area of the security
Wallace-tree adder circuit. component rather than the microcontroller.
Description:
Timing Information:
The proposed system has a critical path delay  A smart card reader comprising: an
of 48 ns. However, in order to synchronize the input connector that interfaces with a
system clock with the frequency of the serial smart card; a microcontroller; and a
input, we have decided to run the system at a security component executing
slower rate which is 12.5 MHz. The timing programs under the control of the
information of the critical path is in shown microcontroller, the microcontroller
below. having a normal operating mode in
which the microcontroller executes a
program contained in a read only
memory of the microcontroller,
wherein the microcontroller also has a
transparent operating mode that is
automatically set upon receipt of a
specific code on the input connector,
and wherein the microcontroller
receives from the input connector
addressing instructions for memory
areas and executes these instructions,
interpreting them as instructions for
access to memory areas of the security
component, wherein the security
component has an electrically
programmable memory, and the
The multiplier, which has a delay of 45 ns, is transparent operating mode permits
not included in the critical path, because we access to this memory in order to
allow the multiply instruction to take two modify the content of areas which are
clock cycles to complete in exchange of a not modifiable by the program
faster clock speed. executed in normal mode.

SMART CARD READER WITH  A card reader according to claim 1,


MICROCONTROLLER AND SECURITY wherein the security component can
COMPONENT: communicate with the input connector
only by means of the microcontroller
Smart card readers dedicated to a particular and under the command thereof.
application use both a microcontroller whose
read only memory determines the running of  A card reader according to claim 2,
the application, and a security component wherein the reader is dedicated to a
executing, under the control of the given application whose execution is
microcontroller, subroutines related to the defined by the program contained in
security of the application (authentication, the read only memory of the
confidential programs, etc.). So that the microcontroller, this application not
manager of the application can have access to having any possibility of access to
certain memory areas of the security certain memory areas of the security
component, provision is made for the
microcontroller to be able to pass
component. card or a probe simulating a smart card, access
instructions which it interprets not as
 A card reader according to claim 2, instructions for access to its own memories,
wherein the transparent operating but as instructions for access to the memories
mode has four principal instructions, of the security component.
which are respectively: powering up
of the security component; reading of More precisely, the invention proposes a card
a data item at a memory address; reader having an input connector, a
writing of a data item to a memory microcontroller, and a security component
address; switching off the security executing programs under the control of the
component. microcontroller, the microcontroller having a
normal operating mode in which it executes a
program contained in its read only memory,
 A card reader according to claim 1, characterized in that the microcontroller also
wherein the reader is dedicated to a has a so-called “transparent” operating mode,
given application whose execution is in which it sets itself automatically to receive a
defined by the program contained in specific code on the input connector and in
the read only memory of the which it receives from the input connector
microcontroller, this application not addressing instructions for memory areas and
having any possibility of access to executes these instructions, interpreting them
certain memory areas of the security as being instructions for access to memory
component. areas of the security component.

 A card reader according to claim 3, Thus, although the security component cannot
wherein the transparent operating be in direct communication with the input
mode has four principal instructions, connector, it becomes possible to gain access
which are respectively: powering up to memory areas of this component: after
of the security component; reading of going into transparent mode, an address for
a data item at a memory address; access to a memory area ceases to be
writing of a data item to a memory interpreted as a memory address of the
address; and switching off the security microcontroller and becomes a memory
component. address of the security component. The
microcontroller will then execute an
addressing subroutine for the security
 A card reader according to claim 1, component. Conversely, in normal mode, an
wherein the transparent operating instruction for addressing a memory area
mode has four principal instructions, supplied by the input connector is always
which are respectively: powering up interpreted as being an addressing instruction
of the security component; reading of for a memory area of the microcontroller.
a data item at a memory address;
writing of a data item to a memory In practice, the transparent operating mode has
address; and switching off the security four main instructions, which are respectively:
component.
Powering up of the security component;
WORKING:
Reading a data item at a memory address;
For this purpose, the invention proposes a
smart card reader whose microcontroller has Writing a data item to a memory address;
two operating modes, a normal operation, for
the use of a standard user, for executing the Switching off the security component.
fixed application program to which the reader
is dedicated, and a “transparent” operation, of If the security component has an electrically
which the standard user does not have use, in programmable non-volatile memory, notably
which the microcontroller can receive a smart for reasons of customisation, it will be possible
to have access to this memory, for the SONAR ranging module. This SONAR
application manager but not for the standard module sends out ultrasonic waves when
user, in order to change the data thereof. The initiated by a pulse at its input pin INIT, and
transparent operating mode will therefore when it receives back the ECHO, the ECHO
make it possible to modify the content of the pin goes high. A single pin of a port of the
areas which cannot be modified by the microcontroller can be used to initiate the
program executed in normal mode. SONAR. When the SONAR is initiated, a
counter is started in a register in the
MICRO CONTROLLER BASED microcontroller. And once the reflected back
SECURITY SYSTEM USING SONAR: waves reach the transducer of the SONAR
module the ECHO pin goes high. Now this
The use of SONAR in a security system, as high pulse is inverted using a 7404 NOT gate
used in our project, is a novel idea, and as far and then apllied at the INTO(negative edge-
as we could determine, extremely difficult, if triggered) pin of the microcontroller. INTO is
not impossible, to evade. The infrared beams an interrupt pin. So when a negative edge
have the disadvantages of covering just a appears at the pin, the control of the
limited area in a room and to cover a whole microcontroller goes to an interrupt subroutine
room requires many of these beams. This located at 0003H. After executing the interrupt
makes this technology very expensive. subroutine(given in the code) the counter
Temperature sensors can also be evaded as stops. Now, the content of the counter is stored
they can either be made extremely sensitive in a memory location. Then stepper motor is
and risk false tripping of the alarm due to rotated by a step. Then again the
changes in ambient temperature or made less same process as described above is repeated.
sensitive at the risk of allowing evasion. The The value of the counter in this case is stored
use of SONAR offers us many advantages. It in next memory location. Thus, when the
is nearly foolproof, albeit it be at the expense stepper motor completes one complete
of being extremely sensitive to the point that rotation, data (counter value) are stored in as
the only way to avoid tripping of the alarm is many memory locations as the number of steps
to make sure that the room it is covering is free taken by the stepper motor to complete one
from any movements. In this project we have rotation. The number of steps taken by the
designed and developed a unique security stepper motor depends on the angle the stepper
system that utilises the capabilities of motor deflects for each steps. In usually
microcontroller and a special purpose SONAR available (in college labs) stepper motor, if the
module. It is also extremely cost-effective angle of deflection is 1.8 degrees, then the
when compared to similar systems currently in number of steps taken =360/1.8 = 200 steps,
use. and if it is 0.9 degrees, number of steps taken
The principle of operation: = 360/0.9 = 400 steps. In this project, we used
a deflection of 1.8 degrees, which can be
This project has got a SONAR module programmed in the microcontroller. The
mounted on a stepper motor . As the stepper output pins of port 1- i.e., P1.0, P1.1, P1.2,
motor rotates, SONAR module sends out P1.3 are used to control the stepper motor.
ultrasonic waves and scans the area. So, if this
product is placed in the center of a room, it can Now as the stepper motor has completed one
scan the whole room and the range of scanning rotation. Now the stepper motor is ready to
depends on the SONAR module used. With a rotate in the directions opposite to that of the
Polaroid 6500 series sonar ranging module, the previous rotation (this is to avoid stretching of
range is about 6" to 35ft. the wire connections between the main PCB
and the SONAR module mounted on the
The inspiration for the product was from the stepper motor).Again SONAR is initiated,
idea used in MTI RADAR. In MTI RADAR, value of the counter at the time ECHO pin
targets are determined by comparing the echo goes HIGH is compared with the memory
pulses obtained from successive scanning. In location
this project we intend to use a SONAR where the data for the same position of the
module. This is a Polaroid 6500 series stepper in the previous rotation stored. If there
is a difference in value of the memory location
and the present counter value, we can assume amplified and given to the PLL section, where
that an intruder has intruded in to that position its frequency is locked to the transmitted
scanned by the SONAR. Now the pin P3.4 of frequency. The transmitter and receiver are
the microcontroller goes HIGH and switches
arranged such that the transmitted IR rays fall
on the FM transmitter and thus the buzzer in
the FM receiver at the hands of the security directly onto the phototransistor LI4GI of the
starts beeping signalling about the intrusion. If receiver. The signal received by T2 is
there is no difference between the memory and amplified by transistor T3 and operational
counter values, stepper motor is further amplifier µA741 (IC2). Series input resistor
deflected by a step, then again R8 and feedback resistor R9 determine the
SONAR is initiated, counter is started and then gain of op amplifier IC2. The amplified single
stopped at HIGH on the ECHO pin, then the
so applied to pin 3 of PLLLM567 (IC3)
value of counter is compared with the content
of the corresponding memory location for the through capacitor C4.
same position of stepper during the previous
ICLM567 is highly stable PLL with
rotation. And this continues until an intrusion
occurs. So, a suitable program for the above synchronous AM lock detection and power
processes has to be written in to the ROM of output circuitry it is primarily used as
the microcontroller. frequency decoder which drives a load
whenever a sustained frequency falling within
HOME SECURITY SYSTEM: its detection band is present in its self biased
input. The centre frequency of the determined
Introduction: by external components.
Protect our family and valuables with this In the absence of any input single, the center
microcontroller based security system frequency of PLL’s eternal free running,
knowing that should anyone trying to break current control oscillator is determined by
into our home, an alarm will go ON and the resistor R12 abed capacitor C8.
police will be alerted immediately. The
microcontroller based security system consists Preset VR2 is used for tuning IC3 to the
of transmitter, receiver, phase locked loop and desired center frequency in the 6-10 kHz
processing section. range,

Which should match the modulating frequency


of the transmitter? Capacitor C6 and C7 are
used as low pass filter. Ned out filter
respectively when the received signal is locked
to frequency of transmitter signal pin 8 of IC3
goes low and LED 1 glows. Since pin 8 is
connected to the base of transistor T4 through
R13 its collector voltage rises. As a result T5
is forward biased to energies the relay RL5 the
pole and normally closed contact of really
contact of RL5 are connected to +5v.

When the IR signal is interrupted, the


microcontroller starts working as per the
program burnt into the EPROM and control
The transmitter section continuously transmits the siren, telephone and cassette player via the
IR rays which are received by the receiver respective relays.
section. The received signal is further
Circuit Description:

Transmitter Section:
The transmitter and receiver are arranged such
that the transmitted IR rays fall directly onto
the phototransistor LI4GI of the receiver. The
signal received by t2 is amplified by transistor
t3 and operational amplifier µA741 (IC2).
Series input resistor R8 and feedback resistor
R9 determine the gain of op amplifier IC2.
The amplified single so applied to pin 3 of
PLLLM567 (IC3) through capacitor c4.

ICLM567 is highly stable PLL with


synchronous AM lock detection and power
output circuitry it is pre merely used as
frequency decoder which drives a load
whenever a sustained frequency falling within
its detection band is present in its self biased
In the transmitter section, NE555(ICI) is wired input. The centre frequency of the determined
as an actable multivibrator whose oscillating by external components.
freq is decided by resistors R1 and R2, preset
VR1 and capacitor c1, C3 bypasses the noise
to ground, preventing any change in calculated
pulse-width.

The out put of ICI is fed to the base of the


transistor t1, which drives an IR LED to
transmit the modulated IR signal. R4 limits the
current flowing through the IR LED. Preset
VR1 is used to vary the modulating frequency.

Receiver Section:
In the absence of any input single, the centre The actual-size, double-size track lay-outs for
frequency of PLL’s eternal free running, solder and component sides of the PCB for the
current control oscillator is determined by 8085 microprocessor-based home security
resistor R12 abed capacitor C8. Preset VR2 is system are shown in figs5 and figs6,
used for tuning IC3 to the desired centre respectively, and their component layout.
frequency in the 6-10 kHz range, which should
match the modulating frequency of the As a result T5 is forward biased to energies
transmitter? Capacitor C6 and C7 are used as the relay RL5 the pole and normally closed
low pass filter. Ned out filter respectively contact of really contact of RL5 are connected
when the received signal is locked to to +5v.
frequency of transmitter signal pin 8 of IC3 The low order multiplex address and data
goes low and LED 1 glows. Since pin 8 is lines AD0 though AD7 of IC4 are connected
connected to the base of transistor T4 through to the EPROM (IC5) through the latch(IC6),
R13 its collector. while its high order address line A8 through
Working of the Circuit: A10 are directly connected to the EPROM.
Address lines A0 through A7. Are separated
The transmitting IR LED1 and phototransistor from data lines D0 through D7 by latch enable
T2 of the receiver are fitted to the gate such single.
the IR rays emitted by the LED directly fall on
the phototransistor. Address latch – enable pin 30 of the
microcontroller is connected to latch enable
The IR LED transmits a train of IR pulses. pin 11 Ic6. When ale high the latch us
These pulses are received by the receiver and transparent. The output changes according the
amplified by IC2. Output pin 8 of the PLL input data when ALE goes low, the low order
(IC3) is low when the PLL network is locked address is latched at the input of IC6.
to the transmitter frequency and relay RL5
energies to make PA line of IC7 low. Data lines D0 throughD7 of microcontroller
are connected to dated lines of IC5 and IC7
When someone walks through the gate to enter each. Chip sleets signal for IC5 is generated by
your home, the transmitted signal is RD and IO/M lines with the help of NAND
interrupted. Output pins 8 of the PLL network gate. The inverted IO/M signal provides CS
goes high and relay RL5 de-energies to make signal through IC7.
PA0 line of IC7 high. Now the microprocessor
starts working as per the program loaded in the IC AT89C51 is general purpose
EPROM. programmable device compatible with most
microcontrollers. It has three programmable
Relay RL4 energies to activate the siren. At ports, any of which can be ports and the
the same time, relay RL3 energizes to emulate remaining eight bits as port c.
lifting the telephone handset off the cradle to
provide the dial tone. After a few seconds, The eight bits of ports c can be used as
relay RL2 energies to short the redial button individual bits or grouped in two 4-bits ports
contacts. After the loaded number is dialled, it namely, c (upper) and c (lower). Ports A and C
switches off relay RL2. Then relay RL1 turns are configured as input ports and port B is
on the audio player. configured as output port A. is used for inter
detection,portB for activating the siren,
Here we have provided the same polarity- cassette player, telephone cradle switch and
reversal detection facility so that the audio redial button and port C for polarity reversal
player turns on only when polarity-reversal is detection.
detected.
The circuit for detecting the polarity reversal • Battery’s
detection the telephone line is built around
optocoupler IC8 and IC9. Normally, TIP is
positive with respect to RING lead of
telephone line. With the handset in off position
a nominal loop current of 10 mA is assumed to
flow through the telephone line. Resistor R23
is selected as 120 ohms to develop the voltage
of 1.2v. When the dc lines voltage polarity
reversal occurs, optocoupler IC8’s internal
LED conducts and LED3 glows to indicate CONCLUSION:
polarity reversal occurs. Simultaneously, In this paper, a low-cost low-power
optocoupler IC9’s internal LED goes off and microcontroller for a standalone security
its pin 5 (collector) goes high to provide line – access control system is presented. This
system is proposed to be a convenient
reversal sense signal to AT89C51.
alternative to other systems for consumers that
need moderate to high level security without
Fig.3 shows the power supply circuit. The AC
any networking considerations and at a low
mains are stepped down by transformer X1 to cost. It is crucial to reiterate that the level of
deliver a secondary output of 12V AC at 300 security provided by such a system heavily
ma. The transformer output is rectified by a depends on the security of the encryption
full-wave bridge rectifier. algorithm used in the encryption/decryption
process. Therefore, a good selection of the
Comprising diodes D7 through D10. encryption algorithm, similar to the one
Capacitor C12 acts as a filter to eliminate proposed in this paper is essential for the
ripples. IC10 and IC11 provide regulated 5v reliability of the security system.
and 9V power supplies, respectively.
References:
Capacitors C13 and C14 bypass any ripple
present in the regulated out-us. Switch S2 acts 1. http://www.123eng.com/projects/microco
as an ‘on’/’off’ switch.
ntroller_based_home_security_project.ht
Used Components: ml
2. http://www.atmel.com
• AT89C2051 3. http://www.electronics4u.com
• NE555 4. http://www.ttransenergie.com.au
• uA741 Operational Amplifier
• MCT2E Optocoupler
• Regulator (7805,7809)
• BC 548 NPN Transistor
• L14G1 Photo Transistor
• 1N4148 Switching Diode
• LED’s ( Red, IR)
• Resistor’s
• Capacitor’s
• Relay’s

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