EEN1026 Electronics II – Assignment

Objective: To design JFET and high-frequency BJT amplifiers circuits using both hand
analysis and computer software simulations.

CAD Tool: OrCAD PSpice 9.1 (Student Version)

Grouping: 2 students per group

Instructions: 1. Print a copy of this page, fill in your details and sign.

2. Submit this page together with the complete report containing hand analysis
and simulation results to Dr. Guo Xiaoning before Friday 7th January
12noon (any late submission will result in zero marks). Be sure to hand
in the two reports at the same time to avoid mix-ups.

Rules & Regulations

1. Assignment report must be handwritten and the final calculated results must be highlighted
(underlined or use different colours, etc.).
2. Assignment report must be arranged according to the order of assignment questions.
3. All schematic diagrams and simulated graphs/waveforms must be printed directly from the
PSpice simulation software. Copy-and-paste screenshots will not be accepted. Before printing
the schematic diagram, remember to enter your names and IDs in the title box (at the bottom
right corner of the schematic entry window).
4. Diagrams/graphs must be inserted in the appropriate pages according to the order of question
answered. DO NOT put all diagrams/graphs at the end of the report.
5. Page numbering (including printed diagrams, graphs, datasheet pages) must be written at the
bottom center of each page with format „x of y‟ or „x/y‟.
6. Assignment reports which fail to follow the rules & regulations, as well as untidy/messy work
will be penalized in the form of mark reduction.
7. Late submission will be assigned zero mark automatically.
8. Anyone who copies or allows others to copy (even a small part) will get zero mark for
your entire assignment. (Both Assignment Question 1 and Assignment Question 2 will be
zero mark!)

We have read and agree to abide by the rules and regulations of this assignment.
Student 1 Student 2
Name: ______________________________ Name: __________________________
Major: ______________________________ Major: __________________________
ID: _________________________________ ID: _____________________________
Email: ______________________________ Email: __________________________

Signature: ___________________________ Signature: _______________________

 Question 1 – JFET Amplifier

Question Objectives
- To gain an understanding of electronic circuit design procedures.
- To develop a working knowledge of CAD tools and device models.
- To compare theoretical performance with simulated results.
- To design electronic circuit to meet specific application requirements.

Project Description
Design a Junction Field Effect Transistor (JFET) common-source amplifier that meets the
required specifications. Heavy emphasis is placed on the theory and comparison with
simulation results.

(Note that Assignment Question 1 is an open-ended problem. Therefore, different

students are expected to get different results.)

Required Specifications
Voltage Gain: At least 10
Input Resistance: At least 100 kΩ
Load Resistance: 100 kΩ
Supply Voltage: 30 V
Output Voltage Swing: 10 V peak-to-peak or more
Input Signal Frequency: 1 kHz sinusoidal

Brief Theoretical Background (You should refer to Chapter 1 for more details)
The pinch off voltage (VP) and saturation drain current at VGS = 0V (IDSS) of a JFET
model are specified with VP(Max), VP(Min), IDSS(Max) and IDSS(Min) in the data sheets of the JFET
model. These produce two extreme transfer characteristic (TC) curves, TCMax and TCMin.
All the TC curves of the JFET devices of the same model must fall in between TCMax and
TCMin. Theoretically, all these curves can be represented by the Shockley‟s equation,
2
 V 
I D  I DSS 1  GS  .
 VP  ID

IDSS(Max)
TCMax
IDSS1
Q1
Q2 TC1
DC loadline
IDSS2
TC2
ID(Max)
IDSS(Min)
TCMin
ID(Min)

0 VGS
VP(Max) VP2 VP1 VP(Min)
VGS(Max) VGS(min)
Figure 1-1: Transfer characteristic curves of a JFET model with the two extreme curves (TCMax &
TCMin) and two example curves (TC1 & TC2) with their Q-points (Q1 & Q2)
 A DC loadline can be drawn passing two points, (VGS(Max), ID(Max)) and (VGS(Min), ID(Min))
which are located on the TCMax and TCMin curves. This loadline can be represented by
I D  mVGS  c , where m is the slope and c is the intercept point on the ID axis of the loadline.
By choosing suitable ID(Max) and ID(Min) values, the biasing resistance values can be found
analytically or graphically to satisfy the required specifications.
You may choose to use the common source JFET amplifier topology (voltage-divider
bias) as given in Figure 1-2 or any JFET amplifier you like, as long as the designed amplifier
fits the required specifications.

Figure 1-2: A JFET common source amplifier circuit with voltage-divider bias

Brief Design Procedures [Limited hints are given in square brackets]

1. Plotting transfer characteristic curves

(i) Select a suitable JFET and find VP(Max), VP(Min), IDSS(Max) and IDSS(Min) values from its
data sheet.
(ii) Use Microsoft Excel to plot a graph with TCMax and TCMin curves.

2. Design the amplifier by hand analysis:

(i) Choose values for ID(Max) and ID(Min), where ID(Min) is 80% - 90% of ID(Max).
[It is more suitable to choose ID(Min) first.]
(ii) Draw a DC loadline which intersects the TCMax and TCMin curves at the chosen
ID(Max) and ID(Min).
[This is useful for you to picture the calculation in (iii) to (v).]
(iii) Calculate VGS(Max) and VGS(Min).
[With the Shockley’s equation. Graphical approach is not suitable for this case,
instead, use analytical approach.]
(iv) Find the slope of the loadline m, analytically.
 (v) Find the value of c.
[With the loadline equation. Graphical approach is not suitable.]
(vi) Derive the required circuit equations based on Figure 1-2.
(vii) Find the required biasing resistors.
[Note the required input resistance and the around center-Q condition, i.e. VDSQ 
0.5(VDD – VSQ). VSQ = IDRS, not the value from Figure 1-2.]
(viii) Find the required coupling/bypass capacitors.
[fcutoff = 1/2πReqCeq << foperating]
(ix) Analyze the voltage gain and the maximum output voltage swing for the two
extreme cases, TCMax and TCMin.
[Use graphical approach with the plotted TC graph. Transfer Vgs (Vgs = VGSQ +
vgs(ac)) to Id. For forward workout, Vgs  Id  …  Vds  vRL(ac). Check the
allowable Vds swinging range. If Vds swing is out off range, use reverse workout first
then forward, i.e. allowable Vds  …  Vgs  Id  …  Vds  vRL(ac). vgs must be
symmetrical.]
(x) If the required specifications cannot be met, go back to step (i), choose new values
for ID(Max) and ID(Min), and repeat the design process.
[Note on the change of the gain and voltage swing with respect to the change of
ID(Max) and ID(Min) values.]

3. Using PSPICE software, simulate the amplifier performance using a 1 kHz sinusoid
signal.
(i) Set the amplitude of the source signal set to a value that gives maximum voltage
swing at the load resistor without noticeable distortion. State the amplitude used in
your report.
(ii) Note the larger is the vgs swing, the more distortion is on the vRL(ac) waveform.
Explain why.

4. Compare the hand analysis and the simulated results. Discuss the differences.
[The PSPICE transistor model assumes fixed values of IDSS and VP. The simulation results
will not match your hand analysis perfectly but they should fall in the ballpark, between
the two extreme cases.]

Guidelines in preparing your Assignment Question 1 report

1. Follow the trend of the Brief Design Procedures for your assignment report
arrangement.
2. Print out the page of data sheet, circle the VP(Max), VP(Min), IDSS(Max) and IDSS(Min) values used
and attach it on the corresponding page.
3. Print out the graph plotted (You can choose to plot by hand, Excel, gnuplot, Matlab, etc.)
using the JFET datasheet values. Indicate clearly the chosen points, (VGS(Max), ID(Max)) and
(VGS(Min), ID(Min)) with their corresponding values on the graph and draw the DC loadline.
4. Show clearly the necessary steps in any calculations, derivations and other works.
5. Print out the schematic diagram, with DC voltages and currents at every node indicated
[Make sure no indicator blocking the circuit lines or no labels overlapping each other].
6. Print out the input and output voltage waveforms at the conditions specified by the brief
design procedure 3(i). Answer question 3(ii).
7. Comment on the hand analysis and the simulated results. (Brief design procedure 4)
8. Try to present a brief and neat report with less than 10 pages (printed data sheet, graph,
schematic diagram and waveform pages excluded).
Question 2- High-frequency BJT Amplifier

Question Objectives
-To gain an understanding of electronic circuit design procedures.
-To develop a working knowledge of CAD tools and device models.
- To compare theoretical performance with simulated results.

Project Description
Design a Bipolar Junction Transistor (BJT) amplifier. Compare the hand analysis with
simulation results.

Brief Theoretical Background (You should refer to Chapter 2 for other information)
The performance of a BJT amplifier at high-frequency operation can be analyzed using
the hybrid-π model. The hybrid-π parameters can be calculated with the h-parameters and
other parameters which can be found in datasheet.

IC
gm  , where VT = 26 mV at room temperature
VT

h fe
rb 'e 
gm

rbb'  hie  rb 'e

rb 'e 1
rb 'c  
hre gb 'c

1
gce  hoe  (1  h fe ) gb 'c 
rce

The base-emitter capacitance Ce is given by

g
Ce  m , where fT is the current-gain-bandwidth product of the BJT
2fT
The collector-base capacitance Cc is given by Cobo (CB output capacitance with the input
open, IE = 0 in common base configuration).
[The relationships between the hybrid-π  parameters and h-parameters can be derived by
comparing the hybrid-π model and hybrid model at mid-band frequencies. Ce is derived at
high frequency.]

Brief Design Procedure [Limited hints given in square brackets]

1. DC analysis
(i) For the BJT amplifier in Figure 2-1, use hFE = 120 for DC analysis.
(ii) Calculate IC, IB, VCB and VCE.
2. Hybrid-π parameter values

(i) Search online for suitable datasheet which has graphs for h-parameters versus IC and
Cobo versus reverse bias voltage (VCB) for BJT 2N3904.
 (ii) Find hfe, hie, hoe, hre and Cobo values from the graphs in the datasheet at the calculated
value in step 1(ii). Find fT value also. [Use typical fT value if any.]
(iii) Calculate gm value with the calculated IC value in step 1(ii).
(iv) Calculate rb’e, rbb’, rb’c, gce and Ce values. [Note that the calculation for gce value may
have large error. Let the value stays here.]
3. Hand calculation for |AV|, |AVS| and |Zi|

(i) Draw an AC equivalent circuit for the circuit in Figure 2-1.

(ii) Draw a model circuit with hybrid-π model for the circuit in Figure 2-1. Justify via
calculation which parameters can be neglected. [Normally, rce is a few tens of kΩ.]
(iii) Write down the equations for AV‟, AV (=Vo/Vi), Yi (=1/Zi) and AVS (=Vo/Vs).
[Derivations are not required. For reducing calculation work, AV‟ can be simplified,
justify via calculation which terms in the AV‟ equation can be neglected.]
(iv) Determine the values of |AV|, |AVS| and |Zi| at 100 kHz, 1 MHz, 10 MHz and 100MHz.
Record their values in Table 2-1. [Since the calculations need quite a large number of
working steps, systematic calculation work is necessary, either to reduce mistakes
during calculations or to be easily read by reader. Tables will be useful for this
purpose with the necessary notes (e.g. how to perform the calculations, formulas for
intermediate equations/terms/factors) at the bottoms of the tables. Make sure these
notes are clear and readable.]

Table 2-1: Hand analysis results

Frequency |AV| |AVS| |Zi|

100 kHz

1 MHz

10 MHz

100 MHz

4. PSPICE simulation [Please refer to the PSPICE guidelines provided in Appendix]

(i) Use the PSPICE software to simulate the amplifier performance. Run the PSpice
simulation with AC sweep analysis. Set the sweep parameter to 20 points/decade,
100 Hz (Not 100 kHz) to 1000 MHz (1000Meg in Pspice). [Use VAC, not VSIN.]
(ii) Plot |AV| and |AVS| in the same graph and print out the graph. Record their values at
100 kHz, 1 MHz, 10 MHz, and 100 MHz in Table 2-2. [In PSPICE, |AV| = AV.]
(iii) Plot |Zi| = Vi/Ii and print out the graph. Record the values of |Zi| at 100 kHz, 1 MHz,
10 MHz and 100 MHz in Table 2-2.
5. Compare the hand analysis and the simulated results. [The IC, IB, VCB and VCE values are
also good to be compared. Give comments or tell why if can.]
 Table 2-2: PSpice simulation results

Frequency |AV| |AVS| |Zi|

100 kHz

1 MHz

10 MHz

100 MHz

Figure 2-1: A BJT amplifier circuit

Guidelines in preparing your Assignment Question 2 report

1. Follow the trend of the Brief Design Procedure for your assignment report arrangement.
2. For information from datasheet, print out the relevant pages and attach them on the
corresponding pages of your report. For graphs, clearly mark and write down the values
on the graphs. For tables, circle the values used on the tables.
3. For calculations, derivations and other works, clearly show the necessary working steps.
For repeated works, use tables to show all the calculation progresses (see note No 6
below). For circuits drawn, all components must be labeled.
4. Print out the schematic diagram, with the necessaries as mentioned in Assignment
Question 1. [See assignment report arrangement, note No. 5.]
5. For information from simulation graphs, clearly mark and write down values on the
graphs. [Not just print out and attach.]
6. Notes for Tables: Tables are neat and organized display tools for report. E.g. for step 2 in
the brief design procedure, a table can be used for the values read from datasheet (put at
the left side of the table) and the calculated values (put at the right side of the table).
Besides, they are also useful for systematic calculation works as in step 3 in the brief
design procedure which involves quite a large number of steps to get the final values.
7. Keep the report brief and readable with less than 10 pages.
Appendix - Basic PSpice Revision

You probably already have some experience using PSpice, from your Electronics I course. As
you know, PSpice is a popular simulation tool from OrCAD. The PSpice Student Version is
the professional version with a limited parts library and a limited circuit size. Nevertheless,
this limited version is more than sufficient for our academic purpose. Please refer to your
Electronics I assignment for detail steps in creating the schematic, setting up the required
stimulus, etc.

Preliminary question: Where do I get the PSpice 9.1 Student Version software?
You may search for the keyword “PSpice Student Version” using any search engine on the
internet. You will find many websites that offer free download link of this software.

Analyses Required

There are many analyses that you can perform with PSpice. However, for this assignment,
you only need to use 4 types of analyses:

Bias Point Details / DC sweep

Bias point details analysis allows the simulator to calculate the bias points (voltage, current
levels) of nodes, branches in the circuit.

DC sweep analysis is similar to the bias point details, except the analysis is iterated/swept for
different variables (i.e. DC voltage source, temperature, component values such as resistance)
in the circuit. This is useful for finding the transfer function of an amplifier.

Notes:
 Calculated DC voltage and current values can be obtained by enabling bias voltage
display and bias current display in the schematic window such as the schematic sample
shown in Figure A-1. Just simply click on the circled buttons to enable such display.
 gm can be viewed in the simulation output file when bias point details analysis is
performed (*.OUT). You can view the .OUT file by clicking the circled button in the
OrCAD PSpice A/D Demo window.

AC sweep

AC sweep is a frequency response analysis. PSpice calculates the small-signal response of the
circuit to a combination of inputs by transforming it around the bias point and treating it as a
linear circuit. Here are a few things to note:
 Nonlinear devices, such as voltage- or current-controlled transistors, are transformed
to linear circuits about their bias point value before PSpice runs the linear (small-
signal) analysis.
 Due to AC sweep analysis being a linear analysis, it only considers the gain and phase
response of the circuit; it does not limit the voltages or currents. Fidelity of the
simulation might be lost. Hence the best way to use AC sweep analysis is to set the
source magnitude to one. This way, the measured output equals the gain, relative to
the input source, at that output.

You can use VAC or VSIN voltage source to simulate the AC analysis.
Transient

Transient analysis is a kind of analysis that sweeps the time variable. The results of transient
analysis will be a graph that time as its x-axis, with different voltage/current levels as the y-
axis. This analysis allows you to see how signal affects the voltage/current of different
node/branch in the circuit with respect to time. Refer to Figure A-2 for a sample transient
analysis output. A similar analogy is your oscilloscope that captures the time domain
waveform.

Note:
 By checking "Detailed Bias Pt." option in the transient analysis setup, gm can be viewed in
the simulation output file (*.OUT).

Acknowledgement
Acknowledgement is given to Cadence for the free PSpice 9.1 Student Version software.

Reference
[1] OrCAD PSpice user‟s guide
Appendix – Sample Schematic and Waveforms

Figure A-1: Example of PSpice Schematic printout

Figure A-2: Example of PSpice generated waveforms