1

Abstract This paper introduces Least Mean Square

(LMS) based calibration technique for Voltage Controlled
Oscillator (VCO) based ADC. The VCO provides an
inherent sinc filtering for the input voltage. The harmonics
are also attenuated by the corresponding sinc functions.
An 8-bit VCO based ADC was simulated with a 5-bit linear
VCO. This ADC was calibrated using LMS algorithm. After
calibration, SNDR is close to the ideal 8-bit converter.

Index Terms LMS Calibration, VCO, Time-based ADC,
Sinc filtering

I. INTRODUCTION
he time based ADC architectures are promising in
deep-sub micron due to smaller delay generation and
large tuning range available from the voltage controlled
oscillators (VCO). However, the delay cells and VCO
suffer from non-linearity. The linearity of VCO is limited
to 5%, which results in 6 bit resolution, [1]. In order to
achieve higher resolution, the linearity of VCO must be
improved. In [2], a Nyquist rate VCO based ADC was
realized by building a linear VCO. However, the effective
number of bits was limited to 8 because of VCO non-
linearity. In [1], the VCO was enclosed in a feedback loop
to improve linearity. However, this oversampled system
requires high frequency sampling clock which limits the
maximum oscillation frequency of the VCO. The scope of
this paper is to characterize the VCO non-linearity using
LMS algorithm. An example 8-bit 10 MHz Nyquist rate
VCO based ADC was simulated with LMS calibration
method. Section II briefly describes the time based ADC.
Section III elaborates on the non-linearity of the VCO.
Section IV introduces the non-linear VCO model used in
LMS algorithm. Section V contains the simulation results
and Section VI concludes the paper.

Manuscript received July, 17, 2010. Hariprasath Venkatram, Rajesh
Inti and Dr. Un-Ku Moon are with Oregon State University, Corvallis,
OR 97331 USA
(E-mail: venkatha@eecs.oregonstate.edu)


II. TIME BASED ADC
The 8-bit time based ADC is shown in Figure 1, [2]. It
consists of a coarse 8-bit converter. The 8-bit coarse
converter is implemented with a binary counter clocked
by the VCO and reset by the sampling clock The multi-
phase VCO was implemented as an 8-stage differential
ring oscillator as shown in Figure 3.

8-bit
Counter
1
u
s
F
Reset
8-bit
8-bit
in
V
out
D

Figure 1 Time based VCO ADC

The conversion of tuning voltage to phase by a VCO is
given by equation (1) for a sinusoidal input.

( )
( ) ( )
vco vco in in ref
in s
vco s in in s s
in s
(n) 2 sin( t)+f
sin( T /2)
K T v sin nT +T /2 .
T
K
/
v dt
2
2
s s
s
nT T
nT
+
=
|
=
|
|
\ .

- (1)

Where,
vco
K is the VCO gain in Hz/V,
s
T is the sampling
frequency of the ADC,
in
v is the amplitude of the input,
in
e is the input frequency. The above expression
indicates a sinc filtering of the input voltage. This
provides an inherent anti-aliasing for the input network.
III. NON-LINEARITY OF VCO BASED ADC
A. VCO non-linearity

The VCO non-linearity can be modeled as shown in
Figure 2.
Least Mean Square calibration method for
VCO non-linearity
Hariprasath Venkatram, Rajesh Inti and Un-Ku Moon
School of Electrical Engineering and Computer Science
Oregon State University
Corvallis, Oregon-97331- 5501
Email: venkatha@eecs.oregonstate.edu
T

2

2 3
( ) K
vco in in in
v v v dt o | + +
in
v
vco
u


Figure 2 VCO Non-Linearity



out
V
in
V

ctrl
V
ctrl
V
8-Stage Oscillator
+
in
V
+

Figure 3 8-Stage Differential Oscillator


Assuming a sinusoidal input, the attenuation provided by
VCO for the fundamental and harmonics can be derived
as follows,

vco vco in s in s s in s
2
in s
in s s in s
3
in s
in s s in s
= 2K v T sin( (nT +T /2))sinc(f T )
2v T
+ cos(2 (nT +T /2))sinc(2f T )
2
2v T
+ sin(3 (nT +T /2))sinc(3f T )
4
+ phase of
(n)
fset
- (2)

Where, , , ,
vco in s in
K v T e , have the same meaning as in (1).
, o | are the second and third order non-linearity
coefficients of the VCO. Phase offset is a collection of
terms independent of the input frequency. For an input
signal of 6 MHz, the non-linear VCO will generate
harmonics at 12 MHz, 18 MHz and so on. However, the
attenuation provided by VCO for 6 MHz, 12 MHz, 18
MHz are -1.5 dB, -6 dB and -18 dB respectively. Thus,
the harmonics are attenuated by the sinc filter. This can
be inferred from Figure 4.

IV. LMS CALIBRATION
Least Mean Square estimation is a deterministic
estimation. Given the following model,

Y = H. - (3)

Where, Y is the observed data, H is the model input and
Ois the parameters of interest.
LMS
O , the least mean
square estimation of the parameters is

T T -1
LMS
= (H H) H Y - (4)

10 20 30 40
-50
-40
-30
-20
-10
0
M
a
g
n
i
t
u
d
e
,

d
B
Frequency, MHz
Sinc filtering by VCO


Figure 4 Sinc Filtering by VCO for the tuning voltage

The line fitting example explains the above model.
Given a set of points,
1 1 2 2 n n
,y ), (x ,y ).....(x ( ,y x ) , the best
fit line using LMS algorithm can be derived as follows


1 1
2 2
. . .
. .
n n
y x
y x
m
y x




=





- (5)

The parameter m can be evaluated from (4) as follows

2
1 1
/
N N
LMS i i i
i i
m x y x
= =
=

- (6)
The above example can be extended to ADCs as
explained in [5]. The radixes of the ADC are the
parameters of interest. A slow but accurate ADC
quantizes the input as shown in Figure 5. The output
from the slow ADC is compared with the output from the
ADC under calibration.

This calibration method does not need separate
calibration signals and can be performed in the
background. Since, LMS is a deterministic calibration
method; the convergence time for the algorithm is
smaller than the correlation based algorithms. The LMS
setup is shown below.
3


ADC
ADC
Slow but
Accurate
ADC to
Calibrate
Vin
n
-i
out i
i=1
D = b 2

n
out1 i i
i=1
D r = ab

.
vco
D b ra =


Figure 5 LMS calibration for VCO based ADC

From (2), the output phase of the VCO can be re-written
as
2 3
( ) ( )
vco in in in e
n v v v n o | o u = + + + - (7)

Where , , model the non-linearity of the VCO and
( )
e
n o model the quantization error from the VCO based
ADC. Rearranging (7), we get

2 3
( ( ) ( ))
in vco e in in
n n v v v o o | ' ' u + + + = - (8)

in
v ,
2
in
v is approximated by
out
D and
2
out
D from the slow
ADC output decimal code. ( ) ( )
vco e
n n o + u is obtained
from the VCO ADC output code. The VCO
characterization is performed as follows,

2
1,1 1,8
1
2
2 2,1 2,8
8
2
,1 ,8
. .
. .
.
. . . . . . .
.
. .
(1)
(1)
(2) (2)
'
( )
(
. . . .
. . )
.
out
out
out out
out
n n out
out
b b D
D
ra
D ra b b D
e
ra
D
b b D
D B ra e
n
n
o








= +










= +
- (9)

Where,
out out out
(1), D (2), ...., D D (n) are the output
codes from the slow ADC in decimal format.
i,1 i,2 i,8
b , ..., , b b , are the 8-bit binary output codes from
the VCO based ADC.
1 2 8
ra , ra ,, ra , are the radixes to
be estimated for the VCO based ADC. o' , accounts for
the second order non-linearity from the VCO. e ,
represents the error in this model. The error term
consists of quantization error, circuit noise and the error
in the parameters to be estimated.

The sinc filtering provided by the VCO attenuates the
higher order harmonics. Therefore, the higher order
harmonics were not modeled in the equation (8). The
radixes can be estimated using (4) as shown in (10).


1,
2,
T T -1
8,
.
= (B B) B D
.
LMS
LMS
out
LMS
ra
ra
ra
o








'
- (10)

The estimated radixes account for the non-linearity in
VCO and mismatch in the phase separation of the multi-
phase VCO.
V. SIMULATION RESULTS

0 0.2 0.4 0.6 0.8 1
0
500
1000
1500
2000
2500
Control Voltage, V
F
r
e
q
u
e
n
c
y

,

M
H
z
VCO Tuning Curve, 8-Stage Differential Oscillator

Figure 6 VCO tuning curve

An 8-bit VCO based ADC was simulated with a 5-bit
linear VCO. The sampling frequency was chosen to be
10 MHz. The VCO tuning range was close to 1.5 GHz.
The tuning curve of the VCO is shown in Figure 6. The
simulation setup shown in Figure 5 was used for LMS
calibration.

0.2 0.4 0.6 0.8 1
0.4
0.5
0.6
0.7
0.8
0.9
1
Control Voltage, V
N
o
r
m
a
l
i
z
e
d

O
u
t
p
u
t
LMS Calibrated Output Function of VCO


Figure 7 LMS fit for the VCO transfer Curve

4
An 8-Stage ring oscillator with 5 bit linearity was used as
an 8-bit ADC. The LMS setup in (8) was used to calibrate
the VCO codes. The estimated VCO transfer curve is
shown in Figure 7.

The Power Spectral Density (PSD) of the 8-bit VCO ADC
before calibration is shown in Figure 8. The SNDR is
limited to 5 bits due to the non-linearities present in the
VCO.

200 400 600 800 1000
-90
-80
-70
-60
-50
-40
-30
-20
-10
M
a
g
n
i
t
d
u
e
,

d
B
PSD of VCO based ADC before Calibration, SNDR = 32. 4 dB
FFT Bins


Figure 8 PSD of VCO based ADC before Calibration,
SNDR = 32.4 dB


The model in (9) was used to calibrate this VCO based
ADC. The calibrated output PSD of the VCO based ADC
is shown in Figure 9. The SNDR of the calibrated ADC is
46.7 dB. The improvement in SNDR is close to 2.3 bits.



200 400 600 800 1000
-100
-80
-60
-40
-20
M
a
g
n
i
t
u
d
e
,

d
B
PSD of VCO based ADC after Calibration, SNDR = 46.7 dB
FFT Bins

Figure 9 PSD of Calibrated VCO based ADC, SNDR =
46. 7 dB
VI. CONCLUSION
The non-linearity of the VCO limits the accuracy of the
time based ADC. The LMS calibration technique was
applied to calibrate the non-linear VCO characteristics.
An 8-bit VCO based ADC was calibrated with this
algorithm. The calibration improves SNDR from 32.4 dB
to 46.7 dB. This method can also be used to characterize
the VCO tuning curve.
REFERENCES
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Continuous-Time EA ADC With a 5-Bit, 950-MS/s VCO-
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4, pp. 805-814, April 2008.
[2] J. Kim, S. Cho, "A time-based analog-to-digital converter
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